./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix006_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix006_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d20aab98319afd33e2a231b3c73d2fc024bfbd81 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:23:27,698 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:23:27,700 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:23:27,707 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:23:27,707 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:23:27,708 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:23:27,709 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:23:27,710 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:23:27,711 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:23:27,712 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:23:27,712 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:23:27,713 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:23:27,713 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:23:27,714 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:23:27,715 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:23:27,715 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:23:27,716 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:23:27,717 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:23:27,718 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:23:27,719 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:23:27,720 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:23:27,721 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:23:27,722 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:23:27,722 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:23:27,724 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:23:27,724 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:23:27,724 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:23:27,725 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:23:27,725 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:23:27,725 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:23:27,726 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:23:27,726 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:23:27,726 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:23:27,727 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:23:27,727 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:23:27,728 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:23:27,728 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:23:27,728 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:23:27,728 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:23:27,729 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:23:27,729 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:23:27,729 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:23:27,739 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:23:27,739 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:23:27,740 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:23:27,740 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:23:27,740 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:23:27,740 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:23:27,741 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:23:27,741 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:23:27,741 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:23:27,741 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:23:27,741 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:23:27,741 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:23:27,741 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:23:27,741 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:23:27,742 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:23:27,742 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:23:27,742 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:23:27,742 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:23:27,742 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:23:27,742 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:23:27,742 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:23:27,742 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:23:27,743 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:23:27,743 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:23:27,743 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:23:27,743 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:23:27,743 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:23:27,743 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:23:27,743 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:23:27,743 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d20aab98319afd33e2a231b3c73d2fc024bfbd81 [2019-12-07 17:23:27,842 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:23:27,850 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:23:27,852 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:23:27,853 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:23:27,854 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:23:27,854 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix006_rmo.oepc.i [2019-12-07 17:23:27,891 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/data/24093f9f5/ff8beaa1845b4348b6137d3f585e91f5/FLAGcd7c991cd [2019-12-07 17:23:28,389 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:23:28,390 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/sv-benchmarks/c/pthread-wmm/mix006_rmo.oepc.i [2019-12-07 17:23:28,400 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/data/24093f9f5/ff8beaa1845b4348b6137d3f585e91f5/FLAGcd7c991cd [2019-12-07 17:23:28,409 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/data/24093f9f5/ff8beaa1845b4348b6137d3f585e91f5 [2019-12-07 17:23:28,411 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:23:28,412 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:23:28,413 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:23:28,413 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:23:28,415 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:23:28,416 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,417 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28, skipping insertion in model container [2019-12-07 17:23:28,418 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,423 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:23:28,451 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:23:28,690 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:23:28,698 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:23:28,740 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:23:28,784 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:23:28,784 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28 WrapperNode [2019-12-07 17:23:28,785 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:23:28,785 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:23:28,785 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:23:28,785 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:23:28,790 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,803 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,821 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:23:28,821 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:23:28,822 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:23:28,822 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:23:28,828 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,828 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,831 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,832 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,839 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,842 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,844 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... [2019-12-07 17:23:28,847 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:23:28,847 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:23:28,848 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:23:28,848 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:23:28,848 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:23:28,887 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:23:28,888 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:23:28,888 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:23:28,888 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:23:28,888 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:23:28,888 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:23:28,888 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:23:28,888 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:23:28,888 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:23:28,888 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:23:28,889 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:23:28,889 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:23:28,889 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:23:28,890 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:23:29,259 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:23:29,259 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:23:29,260 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:23:29 BoogieIcfgContainer [2019-12-07 17:23:29,260 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:23:29,261 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:23:29,261 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:23:29,264 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:23:29,264 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:23:28" (1/3) ... [2019-12-07 17:23:29,265 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@13f5e6af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:23:29, skipping insertion in model container [2019-12-07 17:23:29,265 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:23:28" (2/3) ... [2019-12-07 17:23:29,265 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@13f5e6af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:23:29, skipping insertion in model container [2019-12-07 17:23:29,265 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:23:29" (3/3) ... [2019-12-07 17:23:29,267 INFO L109 eAbstractionObserver]: Analyzing ICFG mix006_rmo.oepc.i [2019-12-07 17:23:29,275 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:23:29,275 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:23:29,280 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:23:29,281 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:23:29,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,306 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,306 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,306 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,306 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,307 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,307 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,307 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,308 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,308 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,308 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,308 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,308 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,309 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,310 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,311 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,311 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,311 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,311 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,311 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,312 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,312 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,312 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,312 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,313 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,313 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,313 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,313 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,313 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,313 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,314 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,314 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,314 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,314 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,314 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,314 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,315 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,315 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,315 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,315 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,316 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,316 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,316 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,316 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,316 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,316 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,317 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,317 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,317 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,317 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,318 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,319 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,319 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,319 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,320 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,321 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,322 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,323 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,324 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,325 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,326 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,327 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,328 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,329 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,330 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,331 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,332 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,333 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,334 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,335 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:23:29,350 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:23:29,363 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:23:29,363 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:23:29,363 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:23:29,363 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:23:29,364 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:23:29,364 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:23:29,364 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:23:29,364 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:23:29,374 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 17:23:29,375 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 17:23:29,438 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 17:23:29,438 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:23:29,449 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 706 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:23:29,465 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 17:23:29,495 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 17:23:29,495 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:23:29,501 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 706 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:23:29,516 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:23:29,517 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:23:32,489 WARN L192 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 48 [2019-12-07 17:23:32,676 WARN L192 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 17:23:32,767 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78628 [2019-12-07 17:23:32,767 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 17:23:32,770 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 17:23:46,726 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 110182 states. [2019-12-07 17:23:46,728 INFO L276 IsEmpty]: Start isEmpty. Operand 110182 states. [2019-12-07 17:23:46,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:23:46,732 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:23:46,732 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:23:46,732 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:23:46,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:23:46,736 INFO L82 PathProgramCache]: Analyzing trace with hash 917838, now seen corresponding path program 1 times [2019-12-07 17:23:46,741 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:23:46,741 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824459024] [2019-12-07 17:23:46,741 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:23:46,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:23:46,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:23:46,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1824459024] [2019-12-07 17:23:46,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:23:46,871 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:23:46,871 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372009992] [2019-12-07 17:23:46,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:23:46,874 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:23:46,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:23:46,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:23:46,885 INFO L87 Difference]: Start difference. First operand 110182 states. Second operand 3 states. [2019-12-07 17:23:47,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:23:47,676 INFO L93 Difference]: Finished difference Result 109312 states and 463550 transitions. [2019-12-07 17:23:47,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:23:47,677 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:23:47,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:23:48,133 INFO L225 Difference]: With dead ends: 109312 [2019-12-07 17:23:48,133 INFO L226 Difference]: Without dead ends: 102592 [2019-12-07 17:23:48,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:23:52,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102592 states. [2019-12-07 17:23:53,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102592 to 102592. [2019-12-07 17:23:53,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102592 states. [2019-12-07 17:23:55,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102592 states to 102592 states and 434430 transitions. [2019-12-07 17:23:55,761 INFO L78 Accepts]: Start accepts. Automaton has 102592 states and 434430 transitions. Word has length 3 [2019-12-07 17:23:55,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:23:55,761 INFO L462 AbstractCegarLoop]: Abstraction has 102592 states and 434430 transitions. [2019-12-07 17:23:55,761 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:23:55,761 INFO L276 IsEmpty]: Start isEmpty. Operand 102592 states and 434430 transitions. [2019-12-07 17:23:55,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:23:55,765 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:23:55,765 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:23:55,765 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:23:55,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:23:55,765 INFO L82 PathProgramCache]: Analyzing trace with hash 1857942485, now seen corresponding path program 1 times [2019-12-07 17:23:55,765 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:23:55,766 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1152544379] [2019-12-07 17:23:55,766 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:23:55,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:23:55,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:23:55,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1152544379] [2019-12-07 17:23:55,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:23:55,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:23:55,834 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743577744] [2019-12-07 17:23:55,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:23:55,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:23:55,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:23:55,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:23:55,835 INFO L87 Difference]: Start difference. First operand 102592 states and 434430 transitions. Second operand 4 states. [2019-12-07 17:23:56,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:23:56,652 INFO L93 Difference]: Finished difference Result 159508 states and 648686 transitions. [2019-12-07 17:23:56,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:23:56,653 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:23:56,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:23:57,045 INFO L225 Difference]: With dead ends: 159508 [2019-12-07 17:23:57,045 INFO L226 Difference]: Without dead ends: 159459 [2019-12-07 17:23:57,046 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:24:02,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159459 states. [2019-12-07 17:24:04,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159459 to 146095. [2019-12-07 17:24:04,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146095 states. [2019-12-07 17:24:04,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146095 states to 146095 states and 601450 transitions. [2019-12-07 17:24:04,806 INFO L78 Accepts]: Start accepts. Automaton has 146095 states and 601450 transitions. Word has length 11 [2019-12-07 17:24:04,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:24:04,806 INFO L462 AbstractCegarLoop]: Abstraction has 146095 states and 601450 transitions. [2019-12-07 17:24:04,806 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:24:04,806 INFO L276 IsEmpty]: Start isEmpty. Operand 146095 states and 601450 transitions. [2019-12-07 17:24:04,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:24:04,812 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:24:04,812 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:24:04,812 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:24:04,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:24:04,812 INFO L82 PathProgramCache]: Analyzing trace with hash 230844073, now seen corresponding path program 1 times [2019-12-07 17:24:04,812 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:24:04,812 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024486668] [2019-12-07 17:24:04,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:24:04,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:24:04,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:24:04,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1024486668] [2019-12-07 17:24:04,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:24:04,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:24:04,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [62171572] [2019-12-07 17:24:04,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:24:04,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:24:04,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:24:04,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:24:04,864 INFO L87 Difference]: Start difference. First operand 146095 states and 601450 transitions. Second operand 4 states. [2019-12-07 17:24:05,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:24:05,876 INFO L93 Difference]: Finished difference Result 210634 states and 846978 transitions. [2019-12-07 17:24:05,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:24:05,877 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:24:05,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:24:06,410 INFO L225 Difference]: With dead ends: 210634 [2019-12-07 17:24:06,411 INFO L226 Difference]: Without dead ends: 210578 [2019-12-07 17:24:06,411 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:24:14,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210578 states. [2019-12-07 17:24:16,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210578 to 176587. [2019-12-07 17:24:16,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176587 states. [2019-12-07 17:24:17,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176587 states to 176587 states and 722707 transitions. [2019-12-07 17:24:17,057 INFO L78 Accepts]: Start accepts. Automaton has 176587 states and 722707 transitions. Word has length 13 [2019-12-07 17:24:17,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:24:17,058 INFO L462 AbstractCegarLoop]: Abstraction has 176587 states and 722707 transitions. [2019-12-07 17:24:17,058 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:24:17,058 INFO L276 IsEmpty]: Start isEmpty. Operand 176587 states and 722707 transitions. [2019-12-07 17:24:17,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:24:17,065 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:24:17,065 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:24:17,065 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:24:17,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:24:17,066 INFO L82 PathProgramCache]: Analyzing trace with hash 1069845708, now seen corresponding path program 1 times [2019-12-07 17:24:17,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:24:17,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103083644] [2019-12-07 17:24:17,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:24:17,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:24:17,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:24:17,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103083644] [2019-12-07 17:24:17,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:24:17,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:24:17,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1805189203] [2019-12-07 17:24:17,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:24:17,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:24:17,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:24:17,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:24:17,128 INFO L87 Difference]: Start difference. First operand 176587 states and 722707 transitions. Second operand 4 states. [2019-12-07 17:24:18,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:24:18,584 INFO L93 Difference]: Finished difference Result 216416 states and 883253 transitions. [2019-12-07 17:24:18,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:24:18,585 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:24:18,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:24:19,131 INFO L225 Difference]: With dead ends: 216416 [2019-12-07 17:24:19,131 INFO L226 Difference]: Without dead ends: 216416 [2019-12-07 17:24:19,132 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:24:27,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216416 states. [2019-12-07 17:24:29,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216416 to 185201. [2019-12-07 17:24:29,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185201 states. [2019-12-07 17:24:30,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185201 states to 185201 states and 759317 transitions. [2019-12-07 17:24:30,301 INFO L78 Accepts]: Start accepts. Automaton has 185201 states and 759317 transitions. Word has length 16 [2019-12-07 17:24:30,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:24:30,302 INFO L462 AbstractCegarLoop]: Abstraction has 185201 states and 759317 transitions. [2019-12-07 17:24:30,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:24:30,302 INFO L276 IsEmpty]: Start isEmpty. Operand 185201 states and 759317 transitions. [2019-12-07 17:24:30,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:24:30,313 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:24:30,313 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:24:30,313 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:24:30,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:24:30,314 INFO L82 PathProgramCache]: Analyzing trace with hash -430348270, now seen corresponding path program 1 times [2019-12-07 17:24:30,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:24:30,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114135286] [2019-12-07 17:24:30,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:24:30,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:24:30,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:24:30,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114135286] [2019-12-07 17:24:30,380 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:24:30,380 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:24:30,380 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367846997] [2019-12-07 17:24:30,380 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:24:30,380 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:24:30,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:24:30,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:24:30,381 INFO L87 Difference]: Start difference. First operand 185201 states and 759317 transitions. Second operand 3 states. [2019-12-07 17:24:31,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:24:31,690 INFO L93 Difference]: Finished difference Result 331864 states and 1351232 transitions. [2019-12-07 17:24:31,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:24:31,690 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:24:31,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:24:32,433 INFO L225 Difference]: With dead ends: 331864 [2019-12-07 17:24:32,433 INFO L226 Difference]: Without dead ends: 294974 [2019-12-07 17:24:32,433 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:24:39,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294974 states. [2019-12-07 17:24:46,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294974 to 282616. [2019-12-07 17:24:46,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 282616 states. [2019-12-07 17:24:47,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 282616 states to 282616 states and 1158738 transitions. [2019-12-07 17:24:47,319 INFO L78 Accepts]: Start accepts. Automaton has 282616 states and 1158738 transitions. Word has length 18 [2019-12-07 17:24:47,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:24:47,319 INFO L462 AbstractCegarLoop]: Abstraction has 282616 states and 1158738 transitions. [2019-12-07 17:24:47,319 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:24:47,319 INFO L276 IsEmpty]: Start isEmpty. Operand 282616 states and 1158738 transitions. [2019-12-07 17:24:47,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:24:47,335 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:24:47,336 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:24:47,336 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:24:47,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:24:47,336 INFO L82 PathProgramCache]: Analyzing trace with hash -1935633602, now seen corresponding path program 1 times [2019-12-07 17:24:47,336 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:24:47,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637787419] [2019-12-07 17:24:47,336 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:24:47,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:24:47,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:24:47,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [637787419] [2019-12-07 17:24:47,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:24:47,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:24:47,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2045691168] [2019-12-07 17:24:47,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:24:47,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:24:47,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:24:47,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:24:47,391 INFO L87 Difference]: Start difference. First operand 282616 states and 1158738 transitions. Second operand 5 states. [2019-12-07 17:24:50,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:24:50,021 INFO L93 Difference]: Finished difference Result 395363 states and 1592433 transitions. [2019-12-07 17:24:50,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:24:50,022 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:24:50,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:24:51,049 INFO L225 Difference]: With dead ends: 395363 [2019-12-07 17:24:51,049 INFO L226 Difference]: Without dead ends: 395265 [2019-12-07 17:24:51,049 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:25:02,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395265 states. [2019-12-07 17:25:06,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395265 to 301435. [2019-12-07 17:25:06,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301435 states. [2019-12-07 17:25:08,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301435 states to 301435 states and 1234907 transitions. [2019-12-07 17:25:08,270 INFO L78 Accepts]: Start accepts. Automaton has 301435 states and 1234907 transitions. Word has length 19 [2019-12-07 17:25:08,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:25:08,270 INFO L462 AbstractCegarLoop]: Abstraction has 301435 states and 1234907 transitions. [2019-12-07 17:25:08,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:25:08,270 INFO L276 IsEmpty]: Start isEmpty. Operand 301435 states and 1234907 transitions. [2019-12-07 17:25:08,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:25:08,291 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:25:08,291 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:25:08,291 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:25:08,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:25:08,291 INFO L82 PathProgramCache]: Analyzing trace with hash 1383705760, now seen corresponding path program 1 times [2019-12-07 17:25:08,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:25:08,291 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130288567] [2019-12-07 17:25:08,292 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:25:08,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:25:08,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:25:08,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2130288567] [2019-12-07 17:25:08,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:25:08,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:25:08,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1456813890] [2019-12-07 17:25:08,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:25:08,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:25:08,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:25:08,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:25:08,320 INFO L87 Difference]: Start difference. First operand 301435 states and 1234907 transitions. Second operand 3 states. [2019-12-07 17:25:09,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:25:09,544 INFO L93 Difference]: Finished difference Result 301087 states and 1233547 transitions. [2019-12-07 17:25:09,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:25:09,545 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:25:09,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:10,959 INFO L225 Difference]: With dead ends: 301087 [2019-12-07 17:25:10,960 INFO L226 Difference]: Without dead ends: 301087 [2019-12-07 17:25:10,960 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:25:17,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301087 states. [2019-12-07 17:25:24,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301087 to 297982. [2019-12-07 17:25:24,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297982 states. [2019-12-07 17:25:26,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297982 states to 297982 states and 1221729 transitions. [2019-12-07 17:25:26,258 INFO L78 Accepts]: Start accepts. Automaton has 297982 states and 1221729 transitions. Word has length 19 [2019-12-07 17:25:26,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:25:26,259 INFO L462 AbstractCegarLoop]: Abstraction has 297982 states and 1221729 transitions. [2019-12-07 17:25:26,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:25:26,259 INFO L276 IsEmpty]: Start isEmpty. Operand 297982 states and 1221729 transitions. [2019-12-07 17:25:26,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:25:26,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:25:26,279 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:25:26,279 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:25:26,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:25:26,279 INFO L82 PathProgramCache]: Analyzing trace with hash 799446319, now seen corresponding path program 1 times [2019-12-07 17:25:26,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:25:26,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670240737] [2019-12-07 17:25:26,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:25:26,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:25:26,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:25:26,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670240737] [2019-12-07 17:25:26,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:25:26,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:25:26,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911128721] [2019-12-07 17:25:26,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:25:26,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:25:26,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:25:26,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:25:26,306 INFO L87 Difference]: Start difference. First operand 297982 states and 1221729 transitions. Second operand 3 states. [2019-12-07 17:25:27,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:25:27,522 INFO L93 Difference]: Finished difference Result 297678 states and 1220564 transitions. [2019-12-07 17:25:27,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:25:27,523 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:25:27,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:28,832 INFO L225 Difference]: With dead ends: 297678 [2019-12-07 17:25:28,832 INFO L226 Difference]: Without dead ends: 297678 [2019-12-07 17:25:28,832 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:25:35,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297678 states. [2019-12-07 17:25:39,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297678 to 297678. [2019-12-07 17:25:39,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297678 states. [2019-12-07 17:25:40,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297678 states to 297678 states and 1220564 transitions. [2019-12-07 17:25:40,068 INFO L78 Accepts]: Start accepts. Automaton has 297678 states and 1220564 transitions. Word has length 19 [2019-12-07 17:25:40,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:25:40,068 INFO L462 AbstractCegarLoop]: Abstraction has 297678 states and 1220564 transitions. [2019-12-07 17:25:40,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:25:40,068 INFO L276 IsEmpty]: Start isEmpty. Operand 297678 states and 1220564 transitions. [2019-12-07 17:25:40,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 17:25:40,093 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:25:40,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:25:40,094 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:25:40,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:25:40,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1200546401, now seen corresponding path program 1 times [2019-12-07 17:25:40,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:25:40,094 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248362417] [2019-12-07 17:25:40,094 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:25:40,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:25:40,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:25:40,119 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248362417] [2019-12-07 17:25:40,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:25:40,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:25:40,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837616142] [2019-12-07 17:25:40,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:25:40,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:25:40,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:25:40,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:25:40,120 INFO L87 Difference]: Start difference. First operand 297678 states and 1220564 transitions. Second operand 3 states. [2019-12-07 17:25:41,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:25:41,740 INFO L93 Difference]: Finished difference Result 297678 states and 1208440 transitions. [2019-12-07 17:25:41,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:25:41,740 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 17:25:41,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:42,505 INFO L225 Difference]: With dead ends: 297678 [2019-12-07 17:25:42,505 INFO L226 Difference]: Without dead ends: 297678 [2019-12-07 17:25:42,506 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:25:52,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297678 states. [2019-12-07 17:25:55,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297678 to 295062. [2019-12-07 17:25:55,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295062 states. [2019-12-07 17:25:56,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295062 states to 295062 states and 1198870 transitions. [2019-12-07 17:25:56,686 INFO L78 Accepts]: Start accepts. Automaton has 295062 states and 1198870 transitions. Word has length 20 [2019-12-07 17:25:56,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:25:56,686 INFO L462 AbstractCegarLoop]: Abstraction has 295062 states and 1198870 transitions. [2019-12-07 17:25:56,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:25:56,686 INFO L276 IsEmpty]: Start isEmpty. Operand 295062 states and 1198870 transitions. [2019-12-07 17:25:56,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 17:25:56,710 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:25:56,710 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:25:56,710 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:25:56,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:25:56,710 INFO L82 PathProgramCache]: Analyzing trace with hash -1239615993, now seen corresponding path program 1 times [2019-12-07 17:25:56,710 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:25:56,710 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1750440734] [2019-12-07 17:25:56,711 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:25:56,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:25:56,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:25:56,743 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1750440734] [2019-12-07 17:25:56,743 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:25:56,743 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:25:56,743 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [938483684] [2019-12-07 17:25:56,743 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:25:56,743 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:25:56,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:25:56,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:25:56,743 INFO L87 Difference]: Start difference. First operand 295062 states and 1198870 transitions. Second operand 3 states. [2019-12-07 17:25:56,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:25:56,914 INFO L93 Difference]: Finished difference Result 59010 states and 189073 transitions. [2019-12-07 17:25:56,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:25:56,915 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 17:25:56,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:57,003 INFO L225 Difference]: With dead ends: 59010 [2019-12-07 17:25:57,003 INFO L226 Difference]: Without dead ends: 59010 [2019-12-07 17:25:57,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:25:57,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59010 states. [2019-12-07 17:25:58,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59010 to 59010. [2019-12-07 17:25:58,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59010 states. [2019-12-07 17:25:58,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59010 states to 59010 states and 189073 transitions. [2019-12-07 17:25:58,293 INFO L78 Accepts]: Start accepts. Automaton has 59010 states and 189073 transitions. Word has length 20 [2019-12-07 17:25:58,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:25:58,293 INFO L462 AbstractCegarLoop]: Abstraction has 59010 states and 189073 transitions. [2019-12-07 17:25:58,293 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:25:58,293 INFO L276 IsEmpty]: Start isEmpty. Operand 59010 states and 189073 transitions. [2019-12-07 17:25:58,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:25:58,298 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:25:58,298 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:25:58,298 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:25:58,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:25:58,299 INFO L82 PathProgramCache]: Analyzing trace with hash 6986775, now seen corresponding path program 1 times [2019-12-07 17:25:58,299 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:25:58,299 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592916036] [2019-12-07 17:25:58,299 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:25:58,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:25:58,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:25:58,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1592916036] [2019-12-07 17:25:58,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:25:58,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:25:58,337 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [298368331] [2019-12-07 17:25:58,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:25:58,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:25:58,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:25:58,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:25:58,337 INFO L87 Difference]: Start difference. First operand 59010 states and 189073 transitions. Second operand 5 states. [2019-12-07 17:25:58,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:25:58,790 INFO L93 Difference]: Finished difference Result 76872 states and 242856 transitions. [2019-12-07 17:25:58,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:25:58,791 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:25:58,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:25:58,902 INFO L225 Difference]: With dead ends: 76872 [2019-12-07 17:25:58,902 INFO L226 Difference]: Without dead ends: 76865 [2019-12-07 17:25:58,903 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:25:59,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76865 states. [2019-12-07 17:25:59,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76865 to 61470. [2019-12-07 17:25:59,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61470 states. [2019-12-07 17:26:00,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61470 states to 61470 states and 196271 transitions. [2019-12-07 17:26:00,513 INFO L78 Accepts]: Start accepts. Automaton has 61470 states and 196271 transitions. Word has length 22 [2019-12-07 17:26:00,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:00,513 INFO L462 AbstractCegarLoop]: Abstraction has 61470 states and 196271 transitions. [2019-12-07 17:26:00,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:26:00,513 INFO L276 IsEmpty]: Start isEmpty. Operand 61470 states and 196271 transitions. [2019-12-07 17:26:00,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:26:00,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:00,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:00,526 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:00,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:00,526 INFO L82 PathProgramCache]: Analyzing trace with hash 1947963172, now seen corresponding path program 1 times [2019-12-07 17:26:00,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:00,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233000652] [2019-12-07 17:26:00,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:00,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:00,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:00,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233000652] [2019-12-07 17:26:00,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:00,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:26:00,570 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897876401] [2019-12-07 17:26:00,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:26:00,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:00,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:26:00,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:26:00,571 INFO L87 Difference]: Start difference. First operand 61470 states and 196271 transitions. Second operand 6 states. [2019-12-07 17:26:01,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:01,347 INFO L93 Difference]: Finished difference Result 156935 states and 505797 transitions. [2019-12-07 17:26:01,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 17:26:01,347 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 17:26:01,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:01,601 INFO L225 Difference]: With dead ends: 156935 [2019-12-07 17:26:01,601 INFO L226 Difference]: Without dead ends: 156887 [2019-12-07 17:26:01,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:26:02,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156887 states. [2019-12-07 17:26:03,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156887 to 82753. [2019-12-07 17:26:03,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82753 states. [2019-12-07 17:26:03,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82753 states to 82753 states and 268231 transitions. [2019-12-07 17:26:03,612 INFO L78 Accepts]: Start accepts. Automaton has 82753 states and 268231 transitions. Word has length 27 [2019-12-07 17:26:03,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:03,612 INFO L462 AbstractCegarLoop]: Abstraction has 82753 states and 268231 transitions. [2019-12-07 17:26:03,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:26:03,612 INFO L276 IsEmpty]: Start isEmpty. Operand 82753 states and 268231 transitions. [2019-12-07 17:26:03,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:26:03,634 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:03,634 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:03,634 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:03,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:03,634 INFO L82 PathProgramCache]: Analyzing trace with hash -89566793, now seen corresponding path program 1 times [2019-12-07 17:26:03,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:03,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381720004] [2019-12-07 17:26:03,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:03,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:03,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:03,688 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1381720004] [2019-12-07 17:26:03,688 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:03,688 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:26:03,689 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053390351] [2019-12-07 17:26:03,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:26:03,689 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:03,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:26:03,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:26:03,690 INFO L87 Difference]: Start difference. First operand 82753 states and 268231 transitions. Second operand 6 states. [2019-12-07 17:26:04,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:04,535 INFO L93 Difference]: Finished difference Result 159937 states and 512511 transitions. [2019-12-07 17:26:04,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 17:26:04,535 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 17:26:04,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:04,790 INFO L225 Difference]: With dead ends: 159937 [2019-12-07 17:26:04,790 INFO L226 Difference]: Without dead ends: 159887 [2019-12-07 17:26:04,790 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:26:05,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159887 states. [2019-12-07 17:26:06,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159887 to 85118. [2019-12-07 17:26:06,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85118 states. [2019-12-07 17:26:06,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85118 states to 85118 states and 277292 transitions. [2019-12-07 17:26:06,818 INFO L78 Accepts]: Start accepts. Automaton has 85118 states and 277292 transitions. Word has length 28 [2019-12-07 17:26:06,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:06,818 INFO L462 AbstractCegarLoop]: Abstraction has 85118 states and 277292 transitions. [2019-12-07 17:26:06,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:26:06,818 INFO L276 IsEmpty]: Start isEmpty. Operand 85118 states and 277292 transitions. [2019-12-07 17:26:06,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:26:06,851 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:06,851 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:06,851 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:06,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:06,852 INFO L82 PathProgramCache]: Analyzing trace with hash -1971705495, now seen corresponding path program 1 times [2019-12-07 17:26:06,852 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:06,852 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434817612] [2019-12-07 17:26:06,852 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:06,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:06,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:06,884 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434817612] [2019-12-07 17:26:06,884 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:06,884 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:26:06,884 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [913731097] [2019-12-07 17:26:06,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:06,885 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:06,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:06,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:06,885 INFO L87 Difference]: Start difference. First operand 85118 states and 277292 transitions. Second operand 3 states. [2019-12-07 17:26:07,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:07,215 INFO L93 Difference]: Finished difference Result 116285 states and 379478 transitions. [2019-12-07 17:26:07,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:07,216 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 17:26:07,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:07,275 INFO L225 Difference]: With dead ends: 116285 [2019-12-07 17:26:07,275 INFO L226 Difference]: Without dead ends: 46188 [2019-12-07 17:26:07,276 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:07,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46188 states. [2019-12-07 17:26:08,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46188 to 43525. [2019-12-07 17:26:08,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43525 states. [2019-12-07 17:26:08,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43525 states to 43525 states and 139332 transitions. [2019-12-07 17:26:08,162 INFO L78 Accepts]: Start accepts. Automaton has 43525 states and 139332 transitions. Word has length 30 [2019-12-07 17:26:08,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:08,162 INFO L462 AbstractCegarLoop]: Abstraction has 43525 states and 139332 transitions. [2019-12-07 17:26:08,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:08,162 INFO L276 IsEmpty]: Start isEmpty. Operand 43525 states and 139332 transitions. [2019-12-07 17:26:08,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:26:08,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:08,176 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:08,176 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:08,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:08,176 INFO L82 PathProgramCache]: Analyzing trace with hash 1295583549, now seen corresponding path program 1 times [2019-12-07 17:26:08,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:08,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081853365] [2019-12-07 17:26:08,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:08,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:08,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:08,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081853365] [2019-12-07 17:26:08,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:08,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:26:08,201 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1372230352] [2019-12-07 17:26:08,201 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:26:08,201 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:08,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:26:08,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:26:08,202 INFO L87 Difference]: Start difference. First operand 43525 states and 139332 transitions. Second operand 4 states. [2019-12-07 17:26:08,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:08,270 INFO L93 Difference]: Finished difference Result 16689 states and 51142 transitions. [2019-12-07 17:26:08,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:26:08,271 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 17:26:08,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:08,292 INFO L225 Difference]: With dead ends: 16689 [2019-12-07 17:26:08,292 INFO L226 Difference]: Without dead ends: 16689 [2019-12-07 17:26:08,292 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:26:08,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16689 states. [2019-12-07 17:26:08,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16689 to 15950. [2019-12-07 17:26:08,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15950 states. [2019-12-07 17:26:08,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15950 states to 15950 states and 49335 transitions. [2019-12-07 17:26:08,520 INFO L78 Accepts]: Start accepts. Automaton has 15950 states and 49335 transitions. Word has length 31 [2019-12-07 17:26:08,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:08,520 INFO L462 AbstractCegarLoop]: Abstraction has 15950 states and 49335 transitions. [2019-12-07 17:26:08,520 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:26:08,520 INFO L276 IsEmpty]: Start isEmpty. Operand 15950 states and 49335 transitions. [2019-12-07 17:26:08,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:26:08,530 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:08,530 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:08,530 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:08,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:08,530 INFO L82 PathProgramCache]: Analyzing trace with hash -1720610055, now seen corresponding path program 1 times [2019-12-07 17:26:08,530 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:08,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020971860] [2019-12-07 17:26:08,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:08,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:08,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:08,579 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1020971860] [2019-12-07 17:26:08,579 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:08,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:26:08,580 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1453381572] [2019-12-07 17:26:08,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:26:08,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:08,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:26:08,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:26:08,580 INFO L87 Difference]: Start difference. First operand 15950 states and 49335 transitions. Second operand 7 states. [2019-12-07 17:26:09,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:09,348 INFO L93 Difference]: Finished difference Result 37527 states and 113416 transitions. [2019-12-07 17:26:09,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:26:09,348 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 17:26:09,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:09,391 INFO L225 Difference]: With dead ends: 37527 [2019-12-07 17:26:09,391 INFO L226 Difference]: Without dead ends: 37527 [2019-12-07 17:26:09,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:26:09,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37527 states. [2019-12-07 17:26:09,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37527 to 15988. [2019-12-07 17:26:09,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15988 states. [2019-12-07 17:26:09,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15988 states to 15988 states and 49453 transitions. [2019-12-07 17:26:09,766 INFO L78 Accepts]: Start accepts. Automaton has 15988 states and 49453 transitions. Word has length 33 [2019-12-07 17:26:09,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:09,766 INFO L462 AbstractCegarLoop]: Abstraction has 15988 states and 49453 transitions. [2019-12-07 17:26:09,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:26:09,766 INFO L276 IsEmpty]: Start isEmpty. Operand 15988 states and 49453 transitions. [2019-12-07 17:26:09,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:26:09,776 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:09,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:09,776 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:09,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:09,776 INFO L82 PathProgramCache]: Analyzing trace with hash -1518720007, now seen corresponding path program 2 times [2019-12-07 17:26:09,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:09,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [76305751] [2019-12-07 17:26:09,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:09,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:09,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:09,840 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [76305751] [2019-12-07 17:26:09,840 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:09,840 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:26:09,841 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [762396035] [2019-12-07 17:26:09,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:26:09,841 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:09,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:26:09,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:26:09,841 INFO L87 Difference]: Start difference. First operand 15988 states and 49453 transitions. Second operand 8 states. [2019-12-07 17:26:10,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:10,977 INFO L93 Difference]: Finished difference Result 59904 states and 176939 transitions. [2019-12-07 17:26:10,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 17:26:10,978 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 17:26:10,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:11,052 INFO L225 Difference]: With dead ends: 59904 [2019-12-07 17:26:11,052 INFO L226 Difference]: Without dead ends: 59904 [2019-12-07 17:26:11,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 226 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=224, Invalid=646, Unknown=0, NotChecked=0, Total=870 [2019-12-07 17:26:11,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59904 states. [2019-12-07 17:26:11,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59904 to 15767. [2019-12-07 17:26:11,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15767 states. [2019-12-07 17:26:11,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15767 states to 15767 states and 48838 transitions. [2019-12-07 17:26:11,613 INFO L78 Accepts]: Start accepts. Automaton has 15767 states and 48838 transitions. Word has length 33 [2019-12-07 17:26:11,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:11,613 INFO L462 AbstractCegarLoop]: Abstraction has 15767 states and 48838 transitions. [2019-12-07 17:26:11,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:26:11,613 INFO L276 IsEmpty]: Start isEmpty. Operand 15767 states and 48838 transitions. [2019-12-07 17:26:11,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:26:11,623 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:11,624 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:11,624 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:11,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:11,624 INFO L82 PathProgramCache]: Analyzing trace with hash -2146187134, now seen corresponding path program 1 times [2019-12-07 17:26:11,624 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:11,624 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1168943238] [2019-12-07 17:26:11,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:11,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:11,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:11,685 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1168943238] [2019-12-07 17:26:11,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:11,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:26:11,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1960707807] [2019-12-07 17:26:11,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:26:11,686 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:11,686 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:26:11,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:26:11,687 INFO L87 Difference]: Start difference. First operand 15767 states and 48838 transitions. Second operand 7 states. [2019-12-07 17:26:12,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:12,781 INFO L93 Difference]: Finished difference Result 33847 states and 101132 transitions. [2019-12-07 17:26:12,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:26:12,782 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 17:26:12,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:12,833 INFO L225 Difference]: With dead ends: 33847 [2019-12-07 17:26:12,833 INFO L226 Difference]: Without dead ends: 33847 [2019-12-07 17:26:12,834 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:26:12,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33847 states. [2019-12-07 17:26:13,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33847 to 15072. [2019-12-07 17:26:13,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15072 states. [2019-12-07 17:26:13,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15072 states to 15072 states and 46646 transitions. [2019-12-07 17:26:13,179 INFO L78 Accepts]: Start accepts. Automaton has 15072 states and 46646 transitions. Word has length 34 [2019-12-07 17:26:13,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:13,179 INFO L462 AbstractCegarLoop]: Abstraction has 15072 states and 46646 transitions. [2019-12-07 17:26:13,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:26:13,179 INFO L276 IsEmpty]: Start isEmpty. Operand 15072 states and 46646 transitions. [2019-12-07 17:26:13,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:26:13,189 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:13,190 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:13,190 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:13,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:13,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1401085166, now seen corresponding path program 2 times [2019-12-07 17:26:13,190 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:13,190 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892752307] [2019-12-07 17:26:13,190 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:13,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:13,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:13,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892752307] [2019-12-07 17:26:13,279 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:13,279 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:26:13,279 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885758032] [2019-12-07 17:26:13,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:26:13,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:13,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:26:13,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:26:13,280 INFO L87 Difference]: Start difference. First operand 15072 states and 46646 transitions. Second operand 8 states. [2019-12-07 17:26:14,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:14,421 INFO L93 Difference]: Finished difference Result 44342 states and 130206 transitions. [2019-12-07 17:26:14,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 17:26:14,421 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 17:26:14,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:14,472 INFO L225 Difference]: With dead ends: 44342 [2019-12-07 17:26:14,473 INFO L226 Difference]: Without dead ends: 44342 [2019-12-07 17:26:14,473 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 144 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=479, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:26:14,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44342 states. [2019-12-07 17:26:14,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44342 to 14760. [2019-12-07 17:26:14,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14760 states. [2019-12-07 17:26:14,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14760 states to 14760 states and 45710 transitions. [2019-12-07 17:26:14,876 INFO L78 Accepts]: Start accepts. Automaton has 14760 states and 45710 transitions. Word has length 34 [2019-12-07 17:26:14,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:14,876 INFO L462 AbstractCegarLoop]: Abstraction has 14760 states and 45710 transitions. [2019-12-07 17:26:14,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:26:14,876 INFO L276 IsEmpty]: Start isEmpty. Operand 14760 states and 45710 transitions. [2019-12-07 17:26:14,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:26:14,888 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:14,889 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:14,889 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:14,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:14,889 INFO L82 PathProgramCache]: Analyzing trace with hash 1993442610, now seen corresponding path program 1 times [2019-12-07 17:26:14,889 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:14,889 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485974978] [2019-12-07 17:26:14,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:14,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:14,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:14,929 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1485974978] [2019-12-07 17:26:14,929 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:14,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:26:14,929 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [406405822] [2019-12-07 17:26:14,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:26:14,929 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:14,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:26:14,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:26:14,930 INFO L87 Difference]: Start difference. First operand 14760 states and 45710 transitions. Second operand 5 states. [2019-12-07 17:26:15,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:15,298 INFO L93 Difference]: Finished difference Result 24635 states and 74753 transitions. [2019-12-07 17:26:15,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:26:15,299 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 17:26:15,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:15,329 INFO L225 Difference]: With dead ends: 24635 [2019-12-07 17:26:15,329 INFO L226 Difference]: Without dead ends: 24635 [2019-12-07 17:26:15,329 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:26:15,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24635 states. [2019-12-07 17:26:15,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24635 to 18226. [2019-12-07 17:26:15,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18226 states. [2019-12-07 17:26:15,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18226 states to 18226 states and 56082 transitions. [2019-12-07 17:26:15,680 INFO L78 Accepts]: Start accepts. Automaton has 18226 states and 56082 transitions. Word has length 41 [2019-12-07 17:26:15,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:15,680 INFO L462 AbstractCegarLoop]: Abstraction has 18226 states and 56082 transitions. [2019-12-07 17:26:15,680 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:26:15,680 INFO L276 IsEmpty]: Start isEmpty. Operand 18226 states and 56082 transitions. [2019-12-07 17:26:15,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:26:15,694 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:15,694 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:15,695 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:15,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:15,695 INFO L82 PathProgramCache]: Analyzing trace with hash -798917120, now seen corresponding path program 2 times [2019-12-07 17:26:15,695 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:15,695 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [177343637] [2019-12-07 17:26:15,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:15,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:15,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:15,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [177343637] [2019-12-07 17:26:15,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:15,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:26:15,723 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281938123] [2019-12-07 17:26:15,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:15,723 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:15,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:15,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:15,724 INFO L87 Difference]: Start difference. First operand 18226 states and 56082 transitions. Second operand 3 states. [2019-12-07 17:26:15,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:15,767 INFO L93 Difference]: Finished difference Result 13890 states and 42183 transitions. [2019-12-07 17:26:15,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:15,768 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 17:26:15,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:15,784 INFO L225 Difference]: With dead ends: 13890 [2019-12-07 17:26:15,785 INFO L226 Difference]: Without dead ends: 13890 [2019-12-07 17:26:15,785 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:15,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13890 states. [2019-12-07 17:26:15,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13890 to 13628. [2019-12-07 17:26:15,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13628 states. [2019-12-07 17:26:15,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13628 states to 13628 states and 41462 transitions. [2019-12-07 17:26:15,989 INFO L78 Accepts]: Start accepts. Automaton has 13628 states and 41462 transitions. Word has length 41 [2019-12-07 17:26:15,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:15,989 INFO L462 AbstractCegarLoop]: Abstraction has 13628 states and 41462 transitions. [2019-12-07 17:26:15,989 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:15,989 INFO L276 IsEmpty]: Start isEmpty. Operand 13628 states and 41462 transitions. [2019-12-07 17:26:16,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 17:26:16,000 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:16,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:16,001 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:16,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:16,001 INFO L82 PathProgramCache]: Analyzing trace with hash 2136621759, now seen corresponding path program 1 times [2019-12-07 17:26:16,001 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:16,001 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120684895] [2019-12-07 17:26:16,001 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:16,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:16,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:16,041 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120684895] [2019-12-07 17:26:16,041 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:16,041 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:26:16,041 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1437750697] [2019-12-07 17:26:16,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:26:16,041 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:16,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:26:16,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:26:16,042 INFO L87 Difference]: Start difference. First operand 13628 states and 41462 transitions. Second operand 5 states. [2019-12-07 17:26:16,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:16,084 INFO L93 Difference]: Finished difference Result 12448 states and 38823 transitions. [2019-12-07 17:26:16,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:26:16,084 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 17:26:16,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:16,097 INFO L225 Difference]: With dead ends: 12448 [2019-12-07 17:26:16,097 INFO L226 Difference]: Without dead ends: 10901 [2019-12-07 17:26:16,097 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:26:16,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10901 states. [2019-12-07 17:26:16,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10901 to 10901. [2019-12-07 17:26:16,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10901 states. [2019-12-07 17:26:16,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10901 states to 10901 states and 34940 transitions. [2019-12-07 17:26:16,260 INFO L78 Accepts]: Start accepts. Automaton has 10901 states and 34940 transitions. Word has length 42 [2019-12-07 17:26:16,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:16,260 INFO L462 AbstractCegarLoop]: Abstraction has 10901 states and 34940 transitions. [2019-12-07 17:26:16,260 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:26:16,260 INFO L276 IsEmpty]: Start isEmpty. Operand 10901 states and 34940 transitions. [2019-12-07 17:26:16,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:26:16,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:16,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:16,269 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:16,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:16,269 INFO L82 PathProgramCache]: Analyzing trace with hash 605202275, now seen corresponding path program 1 times [2019-12-07 17:26:16,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:16,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144855920] [2019-12-07 17:26:16,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:16,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:16,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:16,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144855920] [2019-12-07 17:26:16,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:16,306 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:26:16,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062773912] [2019-12-07 17:26:16,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:16,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:16,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:16,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:16,306 INFO L87 Difference]: Start difference. First operand 10901 states and 34940 transitions. Second operand 3 states. [2019-12-07 17:26:16,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:16,376 INFO L93 Difference]: Finished difference Result 13998 states and 44486 transitions. [2019-12-07 17:26:16,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:16,377 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:26:16,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:16,393 INFO L225 Difference]: With dead ends: 13998 [2019-12-07 17:26:16,393 INFO L226 Difference]: Without dead ends: 13998 [2019-12-07 17:26:16,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:16,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13998 states. [2019-12-07 17:26:16,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13998 to 9656. [2019-12-07 17:26:16,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9656 states. [2019-12-07 17:26:16,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9656 states to 9656 states and 30737 transitions. [2019-12-07 17:26:16,566 INFO L78 Accepts]: Start accepts. Automaton has 9656 states and 30737 transitions. Word has length 66 [2019-12-07 17:26:16,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:16,566 INFO L462 AbstractCegarLoop]: Abstraction has 9656 states and 30737 transitions. [2019-12-07 17:26:16,566 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:16,566 INFO L276 IsEmpty]: Start isEmpty. Operand 9656 states and 30737 transitions. [2019-12-07 17:26:16,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:26:16,574 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:16,574 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:16,574 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:16,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:16,575 INFO L82 PathProgramCache]: Analyzing trace with hash -574262541, now seen corresponding path program 1 times [2019-12-07 17:26:16,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:16,575 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141160711] [2019-12-07 17:26:16,575 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:16,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:16,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:16,697 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141160711] [2019-12-07 17:26:16,697 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:16,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:26:16,697 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641348109] [2019-12-07 17:26:16,698 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:26:16,698 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:16,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:26:16,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:26:16,698 INFO L87 Difference]: Start difference. First operand 9656 states and 30737 transitions. Second operand 9 states. [2019-12-07 17:26:18,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:18,232 INFO L93 Difference]: Finished difference Result 84152 states and 262136 transitions. [2019-12-07 17:26:18,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 17:26:18,232 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 17:26:18,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:18,315 INFO L225 Difference]: With dead ends: 84152 [2019-12-07 17:26:18,315 INFO L226 Difference]: Without dead ends: 64512 [2019-12-07 17:26:18,316 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 815 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=564, Invalid=1886, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 17:26:18,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64512 states. [2019-12-07 17:26:18,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64512 to 14591. [2019-12-07 17:26:18,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14591 states. [2019-12-07 17:26:18,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14591 states to 14591 states and 46583 transitions. [2019-12-07 17:26:18,981 INFO L78 Accepts]: Start accepts. Automaton has 14591 states and 46583 transitions. Word has length 67 [2019-12-07 17:26:18,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:18,981 INFO L462 AbstractCegarLoop]: Abstraction has 14591 states and 46583 transitions. [2019-12-07 17:26:18,981 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:26:18,981 INFO L276 IsEmpty]: Start isEmpty. Operand 14591 states and 46583 transitions. [2019-12-07 17:26:18,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:26:18,993 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:18,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:18,993 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:18,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:18,994 INFO L82 PathProgramCache]: Analyzing trace with hash 603749179, now seen corresponding path program 1 times [2019-12-07 17:26:18,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:18,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374018281] [2019-12-07 17:26:18,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:19,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:19,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:19,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374018281] [2019-12-07 17:26:19,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:19,055 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:26:19,055 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946375451] [2019-12-07 17:26:19,055 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:26:19,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:19,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:26:19,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:26:19,056 INFO L87 Difference]: Start difference. First operand 14591 states and 46583 transitions. Second operand 7 states. [2019-12-07 17:26:20,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:20,022 INFO L93 Difference]: Finished difference Result 40685 states and 125872 transitions. [2019-12-07 17:26:20,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:26:20,022 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 17:26:20,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:20,068 INFO L225 Difference]: With dead ends: 40685 [2019-12-07 17:26:20,068 INFO L226 Difference]: Without dead ends: 40685 [2019-12-07 17:26:20,068 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=93, Invalid=249, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:26:20,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40685 states. [2019-12-07 17:26:20,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40685 to 20447. [2019-12-07 17:26:20,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20447 states. [2019-12-07 17:26:20,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20447 states to 20447 states and 64557 transitions. [2019-12-07 17:26:20,533 INFO L78 Accepts]: Start accepts. Automaton has 20447 states and 64557 transitions. Word has length 67 [2019-12-07 17:26:20,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:20,534 INFO L462 AbstractCegarLoop]: Abstraction has 20447 states and 64557 transitions. [2019-12-07 17:26:20,534 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:26:20,534 INFO L276 IsEmpty]: Start isEmpty. Operand 20447 states and 64557 transitions. [2019-12-07 17:26:20,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:26:20,552 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:20,552 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:20,552 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:20,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:20,552 INFO L82 PathProgramCache]: Analyzing trace with hash 795565329, now seen corresponding path program 2 times [2019-12-07 17:26:20,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:20,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1455579086] [2019-12-07 17:26:20,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:20,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:20,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:20,588 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1455579086] [2019-12-07 17:26:20,588 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:20,588 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:26:20,588 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613638601] [2019-12-07 17:26:20,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:26:20,589 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:20,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:26:20,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:26:20,589 INFO L87 Difference]: Start difference. First operand 20447 states and 64557 transitions. Second operand 4 states. [2019-12-07 17:26:20,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:20,685 INFO L93 Difference]: Finished difference Result 24237 states and 76200 transitions. [2019-12-07 17:26:20,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:26:20,685 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 17:26:20,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:20,712 INFO L225 Difference]: With dead ends: 24237 [2019-12-07 17:26:20,712 INFO L226 Difference]: Without dead ends: 24237 [2019-12-07 17:26:20,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:26:20,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24237 states. [2019-12-07 17:26:21,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24237 to 18755. [2019-12-07 17:26:21,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18755 states. [2019-12-07 17:26:21,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18755 states to 18755 states and 59327 transitions. [2019-12-07 17:26:21,037 INFO L78 Accepts]: Start accepts. Automaton has 18755 states and 59327 transitions. Word has length 67 [2019-12-07 17:26:21,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:21,038 INFO L462 AbstractCegarLoop]: Abstraction has 18755 states and 59327 transitions. [2019-12-07 17:26:21,038 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:26:21,038 INFO L276 IsEmpty]: Start isEmpty. Operand 18755 states and 59327 transitions. [2019-12-07 17:26:21,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:26:21,054 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:21,054 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:21,054 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:21,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:21,054 INFO L82 PathProgramCache]: Analyzing trace with hash 370283376, now seen corresponding path program 1 times [2019-12-07 17:26:21,055 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:21,055 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [628206570] [2019-12-07 17:26:21,055 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:21,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:21,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:21,078 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [628206570] [2019-12-07 17:26:21,078 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:21,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:26:21,079 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243661933] [2019-12-07 17:26:21,079 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:26:21,079 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:21,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:26:21,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:21,079 INFO L87 Difference]: Start difference. First operand 18755 states and 59327 transitions. Second operand 3 states. [2019-12-07 17:26:21,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:21,146 INFO L93 Difference]: Finished difference Result 22002 states and 68099 transitions. [2019-12-07 17:26:21,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:26:21,146 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 17:26:21,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:21,170 INFO L225 Difference]: With dead ends: 22002 [2019-12-07 17:26:21,170 INFO L226 Difference]: Without dead ends: 21492 [2019-12-07 17:26:21,171 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:26:21,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21492 states. [2019-12-07 17:26:21,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21492 to 17325. [2019-12-07 17:26:21,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17325 states. [2019-12-07 17:26:21,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17325 states to 17325 states and 54391 transitions. [2019-12-07 17:26:21,454 INFO L78 Accepts]: Start accepts. Automaton has 17325 states and 54391 transitions. Word has length 67 [2019-12-07 17:26:21,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:21,454 INFO L462 AbstractCegarLoop]: Abstraction has 17325 states and 54391 transitions. [2019-12-07 17:26:21,454 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:26:21,455 INFO L276 IsEmpty]: Start isEmpty. Operand 17325 states and 54391 transitions. [2019-12-07 17:26:21,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:26:21,470 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:21,470 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:21,470 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:21,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:21,470 INFO L82 PathProgramCache]: Analyzing trace with hash 516538099, now seen corresponding path program 2 times [2019-12-07 17:26:21,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:21,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546074144] [2019-12-07 17:26:21,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:21,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:26:21,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:26:21,561 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546074144] [2019-12-07 17:26:21,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:26:21,561 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:26:21,561 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2023072054] [2019-12-07 17:26:21,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:26:21,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:26:21,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:26:21,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:26:21,562 INFO L87 Difference]: Start difference. First operand 17325 states and 54391 transitions. Second operand 9 states. [2019-12-07 17:26:23,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:26:23,833 INFO L93 Difference]: Finished difference Result 101938 states and 310588 transitions. [2019-12-07 17:26:23,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 17:26:23,833 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 17:26:23,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:26:23,931 INFO L225 Difference]: With dead ends: 101938 [2019-12-07 17:26:23,931 INFO L226 Difference]: Without dead ends: 77576 [2019-12-07 17:26:23,932 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 763 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=532, Invalid=1820, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 17:26:24,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77576 states. [2019-12-07 17:26:24,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77576 to 19054. [2019-12-07 17:26:24,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19054 states. [2019-12-07 17:26:24,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19054 states to 19054 states and 59867 transitions. [2019-12-07 17:26:24,633 INFO L78 Accepts]: Start accepts. Automaton has 19054 states and 59867 transitions. Word has length 67 [2019-12-07 17:26:24,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:26:24,633 INFO L462 AbstractCegarLoop]: Abstraction has 19054 states and 59867 transitions. [2019-12-07 17:26:24,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:26:24,633 INFO L276 IsEmpty]: Start isEmpty. Operand 19054 states and 59867 transitions. [2019-12-07 17:26:24,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:26:24,651 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:26:24,651 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:26:24,651 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:26:24,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:26:24,652 INFO L82 PathProgramCache]: Analyzing trace with hash 763340387, now seen corresponding path program 3 times [2019-12-07 17:26:24,652 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:26:24,652 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943691776] [2019-12-07 17:26:24,652 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:26:24,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:26:24,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:26:24,737 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:26:24,738 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:26:24,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= v_~__unbuffered_p1_EBX~0_48 0) (= v_~main$tmp_guard0~0_30 0) (= 0 v_~z$r_buff0_thd3~0_367) (= v_~z$r_buff0_thd0~0_147 0) (= v_~z$w_buff0_used~0_850 0) (= v_~z$w_buff0~0_393 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= 0 v_~z$r_buff1_thd3~0_322) (= v_~weak$$choice2~0_147 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t165~0.base_27|) (= v_~z$read_delayed~0_6 0) (= v_~z$r_buff1_thd1~0_158 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t165~0.base_27| 4)) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_168 0) (= v_~z$w_buff1_used~0_568 0) (= v_~main$tmp_guard1~0_41 0) (= |v_ULTIMATE.start_main_~#t165~0.offset_17| 0) (= 0 v_~__unbuffered_p2_EAX~0_41) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_26) (= v_~__unbuffered_p2_EBX~0_49 0) (= 0 v_~__unbuffered_p1_EAX~0_47) (= v_~z$r_buff0_thd1~0_210 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t165~0.base_27| 1)) (= 0 v_~x~0_154) (= v_~z$r_buff0_thd2~0_129 0) (= 0 v_~__unbuffered_cnt~0_88) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t165~0.base_27| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t165~0.base_27|) |v_ULTIMATE.start_main_~#t165~0.offset_17| 0)) |v_#memory_int_19|) (= v_~z~0_181 0) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t165~0.base_27|)) (= v_~y~0_31 0) (= v_~z$r_buff1_thd0~0_191 0) (= v_~z$w_buff1~0_253 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_168, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_61|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_191|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_147, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_41, ULTIMATE.start_main_~#t167~0.offset=|v_ULTIMATE.start_main_~#t167~0.offset_17|, ULTIMATE.start_main_~#t166~0.offset=|v_ULTIMATE.start_main_~#t166~0.offset_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_49, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_568, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ULTIMATE.start_main_~#t165~0.base=|v_ULTIMATE.start_main_~#t165~0.base_27|, ~weak$$choice0~0=v_~weak$$choice0~0_13, ULTIMATE.start_main_~#t165~0.offset=|v_ULTIMATE.start_main_~#t165~0.offset_17|, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t166~0.base=|v_ULTIMATE.start_main_~#t166~0.base_22|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_158, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_367, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~x~0=v_~x~0_154, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_253, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_41, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_39|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_191, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_129, ULTIMATE.start_main_~#t167~0.base=|v_ULTIMATE.start_main_~#t167~0.base_23|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_48, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_850, ~z$w_buff0~0=v_~z$w_buff0~0_393, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_322, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_181, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_210} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t167~0.offset, ULTIMATE.start_main_~#t166~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t165~0.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t165~0.offset, ULTIMATE.start_main_~#t166~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t167~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:26:24,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L830-1-->L832: Formula: (and (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t166~0.base_11| 4)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t166~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t166~0.base_11|) |v_ULTIMATE.start_main_~#t166~0.offset_9| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t166~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t166~0.base_11|) (= |v_ULTIMATE.start_main_~#t166~0.offset_9| 0) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t166~0.base_11| 1)) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t166~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t166~0.offset=|v_ULTIMATE.start_main_~#t166~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t166~0.base=|v_ULTIMATE.start_main_~#t166~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t166~0.offset, ULTIMATE.start_main_~#t166~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:26:24,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->L748: Formula: (and (= v_~z$r_buff0_thd0~0_17 v_~z$r_buff1_thd0~0_13) (= 1 v_~x~0_6) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4)) (= v_~z$r_buff0_thd1~0_21 1) (= v_~z$r_buff0_thd3~0_47 v_~z$r_buff1_thd3~0_31) (= v_~z$r_buff0_thd1~0_22 v_~z$r_buff1_thd1~0_11) (= v_~z$r_buff0_thd2~0_15 v_~z$r_buff1_thd2~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_47, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_22, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_15} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_17, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_31, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_13, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_11, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_11, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_47, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_21, ~x~0=v_~x~0_6, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_15} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:26:24,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L771-2-->L771-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-121895724 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-121895724 256)))) (or (and (= ~z~0_In-121895724 |P1Thread1of1ForFork2_#t~ite9_Out-121895724|) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-121895724| ~z$w_buff1~0_In-121895724) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-121895724, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-121895724, ~z$w_buff1~0=~z$w_buff1~0_In-121895724, ~z~0=~z~0_In-121895724} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-121895724|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-121895724, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-121895724, ~z$w_buff1~0=~z$w_buff1~0_In-121895724, ~z~0=~z~0_In-121895724} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 17:26:24,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L771-4-->L772: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~z~0_27) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_15|, ~z~0=v_~z~0_27} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 17:26:24,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L772-->L772-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1307443379 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1307443379 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1307443379|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-1307443379 |P1Thread1of1ForFork2_#t~ite11_Out-1307443379|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307443379, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1307443379} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307443379, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1307443379|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1307443379} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:26:24,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L773-->L773-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-548638995 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-548638995 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-548638995 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-548638995 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-548638995 |P1Thread1of1ForFork2_#t~ite12_Out-548638995|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-548638995| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-548638995, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-548638995, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-548638995, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-548638995} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-548638995, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-548638995, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-548638995, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-548638995|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-548638995} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:26:24,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L832-1-->L834: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t167~0.base_9|) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t167~0.base_9| 1) |v_#valid_27|) (= |v_ULTIMATE.start_main_~#t167~0.offset_8| 0) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t167~0.base_9|)) (not (= 0 |v_ULTIMATE.start_main_~#t167~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t167~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t167~0.base_9|) |v_ULTIMATE.start_main_~#t167~0.offset_8| 2))) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t167~0.base_9| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t167~0.offset=|v_ULTIMATE.start_main_~#t167~0.offset_8|, ULTIMATE.start_main_~#t167~0.base=|v_ULTIMATE.start_main_~#t167~0.base_9|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t167~0.offset, ULTIMATE.start_main_~#t167~0.base] because there is no mapped edge [2019-12-07 17:26:24,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In114640151 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out114640151| ~z$w_buff0~0_In114640151) (= |P2Thread1of1ForFork0_#t~ite20_In114640151| |P2Thread1of1ForFork0_#t~ite20_Out114640151|)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In114640151 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In114640151 256)) (and (= 0 (mod ~z$r_buff1_thd3~0_In114640151 256)) .cse1) (and (= (mod ~z$w_buff1_used~0_In114640151 256) 0) .cse1))) .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out114640151| |P2Thread1of1ForFork0_#t~ite20_Out114640151|) (= |P2Thread1of1ForFork0_#t~ite20_Out114640151| ~z$w_buff0~0_In114640151)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In114640151, ~z$w_buff0_used~0=~z$w_buff0_used~0_In114640151, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In114640151, ~z$w_buff1_used~0=~z$w_buff1_used~0_In114640151, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In114640151, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In114640151|, ~weak$$choice2~0=~weak$$choice2~0_In114640151} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out114640151|, ~z$w_buff0~0=~z$w_buff0~0_In114640151, ~z$w_buff0_used~0=~z$w_buff0_used~0_In114640151, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In114640151, ~z$w_buff1_used~0=~z$w_buff1_used~0_In114640151, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In114640151, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out114640151|, ~weak$$choice2~0=~weak$$choice2~0_In114640151} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 17:26:24,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1687069109 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1687069109 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-1687069109 |P1Thread1of1ForFork2_#t~ite13_Out-1687069109|)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-1687069109| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1687069109, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1687069109} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1687069109, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1687069109|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1687069109} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:26:24,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L775-->L775-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In1921792433 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1921792433 256))) (.cse2 (= (mod ~z$r_buff0_thd2~0_In1921792433 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1921792433 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd2~0_In1921792433 |P1Thread1of1ForFork2_#t~ite14_Out1921792433|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1921792433|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1921792433, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1921792433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1921792433, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1921792433} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1921792433, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1921792433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1921792433, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1921792433|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1921792433} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:26:24,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L775-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_30| v_~z$r_buff1_thd2~0_56) (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_30|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_29|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:26:24,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2136860042 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In-2136860042| |P2Thread1of1ForFork0_#t~ite23_Out-2136860042|) (not .cse0) (= ~z$w_buff1~0_In-2136860042 |P2Thread1of1ForFork0_#t~ite24_Out-2136860042|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2136860042 256)))) (or (and (= 0 (mod ~z$w_buff1_used~0_In-2136860042 256)) .cse1) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-2136860042 256) 0)) (= (mod ~z$w_buff0_used~0_In-2136860042 256) 0))) .cse0 (= ~z$w_buff1~0_In-2136860042 |P2Thread1of1ForFork0_#t~ite23_Out-2136860042|) (= |P2Thread1of1ForFork0_#t~ite24_Out-2136860042| |P2Thread1of1ForFork0_#t~ite23_Out-2136860042|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2136860042, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2136860042, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-2136860042|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2136860042, ~z$w_buff1~0=~z$w_buff1~0_In-2136860042, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2136860042, ~weak$$choice2~0=~weak$$choice2~0_In-2136860042} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2136860042, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-2136860042|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2136860042, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-2136860042|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2136860042, ~z$w_buff1~0=~z$w_buff1~0_In-2136860042, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2136860042, ~weak$$choice2~0=~weak$$choice2~0_In-2136860042} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 17:26:24,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1868870228 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out1868870228| ~z$w_buff0_used~0_In1868870228) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In1868870228| |P2Thread1of1ForFork0_#t~ite26_Out1868870228|)) (and (= |P2Thread1of1ForFork0_#t~ite26_Out1868870228| |P2Thread1of1ForFork0_#t~ite27_Out1868870228|) (= |P2Thread1of1ForFork0_#t~ite26_Out1868870228| ~z$w_buff0_used~0_In1868870228) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1868870228 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd3~0_In1868870228 256)) .cse1) (and (= (mod ~z$w_buff1_used~0_In1868870228 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1868870228 256) 0))) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1868870228|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1868870228, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1868870228, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1868870228, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1868870228, ~weak$$choice2~0=~weak$$choice2~0_In1868870228} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1868870228|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1868870228|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1868870228, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1868870228, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1868870228, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1868870228, ~weak$$choice2~0=~weak$$choice2~0_In1868870228} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:26:24,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff0_thd3~0_66)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_66, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:26:24,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L803-->L807: Formula: (and (= 0 v_~z$flush_delayed~0_11) (= v_~z~0_50 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:26:24,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1405999605 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1405999605 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1405999605 |P0Thread1of1ForFork1_#t~ite5_Out-1405999605|)) (and (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-1405999605|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1405999605, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1405999605} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1405999605|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1405999605, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1405999605} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:26:24,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L807-2-->L807-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1749654929 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1749654929 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1749654929| ~z~0_In-1749654929)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1749654929| ~z$w_buff1~0_In-1749654929) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1749654929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1749654929, ~z$w_buff1~0=~z$w_buff1~0_In-1749654929, ~z~0=~z~0_In-1749654929} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1749654929|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1749654929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1749654929, ~z$w_buff1~0=~z$w_buff1~0_In-1749654929, ~z~0=~z~0_In-1749654929} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:26:24,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In39316293 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In39316293 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In39316293 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In39316293 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out39316293|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~z$w_buff1_used~0_In39316293 |P0Thread1of1ForFork1_#t~ite6_Out39316293|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In39316293, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In39316293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In39316293, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In39316293} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In39316293, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out39316293|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In39316293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In39316293, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In39316293} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:26:24,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L751-->L752: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-2139516670 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2139516670 256))) (.cse0 (= ~z$r_buff0_thd1~0_In-2139516670 ~z$r_buff0_thd1~0_Out-2139516670))) (or (and .cse0 .cse1) (and (= ~z$r_buff0_thd1~0_Out-2139516670 0) (not .cse1) (not .cse2)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2139516670, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2139516670} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2139516670, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-2139516670|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-2139516670} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:26:24,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L752-->L752-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-866595954 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-866595954 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In-866595954 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-866595954 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out-866595954| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out-866595954| ~z$r_buff1_thd1~0_In-866595954) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-866595954, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-866595954, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-866595954, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-866595954} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-866595954|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-866595954, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-866595954, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-866595954, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-866595954} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:26:24,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_30|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_29|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:26:24,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L807-4-->L808: Formula: (= v_~z~0_20 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 17:26:24,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1287159371 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1287159371 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1287159371| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1287159371| ~z$w_buff0_used~0_In-1287159371) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1287159371, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1287159371} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1287159371, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1287159371|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1287159371} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:26:24,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L809-->L809-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In154087906 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In154087906 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In154087906 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In154087906 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out154087906| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite41_Out154087906| ~z$w_buff1_used~0_In154087906)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In154087906, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In154087906, ~z$w_buff1_used~0=~z$w_buff1_used~0_In154087906, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In154087906} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In154087906, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In154087906, ~z$w_buff1_used~0=~z$w_buff1_used~0_In154087906, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In154087906, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out154087906|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:26:24,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1303960835 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1303960835 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1303960835| ~z$r_buff0_thd3~0_In1303960835) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1303960835| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1303960835, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1303960835} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1303960835, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1303960835, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1303960835|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:26:24,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1370026616 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1370026616 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-1370026616 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-1370026616 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1370026616 |P2Thread1of1ForFork0_#t~ite43_Out-1370026616|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1370026616|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1370026616, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1370026616, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1370026616, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1370026616} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1370026616|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1370026616, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1370026616, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1370026616, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1370026616} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:26:24,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= v_~z$r_buff1_thd3~0_121 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_121, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:26:24,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L834-1-->L840: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:26:24,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L840-2-->L840-5: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In-1973288007 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1973288007 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-1973288007| |ULTIMATE.start_main_#t~ite47_Out-1973288007|))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out-1973288007| ~z$w_buff1~0_In-1973288007)) (and (= |ULTIMATE.start_main_#t~ite47_Out-1973288007| ~z~0_In-1973288007) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1973288007, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1973288007, ~z$w_buff1~0=~z$w_buff1~0_In-1973288007, ~z~0=~z~0_In-1973288007} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1973288007, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1973288007|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1973288007, ~z$w_buff1~0=~z$w_buff1~0_In-1973288007, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1973288007|, ~z~0=~z~0_In-1973288007} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:26:24,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-2145004758 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-2145004758 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-2145004758| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-2145004758 |ULTIMATE.start_main_#t~ite49_Out-2145004758|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2145004758, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2145004758} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2145004758, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2145004758, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2145004758|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:26:24,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L842-->L842-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1008716173 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In1008716173 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1008716173 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1008716173 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out1008716173|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1008716173 |ULTIMATE.start_main_#t~ite50_Out1008716173|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1008716173, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1008716173, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1008716173, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1008716173} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1008716173|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1008716173, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1008716173, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1008716173, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1008716173} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:26:24,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In152115573 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In152115573 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In152115573 |ULTIMATE.start_main_#t~ite51_Out152115573|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out152115573|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In152115573, ~z$w_buff0_used~0=~z$w_buff0_used~0_In152115573} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In152115573, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out152115573|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In152115573} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:26:24,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In1869762293 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1869762293 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1869762293 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1869762293 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1869762293|)) (and (= ~z$r_buff1_thd0~0_In1869762293 |ULTIMATE.start_main_#t~ite52_Out1869762293|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1869762293, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1869762293, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1869762293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1869762293} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1869762293|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1869762293, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1869762293, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1869762293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1869762293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:26:24,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [886] [886] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (= (ite (not (and (= 2 v_~__unbuffered_p1_EAX~0_22) (= v_~x~0_65 2) (= v_~__unbuffered_p2_EBX~0_27 0) (= v_~__unbuffered_p1_EBX~0_23 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_18 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_101 |v_ULTIMATE.start_main_#t~ite52_39|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_23, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_27, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_65} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_23, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_27, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_101, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_65, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:26:24,819 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:26:24 BasicIcfg [2019-12-07 17:26:24,819 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:26:24,820 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:26:24,820 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:26:24,820 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:26:24,820 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:23:29" (3/4) ... [2019-12-07 17:26:24,822 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:26:24,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= v_~__unbuffered_p1_EBX~0_48 0) (= v_~main$tmp_guard0~0_30 0) (= 0 v_~z$r_buff0_thd3~0_367) (= v_~z$r_buff0_thd0~0_147 0) (= v_~z$w_buff0_used~0_850 0) (= v_~z$w_buff0~0_393 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= 0 v_~z$r_buff1_thd3~0_322) (= v_~weak$$choice2~0_147 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t165~0.base_27|) (= v_~z$read_delayed~0_6 0) (= v_~z$r_buff1_thd1~0_158 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t165~0.base_27| 4)) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_168 0) (= v_~z$w_buff1_used~0_568 0) (= v_~main$tmp_guard1~0_41 0) (= |v_ULTIMATE.start_main_~#t165~0.offset_17| 0) (= 0 v_~__unbuffered_p2_EAX~0_41) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_26) (= v_~__unbuffered_p2_EBX~0_49 0) (= 0 v_~__unbuffered_p1_EAX~0_47) (= v_~z$r_buff0_thd1~0_210 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t165~0.base_27| 1)) (= 0 v_~x~0_154) (= v_~z$r_buff0_thd2~0_129 0) (= 0 v_~__unbuffered_cnt~0_88) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t165~0.base_27| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t165~0.base_27|) |v_ULTIMATE.start_main_~#t165~0.offset_17| 0)) |v_#memory_int_19|) (= v_~z~0_181 0) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t165~0.base_27|)) (= v_~y~0_31 0) (= v_~z$r_buff1_thd0~0_191 0) (= v_~z$w_buff1~0_253 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_168, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_61|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_191|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_147, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_41, ULTIMATE.start_main_~#t167~0.offset=|v_ULTIMATE.start_main_~#t167~0.offset_17|, ULTIMATE.start_main_~#t166~0.offset=|v_ULTIMATE.start_main_~#t166~0.offset_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_49, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_568, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ULTIMATE.start_main_~#t165~0.base=|v_ULTIMATE.start_main_~#t165~0.base_27|, ~weak$$choice0~0=v_~weak$$choice0~0_13, ULTIMATE.start_main_~#t165~0.offset=|v_ULTIMATE.start_main_~#t165~0.offset_17|, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t166~0.base=|v_ULTIMATE.start_main_~#t166~0.base_22|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_158, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_367, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~x~0=v_~x~0_154, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_253, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_41, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_39|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_191, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_129, ULTIMATE.start_main_~#t167~0.base=|v_ULTIMATE.start_main_~#t167~0.base_23|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_48, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_850, ~z$w_buff0~0=v_~z$w_buff0~0_393, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_322, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_181, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_210} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t167~0.offset, ULTIMATE.start_main_~#t166~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t165~0.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t165~0.offset, ULTIMATE.start_main_~#t166~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t167~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:26:24,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L830-1-->L832: Formula: (and (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t166~0.base_11| 4)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t166~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t166~0.base_11|) |v_ULTIMATE.start_main_~#t166~0.offset_9| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t166~0.base_11|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t166~0.base_11|) (= |v_ULTIMATE.start_main_~#t166~0.offset_9| 0) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t166~0.base_11| 1)) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t166~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t166~0.offset=|v_ULTIMATE.start_main_~#t166~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t166~0.base=|v_ULTIMATE.start_main_~#t166~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t166~0.offset, ULTIMATE.start_main_~#t166~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:26:24,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->L748: Formula: (and (= v_~z$r_buff0_thd0~0_17 v_~z$r_buff1_thd0~0_13) (= 1 v_~x~0_6) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4)) (= v_~z$r_buff0_thd1~0_21 1) (= v_~z$r_buff0_thd3~0_47 v_~z$r_buff1_thd3~0_31) (= v_~z$r_buff0_thd1~0_22 v_~z$r_buff1_thd1~0_11) (= v_~z$r_buff0_thd2~0_15 v_~z$r_buff1_thd2~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_47, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_22, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_15} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_17, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_31, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_13, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_11, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_11, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_47, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_4, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_21, ~x~0=v_~x~0_6, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_15} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 17:26:24,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L771-2-->L771-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-121895724 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-121895724 256)))) (or (and (= ~z~0_In-121895724 |P1Thread1of1ForFork2_#t~ite9_Out-121895724|) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-121895724| ~z$w_buff1~0_In-121895724) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-121895724, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-121895724, ~z$w_buff1~0=~z$w_buff1~0_In-121895724, ~z~0=~z~0_In-121895724} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-121895724|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-121895724, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-121895724, ~z$w_buff1~0=~z$w_buff1~0_In-121895724, ~z~0=~z~0_In-121895724} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 17:26:24,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L771-4-->L772: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~z~0_27) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_15|, ~z~0=v_~z~0_27} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 17:26:24,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L772-->L772-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1307443379 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1307443379 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1307443379|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-1307443379 |P1Thread1of1ForFork2_#t~ite11_Out-1307443379|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307443379, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1307443379} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307443379, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1307443379|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1307443379} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:26:24,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L773-->L773-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-548638995 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-548638995 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-548638995 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-548638995 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-548638995 |P1Thread1of1ForFork2_#t~ite12_Out-548638995|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-548638995| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-548638995, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-548638995, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-548638995, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-548638995} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-548638995, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-548638995, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-548638995, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-548638995|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-548638995} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:26:24,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L832-1-->L834: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t167~0.base_9|) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t167~0.base_9| 1) |v_#valid_27|) (= |v_ULTIMATE.start_main_~#t167~0.offset_8| 0) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t167~0.base_9|)) (not (= 0 |v_ULTIMATE.start_main_~#t167~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t167~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t167~0.base_9|) |v_ULTIMATE.start_main_~#t167~0.offset_8| 2))) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t167~0.base_9| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t167~0.offset=|v_ULTIMATE.start_main_~#t167~0.offset_8|, ULTIMATE.start_main_~#t167~0.base=|v_ULTIMATE.start_main_~#t167~0.base_9|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t167~0.offset, ULTIMATE.start_main_~#t167~0.base] because there is no mapped edge [2019-12-07 17:26:24,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In114640151 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out114640151| ~z$w_buff0~0_In114640151) (= |P2Thread1of1ForFork0_#t~ite20_In114640151| |P2Thread1of1ForFork0_#t~ite20_Out114640151|)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In114640151 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In114640151 256)) (and (= 0 (mod ~z$r_buff1_thd3~0_In114640151 256)) .cse1) (and (= (mod ~z$w_buff1_used~0_In114640151 256) 0) .cse1))) .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out114640151| |P2Thread1of1ForFork0_#t~ite20_Out114640151|) (= |P2Thread1of1ForFork0_#t~ite20_Out114640151| ~z$w_buff0~0_In114640151)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In114640151, ~z$w_buff0_used~0=~z$w_buff0_used~0_In114640151, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In114640151, ~z$w_buff1_used~0=~z$w_buff1_used~0_In114640151, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In114640151, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In114640151|, ~weak$$choice2~0=~weak$$choice2~0_In114640151} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out114640151|, ~z$w_buff0~0=~z$w_buff0~0_In114640151, ~z$w_buff0_used~0=~z$w_buff0_used~0_In114640151, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In114640151, ~z$w_buff1_used~0=~z$w_buff1_used~0_In114640151, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In114640151, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out114640151|, ~weak$$choice2~0=~weak$$choice2~0_In114640151} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 17:26:24,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1687069109 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1687069109 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-1687069109 |P1Thread1of1ForFork2_#t~ite13_Out-1687069109|)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-1687069109| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1687069109, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1687069109} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1687069109, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1687069109|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1687069109} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:26:24,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L775-->L775-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In1921792433 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1921792433 256))) (.cse2 (= (mod ~z$r_buff0_thd2~0_In1921792433 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1921792433 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd2~0_In1921792433 |P1Thread1of1ForFork2_#t~ite14_Out1921792433|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1921792433|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1921792433, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1921792433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1921792433, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1921792433} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1921792433, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1921792433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1921792433, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1921792433|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1921792433} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:26:24,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L775-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_30| v_~z$r_buff1_thd2~0_56) (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_30|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_29|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:26:24,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2136860042 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In-2136860042| |P2Thread1of1ForFork0_#t~ite23_Out-2136860042|) (not .cse0) (= ~z$w_buff1~0_In-2136860042 |P2Thread1of1ForFork0_#t~ite24_Out-2136860042|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2136860042 256)))) (or (and (= 0 (mod ~z$w_buff1_used~0_In-2136860042 256)) .cse1) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In-2136860042 256) 0)) (= (mod ~z$w_buff0_used~0_In-2136860042 256) 0))) .cse0 (= ~z$w_buff1~0_In-2136860042 |P2Thread1of1ForFork0_#t~ite23_Out-2136860042|) (= |P2Thread1of1ForFork0_#t~ite24_Out-2136860042| |P2Thread1of1ForFork0_#t~ite23_Out-2136860042|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2136860042, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2136860042, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-2136860042|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2136860042, ~z$w_buff1~0=~z$w_buff1~0_In-2136860042, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2136860042, ~weak$$choice2~0=~weak$$choice2~0_In-2136860042} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2136860042, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-2136860042|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2136860042, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-2136860042|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2136860042, ~z$w_buff1~0=~z$w_buff1~0_In-2136860042, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2136860042, ~weak$$choice2~0=~weak$$choice2~0_In-2136860042} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 17:26:24,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1868870228 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out1868870228| ~z$w_buff0_used~0_In1868870228) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In1868870228| |P2Thread1of1ForFork0_#t~ite26_Out1868870228|)) (and (= |P2Thread1of1ForFork0_#t~ite26_Out1868870228| |P2Thread1of1ForFork0_#t~ite27_Out1868870228|) (= |P2Thread1of1ForFork0_#t~ite26_Out1868870228| ~z$w_buff0_used~0_In1868870228) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1868870228 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd3~0_In1868870228 256)) .cse1) (and (= (mod ~z$w_buff1_used~0_In1868870228 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1868870228 256) 0))) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1868870228|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1868870228, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1868870228, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1868870228, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1868870228, ~weak$$choice2~0=~weak$$choice2~0_In1868870228} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1868870228|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1868870228|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1868870228, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1868870228, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1868870228, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1868870228, ~weak$$choice2~0=~weak$$choice2~0_In1868870228} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:26:24,831 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff0_thd3~0_66)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_66, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:26:24,832 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L803-->L807: Formula: (and (= 0 v_~z$flush_delayed~0_11) (= v_~z~0_50 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:26:24,832 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1405999605 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1405999605 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1405999605 |P0Thread1of1ForFork1_#t~ite5_Out-1405999605|)) (and (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-1405999605|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1405999605, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1405999605} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1405999605|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1405999605, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1405999605} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:26:24,832 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L807-2-->L807-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1749654929 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1749654929 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1749654929| ~z~0_In-1749654929)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1749654929| ~z$w_buff1~0_In-1749654929) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1749654929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1749654929, ~z$w_buff1~0=~z$w_buff1~0_In-1749654929, ~z~0=~z~0_In-1749654929} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1749654929|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1749654929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1749654929, ~z$w_buff1~0=~z$w_buff1~0_In-1749654929, ~z~0=~z~0_In-1749654929} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:26:24,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In39316293 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In39316293 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In39316293 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In39316293 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out39316293|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~z$w_buff1_used~0_In39316293 |P0Thread1of1ForFork1_#t~ite6_Out39316293|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In39316293, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In39316293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In39316293, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In39316293} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In39316293, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out39316293|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In39316293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In39316293, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In39316293} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:26:24,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L751-->L752: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-2139516670 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2139516670 256))) (.cse0 (= ~z$r_buff0_thd1~0_In-2139516670 ~z$r_buff0_thd1~0_Out-2139516670))) (or (and .cse0 .cse1) (and (= ~z$r_buff0_thd1~0_Out-2139516670 0) (not .cse1) (not .cse2)) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2139516670, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2139516670} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2139516670, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-2139516670|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-2139516670} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:26:24,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L752-->L752-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-866595954 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-866595954 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In-866595954 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-866595954 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out-866595954| 0)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out-866595954| ~z$r_buff1_thd1~0_In-866595954) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-866595954, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-866595954, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-866595954, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-866595954} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-866595954|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-866595954, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-866595954, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-866595954, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-866595954} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:26:24,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_30|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_29|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:26:24,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L807-4-->L808: Formula: (= v_~z~0_20 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 17:26:24,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L808-->L808-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1287159371 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1287159371 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1287159371| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1287159371| ~z$w_buff0_used~0_In-1287159371) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1287159371, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1287159371} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1287159371, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1287159371|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1287159371} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:26:24,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L809-->L809-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In154087906 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In154087906 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In154087906 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In154087906 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out154087906| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite41_Out154087906| ~z$w_buff1_used~0_In154087906)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In154087906, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In154087906, ~z$w_buff1_used~0=~z$w_buff1_used~0_In154087906, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In154087906} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In154087906, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In154087906, ~z$w_buff1_used~0=~z$w_buff1_used~0_In154087906, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In154087906, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out154087906|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:26:24,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1303960835 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1303960835 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1303960835| ~z$r_buff0_thd3~0_In1303960835) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1303960835| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1303960835, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1303960835} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1303960835, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1303960835, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1303960835|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:26:24,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1370026616 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1370026616 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-1370026616 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-1370026616 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1370026616 |P2Thread1of1ForFork0_#t~ite43_Out-1370026616|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1370026616|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1370026616, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1370026616, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1370026616, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1370026616} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1370026616|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1370026616, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1370026616, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1370026616, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1370026616} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:26:24,835 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= v_~z$r_buff1_thd3~0_121 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_121, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:26:24,835 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L834-1-->L840: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:26:24,835 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L840-2-->L840-5: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In-1973288007 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1973288007 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-1973288007| |ULTIMATE.start_main_#t~ite47_Out-1973288007|))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out-1973288007| ~z$w_buff1~0_In-1973288007)) (and (= |ULTIMATE.start_main_#t~ite47_Out-1973288007| ~z~0_In-1973288007) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1973288007, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1973288007, ~z$w_buff1~0=~z$w_buff1~0_In-1973288007, ~z~0=~z~0_In-1973288007} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1973288007, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1973288007|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1973288007, ~z$w_buff1~0=~z$w_buff1~0_In-1973288007, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1973288007|, ~z~0=~z~0_In-1973288007} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:26:24,836 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-2145004758 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-2145004758 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-2145004758| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-2145004758 |ULTIMATE.start_main_#t~ite49_Out-2145004758|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2145004758, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2145004758} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2145004758, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2145004758, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2145004758|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:26:24,836 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L842-->L842-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1008716173 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In1008716173 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1008716173 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1008716173 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out1008716173|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1008716173 |ULTIMATE.start_main_#t~ite50_Out1008716173|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1008716173, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1008716173, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1008716173, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1008716173} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1008716173|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1008716173, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1008716173, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1008716173, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1008716173} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:26:24,836 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In152115573 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In152115573 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In152115573 |ULTIMATE.start_main_#t~ite51_Out152115573|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out152115573|) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In152115573, ~z$w_buff0_used~0=~z$w_buff0_used~0_In152115573} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In152115573, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out152115573|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In152115573} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:26:24,837 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In1869762293 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1869762293 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1869762293 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1869762293 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1869762293|)) (and (= ~z$r_buff1_thd0~0_In1869762293 |ULTIMATE.start_main_#t~ite52_Out1869762293|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1869762293, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1869762293, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1869762293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1869762293} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1869762293|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1869762293, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1869762293, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1869762293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1869762293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:26:24,837 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [886] [886] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (ite (= (ite (not (and (= 2 v_~__unbuffered_p1_EAX~0_22) (= v_~x~0_65 2) (= v_~__unbuffered_p2_EBX~0_27 0) (= v_~__unbuffered_p1_EBX~0_23 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_18 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_101 |v_ULTIMATE.start_main_#t~ite52_39|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_23, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_27, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_65} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_23, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_27, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_101, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_65, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:26:24,897 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_3398a1d4-d32b-4b9c-b785-e422b497c703/bin/uautomizer/witness.graphml [2019-12-07 17:26:24,897 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:26:24,899 INFO L168 Benchmark]: Toolchain (without parser) took 176486.37 ms. Allocated memory was 1.0 GB in the beginning and 9.0 GB in the end (delta: 8.0 GB). Free memory was 937.1 MB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 4.7 GB. Max. memory is 11.5 GB. [2019-12-07 17:26:24,899 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:26:24,899 INFO L168 Benchmark]: CACSL2BoogieTranslator took 372.09 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.7 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -121.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:26:24,900 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.28 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:26:24,900 INFO L168 Benchmark]: Boogie Preprocessor took 25.82 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:26:24,900 INFO L168 Benchmark]: RCFGBuilder took 413.02 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 996.8 MB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:26:24,901 INFO L168 Benchmark]: TraceAbstraction took 175557.97 ms. Allocated memory was 1.1 GB in the beginning and 9.0 GB in the end (delta: 7.9 GB). Free memory was 991.4 MB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 4.7 GB. Max. memory is 11.5 GB. [2019-12-07 17:26:24,901 INFO L168 Benchmark]: Witness Printer took 77.66 ms. Allocated memory is still 9.0 GB. Free memory was 4.2 GB in the beginning and 4.2 GB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2019-12-07 17:26:24,903 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 372.09 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.7 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -121.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.28 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.82 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 413.02 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 996.8 MB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 175557.97 ms. Allocated memory was 1.1 GB in the beginning and 9.0 GB in the end (delta: 7.9 GB). Free memory was 991.4 MB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 4.7 GB. Max. memory is 11.5 GB. * Witness Printer took 77.66 ms. Allocated memory is still 9.0 GB. Free memory was 4.2 GB in the beginning and 4.2 GB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 177 ProgramPointsBefore, 93 ProgramPointsAfterwards, 214 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 34 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 32 ChoiceCompositions, 7398 VarBasedMoverChecksPositive, 271 VarBasedMoverChecksNegative, 70 SemBasedMoverChecksPositive, 270 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78628 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t165, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] FCALL, FORK 0 pthread_create(&t166, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 1 z$w_buff1 = z$w_buff0 [L734] 1 z$w_buff0 = 1 [L735] 1 z$w_buff1_used = z$w_buff0_used [L736] 1 z$w_buff0_used = (_Bool)1 [L762] 2 x = 2 [L765] 2 __unbuffered_p1_EAX = x [L768] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L771] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L772] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L834] FCALL, FORK 0 pthread_create(&t167, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 y = 1 [L788] 3 __unbuffered_p2_EAX = y [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 z$flush_delayed = weak$$choice2 [L794] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L796] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L773] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L774] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L748] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L798] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L801] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L748] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L807] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L749] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L750] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L808] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L809] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L810] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L840] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L840] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L841] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L842] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L843] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 175.3s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 32.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5702 SDtfs, 8961 SDslu, 13787 SDs, 0 SdLazy, 9465 SolverSat, 679 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 337 GetRequests, 54 SyntacticMatches, 17 SemanticMatches, 266 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2189 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=301435occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 123.0s AutomataMinimizationTime, 28 MinimizatonAttempts, 621555 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 1022 NumberOfCodeBlocks, 1022 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 927 ConstructedInterpolants, 0 QuantifiedInterpolants, 185890 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...