./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix010_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix010_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b77251edba7469485878084a6afedecceec13cb1 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:33:01,892 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:33:01,893 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:33:01,900 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:33:01,901 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:33:01,901 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:33:01,902 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:33:01,903 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:33:01,905 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:33:01,905 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:33:01,906 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:33:01,907 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:33:01,907 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:33:01,907 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:33:01,908 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:33:01,909 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:33:01,909 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:33:01,910 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:33:01,911 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:33:01,913 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:33:01,914 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:33:01,915 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:33:01,916 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:33:01,916 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:33:01,918 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:33:01,918 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:33:01,918 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:33:01,919 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:33:01,919 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:33:01,920 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:33:01,920 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:33:01,920 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:33:01,921 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:33:01,921 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:33:01,922 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:33:01,922 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:33:01,922 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:33:01,922 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:33:01,922 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:33:01,923 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:33:01,923 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:33:01,924 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:33:01,933 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:33:01,934 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:33:01,934 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:33:01,934 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:33:01,935 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:33:01,935 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:33:01,935 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:33:01,935 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:33:01,935 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:33:01,935 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:33:01,935 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:33:01,936 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:33:01,936 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:33:01,936 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:33:01,936 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:33:01,936 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:33:01,936 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:33:01,936 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:33:01,936 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:33:01,937 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:33:01,937 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:33:01,937 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:33:01,937 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:33:01,937 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:33:01,937 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:33:01,937 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:33:01,937 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:33:01,938 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:33:01,938 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:33:01,938 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b77251edba7469485878084a6afedecceec13cb1 [2019-12-07 16:33:02,037 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:33:02,048 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:33:02,051 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:33:02,052 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:33:02,052 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:33:02,053 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix010_power.oepc.i [2019-12-07 16:33:02,091 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/data/f8604ebad/645cd2faa1af40cc8735aa0c51f1303d/FLAG1872af8c7 [2019-12-07 16:33:02,546 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:33:02,547 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/sv-benchmarks/c/pthread-wmm/mix010_power.oepc.i [2019-12-07 16:33:02,557 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/data/f8604ebad/645cd2faa1af40cc8735aa0c51f1303d/FLAG1872af8c7 [2019-12-07 16:33:02,896 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/data/f8604ebad/645cd2faa1af40cc8735aa0c51f1303d [2019-12-07 16:33:02,903 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:33:02,906 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:33:02,908 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:33:02,909 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:33:02,916 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:33:02,917 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:33:02" (1/1) ... [2019-12-07 16:33:02,919 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@296938c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:02, skipping insertion in model container [2019-12-07 16:33:02,919 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:33:02" (1/1) ... [2019-12-07 16:33:02,924 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:33:02,951 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:33:03,186 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:33:03,194 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:33:03,236 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:33:03,282 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:33:03,282 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03 WrapperNode [2019-12-07 16:33:03,283 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:33:03,283 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:33:03,283 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:33:03,283 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:33:03,289 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,302 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,320 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:33:03,320 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:33:03,320 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:33:03,320 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:33:03,326 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,327 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,330 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,330 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,337 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,339 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,342 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... [2019-12-07 16:33:03,345 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:33:03,346 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:33:03,346 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:33:03,346 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:33:03,346 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:33:03,385 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:33:03,386 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:33:03,386 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:33:03,386 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:33:03,386 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:33:03,386 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:33:03,386 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:33:03,386 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:33:03,386 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 16:33:03,386 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 16:33:03,386 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:33:03,386 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:33:03,386 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:33:03,388 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:33:03,748 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:33:03,748 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:33:03,749 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:33:03 BoogieIcfgContainer [2019-12-07 16:33:03,749 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:33:03,750 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:33:03,750 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:33:03,752 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:33:03,752 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:33:02" (1/3) ... [2019-12-07 16:33:03,753 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@299b3f6a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:33:03, skipping insertion in model container [2019-12-07 16:33:03,753 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:33:03" (2/3) ... [2019-12-07 16:33:03,753 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@299b3f6a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:33:03, skipping insertion in model container [2019-12-07 16:33:03,753 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:33:03" (3/3) ... [2019-12-07 16:33:03,754 INFO L109 eAbstractionObserver]: Analyzing ICFG mix010_power.oepc.i [2019-12-07 16:33:03,761 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:33:03,761 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:33:03,767 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:33:03,767 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:33:03,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,797 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,797 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,797 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,798 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,798 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,802 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,803 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,803 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,808 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,808 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,813 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,820 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,821 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,822 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,823 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:33:03,836 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 16:33:03,848 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:33:03,848 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:33:03,848 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:33:03,848 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:33:03,848 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:33:03,848 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:33:03,848 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:33:03,849 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:33:03,861 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 16:33:03,863 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 16:33:03,927 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 16:33:03,927 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:33:03,937 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:33:03,954 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 16:33:03,995 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 16:33:03,995 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:33:04,001 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:33:04,017 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 16:33:04,018 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:33:06,751 WARN L192 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 16:33:07,085 WARN L192 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 16:33:07,190 INFO L206 etLargeBlockEncoding]: Checked pairs total: 91218 [2019-12-07 16:33:07,190 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 16:33:07,192 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 105 transitions [2019-12-07 16:33:24,721 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 16:33:24,722 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 16:33:24,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 16:33:24,726 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:24,726 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 16:33:24,727 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:24,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:24,730 INFO L82 PathProgramCache]: Analyzing trace with hash 921826, now seen corresponding path program 1 times [2019-12-07 16:33:24,736 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:24,736 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195236748] [2019-12-07 16:33:24,736 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:24,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:24,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:24,864 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195236748] [2019-12-07 16:33:24,865 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:24,865 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:33:24,866 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037238146] [2019-12-07 16:33:24,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:24,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:24,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:24,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:24,880 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 16:33:25,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:25,635 INFO L93 Difference]: Finished difference Result 125226 states and 534182 transitions. [2019-12-07 16:33:25,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:25,637 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 16:33:25,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:26,089 INFO L225 Difference]: With dead ends: 125226 [2019-12-07 16:33:26,089 INFO L226 Difference]: Without dead ends: 117946 [2019-12-07 16:33:26,091 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:32,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117946 states. [2019-12-07 16:33:34,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117946 to 117946. [2019-12-07 16:33:34,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117946 states. [2019-12-07 16:33:34,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117946 states to 117946 states and 502500 transitions. [2019-12-07 16:33:34,896 INFO L78 Accepts]: Start accepts. Automaton has 117946 states and 502500 transitions. Word has length 3 [2019-12-07 16:33:34,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:34,896 INFO L462 AbstractCegarLoop]: Abstraction has 117946 states and 502500 transitions. [2019-12-07 16:33:34,896 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:34,896 INFO L276 IsEmpty]: Start isEmpty. Operand 117946 states and 502500 transitions. [2019-12-07 16:33:34,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:33:34,899 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:34,899 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:34,899 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:34,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:34,900 INFO L82 PathProgramCache]: Analyzing trace with hash -2034548154, now seen corresponding path program 1 times [2019-12-07 16:33:34,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:34,900 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405045359] [2019-12-07 16:33:34,900 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:34,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:34,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:34,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405045359] [2019-12-07 16:33:34,959 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:34,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:34,960 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793890035] [2019-12-07 16:33:34,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:33:34,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:34,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:33:34,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:33:34,961 INFO L87 Difference]: Start difference. First operand 117946 states and 502500 transitions. Second operand 4 states. [2019-12-07 16:33:36,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:36,328 INFO L93 Difference]: Finished difference Result 183040 states and 750092 transitions. [2019-12-07 16:33:36,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:33:36,329 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:33:36,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:36,854 INFO L225 Difference]: With dead ends: 183040 [2019-12-07 16:33:36,854 INFO L226 Difference]: Without dead ends: 182991 [2019-12-07 16:33:36,855 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:43,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182991 states. [2019-12-07 16:33:47,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182991 to 168271. [2019-12-07 16:33:47,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168271 states. [2019-12-07 16:33:48,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168271 states to 168271 states and 697811 transitions. [2019-12-07 16:33:48,147 INFO L78 Accepts]: Start accepts. Automaton has 168271 states and 697811 transitions. Word has length 11 [2019-12-07 16:33:48,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:48,147 INFO L462 AbstractCegarLoop]: Abstraction has 168271 states and 697811 transitions. [2019-12-07 16:33:48,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:33:48,148 INFO L276 IsEmpty]: Start isEmpty. Operand 168271 states and 697811 transitions. [2019-12-07 16:33:48,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:33:48,153 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:48,154 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:48,154 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:48,154 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:48,154 INFO L82 PathProgramCache]: Analyzing trace with hash -579003435, now seen corresponding path program 1 times [2019-12-07 16:33:48,154 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:48,154 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143444273] [2019-12-07 16:33:48,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:48,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:48,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:48,208 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143444273] [2019-12-07 16:33:48,209 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:48,209 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:48,209 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1584778409] [2019-12-07 16:33:48,209 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:33:48,209 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:48,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:33:48,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:33:48,209 INFO L87 Difference]: Start difference. First operand 168271 states and 697811 transitions. Second operand 4 states. [2019-12-07 16:33:49,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:49,732 INFO L93 Difference]: Finished difference Result 237004 states and 961776 transitions. [2019-12-07 16:33:49,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:33:49,732 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:33:49,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:50,378 INFO L225 Difference]: With dead ends: 237004 [2019-12-07 16:33:50,378 INFO L226 Difference]: Without dead ends: 236948 [2019-12-07 16:33:50,378 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:58,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236948 states. [2019-12-07 16:34:03,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236948 to 201086. [2019-12-07 16:34:03,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201086 states. [2019-12-07 16:34:03,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201086 states to 201086 states and 829537 transitions. [2019-12-07 16:34:03,861 INFO L78 Accepts]: Start accepts. Automaton has 201086 states and 829537 transitions. Word has length 13 [2019-12-07 16:34:03,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:03,862 INFO L462 AbstractCegarLoop]: Abstraction has 201086 states and 829537 transitions. [2019-12-07 16:34:03,862 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:34:03,862 INFO L276 IsEmpty]: Start isEmpty. Operand 201086 states and 829537 transitions. [2019-12-07 16:34:03,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 16:34:03,872 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:03,872 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:03,872 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:03,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:03,872 INFO L82 PathProgramCache]: Analyzing trace with hash -1458626840, now seen corresponding path program 1 times [2019-12-07 16:34:03,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:03,873 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460625824] [2019-12-07 16:34:03,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:03,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:03,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:03,926 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460625824] [2019-12-07 16:34:03,926 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:03,926 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:34:03,926 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [928600378] [2019-12-07 16:34:03,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:34:03,927 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:03,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:34:03,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:34:03,927 INFO L87 Difference]: Start difference. First operand 201086 states and 829537 transitions. Second operand 5 states. [2019-12-07 16:34:05,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:05,745 INFO L93 Difference]: Finished difference Result 275142 states and 1124357 transitions. [2019-12-07 16:34:05,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:34:05,746 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 16:34:05,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:06,485 INFO L225 Difference]: With dead ends: 275142 [2019-12-07 16:34:06,485 INFO L226 Difference]: Without dead ends: 275142 [2019-12-07 16:34:06,485 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:34:14,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275142 states. [2019-12-07 16:34:18,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275142 to 230321. [2019-12-07 16:34:18,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230321 states. [2019-12-07 16:34:18,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230321 states to 230321 states and 948783 transitions. [2019-12-07 16:34:18,799 INFO L78 Accepts]: Start accepts. Automaton has 230321 states and 948783 transitions. Word has length 16 [2019-12-07 16:34:18,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:18,800 INFO L462 AbstractCegarLoop]: Abstraction has 230321 states and 948783 transitions. [2019-12-07 16:34:18,800 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:34:18,800 INFO L276 IsEmpty]: Start isEmpty. Operand 230321 states and 948783 transitions. [2019-12-07 16:34:18,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 16:34:18,812 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:18,812 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:18,812 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:18,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:18,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1933654436, now seen corresponding path program 1 times [2019-12-07 16:34:18,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:18,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2119379663] [2019-12-07 16:34:18,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:18,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:18,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:18,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2119379663] [2019-12-07 16:34:18,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:18,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:34:18,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410204273] [2019-12-07 16:34:18,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:34:18,844 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:18,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:34:18,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:18,845 INFO L87 Difference]: Start difference. First operand 230321 states and 948783 transitions. Second operand 3 states. [2019-12-07 16:34:18,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:18,974 INFO L93 Difference]: Finished difference Result 42455 states and 137548 transitions. [2019-12-07 16:34:18,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:34:18,974 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 16:34:18,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:19,039 INFO L225 Difference]: With dead ends: 42455 [2019-12-07 16:34:19,039 INFO L226 Difference]: Without dead ends: 42455 [2019-12-07 16:34:19,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:19,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42455 states. [2019-12-07 16:34:19,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42455 to 42335. [2019-12-07 16:34:19,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42335 states. [2019-12-07 16:34:19,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42335 states to 42335 states and 137188 transitions. [2019-12-07 16:34:19,769 INFO L78 Accepts]: Start accepts. Automaton has 42335 states and 137188 transitions. Word has length 18 [2019-12-07 16:34:19,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:19,769 INFO L462 AbstractCegarLoop]: Abstraction has 42335 states and 137188 transitions. [2019-12-07 16:34:19,770 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:34:19,770 INFO L276 IsEmpty]: Start isEmpty. Operand 42335 states and 137188 transitions. [2019-12-07 16:34:19,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:34:19,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:19,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:19,775 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:19,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:19,776 INFO L82 PathProgramCache]: Analyzing trace with hash -311730194, now seen corresponding path program 1 times [2019-12-07 16:34:19,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:19,776 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833895615] [2019-12-07 16:34:19,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:19,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:19,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:19,850 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833895615] [2019-12-07 16:34:19,850 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:19,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:34:19,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2095019163] [2019-12-07 16:34:19,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:34:19,851 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:19,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:34:19,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:34:19,851 INFO L87 Difference]: Start difference. First operand 42335 states and 137188 transitions. Second operand 7 states. [2019-12-07 16:34:20,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:20,723 INFO L93 Difference]: Finished difference Result 68217 states and 214442 transitions. [2019-12-07 16:34:20,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 16:34:20,724 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 16:34:20,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:20,822 INFO L225 Difference]: With dead ends: 68217 [2019-12-07 16:34:20,822 INFO L226 Difference]: Without dead ends: 68203 [2019-12-07 16:34:20,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:34:21,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68203 states. [2019-12-07 16:34:21,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68203 to 42009. [2019-12-07 16:34:21,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42009 states. [2019-12-07 16:34:21,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42009 states to 42009 states and 135594 transitions. [2019-12-07 16:34:21,739 INFO L78 Accepts]: Start accepts. Automaton has 42009 states and 135594 transitions. Word has length 22 [2019-12-07 16:34:21,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:21,740 INFO L462 AbstractCegarLoop]: Abstraction has 42009 states and 135594 transitions. [2019-12-07 16:34:21,740 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:34:21,740 INFO L276 IsEmpty]: Start isEmpty. Operand 42009 states and 135594 transitions. [2019-12-07 16:34:21,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:34:21,749 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:21,749 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:21,749 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:21,749 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:21,750 INFO L82 PathProgramCache]: Analyzing trace with hash 573582081, now seen corresponding path program 1 times [2019-12-07 16:34:21,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:21,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991382111] [2019-12-07 16:34:21,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:21,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:21,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:21,793 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991382111] [2019-12-07 16:34:21,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:21,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:34:21,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036284930] [2019-12-07 16:34:21,794 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:34:21,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:21,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:34:21,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:34:21,795 INFO L87 Difference]: Start difference. First operand 42009 states and 135594 transitions. Second operand 5 states. [2019-12-07 16:34:22,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:22,206 INFO L93 Difference]: Finished difference Result 57974 states and 183613 transitions. [2019-12-07 16:34:22,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:34:22,207 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 16:34:22,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:22,299 INFO L225 Difference]: With dead ends: 57974 [2019-12-07 16:34:22,299 INFO L226 Difference]: Without dead ends: 57961 [2019-12-07 16:34:22,300 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:34:22,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57961 states. [2019-12-07 16:34:23,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57961 to 49840. [2019-12-07 16:34:23,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49840 states. [2019-12-07 16:34:23,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49840 states to 49840 states and 160152 transitions. [2019-12-07 16:34:23,256 INFO L78 Accepts]: Start accepts. Automaton has 49840 states and 160152 transitions. Word has length 25 [2019-12-07 16:34:23,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:23,257 INFO L462 AbstractCegarLoop]: Abstraction has 49840 states and 160152 transitions. [2019-12-07 16:34:23,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:34:23,257 INFO L276 IsEmpty]: Start isEmpty. Operand 49840 states and 160152 transitions. [2019-12-07 16:34:23,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 16:34:23,273 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:23,273 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:23,273 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:23,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:23,273 INFO L82 PathProgramCache]: Analyzing trace with hash 574668024, now seen corresponding path program 1 times [2019-12-07 16:34:23,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:23,274 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813862859] [2019-12-07 16:34:23,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:23,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:23,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:23,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813862859] [2019-12-07 16:34:23,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:23,328 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:34:23,328 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [543698090] [2019-12-07 16:34:23,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:34:23,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:23,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:34:23,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:34:23,329 INFO L87 Difference]: Start difference. First operand 49840 states and 160152 transitions. Second operand 6 states. [2019-12-07 16:34:23,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:23,794 INFO L93 Difference]: Finished difference Result 71876 states and 224793 transitions. [2019-12-07 16:34:23,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 16:34:23,795 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 16:34:23,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:23,900 INFO L225 Difference]: With dead ends: 71876 [2019-12-07 16:34:23,900 INFO L226 Difference]: Without dead ends: 71836 [2019-12-07 16:34:23,900 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:34:24,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71836 states. [2019-12-07 16:34:25,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71836 to 55662. [2019-12-07 16:34:25,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55662 states. [2019-12-07 16:34:25,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55662 states to 55662 states and 177494 transitions. [2019-12-07 16:34:25,179 INFO L78 Accepts]: Start accepts. Automaton has 55662 states and 177494 transitions. Word has length 27 [2019-12-07 16:34:25,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:25,179 INFO L462 AbstractCegarLoop]: Abstraction has 55662 states and 177494 transitions. [2019-12-07 16:34:25,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:34:25,179 INFO L276 IsEmpty]: Start isEmpty. Operand 55662 states and 177494 transitions. [2019-12-07 16:34:25,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 16:34:25,195 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:25,195 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:25,195 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:25,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:25,196 INFO L82 PathProgramCache]: Analyzing trace with hash -834373480, now seen corresponding path program 1 times [2019-12-07 16:34:25,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:25,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548219760] [2019-12-07 16:34:25,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:25,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:25,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:25,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1548219760] [2019-12-07 16:34:25,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:25,252 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:34:25,252 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [244672884] [2019-12-07 16:34:25,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:34:25,253 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:25,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:34:25,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:34:25,253 INFO L87 Difference]: Start difference. First operand 55662 states and 177494 transitions. Second operand 5 states. [2019-12-07 16:34:25,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:25,775 INFO L93 Difference]: Finished difference Result 73977 states and 234048 transitions. [2019-12-07 16:34:25,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:34:25,776 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 16:34:25,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:25,884 INFO L225 Difference]: With dead ends: 73977 [2019-12-07 16:34:25,885 INFO L226 Difference]: Without dead ends: 73977 [2019-12-07 16:34:25,885 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:34:26,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73977 states. [2019-12-07 16:34:26,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73977 to 66292. [2019-12-07 16:34:26,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66292 states. [2019-12-07 16:34:27,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66292 states to 66292 states and 211352 transitions. [2019-12-07 16:34:27,071 INFO L78 Accepts]: Start accepts. Automaton has 66292 states and 211352 transitions. Word has length 28 [2019-12-07 16:34:27,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:27,071 INFO L462 AbstractCegarLoop]: Abstraction has 66292 states and 211352 transitions. [2019-12-07 16:34:27,072 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:34:27,072 INFO L276 IsEmpty]: Start isEmpty. Operand 66292 states and 211352 transitions. [2019-12-07 16:34:27,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 16:34:27,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:27,096 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:27,096 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:27,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:27,096 INFO L82 PathProgramCache]: Analyzing trace with hash -1649688558, now seen corresponding path program 1 times [2019-12-07 16:34:27,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:27,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658081033] [2019-12-07 16:34:27,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:27,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:27,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:27,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658081033] [2019-12-07 16:34:27,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:27,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:34:27,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073047156] [2019-12-07 16:34:27,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:34:27,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:27,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:34:27,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:34:27,129 INFO L87 Difference]: Start difference. First operand 66292 states and 211352 transitions. Second operand 4 states. [2019-12-07 16:34:27,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:27,211 INFO L93 Difference]: Finished difference Result 28026 states and 84332 transitions. [2019-12-07 16:34:27,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:34:27,212 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 16:34:27,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:27,244 INFO L225 Difference]: With dead ends: 28026 [2019-12-07 16:34:27,244 INFO L226 Difference]: Without dead ends: 28026 [2019-12-07 16:34:27,244 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:34:27,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28026 states. [2019-12-07 16:34:27,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28026 to 26046. [2019-12-07 16:34:27,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26046 states. [2019-12-07 16:34:27,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26046 states to 26046 states and 78430 transitions. [2019-12-07 16:34:27,628 INFO L78 Accepts]: Start accepts. Automaton has 26046 states and 78430 transitions. Word has length 29 [2019-12-07 16:34:27,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:27,629 INFO L462 AbstractCegarLoop]: Abstraction has 26046 states and 78430 transitions. [2019-12-07 16:34:27,629 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:34:27,629 INFO L276 IsEmpty]: Start isEmpty. Operand 26046 states and 78430 transitions. [2019-12-07 16:34:27,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 16:34:27,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:27,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:27,648 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:27,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:27,648 INFO L82 PathProgramCache]: Analyzing trace with hash -1393723506, now seen corresponding path program 1 times [2019-12-07 16:34:27,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:27,648 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533529853] [2019-12-07 16:34:27,648 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:27,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:27,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:27,705 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533529853] [2019-12-07 16:34:27,706 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:27,706 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:34:27,706 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020348008] [2019-12-07 16:34:27,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:34:27,706 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:27,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:34:27,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:34:27,706 INFO L87 Difference]: Start difference. First operand 26046 states and 78430 transitions. Second operand 6 states. [2019-12-07 16:34:28,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:28,048 INFO L93 Difference]: Finished difference Result 31590 states and 94030 transitions. [2019-12-07 16:34:28,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:34:28,048 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 16:34:28,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:28,084 INFO L225 Difference]: With dead ends: 31590 [2019-12-07 16:34:28,084 INFO L226 Difference]: Without dead ends: 31590 [2019-12-07 16:34:28,084 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:34:28,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31590 states. [2019-12-07 16:34:28,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31590 to 26815. [2019-12-07 16:34:28,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26815 states. [2019-12-07 16:34:28,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26815 states to 26815 states and 80873 transitions. [2019-12-07 16:34:28,511 INFO L78 Accepts]: Start accepts. Automaton has 26815 states and 80873 transitions. Word has length 33 [2019-12-07 16:34:28,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:28,512 INFO L462 AbstractCegarLoop]: Abstraction has 26815 states and 80873 transitions. [2019-12-07 16:34:28,512 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:34:28,512 INFO L276 IsEmpty]: Start isEmpty. Operand 26815 states and 80873 transitions. [2019-12-07 16:34:28,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 16:34:28,530 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:28,530 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:28,530 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:28,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:28,531 INFO L82 PathProgramCache]: Analyzing trace with hash 305072172, now seen corresponding path program 2 times [2019-12-07 16:34:28,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:28,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274031101] [2019-12-07 16:34:28,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:28,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:28,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:28,795 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1274031101] [2019-12-07 16:34:28,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:28,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:34:28,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1133229793] [2019-12-07 16:34:28,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:34:28,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:28,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:34:28,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:34:28,796 INFO L87 Difference]: Start difference. First operand 26815 states and 80873 transitions. Second operand 8 states. [2019-12-07 16:34:29,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:29,687 INFO L93 Difference]: Finished difference Result 36396 states and 106445 transitions. [2019-12-07 16:34:29,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 16:34:29,687 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 16:34:29,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:29,727 INFO L225 Difference]: With dead ends: 36396 [2019-12-07 16:34:29,727 INFO L226 Difference]: Without dead ends: 36396 [2019-12-07 16:34:29,728 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=352, Unknown=0, NotChecked=0, Total=462 [2019-12-07 16:34:29,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36396 states. [2019-12-07 16:34:30,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36396 to 24841. [2019-12-07 16:34:30,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24841 states. [2019-12-07 16:34:30,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24841 states to 24841 states and 74402 transitions. [2019-12-07 16:34:30,174 INFO L78 Accepts]: Start accepts. Automaton has 24841 states and 74402 transitions. Word has length 33 [2019-12-07 16:34:30,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:30,175 INFO L462 AbstractCegarLoop]: Abstraction has 24841 states and 74402 transitions. [2019-12-07 16:34:30,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:34:30,175 INFO L276 IsEmpty]: Start isEmpty. Operand 24841 states and 74402 transitions. [2019-12-07 16:34:30,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 16:34:30,196 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:30,196 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:30,196 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:30,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:30,196 INFO L82 PathProgramCache]: Analyzing trace with hash -1779229683, now seen corresponding path program 1 times [2019-12-07 16:34:30,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:30,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781801762] [2019-12-07 16:34:30,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:30,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:30,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:30,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781801762] [2019-12-07 16:34:30,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:30,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:34:30,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [88691783] [2019-12-07 16:34:30,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:34:30,263 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:30,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:34:30,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:34:30,264 INFO L87 Difference]: Start difference. First operand 24841 states and 74402 transitions. Second operand 6 states. [2019-12-07 16:34:30,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:30,859 INFO L93 Difference]: Finished difference Result 41721 states and 125684 transitions. [2019-12-07 16:34:30,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:34:30,860 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 16:34:30,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:30,911 INFO L225 Difference]: With dead ends: 41721 [2019-12-07 16:34:30,911 INFO L226 Difference]: Without dead ends: 41721 [2019-12-07 16:34:30,912 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:34:31,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41721 states. [2019-12-07 16:34:31,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41721 to 28558. [2019-12-07 16:34:31,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28558 states. [2019-12-07 16:34:31,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28558 states to 28558 states and 86084 transitions. [2019-12-07 16:34:31,438 INFO L78 Accepts]: Start accepts. Automaton has 28558 states and 86084 transitions. Word has length 39 [2019-12-07 16:34:31,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:31,438 INFO L462 AbstractCegarLoop]: Abstraction has 28558 states and 86084 transitions. [2019-12-07 16:34:31,438 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:34:31,438 INFO L276 IsEmpty]: Start isEmpty. Operand 28558 states and 86084 transitions. [2019-12-07 16:34:31,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 16:34:31,472 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:31,472 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:31,472 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:31,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:31,472 INFO L82 PathProgramCache]: Analyzing trace with hash 681610815, now seen corresponding path program 2 times [2019-12-07 16:34:31,473 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:31,473 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1364787114] [2019-12-07 16:34:31,473 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:31,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:31,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:31,502 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1364787114] [2019-12-07 16:34:31,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:31,503 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:34:31,503 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444610595] [2019-12-07 16:34:31,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:34:31,503 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:31,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:34:31,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:31,503 INFO L87 Difference]: Start difference. First operand 28558 states and 86084 transitions. Second operand 3 states. [2019-12-07 16:34:31,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:31,580 INFO L93 Difference]: Finished difference Result 28479 states and 85838 transitions. [2019-12-07 16:34:31,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:34:31,581 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 16:34:31,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:31,613 INFO L225 Difference]: With dead ends: 28479 [2019-12-07 16:34:31,613 INFO L226 Difference]: Without dead ends: 28479 [2019-12-07 16:34:31,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:31,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28479 states. [2019-12-07 16:34:31,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28479 to 24454. [2019-12-07 16:34:31,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24454 states. [2019-12-07 16:34:31,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24454 states to 24454 states and 74494 transitions. [2019-12-07 16:34:31,985 INFO L78 Accepts]: Start accepts. Automaton has 24454 states and 74494 transitions. Word has length 39 [2019-12-07 16:34:31,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:31,986 INFO L462 AbstractCegarLoop]: Abstraction has 24454 states and 74494 transitions. [2019-12-07 16:34:31,986 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:34:31,986 INFO L276 IsEmpty]: Start isEmpty. Operand 24454 states and 74494 transitions. [2019-12-07 16:34:32,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 16:34:32,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:32,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:32,004 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:32,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:32,004 INFO L82 PathProgramCache]: Analyzing trace with hash -875459779, now seen corresponding path program 1 times [2019-12-07 16:34:32,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:32,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700774043] [2019-12-07 16:34:32,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:32,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:32,036 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:32,037 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700774043] [2019-12-07 16:34:32,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:32,037 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:34:32,037 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602623951] [2019-12-07 16:34:32,037 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:34:32,037 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:32,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:34:32,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:32,037 INFO L87 Difference]: Start difference. First operand 24454 states and 74494 transitions. Second operand 3 states. [2019-12-07 16:34:32,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:32,089 INFO L93 Difference]: Finished difference Result 20375 states and 60852 transitions. [2019-12-07 16:34:32,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:34:32,090 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 16:34:32,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:32,112 INFO L225 Difference]: With dead ends: 20375 [2019-12-07 16:34:32,112 INFO L226 Difference]: Without dead ends: 20375 [2019-12-07 16:34:32,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:32,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20375 states. [2019-12-07 16:34:32,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20375 to 19925. [2019-12-07 16:34:32,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19925 states. [2019-12-07 16:34:32,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19925 states to 19925 states and 59578 transitions. [2019-12-07 16:34:32,400 INFO L78 Accepts]: Start accepts. Automaton has 19925 states and 59578 transitions. Word has length 40 [2019-12-07 16:34:32,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:32,400 INFO L462 AbstractCegarLoop]: Abstraction has 19925 states and 59578 transitions. [2019-12-07 16:34:32,400 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:34:32,400 INFO L276 IsEmpty]: Start isEmpty. Operand 19925 states and 59578 transitions. [2019-12-07 16:34:32,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 16:34:32,415 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:32,415 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:32,415 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:32,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:32,415 INFO L82 PathProgramCache]: Analyzing trace with hash -2067606308, now seen corresponding path program 1 times [2019-12-07 16:34:32,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:32,416 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543783863] [2019-12-07 16:34:32,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:32,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:32,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:32,461 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [543783863] [2019-12-07 16:34:32,461 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:32,462 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:34:32,462 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1514641346] [2019-12-07 16:34:32,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:34:32,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:32,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:34:32,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:34:32,463 INFO L87 Difference]: Start difference. First operand 19925 states and 59578 transitions. Second operand 5 states. [2019-12-07 16:34:32,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:32,517 INFO L93 Difference]: Finished difference Result 18455 states and 56352 transitions. [2019-12-07 16:34:32,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:34:32,518 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 16:34:32,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:32,537 INFO L225 Difference]: With dead ends: 18455 [2019-12-07 16:34:32,537 INFO L226 Difference]: Without dead ends: 18455 [2019-12-07 16:34:32,537 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:34:32,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18455 states. [2019-12-07 16:34:32,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18455 to 17199. [2019-12-07 16:34:32,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17199 states. [2019-12-07 16:34:32,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17199 states to 17199 states and 52739 transitions. [2019-12-07 16:34:32,796 INFO L78 Accepts]: Start accepts. Automaton has 17199 states and 52739 transitions. Word has length 41 [2019-12-07 16:34:32,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:32,796 INFO L462 AbstractCegarLoop]: Abstraction has 17199 states and 52739 transitions. [2019-12-07 16:34:32,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:34:32,797 INFO L276 IsEmpty]: Start isEmpty. Operand 17199 states and 52739 transitions. [2019-12-07 16:34:32,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:34:32,811 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:32,811 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:32,811 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:32,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:32,812 INFO L82 PathProgramCache]: Analyzing trace with hash 338241501, now seen corresponding path program 1 times [2019-12-07 16:34:32,812 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:32,812 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245542556] [2019-12-07 16:34:32,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:32,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:32,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:32,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245542556] [2019-12-07 16:34:32,850 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:32,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:34:32,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048421640] [2019-12-07 16:34:32,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:34:32,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:32,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:34:32,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:32,851 INFO L87 Difference]: Start difference. First operand 17199 states and 52739 transitions. Second operand 3 states. [2019-12-07 16:34:32,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:32,920 INFO L93 Difference]: Finished difference Result 23009 states and 70901 transitions. [2019-12-07 16:34:32,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:34:32,920 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 16:34:32,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:32,945 INFO L225 Difference]: With dead ends: 23009 [2019-12-07 16:34:32,945 INFO L226 Difference]: Without dead ends: 23009 [2019-12-07 16:34:32,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:33,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23009 states. [2019-12-07 16:34:33,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23009 to 18711. [2019-12-07 16:34:33,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18711 states. [2019-12-07 16:34:33,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18711 states to 18711 states and 57995 transitions. [2019-12-07 16:34:33,397 INFO L78 Accepts]: Start accepts. Automaton has 18711 states and 57995 transitions. Word has length 66 [2019-12-07 16:34:33,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:33,397 INFO L462 AbstractCegarLoop]: Abstraction has 18711 states and 57995 transitions. [2019-12-07 16:34:33,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:34:33,397 INFO L276 IsEmpty]: Start isEmpty. Operand 18711 states and 57995 transitions. [2019-12-07 16:34:33,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:34:33,413 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:33,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:33,413 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:33,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:33,413 INFO L82 PathProgramCache]: Analyzing trace with hash 1326528610, now seen corresponding path program 1 times [2019-12-07 16:34:33,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:33,413 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465218008] [2019-12-07 16:34:33,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:33,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:33,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:33,458 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1465218008] [2019-12-07 16:34:33,459 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:33,459 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:34:33,459 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072026175] [2019-12-07 16:34:33,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:34:33,459 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:33,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:34:33,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:33,459 INFO L87 Difference]: Start difference. First operand 18711 states and 57995 transitions. Second operand 3 states. [2019-12-07 16:34:33,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:33,541 INFO L93 Difference]: Finished difference Result 22121 states and 68392 transitions. [2019-12-07 16:34:33,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:34:33,542 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 16:34:33,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:33,566 INFO L225 Difference]: With dead ends: 22121 [2019-12-07 16:34:33,566 INFO L226 Difference]: Without dead ends: 22121 [2019-12-07 16:34:33,566 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:34:33,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22121 states. [2019-12-07 16:34:33,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22121 to 18656. [2019-12-07 16:34:33,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18656 states. [2019-12-07 16:34:33,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18656 states to 18656 states and 57903 transitions. [2019-12-07 16:34:33,870 INFO L78 Accepts]: Start accepts. Automaton has 18656 states and 57903 transitions. Word has length 66 [2019-12-07 16:34:33,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:33,871 INFO L462 AbstractCegarLoop]: Abstraction has 18656 states and 57903 transitions. [2019-12-07 16:34:33,871 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:34:33,871 INFO L276 IsEmpty]: Start isEmpty. Operand 18656 states and 57903 transitions. [2019-12-07 16:34:33,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:33,887 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:33,888 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:33,888 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:33,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:33,888 INFO L82 PathProgramCache]: Analyzing trace with hash 323085019, now seen corresponding path program 1 times [2019-12-07 16:34:33,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:33,888 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564966221] [2019-12-07 16:34:33,888 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:33,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:33,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:33,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564966221] [2019-12-07 16:34:33,955 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:33,955 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:34:33,956 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [311250863] [2019-12-07 16:34:33,956 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:34:33,956 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:33,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:34:33,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:34:33,956 INFO L87 Difference]: Start difference. First operand 18656 states and 57903 transitions. Second operand 7 states. [2019-12-07 16:34:34,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:34,572 INFO L93 Difference]: Finished difference Result 28283 states and 86006 transitions. [2019-12-07 16:34:34,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 16:34:34,573 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 16:34:34,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:34,603 INFO L225 Difference]: With dead ends: 28283 [2019-12-07 16:34:34,603 INFO L226 Difference]: Without dead ends: 28283 [2019-12-07 16:34:34,603 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:34:34,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28283 states. [2019-12-07 16:34:34,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28283 to 19145. [2019-12-07 16:34:34,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19145 states. [2019-12-07 16:34:34,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19145 states to 19145 states and 59389 transitions. [2019-12-07 16:34:34,940 INFO L78 Accepts]: Start accepts. Automaton has 19145 states and 59389 transitions. Word has length 67 [2019-12-07 16:34:34,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:34,940 INFO L462 AbstractCegarLoop]: Abstraction has 19145 states and 59389 transitions. [2019-12-07 16:34:34,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:34:34,940 INFO L276 IsEmpty]: Start isEmpty. Operand 19145 states and 59389 transitions. [2019-12-07 16:34:34,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:34,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:34,956 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:34,956 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:34,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:34,956 INFO L82 PathProgramCache]: Analyzing trace with hash -1912825147, now seen corresponding path program 2 times [2019-12-07 16:34:34,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:34,956 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [349262827] [2019-12-07 16:34:34,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:34,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:34,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:34,994 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [349262827] [2019-12-07 16:34:34,994 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:34,994 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:34:34,994 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203894363] [2019-12-07 16:34:34,994 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:34:34,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:34,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:34:34,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:34:34,995 INFO L87 Difference]: Start difference. First operand 19145 states and 59389 transitions. Second operand 4 states. [2019-12-07 16:34:35,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:35,082 INFO L93 Difference]: Finished difference Result 19145 states and 59165 transitions. [2019-12-07 16:34:35,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:34:35,082 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 16:34:35,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:35,102 INFO L225 Difference]: With dead ends: 19145 [2019-12-07 16:34:35,102 INFO L226 Difference]: Without dead ends: 19145 [2019-12-07 16:34:35,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:34:35,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19145 states. [2019-12-07 16:34:35,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19145 to 16901. [2019-12-07 16:34:35,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16901 states. [2019-12-07 16:34:35,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16901 states to 16901 states and 52288 transitions. [2019-12-07 16:34:35,376 INFO L78 Accepts]: Start accepts. Automaton has 16901 states and 52288 transitions. Word has length 67 [2019-12-07 16:34:35,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:35,376 INFO L462 AbstractCegarLoop]: Abstraction has 16901 states and 52288 transitions. [2019-12-07 16:34:35,376 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:34:35,376 INFO L276 IsEmpty]: Start isEmpty. Operand 16901 states and 52288 transitions. [2019-12-07 16:34:35,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:35,390 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:35,391 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:35,391 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:35,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:35,391 INFO L82 PathProgramCache]: Analyzing trace with hash 2062742571, now seen corresponding path program 1 times [2019-12-07 16:34:35,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:35,391 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587716806] [2019-12-07 16:34:35,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:35,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:35,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:35,524 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587716806] [2019-12-07 16:34:35,524 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:35,524 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 16:34:35,524 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855964775] [2019-12-07 16:34:35,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:34:35,525 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:35,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:34:35,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:34:35,525 INFO L87 Difference]: Start difference. First operand 16901 states and 52288 transitions. Second operand 10 states. [2019-12-07 16:34:39,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:39,172 INFO L93 Difference]: Finished difference Result 35700 states and 109911 transitions. [2019-12-07 16:34:39,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 16:34:39,172 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 16:34:39,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:39,203 INFO L225 Difference]: With dead ends: 35700 [2019-12-07 16:34:39,203 INFO L226 Difference]: Without dead ends: 25917 [2019-12-07 16:34:39,204 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2019-12-07 16:34:39,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25917 states. [2019-12-07 16:34:39,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25917 to 19793. [2019-12-07 16:34:39,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19793 states. [2019-12-07 16:34:39,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19793 states to 19793 states and 61009 transitions. [2019-12-07 16:34:39,551 INFO L78 Accepts]: Start accepts. Automaton has 19793 states and 61009 transitions. Word has length 67 [2019-12-07 16:34:39,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:39,551 INFO L462 AbstractCegarLoop]: Abstraction has 19793 states and 61009 transitions. [2019-12-07 16:34:39,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:34:39,551 INFO L276 IsEmpty]: Start isEmpty. Operand 19793 states and 61009 transitions. [2019-12-07 16:34:39,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:39,569 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:39,569 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:39,569 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:39,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:39,570 INFO L82 PathProgramCache]: Analyzing trace with hash -492001749, now seen corresponding path program 2 times [2019-12-07 16:34:39,570 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:39,570 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608764172] [2019-12-07 16:34:39,570 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:39,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:39,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:39,912 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608764172] [2019-12-07 16:34:39,912 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:39,912 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 16:34:39,913 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705185351] [2019-12-07 16:34:39,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 16:34:39,913 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:39,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 16:34:39,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:34:39,913 INFO L87 Difference]: Start difference. First operand 19793 states and 61009 transitions. Second operand 15 states. [2019-12-07 16:34:43,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:43,064 INFO L93 Difference]: Finished difference Result 35402 states and 106694 transitions. [2019-12-07 16:34:43,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 16:34:43,064 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 16:34:43,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:43,102 INFO L225 Difference]: With dead ends: 35402 [2019-12-07 16:34:43,102 INFO L226 Difference]: Without dead ends: 32523 [2019-12-07 16:34:43,103 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 541 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=315, Invalid=1755, Unknown=0, NotChecked=0, Total=2070 [2019-12-07 16:34:43,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32523 states. [2019-12-07 16:34:43,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32523 to 20590. [2019-12-07 16:34:43,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20590 states. [2019-12-07 16:34:43,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20590 states to 20590 states and 63118 transitions. [2019-12-07 16:34:43,488 INFO L78 Accepts]: Start accepts. Automaton has 20590 states and 63118 transitions. Word has length 67 [2019-12-07 16:34:43,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:43,489 INFO L462 AbstractCegarLoop]: Abstraction has 20590 states and 63118 transitions. [2019-12-07 16:34:43,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 16:34:43,489 INFO L276 IsEmpty]: Start isEmpty. Operand 20590 states and 63118 transitions. [2019-12-07 16:34:43,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:43,506 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:43,506 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:43,507 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:43,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:43,507 INFO L82 PathProgramCache]: Analyzing trace with hash 1583562061, now seen corresponding path program 3 times [2019-12-07 16:34:43,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:43,507 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176228430] [2019-12-07 16:34:43,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:43,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:43,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:43,625 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176228430] [2019-12-07 16:34:43,625 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:43,625 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 16:34:43,626 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034935574] [2019-12-07 16:34:43,626 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:34:43,626 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:43,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:34:43,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:34:43,626 INFO L87 Difference]: Start difference. First operand 20590 states and 63118 transitions. Second operand 10 states. [2019-12-07 16:34:44,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:44,827 INFO L93 Difference]: Finished difference Result 34439 states and 104205 transitions. [2019-12-07 16:34:44,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 16:34:44,828 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 16:34:44,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:44,860 INFO L225 Difference]: With dead ends: 34439 [2019-12-07 16:34:44,860 INFO L226 Difference]: Without dead ends: 27841 [2019-12-07 16:34:44,861 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=143, Invalid=507, Unknown=0, NotChecked=0, Total=650 [2019-12-07 16:34:44,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27841 states. [2019-12-07 16:34:45,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27841 to 20482. [2019-12-07 16:34:45,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20482 states. [2019-12-07 16:34:45,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20482 states to 20482 states and 62893 transitions. [2019-12-07 16:34:45,210 INFO L78 Accepts]: Start accepts. Automaton has 20482 states and 62893 transitions. Word has length 67 [2019-12-07 16:34:45,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:45,210 INFO L462 AbstractCegarLoop]: Abstraction has 20482 states and 62893 transitions. [2019-12-07 16:34:45,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:34:45,210 INFO L276 IsEmpty]: Start isEmpty. Operand 20482 states and 62893 transitions. [2019-12-07 16:34:45,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:45,227 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:45,228 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:45,228 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:45,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:45,228 INFO L82 PathProgramCache]: Analyzing trace with hash 693103783, now seen corresponding path program 4 times [2019-12-07 16:34:45,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:45,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527490027] [2019-12-07 16:34:45,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:45,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:45,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:45,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527490027] [2019-12-07 16:34:45,540 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:45,540 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 16:34:45,540 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1536263411] [2019-12-07 16:34:45,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 16:34:45,541 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:45,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 16:34:45,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 16:34:45,541 INFO L87 Difference]: Start difference. First operand 20482 states and 62893 transitions. Second operand 16 states. [2019-12-07 16:34:50,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:50,638 INFO L93 Difference]: Finished difference Result 33693 states and 101485 transitions. [2019-12-07 16:34:50,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 16:34:50,639 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 16:34:50,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:50,686 INFO L225 Difference]: With dead ends: 33693 [2019-12-07 16:34:50,687 INFO L226 Difference]: Without dead ends: 32038 [2019-12-07 16:34:50,687 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 281 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=200, Invalid=1060, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 16:34:50,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32038 states. [2019-12-07 16:34:51,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32038 to 20550. [2019-12-07 16:34:51,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20550 states. [2019-12-07 16:34:51,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20550 states to 20550 states and 63069 transitions. [2019-12-07 16:34:51,076 INFO L78 Accepts]: Start accepts. Automaton has 20550 states and 63069 transitions. Word has length 67 [2019-12-07 16:34:51,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:51,076 INFO L462 AbstractCegarLoop]: Abstraction has 20550 states and 63069 transitions. [2019-12-07 16:34:51,077 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 16:34:51,077 INFO L276 IsEmpty]: Start isEmpty. Operand 20550 states and 63069 transitions. [2019-12-07 16:34:51,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:51,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:51,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:51,095 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:51,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:51,096 INFO L82 PathProgramCache]: Analyzing trace with hash -1802400353, now seen corresponding path program 5 times [2019-12-07 16:34:51,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:51,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654742799] [2019-12-07 16:34:51,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:51,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:51,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:51,403 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654742799] [2019-12-07 16:34:51,403 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:51,403 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 16:34:51,403 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1897696356] [2019-12-07 16:34:51,403 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 16:34:51,403 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:51,404 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 16:34:51,404 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2019-12-07 16:34:51,404 INFO L87 Difference]: Start difference. First operand 20550 states and 63069 transitions. Second operand 16 states. [2019-12-07 16:34:54,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:54,669 INFO L93 Difference]: Finished difference Result 25869 states and 78401 transitions. [2019-12-07 16:34:54,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 16:34:54,670 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 16:34:54,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:54,693 INFO L225 Difference]: With dead ends: 25869 [2019-12-07 16:34:54,693 INFO L226 Difference]: Without dead ends: 21967 [2019-12-07 16:34:54,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 199 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=178, Invalid=1082, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 16:34:54,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21967 states. [2019-12-07 16:34:54,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21967 to 19837. [2019-12-07 16:34:54,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19837 states. [2019-12-07 16:34:54,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19837 states to 19837 states and 60749 transitions. [2019-12-07 16:34:54,996 INFO L78 Accepts]: Start accepts. Automaton has 19837 states and 60749 transitions. Word has length 67 [2019-12-07 16:34:54,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:54,996 INFO L462 AbstractCegarLoop]: Abstraction has 19837 states and 60749 transitions. [2019-12-07 16:34:54,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 16:34:54,997 INFO L276 IsEmpty]: Start isEmpty. Operand 19837 states and 60749 transitions. [2019-12-07 16:34:55,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:55,014 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:55,014 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:55,014 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:55,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:55,014 INFO L82 PathProgramCache]: Analyzing trace with hash -1796567163, now seen corresponding path program 6 times [2019-12-07 16:34:55,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:55,015 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737159322] [2019-12-07 16:34:55,015 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:55,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:55,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:55,298 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737159322] [2019-12-07 16:34:55,298 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:55,298 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 16:34:55,298 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389030508] [2019-12-07 16:34:55,299 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 16:34:55,299 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:55,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 16:34:55,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 16:34:55,299 INFO L87 Difference]: Start difference. First operand 19837 states and 60749 transitions. Second operand 16 states. [2019-12-07 16:34:57,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:34:57,393 INFO L93 Difference]: Finished difference Result 24930 states and 75322 transitions. [2019-12-07 16:34:57,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 16:34:57,393 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 16:34:57,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:34:57,422 INFO L225 Difference]: With dead ends: 24930 [2019-12-07 16:34:57,422 INFO L226 Difference]: Without dead ends: 22923 [2019-12-07 16:34:57,423 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=176, Invalid=1014, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 16:34:57,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22923 states. [2019-12-07 16:34:57,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22923 to 19945. [2019-12-07 16:34:57,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19945 states. [2019-12-07 16:34:57,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19945 states to 19945 states and 61034 transitions. [2019-12-07 16:34:57,733 INFO L78 Accepts]: Start accepts. Automaton has 19945 states and 61034 transitions. Word has length 67 [2019-12-07 16:34:57,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:34:57,733 INFO L462 AbstractCegarLoop]: Abstraction has 19945 states and 61034 transitions. [2019-12-07 16:34:57,733 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 16:34:57,733 INFO L276 IsEmpty]: Start isEmpty. Operand 19945 states and 61034 transitions. [2019-12-07 16:34:57,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:34:57,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:34:57,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:34:57,751 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:34:57,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:34:57,751 INFO L82 PathProgramCache]: Analyzing trace with hash 1535531457, now seen corresponding path program 7 times [2019-12-07 16:34:57,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:34:57,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300302075] [2019-12-07 16:34:57,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:34:57,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:34:58,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:34:58,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [300302075] [2019-12-07 16:34:58,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:34:58,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 16:34:58,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2100405842] [2019-12-07 16:34:58,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 16:34:58,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:34:58,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 16:34:58,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:34:58,051 INFO L87 Difference]: Start difference. First operand 19945 states and 61034 transitions. Second operand 15 states. [2019-12-07 16:35:00,929 WARN L192 SmtUtils]: Spent 187.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 35 [2019-12-07 16:35:01,507 WARN L192 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 37 [2019-12-07 16:35:01,732 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 16:35:03,329 WARN L192 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 31 [2019-12-07 16:35:05,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:35:05,080 INFO L93 Difference]: Finished difference Result 50759 states and 154680 transitions. [2019-12-07 16:35:05,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 16:35:05,081 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 16:35:05,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:35:05,137 INFO L225 Difference]: With dead ends: 50759 [2019-12-07 16:35:05,137 INFO L226 Difference]: Without dead ends: 46916 [2019-12-07 16:35:05,138 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1198 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=653, Invalid=3507, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 16:35:05,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46916 states. [2019-12-07 16:35:05,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46916 to 24432. [2019-12-07 16:35:05,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24432 states. [2019-12-07 16:35:05,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24432 states to 24432 states and 75342 transitions. [2019-12-07 16:35:05,832 INFO L78 Accepts]: Start accepts. Automaton has 24432 states and 75342 transitions. Word has length 67 [2019-12-07 16:35:05,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:35:05,832 INFO L462 AbstractCegarLoop]: Abstraction has 24432 states and 75342 transitions. [2019-12-07 16:35:05,832 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 16:35:05,832 INFO L276 IsEmpty]: Start isEmpty. Operand 24432 states and 75342 transitions. [2019-12-07 16:35:05,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:35:05,856 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:35:05,856 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:35:05,856 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:35:05,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:35:05,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1442171729, now seen corresponding path program 8 times [2019-12-07 16:35:05,857 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:35:05,857 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243949423] [2019-12-07 16:35:05,857 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:35:05,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:35:05,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:35:05,994 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243949423] [2019-12-07 16:35:05,994 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:35:05,994 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 16:35:05,994 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647503142] [2019-12-07 16:35:05,994 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:35:05,994 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:35:05,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:35:05,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:35:05,995 INFO L87 Difference]: Start difference. First operand 24432 states and 75342 transitions. Second operand 10 states. [2019-12-07 16:35:06,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:35:06,827 INFO L93 Difference]: Finished difference Result 51500 states and 157725 transitions. [2019-12-07 16:35:06,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 16:35:06,827 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 16:35:06,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:35:06,868 INFO L225 Difference]: With dead ends: 51500 [2019-12-07 16:35:06,868 INFO L226 Difference]: Without dead ends: 34116 [2019-12-07 16:35:06,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 262 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=236, Invalid=886, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 16:35:06,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34116 states. [2019-12-07 16:35:07,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34116 to 20004. [2019-12-07 16:35:07,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20004 states. [2019-12-07 16:35:07,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20004 states to 20004 states and 61068 transitions. [2019-12-07 16:35:07,258 INFO L78 Accepts]: Start accepts. Automaton has 20004 states and 61068 transitions. Word has length 67 [2019-12-07 16:35:07,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:35:07,258 INFO L462 AbstractCegarLoop]: Abstraction has 20004 states and 61068 transitions. [2019-12-07 16:35:07,258 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:35:07,258 INFO L276 IsEmpty]: Start isEmpty. Operand 20004 states and 61068 transitions. [2019-12-07 16:35:07,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:35:07,275 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:35:07,275 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:35:07,275 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:35:07,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:35:07,275 INFO L82 PathProgramCache]: Analyzing trace with hash -2065446981, now seen corresponding path program 9 times [2019-12-07 16:35:07,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:35:07,276 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2087076944] [2019-12-07 16:35:07,276 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:35:07,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:35:07,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:35:07,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2087076944] [2019-12-07 16:35:07,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:35:07,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:35:07,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058474041] [2019-12-07 16:35:07,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:35:07,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:35:07,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:35:07,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:35:07,423 INFO L87 Difference]: Start difference. First operand 20004 states and 61068 transitions. Second operand 11 states. [2019-12-07 16:35:08,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:35:08,092 INFO L93 Difference]: Finished difference Result 36917 states and 112710 transitions. [2019-12-07 16:35:08,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 16:35:08,092 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 16:35:08,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:35:08,132 INFO L225 Difference]: With dead ends: 36917 [2019-12-07 16:35:08,132 INFO L226 Difference]: Without dead ends: 35898 [2019-12-07 16:35:08,133 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=657, Unknown=0, NotChecked=0, Total=812 [2019-12-07 16:35:08,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35898 states. [2019-12-07 16:35:08,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35898 to 23416. [2019-12-07 16:35:08,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23416 states. [2019-12-07 16:35:08,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23416 states to 23416 states and 71736 transitions. [2019-12-07 16:35:08,588 INFO L78 Accepts]: Start accepts. Automaton has 23416 states and 71736 transitions. Word has length 67 [2019-12-07 16:35:08,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:35:08,588 INFO L462 AbstractCegarLoop]: Abstraction has 23416 states and 71736 transitions. [2019-12-07 16:35:08,588 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:35:08,588 INFO L276 IsEmpty]: Start isEmpty. Operand 23416 states and 71736 transitions. [2019-12-07 16:35:08,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:35:08,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:35:08,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:35:08,609 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:35:08,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:35:08,609 INFO L82 PathProgramCache]: Analyzing trace with hash 2136160587, now seen corresponding path program 10 times [2019-12-07 16:35:08,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:35:08,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38850853] [2019-12-07 16:35:08,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:35:08,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:35:08,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:35:08,725 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38850853] [2019-12-07 16:35:08,725 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:35:08,726 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:35:08,726 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329747919] [2019-12-07 16:35:08,726 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:35:08,726 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:35:08,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:35:08,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:35:08,726 INFO L87 Difference]: Start difference. First operand 23416 states and 71736 transitions. Second operand 11 states. [2019-12-07 16:35:09,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:35:09,493 INFO L93 Difference]: Finished difference Result 36614 states and 111163 transitions. [2019-12-07 16:35:09,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 16:35:09,493 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 16:35:09,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:35:09,530 INFO L225 Difference]: With dead ends: 36614 [2019-12-07 16:35:09,530 INFO L226 Difference]: Without dead ends: 32162 [2019-12-07 16:35:09,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=703, Unknown=0, NotChecked=0, Total=870 [2019-12-07 16:35:09,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32162 states. [2019-12-07 16:35:09,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32162 to 19209. [2019-12-07 16:35:09,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19209 states. [2019-12-07 16:35:09,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19209 states to 19209 states and 58395 transitions. [2019-12-07 16:35:09,901 INFO L78 Accepts]: Start accepts. Automaton has 19209 states and 58395 transitions. Word has length 67 [2019-12-07 16:35:09,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:35:09,901 INFO L462 AbstractCegarLoop]: Abstraction has 19209 states and 58395 transitions. [2019-12-07 16:35:09,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:35:09,901 INFO L276 IsEmpty]: Start isEmpty. Operand 19209 states and 58395 transitions. [2019-12-07 16:35:09,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:35:09,919 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:35:09,919 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:35:09,919 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:35:09,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:35:09,919 INFO L82 PathProgramCache]: Analyzing trace with hash -1853423759, now seen corresponding path program 11 times [2019-12-07 16:35:09,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:35:09,919 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1064409104] [2019-12-07 16:35:09,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:35:09,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:35:10,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:35:10,063 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1064409104] [2019-12-07 16:35:10,063 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:35:10,063 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:35:10,063 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885169675] [2019-12-07 16:35:10,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:35:10,064 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:35:10,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:35:10,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:35:10,064 INFO L87 Difference]: Start difference. First operand 19209 states and 58395 transitions. Second operand 12 states. [2019-12-07 16:35:10,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:35:10,751 INFO L93 Difference]: Finished difference Result 32462 states and 97940 transitions. [2019-12-07 16:35:10,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 16:35:10,752 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 16:35:10,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:35:10,787 INFO L225 Difference]: With dead ends: 32462 [2019-12-07 16:35:10,787 INFO L226 Difference]: Without dead ends: 31566 [2019-12-07 16:35:10,788 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 191 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=178, Invalid=814, Unknown=0, NotChecked=0, Total=992 [2019-12-07 16:35:10,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31566 states. [2019-12-07 16:35:11,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31566 to 18485. [2019-12-07 16:35:11,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18485 states. [2019-12-07 16:35:11,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18485 states to 18485 states and 56432 transitions. [2019-12-07 16:35:11,147 INFO L78 Accepts]: Start accepts. Automaton has 18485 states and 56432 transitions. Word has length 67 [2019-12-07 16:35:11,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:35:11,148 INFO L462 AbstractCegarLoop]: Abstraction has 18485 states and 56432 transitions. [2019-12-07 16:35:11,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:35:11,148 INFO L276 IsEmpty]: Start isEmpty. Operand 18485 states and 56432 transitions. [2019-12-07 16:35:11,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:35:11,164 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:35:11,164 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:35:11,164 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:35:11,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:35:11,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1014771687, now seen corresponding path program 12 times [2019-12-07 16:35:11,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:35:11,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380293223] [2019-12-07 16:35:11,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:35:11,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:35:11,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:35:11,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [380293223] [2019-12-07 16:35:11,515 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:35:11,515 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:35:11,515 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071821277] [2019-12-07 16:35:11,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:35:11,516 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:35:11,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:35:11,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:35:11,516 INFO L87 Difference]: Start difference. First operand 18485 states and 56432 transitions. Second operand 12 states. [2019-12-07 16:35:12,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:35:12,016 INFO L93 Difference]: Finished difference Result 21573 states and 65133 transitions. [2019-12-07 16:35:12,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 16:35:12,017 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 16:35:12,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:35:12,038 INFO L225 Difference]: With dead ends: 21573 [2019-12-07 16:35:12,038 INFO L226 Difference]: Without dead ends: 20218 [2019-12-07 16:35:12,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=344, Unknown=0, NotChecked=0, Total=420 [2019-12-07 16:35:12,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20218 states. [2019-12-07 16:35:12,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20218 to 18660. [2019-12-07 16:35:12,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18660 states. [2019-12-07 16:35:12,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18660 states to 18660 states and 56825 transitions. [2019-12-07 16:35:12,321 INFO L78 Accepts]: Start accepts. Automaton has 18660 states and 56825 transitions. Word has length 67 [2019-12-07 16:35:12,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:35:12,321 INFO L462 AbstractCegarLoop]: Abstraction has 18660 states and 56825 transitions. [2019-12-07 16:35:12,321 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:35:12,321 INFO L276 IsEmpty]: Start isEmpty. Operand 18660 states and 56825 transitions. [2019-12-07 16:35:12,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:35:12,337 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:35:12,338 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:35:12,338 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:35:12,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:35:12,338 INFO L82 PathProgramCache]: Analyzing trace with hash 1085688947, now seen corresponding path program 13 times [2019-12-07 16:35:12,338 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:35:12,338 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457091917] [2019-12-07 16:35:12,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:35:12,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:35:12,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:35:12,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457091917] [2019-12-07 16:35:12,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:35:12,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:35:12,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279738583] [2019-12-07 16:35:12,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:35:12,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:35:12,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:35:12,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:35:12,413 INFO L87 Difference]: Start difference. First operand 18660 states and 56825 transitions. Second operand 8 states. [2019-12-07 16:35:12,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:35:12,684 INFO L93 Difference]: Finished difference Result 36848 states and 109883 transitions. [2019-12-07 16:35:12,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 16:35:12,684 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 67 [2019-12-07 16:35:12,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:35:12,719 INFO L225 Difference]: With dead ends: 36848 [2019-12-07 16:35:12,719 INFO L226 Difference]: Without dead ends: 31166 [2019-12-07 16:35:12,719 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:35:12,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31166 states. [2019-12-07 16:35:13,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31166 to 18002. [2019-12-07 16:35:13,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18002 states. [2019-12-07 16:35:13,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18002 states to 18002 states and 55204 transitions. [2019-12-07 16:35:13,068 INFO L78 Accepts]: Start accepts. Automaton has 18002 states and 55204 transitions. Word has length 67 [2019-12-07 16:35:13,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:35:13,068 INFO L462 AbstractCegarLoop]: Abstraction has 18002 states and 55204 transitions. [2019-12-07 16:35:13,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:35:13,068 INFO L276 IsEmpty]: Start isEmpty. Operand 18002 states and 55204 transitions. [2019-12-07 16:35:13,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:35:13,084 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:35:13,084 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:35:13,084 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:35:13,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:35:13,085 INFO L82 PathProgramCache]: Analyzing trace with hash 594227727, now seen corresponding path program 14 times [2019-12-07 16:35:13,085 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:35:13,085 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670452589] [2019-12-07 16:35:13,085 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:35:13,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:35:13,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:35:13,148 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:35:13,149 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:35:13,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (= v_~y~0_18 0) (= 0 v_~a$r_buff1_thd1~0_150) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t257~0.base_33|) (= 0 v_~__unbuffered_p2_EAX~0_31) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (= v_~a$r_buff1_thd3~0_269 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 |v_ULTIMATE.start_main_~#t257~0.offset_23|) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t257~0.base_33| 4) |v_#length_21|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t257~0.base_33|)) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t257~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t257~0.base_33|) |v_ULTIMATE.start_main_~#t257~0.offset_23| 0)) |v_#memory_int_19|) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= v_~a$mem_tmp~0_14 0) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t257~0.base_33| 1) |v_#valid_63|) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t258~0.offset=|v_ULTIMATE.start_main_~#t258~0.offset_19|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ULTIMATE.start_main_~#t259~0.base=|v_ULTIMATE.start_main_~#t259~0.base_25|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ULTIMATE.start_main_~#t257~0.offset=|v_ULTIMATE.start_main_~#t257~0.offset_23|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ~y~0=v_~y~0_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ULTIMATE.start_main_~#t257~0.base=|v_ULTIMATE.start_main_~#t257~0.base_33|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t258~0.base=|v_ULTIMATE.start_main_~#t258~0.base_25|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_~#t259~0.offset=|v_ULTIMATE.start_main_~#t259~0.offset_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t258~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t259~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t257~0.offset, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ULTIMATE.start_main_~#t257~0.base, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t258~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_~#t259~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 16:35:13,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 16:35:13,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t258~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t258~0.base_12|) |v_ULTIMATE.start_main_~#t258~0.offset_10| 1)) |v_#memory_int_13|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t258~0.base_12|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t258~0.base_12|) (not (= 0 |v_ULTIMATE.start_main_~#t258~0.base_12|)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t258~0.base_12| 1)) (= |v_ULTIMATE.start_main_~#t258~0.offset_10| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t258~0.base_12| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t258~0.base=|v_ULTIMATE.start_main_~#t258~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t258~0.offset=|v_ULTIMATE.start_main_~#t258~0.offset_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t258~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t258~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 16:35:13,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t259~0.base_12|) 0) (= |v_ULTIMATE.start_main_~#t259~0.offset_10| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t259~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t259~0.base_12|) |v_ULTIMATE.start_main_~#t259~0.offset_10| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t259~0.base_12|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t259~0.base_12| 4) |v_#length_13|) (not (= 0 |v_ULTIMATE.start_main_~#t259~0.base_12|)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t259~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t259~0.base=|v_ULTIMATE.start_main_~#t259~0.base_12|, ULTIMATE.start_main_~#t259~0.offset=|v_ULTIMATE.start_main_~#t259~0.offset_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t259~0.base, ULTIMATE.start_main_~#t259~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 16:35:13,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1270628512 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1270628512 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1270628512| ~a~0_In1270628512)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out1270628512| ~a$w_buff1~0_In1270628512) (not .cse1)))) InVars {~a~0=~a~0_In1270628512, ~a$w_buff1~0=~a$w_buff1~0_In1270628512, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1270628512, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1270628512} OutVars{~a~0=~a~0_In1270628512, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1270628512|, ~a$w_buff1~0=~a$w_buff1~0_In1270628512, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1270628512, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1270628512} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 16:35:13,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 16:35:13,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd2~0_In-2120576798 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-2120576798 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-2120576798|)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-2120576798 |P1Thread1of1ForFork2_#t~ite11_Out-2120576798|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2120576798, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2120576798} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2120576798, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2120576798, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-2120576798|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 16:35:13,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In683921878 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In683921878 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out683921878|) (not .cse1)) (and (= ~a$w_buff0_used~0_In683921878 |P0Thread1of1ForFork1_#t~ite5_Out683921878|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In683921878, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In683921878} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out683921878|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In683921878, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In683921878} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 16:35:13,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1888449916 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd1~0_In-1888449916 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1888449916 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1888449916 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1888449916|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite6_Out-1888449916| ~a$w_buff1_used~0_In-1888449916)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1888449916, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1888449916, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1888449916, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1888449916} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1888449916|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1888449916, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1888449916, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1888449916, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1888449916} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 16:35:13,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_Out-813296470 ~a$r_buff0_thd1~0_In-813296470)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-813296470 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-813296470 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= 0 ~a$r_buff0_thd1~0_Out-813296470)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-813296470, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-813296470} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-813296470|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-813296470, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-813296470} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:35:13,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In-1813292165 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1813292165 256))) (.cse3 (= (mod ~a$r_buff0_thd1~0_In-1813292165 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1813292165 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1813292165|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite8_Out-1813292165| ~a$r_buff1_thd1~0_In-1813292165)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1813292165, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1813292165, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1813292165, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1813292165} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1813292165|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1813292165, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1813292165, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1813292165, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1813292165} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 16:35:13,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:35:13,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1169790082 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out1169790082| |P2Thread1of1ForFork0_#t~ite21_Out1169790082|) (= |P2Thread1of1ForFork0_#t~ite20_Out1169790082| ~a$w_buff0~0_In1169790082) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1169790082 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In1169790082 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In1169790082 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In1169790082 256) 0)))) (and (= |P2Thread1of1ForFork0_#t~ite21_Out1169790082| ~a$w_buff0~0_In1169790082) (= |P2Thread1of1ForFork0_#t~ite20_In1169790082| |P2Thread1of1ForFork0_#t~ite20_Out1169790082|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1169790082, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1169790082, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1169790082, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1169790082, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1169790082, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1169790082|, ~weak$$choice2~0=~weak$$choice2~0_In1169790082} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1169790082|, ~a$w_buff0~0=~a$w_buff0~0_In1169790082, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1169790082, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1169790082, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1169790082, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1169790082|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1169790082, ~weak$$choice2~0=~weak$$choice2~0_In1169790082} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 16:35:13,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2116064961 256) 0))) (or (and (= ~a$w_buff0_used~0_In-2116064961 |P2Thread1of1ForFork0_#t~ite27_Out-2116064961|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-2116064961| |P2Thread1of1ForFork0_#t~ite26_Out-2116064961|)) (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2116064961 256) 0))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-2116064961 256)) .cse1) (and (= 0 (mod ~a$r_buff1_thd3~0_In-2116064961 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-2116064961 256)))) (= ~a$w_buff0_used~0_In-2116064961 |P2Thread1of1ForFork0_#t~ite26_Out-2116064961|) (= |P2Thread1of1ForFork0_#t~ite27_Out-2116064961| |P2Thread1of1ForFork0_#t~ite26_Out-2116064961|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-2116064961|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2116064961, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2116064961, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2116064961, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2116064961, ~weak$$choice2~0=~weak$$choice2~0_In-2116064961} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-2116064961|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-2116064961|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2116064961, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2116064961, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2116064961, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2116064961, ~weak$$choice2~0=~weak$$choice2~0_In-2116064961} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 16:35:13,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:35:13,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 16:35:13,161 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1080951997 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1080951997 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1080951997| |P2Thread1of1ForFork0_#t~ite38_Out-1080951997|))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1080951997| ~a$w_buff1~0_In-1080951997) .cse2) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-1080951997| ~a~0_In-1080951997) .cse2))) InVars {~a~0=~a~0_In-1080951997, ~a$w_buff1~0=~a$w_buff1~0_In-1080951997, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1080951997, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1080951997} OutVars{~a~0=~a~0_In-1080951997, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1080951997|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1080951997|, ~a$w_buff1~0=~a$w_buff1~0_In-1080951997, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1080951997, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1080951997} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:35:13,161 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-912415421 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-912415421 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-912415421| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-912415421| ~a$w_buff0_used~0_In-912415421) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-912415421, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-912415421} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-912415421|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-912415421, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-912415421} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 16:35:13,162 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1977846877 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-1977846877 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1977846877 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1977846877 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1977846877|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite41_Out-1977846877| ~a$w_buff1_used~0_In-1977846877)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1977846877, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1977846877, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1977846877, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1977846877} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1977846877, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1977846877, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1977846877, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1977846877, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1977846877|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 16:35:13,163 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In1085798377 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In1085798377 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1085798377 256))) (.cse0 (= (mod ~a$r_buff0_thd2~0_In1085798377 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out1085798377| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~a$w_buff1_used~0_In1085798377 |P1Thread1of1ForFork2_#t~ite12_Out1085798377|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1085798377, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1085798377, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1085798377, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1085798377} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1085798377, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1085798377, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1085798377, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1085798377|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1085798377} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 16:35:13,164 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1323440853 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1323440853 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1323440853|)) (and (= ~a$r_buff0_thd2~0_In1323440853 |P1Thread1of1ForFork2_#t~ite13_Out1323440853|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1323440853, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1323440853} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1323440853, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1323440853, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1323440853|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 16:35:13,164 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In122521200 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In122521200 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In122521200 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In122521200 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out122521200| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite14_Out122521200| ~a$r_buff1_thd2~0_In122521200) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In122521200, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In122521200, ~a$w_buff0_used~0=~a$w_buff0_used~0_In122521200, ~a$w_buff1_used~0=~a$w_buff1_used~0_In122521200} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In122521200, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In122521200, ~a$w_buff0_used~0=~a$w_buff0_used~0_In122521200, ~a$w_buff1_used~0=~a$w_buff1_used~0_In122521200, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out122521200|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 16:35:13,165 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:35:13,165 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-606542317 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-606542317 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-606542317|)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-606542317| ~a$r_buff0_thd3~0_In-606542317)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-606542317, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-606542317} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-606542317, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-606542317, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-606542317|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 16:35:13,165 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd3~0_In-1709836715 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-1709836715 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1709836715 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-1709836715 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd3~0_In-1709836715 |P2Thread1of1ForFork0_#t~ite43_Out-1709836715|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1709836715|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1709836715, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1709836715, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1709836715, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1709836715} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1709836715|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1709836715, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1709836715, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1709836715, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1709836715} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 16:35:13,165 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:35:13,165 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:35:13,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1951345974 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1951345974 256) 0))) (or (and (not .cse0) (= ~a$w_buff1~0_In1951345974 |ULTIMATE.start_main_#t~ite47_Out1951345974|) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1951345974| ~a~0_In1951345974)))) InVars {~a~0=~a~0_In1951345974, ~a$w_buff1~0=~a$w_buff1~0_In1951345974, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1951345974, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1951345974} OutVars{~a~0=~a~0_In1951345974, ~a$w_buff1~0=~a$w_buff1~0_In1951345974, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1951345974|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1951345974, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1951345974} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 16:35:13,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:35:13,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1618529024 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1618529024 256)))) (or (and (= ~a$w_buff0_used~0_In-1618529024 |ULTIMATE.start_main_#t~ite49_Out-1618529024|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1618529024|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1618529024, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1618529024} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1618529024, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1618529024|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1618529024} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 16:35:13,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In746743505 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In746743505 256))) (.cse3 (= (mod ~a$r_buff0_thd0~0_In746743505 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In746743505 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In746743505 |ULTIMATE.start_main_#t~ite50_Out746743505|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out746743505|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In746743505, ~a$w_buff0_used~0=~a$w_buff0_used~0_In746743505, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In746743505, ~a$w_buff1_used~0=~a$w_buff1_used~0_In746743505} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out746743505|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In746743505, ~a$w_buff0_used~0=~a$w_buff0_used~0_In746743505, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In746743505, ~a$w_buff1_used~0=~a$w_buff1_used~0_In746743505} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 16:35:13,167 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In745316202 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In745316202 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out745316202|) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite51_Out745316202| ~a$r_buff0_thd0~0_In745316202)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In745316202, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In745316202} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out745316202|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In745316202, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In745316202} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:35:13,167 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In1447108664 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In1447108664 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1447108664 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In1447108664 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1447108664| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite52_Out1447108664| ~a$r_buff1_thd0~0_In1447108664)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1447108664, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1447108664, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1447108664, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1447108664} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1447108664|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1447108664, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1447108664, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1447108664, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1447108664} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 16:35:13,167 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:35:13,225 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:35:13 BasicIcfg [2019-12-07 16:35:13,226 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:35:13,226 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:35:13,226 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:35:13,226 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:35:13,227 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:33:03" (3/4) ... [2019-12-07 16:35:13,229 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:35:13,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (= v_~y~0_18 0) (= 0 v_~a$r_buff1_thd1~0_150) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t257~0.base_33|) (= 0 v_~__unbuffered_p2_EAX~0_31) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (= v_~a$r_buff1_thd3~0_269 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 |v_ULTIMATE.start_main_~#t257~0.offset_23|) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t257~0.base_33| 4) |v_#length_21|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t257~0.base_33|)) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t257~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t257~0.base_33|) |v_ULTIMATE.start_main_~#t257~0.offset_23| 0)) |v_#memory_int_19|) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= v_~a$mem_tmp~0_14 0) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t257~0.base_33| 1) |v_#valid_63|) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t258~0.offset=|v_ULTIMATE.start_main_~#t258~0.offset_19|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ULTIMATE.start_main_~#t259~0.base=|v_ULTIMATE.start_main_~#t259~0.base_25|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ULTIMATE.start_main_~#t257~0.offset=|v_ULTIMATE.start_main_~#t257~0.offset_23|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ~y~0=v_~y~0_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ULTIMATE.start_main_~#t257~0.base=|v_ULTIMATE.start_main_~#t257~0.base_33|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t258~0.base=|v_ULTIMATE.start_main_~#t258~0.base_25|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_~#t259~0.offset=|v_ULTIMATE.start_main_~#t259~0.offset_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t258~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t259~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t257~0.offset, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ULTIMATE.start_main_~#t257~0.base, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t258~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_~#t259~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 16:35:13,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 16:35:13,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t258~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t258~0.base_12|) |v_ULTIMATE.start_main_~#t258~0.offset_10| 1)) |v_#memory_int_13|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t258~0.base_12|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t258~0.base_12|) (not (= 0 |v_ULTIMATE.start_main_~#t258~0.base_12|)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t258~0.base_12| 1)) (= |v_ULTIMATE.start_main_~#t258~0.offset_10| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t258~0.base_12| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t258~0.base=|v_ULTIMATE.start_main_~#t258~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t258~0.offset=|v_ULTIMATE.start_main_~#t258~0.offset_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t258~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t258~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 16:35:13,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t259~0.base_12|) 0) (= |v_ULTIMATE.start_main_~#t259~0.offset_10| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t259~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t259~0.base_12|) |v_ULTIMATE.start_main_~#t259~0.offset_10| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t259~0.base_12|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t259~0.base_12| 4) |v_#length_13|) (not (= 0 |v_ULTIMATE.start_main_~#t259~0.base_12|)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t259~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t259~0.base=|v_ULTIMATE.start_main_~#t259~0.base_12|, ULTIMATE.start_main_~#t259~0.offset=|v_ULTIMATE.start_main_~#t259~0.offset_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t259~0.base, ULTIMATE.start_main_~#t259~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 16:35:13,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1270628512 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1270628512 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1270628512| ~a~0_In1270628512)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out1270628512| ~a$w_buff1~0_In1270628512) (not .cse1)))) InVars {~a~0=~a~0_In1270628512, ~a$w_buff1~0=~a$w_buff1~0_In1270628512, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1270628512, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1270628512} OutVars{~a~0=~a~0_In1270628512, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1270628512|, ~a$w_buff1~0=~a$w_buff1~0_In1270628512, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1270628512, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1270628512} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 16:35:13,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 16:35:13,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd2~0_In-2120576798 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-2120576798 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-2120576798|)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-2120576798 |P1Thread1of1ForFork2_#t~ite11_Out-2120576798|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2120576798, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2120576798} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2120576798, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2120576798, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-2120576798|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 16:35:13,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In683921878 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In683921878 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out683921878|) (not .cse1)) (and (= ~a$w_buff0_used~0_In683921878 |P0Thread1of1ForFork1_#t~ite5_Out683921878|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In683921878, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In683921878} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out683921878|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In683921878, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In683921878} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 16:35:13,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1888449916 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd1~0_In-1888449916 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1888449916 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1888449916 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1888449916|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite6_Out-1888449916| ~a$w_buff1_used~0_In-1888449916)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1888449916, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1888449916, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1888449916, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1888449916} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1888449916|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1888449916, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1888449916, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1888449916, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1888449916} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 16:35:13,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_Out-813296470 ~a$r_buff0_thd1~0_In-813296470)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-813296470 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-813296470 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= 0 ~a$r_buff0_thd1~0_Out-813296470)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-813296470, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-813296470} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-813296470|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-813296470, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-813296470} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:35:13,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In-1813292165 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1813292165 256))) (.cse3 (= (mod ~a$r_buff0_thd1~0_In-1813292165 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1813292165 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1813292165|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite8_Out-1813292165| ~a$r_buff1_thd1~0_In-1813292165)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1813292165, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1813292165, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1813292165, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1813292165} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1813292165|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1813292165, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1813292165, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1813292165, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1813292165} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 16:35:13,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:35:13,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1169790082 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out1169790082| |P2Thread1of1ForFork0_#t~ite21_Out1169790082|) (= |P2Thread1of1ForFork0_#t~ite20_Out1169790082| ~a$w_buff0~0_In1169790082) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1169790082 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In1169790082 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In1169790082 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In1169790082 256) 0)))) (and (= |P2Thread1of1ForFork0_#t~ite21_Out1169790082| ~a$w_buff0~0_In1169790082) (= |P2Thread1of1ForFork0_#t~ite20_In1169790082| |P2Thread1of1ForFork0_#t~ite20_Out1169790082|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1169790082, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1169790082, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1169790082, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1169790082, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1169790082, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1169790082|, ~weak$$choice2~0=~weak$$choice2~0_In1169790082} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1169790082|, ~a$w_buff0~0=~a$w_buff0~0_In1169790082, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1169790082, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1169790082, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1169790082, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1169790082|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1169790082, ~weak$$choice2~0=~weak$$choice2~0_In1169790082} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 16:35:13,235 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2116064961 256) 0))) (or (and (= ~a$w_buff0_used~0_In-2116064961 |P2Thread1of1ForFork0_#t~ite27_Out-2116064961|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-2116064961| |P2Thread1of1ForFork0_#t~ite26_Out-2116064961|)) (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2116064961 256) 0))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-2116064961 256)) .cse1) (and (= 0 (mod ~a$r_buff1_thd3~0_In-2116064961 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-2116064961 256)))) (= ~a$w_buff0_used~0_In-2116064961 |P2Thread1of1ForFork0_#t~ite26_Out-2116064961|) (= |P2Thread1of1ForFork0_#t~ite27_Out-2116064961| |P2Thread1of1ForFork0_#t~ite26_Out-2116064961|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-2116064961|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2116064961, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2116064961, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2116064961, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2116064961, ~weak$$choice2~0=~weak$$choice2~0_In-2116064961} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-2116064961|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-2116064961|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2116064961, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2116064961, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2116064961, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2116064961, ~weak$$choice2~0=~weak$$choice2~0_In-2116064961} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 16:35:13,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:35:13,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 16:35:13,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1080951997 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1080951997 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1080951997| |P2Thread1of1ForFork0_#t~ite38_Out-1080951997|))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1080951997| ~a$w_buff1~0_In-1080951997) .cse2) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-1080951997| ~a~0_In-1080951997) .cse2))) InVars {~a~0=~a~0_In-1080951997, ~a$w_buff1~0=~a$w_buff1~0_In-1080951997, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1080951997, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1080951997} OutVars{~a~0=~a~0_In-1080951997, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1080951997|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1080951997|, ~a$w_buff1~0=~a$w_buff1~0_In-1080951997, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1080951997, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1080951997} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:35:13,238 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-912415421 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-912415421 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-912415421| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-912415421| ~a$w_buff0_used~0_In-912415421) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-912415421, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-912415421} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-912415421|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-912415421, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-912415421} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 16:35:13,238 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1977846877 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-1977846877 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1977846877 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1977846877 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1977846877|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite41_Out-1977846877| ~a$w_buff1_used~0_In-1977846877)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1977846877, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1977846877, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1977846877, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1977846877} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1977846877, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1977846877, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1977846877, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1977846877, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1977846877|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 16:35:13,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In1085798377 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In1085798377 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1085798377 256))) (.cse0 (= (mod ~a$r_buff0_thd2~0_In1085798377 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out1085798377| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~a$w_buff1_used~0_In1085798377 |P1Thread1of1ForFork2_#t~ite12_Out1085798377|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1085798377, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1085798377, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1085798377, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1085798377} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1085798377, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1085798377, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1085798377, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1085798377|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1085798377} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 16:35:13,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1323440853 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1323440853 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1323440853|)) (and (= ~a$r_buff0_thd2~0_In1323440853 |P1Thread1of1ForFork2_#t~ite13_Out1323440853|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1323440853, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1323440853} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1323440853, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1323440853, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1323440853|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 16:35:13,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In122521200 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In122521200 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In122521200 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In122521200 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out122521200| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite14_Out122521200| ~a$r_buff1_thd2~0_In122521200) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In122521200, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In122521200, ~a$w_buff0_used~0=~a$w_buff0_used~0_In122521200, ~a$w_buff1_used~0=~a$w_buff1_used~0_In122521200} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In122521200, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In122521200, ~a$w_buff0_used~0=~a$w_buff0_used~0_In122521200, ~a$w_buff1_used~0=~a$w_buff1_used~0_In122521200, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out122521200|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 16:35:13,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:35:13,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-606542317 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-606542317 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-606542317|)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-606542317| ~a$r_buff0_thd3~0_In-606542317)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-606542317, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-606542317} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-606542317, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-606542317, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-606542317|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 16:35:13,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd3~0_In-1709836715 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-1709836715 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1709836715 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-1709836715 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd3~0_In-1709836715 |P2Thread1of1ForFork0_#t~ite43_Out-1709836715|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1709836715|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1709836715, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1709836715, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1709836715, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1709836715} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1709836715|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1709836715, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1709836715, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1709836715, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1709836715} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 16:35:13,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:35:13,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:35:13,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1951345974 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1951345974 256) 0))) (or (and (not .cse0) (= ~a$w_buff1~0_In1951345974 |ULTIMATE.start_main_#t~ite47_Out1951345974|) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1951345974| ~a~0_In1951345974)))) InVars {~a~0=~a~0_In1951345974, ~a$w_buff1~0=~a$w_buff1~0_In1951345974, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1951345974, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1951345974} OutVars{~a~0=~a~0_In1951345974, ~a$w_buff1~0=~a$w_buff1~0_In1951345974, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1951345974|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1951345974, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1951345974} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 16:35:13,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:35:13,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1618529024 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1618529024 256)))) (or (and (= ~a$w_buff0_used~0_In-1618529024 |ULTIMATE.start_main_#t~ite49_Out-1618529024|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1618529024|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1618529024, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1618529024} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1618529024, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1618529024|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1618529024} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 16:35:13,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In746743505 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In746743505 256))) (.cse3 (= (mod ~a$r_buff0_thd0~0_In746743505 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In746743505 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In746743505 |ULTIMATE.start_main_#t~ite50_Out746743505|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out746743505|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In746743505, ~a$w_buff0_used~0=~a$w_buff0_used~0_In746743505, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In746743505, ~a$w_buff1_used~0=~a$w_buff1_used~0_In746743505} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out746743505|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In746743505, ~a$w_buff0_used~0=~a$w_buff0_used~0_In746743505, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In746743505, ~a$w_buff1_used~0=~a$w_buff1_used~0_In746743505} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 16:35:13,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In745316202 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In745316202 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out745316202|) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite51_Out745316202| ~a$r_buff0_thd0~0_In745316202)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In745316202, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In745316202} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out745316202|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In745316202, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In745316202} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:35:13,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In1447108664 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In1447108664 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1447108664 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In1447108664 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1447108664| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite52_Out1447108664| ~a$r_buff1_thd0~0_In1447108664)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1447108664, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1447108664, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1447108664, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1447108664} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1447108664|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1447108664, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1447108664, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1447108664, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1447108664} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 16:35:13,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:35:13,310 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_46f830d7-4fbc-4a4a-b48a-3e9dd9318302/bin/uautomizer/witness.graphml [2019-12-07 16:35:13,311 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:35:13,311 INFO L168 Benchmark]: Toolchain (without parser) took 130407.32 ms. Allocated memory was 1.0 GB in the beginning and 7.2 GB in the end (delta: 6.1 GB). Free memory was 934.3 MB in the beginning and 3.0 GB in the end (delta: -2.0 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 16:35:13,312 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:35:13,312 INFO L168 Benchmark]: CACSL2BoogieTranslator took 374.41 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 96.5 MB). Free memory was 934.3 MB in the beginning and 1.1 GB in the end (delta: -128.8 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. [2019-12-07 16:35:13,312 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:35:13,312 INFO L168 Benchmark]: Boogie Preprocessor took 25.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:35:13,312 INFO L168 Benchmark]: RCFGBuilder took 403.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 16:35:13,313 INFO L168 Benchmark]: TraceAbstraction took 129475.82 ms. Allocated memory was 1.1 GB in the beginning and 7.2 GB in the end (delta: 6.0 GB). Free memory was 997.2 MB in the beginning and 3.0 GB in the end (delta: -2.0 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 16:35:13,313 INFO L168 Benchmark]: Witness Printer took 84.74 ms. Allocated memory is still 7.2 GB. Free memory was 3.0 GB in the beginning and 3.0 GB in the end (delta: 15.9 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. [2019-12-07 16:35:13,314 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 374.41 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 96.5 MB). Free memory was 934.3 MB in the beginning and 1.1 GB in the end (delta: -128.8 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 403.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 129475.82 ms. Allocated memory was 1.1 GB in the beginning and 7.2 GB in the end (delta: 6.0 GB). Free memory was 997.2 MB in the beginning and 3.0 GB in the end (delta: -2.0 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. * Witness Printer took 84.74 ms. Allocated memory is still 7.2 GB. Free memory was 3.0 GB in the beginning and 3.0 GB in the end (delta: 15.9 MB). Peak memory consumption was 15.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 179 ProgramPointsBefore, 95 ProgramPointsAfterwards, 216 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 31 ChoiceCompositions, 6646 VarBasedMoverChecksPositive, 237 VarBasedMoverChecksNegative, 59 SemBasedMoverChecksPositive, 236 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 91218 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t257, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L742] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L743] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L744] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L745] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L746] 1 a$r_buff0_thd1 = (_Bool)1 [L749] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L752] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t258, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L766] 2 x = 1 [L769] 2 y = 1 [L772] 2 __unbuffered_p1_EAX = y [L775] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L841] FCALL, FORK 0 pthread_create(&t259, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L752] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L753] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L754] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 129.3s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 43.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9250 SDtfs, 13140 SDslu, 40028 SDs, 0 SdLazy, 27747 SolverSat, 617 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 21.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 579 GetRequests, 39 SyntacticMatches, 31 SemanticMatches, 509 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3653 ImplicationChecksByTransitivity, 8.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=230321occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 59.9s AutomataMinimizationTime, 33 MinimizatonAttempts, 341892 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 3.0s InterpolantComputationTime, 1621 NumberOfCodeBlocks, 1621 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 1521 ConstructedInterpolants, 0 QuantifiedInterpolants, 839677 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...