./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix010_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix010_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6122c6ed5487cba326ea541e53b8da5961bfa0c8 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:09:46,070 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:09:46,071 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:09:46,079 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:09:46,079 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:09:46,080 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:09:46,081 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:09:46,082 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:09:46,083 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:09:46,084 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:09:46,085 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:09:46,085 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:09:46,086 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:09:46,086 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:09:46,087 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:09:46,088 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:09:46,088 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:09:46,089 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:09:46,090 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:09:46,092 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:09:46,093 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:09:46,093 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:09:46,094 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:09:46,094 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:09:46,096 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:09:46,096 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:09:46,096 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:09:46,097 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:09:46,097 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:09:46,098 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:09:46,098 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:09:46,098 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:09:46,099 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:09:46,099 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:09:46,100 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:09:46,100 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:09:46,100 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:09:46,100 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:09:46,100 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:09:46,101 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:09:46,101 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:09:46,102 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:09:46,111 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:09:46,111 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:09:46,112 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:09:46,112 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:09:46,112 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:09:46,112 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:09:46,112 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:09:46,112 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:09:46,112 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:09:46,112 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:09:46,112 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:09:46,113 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:09:46,113 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:09:46,114 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:09:46,114 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:09:46,114 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:09:46,114 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:09:46,114 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:09:46,114 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:09:46,114 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:09:46,114 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:09:46,115 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6122c6ed5487cba326ea541e53b8da5961bfa0c8 [2019-12-07 15:09:46,216 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:09:46,226 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:09:46,229 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:09:46,230 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:09:46,230 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:09:46,231 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix010_pso.oepc.i [2019-12-07 15:09:46,278 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/data/54a891c99/5fd85cf8616a4f7a824cd45d83a0a6ef/FLAG7b89429bc [2019-12-07 15:09:46,732 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:09:46,733 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/sv-benchmarks/c/pthread-wmm/mix010_pso.oepc.i [2019-12-07 15:09:46,743 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/data/54a891c99/5fd85cf8616a4f7a824cd45d83a0a6ef/FLAG7b89429bc [2019-12-07 15:09:46,752 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/data/54a891c99/5fd85cf8616a4f7a824cd45d83a0a6ef [2019-12-07 15:09:46,754 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:09:46,755 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:09:46,756 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:09:46,756 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:09:46,758 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:09:46,759 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:09:46" (1/1) ... [2019-12-07 15:09:46,760 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:46, skipping insertion in model container [2019-12-07 15:09:46,761 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:09:46" (1/1) ... [2019-12-07 15:09:46,765 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:09:46,793 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:09:47,047 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:09:47,055 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:09:47,099 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:09:47,145 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:09:47,145 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47 WrapperNode [2019-12-07 15:09:47,145 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:09:47,146 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:09:47,146 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:09:47,146 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:09:47,151 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,165 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,184 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:09:47,185 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:09:47,185 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:09:47,185 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:09:47,191 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,192 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,195 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,195 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,204 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,207 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,209 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... [2019-12-07 15:09:47,212 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:09:47,213 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:09:47,213 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:09:47,213 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:09:47,214 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:09:47,256 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:09:47,256 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:09:47,256 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:09:47,256 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:09:47,256 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:09:47,256 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:09:47,256 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:09:47,256 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:09:47,256 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:09:47,257 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:09:47,257 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:09:47,257 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:09:47,257 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:09:47,258 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:09:47,658 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:09:47,658 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:09:47,659 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:09:47 BoogieIcfgContainer [2019-12-07 15:09:47,659 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:09:47,660 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:09:47,660 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:09:47,663 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:09:47,663 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:09:46" (1/3) ... [2019-12-07 15:09:47,663 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4539ad3a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:09:47, skipping insertion in model container [2019-12-07 15:09:47,664 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:09:47" (2/3) ... [2019-12-07 15:09:47,664 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4539ad3a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:09:47, skipping insertion in model container [2019-12-07 15:09:47,664 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:09:47" (3/3) ... [2019-12-07 15:09:47,665 INFO L109 eAbstractionObserver]: Analyzing ICFG mix010_pso.oepc.i [2019-12-07 15:09:47,674 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:09:47,674 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:09:47,681 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:09:47,681 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:09:47,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,708 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,708 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,708 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,709 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,709 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,713 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,713 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,713 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,713 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,713 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,713 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,714 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,715 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,715 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,718 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,719 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,721 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,721 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,736 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,737 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:09:47,750 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:09:47,762 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:09:47,762 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:09:47,762 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:09:47,763 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:09:47,763 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:09:47,763 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:09:47,763 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:09:47,763 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:09:47,774 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 15:09:47,775 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 15:09:47,829 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 15:09:47,829 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:09:47,840 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:09:47,855 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 15:09:47,886 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 15:09:47,886 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:09:47,891 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:09:47,908 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 15:09:47,909 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:09:50,573 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 15:09:50,892 WARN L192 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 15:09:50,997 INFO L206 etLargeBlockEncoding]: Checked pairs total: 91218 [2019-12-07 15:09:50,997 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 15:09:51,000 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 105 transitions [2019-12-07 15:10:07,736 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 15:10:07,737 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 15:10:07,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:10:07,741 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:10:07,741 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:10:07,742 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:10:07,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:10:07,745 INFO L82 PathProgramCache]: Analyzing trace with hash 921826, now seen corresponding path program 1 times [2019-12-07 15:10:07,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:10:07,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359222711] [2019-12-07 15:10:07,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:10:07,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:10:07,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:10:07,889 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359222711] [2019-12-07 15:10:07,889 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:10:07,890 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:10:07,890 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1096493830] [2019-12-07 15:10:07,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:10:07,894 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:10:07,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:10:07,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:10:07,904 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 15:10:08,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:10:08,627 INFO L93 Difference]: Finished difference Result 125226 states and 534182 transitions. [2019-12-07 15:10:08,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:10:08,628 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:10:08,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:10:09,252 INFO L225 Difference]: With dead ends: 125226 [2019-12-07 15:10:09,253 INFO L226 Difference]: Without dead ends: 117946 [2019-12-07 15:10:09,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:10:16,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117946 states. [2019-12-07 15:10:17,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117946 to 117946. [2019-12-07 15:10:17,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117946 states. [2019-12-07 15:10:17,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117946 states to 117946 states and 502500 transitions. [2019-12-07 15:10:17,994 INFO L78 Accepts]: Start accepts. Automaton has 117946 states and 502500 transitions. Word has length 3 [2019-12-07 15:10:17,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:10:17,995 INFO L462 AbstractCegarLoop]: Abstraction has 117946 states and 502500 transitions. [2019-12-07 15:10:17,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:10:17,995 INFO L276 IsEmpty]: Start isEmpty. Operand 117946 states and 502500 transitions. [2019-12-07 15:10:17,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:10:17,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:10:17,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:10:17,999 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:10:17,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:10:17,999 INFO L82 PathProgramCache]: Analyzing trace with hash -2034548154, now seen corresponding path program 1 times [2019-12-07 15:10:17,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:10:17,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [906728916] [2019-12-07 15:10:17,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:10:18,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:10:18,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:10:18,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [906728916] [2019-12-07 15:10:18,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:10:18,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:10:18,059 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508334448] [2019-12-07 15:10:18,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:10:18,060 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:10:18,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:10:18,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:10:18,060 INFO L87 Difference]: Start difference. First operand 117946 states and 502500 transitions. Second operand 4 states. [2019-12-07 15:10:19,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:10:19,328 INFO L93 Difference]: Finished difference Result 183040 states and 750092 transitions. [2019-12-07 15:10:19,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:10:19,329 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:10:19,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:10:19,793 INFO L225 Difference]: With dead ends: 183040 [2019-12-07 15:10:19,793 INFO L226 Difference]: Without dead ends: 182991 [2019-12-07 15:10:19,794 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:10:28,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182991 states. [2019-12-07 15:10:30,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182991 to 168271. [2019-12-07 15:10:30,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168271 states. [2019-12-07 15:10:31,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168271 states to 168271 states and 697811 transitions. [2019-12-07 15:10:31,254 INFO L78 Accepts]: Start accepts. Automaton has 168271 states and 697811 transitions. Word has length 11 [2019-12-07 15:10:31,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:10:31,254 INFO L462 AbstractCegarLoop]: Abstraction has 168271 states and 697811 transitions. [2019-12-07 15:10:31,254 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:10:31,254 INFO L276 IsEmpty]: Start isEmpty. Operand 168271 states and 697811 transitions. [2019-12-07 15:10:31,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:10:31,259 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:10:31,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:10:31,259 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:10:31,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:10:31,260 INFO L82 PathProgramCache]: Analyzing trace with hash -579003435, now seen corresponding path program 1 times [2019-12-07 15:10:31,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:10:31,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704071951] [2019-12-07 15:10:31,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:10:31,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:10:31,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:10:31,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704071951] [2019-12-07 15:10:31,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:10:31,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:10:31,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [124714298] [2019-12-07 15:10:31,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:10:31,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:10:31,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:10:31,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:10:31,309 INFO L87 Difference]: Start difference. First operand 168271 states and 697811 transitions. Second operand 4 states. [2019-12-07 15:10:32,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:10:32,515 INFO L93 Difference]: Finished difference Result 237004 states and 961776 transitions. [2019-12-07 15:10:32,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:10:32,516 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:10:32,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:10:33,654 INFO L225 Difference]: With dead ends: 237004 [2019-12-07 15:10:33,654 INFO L226 Difference]: Without dead ends: 236948 [2019-12-07 15:10:33,655 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:10:43,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236948 states. [2019-12-07 15:10:46,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236948 to 201086. [2019-12-07 15:10:46,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201086 states. [2019-12-07 15:10:46,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201086 states to 201086 states and 829537 transitions. [2019-12-07 15:10:46,725 INFO L78 Accepts]: Start accepts. Automaton has 201086 states and 829537 transitions. Word has length 13 [2019-12-07 15:10:46,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:10:46,726 INFO L462 AbstractCegarLoop]: Abstraction has 201086 states and 829537 transitions. [2019-12-07 15:10:46,726 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:10:46,726 INFO L276 IsEmpty]: Start isEmpty. Operand 201086 states and 829537 transitions. [2019-12-07 15:10:46,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:10:46,736 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:10:46,736 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:10:46,736 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:10:46,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:10:46,736 INFO L82 PathProgramCache]: Analyzing trace with hash -1458626840, now seen corresponding path program 1 times [2019-12-07 15:10:46,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:10:46,737 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045629991] [2019-12-07 15:10:46,737 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:10:46,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:10:46,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:10:46,804 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2045629991] [2019-12-07 15:10:46,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:10:46,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:10:46,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1223721630] [2019-12-07 15:10:46,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:10:46,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:10:46,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:10:46,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:10:46,805 INFO L87 Difference]: Start difference. First operand 201086 states and 829537 transitions. Second operand 5 states. [2019-12-07 15:10:48,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:10:48,209 INFO L93 Difference]: Finished difference Result 275142 states and 1124357 transitions. [2019-12-07 15:10:48,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:10:48,210 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 15:10:48,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:10:49,503 INFO L225 Difference]: With dead ends: 275142 [2019-12-07 15:10:49,503 INFO L226 Difference]: Without dead ends: 275142 [2019-12-07 15:10:49,503 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:10:59,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275142 states. [2019-12-07 15:11:03,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275142 to 230321. [2019-12-07 15:11:03,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230321 states. [2019-12-07 15:11:04,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230321 states to 230321 states and 948783 transitions. [2019-12-07 15:11:04,208 INFO L78 Accepts]: Start accepts. Automaton has 230321 states and 948783 transitions. Word has length 16 [2019-12-07 15:11:04,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:04,208 INFO L462 AbstractCegarLoop]: Abstraction has 230321 states and 948783 transitions. [2019-12-07 15:11:04,208 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:11:04,208 INFO L276 IsEmpty]: Start isEmpty. Operand 230321 states and 948783 transitions. [2019-12-07 15:11:04,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:11:04,220 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:04,220 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:04,221 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:04,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:04,221 INFO L82 PathProgramCache]: Analyzing trace with hash -1933654436, now seen corresponding path program 1 times [2019-12-07 15:11:04,221 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:04,221 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465638033] [2019-12-07 15:11:04,221 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:04,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:04,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:04,258 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1465638033] [2019-12-07 15:11:04,258 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:04,258 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:11:04,258 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [53472227] [2019-12-07 15:11:04,259 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:11:04,259 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:04,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:11:04,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:04,259 INFO L87 Difference]: Start difference. First operand 230321 states and 948783 transitions. Second operand 3 states. [2019-12-07 15:11:05,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:05,195 INFO L93 Difference]: Finished difference Result 217163 states and 885294 transitions. [2019-12-07 15:11:05,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:11:05,196 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:11:05,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:05,764 INFO L225 Difference]: With dead ends: 217163 [2019-12-07 15:11:05,764 INFO L226 Difference]: Without dead ends: 217163 [2019-12-07 15:11:05,765 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:12,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217163 states. [2019-12-07 15:11:15,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217163 to 214125. [2019-12-07 15:11:15,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214125 states. [2019-12-07 15:11:16,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214125 states to 214125 states and 874034 transitions. [2019-12-07 15:11:16,441 INFO L78 Accepts]: Start accepts. Automaton has 214125 states and 874034 transitions. Word has length 18 [2019-12-07 15:11:16,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:16,442 INFO L462 AbstractCegarLoop]: Abstraction has 214125 states and 874034 transitions. [2019-12-07 15:11:16,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:11:16,442 INFO L276 IsEmpty]: Start isEmpty. Operand 214125 states and 874034 transitions. [2019-12-07 15:11:16,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:11:16,452 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:16,452 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:16,452 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:16,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:16,453 INFO L82 PathProgramCache]: Analyzing trace with hash 1771299396, now seen corresponding path program 1 times [2019-12-07 15:11:16,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:16,453 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1544473244] [2019-12-07 15:11:16,453 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:16,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:16,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:16,484 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1544473244] [2019-12-07 15:11:16,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:16,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:11:16,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1162038770] [2019-12-07 15:11:16,484 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:11:16,484 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:16,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:11:16,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:16,485 INFO L87 Difference]: Start difference. First operand 214125 states and 874034 transitions. Second operand 3 states. [2019-12-07 15:11:16,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:16,605 INFO L93 Difference]: Finished difference Result 38715 states and 124641 transitions. [2019-12-07 15:11:16,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:11:16,605 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:11:16,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:16,656 INFO L225 Difference]: With dead ends: 38715 [2019-12-07 15:11:16,656 INFO L226 Difference]: Without dead ends: 38715 [2019-12-07 15:11:16,656 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:16,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38715 states. [2019-12-07 15:11:17,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38715 to 38715. [2019-12-07 15:11:17,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38715 states. [2019-12-07 15:11:17,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38715 states to 38715 states and 124641 transitions. [2019-12-07 15:11:17,638 INFO L78 Accepts]: Start accepts. Automaton has 38715 states and 124641 transitions. Word has length 18 [2019-12-07 15:11:17,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:17,638 INFO L462 AbstractCegarLoop]: Abstraction has 38715 states and 124641 transitions. [2019-12-07 15:11:17,638 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:11:17,638 INFO L276 IsEmpty]: Start isEmpty. Operand 38715 states and 124641 transitions. [2019-12-07 15:11:17,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:11:17,643 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:17,644 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:17,644 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:17,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:17,644 INFO L82 PathProgramCache]: Analyzing trace with hash -311730194, now seen corresponding path program 1 times [2019-12-07 15:11:17,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:17,644 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1196933143] [2019-12-07 15:11:17,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:17,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:17,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:17,696 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1196933143] [2019-12-07 15:11:17,696 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:17,696 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:11:17,696 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [565369590] [2019-12-07 15:11:17,696 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:11:17,696 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:17,697 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:11:17,697 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:11:17,697 INFO L87 Difference]: Start difference. First operand 38715 states and 124641 transitions. Second operand 7 states. [2019-12-07 15:11:18,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:18,275 INFO L93 Difference]: Finished difference Result 62533 states and 195722 transitions. [2019-12-07 15:11:18,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 15:11:18,276 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 15:11:18,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:18,362 INFO L225 Difference]: With dead ends: 62533 [2019-12-07 15:11:18,362 INFO L226 Difference]: Without dead ends: 62519 [2019-12-07 15:11:18,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:11:18,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62519 states. [2019-12-07 15:11:19,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62519 to 38429. [2019-12-07 15:11:19,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38429 states. [2019-12-07 15:11:19,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38429 states to 38429 states and 123216 transitions. [2019-12-07 15:11:19,175 INFO L78 Accepts]: Start accepts. Automaton has 38429 states and 123216 transitions. Word has length 22 [2019-12-07 15:11:19,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:19,176 INFO L462 AbstractCegarLoop]: Abstraction has 38429 states and 123216 transitions. [2019-12-07 15:11:19,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:11:19,176 INFO L276 IsEmpty]: Start isEmpty. Operand 38429 states and 123216 transitions. [2019-12-07 15:11:19,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 15:11:19,184 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:19,185 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:19,185 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:19,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:19,185 INFO L82 PathProgramCache]: Analyzing trace with hash 573582081, now seen corresponding path program 1 times [2019-12-07 15:11:19,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:19,185 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359225777] [2019-12-07 15:11:19,185 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:19,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:19,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:19,232 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359225777] [2019-12-07 15:11:19,232 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:19,232 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:11:19,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122362093] [2019-12-07 15:11:19,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:11:19,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:19,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:11:19,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:11:19,233 INFO L87 Difference]: Start difference. First operand 38429 states and 123216 transitions. Second operand 5 states. [2019-12-07 15:11:19,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:19,620 INFO L93 Difference]: Finished difference Result 54199 states and 170621 transitions. [2019-12-07 15:11:19,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:11:19,621 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 15:11:19,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:19,702 INFO L225 Difference]: With dead ends: 54199 [2019-12-07 15:11:19,702 INFO L226 Difference]: Without dead ends: 54186 [2019-12-07 15:11:19,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:11:20,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54186 states. [2019-12-07 15:11:21,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54186 to 46269. [2019-12-07 15:11:21,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46269 states. [2019-12-07 15:11:21,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46269 states to 46269 states and 147756 transitions. [2019-12-07 15:11:21,411 INFO L78 Accepts]: Start accepts. Automaton has 46269 states and 147756 transitions. Word has length 25 [2019-12-07 15:11:21,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:21,411 INFO L462 AbstractCegarLoop]: Abstraction has 46269 states and 147756 transitions. [2019-12-07 15:11:21,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:11:21,411 INFO L276 IsEmpty]: Start isEmpty. Operand 46269 states and 147756 transitions. [2019-12-07 15:11:21,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:11:21,423 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:21,423 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:21,423 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:21,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:21,424 INFO L82 PathProgramCache]: Analyzing trace with hash 574668024, now seen corresponding path program 1 times [2019-12-07 15:11:21,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:21,424 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [576486504] [2019-12-07 15:11:21,424 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:21,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:21,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:21,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [576486504] [2019-12-07 15:11:21,469 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:21,469 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:11:21,469 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831772403] [2019-12-07 15:11:21,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:11:21,469 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:21,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:11:21,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:11:21,470 INFO L87 Difference]: Start difference. First operand 46269 states and 147756 transitions. Second operand 6 states. [2019-12-07 15:11:21,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:21,917 INFO L93 Difference]: Finished difference Result 67302 states and 209339 transitions. [2019-12-07 15:11:21,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 15:11:21,918 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 15:11:21,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:22,010 INFO L225 Difference]: With dead ends: 67302 [2019-12-07 15:11:22,011 INFO L226 Difference]: Without dead ends: 67262 [2019-12-07 15:11:22,011 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:11:22,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67262 states. [2019-12-07 15:11:22,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67262 to 49950. [2019-12-07 15:11:22,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49950 states. [2019-12-07 15:11:23,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49950 states to 49950 states and 158527 transitions. [2019-12-07 15:11:23,129 INFO L78 Accepts]: Start accepts. Automaton has 49950 states and 158527 transitions. Word has length 27 [2019-12-07 15:11:23,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:23,130 INFO L462 AbstractCegarLoop]: Abstraction has 49950 states and 158527 transitions. [2019-12-07 15:11:23,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:11:23,130 INFO L276 IsEmpty]: Start isEmpty. Operand 49950 states and 158527 transitions. [2019-12-07 15:11:23,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:11:23,146 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:23,146 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:23,146 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:23,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:23,146 INFO L82 PathProgramCache]: Analyzing trace with hash -1649688558, now seen corresponding path program 1 times [2019-12-07 15:11:23,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:23,147 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47797930] [2019-12-07 15:11:23,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:23,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:23,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:23,177 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47797930] [2019-12-07 15:11:23,177 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:23,177 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:11:23,177 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119722746] [2019-12-07 15:11:23,177 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:11:23,177 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:23,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:11:23,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:11:23,178 INFO L87 Difference]: Start difference. First operand 49950 states and 158527 transitions. Second operand 4 states. [2019-12-07 15:11:23,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:23,232 INFO L93 Difference]: Finished difference Result 19137 states and 58196 transitions. [2019-12-07 15:11:23,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:11:23,232 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 15:11:23,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:23,253 INFO L225 Difference]: With dead ends: 19137 [2019-12-07 15:11:23,253 INFO L226 Difference]: Without dead ends: 19137 [2019-12-07 15:11:23,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:11:23,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19137 states. [2019-12-07 15:11:23,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19137 to 18045. [2019-12-07 15:11:23,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18045 states. [2019-12-07 15:11:23,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18045 states to 18045 states and 54852 transitions. [2019-12-07 15:11:23,518 INFO L78 Accepts]: Start accepts. Automaton has 18045 states and 54852 transitions. Word has length 29 [2019-12-07 15:11:23,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:23,518 INFO L462 AbstractCegarLoop]: Abstraction has 18045 states and 54852 transitions. [2019-12-07 15:11:23,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:11:23,518 INFO L276 IsEmpty]: Start isEmpty. Operand 18045 states and 54852 transitions. [2019-12-07 15:11:23,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:11:23,535 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:23,535 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:23,535 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:23,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:23,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1393723506, now seen corresponding path program 1 times [2019-12-07 15:11:23,536 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:23,536 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102453322] [2019-12-07 15:11:23,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:23,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:23,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:23,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2102453322] [2019-12-07 15:11:23,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:23,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:11:23,570 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917784511] [2019-12-07 15:11:23,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:11:23,571 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:23,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:11:23,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:11:23,571 INFO L87 Difference]: Start difference. First operand 18045 states and 54852 transitions. Second operand 5 states. [2019-12-07 15:11:23,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:23,798 INFO L93 Difference]: Finished difference Result 20718 states and 62293 transitions. [2019-12-07 15:11:23,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:11:23,798 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 15:11:23,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:23,819 INFO L225 Difference]: With dead ends: 20718 [2019-12-07 15:11:23,820 INFO L226 Difference]: Without dead ends: 20718 [2019-12-07 15:11:23,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:11:23,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20718 states. [2019-12-07 15:11:24,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20718 to 18157. [2019-12-07 15:11:24,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18157 states. [2019-12-07 15:11:24,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18157 states to 18157 states and 55235 transitions. [2019-12-07 15:11:24,099 INFO L78 Accepts]: Start accepts. Automaton has 18157 states and 55235 transitions. Word has length 33 [2019-12-07 15:11:24,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:24,099 INFO L462 AbstractCegarLoop]: Abstraction has 18157 states and 55235 transitions. [2019-12-07 15:11:24,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:11:24,100 INFO L276 IsEmpty]: Start isEmpty. Operand 18157 states and 55235 transitions. [2019-12-07 15:11:24,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:11:24,114 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:24,115 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:24,115 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:24,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:24,115 INFO L82 PathProgramCache]: Analyzing trace with hash 305072172, now seen corresponding path program 2 times [2019-12-07 15:11:24,115 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:24,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222795198] [2019-12-07 15:11:24,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:24,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:24,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:24,177 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [222795198] [2019-12-07 15:11:24,177 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:24,177 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:11:24,177 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673776425] [2019-12-07 15:11:24,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:11:24,178 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:24,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:11:24,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:11:24,178 INFO L87 Difference]: Start difference. First operand 18157 states and 55235 transitions. Second operand 8 states. [2019-12-07 15:11:24,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:24,993 INFO L93 Difference]: Finished difference Result 25280 states and 74289 transitions. [2019-12-07 15:11:24,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 15:11:24,994 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 15:11:24,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:25,021 INFO L225 Difference]: With dead ends: 25280 [2019-12-07 15:11:25,022 INFO L226 Difference]: Without dead ends: 25280 [2019-12-07 15:11:25,022 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=352, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:11:25,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25280 states. [2019-12-07 15:11:25,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25280 to 17076. [2019-12-07 15:11:25,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17076 states. [2019-12-07 15:11:25,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17076 states to 17076 states and 51553 transitions. [2019-12-07 15:11:25,325 INFO L78 Accepts]: Start accepts. Automaton has 17076 states and 51553 transitions. Word has length 33 [2019-12-07 15:11:25,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:25,325 INFO L462 AbstractCegarLoop]: Abstraction has 17076 states and 51553 transitions. [2019-12-07 15:11:25,325 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:11:25,325 INFO L276 IsEmpty]: Start isEmpty. Operand 17076 states and 51553 transitions. [2019-12-07 15:11:25,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:11:25,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:25,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:25,339 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:25,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:25,339 INFO L82 PathProgramCache]: Analyzing trace with hash -875459779, now seen corresponding path program 1 times [2019-12-07 15:11:25,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:25,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429468308] [2019-12-07 15:11:25,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:25,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:25,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:25,386 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429468308] [2019-12-07 15:11:25,386 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:25,386 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:11:25,386 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656640762] [2019-12-07 15:11:25,386 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:11:25,386 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:25,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:11:25,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:25,387 INFO L87 Difference]: Start difference. First operand 17076 states and 51553 transitions. Second operand 3 states. [2019-12-07 15:11:25,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:25,447 INFO L93 Difference]: Finished difference Result 16312 states and 48534 transitions. [2019-12-07 15:11:25,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:11:25,448 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 15:11:25,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:25,466 INFO L225 Difference]: With dead ends: 16312 [2019-12-07 15:11:25,466 INFO L226 Difference]: Without dead ends: 16312 [2019-12-07 15:11:25,467 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:25,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16312 states. [2019-12-07 15:11:25,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16312 to 16038. [2019-12-07 15:11:25,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16038 states. [2019-12-07 15:11:25,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16038 states to 16038 states and 47766 transitions. [2019-12-07 15:11:25,692 INFO L78 Accepts]: Start accepts. Automaton has 16038 states and 47766 transitions. Word has length 40 [2019-12-07 15:11:25,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:25,692 INFO L462 AbstractCegarLoop]: Abstraction has 16038 states and 47766 transitions. [2019-12-07 15:11:25,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:11:25,692 INFO L276 IsEmpty]: Start isEmpty. Operand 16038 states and 47766 transitions. [2019-12-07 15:11:25,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:11:25,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:25,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:25,705 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:25,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:25,705 INFO L82 PathProgramCache]: Analyzing trace with hash -2067606308, now seen corresponding path program 1 times [2019-12-07 15:11:25,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:25,705 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630959281] [2019-12-07 15:11:25,705 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:25,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:25,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:25,745 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630959281] [2019-12-07 15:11:25,745 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:25,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:11:25,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835295581] [2019-12-07 15:11:25,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:11:25,746 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:25,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:11:25,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:11:25,746 INFO L87 Difference]: Start difference. First operand 16038 states and 47766 transitions. Second operand 5 states. [2019-12-07 15:11:25,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:25,797 INFO L93 Difference]: Finished difference Result 14678 states and 44802 transitions. [2019-12-07 15:11:25,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:11:25,797 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 15:11:25,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:25,814 INFO L225 Difference]: With dead ends: 14678 [2019-12-07 15:11:25,814 INFO L226 Difference]: Without dead ends: 14678 [2019-12-07 15:11:25,815 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:11:25,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14678 states. [2019-12-07 15:11:26,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14678 to 13382. [2019-12-07 15:11:26,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13382 states. [2019-12-07 15:11:26,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13382 states to 13382 states and 41074 transitions. [2019-12-07 15:11:26,098 INFO L78 Accepts]: Start accepts. Automaton has 13382 states and 41074 transitions. Word has length 41 [2019-12-07 15:11:26,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:26,099 INFO L462 AbstractCegarLoop]: Abstraction has 13382 states and 41074 transitions. [2019-12-07 15:11:26,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:11:26,099 INFO L276 IsEmpty]: Start isEmpty. Operand 13382 states and 41074 transitions. [2019-12-07 15:11:26,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:11:26,111 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:26,111 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:26,111 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:26,111 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:26,111 INFO L82 PathProgramCache]: Analyzing trace with hash 338241501, now seen corresponding path program 1 times [2019-12-07 15:11:26,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:26,111 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16407928] [2019-12-07 15:11:26,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:26,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:26,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:26,142 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16407928] [2019-12-07 15:11:26,142 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:26,142 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:11:26,142 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2135753876] [2019-12-07 15:11:26,142 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:11:26,142 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:26,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:11:26,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:26,142 INFO L87 Difference]: Start difference. First operand 13382 states and 41074 transitions. Second operand 3 states. [2019-12-07 15:11:26,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:26,225 INFO L93 Difference]: Finished difference Result 18284 states and 56386 transitions. [2019-12-07 15:11:26,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:11:26,226 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:11:26,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:26,247 INFO L225 Difference]: With dead ends: 18284 [2019-12-07 15:11:26,247 INFO L226 Difference]: Without dead ends: 18284 [2019-12-07 15:11:26,248 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:26,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18284 states. [2019-12-07 15:11:26,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18284 to 14580. [2019-12-07 15:11:26,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14580 states. [2019-12-07 15:11:26,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14580 states to 14580 states and 45263 transitions. [2019-12-07 15:11:26,493 INFO L78 Accepts]: Start accepts. Automaton has 14580 states and 45263 transitions. Word has length 66 [2019-12-07 15:11:26,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:26,493 INFO L462 AbstractCegarLoop]: Abstraction has 14580 states and 45263 transitions. [2019-12-07 15:11:26,493 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:11:26,493 INFO L276 IsEmpty]: Start isEmpty. Operand 14580 states and 45263 transitions. [2019-12-07 15:11:26,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:11:26,507 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:26,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:26,507 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:26,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:26,507 INFO L82 PathProgramCache]: Analyzing trace with hash 1326528610, now seen corresponding path program 1 times [2019-12-07 15:11:26,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:26,507 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261544764] [2019-12-07 15:11:26,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:26,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:26,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:26,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261544764] [2019-12-07 15:11:26,548 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:26,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:11:26,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [473772341] [2019-12-07 15:11:26,549 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:11:26,549 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:26,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:11:26,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:26,550 INFO L87 Difference]: Start difference. First operand 14580 states and 45263 transitions. Second operand 3 states. [2019-12-07 15:11:26,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:26,628 INFO L93 Difference]: Finished difference Result 17618 states and 54508 transitions. [2019-12-07 15:11:26,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:11:26,629 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:11:26,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:26,649 INFO L225 Difference]: With dead ends: 17618 [2019-12-07 15:11:26,649 INFO L226 Difference]: Without dead ends: 17618 [2019-12-07 15:11:26,649 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:11:26,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17618 states. [2019-12-07 15:11:26,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17618 to 14864. [2019-12-07 15:11:26,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14864 states. [2019-12-07 15:11:26,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14864 states to 14864 states and 46297 transitions. [2019-12-07 15:11:26,899 INFO L78 Accepts]: Start accepts. Automaton has 14864 states and 46297 transitions. Word has length 66 [2019-12-07 15:11:26,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:26,900 INFO L462 AbstractCegarLoop]: Abstraction has 14864 states and 46297 transitions. [2019-12-07 15:11:26,900 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:11:26,900 INFO L276 IsEmpty]: Start isEmpty. Operand 14864 states and 46297 transitions. [2019-12-07 15:11:26,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:26,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:26,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:26,913 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:26,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:26,913 INFO L82 PathProgramCache]: Analyzing trace with hash 323085019, now seen corresponding path program 1 times [2019-12-07 15:11:26,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:26,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903719606] [2019-12-07 15:11:26,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:26,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:26,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:26,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1903719606] [2019-12-07 15:11:26,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:26,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:11:26,987 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135022753] [2019-12-07 15:11:26,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:11:26,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:26,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:11:26,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:11:26,987 INFO L87 Difference]: Start difference. First operand 14864 states and 46297 transitions. Second operand 7 states. [2019-12-07 15:11:27,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:27,574 INFO L93 Difference]: Finished difference Result 27214 states and 82740 transitions. [2019-12-07 15:11:27,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 15:11:27,575 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 15:11:27,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:27,605 INFO L225 Difference]: With dead ends: 27214 [2019-12-07 15:11:27,605 INFO L226 Difference]: Without dead ends: 27214 [2019-12-07 15:11:27,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:11:27,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27214 states. [2019-12-07 15:11:27,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27214 to 19145. [2019-12-07 15:11:27,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19145 states. [2019-12-07 15:11:27,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19145 states to 19145 states and 59389 transitions. [2019-12-07 15:11:27,945 INFO L78 Accepts]: Start accepts. Automaton has 19145 states and 59389 transitions. Word has length 67 [2019-12-07 15:11:27,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:27,946 INFO L462 AbstractCegarLoop]: Abstraction has 19145 states and 59389 transitions. [2019-12-07 15:11:27,946 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:11:27,946 INFO L276 IsEmpty]: Start isEmpty. Operand 19145 states and 59389 transitions. [2019-12-07 15:11:27,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:27,962 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:27,962 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:27,962 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:27,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:27,962 INFO L82 PathProgramCache]: Analyzing trace with hash -1912825147, now seen corresponding path program 2 times [2019-12-07 15:11:27,962 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:27,962 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307033021] [2019-12-07 15:11:27,962 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:27,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:28,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:28,012 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307033021] [2019-12-07 15:11:28,012 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:28,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:11:28,012 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801049815] [2019-12-07 15:11:28,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:11:28,013 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:28,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:11:28,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:11:28,013 INFO L87 Difference]: Start difference. First operand 19145 states and 59389 transitions. Second operand 4 states. [2019-12-07 15:11:28,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:28,101 INFO L93 Difference]: Finished difference Result 19145 states and 59165 transitions. [2019-12-07 15:11:28,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:11:28,101 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 15:11:28,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:28,120 INFO L225 Difference]: With dead ends: 19145 [2019-12-07 15:11:28,120 INFO L226 Difference]: Without dead ends: 19145 [2019-12-07 15:11:28,121 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:11:28,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19145 states. [2019-12-07 15:11:28,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19145 to 16901. [2019-12-07 15:11:28,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16901 states. [2019-12-07 15:11:28,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16901 states to 16901 states and 52288 transitions. [2019-12-07 15:11:28,388 INFO L78 Accepts]: Start accepts. Automaton has 16901 states and 52288 transitions. Word has length 67 [2019-12-07 15:11:28,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:28,388 INFO L462 AbstractCegarLoop]: Abstraction has 16901 states and 52288 transitions. [2019-12-07 15:11:28,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:11:28,388 INFO L276 IsEmpty]: Start isEmpty. Operand 16901 states and 52288 transitions. [2019-12-07 15:11:28,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:28,402 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:28,402 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:28,402 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:28,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:28,402 INFO L82 PathProgramCache]: Analyzing trace with hash 2062742571, now seen corresponding path program 1 times [2019-12-07 15:11:28,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:28,403 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415585611] [2019-12-07 15:11:28,403 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:28,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:28,606 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:28,606 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415585611] [2019-12-07 15:11:28,606 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:28,606 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:11:28,607 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082332427] [2019-12-07 15:11:28,607 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:11:28,607 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:28,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:11:28,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:11:28,607 INFO L87 Difference]: Start difference. First operand 16901 states and 52288 transitions. Second operand 10 states. [2019-12-07 15:11:29,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:29,985 INFO L93 Difference]: Finished difference Result 35700 states and 109911 transitions. [2019-12-07 15:11:29,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 15:11:29,985 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:11:29,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:30,014 INFO L225 Difference]: With dead ends: 35700 [2019-12-07 15:11:30,014 INFO L226 Difference]: Without dead ends: 25917 [2019-12-07 15:11:30,014 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2019-12-07 15:11:30,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25917 states. [2019-12-07 15:11:30,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25917 to 19793. [2019-12-07 15:11:30,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19793 states. [2019-12-07 15:11:30,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19793 states to 19793 states and 61009 transitions. [2019-12-07 15:11:30,344 INFO L78 Accepts]: Start accepts. Automaton has 19793 states and 61009 transitions. Word has length 67 [2019-12-07 15:11:30,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:30,344 INFO L462 AbstractCegarLoop]: Abstraction has 19793 states and 61009 transitions. [2019-12-07 15:11:30,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:11:30,344 INFO L276 IsEmpty]: Start isEmpty. Operand 19793 states and 61009 transitions. [2019-12-07 15:11:30,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:30,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:30,360 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:30,360 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:30,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:30,361 INFO L82 PathProgramCache]: Analyzing trace with hash -492001749, now seen corresponding path program 2 times [2019-12-07 15:11:30,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:30,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656489632] [2019-12-07 15:11:30,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:30,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:30,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:30,502 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656489632] [2019-12-07 15:11:30,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:30,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:11:30,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1871041015] [2019-12-07 15:11:30,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:11:30,502 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:30,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:11:30,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:11:30,503 INFO L87 Difference]: Start difference. First operand 19793 states and 61009 transitions. Second operand 10 states. [2019-12-07 15:11:32,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:32,142 INFO L93 Difference]: Finished difference Result 31757 states and 97018 transitions. [2019-12-07 15:11:32,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 15:11:32,143 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:11:32,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:32,188 INFO L225 Difference]: With dead ends: 31757 [2019-12-07 15:11:32,188 INFO L226 Difference]: Without dead ends: 27698 [2019-12-07 15:11:32,189 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=337, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:11:32,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27698 states. [2019-12-07 15:11:32,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27698 to 20300. [2019-12-07 15:11:32,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20300 states. [2019-12-07 15:11:32,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20300 states to 20300 states and 62350 transitions. [2019-12-07 15:11:32,539 INFO L78 Accepts]: Start accepts. Automaton has 20300 states and 62350 transitions. Word has length 67 [2019-12-07 15:11:32,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:32,540 INFO L462 AbstractCegarLoop]: Abstraction has 20300 states and 62350 transitions. [2019-12-07 15:11:32,540 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:11:32,540 INFO L276 IsEmpty]: Start isEmpty. Operand 20300 states and 62350 transitions. [2019-12-07 15:11:32,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:32,558 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:32,558 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:32,558 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:32,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:32,558 INFO L82 PathProgramCache]: Analyzing trace with hash 693103783, now seen corresponding path program 3 times [2019-12-07 15:11:32,558 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:32,559 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125190870] [2019-12-07 15:11:32,559 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:32,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:32,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:32,693 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1125190870] [2019-12-07 15:11:32,693 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:32,693 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:11:32,693 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036724428] [2019-12-07 15:11:32,693 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:11:32,693 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:32,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:11:32,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:11:32,694 INFO L87 Difference]: Start difference. First operand 20300 states and 62350 transitions. Second operand 11 states. [2019-12-07 15:11:34,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:34,623 INFO L93 Difference]: Finished difference Result 29982 states and 91489 transitions. [2019-12-07 15:11:34,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 15:11:34,624 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:11:34,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:34,670 INFO L225 Difference]: With dead ends: 29982 [2019-12-07 15:11:34,670 INFO L226 Difference]: Without dead ends: 26733 [2019-12-07 15:11:34,671 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=455, Unknown=0, NotChecked=0, Total=552 [2019-12-07 15:11:34,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26733 states. [2019-12-07 15:11:34,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26733 to 19828. [2019-12-07 15:11:34,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19828 states. [2019-12-07 15:11:35,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19828 states to 19828 states and 60920 transitions. [2019-12-07 15:11:35,020 INFO L78 Accepts]: Start accepts. Automaton has 19828 states and 60920 transitions. Word has length 67 [2019-12-07 15:11:35,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:35,021 INFO L462 AbstractCegarLoop]: Abstraction has 19828 states and 60920 transitions. [2019-12-07 15:11:35,021 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:11:35,021 INFO L276 IsEmpty]: Start isEmpty. Operand 19828 states and 60920 transitions. [2019-12-07 15:11:35,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:35,037 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:35,038 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:35,038 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:35,038 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:35,038 INFO L82 PathProgramCache]: Analyzing trace with hash 1535531457, now seen corresponding path program 4 times [2019-12-07 15:11:35,038 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:35,038 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711849132] [2019-12-07 15:11:35,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:35,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:35,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:35,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711849132] [2019-12-07 15:11:35,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:35,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:11:35,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008551326] [2019-12-07 15:11:35,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:11:35,463 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:35,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:11:35,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=217, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:11:35,464 INFO L87 Difference]: Start difference. First operand 19828 states and 60920 transitions. Second operand 17 states. [2019-12-07 15:11:41,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:41,332 INFO L93 Difference]: Finished difference Result 39661 states and 118760 transitions. [2019-12-07 15:11:41,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 15:11:41,333 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 15:11:41,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:41,372 INFO L225 Difference]: With dead ends: 39661 [2019-12-07 15:11:41,372 INFO L226 Difference]: Without dead ends: 35796 [2019-12-07 15:11:41,373 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 641 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=435, Invalid=2015, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:11:41,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35796 states. [2019-12-07 15:11:41,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35796 to 20519. [2019-12-07 15:11:41,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20519 states. [2019-12-07 15:11:41,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20519 states to 20519 states and 62719 transitions. [2019-12-07 15:11:41,795 INFO L78 Accepts]: Start accepts. Automaton has 20519 states and 62719 transitions. Word has length 67 [2019-12-07 15:11:41,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:41,795 INFO L462 AbstractCegarLoop]: Abstraction has 20519 states and 62719 transitions. [2019-12-07 15:11:41,795 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:11:41,795 INFO L276 IsEmpty]: Start isEmpty. Operand 20519 states and 62719 transitions. [2019-12-07 15:11:41,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:41,813 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:41,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:41,813 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:41,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:41,813 INFO L82 PathProgramCache]: Analyzing trace with hash -683872029, now seen corresponding path program 5 times [2019-12-07 15:11:41,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:41,814 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101663376] [2019-12-07 15:11:41,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:41,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:42,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:42,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101663376] [2019-12-07 15:11:42,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:42,221 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:11:42,221 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452417083] [2019-12-07 15:11:42,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:11:42,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:42,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:11:42,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=220, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:11:42,221 INFO L87 Difference]: Start difference. First operand 20519 states and 62719 transitions. Second operand 17 states. [2019-12-07 15:11:48,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:48,178 INFO L93 Difference]: Finished difference Result 39185 states and 117067 transitions. [2019-12-07 15:11:48,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2019-12-07 15:11:48,178 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 15:11:48,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:48,218 INFO L225 Difference]: With dead ends: 39185 [2019-12-07 15:11:48,218 INFO L226 Difference]: Without dead ends: 36926 [2019-12-07 15:11:48,220 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1355 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=677, Invalid=3613, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 15:11:48,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36926 states. [2019-12-07 15:11:48,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36926 to 20667. [2019-12-07 15:11:48,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20667 states. [2019-12-07 15:11:48,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20667 states to 20667 states and 63118 transitions. [2019-12-07 15:11:48,630 INFO L78 Accepts]: Start accepts. Automaton has 20667 states and 63118 transitions. Word has length 67 [2019-12-07 15:11:48,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:48,630 INFO L462 AbstractCegarLoop]: Abstraction has 20667 states and 63118 transitions. [2019-12-07 15:11:48,631 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:11:48,631 INFO L276 IsEmpty]: Start isEmpty. Operand 20667 states and 63118 transitions. [2019-12-07 15:11:48,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:48,649 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:48,649 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:48,649 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:48,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:48,650 INFO L82 PathProgramCache]: Analyzing trace with hash -616718365, now seen corresponding path program 6 times [2019-12-07 15:11:48,650 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:48,650 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [189565124] [2019-12-07 15:11:48,650 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:48,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:49,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:49,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [189565124] [2019-12-07 15:11:49,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:49,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 15:11:49,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104750462] [2019-12-07 15:11:49,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 15:11:49,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:49,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 15:11:49,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2019-12-07 15:11:49,071 INFO L87 Difference]: Start difference. First operand 20667 states and 63118 transitions. Second operand 17 states. [2019-12-07 15:11:52,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:52,725 INFO L93 Difference]: Finished difference Result 37988 states and 113216 transitions. [2019-12-07 15:11:52,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2019-12-07 15:11:52,725 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 15:11:52,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:52,765 INFO L225 Difference]: With dead ends: 37988 [2019-12-07 15:11:52,765 INFO L226 Difference]: Without dead ends: 36521 [2019-12-07 15:11:52,766 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1458 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=688, Invalid=3868, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 15:11:52,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36521 states. [2019-12-07 15:11:53,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36521 to 20886. [2019-12-07 15:11:53,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20886 states. [2019-12-07 15:11:53,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20886 states to 20886 states and 63759 transitions. [2019-12-07 15:11:53,171 INFO L78 Accepts]: Start accepts. Automaton has 20886 states and 63759 transitions. Word has length 67 [2019-12-07 15:11:53,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:53,172 INFO L462 AbstractCegarLoop]: Abstraction has 20886 states and 63759 transitions. [2019-12-07 15:11:53,172 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 15:11:53,172 INFO L276 IsEmpty]: Start isEmpty. Operand 20886 states and 63759 transitions. [2019-12-07 15:11:53,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:53,189 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:53,190 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:53,190 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:53,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:53,190 INFO L82 PathProgramCache]: Analyzing trace with hash -2065446981, now seen corresponding path program 7 times [2019-12-07 15:11:53,190 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:53,190 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [490949099] [2019-12-07 15:11:53,190 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:53,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:53,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:53,587 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [490949099] [2019-12-07 15:11:53,587 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:53,587 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 15:11:53,588 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1078937216] [2019-12-07 15:11:53,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 15:11:53,588 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:53,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 15:11:53,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=250, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:11:53,588 INFO L87 Difference]: Start difference. First operand 20886 states and 63759 transitions. Second operand 18 states. [2019-12-07 15:11:57,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:11:57,279 INFO L93 Difference]: Finished difference Result 37212 states and 111380 transitions. [2019-12-07 15:11:57,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 15:11:57,280 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 15:11:57,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:11:57,323 INFO L225 Difference]: With dead ends: 37212 [2019-12-07 15:11:57,323 INFO L226 Difference]: Without dead ends: 35337 [2019-12-07 15:11:57,324 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 769 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=485, Invalid=2377, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 15:11:57,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35337 states. [2019-12-07 15:11:57,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35337 to 21142. [2019-12-07 15:11:57,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21142 states. [2019-12-07 15:11:57,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21142 states to 21142 states and 64432 transitions. [2019-12-07 15:11:57,728 INFO L78 Accepts]: Start accepts. Automaton has 21142 states and 64432 transitions. Word has length 67 [2019-12-07 15:11:57,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:11:57,728 INFO L462 AbstractCegarLoop]: Abstraction has 21142 states and 64432 transitions. [2019-12-07 15:11:57,728 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 15:11:57,728 INFO L276 IsEmpty]: Start isEmpty. Operand 21142 states and 64432 transitions. [2019-12-07 15:11:57,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:11:57,746 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:11:57,746 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:11:57,746 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:11:57,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:11:57,746 INFO L82 PathProgramCache]: Analyzing trace with hash 10116829, now seen corresponding path program 8 times [2019-12-07 15:11:57,746 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:11:57,746 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049472813] [2019-12-07 15:11:57,746 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:11:57,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:11:58,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:11:58,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049472813] [2019-12-07 15:11:58,199 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:11:58,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:11:58,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986605531] [2019-12-07 15:11:58,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:11:58,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:11:58,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:11:58,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=283, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:11:58,200 INFO L87 Difference]: Start difference. First operand 21142 states and 64432 transitions. Second operand 19 states. [2019-12-07 15:12:02,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:02,504 INFO L93 Difference]: Finished difference Result 36958 states and 110644 transitions. [2019-12-07 15:12:02,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 15:12:02,504 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 15:12:02,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:02,539 INFO L225 Difference]: With dead ends: 36958 [2019-12-07 15:12:02,539 INFO L226 Difference]: Without dead ends: 35795 [2019-12-07 15:12:02,540 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1204 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=608, Invalid=3424, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 15:12:02,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35795 states. [2019-12-07 15:12:02,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35795 to 21142. [2019-12-07 15:12:02,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21142 states. [2019-12-07 15:12:02,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21142 states to 21142 states and 64432 transitions. [2019-12-07 15:12:02,928 INFO L78 Accepts]: Start accepts. Automaton has 21142 states and 64432 transitions. Word has length 67 [2019-12-07 15:12:02,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:02,928 INFO L462 AbstractCegarLoop]: Abstraction has 21142 states and 64432 transitions. [2019-12-07 15:12:02,928 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:12:02,928 INFO L276 IsEmpty]: Start isEmpty. Operand 21142 states and 64432 transitions. [2019-12-07 15:12:02,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:02,946 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:02,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:02,946 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:02,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:02,946 INFO L82 PathProgramCache]: Analyzing trace with hash 77270493, now seen corresponding path program 9 times [2019-12-07 15:12:02,946 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:02,946 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784169583] [2019-12-07 15:12:02,946 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:02,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:03,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:03,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784169583] [2019-12-07 15:12:03,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:03,680 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:12:03,680 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110584701] [2019-12-07 15:12:03,680 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:12:03,680 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:03,680 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:12:03,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:12:03,681 INFO L87 Difference]: Start difference. First operand 21142 states and 64432 transitions. Second operand 19 states. [2019-12-07 15:12:15,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:15,331 INFO L93 Difference]: Finished difference Result 36536 states and 109274 transitions. [2019-12-07 15:12:15,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 15:12:15,331 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 15:12:15,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:15,371 INFO L225 Difference]: With dead ends: 36536 [2019-12-07 15:12:15,371 INFO L226 Difference]: Without dead ends: 35661 [2019-12-07 15:12:15,372 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1311 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=608, Invalid=3682, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 15:12:15,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35661 states. [2019-12-07 15:12:15,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35661 to 20944. [2019-12-07 15:12:15,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20944 states. [2019-12-07 15:12:15,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20944 states to 20944 states and 63906 transitions. [2019-12-07 15:12:15,796 INFO L78 Accepts]: Start accepts. Automaton has 20944 states and 63906 transitions. Word has length 67 [2019-12-07 15:12:15,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:15,796 INFO L462 AbstractCegarLoop]: Abstraction has 20944 states and 63906 transitions. [2019-12-07 15:12:15,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:12:15,796 INFO L276 IsEmpty]: Start isEmpty. Operand 20944 states and 63906 transitions. [2019-12-07 15:12:15,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:15,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:15,815 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:15,815 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:15,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:15,815 INFO L82 PathProgramCache]: Analyzing trace with hash 1913889315, now seen corresponding path program 10 times [2019-12-07 15:12:15,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:15,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284569722] [2019-12-07 15:12:15,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:15,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:16,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:16,192 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284569722] [2019-12-07 15:12:16,192 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:16,192 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:12:16,192 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2125005288] [2019-12-07 15:12:16,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:12:16,192 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:16,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:12:16,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=284, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:12:16,193 INFO L87 Difference]: Start difference. First operand 20944 states and 63906 transitions. Second operand 19 states. [2019-12-07 15:12:22,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:22,492 INFO L93 Difference]: Finished difference Result 36786 states and 110157 transitions. [2019-12-07 15:12:22,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 15:12:22,492 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 15:12:22,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:22,533 INFO L225 Difference]: With dead ends: 36786 [2019-12-07 15:12:22,533 INFO L226 Difference]: Without dead ends: 35895 [2019-12-07 15:12:22,535 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1376 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=663, Invalid=3893, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 15:12:22,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35895 states. [2019-12-07 15:12:22,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35895 to 20537. [2019-12-07 15:12:22,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20537 states. [2019-12-07 15:12:22,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20537 states to 20537 states and 62772 transitions. [2019-12-07 15:12:22,937 INFO L78 Accepts]: Start accepts. Automaton has 20537 states and 62772 transitions. Word has length 67 [2019-12-07 15:12:22,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:22,937 INFO L462 AbstractCegarLoop]: Abstraction has 20537 states and 62772 transitions. [2019-12-07 15:12:22,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:12:22,937 INFO L276 IsEmpty]: Start isEmpty. Operand 20537 states and 62772 transitions. [2019-12-07 15:12:22,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:22,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:22,956 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:22,956 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:22,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:22,956 INFO L82 PathProgramCache]: Analyzing trace with hash 1416082809, now seen corresponding path program 11 times [2019-12-07 15:12:22,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:22,956 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [965883784] [2019-12-07 15:12:22,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:22,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:23,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:23,240 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [965883784] [2019-12-07 15:12:23,240 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:23,240 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:12:23,240 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [249114133] [2019-12-07 15:12:23,240 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:12:23,240 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:23,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:12:23,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:12:23,240 INFO L87 Difference]: Start difference. First operand 20537 states and 62772 transitions. Second operand 16 states. [2019-12-07 15:12:26,637 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 38 [2019-12-07 15:12:27,447 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2019-12-07 15:12:29,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:29,935 INFO L93 Difference]: Finished difference Result 52885 states and 161105 transitions. [2019-12-07 15:12:29,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2019-12-07 15:12:29,936 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 15:12:29,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:30,005 INFO L225 Difference]: With dead ends: 52885 [2019-12-07 15:12:30,005 INFO L226 Difference]: Without dead ends: 48610 [2019-12-07 15:12:30,007 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2304 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1035, Invalid=6105, Unknown=0, NotChecked=0, Total=7140 [2019-12-07 15:12:30,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48610 states. [2019-12-07 15:12:30,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48610 to 24759. [2019-12-07 15:12:30,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24759 states. [2019-12-07 15:12:30,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24759 states to 24759 states and 76461 transitions. [2019-12-07 15:12:30,567 INFO L78 Accepts]: Start accepts. Automaton has 24759 states and 76461 transitions. Word has length 67 [2019-12-07 15:12:30,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:30,568 INFO L462 AbstractCegarLoop]: Abstraction has 24759 states and 76461 transitions. [2019-12-07 15:12:30,568 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:12:30,568 INFO L276 IsEmpty]: Start isEmpty. Operand 24759 states and 76461 transitions. [2019-12-07 15:12:30,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:30,593 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:30,594 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:30,594 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:30,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:30,594 INFO L82 PathProgramCache]: Analyzing trace with hash 1322723081, now seen corresponding path program 12 times [2019-12-07 15:12:30,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:30,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203304313] [2019-12-07 15:12:30,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:30,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:30,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:30,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203304313] [2019-12-07 15:12:30,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:30,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:12:30,872 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478660075] [2019-12-07 15:12:30,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:12:30,872 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:30,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:12:30,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:12:30,873 INFO L87 Difference]: Start difference. First operand 24759 states and 76461 transitions. Second operand 16 states. [2019-12-07 15:12:35,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:35,476 INFO L93 Difference]: Finished difference Result 49006 states and 148773 transitions. [2019-12-07 15:12:35,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 15:12:35,477 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 15:12:35,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:35,541 INFO L225 Difference]: With dead ends: 49006 [2019-12-07 15:12:35,541 INFO L226 Difference]: Without dead ends: 39715 [2019-12-07 15:12:35,543 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1363 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=732, Invalid=3960, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 15:12:35,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39715 states. [2019-12-07 15:12:35,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39715 to 20856. [2019-12-07 15:12:35,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20856 states. [2019-12-07 15:12:35,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20856 states to 20856 states and 63909 transitions. [2019-12-07 15:12:35,976 INFO L78 Accepts]: Start accepts. Automaton has 20856 states and 63909 transitions. Word has length 67 [2019-12-07 15:12:35,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:35,976 INFO L462 AbstractCegarLoop]: Abstraction has 20856 states and 63909 transitions. [2019-12-07 15:12:35,976 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:12:35,976 INFO L276 IsEmpty]: Start isEmpty. Operand 20856 states and 63909 transitions. [2019-12-07 15:12:35,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:35,996 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:35,996 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:35,996 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:35,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:35,996 INFO L82 PathProgramCache]: Analyzing trace with hash -1853423759, now seen corresponding path program 13 times [2019-12-07 15:12:35,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:35,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843194243] [2019-12-07 15:12:35,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:36,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:36,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:36,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843194243] [2019-12-07 15:12:36,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:36,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:12:36,337 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891476445] [2019-12-07 15:12:36,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:12:36,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:36,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:12:36,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:12:36,337 INFO L87 Difference]: Start difference. First operand 20856 states and 63909 transitions. Second operand 16 states. [2019-12-07 15:12:39,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:39,911 INFO L93 Difference]: Finished difference Result 36493 states and 109054 transitions. [2019-12-07 15:12:39,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 15:12:39,912 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 15:12:39,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:39,969 INFO L225 Difference]: With dead ends: 36493 [2019-12-07 15:12:39,969 INFO L226 Difference]: Without dead ends: 35268 [2019-12-07 15:12:39,971 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 910 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=502, Invalid=2690, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 15:12:40,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35268 states. [2019-12-07 15:12:40,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35268 to 20800. [2019-12-07 15:12:40,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20800 states. [2019-12-07 15:12:40,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20800 states to 20800 states and 63767 transitions. [2019-12-07 15:12:40,451 INFO L78 Accepts]: Start accepts. Automaton has 20800 states and 63767 transitions. Word has length 67 [2019-12-07 15:12:40,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:40,452 INFO L462 AbstractCegarLoop]: Abstraction has 20800 states and 63767 transitions. [2019-12-07 15:12:40,452 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:12:40,452 INFO L276 IsEmpty]: Start isEmpty. Operand 20800 states and 63767 transitions. [2019-12-07 15:12:40,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:40,467 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:40,467 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:40,467 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:40,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:40,468 INFO L82 PathProgramCache]: Analyzing trace with hash -530596549, now seen corresponding path program 14 times [2019-12-07 15:12:40,468 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:40,468 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118490860] [2019-12-07 15:12:40,468 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:40,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:40,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:40,579 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118490860] [2019-12-07 15:12:40,579 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:40,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:12:40,579 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1617807380] [2019-12-07 15:12:40,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:12:40,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:40,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:12:40,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:12:40,580 INFO L87 Difference]: Start difference. First operand 20800 states and 63767 transitions. Second operand 11 states. [2019-12-07 15:12:41,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:41,840 INFO L93 Difference]: Finished difference Result 31773 states and 96041 transitions. [2019-12-07 15:12:41,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 15:12:41,841 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:12:41,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:41,872 INFO L225 Difference]: With dead ends: 31773 [2019-12-07 15:12:41,872 INFO L226 Difference]: Without dead ends: 26747 [2019-12-07 15:12:41,872 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=127, Invalid=523, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:12:41,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26747 states. [2019-12-07 15:12:42,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26747 to 20815. [2019-12-07 15:12:42,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20815 states. [2019-12-07 15:12:42,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20815 states to 20815 states and 63826 transitions. [2019-12-07 15:12:42,209 INFO L78 Accepts]: Start accepts. Automaton has 20815 states and 63826 transitions. Word has length 67 [2019-12-07 15:12:42,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:42,210 INFO L462 AbstractCegarLoop]: Abstraction has 20815 states and 63826 transitions. [2019-12-07 15:12:42,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:12:42,210 INFO L276 IsEmpty]: Start isEmpty. Operand 20815 states and 63826 transitions. [2019-12-07 15:12:42,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:42,227 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:42,227 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:42,227 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:42,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:42,227 INFO L82 PathProgramCache]: Analyzing trace with hash 1612120925, now seen corresponding path program 15 times [2019-12-07 15:12:42,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:42,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [585313576] [2019-12-07 15:12:42,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:42,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:42,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:42,765 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [585313576] [2019-12-07 15:12:42,765 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:42,765 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:12:42,765 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656585109] [2019-12-07 15:12:42,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:12:42,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:42,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:12:42,766 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=365, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:12:42,766 INFO L87 Difference]: Start difference. First operand 20815 states and 63826 transitions. Second operand 21 states. [2019-12-07 15:12:51,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:51,138 INFO L93 Difference]: Finished difference Result 25685 states and 77131 transitions. [2019-12-07 15:12:51,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 15:12:51,139 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 15:12:51,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:51,177 INFO L225 Difference]: With dead ends: 25685 [2019-12-07 15:12:51,177 INFO L226 Difference]: Without dead ends: 24062 [2019-12-07 15:12:51,178 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 2 SyntacticMatches, 6 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 603 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=311, Invalid=2139, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 15:12:51,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24062 states. [2019-12-07 15:12:51,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24062 to 20838. [2019-12-07 15:12:51,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20838 states. [2019-12-07 15:12:51,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20838 states to 20838 states and 63671 transitions. [2019-12-07 15:12:51,494 INFO L78 Accepts]: Start accepts. Automaton has 20838 states and 63671 transitions. Word has length 67 [2019-12-07 15:12:51,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:51,495 INFO L462 AbstractCegarLoop]: Abstraction has 20838 states and 63671 transitions. [2019-12-07 15:12:51,495 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:12:51,495 INFO L276 IsEmpty]: Start isEmpty. Operand 20838 states and 63671 transitions. [2019-12-07 15:12:51,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:51,512 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:51,512 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:51,512 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:51,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:51,513 INFO L82 PathProgramCache]: Analyzing trace with hash -846227549, now seen corresponding path program 16 times [2019-12-07 15:12:51,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:51,513 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [904193125] [2019-12-07 15:12:51,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:51,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:51,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:51,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [904193125] [2019-12-07 15:12:51,841 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:51,841 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 15:12:51,842 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057205668] [2019-12-07 15:12:51,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 15:12:51,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:51,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 15:12:51,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:12:51,842 INFO L87 Difference]: Start difference. First operand 20838 states and 63671 transitions. Second operand 16 states. [2019-12-07 15:12:59,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:12:59,172 INFO L93 Difference]: Finished difference Result 40662 states and 123302 transitions. [2019-12-07 15:12:59,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2019-12-07 15:12:59,172 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 15:12:59,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:12:59,215 INFO L225 Difference]: With dead ends: 40662 [2019-12-07 15:12:59,215 INFO L226 Difference]: Without dead ends: 39649 [2019-12-07 15:12:59,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1400 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=659, Invalid=4033, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 15:12:59,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39649 states. [2019-12-07 15:12:59,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39649 to 23510. [2019-12-07 15:12:59,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23510 states. [2019-12-07 15:12:59,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23510 states to 23510 states and 71829 transitions. [2019-12-07 15:12:59,682 INFO L78 Accepts]: Start accepts. Automaton has 23510 states and 71829 transitions. Word has length 67 [2019-12-07 15:12:59,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:12:59,682 INFO L462 AbstractCegarLoop]: Abstraction has 23510 states and 71829 transitions. [2019-12-07 15:12:59,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 15:12:59,682 INFO L276 IsEmpty]: Start isEmpty. Operand 23510 states and 71829 transitions. [2019-12-07 15:12:59,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:12:59,701 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:12:59,701 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:12:59,702 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:12:59,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:12:59,702 INFO L82 PathProgramCache]: Analyzing trace with hash -939587277, now seen corresponding path program 17 times [2019-12-07 15:12:59,702 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:12:59,702 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317549404] [2019-12-07 15:12:59,702 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:12:59,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:12:59,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:12:59,804 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [317549404] [2019-12-07 15:12:59,805 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:12:59,805 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:12:59,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1498583553] [2019-12-07 15:12:59,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:12:59,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:12:59,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:12:59,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:12:59,805 INFO L87 Difference]: Start difference. First operand 23510 states and 71829 transitions. Second operand 11 states. [2019-12-07 15:13:00,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:13:00,545 INFO L93 Difference]: Finished difference Result 47066 states and 143182 transitions. [2019-12-07 15:13:00,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 15:13:00,545 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:13:00,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:13:00,580 INFO L225 Difference]: With dead ends: 47066 [2019-12-07 15:13:00,580 INFO L226 Difference]: Without dead ends: 31440 [2019-12-07 15:13:00,581 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 297 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=248, Invalid=1012, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 15:13:00,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31440 states. [2019-12-07 15:13:00,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31440 to 19463. [2019-12-07 15:13:00,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19463 states. [2019-12-07 15:13:00,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19463 states to 19463 states and 59625 transitions. [2019-12-07 15:13:00,941 INFO L78 Accepts]: Start accepts. Automaton has 19463 states and 59625 transitions. Word has length 67 [2019-12-07 15:13:00,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:13:00,941 INFO L462 AbstractCegarLoop]: Abstraction has 19463 states and 59625 transitions. [2019-12-07 15:13:00,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:13:00,941 INFO L276 IsEmpty]: Start isEmpty. Operand 19463 states and 59625 transitions. [2019-12-07 15:13:00,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:13:00,958 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:13:00,958 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:13:00,958 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:13:00,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:13:00,958 INFO L82 PathProgramCache]: Analyzing trace with hash 594227727, now seen corresponding path program 18 times [2019-12-07 15:13:00,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:13:00,958 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599643034] [2019-12-07 15:13:00,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:13:00,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:13:00,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:13:01,022 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:13:01,022 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:13:01,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (= v_~y~0_18 0) (= 0 v_~a$r_buff1_thd1~0_150) (= 0 v_~__unbuffered_p2_EAX~0_31) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t263~0.base_33| 4)) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= 0 |v_ULTIMATE.start_main_~#t263~0.offset_23|) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t263~0.base_33|) (= v_~a$r_buff1_thd3~0_269 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t263~0.base_33| 1)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t263~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t263~0.base_33|) |v_ULTIMATE.start_main_~#t263~0.offset_23| 0)) |v_#memory_int_19|) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= v_~a$mem_tmp~0_14 0) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t263~0.base_33|) 0) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ULTIMATE.start_main_~#t263~0.offset=|v_ULTIMATE.start_main_~#t263~0.offset_23|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t265~0.offset=|v_ULTIMATE.start_main_~#t265~0.offset_19|, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ~a$read_delayed~0=v_~a$read_delayed~0_8, ULTIMATE.start_main_~#t264~0.offset=|v_ULTIMATE.start_main_~#t264~0.offset_19|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ~y~0=v_~y~0_18, ULTIMATE.start_main_~#t265~0.base=|v_ULTIMATE.start_main_~#t265~0.base_25|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ULTIMATE.start_main_~#t263~0.base=|v_ULTIMATE.start_main_~#t263~0.base_33|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t264~0.base=|v_ULTIMATE.start_main_~#t264~0.base_25|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t263~0.offset, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t265~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ULTIMATE.start_main_~#t264~0.offset, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t265~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t263~0.base, #NULL.base, ULTIMATE.start_main_~#t264~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:13:01,025 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 15:13:01,025 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t264~0.base_12|) 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t264~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t264~0.base_12|) |v_ULTIMATE.start_main_~#t264~0.offset_10| 1)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t264~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t264~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t264~0.base_12| 4)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t264~0.base_12| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t264~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t264~0.base=|v_ULTIMATE.start_main_~#t264~0.base_12|, ULTIMATE.start_main_~#t264~0.offset=|v_ULTIMATE.start_main_~#t264~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t264~0.base, ULTIMATE.start_main_~#t264~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:13:01,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t265~0.base_12| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t265~0.base_12|) (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t265~0.base_12| 1) |v_#valid_32|) (not (= |v_ULTIMATE.start_main_~#t265~0.base_12| 0)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t265~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t265~0.base_12|) |v_ULTIMATE.start_main_~#t265~0.offset_10| 2)) |v_#memory_int_11|) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t265~0.base_12|) 0) (= 0 |v_ULTIMATE.start_main_~#t265~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t265~0.offset=|v_ULTIMATE.start_main_~#t265~0.offset_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t265~0.base=|v_ULTIMATE.start_main_~#t265~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t265~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t265~0.base] because there is no mapped edge [2019-12-07 15:13:01,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-191732159 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-191732159 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In-191732159 |P1Thread1of1ForFork2_#t~ite9_Out-191732159|) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-191732159| ~a~0_In-191732159)))) InVars {~a~0=~a~0_In-191732159, ~a$w_buff1~0=~a$w_buff1~0_In-191732159, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-191732159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-191732159} OutVars{~a~0=~a~0_In-191732159, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-191732159|, ~a$w_buff1~0=~a$w_buff1~0_In-191732159, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-191732159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-191732159} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:13:01,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:13:01,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-105003867 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-105003867 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-105003867| ~a$w_buff0_used~0_In-105003867)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-105003867| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-105003867, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-105003867} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-105003867, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-105003867, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-105003867|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:13:01,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In349181556 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In349181556 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out349181556|) (not .cse1)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out349181556| ~a$w_buff0_used~0_In349181556) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In349181556, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In349181556} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out349181556|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In349181556, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In349181556} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:13:01,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd1~0_In-688898151 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-688898151 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-688898151 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-688898151 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-688898151 |P0Thread1of1ForFork1_#t~ite6_Out-688898151|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-688898151|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-688898151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688898151, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-688898151, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688898151} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-688898151|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-688898151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688898151, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-688898151, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688898151} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:13:01,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1003461194 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1003461194 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out1003461194 ~a$r_buff0_thd1~0_In1003461194))) (or (and (not .cse0) (= ~a$r_buff0_thd1~0_Out1003461194 0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1003461194, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1003461194} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1003461194|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1003461194, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1003461194} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:13:01,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In1759571241 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In1759571241 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1759571241 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1759571241 256) 0))) (or (and (= ~a$r_buff1_thd1~0_In1759571241 |P0Thread1of1ForFork1_#t~ite8_Out1759571241|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1759571241|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1759571241, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1759571241, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1759571241, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1759571241} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1759571241|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1759571241, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1759571241, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1759571241, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1759571241} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:13:01,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:13:01,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1949556190 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite21_Out1949556190| ~a$w_buff0~0_In1949556190) (= |P2Thread1of1ForFork0_#t~ite20_In1949556190| |P2Thread1of1ForFork0_#t~ite20_Out1949556190|) (not .cse0)) (and (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1949556190 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In1949556190 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In1949556190 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In1949556190 256) 0) .cse1))) .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out1949556190| |P2Thread1of1ForFork0_#t~ite20_Out1949556190|) (= ~a$w_buff0~0_In1949556190 |P2Thread1of1ForFork0_#t~ite20_Out1949556190|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1949556190, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1949556190, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1949556190, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1949556190, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1949556190, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1949556190|, ~weak$$choice2~0=~weak$$choice2~0_In1949556190} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1949556190|, ~a$w_buff0~0=~a$w_buff0~0_In1949556190, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1949556190, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1949556190, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1949556190, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1949556190|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1949556190, ~weak$$choice2~0=~weak$$choice2~0_In1949556190} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:13:01,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-688004438 256)))) (or (and .cse0 (= ~a$w_buff0_used~0_In-688004438 |P2Thread1of1ForFork0_#t~ite26_Out-688004438|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-688004438 256) 0))) (or (and (= (mod ~a$r_buff1_thd3~0_In-688004438 256) 0) .cse1) (and (= (mod ~a$w_buff1_used~0_In-688004438 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-688004438 256)))) (= |P2Thread1of1ForFork0_#t~ite27_Out-688004438| |P2Thread1of1ForFork0_#t~ite26_Out-688004438|)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-688004438| |P2Thread1of1ForFork0_#t~ite26_Out-688004438|) (= |P2Thread1of1ForFork0_#t~ite27_Out-688004438| ~a$w_buff0_used~0_In-688004438)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-688004438|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-688004438, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688004438, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-688004438, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688004438, ~weak$$choice2~0=~weak$$choice2~0_In-688004438} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-688004438|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-688004438|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-688004438, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688004438, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-688004438, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688004438, ~weak$$choice2~0=~weak$$choice2~0_In-688004438} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:13:01,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:13:01,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:13:01,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out-1784128474| |P2Thread1of1ForFork0_#t~ite38_Out-1784128474|)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In-1784128474 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1784128474 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-1784128474| ~a~0_In-1784128474) (or .cse1 .cse2)) (and .cse0 (not .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out-1784128474| ~a$w_buff1~0_In-1784128474) (not .cse1)))) InVars {~a~0=~a~0_In-1784128474, ~a$w_buff1~0=~a$w_buff1~0_In-1784128474, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1784128474, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1784128474} OutVars{~a~0=~a~0_In-1784128474, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1784128474|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1784128474|, ~a$w_buff1~0=~a$w_buff1~0_In-1784128474, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1784128474, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1784128474} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:13:01,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-884565964 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-884565964 256)))) (or (and (= ~a$w_buff0_used~0_In-884565964 |P2Thread1of1ForFork0_#t~ite40_Out-884565964|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-884565964|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-884565964, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-884565964} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-884565964|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-884565964, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-884565964} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:13:01,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd3~0_In-637563313 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-637563313 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-637563313 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-637563313 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-637563313|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-637563313 |P2Thread1of1ForFork0_#t~ite41_Out-637563313|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-637563313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-637563313, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-637563313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-637563313} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-637563313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-637563313, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-637563313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-637563313, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-637563313|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:13:01,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In2026225189 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In2026225189 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In2026225189 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In2026225189 256)))) (or (and (= ~a$w_buff1_used~0_In2026225189 |P1Thread1of1ForFork2_#t~ite12_Out2026225189|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out2026225189|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2026225189, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2026225189, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2026225189, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2026225189} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2026225189, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2026225189, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2026225189, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out2026225189|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2026225189} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:13:01,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1326281609 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1326281609 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1326281609| ~a$r_buff0_thd2~0_In1326281609) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out1326281609| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1326281609, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1326281609} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1326281609, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1326281609, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1326281609|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:13:01,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-1256946432 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1256946432 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1256946432 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In-1256946432 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-1256946432| ~a$r_buff1_thd2~0_In-1256946432)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1256946432|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1256946432, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1256946432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1256946432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1256946432} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1256946432, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1256946432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1256946432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1256946432, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1256946432|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:13:01,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:13:01,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1941841714 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1941841714 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1941841714| ~a$r_buff0_thd3~0_In-1941841714)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1941841714| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1941841714, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1941841714} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1941841714, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1941841714, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1941841714|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:13:01,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In1104876069 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In1104876069 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1104876069 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In1104876069 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out1104876069| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd3~0_In1104876069 |P2Thread1of1ForFork0_#t~ite43_Out1104876069|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1104876069, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1104876069, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1104876069, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1104876069} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1104876069|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1104876069, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1104876069, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1104876069, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1104876069} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:13:01,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:13:01,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:13:01,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In1111138434 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1111138434 256)))) (or (and (= ~a~0_In1111138434 |ULTIMATE.start_main_#t~ite47_Out1111138434|) (or .cse0 .cse1)) (and (= ~a$w_buff1~0_In1111138434 |ULTIMATE.start_main_#t~ite47_Out1111138434|) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In1111138434, ~a$w_buff1~0=~a$w_buff1~0_In1111138434, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1111138434, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1111138434} OutVars{~a~0=~a~0_In1111138434, ~a$w_buff1~0=~a$w_buff1~0_In1111138434, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1111138434|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1111138434, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1111138434} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 15:13:01,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:13:01,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-415884566 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-415884566 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-415884566| ~a$w_buff0_used~0_In-415884566) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-415884566| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-415884566, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-415884566} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-415884566, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-415884566|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-415884566} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:13:01,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-1773683906 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1773683906 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-1773683906 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1773683906 256)))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-1773683906| ~a$w_buff1_used~0_In-1773683906) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1773683906| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1773683906, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1773683906, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1773683906, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1773683906} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1773683906|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1773683906, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1773683906, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1773683906, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1773683906} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:13:01,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In196223387 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In196223387 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out196223387| ~a$r_buff0_thd0~0_In196223387) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out196223387| 0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In196223387, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In196223387} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out196223387|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In196223387, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In196223387} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:13:01,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-2088444407 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-2088444407 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-2088444407 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-2088444407 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-2088444407| ~a$r_buff1_thd0~0_In-2088444407) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out-2088444407| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2088444407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2088444407, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2088444407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2088444407} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2088444407|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2088444407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2088444407, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2088444407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2088444407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:13:01,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:13:01,092 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:13:01 BasicIcfg [2019-12-07 15:13:01,092 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:13:01,092 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:13:01,092 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:13:01,092 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:13:01,093 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:09:47" (3/4) ... [2019-12-07 15:13:01,094 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:13:01,094 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (= v_~y~0_18 0) (= 0 v_~a$r_buff1_thd1~0_150) (= 0 v_~__unbuffered_p2_EAX~0_31) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t263~0.base_33| 4)) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= 0 |v_ULTIMATE.start_main_~#t263~0.offset_23|) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t263~0.base_33|) (= v_~a$r_buff1_thd3~0_269 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t263~0.base_33| 1)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t263~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t263~0.base_33|) |v_ULTIMATE.start_main_~#t263~0.offset_23| 0)) |v_#memory_int_19|) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= v_~a$mem_tmp~0_14 0) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t263~0.base_33|) 0) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ULTIMATE.start_main_~#t263~0.offset=|v_ULTIMATE.start_main_~#t263~0.offset_23|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t265~0.offset=|v_ULTIMATE.start_main_~#t265~0.offset_19|, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ~a$read_delayed~0=v_~a$read_delayed~0_8, ULTIMATE.start_main_~#t264~0.offset=|v_ULTIMATE.start_main_~#t264~0.offset_19|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ~y~0=v_~y~0_18, ULTIMATE.start_main_~#t265~0.base=|v_ULTIMATE.start_main_~#t265~0.base_25|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ULTIMATE.start_main_~#t263~0.base=|v_ULTIMATE.start_main_~#t263~0.base_33|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t264~0.base=|v_ULTIMATE.start_main_~#t264~0.base_25|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t263~0.offset, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t265~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ULTIMATE.start_main_~#t264~0.offset, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t265~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t263~0.base, #NULL.base, ULTIMATE.start_main_~#t264~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:13:01,095 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 15:13:01,095 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t264~0.base_12|) 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t264~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t264~0.base_12|) |v_ULTIMATE.start_main_~#t264~0.offset_10| 1)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t264~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t264~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t264~0.base_12| 4)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t264~0.base_12| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t264~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t264~0.base=|v_ULTIMATE.start_main_~#t264~0.base_12|, ULTIMATE.start_main_~#t264~0.offset=|v_ULTIMATE.start_main_~#t264~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t264~0.base, ULTIMATE.start_main_~#t264~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:13:01,096 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t265~0.base_12| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t265~0.base_12|) (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t265~0.base_12| 1) |v_#valid_32|) (not (= |v_ULTIMATE.start_main_~#t265~0.base_12| 0)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t265~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t265~0.base_12|) |v_ULTIMATE.start_main_~#t265~0.offset_10| 2)) |v_#memory_int_11|) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t265~0.base_12|) 0) (= 0 |v_ULTIMATE.start_main_~#t265~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t265~0.offset=|v_ULTIMATE.start_main_~#t265~0.offset_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t265~0.base=|v_ULTIMATE.start_main_~#t265~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t265~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t265~0.base] because there is no mapped edge [2019-12-07 15:13:01,097 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-191732159 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-191732159 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In-191732159 |P1Thread1of1ForFork2_#t~ite9_Out-191732159|) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-191732159| ~a~0_In-191732159)))) InVars {~a~0=~a~0_In-191732159, ~a$w_buff1~0=~a$w_buff1~0_In-191732159, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-191732159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-191732159} OutVars{~a~0=~a~0_In-191732159, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-191732159|, ~a$w_buff1~0=~a$w_buff1~0_In-191732159, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-191732159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-191732159} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:13:01,097 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:13:01,097 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-105003867 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-105003867 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-105003867| ~a$w_buff0_used~0_In-105003867)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-105003867| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-105003867, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-105003867} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-105003867, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-105003867, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-105003867|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:13:01,098 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In349181556 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In349181556 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out349181556|) (not .cse1)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out349181556| ~a$w_buff0_used~0_In349181556) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In349181556, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In349181556} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out349181556|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In349181556, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In349181556} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:13:01,098 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd1~0_In-688898151 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-688898151 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-688898151 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-688898151 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-688898151 |P0Thread1of1ForFork1_#t~ite6_Out-688898151|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-688898151|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-688898151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688898151, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-688898151, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688898151} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-688898151|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-688898151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688898151, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-688898151, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688898151} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:13:01,099 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1003461194 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1003461194 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out1003461194 ~a$r_buff0_thd1~0_In1003461194))) (or (and (not .cse0) (= ~a$r_buff0_thd1~0_Out1003461194 0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1003461194, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1003461194} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1003461194|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1003461194, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1003461194} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:13:01,099 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In1759571241 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In1759571241 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1759571241 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1759571241 256) 0))) (or (and (= ~a$r_buff1_thd1~0_In1759571241 |P0Thread1of1ForFork1_#t~ite8_Out1759571241|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1759571241|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1759571241, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1759571241, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1759571241, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1759571241} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1759571241|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1759571241, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1759571241, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1759571241, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1759571241} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:13:01,099 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:13:01,099 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1949556190 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite21_Out1949556190| ~a$w_buff0~0_In1949556190) (= |P2Thread1of1ForFork0_#t~ite20_In1949556190| |P2Thread1of1ForFork0_#t~ite20_Out1949556190|) (not .cse0)) (and (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1949556190 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In1949556190 256)) (and (= 0 (mod ~a$r_buff1_thd3~0_In1949556190 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In1949556190 256) 0) .cse1))) .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out1949556190| |P2Thread1of1ForFork0_#t~ite20_Out1949556190|) (= ~a$w_buff0~0_In1949556190 |P2Thread1of1ForFork0_#t~ite20_Out1949556190|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In1949556190, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1949556190, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1949556190, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1949556190, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1949556190, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1949556190|, ~weak$$choice2~0=~weak$$choice2~0_In1949556190} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1949556190|, ~a$w_buff0~0=~a$w_buff0~0_In1949556190, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1949556190, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1949556190, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1949556190, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1949556190|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1949556190, ~weak$$choice2~0=~weak$$choice2~0_In1949556190} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:13:01,100 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-688004438 256)))) (or (and .cse0 (= ~a$w_buff0_used~0_In-688004438 |P2Thread1of1ForFork0_#t~ite26_Out-688004438|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-688004438 256) 0))) (or (and (= (mod ~a$r_buff1_thd3~0_In-688004438 256) 0) .cse1) (and (= (mod ~a$w_buff1_used~0_In-688004438 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-688004438 256)))) (= |P2Thread1of1ForFork0_#t~ite27_Out-688004438| |P2Thread1of1ForFork0_#t~ite26_Out-688004438|)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-688004438| |P2Thread1of1ForFork0_#t~ite26_Out-688004438|) (= |P2Thread1of1ForFork0_#t~ite27_Out-688004438| ~a$w_buff0_used~0_In-688004438)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-688004438|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-688004438, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688004438, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-688004438, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688004438, ~weak$$choice2~0=~weak$$choice2~0_In-688004438} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-688004438|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-688004438|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-688004438, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688004438, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-688004438, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688004438, ~weak$$choice2~0=~weak$$choice2~0_In-688004438} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:13:01,101 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:13:01,102 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:13:01,102 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out-1784128474| |P2Thread1of1ForFork0_#t~ite38_Out-1784128474|)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In-1784128474 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1784128474 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-1784128474| ~a~0_In-1784128474) (or .cse1 .cse2)) (and .cse0 (not .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out-1784128474| ~a$w_buff1~0_In-1784128474) (not .cse1)))) InVars {~a~0=~a~0_In-1784128474, ~a$w_buff1~0=~a$w_buff1~0_In-1784128474, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1784128474, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1784128474} OutVars{~a~0=~a~0_In-1784128474, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1784128474|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1784128474|, ~a$w_buff1~0=~a$w_buff1~0_In-1784128474, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1784128474, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1784128474} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:13:01,103 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-884565964 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-884565964 256)))) (or (and (= ~a$w_buff0_used~0_In-884565964 |P2Thread1of1ForFork0_#t~ite40_Out-884565964|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-884565964|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-884565964, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-884565964} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-884565964|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-884565964, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-884565964} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:13:01,103 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd3~0_In-637563313 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-637563313 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-637563313 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-637563313 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-637563313|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-637563313 |P2Thread1of1ForFork0_#t~ite41_Out-637563313|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-637563313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-637563313, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-637563313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-637563313} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-637563313, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-637563313, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-637563313, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-637563313, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-637563313|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:13:01,104 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In2026225189 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In2026225189 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In2026225189 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In2026225189 256)))) (or (and (= ~a$w_buff1_used~0_In2026225189 |P1Thread1of1ForFork2_#t~ite12_Out2026225189|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out2026225189|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2026225189, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2026225189, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2026225189, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2026225189} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2026225189, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2026225189, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2026225189, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out2026225189|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2026225189} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:13:01,104 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1326281609 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1326281609 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1326281609| ~a$r_buff0_thd2~0_In1326281609) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out1326281609| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1326281609, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1326281609} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1326281609, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1326281609, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1326281609|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:13:01,104 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-1256946432 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1256946432 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1256946432 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In-1256946432 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-1256946432| ~a$r_buff1_thd2~0_In-1256946432)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1256946432|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1256946432, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1256946432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1256946432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1256946432} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1256946432, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1256946432, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1256946432, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1256946432, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1256946432|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:13:01,105 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:13:01,105 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1941841714 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1941841714 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1941841714| ~a$r_buff0_thd3~0_In-1941841714)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1941841714| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1941841714, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1941841714} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1941841714, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1941841714, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1941841714|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:13:01,105 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In1104876069 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In1104876069 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1104876069 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In1104876069 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out1104876069| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd3~0_In1104876069 |P2Thread1of1ForFork0_#t~ite43_Out1104876069|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1104876069, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1104876069, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1104876069, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1104876069} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1104876069|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1104876069, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1104876069, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1104876069, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1104876069} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:13:01,105 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:13:01,105 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:13:01,106 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In1111138434 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1111138434 256)))) (or (and (= ~a~0_In1111138434 |ULTIMATE.start_main_#t~ite47_Out1111138434|) (or .cse0 .cse1)) (and (= ~a$w_buff1~0_In1111138434 |ULTIMATE.start_main_#t~ite47_Out1111138434|) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In1111138434, ~a$w_buff1~0=~a$w_buff1~0_In1111138434, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1111138434, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1111138434} OutVars{~a~0=~a~0_In1111138434, ~a$w_buff1~0=~a$w_buff1~0_In1111138434, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1111138434|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1111138434, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1111138434} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 15:13:01,106 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:13:01,106 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-415884566 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-415884566 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-415884566| ~a$w_buff0_used~0_In-415884566) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-415884566| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-415884566, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-415884566} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-415884566, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-415884566|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-415884566} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:13:01,106 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-1773683906 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1773683906 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-1773683906 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1773683906 256)))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-1773683906| ~a$w_buff1_used~0_In-1773683906) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1773683906| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1773683906, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1773683906, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1773683906, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1773683906} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1773683906|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1773683906, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1773683906, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1773683906, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1773683906} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:13:01,106 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In196223387 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In196223387 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out196223387| ~a$r_buff0_thd0~0_In196223387) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out196223387| 0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In196223387, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In196223387} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out196223387|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In196223387, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In196223387} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:13:01,107 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-2088444407 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-2088444407 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-2088444407 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-2088444407 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-2088444407| ~a$r_buff1_thd0~0_In-2088444407) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out-2088444407| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2088444407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2088444407, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2088444407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2088444407} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2088444407|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2088444407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2088444407, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2088444407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2088444407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:13:01,107 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:13:01,184 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_33eef18f-9669-4b73-af43-766caca8b695/bin/uautomizer/witness.graphml [2019-12-07 15:13:01,184 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:13:01,186 INFO L168 Benchmark]: Toolchain (without parser) took 194430.70 ms. Allocated memory was 1.0 GB in the beginning and 6.4 GB in the end (delta: 5.3 GB). Free memory was 934.0 MB in the beginning and 5.6 GB in the end (delta: -4.7 GB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. [2019-12-07 15:13:01,186 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:13:01,186 INFO L168 Benchmark]: CACSL2BoogieTranslator took 389.65 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -122.8 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:13:01,187 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.08 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:13:01,187 INFO L168 Benchmark]: Boogie Preprocessor took 27.57 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:13:01,187 INFO L168 Benchmark]: RCFGBuilder took 446.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.6 MB in the end (delta: 62.2 MB). Peak memory consumption was 62.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:13:01,187 INFO L168 Benchmark]: TraceAbstraction took 193431.78 ms. Allocated memory was 1.1 GB in the beginning and 5.7 GB in the end (delta: 4.6 GB). Free memory was 994.6 MB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. [2019-12-07 15:13:01,188 INFO L168 Benchmark]: Witness Printer took 92.52 ms. Allocated memory was 5.7 GB in the beginning and 6.4 GB in the end (delta: 683.1 MB). Free memory was 3.1 GB in the beginning and 5.6 GB in the end (delta: -2.4 GB). Peak memory consumption was 39.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:13:01,190 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 389.65 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -122.8 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.08 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.57 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 446.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.6 MB in the end (delta: 62.2 MB). Peak memory consumption was 62.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 193431.78 ms. Allocated memory was 1.1 GB in the beginning and 5.7 GB in the end (delta: 4.6 GB). Free memory was 994.6 MB in the beginning and 3.1 GB in the end (delta: -2.1 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. * Witness Printer took 92.52 ms. Allocated memory was 5.7 GB in the beginning and 6.4 GB in the end (delta: 683.1 MB). Free memory was 3.1 GB in the beginning and 5.6 GB in the end (delta: -2.4 GB). Peak memory consumption was 39.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 179 ProgramPointsBefore, 95 ProgramPointsAfterwards, 216 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 31 ChoiceCompositions, 6646 VarBasedMoverChecksPositive, 237 VarBasedMoverChecksNegative, 59 SemBasedMoverChecksPositive, 236 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 91218 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t263, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L742] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L743] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L744] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L745] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L746] 1 a$r_buff0_thd1 = (_Bool)1 [L749] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L752] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t264, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L766] 2 x = 1 [L769] 2 y = 1 [L772] 2 __unbuffered_p1_EAX = y [L775] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L841] FCALL, FORK 0 pthread_create(&t265, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L752] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L753] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L754] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 193.2s, OverallIterations: 36, TraceHistogramMax: 1, AutomataDifference: 93.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 11566 SDtfs, 17533 SDslu, 57553 SDs, 0 SdLazy, 72980 SolverSat, 1183 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 53.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1033 GetRequests, 30 SyntacticMatches, 47 SemanticMatches, 956 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15504 ImplicationChecksByTransitivity, 18.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=230321occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 72.5s AutomataMinimizationTime, 35 MinimizatonAttempts, 398929 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 5.7s InterpolantComputationTime, 1801 NumberOfCodeBlocks, 1801 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 1699 ConstructedInterpolants, 0 QuantifiedInterpolants, 1085227 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 35 InterpolantComputations, 35 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...