./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix010_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix010_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6e6d8338bf7c6b9b83cab1edf5d9f1a2216e4be7 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:24:52,368 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:24:52,369 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:24:52,377 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:24:52,377 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:24:52,378 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:24:52,379 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:24:52,380 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:24:52,381 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:24:52,382 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:24:52,383 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:24:52,383 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:24:52,384 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:24:52,384 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:24:52,385 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:24:52,386 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:24:52,386 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:24:52,387 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:24:52,388 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:24:52,390 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:24:52,391 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:24:52,391 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:24:52,392 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:24:52,392 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:24:52,394 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:24:52,394 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:24:52,394 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:24:52,395 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:24:52,395 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:24:52,396 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:24:52,396 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:24:52,396 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:24:52,397 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:24:52,397 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:24:52,398 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:24:52,398 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:24:52,398 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:24:52,398 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:24:52,398 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:24:52,399 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:24:52,399 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:24:52,400 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:24:52,410 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:24:52,410 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:24:52,410 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:24:52,411 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:24:52,411 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:24:52,411 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:24:52,411 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:24:52,411 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:24:52,411 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:24:52,411 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:24:52,412 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:24:52,412 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:24:52,412 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:24:52,412 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:24:52,412 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:24:52,412 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:24:52,412 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:24:52,413 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:24:52,413 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:24:52,413 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:24:52,413 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:24:52,413 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:24:52,413 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:24:52,413 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:24:52,413 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:24:52,414 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:24:52,414 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:24:52,414 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:24:52,414 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:24:52,414 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6e6d8338bf7c6b9b83cab1edf5d9f1a2216e4be7 [2019-12-07 18:24:52,515 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:24:52,524 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:24:52,527 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:24:52,529 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:24:52,529 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:24:52,530 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix010_rmo.oepc.i [2019-12-07 18:24:52,576 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/data/269491571/a142af8d80b949dfbbab55b1e37455c6/FLAG63b543b55 [2019-12-07 18:24:53,029 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:24:53,029 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/sv-benchmarks/c/pthread-wmm/mix010_rmo.oepc.i [2019-12-07 18:24:53,042 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/data/269491571/a142af8d80b949dfbbab55b1e37455c6/FLAG63b543b55 [2019-12-07 18:24:53,553 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/data/269491571/a142af8d80b949dfbbab55b1e37455c6 [2019-12-07 18:24:53,555 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:24:53,556 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:24:53,557 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:24:53,557 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:24:53,561 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:24:53,562 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:53,565 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b6fc423 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53, skipping insertion in model container [2019-12-07 18:24:53,565 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:53,571 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:24:53,611 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:24:53,864 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:24:53,871 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:24:53,920 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:24:53,969 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:24:53,970 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53 WrapperNode [2019-12-07 18:24:53,970 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:24:53,970 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:24:53,970 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:24:53,970 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:24:53,976 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:53,990 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:54,010 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:24:54,010 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:24:54,010 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:24:54,010 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:24:54,017 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:54,017 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:54,020 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:54,020 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:54,028 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:54,030 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:54,033 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... [2019-12-07 18:24:54,036 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:24:54,037 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:24:54,037 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:24:54,037 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:24:54,037 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:24:54,076 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:24:54,077 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:24:54,077 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:24:54,077 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:24:54,077 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:24:54,077 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:24:54,077 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:24:54,077 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:24:54,078 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:24:54,078 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:24:54,078 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:24:54,078 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:24:54,078 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:24:54,080 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:24:54,452 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:24:54,453 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:24:54,454 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:24:54 BoogieIcfgContainer [2019-12-07 18:24:54,454 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:24:54,455 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:24:54,455 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:24:54,457 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:24:54,458 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:24:53" (1/3) ... [2019-12-07 18:24:54,458 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7fbb6585 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:24:54, skipping insertion in model container [2019-12-07 18:24:54,458 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:24:53" (2/3) ... [2019-12-07 18:24:54,459 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7fbb6585 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:24:54, skipping insertion in model container [2019-12-07 18:24:54,459 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:24:54" (3/3) ... [2019-12-07 18:24:54,460 INFO L109 eAbstractionObserver]: Analyzing ICFG mix010_rmo.oepc.i [2019-12-07 18:24:54,469 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:24:54,469 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:24:54,475 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:24:54,476 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:24:54,502 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,502 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,502 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,502 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,503 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,503 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,503 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,503 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,503 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,503 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,507 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,507 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,507 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,508 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,508 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,508 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,508 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,508 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,508 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,509 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,509 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,509 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,509 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,509 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,514 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,514 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,531 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,531 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,531 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,531 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,531 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,531 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:24:54,546 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:24:54,559 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:24:54,559 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:24:54,559 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:24:54,559 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:24:54,559 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:24:54,559 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:24:54,559 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:24:54,559 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:24:54,570 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 18:24:54,571 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 18:24:54,638 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 18:24:54,638 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:24:54,649 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:24:54,665 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 18:24:54,704 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 18:24:54,705 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:24:54,712 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:24:54,732 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:24:54,733 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:24:57,463 WARN L192 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 18:24:57,757 WARN L192 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 18:24:57,867 INFO L206 etLargeBlockEncoding]: Checked pairs total: 91218 [2019-12-07 18:24:57,867 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 18:24:57,869 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 105 transitions [2019-12-07 18:25:15,716 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 18:25:15,717 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 18:25:15,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:25:15,721 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:15,722 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:25:15,722 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:15,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:15,726 INFO L82 PathProgramCache]: Analyzing trace with hash 921826, now seen corresponding path program 1 times [2019-12-07 18:25:15,731 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:15,732 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503488660] [2019-12-07 18:25:15,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:15,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:15,868 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:15,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503488660] [2019-12-07 18:25:15,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:15,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:25:15,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1736903326] [2019-12-07 18:25:15,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:25:15,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:15,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:25:15,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:15,884 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 18:25:16,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:16,651 INFO L93 Difference]: Finished difference Result 125226 states and 534182 transitions. [2019-12-07 18:25:16,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:25:16,653 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:25:16,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:17,124 INFO L225 Difference]: With dead ends: 125226 [2019-12-07 18:25:17,125 INFO L226 Difference]: Without dead ends: 117946 [2019-12-07 18:25:17,126 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:23,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117946 states. [2019-12-07 18:25:24,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117946 to 117946. [2019-12-07 18:25:24,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117946 states. [2019-12-07 18:25:25,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117946 states to 117946 states and 502500 transitions. [2019-12-07 18:25:25,390 INFO L78 Accepts]: Start accepts. Automaton has 117946 states and 502500 transitions. Word has length 3 [2019-12-07 18:25:25,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:25,390 INFO L462 AbstractCegarLoop]: Abstraction has 117946 states and 502500 transitions. [2019-12-07 18:25:25,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:25:25,390 INFO L276 IsEmpty]: Start isEmpty. Operand 117946 states and 502500 transitions. [2019-12-07 18:25:25,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:25:25,395 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:25,395 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:25,395 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:25,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:25,396 INFO L82 PathProgramCache]: Analyzing trace with hash -2034548154, now seen corresponding path program 1 times [2019-12-07 18:25:25,396 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:25,396 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995657537] [2019-12-07 18:25:25,396 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:25,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:25,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:25,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995657537] [2019-12-07 18:25:25,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:25,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:25:25,470 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [815482071] [2019-12-07 18:25:25,471 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:25:25,471 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:25,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:25:25,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:25:25,471 INFO L87 Difference]: Start difference. First operand 117946 states and 502500 transitions. Second operand 4 states. [2019-12-07 18:25:26,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:26,968 INFO L93 Difference]: Finished difference Result 183040 states and 750092 transitions. [2019-12-07 18:25:26,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:25:26,969 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:25:26,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:27,464 INFO L225 Difference]: With dead ends: 183040 [2019-12-07 18:25:27,464 INFO L226 Difference]: Without dead ends: 182991 [2019-12-07 18:25:27,464 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:25:33,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182991 states. [2019-12-07 18:25:37,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182991 to 168271. [2019-12-07 18:25:37,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168271 states. [2019-12-07 18:25:37,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168271 states to 168271 states and 697811 transitions. [2019-12-07 18:25:37,951 INFO L78 Accepts]: Start accepts. Automaton has 168271 states and 697811 transitions. Word has length 11 [2019-12-07 18:25:37,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:37,951 INFO L462 AbstractCegarLoop]: Abstraction has 168271 states and 697811 transitions. [2019-12-07 18:25:37,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:25:37,951 INFO L276 IsEmpty]: Start isEmpty. Operand 168271 states and 697811 transitions. [2019-12-07 18:25:37,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:25:37,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:37,955 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:37,956 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:37,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:37,956 INFO L82 PathProgramCache]: Analyzing trace with hash -579003435, now seen corresponding path program 1 times [2019-12-07 18:25:37,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:37,956 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414954661] [2019-12-07 18:25:37,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:37,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:38,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:38,006 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414954661] [2019-12-07 18:25:38,006 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:38,006 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:25:38,006 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1384697804] [2019-12-07 18:25:38,007 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:25:38,007 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:38,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:25:38,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:25:38,007 INFO L87 Difference]: Start difference. First operand 168271 states and 697811 transitions. Second operand 4 states. [2019-12-07 18:25:39,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:39,691 INFO L93 Difference]: Finished difference Result 237004 states and 961776 transitions. [2019-12-07 18:25:39,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:25:39,692 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:25:39,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:40,318 INFO L225 Difference]: With dead ends: 237004 [2019-12-07 18:25:40,318 INFO L226 Difference]: Without dead ends: 236948 [2019-12-07 18:25:40,319 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:25:47,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236948 states. [2019-12-07 18:25:52,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236948 to 201086. [2019-12-07 18:25:52,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201086 states. [2019-12-07 18:25:53,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201086 states to 201086 states and 829537 transitions. [2019-12-07 18:25:53,039 INFO L78 Accepts]: Start accepts. Automaton has 201086 states and 829537 transitions. Word has length 13 [2019-12-07 18:25:53,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:53,040 INFO L462 AbstractCegarLoop]: Abstraction has 201086 states and 829537 transitions. [2019-12-07 18:25:53,040 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:25:53,040 INFO L276 IsEmpty]: Start isEmpty. Operand 201086 states and 829537 transitions. [2019-12-07 18:25:53,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:25:53,051 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:53,051 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:53,051 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:53,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:53,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1458626840, now seen corresponding path program 1 times [2019-12-07 18:25:53,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:53,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120845628] [2019-12-07 18:25:53,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:53,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:53,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:53,110 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120845628] [2019-12-07 18:25:53,110 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:53,110 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:25:53,110 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507708806] [2019-12-07 18:25:53,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:25:53,111 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:53,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:25:53,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:25:53,111 INFO L87 Difference]: Start difference. First operand 201086 states and 829537 transitions. Second operand 5 states. [2019-12-07 18:25:55,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:55,229 INFO L93 Difference]: Finished difference Result 275142 states and 1124357 transitions. [2019-12-07 18:25:55,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:25:55,230 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:25:55,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:55,973 INFO L225 Difference]: With dead ends: 275142 [2019-12-07 18:25:55,974 INFO L226 Difference]: Without dead ends: 275142 [2019-12-07 18:25:55,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:26:05,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275142 states. [2019-12-07 18:26:09,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275142 to 230321. [2019-12-07 18:26:09,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230321 states. [2019-12-07 18:26:10,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230321 states to 230321 states and 948783 transitions. [2019-12-07 18:26:10,055 INFO L78 Accepts]: Start accepts. Automaton has 230321 states and 948783 transitions. Word has length 16 [2019-12-07 18:26:10,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:10,055 INFO L462 AbstractCegarLoop]: Abstraction has 230321 states and 948783 transitions. [2019-12-07 18:26:10,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:26:10,055 INFO L276 IsEmpty]: Start isEmpty. Operand 230321 states and 948783 transitions. [2019-12-07 18:26:10,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:26:10,070 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:10,071 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:10,071 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:10,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:10,071 INFO L82 PathProgramCache]: Analyzing trace with hash -1933654436, now seen corresponding path program 1 times [2019-12-07 18:26:10,071 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:10,071 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901070154] [2019-12-07 18:26:10,071 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:10,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:10,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:10,114 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901070154] [2019-12-07 18:26:10,114 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:10,114 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:26:10,114 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535618436] [2019-12-07 18:26:10,114 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:10,114 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:10,115 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:10,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:10,115 INFO L87 Difference]: Start difference. First operand 230321 states and 948783 transitions. Second operand 3 states. [2019-12-07 18:26:10,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:10,248 INFO L93 Difference]: Finished difference Result 42455 states and 137548 transitions. [2019-12-07 18:26:10,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:10,249 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:26:10,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:10,311 INFO L225 Difference]: With dead ends: 42455 [2019-12-07 18:26:10,311 INFO L226 Difference]: Without dead ends: 42455 [2019-12-07 18:26:10,311 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:10,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42455 states. [2019-12-07 18:26:10,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42455 to 42335. [2019-12-07 18:26:10,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42335 states. [2019-12-07 18:26:11,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42335 states to 42335 states and 137188 transitions. [2019-12-07 18:26:11,035 INFO L78 Accepts]: Start accepts. Automaton has 42335 states and 137188 transitions. Word has length 18 [2019-12-07 18:26:11,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:11,035 INFO L462 AbstractCegarLoop]: Abstraction has 42335 states and 137188 transitions. [2019-12-07 18:26:11,035 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:11,035 INFO L276 IsEmpty]: Start isEmpty. Operand 42335 states and 137188 transitions. [2019-12-07 18:26:11,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:26:11,041 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:11,041 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:11,041 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:11,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:11,042 INFO L82 PathProgramCache]: Analyzing trace with hash -311730194, now seen corresponding path program 1 times [2019-12-07 18:26:11,042 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:11,042 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210043719] [2019-12-07 18:26:11,042 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:11,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:11,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:11,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210043719] [2019-12-07 18:26:11,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:11,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:26:11,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885624921] [2019-12-07 18:26:11,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:26:11,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:11,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:26:11,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:26:11,128 INFO L87 Difference]: Start difference. First operand 42335 states and 137188 transitions. Second operand 7 states. [2019-12-07 18:26:11,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:11,746 INFO L93 Difference]: Finished difference Result 68217 states and 214442 transitions. [2019-12-07 18:26:11,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:26:11,747 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 18:26:11,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:11,846 INFO L225 Difference]: With dead ends: 68217 [2019-12-07 18:26:11,846 INFO L226 Difference]: Without dead ends: 68203 [2019-12-07 18:26:11,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:26:12,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68203 states. [2019-12-07 18:26:13,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68203 to 42009. [2019-12-07 18:26:13,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42009 states. [2019-12-07 18:26:13,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42009 states to 42009 states and 135594 transitions. [2019-12-07 18:26:13,226 INFO L78 Accepts]: Start accepts. Automaton has 42009 states and 135594 transitions. Word has length 22 [2019-12-07 18:26:13,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:13,226 INFO L462 AbstractCegarLoop]: Abstraction has 42009 states and 135594 transitions. [2019-12-07 18:26:13,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:26:13,227 INFO L276 IsEmpty]: Start isEmpty. Operand 42009 states and 135594 transitions. [2019-12-07 18:26:13,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:26:13,237 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:13,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:13,237 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:13,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:13,237 INFO L82 PathProgramCache]: Analyzing trace with hash 573582081, now seen corresponding path program 1 times [2019-12-07 18:26:13,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:13,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053844209] [2019-12-07 18:26:13,238 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:13,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:13,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:13,285 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053844209] [2019-12-07 18:26:13,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:13,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:13,286 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1987240783] [2019-12-07 18:26:13,286 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:26:13,286 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:13,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:26:13,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:13,286 INFO L87 Difference]: Start difference. First operand 42009 states and 135594 transitions. Second operand 5 states. [2019-12-07 18:26:13,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:13,738 INFO L93 Difference]: Finished difference Result 57974 states and 183613 transitions. [2019-12-07 18:26:13,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:26:13,739 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:26:13,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:13,827 INFO L225 Difference]: With dead ends: 57974 [2019-12-07 18:26:13,827 INFO L226 Difference]: Without dead ends: 57961 [2019-12-07 18:26:13,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:26:14,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57961 states. [2019-12-07 18:26:14,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57961 to 49840. [2019-12-07 18:26:14,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49840 states. [2019-12-07 18:26:14,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49840 states to 49840 states and 160152 transitions. [2019-12-07 18:26:14,776 INFO L78 Accepts]: Start accepts. Automaton has 49840 states and 160152 transitions. Word has length 25 [2019-12-07 18:26:14,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:14,777 INFO L462 AbstractCegarLoop]: Abstraction has 49840 states and 160152 transitions. [2019-12-07 18:26:14,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:26:14,777 INFO L276 IsEmpty]: Start isEmpty. Operand 49840 states and 160152 transitions. [2019-12-07 18:26:14,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:26:14,792 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:14,792 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:14,792 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:14,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:14,793 INFO L82 PathProgramCache]: Analyzing trace with hash 574668024, now seen corresponding path program 1 times [2019-12-07 18:26:14,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:14,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1281082908] [2019-12-07 18:26:14,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:14,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:14,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:14,840 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1281082908] [2019-12-07 18:26:14,840 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:14,840 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:26:14,840 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631236506] [2019-12-07 18:26:14,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:26:14,841 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:14,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:26:14,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:26:14,841 INFO L87 Difference]: Start difference. First operand 49840 states and 160152 transitions. Second operand 6 states. [2019-12-07 18:26:15,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:15,357 INFO L93 Difference]: Finished difference Result 71876 states and 224793 transitions. [2019-12-07 18:26:15,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:26:15,357 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:26:15,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:15,464 INFO L225 Difference]: With dead ends: 71876 [2019-12-07 18:26:15,464 INFO L226 Difference]: Without dead ends: 71836 [2019-12-07 18:26:15,464 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:26:15,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71836 states. [2019-12-07 18:26:16,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71836 to 55662. [2019-12-07 18:26:16,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55662 states. [2019-12-07 18:26:16,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55662 states to 55662 states and 177494 transitions. [2019-12-07 18:26:16,873 INFO L78 Accepts]: Start accepts. Automaton has 55662 states and 177494 transitions. Word has length 27 [2019-12-07 18:26:16,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:16,874 INFO L462 AbstractCegarLoop]: Abstraction has 55662 states and 177494 transitions. [2019-12-07 18:26:16,874 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:26:16,874 INFO L276 IsEmpty]: Start isEmpty. Operand 55662 states and 177494 transitions. [2019-12-07 18:26:16,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:26:16,891 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:16,891 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:16,891 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:16,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:16,891 INFO L82 PathProgramCache]: Analyzing trace with hash -834373480, now seen corresponding path program 1 times [2019-12-07 18:26:16,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:16,892 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2058752008] [2019-12-07 18:26:16,892 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:16,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:16,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:16,977 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2058752008] [2019-12-07 18:26:16,977 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:16,978 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:26:16,978 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [668286209] [2019-12-07 18:26:16,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:26:16,978 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:16,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:26:16,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:16,979 INFO L87 Difference]: Start difference. First operand 55662 states and 177494 transitions. Second operand 5 states. [2019-12-07 18:26:17,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:17,552 INFO L93 Difference]: Finished difference Result 73977 states and 234048 transitions. [2019-12-07 18:26:17,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:26:17,553 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 18:26:17,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:17,664 INFO L225 Difference]: With dead ends: 73977 [2019-12-07 18:26:17,665 INFO L226 Difference]: Without dead ends: 73977 [2019-12-07 18:26:17,665 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:26:17,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73977 states. [2019-12-07 18:26:18,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73977 to 66292. [2019-12-07 18:26:18,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66292 states. [2019-12-07 18:26:18,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66292 states to 66292 states and 211352 transitions. [2019-12-07 18:26:18,853 INFO L78 Accepts]: Start accepts. Automaton has 66292 states and 211352 transitions. Word has length 28 [2019-12-07 18:26:18,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:18,853 INFO L462 AbstractCegarLoop]: Abstraction has 66292 states and 211352 transitions. [2019-12-07 18:26:18,853 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:26:18,853 INFO L276 IsEmpty]: Start isEmpty. Operand 66292 states and 211352 transitions. [2019-12-07 18:26:18,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:26:18,879 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:18,879 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:18,879 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:18,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:18,879 INFO L82 PathProgramCache]: Analyzing trace with hash -1649688558, now seen corresponding path program 1 times [2019-12-07 18:26:18,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:18,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052808723] [2019-12-07 18:26:18,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:18,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:18,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:18,915 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052808723] [2019-12-07 18:26:18,915 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:18,915 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:18,915 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602129925] [2019-12-07 18:26:18,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:26:18,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:18,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:26:18,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:26:18,916 INFO L87 Difference]: Start difference. First operand 66292 states and 211352 transitions. Second operand 4 states. [2019-12-07 18:26:19,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:19,006 INFO L93 Difference]: Finished difference Result 28026 states and 84332 transitions. [2019-12-07 18:26:19,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:26:19,007 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 18:26:19,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:19,044 INFO L225 Difference]: With dead ends: 28026 [2019-12-07 18:26:19,044 INFO L226 Difference]: Without dead ends: 28026 [2019-12-07 18:26:19,045 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:26:19,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28026 states. [2019-12-07 18:26:19,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28026 to 26046. [2019-12-07 18:26:19,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26046 states. [2019-12-07 18:26:19,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26046 states to 26046 states and 78430 transitions. [2019-12-07 18:26:19,670 INFO L78 Accepts]: Start accepts. Automaton has 26046 states and 78430 transitions. Word has length 29 [2019-12-07 18:26:19,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:19,670 INFO L462 AbstractCegarLoop]: Abstraction has 26046 states and 78430 transitions. [2019-12-07 18:26:19,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:26:19,670 INFO L276 IsEmpty]: Start isEmpty. Operand 26046 states and 78430 transitions. [2019-12-07 18:26:19,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:26:19,694 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:19,694 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:19,694 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:19,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:19,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1393723506, now seen corresponding path program 1 times [2019-12-07 18:26:19,694 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:19,694 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660472030] [2019-12-07 18:26:19,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:19,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:19,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:19,758 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660472030] [2019-12-07 18:26:19,758 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:19,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:26:19,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2028626542] [2019-12-07 18:26:19,759 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:26:19,759 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:19,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:26:19,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:26:19,759 INFO L87 Difference]: Start difference. First operand 26046 states and 78430 transitions. Second operand 6 states. [2019-12-07 18:26:20,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:20,147 INFO L93 Difference]: Finished difference Result 31590 states and 94030 transitions. [2019-12-07 18:26:20,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:26:20,148 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 18:26:20,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:20,186 INFO L225 Difference]: With dead ends: 31590 [2019-12-07 18:26:20,186 INFO L226 Difference]: Without dead ends: 31590 [2019-12-07 18:26:20,186 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:26:20,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31590 states. [2019-12-07 18:26:20,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31590 to 26815. [2019-12-07 18:26:20,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26815 states. [2019-12-07 18:26:20,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26815 states to 26815 states and 80873 transitions. [2019-12-07 18:26:20,614 INFO L78 Accepts]: Start accepts. Automaton has 26815 states and 80873 transitions. Word has length 33 [2019-12-07 18:26:20,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:20,615 INFO L462 AbstractCegarLoop]: Abstraction has 26815 states and 80873 transitions. [2019-12-07 18:26:20,615 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:26:20,615 INFO L276 IsEmpty]: Start isEmpty. Operand 26815 states and 80873 transitions. [2019-12-07 18:26:20,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:26:20,633 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:20,633 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:20,634 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:20,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:20,634 INFO L82 PathProgramCache]: Analyzing trace with hash 305072172, now seen corresponding path program 2 times [2019-12-07 18:26:20,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:20,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198114359] [2019-12-07 18:26:20,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:20,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:20,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:20,708 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198114359] [2019-12-07 18:26:20,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:20,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:26:20,708 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [303044029] [2019-12-07 18:26:20,709 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:26:20,709 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:20,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:26:20,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:26:20,709 INFO L87 Difference]: Start difference. First operand 26815 states and 80873 transitions. Second operand 8 states. [2019-12-07 18:26:21,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:21,580 INFO L93 Difference]: Finished difference Result 36396 states and 106445 transitions. [2019-12-07 18:26:21,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 18:26:21,581 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 18:26:21,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:21,622 INFO L225 Difference]: With dead ends: 36396 [2019-12-07 18:26:21,622 INFO L226 Difference]: Without dead ends: 36396 [2019-12-07 18:26:21,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=352, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:26:21,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36396 states. [2019-12-07 18:26:22,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36396 to 24841. [2019-12-07 18:26:22,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24841 states. [2019-12-07 18:26:22,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24841 states to 24841 states and 74402 transitions. [2019-12-07 18:26:22,068 INFO L78 Accepts]: Start accepts. Automaton has 24841 states and 74402 transitions. Word has length 33 [2019-12-07 18:26:22,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:22,068 INFO L462 AbstractCegarLoop]: Abstraction has 24841 states and 74402 transitions. [2019-12-07 18:26:22,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:26:22,068 INFO L276 IsEmpty]: Start isEmpty. Operand 24841 states and 74402 transitions. [2019-12-07 18:26:22,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:26:22,089 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:22,089 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:22,089 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:22,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:22,090 INFO L82 PathProgramCache]: Analyzing trace with hash -1779229683, now seen corresponding path program 1 times [2019-12-07 18:26:22,090 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:22,090 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276137441] [2019-12-07 18:26:22,090 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:22,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:22,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:22,145 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276137441] [2019-12-07 18:26:22,145 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:22,145 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:26:22,145 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1726261981] [2019-12-07 18:26:22,145 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:26:22,145 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:22,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:26:22,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:26:22,146 INFO L87 Difference]: Start difference. First operand 24841 states and 74402 transitions. Second operand 6 states. [2019-12-07 18:26:22,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:22,751 INFO L93 Difference]: Finished difference Result 41721 states and 125684 transitions. [2019-12-07 18:26:22,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:26:22,751 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 18:26:22,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:22,802 INFO L225 Difference]: With dead ends: 41721 [2019-12-07 18:26:22,802 INFO L226 Difference]: Without dead ends: 41721 [2019-12-07 18:26:22,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:26:22,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41721 states. [2019-12-07 18:26:23,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41721 to 28558. [2019-12-07 18:26:23,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28558 states. [2019-12-07 18:26:23,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28558 states to 28558 states and 86084 transitions. [2019-12-07 18:26:23,502 INFO L78 Accepts]: Start accepts. Automaton has 28558 states and 86084 transitions. Word has length 39 [2019-12-07 18:26:23,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:23,503 INFO L462 AbstractCegarLoop]: Abstraction has 28558 states and 86084 transitions. [2019-12-07 18:26:23,503 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:26:23,503 INFO L276 IsEmpty]: Start isEmpty. Operand 28558 states and 86084 transitions. [2019-12-07 18:26:23,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:26:23,532 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:23,532 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:23,532 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:23,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:23,532 INFO L82 PathProgramCache]: Analyzing trace with hash 681610815, now seen corresponding path program 2 times [2019-12-07 18:26:23,532 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:23,533 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [37807934] [2019-12-07 18:26:23,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:23,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:23,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:23,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [37807934] [2019-12-07 18:26:23,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:23,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:26:23,574 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1931807269] [2019-12-07 18:26:23,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:23,575 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:23,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:23,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:23,575 INFO L87 Difference]: Start difference. First operand 28558 states and 86084 transitions. Second operand 3 states. [2019-12-07 18:26:23,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:23,638 INFO L93 Difference]: Finished difference Result 23590 states and 69815 transitions. [2019-12-07 18:26:23,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:23,639 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 18:26:23,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:23,665 INFO L225 Difference]: With dead ends: 23590 [2019-12-07 18:26:23,665 INFO L226 Difference]: Without dead ends: 23590 [2019-12-07 18:26:23,666 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:23,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23590 states. [2019-12-07 18:26:23,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23590 to 23486. [2019-12-07 18:26:23,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23486 states. [2019-12-07 18:26:23,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23486 states to 23486 states and 69527 transitions. [2019-12-07 18:26:23,989 INFO L78 Accepts]: Start accepts. Automaton has 23486 states and 69527 transitions. Word has length 39 [2019-12-07 18:26:23,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:23,989 INFO L462 AbstractCegarLoop]: Abstraction has 23486 states and 69527 transitions. [2019-12-07 18:26:23,989 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:23,990 INFO L276 IsEmpty]: Start isEmpty. Operand 23486 states and 69527 transitions. [2019-12-07 18:26:24,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:26:24,007 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:24,007 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:24,007 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:24,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:24,008 INFO L82 PathProgramCache]: Analyzing trace with hash -1124949362, now seen corresponding path program 1 times [2019-12-07 18:26:24,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:24,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994294631] [2019-12-07 18:26:24,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:24,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:24,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:24,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1994294631] [2019-12-07 18:26:24,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:24,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:26:24,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393890932] [2019-12-07 18:26:24,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:26:24,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:24,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:26:24,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:24,048 INFO L87 Difference]: Start difference. First operand 23486 states and 69527 transitions. Second operand 5 states. [2019-12-07 18:26:24,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:24,116 INFO L93 Difference]: Finished difference Result 21883 states and 65894 transitions. [2019-12-07 18:26:24,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:26:24,116 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:26:24,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:24,139 INFO L225 Difference]: With dead ends: 21883 [2019-12-07 18:26:24,139 INFO L226 Difference]: Without dead ends: 21883 [2019-12-07 18:26:24,140 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:24,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21883 states. [2019-12-07 18:26:24,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21883 to 19631. [2019-12-07 18:26:24,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19631 states. [2019-12-07 18:26:24,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19631 states to 19631 states and 59578 transitions. [2019-12-07 18:26:24,432 INFO L78 Accepts]: Start accepts. Automaton has 19631 states and 59578 transitions. Word has length 40 [2019-12-07 18:26:24,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:24,432 INFO L462 AbstractCegarLoop]: Abstraction has 19631 states and 59578 transitions. [2019-12-07 18:26:24,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:26:24,432 INFO L276 IsEmpty]: Start isEmpty. Operand 19631 states and 59578 transitions. [2019-12-07 18:26:24,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:26:24,449 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:24,449 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:24,449 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:24,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:24,450 INFO L82 PathProgramCache]: Analyzing trace with hash 199584621, now seen corresponding path program 1 times [2019-12-07 18:26:24,450 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:24,450 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056563266] [2019-12-07 18:26:24,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:24,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:24,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:24,482 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056563266] [2019-12-07 18:26:24,482 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:24,482 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:24,482 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975877437] [2019-12-07 18:26:24,483 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:24,483 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:24,483 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:24,483 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:24,483 INFO L87 Difference]: Start difference. First operand 19631 states and 59578 transitions. Second operand 3 states. [2019-12-07 18:26:24,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:24,573 INFO L93 Difference]: Finished difference Result 27663 states and 83976 transitions. [2019-12-07 18:26:24,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:24,574 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:26:24,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:24,605 INFO L225 Difference]: With dead ends: 27663 [2019-12-07 18:26:24,605 INFO L226 Difference]: Without dead ends: 27663 [2019-12-07 18:26:24,605 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:24,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27663 states. [2019-12-07 18:26:24,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27663 to 21467. [2019-12-07 18:26:24,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21467 states. [2019-12-07 18:26:24,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21467 states to 21467 states and 65710 transitions. [2019-12-07 18:26:24,937 INFO L78 Accepts]: Start accepts. Automaton has 21467 states and 65710 transitions. Word has length 65 [2019-12-07 18:26:24,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:24,937 INFO L462 AbstractCegarLoop]: Abstraction has 21467 states and 65710 transitions. [2019-12-07 18:26:24,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:24,937 INFO L276 IsEmpty]: Start isEmpty. Operand 21467 states and 65710 transitions. [2019-12-07 18:26:24,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:26:24,954 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:24,955 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:24,955 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:24,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:24,955 INFO L82 PathProgramCache]: Analyzing trace with hash 2032580168, now seen corresponding path program 1 times [2019-12-07 18:26:24,955 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:24,955 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818920187] [2019-12-07 18:26:24,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:24,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:25,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:25,003 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818920187] [2019-12-07 18:26:25,003 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:25,003 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:26:25,003 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979205099] [2019-12-07 18:26:25,004 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:25,004 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:25,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:25,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:25,004 INFO L87 Difference]: Start difference. First operand 21467 states and 65710 transitions. Second operand 3 states. [2019-12-07 18:26:25,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:25,100 INFO L93 Difference]: Finished difference Result 26626 states and 81148 transitions. [2019-12-07 18:26:25,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:25,100 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:26:25,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:25,131 INFO L225 Difference]: With dead ends: 26626 [2019-12-07 18:26:25,132 INFO L226 Difference]: Without dead ends: 26626 [2019-12-07 18:26:25,132 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:25,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26626 states. [2019-12-07 18:26:25,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26626 to 22212. [2019-12-07 18:26:25,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22212 states. [2019-12-07 18:26:25,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22212 states to 22212 states and 68147 transitions. [2019-12-07 18:26:25,520 INFO L78 Accepts]: Start accepts. Automaton has 22212 states and 68147 transitions. Word has length 65 [2019-12-07 18:26:25,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:25,521 INFO L462 AbstractCegarLoop]: Abstraction has 22212 states and 68147 transitions. [2019-12-07 18:26:25,521 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:25,521 INFO L276 IsEmpty]: Start isEmpty. Operand 22212 states and 68147 transitions. [2019-12-07 18:26:25,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:26:25,538 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:25,538 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:25,538 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:25,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:25,539 INFO L82 PathProgramCache]: Analyzing trace with hash 1030379695, now seen corresponding path program 1 times [2019-12-07 18:26:25,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:25,539 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1511668927] [2019-12-07 18:26:25,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:25,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:25,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:25,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1511668927] [2019-12-07 18:26:25,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:25,591 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:25,591 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1929683558] [2019-12-07 18:26:25,591 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:26:25,591 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:25,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:26:25,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:26:25,592 INFO L87 Difference]: Start difference. First operand 22212 states and 68147 transitions. Second operand 4 states. [2019-12-07 18:26:25,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:25,895 INFO L93 Difference]: Finished difference Result 22212 states and 67923 transitions. [2019-12-07 18:26:25,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:26:25,896 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 18:26:25,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:25,917 INFO L225 Difference]: With dead ends: 22212 [2019-12-07 18:26:25,917 INFO L226 Difference]: Without dead ends: 22212 [2019-12-07 18:26:25,917 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:25,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22212 states. [2019-12-07 18:26:26,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22212 to 20561. [2019-12-07 18:26:26,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20561 states. [2019-12-07 18:26:26,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20561 states to 20561 states and 62763 transitions. [2019-12-07 18:26:26,221 INFO L78 Accepts]: Start accepts. Automaton has 20561 states and 62763 transitions. Word has length 66 [2019-12-07 18:26:26,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:26,222 INFO L462 AbstractCegarLoop]: Abstraction has 20561 states and 62763 transitions. [2019-12-07 18:26:26,222 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:26:26,222 INFO L276 IsEmpty]: Start isEmpty. Operand 20561 states and 62763 transitions. [2019-12-07 18:26:26,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:26:26,240 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:26,240 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:26,240 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:26,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:26,240 INFO L82 PathProgramCache]: Analyzing trace with hash -576070305, now seen corresponding path program 1 times [2019-12-07 18:26:26,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:26,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104467777] [2019-12-07 18:26:26,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:26,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:26,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:26,281 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [104467777] [2019-12-07 18:26:26,281 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:26,281 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:26:26,282 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1610810895] [2019-12-07 18:26:26,282 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:26,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:26,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:26,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:26,282 INFO L87 Difference]: Start difference. First operand 20561 states and 62763 transitions. Second operand 3 states. [2019-12-07 18:26:26,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:26,345 INFO L93 Difference]: Finished difference Result 20560 states and 62761 transitions. [2019-12-07 18:26:26,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:26,345 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:26:26,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:26,367 INFO L225 Difference]: With dead ends: 20560 [2019-12-07 18:26:26,367 INFO L226 Difference]: Without dead ends: 20560 [2019-12-07 18:26:26,368 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:26,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20560 states. [2019-12-07 18:26:26,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20560 to 16510. [2019-12-07 18:26:26,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16510 states. [2019-12-07 18:26:26,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16510 states to 16510 states and 51082 transitions. [2019-12-07 18:26:26,641 INFO L78 Accepts]: Start accepts. Automaton has 16510 states and 51082 transitions. Word has length 66 [2019-12-07 18:26:26,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:26,641 INFO L462 AbstractCegarLoop]: Abstraction has 16510 states and 51082 transitions. [2019-12-07 18:26:26,641 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:26,641 INFO L276 IsEmpty]: Start isEmpty. Operand 16510 states and 51082 transitions. [2019-12-07 18:26:26,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:26,656 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:26,657 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:26,657 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:26,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:26,657 INFO L82 PathProgramCache]: Analyzing trace with hash 2062742571, now seen corresponding path program 1 times [2019-12-07 18:26:26,657 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:26,657 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030093838] [2019-12-07 18:26:26,657 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:26,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:26,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:26,821 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2030093838] [2019-12-07 18:26:26,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:26,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:26:26,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [663626715] [2019-12-07 18:26:26,821 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:26:26,821 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:26,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:26:26,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:26:26,821 INFO L87 Difference]: Start difference. First operand 16510 states and 51082 transitions. Second operand 10 states. [2019-12-07 18:26:28,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:28,171 INFO L93 Difference]: Finished difference Result 35281 states and 108565 transitions. [2019-12-07 18:26:28,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:26:28,171 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:26:28,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:28,209 INFO L225 Difference]: With dead ends: 35281 [2019-12-07 18:26:28,209 INFO L226 Difference]: Without dead ends: 25357 [2019-12-07 18:26:28,210 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:26:28,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25357 states. [2019-12-07 18:26:28,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25357 to 19342. [2019-12-07 18:26:28,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19342 states. [2019-12-07 18:26:28,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19342 states to 19342 states and 59648 transitions. [2019-12-07 18:26:28,542 INFO L78 Accepts]: Start accepts. Automaton has 19342 states and 59648 transitions. Word has length 67 [2019-12-07 18:26:28,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:28,542 INFO L462 AbstractCegarLoop]: Abstraction has 19342 states and 59648 transitions. [2019-12-07 18:26:28,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:26:28,542 INFO L276 IsEmpty]: Start isEmpty. Operand 19342 states and 59648 transitions. [2019-12-07 18:26:28,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:28,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:28,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:28,560 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:28,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:28,560 INFO L82 PathProgramCache]: Analyzing trace with hash -492001749, now seen corresponding path program 2 times [2019-12-07 18:26:28,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:28,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1978810280] [2019-12-07 18:26:28,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:28,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:28,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:28,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1978810280] [2019-12-07 18:26:28,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:28,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:26:28,699 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811935211] [2019-12-07 18:26:28,699 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:26:28,699 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:28,699 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:26:28,699 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:26:28,699 INFO L87 Difference]: Start difference. First operand 19342 states and 59648 transitions. Second operand 10 states. [2019-12-07 18:26:30,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:30,179 INFO L93 Difference]: Finished difference Result 31033 states and 94859 transitions. [2019-12-07 18:26:30,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:26:30,179 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:26:30,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:30,212 INFO L225 Difference]: With dead ends: 31033 [2019-12-07 18:26:30,212 INFO L226 Difference]: Without dead ends: 27082 [2019-12-07 18:26:30,212 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=337, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:26:30,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27082 states. [2019-12-07 18:26:30,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27082 to 19825. [2019-12-07 18:26:30,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19825 states. [2019-12-07 18:26:30,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19825 states to 19825 states and 60930 transitions. [2019-12-07 18:26:30,727 INFO L78 Accepts]: Start accepts. Automaton has 19825 states and 60930 transitions. Word has length 67 [2019-12-07 18:26:30,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:30,727 INFO L462 AbstractCegarLoop]: Abstraction has 19825 states and 60930 transitions. [2019-12-07 18:26:30,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:26:30,727 INFO L276 IsEmpty]: Start isEmpty. Operand 19825 states and 60930 transitions. [2019-12-07 18:26:30,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:30,745 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:30,745 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:30,745 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:30,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:30,746 INFO L82 PathProgramCache]: Analyzing trace with hash 693103783, now seen corresponding path program 3 times [2019-12-07 18:26:30,746 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:30,746 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242806578] [2019-12-07 18:26:30,746 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:30,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:30,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:30,879 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242806578] [2019-12-07 18:26:30,879 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:30,879 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:26:30,879 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911511504] [2019-12-07 18:26:30,880 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:26:30,880 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:30,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:26:30,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:26:30,880 INFO L87 Difference]: Start difference. First operand 19825 states and 60930 transitions. Second operand 11 states. [2019-12-07 18:26:32,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:32,983 INFO L93 Difference]: Finished difference Result 29210 states and 89208 transitions. [2019-12-07 18:26:32,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 18:26:32,984 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:26:32,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:33,021 INFO L225 Difference]: With dead ends: 29210 [2019-12-07 18:26:33,021 INFO L226 Difference]: Without dead ends: 26157 [2019-12-07 18:26:33,022 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=455, Unknown=0, NotChecked=0, Total=552 [2019-12-07 18:26:33,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26157 states. [2019-12-07 18:26:33,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26157 to 19369. [2019-12-07 18:26:33,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19369 states. [2019-12-07 18:26:33,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19369 states to 19369 states and 59544 transitions. [2019-12-07 18:26:33,376 INFO L78 Accepts]: Start accepts. Automaton has 19369 states and 59544 transitions. Word has length 67 [2019-12-07 18:26:33,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:33,377 INFO L462 AbstractCegarLoop]: Abstraction has 19369 states and 59544 transitions. [2019-12-07 18:26:33,377 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:26:33,377 INFO L276 IsEmpty]: Start isEmpty. Operand 19369 states and 59544 transitions. [2019-12-07 18:26:33,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:33,394 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:33,394 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:33,394 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:33,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:33,395 INFO L82 PathProgramCache]: Analyzing trace with hash 1535531457, now seen corresponding path program 4 times [2019-12-07 18:26:33,395 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:33,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723804936] [2019-12-07 18:26:33,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:33,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:33,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:33,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723804936] [2019-12-07 18:26:33,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:33,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 18:26:33,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [678993343] [2019-12-07 18:26:33,871 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 18:26:33,871 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:33,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 18:26:33,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=251, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:26:33,871 INFO L87 Difference]: Start difference. First operand 19369 states and 59544 transitions. Second operand 18 states. [2019-12-07 18:26:42,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:42,316 INFO L93 Difference]: Finished difference Result 38233 states and 114487 transitions. [2019-12-07 18:26:42,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 18:26:42,316 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 18:26:42,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:42,353 INFO L225 Difference]: With dead ends: 38233 [2019-12-07 18:26:42,354 INFO L226 Difference]: Without dead ends: 34660 [2019-12-07 18:26:42,355 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 654 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=500, Invalid=2470, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 18:26:42,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34660 states. [2019-12-07 18:26:42,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34660 to 20004. [2019-12-07 18:26:42,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20004 states. [2019-12-07 18:26:42,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20004 states to 20004 states and 61196 transitions. [2019-12-07 18:26:42,746 INFO L78 Accepts]: Start accepts. Automaton has 20004 states and 61196 transitions. Word has length 67 [2019-12-07 18:26:42,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:42,747 INFO L462 AbstractCegarLoop]: Abstraction has 20004 states and 61196 transitions. [2019-12-07 18:26:42,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 18:26:42,747 INFO L276 IsEmpty]: Start isEmpty. Operand 20004 states and 61196 transitions. [2019-12-07 18:26:42,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:42,765 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:42,765 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:42,765 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:42,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:42,766 INFO L82 PathProgramCache]: Analyzing trace with hash -683872029, now seen corresponding path program 5 times [2019-12-07 18:26:42,766 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:42,766 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187685968] [2019-12-07 18:26:42,766 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:42,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:42,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:42,932 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187685968] [2019-12-07 18:26:42,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:42,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:26:42,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28738108] [2019-12-07 18:26:42,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:26:42,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:42,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:26:42,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:26:42,933 INFO L87 Difference]: Start difference. First operand 20004 states and 61196 transitions. Second operand 10 states. [2019-12-07 18:26:44,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:44,262 INFO L93 Difference]: Finished difference Result 46334 states and 142588 transitions. [2019-12-07 18:26:44,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:26:44,263 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:26:44,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:44,316 INFO L225 Difference]: With dead ends: 46334 [2019-12-07 18:26:44,317 INFO L226 Difference]: Without dead ends: 41731 [2019-12-07 18:26:44,317 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2019-12-07 18:26:44,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41731 states. [2019-12-07 18:26:44,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41731 to 24609. [2019-12-07 18:26:44,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24609 states. [2019-12-07 18:26:44,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24609 states to 24609 states and 76325 transitions. [2019-12-07 18:26:44,856 INFO L78 Accepts]: Start accepts. Automaton has 24609 states and 76325 transitions. Word has length 67 [2019-12-07 18:26:44,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:44,856 INFO L462 AbstractCegarLoop]: Abstraction has 24609 states and 76325 transitions. [2019-12-07 18:26:44,856 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:26:44,856 INFO L276 IsEmpty]: Start isEmpty. Operand 24609 states and 76325 transitions. [2019-12-07 18:26:44,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:44,882 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:44,882 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:44,882 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:44,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:44,883 INFO L82 PathProgramCache]: Analyzing trace with hash -777231757, now seen corresponding path program 6 times [2019-12-07 18:26:44,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:44,883 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700567445] [2019-12-07 18:26:44,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:44,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:45,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:45,024 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700567445] [2019-12-07 18:26:45,024 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:45,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:26:45,024 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001289090] [2019-12-07 18:26:45,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:26:45,024 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:45,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:26:45,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:26:45,025 INFO L87 Difference]: Start difference. First operand 24609 states and 76325 transitions. Second operand 11 states. [2019-12-07 18:26:45,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:45,655 INFO L93 Difference]: Finished difference Result 31384 states and 96078 transitions. [2019-12-07 18:26:45,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:26:45,656 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:26:45,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:45,690 INFO L225 Difference]: With dead ends: 31384 [2019-12-07 18:26:45,690 INFO L226 Difference]: Without dead ends: 27528 [2019-12-07 18:26:45,691 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=450, Unknown=0, NotChecked=0, Total=552 [2019-12-07 18:26:45,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27528 states. [2019-12-07 18:26:46,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27528 to 24236. [2019-12-07 18:26:46,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24236 states. [2019-12-07 18:26:46,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24236 states to 24236 states and 74962 transitions. [2019-12-07 18:26:46,292 INFO L78 Accepts]: Start accepts. Automaton has 24236 states and 74962 transitions. Word has length 67 [2019-12-07 18:26:46,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:46,293 INFO L462 AbstractCegarLoop]: Abstraction has 24236 states and 74962 transitions. [2019-12-07 18:26:46,293 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:26:46,293 INFO L276 IsEmpty]: Start isEmpty. Operand 24236 states and 74962 transitions. [2019-12-07 18:26:46,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:46,313 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:46,314 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:46,314 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:46,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:46,314 INFO L82 PathProgramCache]: Analyzing trace with hash -2065446981, now seen corresponding path program 7 times [2019-12-07 18:26:46,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:46,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215720536] [2019-12-07 18:26:46,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:46,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:46,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:46,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215720536] [2019-12-07 18:26:46,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:46,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 18:26:46,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695821911] [2019-12-07 18:26:46,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 18:26:46,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:46,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 18:26:46,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:26:46,819 INFO L87 Difference]: Start difference. First operand 24236 states and 74962 transitions. Second operand 18 states. [2019-12-07 18:26:50,531 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2019-12-07 18:26:51,329 WARN L192 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 27 [2019-12-07 18:26:55,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:55,706 INFO L93 Difference]: Finished difference Result 41338 states and 125011 transitions. [2019-12-07 18:26:55,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 18:26:55,707 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 18:26:55,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:55,766 INFO L225 Difference]: With dead ends: 41338 [2019-12-07 18:26:55,766 INFO L226 Difference]: Without dead ends: 39615 [2019-12-07 18:26:55,768 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 775 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=542, Invalid=2764, Unknown=0, NotChecked=0, Total=3306 [2019-12-07 18:26:55,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39615 states. [2019-12-07 18:26:56,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39615 to 24492. [2019-12-07 18:26:56,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24492 states. [2019-12-07 18:26:56,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24492 states to 24492 states and 75635 transitions. [2019-12-07 18:26:56,277 INFO L78 Accepts]: Start accepts. Automaton has 24492 states and 75635 transitions. Word has length 67 [2019-12-07 18:26:56,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:56,277 INFO L462 AbstractCegarLoop]: Abstraction has 24492 states and 75635 transitions. [2019-12-07 18:26:56,277 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 18:26:56,277 INFO L276 IsEmpty]: Start isEmpty. Operand 24492 states and 75635 transitions. [2019-12-07 18:26:56,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:56,301 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:56,302 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:56,302 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:56,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:56,302 INFO L82 PathProgramCache]: Analyzing trace with hash 10116829, now seen corresponding path program 8 times [2019-12-07 18:26:56,302 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:56,302 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601206172] [2019-12-07 18:26:56,302 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:56,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:56,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:56,459 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [601206172] [2019-12-07 18:26:56,459 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:56,459 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:26:56,459 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2086041672] [2019-12-07 18:26:56,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:26:56,459 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:56,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:26:56,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:26:56,460 INFO L87 Difference]: Start difference. First operand 24492 states and 75635 transitions. Second operand 11 states. [2019-12-07 18:26:57,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:57,296 INFO L93 Difference]: Finished difference Result 43810 states and 135087 transitions. [2019-12-07 18:26:57,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:26:57,296 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:26:57,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:57,342 INFO L225 Difference]: With dead ends: 43810 [2019-12-07 18:26:57,342 INFO L226 Difference]: Without dead ends: 42791 [2019-12-07 18:26:57,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=657, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:26:57,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42791 states. [2019-12-07 18:26:57,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42791 to 25012. [2019-12-07 18:26:57,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25012 states. [2019-12-07 18:26:57,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25012 states to 25012 states and 77191 transitions. [2019-12-07 18:26:57,845 INFO L78 Accepts]: Start accepts. Automaton has 25012 states and 77191 transitions. Word has length 67 [2019-12-07 18:26:57,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:57,845 INFO L462 AbstractCegarLoop]: Abstraction has 25012 states and 77191 transitions. [2019-12-07 18:26:57,845 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:26:57,845 INFO L276 IsEmpty]: Start isEmpty. Operand 25012 states and 77191 transitions. [2019-12-07 18:26:57,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:57,872 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:57,872 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:57,872 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:57,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:57,872 INFO L82 PathProgramCache]: Analyzing trace with hash -83242899, now seen corresponding path program 9 times [2019-12-07 18:26:57,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:57,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [516628223] [2019-12-07 18:26:57,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:57,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:58,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:58,013 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [516628223] [2019-12-07 18:26:58,013 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:58,013 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:26:58,013 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973127097] [2019-12-07 18:26:58,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:26:58,014 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:58,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:26:58,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:26:58,014 INFO L87 Difference]: Start difference. First operand 25012 states and 77191 transitions. Second operand 12 states. [2019-12-07 18:26:59,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:59,349 INFO L93 Difference]: Finished difference Result 31028 states and 94742 transitions. [2019-12-07 18:26:59,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:26:59,350 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:26:59,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:59,383 INFO L225 Difference]: With dead ends: 31028 [2019-12-07 18:26:59,384 INFO L226 Difference]: Without dead ends: 26882 [2019-12-07 18:26:59,384 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=124, Invalid=578, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:26:59,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26882 states. [2019-12-07 18:26:59,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26882 to 23860. [2019-12-07 18:26:59,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23860 states. [2019-12-07 18:26:59,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23860 states to 23860 states and 73675 transitions. [2019-12-07 18:26:59,765 INFO L78 Accepts]: Start accepts. Automaton has 23860 states and 73675 transitions. Word has length 67 [2019-12-07 18:26:59,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:59,765 INFO L462 AbstractCegarLoop]: Abstraction has 23860 states and 73675 transitions. [2019-12-07 18:26:59,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:26:59,765 INFO L276 IsEmpty]: Start isEmpty. Operand 23860 states and 73675 transitions. [2019-12-07 18:26:59,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:26:59,786 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:59,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:59,786 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:59,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:59,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1853423759, now seen corresponding path program 10 times [2019-12-07 18:26:59,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:59,787 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395782319] [2019-12-07 18:26:59,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:59,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:59,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:59,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [395782319] [2019-12-07 18:26:59,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:59,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:26:59,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107063236] [2019-12-07 18:26:59,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:26:59,921 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:59,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:26:59,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:26:59,921 INFO L87 Difference]: Start difference. First operand 23860 states and 73675 transitions. Second operand 12 states. [2019-12-07 18:27:00,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:00,676 INFO L93 Difference]: Finished difference Result 39580 states and 121179 transitions. [2019-12-07 18:27:00,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 18:27:00,676 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:27:00,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:00,715 INFO L225 Difference]: With dead ends: 39580 [2019-12-07 18:27:00,715 INFO L226 Difference]: Without dead ends: 32886 [2019-12-07 18:27:00,715 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 191 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=178, Invalid=814, Unknown=0, NotChecked=0, Total=992 [2019-12-07 18:27:00,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32886 states. [2019-12-07 18:27:01,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32886 to 18943. [2019-12-07 18:27:01,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18943 states. [2019-12-07 18:27:01,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18943 states to 18943 states and 57952 transitions. [2019-12-07 18:27:01,088 INFO L78 Accepts]: Start accepts. Automaton has 18943 states and 57952 transitions. Word has length 67 [2019-12-07 18:27:01,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:01,088 INFO L462 AbstractCegarLoop]: Abstraction has 18943 states and 57952 transitions. [2019-12-07 18:27:01,088 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:27:01,088 INFO L276 IsEmpty]: Start isEmpty. Operand 18943 states and 57952 transitions. [2019-12-07 18:27:01,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:27:01,105 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:01,106 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:01,106 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:01,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:01,106 INFO L82 PathProgramCache]: Analyzing trace with hash 1014771687, now seen corresponding path program 11 times [2019-12-07 18:27:01,106 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:01,106 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1556509074] [2019-12-07 18:27:01,106 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:01,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:01,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:01,198 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1556509074] [2019-12-07 18:27:01,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:01,198 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:27:01,198 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606781893] [2019-12-07 18:27:01,198 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:27:01,198 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:01,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:27:01,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:27:01,199 INFO L87 Difference]: Start difference. First operand 18943 states and 57952 transitions. Second operand 8 states. [2019-12-07 18:27:01,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:01,465 INFO L93 Difference]: Finished difference Result 37248 states and 111253 transitions. [2019-12-07 18:27:01,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 18:27:01,466 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 67 [2019-12-07 18:27:01,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:01,503 INFO L225 Difference]: With dead ends: 37248 [2019-12-07 18:27:01,503 INFO L226 Difference]: Without dead ends: 31624 [2019-12-07 18:27:01,503 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:27:01,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31624 states. [2019-12-07 18:27:02,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31624 to 18524. [2019-12-07 18:27:02,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18524 states. [2019-12-07 18:27:02,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18524 states to 18524 states and 56895 transitions. [2019-12-07 18:27:02,050 INFO L78 Accepts]: Start accepts. Automaton has 18524 states and 56895 transitions. Word has length 67 [2019-12-07 18:27:02,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:02,050 INFO L462 AbstractCegarLoop]: Abstraction has 18524 states and 56895 transitions. [2019-12-07 18:27:02,050 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:27:02,050 INFO L276 IsEmpty]: Start isEmpty. Operand 18524 states and 56895 transitions. [2019-12-07 18:27:02,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:27:02,067 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:02,067 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:02,067 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:02,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:02,067 INFO L82 PathProgramCache]: Analyzing trace with hash 594227727, now seen corresponding path program 12 times [2019-12-07 18:27:02,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:02,068 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738870713] [2019-12-07 18:27:02,068 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:02,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:27:02,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:27:02,144 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:27:02,144 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:27:02,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t269~0.base_33|) (= v_~y~0_18 0) (= |v_ULTIMATE.start_main_~#t269~0.offset_23| 0) (= 0 v_~a$r_buff1_thd1~0_150) (= 0 v_~__unbuffered_p2_EAX~0_31) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (= v_~a$r_buff1_thd3~0_269 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t269~0.base_33| 4) |v_#length_21|) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t269~0.base_33|) 0) (= v_~a$mem_tmp~0_14 0) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t269~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t269~0.base_33|) |v_ULTIMATE.start_main_~#t269~0.offset_23| 0)) |v_#memory_int_19|) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t269~0.base_33| 1) |v_#valid_63|) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ULTIMATE.start_main_~#t270~0.offset=|v_ULTIMATE.start_main_~#t270~0.offset_19|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ULTIMATE.start_main_~#t271~0.offset=|v_ULTIMATE.start_main_~#t271~0.offset_19|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ULTIMATE.start_main_~#t271~0.base=|v_ULTIMATE.start_main_~#t271~0.base_25|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ~y~0=v_~y~0_18, ULTIMATE.start_main_~#t269~0.base=|v_ULTIMATE.start_main_~#t269~0.base_33|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t269~0.offset=|v_ULTIMATE.start_main_~#t269~0.offset_23|, ULTIMATE.start_main_~#t270~0.base=|v_ULTIMATE.start_main_~#t270~0.base_25|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t270~0.offset, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t271~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t271~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t269~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t269~0.offset, ULTIMATE.start_main_~#t270~0.base, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:27:02,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:27:02,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t270~0.base_12| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t270~0.base_12| 0)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t270~0.base_12|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t270~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t270~0.offset_10|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t270~0.base_12| 1) |v_#valid_34|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t270~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t270~0.base_12|) |v_ULTIMATE.start_main_~#t270~0.offset_10| 1)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t270~0.offset=|v_ULTIMATE.start_main_~#t270~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t270~0.base=|v_ULTIMATE.start_main_~#t270~0.base_12|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t270~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t270~0.base, #length] because there is no mapped edge [2019-12-07 18:27:02,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t271~0.base_12| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t271~0.base_12| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t271~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t271~0.base_12|) |v_ULTIMATE.start_main_~#t271~0.offset_10| 2)) |v_#memory_int_11|) (= 0 |v_ULTIMATE.start_main_~#t271~0.offset_10|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t271~0.base_12|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t271~0.base_12|) (not (= 0 |v_ULTIMATE.start_main_~#t271~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t271~0.base=|v_ULTIMATE.start_main_~#t271~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t271~0.offset=|v_ULTIMATE.start_main_~#t271~0.offset_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t271~0.base, ULTIMATE.start_main_~#t271~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 18:27:02,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In186984993 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In186984993 256)))) (or (and (or .cse0 .cse1) (= ~a~0_In186984993 |P1Thread1of1ForFork2_#t~ite9_Out186984993|)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out186984993| ~a$w_buff1~0_In186984993) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In186984993, ~a$w_buff1~0=~a$w_buff1~0_In186984993, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In186984993, ~a$w_buff1_used~0=~a$w_buff1_used~0_In186984993} OutVars{~a~0=~a~0_In186984993, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out186984993|, ~a$w_buff1~0=~a$w_buff1~0_In186984993, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In186984993, ~a$w_buff1_used~0=~a$w_buff1_used~0_In186984993} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:27:02,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:27:02,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In288036537 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In288036537 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out288036537|)) (and (= ~a$w_buff0_used~0_In288036537 |P1Thread1of1ForFork2_#t~ite11_Out288036537|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In288036537, ~a$w_buff0_used~0=~a$w_buff0_used~0_In288036537} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In288036537, ~a$w_buff0_used~0=~a$w_buff0_used~0_In288036537, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out288036537|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:27:02,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1941841714 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-1941841714 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out-1941841714| ~a$w_buff0_used~0_In-1941841714)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out-1941841714| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1941841714, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1941841714} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1941841714|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1941841714, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1941841714} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:27:02,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In2026225189 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In2026225189 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In2026225189 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In2026225189 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out2026225189| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out2026225189| ~a$w_buff1_used~0_In2026225189)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2026225189, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2026225189, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2026225189, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2026225189} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out2026225189|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2026225189, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2026225189, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2026225189, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2026225189} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:27:02,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-415884566 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_In-415884566 ~a$r_buff0_thd1~0_Out-415884566)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-415884566 256)))) (or (and .cse0 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-415884566) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-415884566, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-415884566} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-415884566|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-415884566, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-415884566} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:27:02,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1831692449 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-1831692449 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1831692449 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1831692449 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd1~0_In-1831692449 |P0Thread1of1ForFork1_#t~ite8_Out-1831692449|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1831692449|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1831692449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1831692449, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1831692449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1831692449} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1831692449|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1831692449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1831692449, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1831692449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1831692449} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:27:02,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:27:02,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In51702680 256) 0))) (or (and (= ~a$w_buff0~0_In51702680 |P2Thread1of1ForFork0_#t~ite21_Out51702680|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In51702680| |P2Thread1of1ForFork0_#t~ite20_Out51702680|)) (and (= |P2Thread1of1ForFork0_#t~ite20_Out51702680| ~a$w_buff0~0_In51702680) .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out51702680| |P2Thread1of1ForFork0_#t~ite21_Out51702680|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In51702680 256)))) (or (and (= (mod ~a$w_buff1_used~0_In51702680 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In51702680 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In51702680 256) 0))))))) InVars {~a$w_buff0~0=~a$w_buff0~0_In51702680, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In51702680, ~a$w_buff0_used~0=~a$w_buff0_used~0_In51702680, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In51702680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In51702680, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In51702680|, ~weak$$choice2~0=~weak$$choice2~0_In51702680} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out51702680|, ~a$w_buff0~0=~a$w_buff0~0_In51702680, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In51702680, ~a$w_buff0_used~0=~a$w_buff0_used~0_In51702680, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In51702680, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out51702680|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In51702680, ~weak$$choice2~0=~weak$$choice2~0_In51702680} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:27:02,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1571339797 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out1571339797| |P2Thread1of1ForFork0_#t~ite27_Out1571339797|) .cse0 (= |P2Thread1of1ForFork0_#t~ite26_Out1571339797| ~a$w_buff0_used~0_In1571339797) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1571339797 256)))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1571339797 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In1571339797 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In1571339797 256)))))) (and (= |P2Thread1of1ForFork0_#t~ite26_In1571339797| |P2Thread1of1ForFork0_#t~ite26_Out1571339797|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out1571339797| ~a$w_buff0_used~0_In1571339797)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1571339797|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1571339797, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1571339797, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1571339797, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1571339797, ~weak$$choice2~0=~weak$$choice2~0_In1571339797} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1571339797|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1571339797|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1571339797, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1571339797, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1571339797, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1571339797, ~weak$$choice2~0=~weak$$choice2~0_In1571339797} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:27:02,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:27:02,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:27:02,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1111138434| |P2Thread1of1ForFork0_#t~ite39_Out1111138434|)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1111138434 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1111138434 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1111138434| ~a$w_buff1~0_In1111138434) (not .cse1) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1111138434| ~a~0_In1111138434) .cse2 (or .cse1 .cse0)))) InVars {~a~0=~a~0_In1111138434, ~a$w_buff1~0=~a$w_buff1~0_In1111138434, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1111138434, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1111138434} OutVars{~a~0=~a~0_In1111138434, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1111138434|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1111138434|, ~a$w_buff1~0=~a$w_buff1~0_In1111138434, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1111138434, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1111138434} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:27:02,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1499661633 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1499661633 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1499661633|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1499661633 |P2Thread1of1ForFork0_#t~ite40_Out1499661633|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1499661633, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1499661633} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1499661633|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1499661633, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1499661633} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:27:02,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd3~0_In-2088444407 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-2088444407 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-2088444407 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-2088444407 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-2088444407| ~a$w_buff1_used~0_In-2088444407) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-2088444407| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2088444407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2088444407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2088444407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2088444407} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2088444407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2088444407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2088444407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2088444407, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-2088444407|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:27:02,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In559305100 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In559305100 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In559305100 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In559305100 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out559305100|)) (and (= ~a$w_buff1_used~0_In559305100 |P1Thread1of1ForFork2_#t~ite12_Out559305100|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In559305100, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In559305100, ~a$w_buff0_used~0=~a$w_buff0_used~0_In559305100, ~a$w_buff1_used~0=~a$w_buff1_used~0_In559305100} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In559305100, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In559305100, ~a$w_buff0_used~0=~a$w_buff0_used~0_In559305100, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out559305100|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In559305100} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:27:02,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In13366988 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In13366988 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out13366988| ~a$r_buff0_thd2~0_In13366988) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out13366988| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In13366988, ~a$w_buff0_used~0=~a$w_buff0_used~0_In13366988} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In13366988, ~a$w_buff0_used~0=~a$w_buff0_used~0_In13366988, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out13366988|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:27:02,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-688898151 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-688898151 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-688898151 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-688898151 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-688898151| ~a$r_buff1_thd2~0_In-688898151)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-688898151| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-688898151, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-688898151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688898151, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688898151} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-688898151, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-688898151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688898151, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688898151, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-688898151|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:27:02,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:27:02,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In196223387 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In196223387 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out196223387| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out196223387| ~a$r_buff0_thd3~0_In196223387) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In196223387, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In196223387} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In196223387, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In196223387, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out196223387|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:27:02,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1784128474 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-1784128474 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd3~0_In-1784128474 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1784128474 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-1784128474| ~a$r_buff1_thd3~0_In-1784128474) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite43_Out-1784128474| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1784128474, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1784128474, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1784128474, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1784128474} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1784128474|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1784128474, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1784128474, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1784128474, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1784128474} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:27:02,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:27:02,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:27:02,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-191732159 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-191732159 256)))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-191732159| ~a~0_In-191732159) (or .cse0 .cse1)) (and (= ~a$w_buff1~0_In-191732159 |ULTIMATE.start_main_#t~ite47_Out-191732159|) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In-191732159, ~a$w_buff1~0=~a$w_buff1~0_In-191732159, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-191732159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-191732159} OutVars{~a~0=~a~0_In-191732159, ~a$w_buff1~0=~a$w_buff1~0_In-191732159, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-191732159|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-191732159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-191732159} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:27:02,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:27:02,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-105003867 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-105003867 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-105003867| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-105003867| ~a$w_buff0_used~0_In-105003867)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-105003867, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-105003867} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-105003867, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-105003867|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-105003867} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:27:02,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1003461194 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In1003461194 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In1003461194 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd0~0_In1003461194 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out1003461194|)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~a$w_buff1_used~0_In1003461194 |ULTIMATE.start_main_#t~ite50_Out1003461194|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1003461194, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1003461194, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1003461194, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1003461194} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1003461194|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1003461194, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1003461194, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1003461194, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1003461194} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:27:02,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1874759995 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1874759995 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-1874759995 |ULTIMATE.start_main_#t~ite51_Out-1874759995|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out-1874759995|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1874759995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1874759995} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1874759995|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1874759995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1874759995} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:27:02,161 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-988206060 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-988206060 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-988206060 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-988206060 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-988206060| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-988206060| ~a$r_buff1_thd0~0_In-988206060) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-988206060, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-988206060, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-988206060, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-988206060} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-988206060|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-988206060, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-988206060, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-988206060, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-988206060} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:27:02,161 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:27:02,224 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:27:02 BasicIcfg [2019-12-07 18:27:02,225 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:27:02,225 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:27:02,225 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:27:02,225 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:27:02,225 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:24:54" (3/4) ... [2019-12-07 18:27:02,227 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:27:02,227 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t269~0.base_33|) (= v_~y~0_18 0) (= |v_ULTIMATE.start_main_~#t269~0.offset_23| 0) (= 0 v_~a$r_buff1_thd1~0_150) (= 0 v_~__unbuffered_p2_EAX~0_31) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (= v_~a$r_buff1_thd3~0_269 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t269~0.base_33| 4) |v_#length_21|) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t269~0.base_33|) 0) (= v_~a$mem_tmp~0_14 0) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t269~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t269~0.base_33|) |v_ULTIMATE.start_main_~#t269~0.offset_23| 0)) |v_#memory_int_19|) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t269~0.base_33| 1) |v_#valid_63|) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ULTIMATE.start_main_~#t270~0.offset=|v_ULTIMATE.start_main_~#t270~0.offset_19|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ULTIMATE.start_main_~#t271~0.offset=|v_ULTIMATE.start_main_~#t271~0.offset_19|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ULTIMATE.start_main_~#t271~0.base=|v_ULTIMATE.start_main_~#t271~0.base_25|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ~y~0=v_~y~0_18, ULTIMATE.start_main_~#t269~0.base=|v_ULTIMATE.start_main_~#t269~0.base_33|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t269~0.offset=|v_ULTIMATE.start_main_~#t269~0.offset_23|, ULTIMATE.start_main_~#t270~0.base=|v_ULTIMATE.start_main_~#t270~0.base_25|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t270~0.offset, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t271~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t271~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t269~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t269~0.offset, ULTIMATE.start_main_~#t270~0.base, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:27:02,227 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:27:02,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t270~0.base_12| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t270~0.base_12| 0)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t270~0.base_12|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t270~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t270~0.offset_10|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t270~0.base_12| 1) |v_#valid_34|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t270~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t270~0.base_12|) |v_ULTIMATE.start_main_~#t270~0.offset_10| 1)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t270~0.offset=|v_ULTIMATE.start_main_~#t270~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t270~0.base=|v_ULTIMATE.start_main_~#t270~0.base_12|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t270~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t270~0.base, #length] because there is no mapped edge [2019-12-07 18:27:02,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t271~0.base_12| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t271~0.base_12| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t271~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t271~0.base_12|) |v_ULTIMATE.start_main_~#t271~0.offset_10| 2)) |v_#memory_int_11|) (= 0 |v_ULTIMATE.start_main_~#t271~0.offset_10|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t271~0.base_12|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t271~0.base_12|) (not (= 0 |v_ULTIMATE.start_main_~#t271~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t271~0.base=|v_ULTIMATE.start_main_~#t271~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t271~0.offset=|v_ULTIMATE.start_main_~#t271~0.offset_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t271~0.base, ULTIMATE.start_main_~#t271~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 18:27:02,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In186984993 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In186984993 256)))) (or (and (or .cse0 .cse1) (= ~a~0_In186984993 |P1Thread1of1ForFork2_#t~ite9_Out186984993|)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out186984993| ~a$w_buff1~0_In186984993) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In186984993, ~a$w_buff1~0=~a$w_buff1~0_In186984993, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In186984993, ~a$w_buff1_used~0=~a$w_buff1_used~0_In186984993} OutVars{~a~0=~a~0_In186984993, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out186984993|, ~a$w_buff1~0=~a$w_buff1~0_In186984993, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In186984993, ~a$w_buff1_used~0=~a$w_buff1_used~0_In186984993} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:27:02,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:27:02,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In288036537 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In288036537 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out288036537|)) (and (= ~a$w_buff0_used~0_In288036537 |P1Thread1of1ForFork2_#t~ite11_Out288036537|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In288036537, ~a$w_buff0_used~0=~a$w_buff0_used~0_In288036537} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In288036537, ~a$w_buff0_used~0=~a$w_buff0_used~0_In288036537, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out288036537|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:27:02,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1941841714 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-1941841714 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out-1941841714| ~a$w_buff0_used~0_In-1941841714)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out-1941841714| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1941841714, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1941841714} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1941841714|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1941841714, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1941841714} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:27:02,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In2026225189 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In2026225189 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In2026225189 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In2026225189 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out2026225189| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out2026225189| ~a$w_buff1_used~0_In2026225189)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2026225189, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2026225189, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2026225189, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2026225189} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out2026225189|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In2026225189, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2026225189, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2026225189, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2026225189} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:27:02,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In-415884566 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_In-415884566 ~a$r_buff0_thd1~0_Out-415884566)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-415884566 256)))) (or (and .cse0 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-415884566) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-415884566, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-415884566} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-415884566|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-415884566, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-415884566} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:27:02,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1831692449 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-1831692449 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1831692449 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1831692449 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd1~0_In-1831692449 |P0Thread1of1ForFork1_#t~ite8_Out-1831692449|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1831692449|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1831692449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1831692449, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1831692449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1831692449} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1831692449|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1831692449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1831692449, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1831692449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1831692449} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:27:02,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:27:02,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In51702680 256) 0))) (or (and (= ~a$w_buff0~0_In51702680 |P2Thread1of1ForFork0_#t~ite21_Out51702680|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In51702680| |P2Thread1of1ForFork0_#t~ite20_Out51702680|)) (and (= |P2Thread1of1ForFork0_#t~ite20_Out51702680| ~a$w_buff0~0_In51702680) .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out51702680| |P2Thread1of1ForFork0_#t~ite21_Out51702680|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In51702680 256)))) (or (and (= (mod ~a$w_buff1_used~0_In51702680 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In51702680 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In51702680 256) 0))))))) InVars {~a$w_buff0~0=~a$w_buff0~0_In51702680, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In51702680, ~a$w_buff0_used~0=~a$w_buff0_used~0_In51702680, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In51702680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In51702680, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In51702680|, ~weak$$choice2~0=~weak$$choice2~0_In51702680} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out51702680|, ~a$w_buff0~0=~a$w_buff0~0_In51702680, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In51702680, ~a$w_buff0_used~0=~a$w_buff0_used~0_In51702680, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In51702680, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out51702680|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In51702680, ~weak$$choice2~0=~weak$$choice2~0_In51702680} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:27:02,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1571339797 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out1571339797| |P2Thread1of1ForFork0_#t~ite27_Out1571339797|) .cse0 (= |P2Thread1of1ForFork0_#t~ite26_Out1571339797| ~a$w_buff0_used~0_In1571339797) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1571339797 256)))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1571339797 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In1571339797 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In1571339797 256)))))) (and (= |P2Thread1of1ForFork0_#t~ite26_In1571339797| |P2Thread1of1ForFork0_#t~ite26_Out1571339797|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out1571339797| ~a$w_buff0_used~0_In1571339797)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1571339797|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1571339797, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1571339797, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1571339797, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1571339797, ~weak$$choice2~0=~weak$$choice2~0_In1571339797} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1571339797|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1571339797|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1571339797, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1571339797, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1571339797, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1571339797, ~weak$$choice2~0=~weak$$choice2~0_In1571339797} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:27:02,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:27:02,235 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:27:02,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1111138434| |P2Thread1of1ForFork0_#t~ite39_Out1111138434|)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1111138434 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1111138434 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1111138434| ~a$w_buff1~0_In1111138434) (not .cse1) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1111138434| ~a~0_In1111138434) .cse2 (or .cse1 .cse0)))) InVars {~a~0=~a~0_In1111138434, ~a$w_buff1~0=~a$w_buff1~0_In1111138434, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1111138434, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1111138434} OutVars{~a~0=~a~0_In1111138434, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1111138434|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1111138434|, ~a$w_buff1~0=~a$w_buff1~0_In1111138434, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1111138434, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1111138434} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:27:02,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1499661633 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1499661633 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1499661633|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1499661633 |P2Thread1of1ForFork0_#t~ite40_Out1499661633|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1499661633, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1499661633} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1499661633|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1499661633, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1499661633} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:27:02,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd3~0_In-2088444407 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-2088444407 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-2088444407 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-2088444407 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-2088444407| ~a$w_buff1_used~0_In-2088444407) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-2088444407| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2088444407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2088444407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2088444407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2088444407} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2088444407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2088444407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2088444407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2088444407, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-2088444407|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:27:02,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In559305100 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In559305100 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In559305100 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In559305100 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out559305100|)) (and (= ~a$w_buff1_used~0_In559305100 |P1Thread1of1ForFork2_#t~ite12_Out559305100|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In559305100, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In559305100, ~a$w_buff0_used~0=~a$w_buff0_used~0_In559305100, ~a$w_buff1_used~0=~a$w_buff1_used~0_In559305100} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In559305100, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In559305100, ~a$w_buff0_used~0=~a$w_buff0_used~0_In559305100, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out559305100|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In559305100} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:27:02,238 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In13366988 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In13366988 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out13366988| ~a$r_buff0_thd2~0_In13366988) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out13366988| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In13366988, ~a$w_buff0_used~0=~a$w_buff0_used~0_In13366988} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In13366988, ~a$w_buff0_used~0=~a$w_buff0_used~0_In13366988, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out13366988|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:27:02,238 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-688898151 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-688898151 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-688898151 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-688898151 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-688898151| ~a$r_buff1_thd2~0_In-688898151)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-688898151| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-688898151, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-688898151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688898151, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688898151} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-688898151, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-688898151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-688898151, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-688898151, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-688898151|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:27:02,238 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:27:02,238 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In196223387 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In196223387 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out196223387| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out196223387| ~a$r_buff0_thd3~0_In196223387) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In196223387, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In196223387} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In196223387, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In196223387, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out196223387|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:27:02,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1784128474 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-1784128474 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd3~0_In-1784128474 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1784128474 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-1784128474| ~a$r_buff1_thd3~0_In-1784128474) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite43_Out-1784128474| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1784128474, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1784128474, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1784128474, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1784128474} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1784128474|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1784128474, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1784128474, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1784128474, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1784128474} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:27:02,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:27:02,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:27:02,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-191732159 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-191732159 256)))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-191732159| ~a~0_In-191732159) (or .cse0 .cse1)) (and (= ~a$w_buff1~0_In-191732159 |ULTIMATE.start_main_#t~ite47_Out-191732159|) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In-191732159, ~a$w_buff1~0=~a$w_buff1~0_In-191732159, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-191732159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-191732159} OutVars{~a~0=~a~0_In-191732159, ~a$w_buff1~0=~a$w_buff1~0_In-191732159, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-191732159|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-191732159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-191732159} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:27:02,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:27:02,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-105003867 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-105003867 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-105003867| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-105003867| ~a$w_buff0_used~0_In-105003867)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-105003867, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-105003867} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-105003867, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-105003867|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-105003867} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:27:02,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1003461194 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In1003461194 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In1003461194 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd0~0_In1003461194 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out1003461194|)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~a$w_buff1_used~0_In1003461194 |ULTIMATE.start_main_#t~ite50_Out1003461194|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1003461194, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1003461194, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1003461194, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1003461194} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1003461194|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1003461194, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1003461194, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1003461194, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1003461194} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:27:02,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1874759995 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1874759995 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-1874759995 |ULTIMATE.start_main_#t~ite51_Out-1874759995|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out-1874759995|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1874759995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1874759995} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1874759995|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1874759995, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1874759995} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:27:02,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-988206060 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-988206060 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-988206060 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-988206060 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-988206060| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-988206060| ~a$r_buff1_thd0~0_In-988206060) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-988206060, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-988206060, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-988206060, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-988206060} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-988206060|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-988206060, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-988206060, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-988206060, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-988206060} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:27:02,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:27:02,304 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4f13185e-afe8-409e-9b1b-aad728d816ba/bin/uautomizer/witness.graphml [2019-12-07 18:27:02,304 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:27:02,305 INFO L168 Benchmark]: Toolchain (without parser) took 128749.33 ms. Allocated memory was 1.0 GB in the beginning and 7.8 GB in the end (delta: 6.7 GB). Free memory was 938.1 MB in the beginning and 4.5 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-12-07 18:27:02,306 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:27:02,306 INFO L168 Benchmark]: CACSL2BoogieTranslator took 412.97 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -132.0 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:27:02,306 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.54 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:27:02,306 INFO L168 Benchmark]: Boogie Preprocessor took 26.51 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:27:02,307 INFO L168 Benchmark]: RCFGBuilder took 417.40 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:27:02,307 INFO L168 Benchmark]: TraceAbstraction took 127769.84 ms. Allocated memory was 1.1 GB in the beginning and 7.8 GB in the end (delta: 6.6 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:27:02,307 INFO L168 Benchmark]: Witness Printer took 79.13 ms. Allocated memory is still 7.8 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 49.1 MB). Peak memory consumption was 49.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:27:02,309 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 412.97 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -132.0 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.54 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.51 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 417.40 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.7 MB). Peak memory consumption was 54.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 127769.84 ms. Allocated memory was 1.1 GB in the beginning and 7.8 GB in the end (delta: 6.6 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 79.13 ms. Allocated memory is still 7.8 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 49.1 MB). Peak memory consumption was 49.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 179 ProgramPointsBefore, 95 ProgramPointsAfterwards, 216 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 31 ChoiceCompositions, 6646 VarBasedMoverChecksPositive, 237 VarBasedMoverChecksNegative, 59 SemBasedMoverChecksPositive, 236 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 91218 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t269, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L742] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L743] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L744] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L745] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L746] 1 a$r_buff0_thd1 = (_Bool)1 [L749] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L752] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t270, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L766] 2 x = 1 [L769] 2 y = 1 [L772] 2 __unbuffered_p1_EAX = y [L775] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L841] FCALL, FORK 0 pthread_create(&t271, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L752] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L753] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L754] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 127.5s, OverallIterations: 31, TraceHistogramMax: 1, AutomataDifference: 42.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8188 SDtfs, 10769 SDslu, 33383 SDs, 0 SdLazy, 26805 SolverSat, 508 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 20.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 463 GetRequests, 30 SyntacticMatches, 21 SemanticMatches, 412 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2590 ImplicationChecksByTransitivity, 6.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=230321occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 60.3s AutomataMinimizationTime, 30 MinimizatonAttempts, 321934 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 1442 NumberOfCodeBlocks, 1442 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 1345 ConstructedInterpolants, 0 QuantifiedInterpolants, 727275 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...