./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix010_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix010_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 95b236015ac00b26053dbe36be47a7ce49476eac ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:38:24,756 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:38:24,757 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:38:24,765 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:38:24,765 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:38:24,766 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:38:24,767 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:38:24,768 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:38:24,770 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:38:24,771 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:38:24,771 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:38:24,772 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:38:24,772 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:38:24,773 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:38:24,774 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:38:24,775 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:38:24,775 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:38:24,776 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:38:24,777 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:38:24,778 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:38:24,780 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:38:24,780 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:38:24,781 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:38:24,781 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:38:24,783 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:38:24,783 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:38:24,783 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:38:24,784 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:38:24,784 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:38:24,785 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:38:24,785 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:38:24,785 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:38:24,786 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:38:24,786 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:38:24,787 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:38:24,787 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:38:24,788 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:38:24,788 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:38:24,788 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:38:24,789 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:38:24,790 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:38:24,790 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:38:24,802 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:38:24,803 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:38:24,804 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:38:24,804 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:38:24,804 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:38:24,804 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:38:24,804 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:38:24,805 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:38:24,805 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:38:24,805 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:38:24,805 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:38:24,805 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:38:24,806 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:38:24,806 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:38:24,806 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:38:24,806 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:38:24,806 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:38:24,807 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:38:24,807 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:38:24,807 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:38:24,807 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:38:24,807 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:38:24,807 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:38:24,808 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:38:24,808 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:38:24,808 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:38:24,808 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:38:24,808 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:38:24,808 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:38:24,809 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 95b236015ac00b26053dbe36be47a7ce49476eac [2019-12-07 18:38:24,916 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:38:24,924 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:38:24,926 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:38:24,927 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:38:24,928 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:38:24,928 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix010_tso.oepc.i [2019-12-07 18:38:24,965 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/data/24d568d25/01026ada94b241f1b618de225b8b8962/FLAG310cdbce6 [2019-12-07 18:38:25,343 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:38:25,343 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/sv-benchmarks/c/pthread-wmm/mix010_tso.oepc.i [2019-12-07 18:38:25,353 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/data/24d568d25/01026ada94b241f1b618de225b8b8962/FLAG310cdbce6 [2019-12-07 18:38:25,362 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/data/24d568d25/01026ada94b241f1b618de225b8b8962 [2019-12-07 18:38:25,364 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:38:25,364 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:38:25,365 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:38:25,365 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:38:25,367 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:38:25,368 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,369 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25, skipping insertion in model container [2019-12-07 18:38:25,370 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,374 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:38:25,403 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:38:25,662 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:38:25,670 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:38:25,713 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:38:25,758 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:38:25,758 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25 WrapperNode [2019-12-07 18:38:25,759 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:38:25,759 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:38:25,759 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:38:25,759 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:38:25,765 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,778 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,796 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:38:25,796 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:38:25,796 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:38:25,796 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:38:25,803 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,803 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,806 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,806 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,813 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,816 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,818 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... [2019-12-07 18:38:25,822 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:38:25,822 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:38:25,822 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:38:25,822 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:38:25,823 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:38:25,862 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:38:25,862 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:38:25,862 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:38:25,862 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:38:25,862 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:38:25,862 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:38:25,862 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:38:25,862 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:38:25,862 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:38:25,863 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:38:25,863 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:38:25,863 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:38:25,863 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:38:25,864 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:38:26,229 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:38:26,230 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:38:26,231 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:38:26 BoogieIcfgContainer [2019-12-07 18:38:26,231 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:38:26,232 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:38:26,232 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:38:26,234 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:38:26,235 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:38:25" (1/3) ... [2019-12-07 18:38:26,235 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a2f8ef6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:38:26, skipping insertion in model container [2019-12-07 18:38:26,235 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:25" (2/3) ... [2019-12-07 18:38:26,236 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a2f8ef6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:38:26, skipping insertion in model container [2019-12-07 18:38:26,236 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:38:26" (3/3) ... [2019-12-07 18:38:26,237 INFO L109 eAbstractionObserver]: Analyzing ICFG mix010_tso.oepc.i [2019-12-07 18:38:26,244 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:38:26,244 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:38:26,249 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:38:26,250 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:38:26,274 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,274 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,274 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,274 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,275 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,275 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,275 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,275 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,275 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,276 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,276 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,276 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,276 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,276 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,276 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,276 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,276 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,277 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,277 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,277 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,277 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,277 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,277 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,277 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,277 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,278 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,278 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,278 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,278 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,278 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,278 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,278 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,279 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,279 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,280 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,280 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,280 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,280 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,280 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,280 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,281 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,282 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,283 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,284 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,285 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,285 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,286 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,286 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,286 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,286 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,286 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,286 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,287 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,287 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,287 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,287 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,287 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,287 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,288 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,288 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,288 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,288 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,288 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,288 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,288 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,289 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,289 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,289 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,289 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,289 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,290 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,290 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,290 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,290 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,290 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,290 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,291 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,291 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,291 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,291 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,291 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,291 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,292 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,292 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,292 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,292 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,292 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,292 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,293 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,293 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,293 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,293 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,293 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,293 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,293 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,294 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,294 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,294 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,294 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,294 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,294 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,295 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,295 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,295 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,295 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,295 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,295 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,296 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,296 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,296 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,296 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,296 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,296 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,296 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,297 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,297 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,297 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,297 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,297 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,297 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,298 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,298 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,298 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,298 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,298 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,298 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:26,319 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:38:26,331 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:38:26,331 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:38:26,331 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:38:26,331 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:38:26,332 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:38:26,332 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:38:26,332 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:38:26,332 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:38:26,342 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 18:38:26,344 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 18:38:26,405 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 18:38:26,405 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:38:26,415 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:38:26,431 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 18:38:26,464 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 18:38:26,465 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:38:26,470 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:38:26,485 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:38:26,486 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:38:29,141 WARN L192 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 18:38:29,439 WARN L192 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 18:38:29,544 INFO L206 etLargeBlockEncoding]: Checked pairs total: 91218 [2019-12-07 18:38:29,544 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 18:38:29,546 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 105 transitions [2019-12-07 18:38:46,270 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 18:38:46,271 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 18:38:46,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:38:46,275 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:38:46,275 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:38:46,276 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:38:46,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:38:46,279 INFO L82 PathProgramCache]: Analyzing trace with hash 921826, now seen corresponding path program 1 times [2019-12-07 18:38:46,285 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:38:46,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1997255195] [2019-12-07 18:38:46,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:38:46,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:38:46,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:38:46,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1997255195] [2019-12-07 18:38:46,424 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:38:46,424 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:38:46,425 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1029723598] [2019-12-07 18:38:46,428 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:38:46,428 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:38:46,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:38:46,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:38:46,438 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 18:38:47,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:38:47,345 INFO L93 Difference]: Finished difference Result 125226 states and 534182 transitions. [2019-12-07 18:38:47,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:38:47,347 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:38:47,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:38:47,800 INFO L225 Difference]: With dead ends: 125226 [2019-12-07 18:38:47,800 INFO L226 Difference]: Without dead ends: 117946 [2019-12-07 18:38:47,801 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:38:54,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117946 states. [2019-12-07 18:38:55,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117946 to 117946. [2019-12-07 18:38:55,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117946 states. [2019-12-07 18:38:56,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117946 states to 117946 states and 502500 transitions. [2019-12-07 18:38:56,170 INFO L78 Accepts]: Start accepts. Automaton has 117946 states and 502500 transitions. Word has length 3 [2019-12-07 18:38:56,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:38:56,171 INFO L462 AbstractCegarLoop]: Abstraction has 117946 states and 502500 transitions. [2019-12-07 18:38:56,171 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:38:56,171 INFO L276 IsEmpty]: Start isEmpty. Operand 117946 states and 502500 transitions. [2019-12-07 18:38:56,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:38:56,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:38:56,175 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:38:56,176 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:38:56,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:38:56,176 INFO L82 PathProgramCache]: Analyzing trace with hash -2034548154, now seen corresponding path program 1 times [2019-12-07 18:38:56,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:38:56,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049867319] [2019-12-07 18:38:56,177 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:38:56,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:38:56,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:38:56,243 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049867319] [2019-12-07 18:38:56,243 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:38:56,243 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:38:56,243 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591746537] [2019-12-07 18:38:56,244 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:38:56,244 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:38:56,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:38:56,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:38:56,245 INFO L87 Difference]: Start difference. First operand 117946 states and 502500 transitions. Second operand 4 states. [2019-12-07 18:38:57,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:38:57,196 INFO L93 Difference]: Finished difference Result 183040 states and 750092 transitions. [2019-12-07 18:38:57,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:38:57,197 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:38:57,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:38:57,674 INFO L225 Difference]: With dead ends: 183040 [2019-12-07 18:38:57,674 INFO L226 Difference]: Without dead ends: 182991 [2019-12-07 18:38:57,675 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:06,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182991 states. [2019-12-07 18:39:08,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182991 to 168271. [2019-12-07 18:39:08,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168271 states. [2019-12-07 18:39:08,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168271 states to 168271 states and 697811 transitions. [2019-12-07 18:39:08,862 INFO L78 Accepts]: Start accepts. Automaton has 168271 states and 697811 transitions. Word has length 11 [2019-12-07 18:39:08,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:08,863 INFO L462 AbstractCegarLoop]: Abstraction has 168271 states and 697811 transitions. [2019-12-07 18:39:08,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:39:08,863 INFO L276 IsEmpty]: Start isEmpty. Operand 168271 states and 697811 transitions. [2019-12-07 18:39:08,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:39:08,867 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:08,867 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:08,867 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:08,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:08,868 INFO L82 PathProgramCache]: Analyzing trace with hash -579003435, now seen corresponding path program 1 times [2019-12-07 18:39:08,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:08,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072971942] [2019-12-07 18:39:08,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:08,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:08,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:08,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1072971942] [2019-12-07 18:39:08,906 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:08,906 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:39:08,906 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233324138] [2019-12-07 18:39:08,907 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:39:08,907 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:08,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:39:08,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:08,907 INFO L87 Difference]: Start difference. First operand 168271 states and 697811 transitions. Second operand 3 states. [2019-12-07 18:39:09,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:09,015 INFO L93 Difference]: Finished difference Result 35531 states and 115505 transitions. [2019-12-07 18:39:09,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:39:09,015 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 18:39:09,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:09,068 INFO L225 Difference]: With dead ends: 35531 [2019-12-07 18:39:09,069 INFO L226 Difference]: Without dead ends: 35531 [2019-12-07 18:39:09,069 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:09,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35531 states. [2019-12-07 18:39:09,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35531 to 35531. [2019-12-07 18:39:09,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35531 states. [2019-12-07 18:39:09,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35531 states to 35531 states and 115505 transitions. [2019-12-07 18:39:09,986 INFO L78 Accepts]: Start accepts. Automaton has 35531 states and 115505 transitions. Word has length 13 [2019-12-07 18:39:09,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:09,986 INFO L462 AbstractCegarLoop]: Abstraction has 35531 states and 115505 transitions. [2019-12-07 18:39:09,986 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:39:09,986 INFO L276 IsEmpty]: Start isEmpty. Operand 35531 states and 115505 transitions. [2019-12-07 18:39:09,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:39:09,988 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:09,988 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:09,988 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:09,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:09,989 INFO L82 PathProgramCache]: Analyzing trace with hash -1458626840, now seen corresponding path program 1 times [2019-12-07 18:39:09,989 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:09,989 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959679314] [2019-12-07 18:39:09,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:10,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:10,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:10,048 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959679314] [2019-12-07 18:39:10,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:10,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:10,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080201846] [2019-12-07 18:39:10,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:39:10,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:10,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:39:10,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:10,049 INFO L87 Difference]: Start difference. First operand 35531 states and 115505 transitions. Second operand 5 states. [2019-12-07 18:39:10,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:10,397 INFO L93 Difference]: Finished difference Result 49606 states and 159424 transitions. [2019-12-07 18:39:10,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:39:10,398 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:39:10,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:10,473 INFO L225 Difference]: With dead ends: 49606 [2019-12-07 18:39:10,473 INFO L226 Difference]: Without dead ends: 49606 [2019-12-07 18:39:10,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:39:10,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49606 states. [2019-12-07 18:39:11,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49606 to 42335. [2019-12-07 18:39:11,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42335 states. [2019-12-07 18:39:11,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42335 states to 42335 states and 137188 transitions. [2019-12-07 18:39:11,258 INFO L78 Accepts]: Start accepts. Automaton has 42335 states and 137188 transitions. Word has length 16 [2019-12-07 18:39:11,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:11,259 INFO L462 AbstractCegarLoop]: Abstraction has 42335 states and 137188 transitions. [2019-12-07 18:39:11,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:39:11,259 INFO L276 IsEmpty]: Start isEmpty. Operand 42335 states and 137188 transitions. [2019-12-07 18:39:11,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:39:11,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:11,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:11,269 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:11,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:11,269 INFO L82 PathProgramCache]: Analyzing trace with hash -311730194, now seen corresponding path program 1 times [2019-12-07 18:39:11,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:11,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521465739] [2019-12-07 18:39:11,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:11,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:11,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:11,342 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521465739] [2019-12-07 18:39:11,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:11,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:39:11,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221940403] [2019-12-07 18:39:11,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:39:11,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:11,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:39:11,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:39:11,343 INFO L87 Difference]: Start difference. First operand 42335 states and 137188 transitions. Second operand 7 states. [2019-12-07 18:39:11,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:11,964 INFO L93 Difference]: Finished difference Result 68217 states and 214442 transitions. [2019-12-07 18:39:11,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:39:11,965 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 18:39:11,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:12,068 INFO L225 Difference]: With dead ends: 68217 [2019-12-07 18:39:12,068 INFO L226 Difference]: Without dead ends: 68203 [2019-12-07 18:39:12,069 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:39:12,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68203 states. [2019-12-07 18:39:13,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68203 to 42009. [2019-12-07 18:39:13,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42009 states. [2019-12-07 18:39:13,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42009 states to 42009 states and 135594 transitions. [2019-12-07 18:39:13,264 INFO L78 Accepts]: Start accepts. Automaton has 42009 states and 135594 transitions. Word has length 22 [2019-12-07 18:39:13,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:13,264 INFO L462 AbstractCegarLoop]: Abstraction has 42009 states and 135594 transitions. [2019-12-07 18:39:13,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:39:13,265 INFO L276 IsEmpty]: Start isEmpty. Operand 42009 states and 135594 transitions. [2019-12-07 18:39:13,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:39:13,275 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:13,275 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:13,275 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:13,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:13,275 INFO L82 PathProgramCache]: Analyzing trace with hash 573582081, now seen corresponding path program 1 times [2019-12-07 18:39:13,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:13,275 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823935074] [2019-12-07 18:39:13,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:13,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:13,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:13,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823935074] [2019-12-07 18:39:13,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:13,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:13,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2025983777] [2019-12-07 18:39:13,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:39:13,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:13,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:39:13,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:13,320 INFO L87 Difference]: Start difference. First operand 42009 states and 135594 transitions. Second operand 5 states. [2019-12-07 18:39:13,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:13,718 INFO L93 Difference]: Finished difference Result 57974 states and 183613 transitions. [2019-12-07 18:39:13,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:39:13,718 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:39:13,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:13,804 INFO L225 Difference]: With dead ends: 57974 [2019-12-07 18:39:13,804 INFO L226 Difference]: Without dead ends: 57961 [2019-12-07 18:39:13,804 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:39:14,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57961 states. [2019-12-07 18:39:14,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57961 to 49840. [2019-12-07 18:39:14,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49840 states. [2019-12-07 18:39:14,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49840 states to 49840 states and 160152 transitions. [2019-12-07 18:39:14,741 INFO L78 Accepts]: Start accepts. Automaton has 49840 states and 160152 transitions. Word has length 25 [2019-12-07 18:39:14,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:14,741 INFO L462 AbstractCegarLoop]: Abstraction has 49840 states and 160152 transitions. [2019-12-07 18:39:14,741 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:39:14,741 INFO L276 IsEmpty]: Start isEmpty. Operand 49840 states and 160152 transitions. [2019-12-07 18:39:14,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:39:14,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:14,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:14,756 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:14,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:14,756 INFO L82 PathProgramCache]: Analyzing trace with hash 574668024, now seen corresponding path program 1 times [2019-12-07 18:39:14,757 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:14,757 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072996264] [2019-12-07 18:39:14,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:14,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:14,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:14,805 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072996264] [2019-12-07 18:39:14,805 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:14,806 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:39:14,806 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1290316696] [2019-12-07 18:39:14,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:39:14,806 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:14,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:39:14,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:39:14,807 INFO L87 Difference]: Start difference. First operand 49840 states and 160152 transitions. Second operand 6 states. [2019-12-07 18:39:15,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:15,311 INFO L93 Difference]: Finished difference Result 71876 states and 224793 transitions. [2019-12-07 18:39:15,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:39:15,312 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:39:15,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:15,416 INFO L225 Difference]: With dead ends: 71876 [2019-12-07 18:39:15,416 INFO L226 Difference]: Without dead ends: 71836 [2019-12-07 18:39:15,417 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:39:15,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71836 states. [2019-12-07 18:39:16,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71836 to 55662. [2019-12-07 18:39:16,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55662 states. [2019-12-07 18:39:16,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55662 states to 55662 states and 177494 transitions. [2019-12-07 18:39:16,501 INFO L78 Accepts]: Start accepts. Automaton has 55662 states and 177494 transitions. Word has length 27 [2019-12-07 18:39:16,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:16,501 INFO L462 AbstractCegarLoop]: Abstraction has 55662 states and 177494 transitions. [2019-12-07 18:39:16,501 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:39:16,502 INFO L276 IsEmpty]: Start isEmpty. Operand 55662 states and 177494 transitions. [2019-12-07 18:39:16,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:39:16,626 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:16,626 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:16,626 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:16,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:16,626 INFO L82 PathProgramCache]: Analyzing trace with hash -834373480, now seen corresponding path program 1 times [2019-12-07 18:39:16,626 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:16,626 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434747740] [2019-12-07 18:39:16,626 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:16,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:16,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:16,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434747740] [2019-12-07 18:39:16,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:16,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:39:16,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738358534] [2019-12-07 18:39:16,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:39:16,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:16,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:39:16,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:16,685 INFO L87 Difference]: Start difference. First operand 55662 states and 177494 transitions. Second operand 5 states. [2019-12-07 18:39:17,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:17,221 INFO L93 Difference]: Finished difference Result 73977 states and 234048 transitions. [2019-12-07 18:39:17,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:39:17,221 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 18:39:17,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:17,331 INFO L225 Difference]: With dead ends: 73977 [2019-12-07 18:39:17,331 INFO L226 Difference]: Without dead ends: 73977 [2019-12-07 18:39:17,331 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:39:17,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73977 states. [2019-12-07 18:39:18,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73977 to 66292. [2019-12-07 18:39:18,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66292 states. [2019-12-07 18:39:18,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66292 states to 66292 states and 211352 transitions. [2019-12-07 18:39:18,540 INFO L78 Accepts]: Start accepts. Automaton has 66292 states and 211352 transitions. Word has length 28 [2019-12-07 18:39:18,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:18,540 INFO L462 AbstractCegarLoop]: Abstraction has 66292 states and 211352 transitions. [2019-12-07 18:39:18,541 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:39:18,541 INFO L276 IsEmpty]: Start isEmpty. Operand 66292 states and 211352 transitions. [2019-12-07 18:39:18,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:39:18,565 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:18,565 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:18,565 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:18,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:18,566 INFO L82 PathProgramCache]: Analyzing trace with hash -1649688558, now seen corresponding path program 1 times [2019-12-07 18:39:18,566 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:18,566 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785068929] [2019-12-07 18:39:18,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:18,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:18,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:18,607 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785068929] [2019-12-07 18:39:18,607 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:18,607 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:18,607 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597006595] [2019-12-07 18:39:18,608 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:39:18,608 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:18,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:39:18,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:39:18,608 INFO L87 Difference]: Start difference. First operand 66292 states and 211352 transitions. Second operand 4 states. [2019-12-07 18:39:18,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:18,687 INFO L93 Difference]: Finished difference Result 28026 states and 84332 transitions. [2019-12-07 18:39:18,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:39:18,688 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 18:39:18,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:18,721 INFO L225 Difference]: With dead ends: 28026 [2019-12-07 18:39:18,721 INFO L226 Difference]: Without dead ends: 28026 [2019-12-07 18:39:18,722 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:39:18,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28026 states. [2019-12-07 18:39:19,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28026 to 26046. [2019-12-07 18:39:19,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26046 states. [2019-12-07 18:39:19,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26046 states to 26046 states and 78430 transitions. [2019-12-07 18:39:19,117 INFO L78 Accepts]: Start accepts. Automaton has 26046 states and 78430 transitions. Word has length 29 [2019-12-07 18:39:19,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:19,118 INFO L462 AbstractCegarLoop]: Abstraction has 26046 states and 78430 transitions. [2019-12-07 18:39:19,118 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:39:19,118 INFO L276 IsEmpty]: Start isEmpty. Operand 26046 states and 78430 transitions. [2019-12-07 18:39:19,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:39:19,144 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:19,144 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:19,144 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:19,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:19,144 INFO L82 PathProgramCache]: Analyzing trace with hash -1393723506, now seen corresponding path program 1 times [2019-12-07 18:39:19,144 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:19,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1037965154] [2019-12-07 18:39:19,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:19,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:19,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:19,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1037965154] [2019-12-07 18:39:19,181 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:19,181 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:19,182 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [75408448] [2019-12-07 18:39:19,182 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:39:19,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:19,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:39:19,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:19,182 INFO L87 Difference]: Start difference. First operand 26046 states and 78430 transitions. Second operand 5 states. [2019-12-07 18:39:19,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:19,468 INFO L93 Difference]: Finished difference Result 29821 states and 88882 transitions. [2019-12-07 18:39:19,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:39:19,469 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 18:39:19,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:19,503 INFO L225 Difference]: With dead ends: 29821 [2019-12-07 18:39:19,503 INFO L226 Difference]: Without dead ends: 29821 [2019-12-07 18:39:19,504 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:39:19,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29821 states. [2019-12-07 18:39:19,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29821 to 26485. [2019-12-07 18:39:19,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26485 states. [2019-12-07 18:39:19,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26485 states to 26485 states and 79878 transitions. [2019-12-07 18:39:19,914 INFO L78 Accepts]: Start accepts. Automaton has 26485 states and 79878 transitions. Word has length 33 [2019-12-07 18:39:19,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:19,914 INFO L462 AbstractCegarLoop]: Abstraction has 26485 states and 79878 transitions. [2019-12-07 18:39:19,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:39:19,914 INFO L276 IsEmpty]: Start isEmpty. Operand 26485 states and 79878 transitions. [2019-12-07 18:39:19,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:39:19,932 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:19,932 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:19,933 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:19,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:19,933 INFO L82 PathProgramCache]: Analyzing trace with hash 305072172, now seen corresponding path program 2 times [2019-12-07 18:39:19,933 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:19,933 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257839591] [2019-12-07 18:39:19,933 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:19,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:20,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:20,005 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1257839591] [2019-12-07 18:39:20,006 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:20,006 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:39:20,006 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [95214157] [2019-12-07 18:39:20,006 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:39:20,006 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:20,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:39:20,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:39:20,006 INFO L87 Difference]: Start difference. First operand 26485 states and 79878 transitions. Second operand 8 states. [2019-12-07 18:39:20,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:20,741 INFO L93 Difference]: Finished difference Result 36286 states and 106148 transitions. [2019-12-07 18:39:20,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 18:39:20,741 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 18:39:20,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:20,780 INFO L225 Difference]: With dead ends: 36286 [2019-12-07 18:39:20,780 INFO L226 Difference]: Without dead ends: 36286 [2019-12-07 18:39:20,781 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=352, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:39:20,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36286 states. [2019-12-07 18:39:21,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36286 to 24817. [2019-12-07 18:39:21,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24817 states. [2019-12-07 18:39:21,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24817 states to 24817 states and 74304 transitions. [2019-12-07 18:39:21,215 INFO L78 Accepts]: Start accepts. Automaton has 24817 states and 74304 transitions. Word has length 33 [2019-12-07 18:39:21,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:21,215 INFO L462 AbstractCegarLoop]: Abstraction has 24817 states and 74304 transitions. [2019-12-07 18:39:21,215 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:39:21,215 INFO L276 IsEmpty]: Start isEmpty. Operand 24817 states and 74304 transitions. [2019-12-07 18:39:21,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:39:21,234 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:21,235 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:21,235 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:21,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:21,235 INFO L82 PathProgramCache]: Analyzing trace with hash -1779229683, now seen corresponding path program 1 times [2019-12-07 18:39:21,235 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:21,235 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500852861] [2019-12-07 18:39:21,235 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:21,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:21,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:21,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500852861] [2019-12-07 18:39:21,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:21,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:39:21,294 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709463218] [2019-12-07 18:39:21,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:39:21,294 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:21,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:39:21,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:39:21,295 INFO L87 Difference]: Start difference. First operand 24817 states and 74304 transitions. Second operand 6 states. [2019-12-07 18:39:21,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:21,844 INFO L93 Difference]: Finished difference Result 41676 states and 125513 transitions. [2019-12-07 18:39:21,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:39:21,844 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 18:39:21,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:21,894 INFO L225 Difference]: With dead ends: 41676 [2019-12-07 18:39:21,895 INFO L226 Difference]: Without dead ends: 41676 [2019-12-07 18:39:21,895 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:39:22,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41676 states. [2019-12-07 18:39:22,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41676 to 28534. [2019-12-07 18:39:22,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28534 states. [2019-12-07 18:39:22,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28534 states to 28534 states and 85986 transitions. [2019-12-07 18:39:22,406 INFO L78 Accepts]: Start accepts. Automaton has 28534 states and 85986 transitions. Word has length 39 [2019-12-07 18:39:22,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:22,407 INFO L462 AbstractCegarLoop]: Abstraction has 28534 states and 85986 transitions. [2019-12-07 18:39:22,407 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:39:22,407 INFO L276 IsEmpty]: Start isEmpty. Operand 28534 states and 85986 transitions. [2019-12-07 18:39:22,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:39:22,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:22,439 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:22,440 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:22,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:22,440 INFO L82 PathProgramCache]: Analyzing trace with hash 681610815, now seen corresponding path program 2 times [2019-12-07 18:39:22,440 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:22,440 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470838615] [2019-12-07 18:39:22,440 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:22,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:22,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:22,521 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470838615] [2019-12-07 18:39:22,522 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:22,522 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:39:22,522 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1664150638] [2019-12-07 18:39:22,522 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:39:22,522 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:22,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:39:22,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:39:22,522 INFO L87 Difference]: Start difference. First operand 28534 states and 85986 transitions. Second operand 7 states. [2019-12-07 18:39:23,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:23,390 INFO L93 Difference]: Finished difference Result 37249 states and 110451 transitions. [2019-12-07 18:39:23,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:39:23,390 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 18:39:23,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:23,432 INFO L225 Difference]: With dead ends: 37249 [2019-12-07 18:39:23,432 INFO L226 Difference]: Without dead ends: 37249 [2019-12-07 18:39:23,432 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:39:23,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37249 states. [2019-12-07 18:39:23,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37249 to 29511. [2019-12-07 18:39:23,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29511 states. [2019-12-07 18:39:23,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29511 states to 29511 states and 88837 transitions. [2019-12-07 18:39:23,915 INFO L78 Accepts]: Start accepts. Automaton has 29511 states and 88837 transitions. Word has length 39 [2019-12-07 18:39:23,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:23,915 INFO L462 AbstractCegarLoop]: Abstraction has 29511 states and 88837 transitions. [2019-12-07 18:39:23,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:39:23,915 INFO L276 IsEmpty]: Start isEmpty. Operand 29511 states and 88837 transitions. [2019-12-07 18:39:23,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:39:23,942 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:23,942 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:23,942 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:23,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:23,942 INFO L82 PathProgramCache]: Analyzing trace with hash 1623043003, now seen corresponding path program 3 times [2019-12-07 18:39:23,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:23,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269645436] [2019-12-07 18:39:23,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:23,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:23,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:23,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1269645436] [2019-12-07 18:39:23,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:23,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:39:23,986 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518693297] [2019-12-07 18:39:23,986 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:39:23,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:23,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:39:23,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:23,987 INFO L87 Difference]: Start difference. First operand 29511 states and 88837 transitions. Second operand 3 states. [2019-12-07 18:39:24,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:24,076 INFO L93 Difference]: Finished difference Result 29432 states and 88591 transitions. [2019-12-07 18:39:24,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:39:24,076 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 18:39:24,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:24,110 INFO L225 Difference]: With dead ends: 29432 [2019-12-07 18:39:24,110 INFO L226 Difference]: Without dead ends: 29432 [2019-12-07 18:39:24,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:24,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29432 states. [2019-12-07 18:39:24,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29432 to 25094. [2019-12-07 18:39:24,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25094 states. [2019-12-07 18:39:24,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25094 states to 25094 states and 76326 transitions. [2019-12-07 18:39:24,517 INFO L78 Accepts]: Start accepts. Automaton has 25094 states and 76326 transitions. Word has length 39 [2019-12-07 18:39:24,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:24,518 INFO L462 AbstractCegarLoop]: Abstraction has 25094 states and 76326 transitions. [2019-12-07 18:39:24,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:39:24,518 INFO L276 IsEmpty]: Start isEmpty. Operand 25094 states and 76326 transitions. [2019-12-07 18:39:24,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:39:24,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:24,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:24,539 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:24,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:24,540 INFO L82 PathProgramCache]: Analyzing trace with hash -875459779, now seen corresponding path program 1 times [2019-12-07 18:39:24,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:24,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198150141] [2019-12-07 18:39:24,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:24,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:24,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:24,576 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198150141] [2019-12-07 18:39:24,576 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:24,576 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:39:24,576 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1146469136] [2019-12-07 18:39:24,576 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:39:24,577 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:24,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:39:24,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:24,577 INFO L87 Difference]: Start difference. First operand 25094 states and 76326 transitions. Second operand 5 states. [2019-12-07 18:39:24,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:24,645 INFO L93 Difference]: Finished difference Result 23602 states and 73042 transitions. [2019-12-07 18:39:24,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:39:24,645 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:39:24,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:24,672 INFO L225 Difference]: With dead ends: 23602 [2019-12-07 18:39:24,672 INFO L226 Difference]: Without dead ends: 23602 [2019-12-07 18:39:24,672 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:24,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23602 states. [2019-12-07 18:39:25,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23602 to 22436. [2019-12-07 18:39:25,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22436 states. [2019-12-07 18:39:25,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22436 states to 22436 states and 69750 transitions. [2019-12-07 18:39:25,053 INFO L78 Accepts]: Start accepts. Automaton has 22436 states and 69750 transitions. Word has length 40 [2019-12-07 18:39:25,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:25,053 INFO L462 AbstractCegarLoop]: Abstraction has 22436 states and 69750 transitions. [2019-12-07 18:39:25,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:39:25,053 INFO L276 IsEmpty]: Start isEmpty. Operand 22436 states and 69750 transitions. [2019-12-07 18:39:25,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:39:25,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:25,072 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:25,072 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:25,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:25,072 INFO L82 PathProgramCache]: Analyzing trace with hash 1833676956, now seen corresponding path program 1 times [2019-12-07 18:39:25,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:25,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682796329] [2019-12-07 18:39:25,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:25,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:25,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:25,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682796329] [2019-12-07 18:39:25,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:25,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:25,101 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51938927] [2019-12-07 18:39:25,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:39:25,101 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:25,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:39:25,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:25,101 INFO L87 Difference]: Start difference. First operand 22436 states and 69750 transitions. Second operand 3 states. [2019-12-07 18:39:25,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:25,196 INFO L93 Difference]: Finished difference Result 30131 states and 94181 transitions. [2019-12-07 18:39:25,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:39:25,196 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:39:25,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:25,231 INFO L225 Difference]: With dead ends: 30131 [2019-12-07 18:39:25,231 INFO L226 Difference]: Without dead ends: 30131 [2019-12-07 18:39:25,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:25,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30131 states. [2019-12-07 18:39:25,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30131 to 24199. [2019-12-07 18:39:25,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24199 states. [2019-12-07 18:39:25,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24199 states to 24199 states and 76082 transitions. [2019-12-07 18:39:25,632 INFO L78 Accepts]: Start accepts. Automaton has 24199 states and 76082 transitions. Word has length 65 [2019-12-07 18:39:25,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:25,632 INFO L462 AbstractCegarLoop]: Abstraction has 24199 states and 76082 transitions. [2019-12-07 18:39:25,632 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:39:25,632 INFO L276 IsEmpty]: Start isEmpty. Operand 24199 states and 76082 transitions. [2019-12-07 18:39:25,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:39:25,655 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:25,655 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:25,655 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:25,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:25,655 INFO L82 PathProgramCache]: Analyzing trace with hash -1473003231, now seen corresponding path program 1 times [2019-12-07 18:39:25,655 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:25,655 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278142397] [2019-12-07 18:39:25,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:25,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:25,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:25,695 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278142397] [2019-12-07 18:39:25,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:25,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:39:25,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1433822899] [2019-12-07 18:39:25,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:39:25,696 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:25,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:39:25,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:25,696 INFO L87 Difference]: Start difference. First operand 24199 states and 76082 transitions. Second operand 3 states. [2019-12-07 18:39:25,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:25,795 INFO L93 Difference]: Finished difference Result 28625 states and 89821 transitions. [2019-12-07 18:39:25,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:39:25,795 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:39:25,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:25,829 INFO L225 Difference]: With dead ends: 28625 [2019-12-07 18:39:25,829 INFO L226 Difference]: Without dead ends: 28625 [2019-12-07 18:39:25,830 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:25,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28625 states. [2019-12-07 18:39:26,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28625 to 24086. [2019-12-07 18:39:26,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24086 states. [2019-12-07 18:39:26,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24086 states to 24086 states and 75870 transitions. [2019-12-07 18:39:26,231 INFO L78 Accepts]: Start accepts. Automaton has 24086 states and 75870 transitions. Word has length 65 [2019-12-07 18:39:26,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:26,232 INFO L462 AbstractCegarLoop]: Abstraction has 24086 states and 75870 transitions. [2019-12-07 18:39:26,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:39:26,232 INFO L276 IsEmpty]: Start isEmpty. Operand 24086 states and 75870 transitions. [2019-12-07 18:39:26,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:39:26,254 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:26,254 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:26,254 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:26,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:26,255 INFO L82 PathProgramCache]: Analyzing trace with hash -563056132, now seen corresponding path program 1 times [2019-12-07 18:39:26,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:26,255 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250596532] [2019-12-07 18:39:26,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:26,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:26,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:26,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250596532] [2019-12-07 18:39:26,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:26,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:39:26,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1361296756] [2019-12-07 18:39:26,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:39:26,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:26,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:39:26,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:39:26,321 INFO L87 Difference]: Start difference. First operand 24086 states and 75870 transitions. Second operand 7 states. [2019-12-07 18:39:27,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:27,041 INFO L93 Difference]: Finished difference Result 35591 states and 109488 transitions. [2019-12-07 18:39:27,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:39:27,042 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:39:27,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:27,083 INFO L225 Difference]: With dead ends: 35591 [2019-12-07 18:39:27,083 INFO L226 Difference]: Without dead ends: 35591 [2019-12-07 18:39:27,083 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:39:27,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35591 states. [2019-12-07 18:39:27,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35591 to 25611. [2019-12-07 18:39:27,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25611 states. [2019-12-07 18:39:27,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25611 states to 25611 states and 80350 transitions. [2019-12-07 18:39:27,556 INFO L78 Accepts]: Start accepts. Automaton has 25611 states and 80350 transitions. Word has length 66 [2019-12-07 18:39:27,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:27,556 INFO L462 AbstractCegarLoop]: Abstraction has 25611 states and 80350 transitions. [2019-12-07 18:39:27,556 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:39:27,556 INFO L276 IsEmpty]: Start isEmpty. Operand 25611 states and 80350 transitions. [2019-12-07 18:39:27,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:39:27,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:27,583 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:27,584 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:27,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:27,584 INFO L82 PathProgramCache]: Analyzing trace with hash -1544825550, now seen corresponding path program 2 times [2019-12-07 18:39:27,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:27,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382370246] [2019-12-07 18:39:27,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:27,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:27,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:27,669 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382370246] [2019-12-07 18:39:27,669 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:27,669 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:39:27,669 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [142114619] [2019-12-07 18:39:27,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:39:27,669 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:27,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:39:27,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:39:27,670 INFO L87 Difference]: Start difference. First operand 25611 states and 80350 transitions. Second operand 9 states. [2019-12-07 18:39:28,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:28,832 INFO L93 Difference]: Finished difference Result 45647 states and 141386 transitions. [2019-12-07 18:39:28,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:39:28,832 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 18:39:28,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:28,890 INFO L225 Difference]: With dead ends: 45647 [2019-12-07 18:39:28,890 INFO L226 Difference]: Without dead ends: 45647 [2019-12-07 18:39:28,891 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 15 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=138, Invalid=512, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:39:29,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45647 states. [2019-12-07 18:39:29,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45647 to 25648. [2019-12-07 18:39:29,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25648 states. [2019-12-07 18:39:29,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25648 states to 25648 states and 80443 transitions. [2019-12-07 18:39:29,451 INFO L78 Accepts]: Start accepts. Automaton has 25648 states and 80443 transitions. Word has length 66 [2019-12-07 18:39:29,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:29,451 INFO L462 AbstractCegarLoop]: Abstraction has 25648 states and 80443 transitions. [2019-12-07 18:39:29,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:39:29,451 INFO L276 IsEmpty]: Start isEmpty. Operand 25648 states and 80443 transitions. [2019-12-07 18:39:29,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:39:29,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:29,479 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:29,480 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:29,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:29,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1176601420, now seen corresponding path program 1 times [2019-12-07 18:39:29,480 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:29,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656749715] [2019-12-07 18:39:29,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:29,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:29,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:29,541 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656749715] [2019-12-07 18:39:29,541 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:29,541 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:39:29,541 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1929484574] [2019-12-07 18:39:29,542 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:39:29,542 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:29,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:39:29,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:29,542 INFO L87 Difference]: Start difference. First operand 25648 states and 80443 transitions. Second operand 3 states. [2019-12-07 18:39:29,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:29,599 INFO L93 Difference]: Finished difference Result 21437 states and 66098 transitions. [2019-12-07 18:39:29,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:39:29,599 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:39:29,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:29,623 INFO L225 Difference]: With dead ends: 21437 [2019-12-07 18:39:29,623 INFO L226 Difference]: Without dead ends: 21437 [2019-12-07 18:39:29,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:29,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21437 states. [2019-12-07 18:39:29,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21437 to 20753. [2019-12-07 18:39:29,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20753 states. [2019-12-07 18:39:29,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20753 states to 20753 states and 64080 transitions. [2019-12-07 18:39:29,956 INFO L78 Accepts]: Start accepts. Automaton has 20753 states and 64080 transitions. Word has length 66 [2019-12-07 18:39:29,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:29,956 INFO L462 AbstractCegarLoop]: Abstraction has 20753 states and 64080 transitions. [2019-12-07 18:39:29,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:39:29,956 INFO L276 IsEmpty]: Start isEmpty. Operand 20753 states and 64080 transitions. [2019-12-07 18:39:29,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:29,975 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:29,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:29,975 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:29,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:29,975 INFO L82 PathProgramCache]: Analyzing trace with hash -1912825147, now seen corresponding path program 1 times [2019-12-07 18:39:29,976 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:29,976 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728209623] [2019-12-07 18:39:29,976 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:29,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:30,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:30,024 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728209623] [2019-12-07 18:39:30,024 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:30,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:30,024 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111177265] [2019-12-07 18:39:30,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:39:30,025 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:30,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:39:30,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:39:30,025 INFO L87 Difference]: Start difference. First operand 20753 states and 64080 transitions. Second operand 4 states. [2019-12-07 18:39:30,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:30,120 INFO L93 Difference]: Finished difference Result 20753 states and 63849 transitions. [2019-12-07 18:39:30,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:39:30,121 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:39:30,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:30,142 INFO L225 Difference]: With dead ends: 20753 [2019-12-07 18:39:30,142 INFO L226 Difference]: Without dead ends: 20753 [2019-12-07 18:39:30,142 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:30,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20753 states. [2019-12-07 18:39:30,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20753 to 18388. [2019-12-07 18:39:30,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18388 states. [2019-12-07 18:39:30,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18388 states to 18388 states and 56600 transitions. [2019-12-07 18:39:30,423 INFO L78 Accepts]: Start accepts. Automaton has 18388 states and 56600 transitions. Word has length 67 [2019-12-07 18:39:30,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:30,423 INFO L462 AbstractCegarLoop]: Abstraction has 18388 states and 56600 transitions. [2019-12-07 18:39:30,423 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:39:30,423 INFO L276 IsEmpty]: Start isEmpty. Operand 18388 states and 56600 transitions. [2019-12-07 18:39:30,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:30,438 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:30,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:30,438 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:30,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:30,438 INFO L82 PathProgramCache]: Analyzing trace with hash 2062742571, now seen corresponding path program 1 times [2019-12-07 18:39:30,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:30,438 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495550025] [2019-12-07 18:39:30,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:30,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:30,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:30,587 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495550025] [2019-12-07 18:39:30,587 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:30,587 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:39:30,587 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653589159] [2019-12-07 18:39:30,587 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:39:30,587 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:30,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:39:30,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:39:30,588 INFO L87 Difference]: Start difference. First operand 18388 states and 56600 transitions. Second operand 10 states. [2019-12-07 18:39:32,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:32,383 INFO L93 Difference]: Finished difference Result 38527 states and 118140 transitions. [2019-12-07 18:39:32,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:39:32,384 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:39:32,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:32,426 INFO L225 Difference]: With dead ends: 38527 [2019-12-07 18:39:32,426 INFO L226 Difference]: Without dead ends: 27686 [2019-12-07 18:39:32,426 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:39:32,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27686 states. [2019-12-07 18:39:32,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27686 to 21243. [2019-12-07 18:39:32,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21243 states. [2019-12-07 18:39:32,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21243 states to 21243 states and 65248 transitions. [2019-12-07 18:39:32,788 INFO L78 Accepts]: Start accepts. Automaton has 21243 states and 65248 transitions. Word has length 67 [2019-12-07 18:39:32,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:32,788 INFO L462 AbstractCegarLoop]: Abstraction has 21243 states and 65248 transitions. [2019-12-07 18:39:32,788 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:39:32,788 INFO L276 IsEmpty]: Start isEmpty. Operand 21243 states and 65248 transitions. [2019-12-07 18:39:32,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:32,807 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:32,808 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:32,808 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:32,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:32,808 INFO L82 PathProgramCache]: Analyzing trace with hash -492001749, now seen corresponding path program 2 times [2019-12-07 18:39:32,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:32,808 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344626352] [2019-12-07 18:39:32,808 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:32,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:33,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:33,102 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344626352] [2019-12-07 18:39:33,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:33,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:39:33,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255376641] [2019-12-07 18:39:33,103 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:39:33,103 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:33,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:39:33,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:39:33,103 INFO L87 Difference]: Start difference. First operand 21243 states and 65248 transitions. Second operand 15 states. [2019-12-07 18:39:43,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:43,720 INFO L93 Difference]: Finished difference Result 37195 states and 111768 transitions. [2019-12-07 18:39:43,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 18:39:43,720 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 18:39:43,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:43,759 INFO L225 Difference]: With dead ends: 37195 [2019-12-07 18:39:43,760 INFO L226 Difference]: Without dead ends: 34262 [2019-12-07 18:39:43,760 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 541 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=315, Invalid=1755, Unknown=0, NotChecked=0, Total=2070 [2019-12-07 18:39:43,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34262 states. [2019-12-07 18:39:44,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34262 to 22028. [2019-12-07 18:39:44,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22028 states. [2019-12-07 18:39:44,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22028 states to 22028 states and 67310 transitions. [2019-12-07 18:39:44,172 INFO L78 Accepts]: Start accepts. Automaton has 22028 states and 67310 transitions. Word has length 67 [2019-12-07 18:39:44,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:44,173 INFO L462 AbstractCegarLoop]: Abstraction has 22028 states and 67310 transitions. [2019-12-07 18:39:44,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:39:44,173 INFO L276 IsEmpty]: Start isEmpty. Operand 22028 states and 67310 transitions. [2019-12-07 18:39:44,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:44,192 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:44,192 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:44,192 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:44,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:44,193 INFO L82 PathProgramCache]: Analyzing trace with hash 1583562061, now seen corresponding path program 3 times [2019-12-07 18:39:44,193 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:44,193 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582010249] [2019-12-07 18:39:44,193 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:44,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:44,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:44,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [582010249] [2019-12-07 18:39:44,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:44,476 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:39:44,476 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [863980244] [2019-12-07 18:39:44,476 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:39:44,476 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:44,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:39:44,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:39:44,476 INFO L87 Difference]: Start difference. First operand 22028 states and 67310 transitions. Second operand 15 states. [2019-12-07 18:39:52,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:52,255 INFO L93 Difference]: Finished difference Result 39243 states and 117495 transitions. [2019-12-07 18:39:52,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2019-12-07 18:39:52,255 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 18:39:52,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:52,298 INFO L225 Difference]: With dead ends: 39243 [2019-12-07 18:39:52,298 INFO L226 Difference]: Without dead ends: 34376 [2019-12-07 18:39:52,300 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 892 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=452, Invalid=2628, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 18:39:52,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34376 states. [2019-12-07 18:39:52,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34376 to 21915. [2019-12-07 18:39:52,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21915 states. [2019-12-07 18:39:52,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21915 states to 21915 states and 67107 transitions. [2019-12-07 18:39:52,708 INFO L78 Accepts]: Start accepts. Automaton has 21915 states and 67107 transitions. Word has length 67 [2019-12-07 18:39:52,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:52,708 INFO L462 AbstractCegarLoop]: Abstraction has 21915 states and 67107 transitions. [2019-12-07 18:39:52,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:39:52,708 INFO L276 IsEmpty]: Start isEmpty. Operand 21915 states and 67107 transitions. [2019-12-07 18:39:52,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:52,727 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:52,727 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:52,728 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:52,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:52,728 INFO L82 PathProgramCache]: Analyzing trace with hash 693103783, now seen corresponding path program 4 times [2019-12-07 18:39:52,728 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:52,728 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859070237] [2019-12-07 18:39:52,728 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:52,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:52,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:52,871 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859070237] [2019-12-07 18:39:52,871 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:52,871 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:39:52,871 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [77720519] [2019-12-07 18:39:52,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:39:52,872 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:52,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:39:52,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:39:52,872 INFO L87 Difference]: Start difference. First operand 21915 states and 67107 transitions. Second operand 11 states. [2019-12-07 18:39:53,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:53,922 INFO L93 Difference]: Finished difference Result 32097 states and 97530 transitions. [2019-12-07 18:39:53,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 18:39:53,923 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:39:53,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:53,955 INFO L225 Difference]: With dead ends: 32097 [2019-12-07 18:39:53,955 INFO L226 Difference]: Without dead ends: 28274 [2019-12-07 18:39:53,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=455, Unknown=0, NotChecked=0, Total=552 [2019-12-07 18:39:54,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28274 states. [2019-12-07 18:39:54,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28274 to 21238. [2019-12-07 18:39:54,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21238 states. [2019-12-07 18:39:54,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21238 states to 21238 states and 65048 transitions. [2019-12-07 18:39:54,317 INFO L78 Accepts]: Start accepts. Automaton has 21238 states and 65048 transitions. Word has length 67 [2019-12-07 18:39:54,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:54,317 INFO L462 AbstractCegarLoop]: Abstraction has 21238 states and 65048 transitions. [2019-12-07 18:39:54,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:39:54,317 INFO L276 IsEmpty]: Start isEmpty. Operand 21238 states and 65048 transitions. [2019-12-07 18:39:54,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:54,342 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:54,343 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:54,343 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:54,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:54,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1535531457, now seen corresponding path program 5 times [2019-12-07 18:39:54,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:54,343 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357896160] [2019-12-07 18:39:54,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:54,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:54,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:54,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [357896160] [2019-12-07 18:39:54,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:54,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:39:54,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924970483] [2019-12-07 18:39:54,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 18:39:54,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:54,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 18:39:54,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:39:54,610 INFO L87 Difference]: Start difference. First operand 21238 states and 65048 transitions. Second operand 14 states. [2019-12-07 18:39:55,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:55,995 INFO L93 Difference]: Finished difference Result 29516 states and 88437 transitions. [2019-12-07 18:39:55,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 18:39:55,995 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 18:39:55,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:56,024 INFO L225 Difference]: With dead ends: 29516 [2019-12-07 18:39:56,024 INFO L226 Difference]: Without dead ends: 25377 [2019-12-07 18:39:56,025 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 3 SyntacticMatches, 6 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=155, Invalid=775, Unknown=0, NotChecked=0, Total=930 [2019-12-07 18:39:56,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25377 states. [2019-12-07 18:39:56,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25377 to 21651. [2019-12-07 18:39:56,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21651 states. [2019-12-07 18:39:56,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21651 states to 21651 states and 66169 transitions. [2019-12-07 18:39:56,356 INFO L78 Accepts]: Start accepts. Automaton has 21651 states and 66169 transitions. Word has length 67 [2019-12-07 18:39:56,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:56,356 INFO L462 AbstractCegarLoop]: Abstraction has 21651 states and 66169 transitions. [2019-12-07 18:39:56,356 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 18:39:56,356 INFO L276 IsEmpty]: Start isEmpty. Operand 21651 states and 66169 transitions. [2019-12-07 18:39:56,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:56,376 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:56,376 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:56,376 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:56,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:56,376 INFO L82 PathProgramCache]: Analyzing trace with hash -616718365, now seen corresponding path program 6 times [2019-12-07 18:39:56,376 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:56,376 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535413392] [2019-12-07 18:39:56,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:56,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:56,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:56,483 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [535413392] [2019-12-07 18:39:56,483 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:56,483 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:39:56,483 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211713700] [2019-12-07 18:39:56,483 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:39:56,483 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:56,483 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:39:56,484 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:39:56,484 INFO L87 Difference]: Start difference. First operand 21651 states and 66169 transitions. Second operand 10 states. [2019-12-07 18:39:57,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:57,160 INFO L93 Difference]: Finished difference Result 48039 states and 147340 transitions. [2019-12-07 18:39:57,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:39:57,161 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:39:57,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:57,213 INFO L225 Difference]: With dead ends: 48039 [2019-12-07 18:39:57,213 INFO L226 Difference]: Without dead ends: 43212 [2019-12-07 18:39:57,214 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2019-12-07 18:39:57,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43212 states. [2019-12-07 18:39:57,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43212 to 26335. [2019-12-07 18:39:57,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26335 states. [2019-12-07 18:39:57,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26335 states to 26335 states and 81508 transitions. [2019-12-07 18:39:57,766 INFO L78 Accepts]: Start accepts. Automaton has 26335 states and 81508 transitions. Word has length 67 [2019-12-07 18:39:57,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:57,767 INFO L462 AbstractCegarLoop]: Abstraction has 26335 states and 81508 transitions. [2019-12-07 18:39:57,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:39:57,767 INFO L276 IsEmpty]: Start isEmpty. Operand 26335 states and 81508 transitions. [2019-12-07 18:39:57,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:57,794 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:57,794 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:57,794 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:57,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:57,795 INFO L82 PathProgramCache]: Analyzing trace with hash -710078093, now seen corresponding path program 7 times [2019-12-07 18:39:57,795 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:57,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70272075] [2019-12-07 18:39:57,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:57,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:57,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:57,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70272075] [2019-12-07 18:39:57,903 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:57,903 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:39:57,903 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728132212] [2019-12-07 18:39:57,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:39:57,904 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:57,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:39:57,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:39:57,904 INFO L87 Difference]: Start difference. First operand 26335 states and 81508 transitions. Second operand 10 states. [2019-12-07 18:39:58,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:58,400 INFO L93 Difference]: Finished difference Result 43509 states and 133301 transitions. [2019-12-07 18:39:58,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:39:58,400 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:39:58,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:58,439 INFO L225 Difference]: With dead ends: 43509 [2019-12-07 18:39:58,440 INFO L226 Difference]: Without dead ends: 34295 [2019-12-07 18:39:58,440 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=362, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:39:58,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34295 states. [2019-12-07 18:39:58,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34295 to 21213. [2019-12-07 18:39:58,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21213 states. [2019-12-07 18:39:58,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21213 states to 21213 states and 65015 transitions. [2019-12-07 18:39:58,838 INFO L78 Accepts]: Start accepts. Automaton has 21213 states and 65015 transitions. Word has length 67 [2019-12-07 18:39:58,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:58,838 INFO L462 AbstractCegarLoop]: Abstraction has 21213 states and 65015 transitions. [2019-12-07 18:39:58,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:39:58,839 INFO L276 IsEmpty]: Start isEmpty. Operand 21213 states and 65015 transitions. [2019-12-07 18:39:58,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:39:58,857 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:58,857 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:58,857 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:58,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:58,857 INFO L82 PathProgramCache]: Analyzing trace with hash -2065446981, now seen corresponding path program 8 times [2019-12-07 18:39:58,857 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:58,858 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302430462] [2019-12-07 18:39:58,858 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:58,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:59,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:59,002 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302430462] [2019-12-07 18:39:59,002 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:59,002 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:39:59,003 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [721907481] [2019-12-07 18:39:59,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:39:59,003 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:59,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:39:59,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:39:59,003 INFO L87 Difference]: Start difference. First operand 21213 states and 65015 transitions. Second operand 11 states. [2019-12-07 18:39:59,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:59,662 INFO L93 Difference]: Finished difference Result 38232 states and 116742 transitions. [2019-12-07 18:39:59,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:39:59,662 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:39:59,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:59,704 INFO L225 Difference]: With dead ends: 38232 [2019-12-07 18:39:59,704 INFO L226 Difference]: Without dead ends: 37213 [2019-12-07 18:39:59,705 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 139 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=139, Invalid=617, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:39:59,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37213 states. [2019-12-07 18:40:00,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37213 to 25041. [2019-12-07 18:40:00,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25041 states. [2019-12-07 18:40:00,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25041 states to 25041 states and 76890 transitions. [2019-12-07 18:40:00,194 INFO L78 Accepts]: Start accepts. Automaton has 25041 states and 76890 transitions. Word has length 67 [2019-12-07 18:40:00,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:00,194 INFO L462 AbstractCegarLoop]: Abstraction has 25041 states and 76890 transitions. [2019-12-07 18:40:00,194 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:40:00,194 INFO L276 IsEmpty]: Start isEmpty. Operand 25041 states and 76890 transitions. [2019-12-07 18:40:00,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:00,221 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:00,221 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:00,221 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:00,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:00,222 INFO L82 PathProgramCache]: Analyzing trace with hash 2136160587, now seen corresponding path program 9 times [2019-12-07 18:40:00,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:00,222 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855863047] [2019-12-07 18:40:00,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:00,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:00,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:00,352 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855863047] [2019-12-07 18:40:00,352 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:00,352 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:40:00,352 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1155263147] [2019-12-07 18:40:00,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:40:00,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:00,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:40:00,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:40:00,353 INFO L87 Difference]: Start difference. First operand 25041 states and 76890 transitions. Second operand 11 states. [2019-12-07 18:40:00,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:00,956 INFO L93 Difference]: Finished difference Result 38003 states and 115334 transitions. [2019-12-07 18:40:00,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:40:00,957 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:40:00,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:00,994 INFO L225 Difference]: With dead ends: 38003 [2019-12-07 18:40:00,994 INFO L226 Difference]: Without dead ends: 33537 [2019-12-07 18:40:00,995 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=141, Invalid=615, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:40:01,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33537 states. [2019-12-07 18:40:01,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33537 to 21106. [2019-12-07 18:40:01,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21106 states. [2019-12-07 18:40:01,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21106 states to 21106 states and 64300 transitions. [2019-12-07 18:40:01,382 INFO L78 Accepts]: Start accepts. Automaton has 21106 states and 64300 transitions. Word has length 67 [2019-12-07 18:40:01,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:01,382 INFO L462 AbstractCegarLoop]: Abstraction has 21106 states and 64300 transitions. [2019-12-07 18:40:01,382 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:40:01,382 INFO L276 IsEmpty]: Start isEmpty. Operand 21106 states and 64300 transitions. [2019-12-07 18:40:01,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:01,400 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:01,401 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:01,401 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:01,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:01,401 INFO L82 PathProgramCache]: Analyzing trace with hash -1853423759, now seen corresponding path program 10 times [2019-12-07 18:40:01,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:01,401 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [292073467] [2019-12-07 18:40:01,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:01,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:01,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:01,535 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [292073467] [2019-12-07 18:40:01,536 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:01,536 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:40:01,536 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357309111] [2019-12-07 18:40:01,536 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:40:01,536 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:01,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:40:01,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:40:01,536 INFO L87 Difference]: Start difference. First operand 21106 states and 64300 transitions. Second operand 12 states. [2019-12-07 18:40:02,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:02,565 INFO L93 Difference]: Finished difference Result 26187 states and 78305 transitions. [2019-12-07 18:40:02,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:40:02,565 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:40:02,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:02,594 INFO L225 Difference]: With dead ends: 26187 [2019-12-07 18:40:02,594 INFO L226 Difference]: Without dead ends: 22230 [2019-12-07 18:40:02,595 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 118 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=149, Invalid=663, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:40:02,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22230 states. [2019-12-07 18:40:02,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22230 to 20637. [2019-12-07 18:40:02,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20637 states. [2019-12-07 18:40:02,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20637 states to 20637 states and 63192 transitions. [2019-12-07 18:40:02,896 INFO L78 Accepts]: Start accepts. Automaton has 20637 states and 63192 transitions. Word has length 67 [2019-12-07 18:40:02,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:02,896 INFO L462 AbstractCegarLoop]: Abstraction has 20637 states and 63192 transitions. [2019-12-07 18:40:02,897 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:40:02,897 INFO L276 IsEmpty]: Start isEmpty. Operand 20637 states and 63192 transitions. [2019-12-07 18:40:02,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:02,914 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:02,914 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:02,914 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:02,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:02,914 INFO L82 PathProgramCache]: Analyzing trace with hash 594227727, now seen corresponding path program 11 times [2019-12-07 18:40:02,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:02,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835893229] [2019-12-07 18:40:02,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:02,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:40:02,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:40:02,983 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:40:02,983 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:40:02,985 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (= v_~y~0_18 0) (= 0 v_~a$r_buff1_thd1~0_150) (= 0 v_~__unbuffered_p2_EAX~0_31) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (= v_~a$r_buff1_thd3~0_269 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t275~0.base_33| 4)) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t275~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t275~0.base_33|) |v_ULTIMATE.start_main_~#t275~0.offset_23| 0)) |v_#memory_int_19|) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= |v_ULTIMATE.start_main_~#t275~0.offset_23| 0) (= v_~a$mem_tmp~0_14 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t275~0.base_33|)) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t275~0.base_33| 1)) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t275~0.base_33|) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_~#t276~0.base=|v_ULTIMATE.start_main_~#t276~0.base_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ULTIMATE.start_main_~#t276~0.offset=|v_ULTIMATE.start_main_~#t276~0.offset_19|, ULTIMATE.start_main_~#t275~0.offset=|v_ULTIMATE.start_main_~#t275~0.offset_23|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ULTIMATE.start_main_~#t277~0.base=|v_ULTIMATE.start_main_~#t277~0.base_25|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ULTIMATE.start_main_~#t277~0.offset=|v_ULTIMATE.start_main_~#t277~0.offset_19|, ~y~0=v_~y~0_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t275~0.base=|v_ULTIMATE.start_main_~#t275~0.base_33|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_~#t276~0.base, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t276~0.offset, ULTIMATE.start_main_~#t275~0.offset, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t277~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t277~0.offset, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t275~0.base, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:40:02,985 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:40:02,986 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t276~0.base_12|) (not (= 0 |v_ULTIMATE.start_main_~#t276~0.base_12|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t276~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t276~0.base_12|) |v_ULTIMATE.start_main_~#t276~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t276~0.base_12| 4) |v_#length_15|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t276~0.base_12|)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t276~0.base_12| 1)) (= |v_ULTIMATE.start_main_~#t276~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t276~0.base=|v_ULTIMATE.start_main_~#t276~0.base_12|, ULTIMATE.start_main_~#t276~0.offset=|v_ULTIMATE.start_main_~#t276~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t276~0.base, ULTIMATE.start_main_~#t276~0.offset] because there is no mapped edge [2019-12-07 18:40:02,987 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t277~0.base_12| 4)) (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t277~0.base_12| 1) |v_#valid_32|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t277~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t277~0.base_12|) |v_ULTIMATE.start_main_~#t277~0.offset_10| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t277~0.base_12|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t277~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t277~0.base_12| 0)) (= |v_ULTIMATE.start_main_~#t277~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t277~0.base=|v_ULTIMATE.start_main_~#t277~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t277~0.offset=|v_ULTIMATE.start_main_~#t277~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t277~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t277~0.offset] because there is no mapped edge [2019-12-07 18:40:02,988 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-3297567 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-3297567 256) 0))) (or (and (= ~a$w_buff1~0_In-3297567 |P1Thread1of1ForFork2_#t~ite9_Out-3297567|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out-3297567| ~a~0_In-3297567)))) InVars {~a~0=~a~0_In-3297567, ~a$w_buff1~0=~a$w_buff1~0_In-3297567, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-3297567, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-3297567} OutVars{~a~0=~a~0_In-3297567, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-3297567|, ~a$w_buff1~0=~a$w_buff1~0_In-3297567, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-3297567, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-3297567} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:40:02,988 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:40:02,988 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In64722678 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In64722678 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In64722678 |P1Thread1of1ForFork2_#t~ite11_Out64722678|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out64722678|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In64722678, ~a$w_buff0_used~0=~a$w_buff0_used~0_In64722678} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In64722678, ~a$w_buff0_used~0=~a$w_buff0_used~0_In64722678, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out64722678|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:40:02,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In2094957198 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In2094957198 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out2094957198| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In2094957198 |P0Thread1of1ForFork1_#t~ite5_Out2094957198|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2094957198, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2094957198} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out2094957198|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2094957198, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2094957198} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:40:02,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In-2119238586 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In-2119238586 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-2119238586 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-2119238586 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-2119238586|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-2119238586 |P0Thread1of1ForFork1_#t~ite6_Out-2119238586|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2119238586, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2119238586, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2119238586, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2119238586} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-2119238586|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2119238586, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2119238586, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2119238586, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2119238586} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:40:02,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1401693918 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1401693918 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_Out1401693918 ~a$r_buff0_thd1~0_In1401693918))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~a$r_buff0_thd1~0_Out1401693918 0)) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1401693918, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1401693918} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1401693918|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1401693918, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1401693918} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:40:02,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1622819839 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1622819839 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1622819839 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1622819839 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out1622819839| ~a$r_buff1_thd1~0_In1622819839) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1622819839|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1622819839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1622819839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1622819839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1622819839} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1622819839|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1622819839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1622819839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1622819839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1622819839} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:40:02,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:40:02,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In130640315 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite21_Out130640315| |P2Thread1of1ForFork0_#t~ite20_Out130640315|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In130640315 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In130640315 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In130640315 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In130640315 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite20_Out130640315| ~a$w_buff0~0_In130640315)) (and (= |P2Thread1of1ForFork0_#t~ite20_In130640315| |P2Thread1of1ForFork0_#t~ite20_Out130640315|) (= |P2Thread1of1ForFork0_#t~ite21_Out130640315| ~a$w_buff0~0_In130640315) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In130640315, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In130640315, ~a$w_buff0_used~0=~a$w_buff0_used~0_In130640315, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In130640315, ~a$w_buff1_used~0=~a$w_buff1_used~0_In130640315, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In130640315|, ~weak$$choice2~0=~weak$$choice2~0_In130640315} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out130640315|, ~a$w_buff0~0=~a$w_buff0~0_In130640315, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In130640315, ~a$w_buff0_used~0=~a$w_buff0_used~0_In130640315, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In130640315, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out130640315|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In130640315, ~weak$$choice2~0=~weak$$choice2~0_In130640315} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:40:02,991 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-478784908 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite26_Out-478784908| ~a$w_buff0_used~0_In-478784908) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-478784908 256)))) (or (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-478784908 256))) (and (= (mod ~a$r_buff1_thd3~0_In-478784908 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In-478784908 256) 0))) (= |P2Thread1of1ForFork0_#t~ite26_Out-478784908| |P2Thread1of1ForFork0_#t~ite27_Out-478784908|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-478784908| ~a$w_buff0_used~0_In-478784908) (= |P2Thread1of1ForFork0_#t~ite26_In-478784908| |P2Thread1of1ForFork0_#t~ite26_Out-478784908|) (not .cse0)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-478784908|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-478784908, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-478784908, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-478784908, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-478784908, ~weak$$choice2~0=~weak$$choice2~0_In-478784908} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-478784908|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-478784908|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-478784908, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-478784908, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-478784908, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-478784908, ~weak$$choice2~0=~weak$$choice2~0_In-478784908} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:40:02,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:40:02,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:40:02,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In1599446918 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In1599446918 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1599446918| |P2Thread1of1ForFork0_#t~ite39_Out1599446918|))) (or (and (not .cse0) (not .cse1) .cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1599446918| ~a$w_buff1~0_In1599446918)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1599446918| ~a~0_In1599446918) (or .cse1 .cse0) .cse2))) InVars {~a~0=~a~0_In1599446918, ~a$w_buff1~0=~a$w_buff1~0_In1599446918, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1599446918, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1599446918} OutVars{~a~0=~a~0_In1599446918, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1599446918|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1599446918|, ~a$w_buff1~0=~a$w_buff1~0_In1599446918, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1599446918, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1599446918} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:40:02,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1236228912 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1236228912 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1236228912|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1236228912 |P2Thread1of1ForFork0_#t~ite40_Out1236228912|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1236228912, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1236228912} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1236228912|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1236228912, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1236228912} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:40:02,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In-763739491 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-763739491 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In-763739491 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-763739491 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-763739491|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-763739491 |P2Thread1of1ForFork0_#t~ite41_Out-763739491|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-763739491, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-763739491, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-763739491, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-763739491} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-763739491, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-763739491, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-763739491, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-763739491, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-763739491|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:40:02,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-174615172 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-174615172 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-174615172 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In-174615172 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-174615172 |P1Thread1of1ForFork2_#t~ite12_Out-174615172|)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-174615172| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-174615172, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-174615172, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-174615172, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-174615172} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-174615172, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-174615172, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-174615172, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-174615172|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-174615172} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:40:02,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-550721285 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-550721285 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-550721285| 0)) (and (= ~a$r_buff0_thd2~0_In-550721285 |P1Thread1of1ForFork2_#t~ite13_Out-550721285|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-550721285, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-550721285} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-550721285, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-550721285, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-550721285|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:40:02,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In544716352 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In544716352 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In544716352 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In544716352 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out544716352|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In544716352 |P1Thread1of1ForFork2_#t~ite14_Out544716352|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In544716352, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In544716352, ~a$w_buff0_used~0=~a$w_buff0_used~0_In544716352, ~a$w_buff1_used~0=~a$w_buff1_used~0_In544716352} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In544716352, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In544716352, ~a$w_buff0_used~0=~a$w_buff0_used~0_In544716352, ~a$w_buff1_used~0=~a$w_buff1_used~0_In544716352, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out544716352|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:40:02,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:40:02,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In1835266869 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1835266869 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1835266869| ~a$r_buff0_thd3~0_In1835266869)) (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1835266869|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1835266869, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1835266869} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1835266869, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1835266869, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1835266869|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:40:02,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In2050935026 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In2050935026 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In2050935026 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In2050935026 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out2050935026| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite43_Out2050935026| ~a$r_buff1_thd3~0_In2050935026) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2050935026, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2050935026, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2050935026, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2050935026} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out2050935026|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2050935026, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2050935026, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2050935026, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2050935026} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:40:02,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:40:02,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:40:02,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1095525177 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1095525177 256) 0))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In1095525177 |ULTIMATE.start_main_#t~ite47_Out1095525177|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1095525177| ~a~0_In1095525177)))) InVars {~a~0=~a~0_In1095525177, ~a$w_buff1~0=~a$w_buff1~0_In1095525177, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1095525177, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1095525177} OutVars{~a~0=~a~0_In1095525177, ~a$w_buff1~0=~a$w_buff1~0_In1095525177, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1095525177|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1095525177, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1095525177} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:40:02,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:40:02,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-7714752 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-7714752 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-7714752| 0) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In-7714752 |ULTIMATE.start_main_#t~ite49_Out-7714752|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-7714752, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7714752} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-7714752, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-7714752|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7714752} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:40:02,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1047429420 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1047429420 256))) (.cse3 (= (mod ~a$r_buff0_thd0~0_In-1047429420 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-1047429420 256) 0))) (or (and (= ~a$w_buff1_used~0_In-1047429420 |ULTIMATE.start_main_#t~ite50_Out-1047429420|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-1047429420|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1047429420, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1047429420, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1047429420, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1047429420} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1047429420|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1047429420, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1047429420, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1047429420, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1047429420} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:40:02,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1805749016 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1805749016 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out1805749016| ~a$r_buff0_thd0~0_In1805749016) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out1805749016| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1805749016, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1805749016} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1805749016|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1805749016, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1805749016} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:40:02,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1402311375 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-1402311375 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1402311375 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1402311375 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-1402311375| ~a$r_buff1_thd0~0_In-1402311375)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite52_Out-1402311375| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1402311375, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1402311375, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1402311375, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1402311375} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1402311375|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1402311375, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1402311375, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1402311375, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1402311375} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:40:02,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:40:03,058 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:40:03 BasicIcfg [2019-12-07 18:40:03,058 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:40:03,058 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:40:03,059 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:40:03,059 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:40:03,059 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:38:26" (3/4) ... [2019-12-07 18:40:03,061 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:40:03,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (= v_~y~0_18 0) (= 0 v_~a$r_buff1_thd1~0_150) (= 0 v_~__unbuffered_p2_EAX~0_31) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (= v_~a$r_buff1_thd3~0_269 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t275~0.base_33| 4)) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t275~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t275~0.base_33|) |v_ULTIMATE.start_main_~#t275~0.offset_23| 0)) |v_#memory_int_19|) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= |v_ULTIMATE.start_main_~#t275~0.offset_23| 0) (= v_~a$mem_tmp~0_14 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t275~0.base_33|)) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t275~0.base_33| 1)) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t275~0.base_33|) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_~#t276~0.base=|v_ULTIMATE.start_main_~#t276~0.base_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ULTIMATE.start_main_~#t276~0.offset=|v_ULTIMATE.start_main_~#t276~0.offset_19|, ULTIMATE.start_main_~#t275~0.offset=|v_ULTIMATE.start_main_~#t275~0.offset_23|, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ULTIMATE.start_main_~#t277~0.base=|v_ULTIMATE.start_main_~#t277~0.base_25|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ULTIMATE.start_main_~#t277~0.offset=|v_ULTIMATE.start_main_~#t277~0.offset_19|, ~y~0=v_~y~0_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t275~0.base=|v_ULTIMATE.start_main_~#t275~0.base_33|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_~#t276~0.base, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t276~0.offset, ULTIMATE.start_main_~#t275~0.offset, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t277~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t277~0.offset, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t275~0.base, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:40:03,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:40:03,063 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t276~0.base_12|) (not (= 0 |v_ULTIMATE.start_main_~#t276~0.base_12|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t276~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t276~0.base_12|) |v_ULTIMATE.start_main_~#t276~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t276~0.base_12| 4) |v_#length_15|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t276~0.base_12|)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t276~0.base_12| 1)) (= |v_ULTIMATE.start_main_~#t276~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t276~0.base=|v_ULTIMATE.start_main_~#t276~0.base_12|, ULTIMATE.start_main_~#t276~0.offset=|v_ULTIMATE.start_main_~#t276~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t276~0.base, ULTIMATE.start_main_~#t276~0.offset] because there is no mapped edge [2019-12-07 18:40:03,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t277~0.base_12| 4)) (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t277~0.base_12| 1) |v_#valid_32|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t277~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t277~0.base_12|) |v_ULTIMATE.start_main_~#t277~0.offset_10| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t277~0.base_12|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t277~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t277~0.base_12| 0)) (= |v_ULTIMATE.start_main_~#t277~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t277~0.base=|v_ULTIMATE.start_main_~#t277~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t277~0.offset=|v_ULTIMATE.start_main_~#t277~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t277~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t277~0.offset] because there is no mapped edge [2019-12-07 18:40:03,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-3297567 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-3297567 256) 0))) (or (and (= ~a$w_buff1~0_In-3297567 |P1Thread1of1ForFork2_#t~ite9_Out-3297567|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out-3297567| ~a~0_In-3297567)))) InVars {~a~0=~a~0_In-3297567, ~a$w_buff1~0=~a$w_buff1~0_In-3297567, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-3297567, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-3297567} OutVars{~a~0=~a~0_In-3297567, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-3297567|, ~a$w_buff1~0=~a$w_buff1~0_In-3297567, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-3297567, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-3297567} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:40:03,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:40:03,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In64722678 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In64722678 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In64722678 |P1Thread1of1ForFork2_#t~ite11_Out64722678|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out64722678|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In64722678, ~a$w_buff0_used~0=~a$w_buff0_used~0_In64722678} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In64722678, ~a$w_buff0_used~0=~a$w_buff0_used~0_In64722678, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out64722678|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:40:03,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In2094957198 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In2094957198 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out2094957198| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In2094957198 |P0Thread1of1ForFork1_#t~ite5_Out2094957198|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2094957198, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2094957198} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out2094957198|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2094957198, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2094957198} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:40:03,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In-2119238586 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In-2119238586 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-2119238586 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-2119238586 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-2119238586|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-2119238586 |P0Thread1of1ForFork1_#t~ite6_Out-2119238586|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2119238586, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2119238586, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2119238586, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2119238586} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-2119238586|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2119238586, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2119238586, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2119238586, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2119238586} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:40:03,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1401693918 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1401693918 256) 0)) (.cse1 (= ~a$r_buff0_thd1~0_Out1401693918 ~a$r_buff0_thd1~0_In1401693918))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~a$r_buff0_thd1~0_Out1401693918 0)) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1401693918, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1401693918} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1401693918|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1401693918, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1401693918} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:40:03,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1622819839 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1622819839 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1622819839 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1622819839 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out1622819839| ~a$r_buff1_thd1~0_In1622819839) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1622819839|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1622819839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1622819839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1622819839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1622819839} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1622819839|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1622819839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1622819839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1622819839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1622819839} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:40:03,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:40:03,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In130640315 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite21_Out130640315| |P2Thread1of1ForFork0_#t~ite20_Out130640315|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In130640315 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In130640315 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In130640315 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In130640315 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite20_Out130640315| ~a$w_buff0~0_In130640315)) (and (= |P2Thread1of1ForFork0_#t~ite20_In130640315| |P2Thread1of1ForFork0_#t~ite20_Out130640315|) (= |P2Thread1of1ForFork0_#t~ite21_Out130640315| ~a$w_buff0~0_In130640315) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In130640315, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In130640315, ~a$w_buff0_used~0=~a$w_buff0_used~0_In130640315, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In130640315, ~a$w_buff1_used~0=~a$w_buff1_used~0_In130640315, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In130640315|, ~weak$$choice2~0=~weak$$choice2~0_In130640315} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out130640315|, ~a$w_buff0~0=~a$w_buff0~0_In130640315, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In130640315, ~a$w_buff0_used~0=~a$w_buff0_used~0_In130640315, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In130640315, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out130640315|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In130640315, ~weak$$choice2~0=~weak$$choice2~0_In130640315} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:40:03,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-478784908 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite26_Out-478784908| ~a$w_buff0_used~0_In-478784908) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-478784908 256)))) (or (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-478784908 256))) (and (= (mod ~a$r_buff1_thd3~0_In-478784908 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In-478784908 256) 0))) (= |P2Thread1of1ForFork0_#t~ite26_Out-478784908| |P2Thread1of1ForFork0_#t~ite27_Out-478784908|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-478784908| ~a$w_buff0_used~0_In-478784908) (= |P2Thread1of1ForFork0_#t~ite26_In-478784908| |P2Thread1of1ForFork0_#t~ite26_Out-478784908|) (not .cse0)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-478784908|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-478784908, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-478784908, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-478784908, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-478784908, ~weak$$choice2~0=~weak$$choice2~0_In-478784908} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-478784908|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-478784908|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-478784908, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-478784908, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-478784908, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-478784908, ~weak$$choice2~0=~weak$$choice2~0_In-478784908} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:40:03,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:40:03,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:40:03,074 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In1599446918 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In1599446918 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1599446918| |P2Thread1of1ForFork0_#t~ite39_Out1599446918|))) (or (and (not .cse0) (not .cse1) .cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1599446918| ~a$w_buff1~0_In1599446918)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1599446918| ~a~0_In1599446918) (or .cse1 .cse0) .cse2))) InVars {~a~0=~a~0_In1599446918, ~a$w_buff1~0=~a$w_buff1~0_In1599446918, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1599446918, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1599446918} OutVars{~a~0=~a~0_In1599446918, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1599446918|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1599446918|, ~a$w_buff1~0=~a$w_buff1~0_In1599446918, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1599446918, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1599446918} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:40:03,075 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1236228912 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1236228912 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1236228912|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1236228912 |P2Thread1of1ForFork0_#t~ite40_Out1236228912|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1236228912, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1236228912} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1236228912|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1236228912, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1236228912} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:40:03,075 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In-763739491 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-763739491 256))) (.cse0 (= (mod ~a$r_buff1_thd3~0_In-763739491 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-763739491 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-763739491|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-763739491 |P2Thread1of1ForFork0_#t~ite41_Out-763739491|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-763739491, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-763739491, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-763739491, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-763739491} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-763739491, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-763739491, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-763739491, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-763739491, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-763739491|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:40:03,076 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-174615172 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-174615172 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-174615172 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In-174615172 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-174615172 |P1Thread1of1ForFork2_#t~ite12_Out-174615172|)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-174615172| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-174615172, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-174615172, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-174615172, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-174615172} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-174615172, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-174615172, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-174615172, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-174615172|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-174615172} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:40:03,077 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-550721285 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-550721285 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-550721285| 0)) (and (= ~a$r_buff0_thd2~0_In-550721285 |P1Thread1of1ForFork2_#t~ite13_Out-550721285|) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-550721285, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-550721285} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-550721285, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-550721285, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-550721285|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:40:03,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In544716352 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In544716352 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In544716352 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In544716352 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out544716352|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In544716352 |P1Thread1of1ForFork2_#t~ite14_Out544716352|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In544716352, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In544716352, ~a$w_buff0_used~0=~a$w_buff0_used~0_In544716352, ~a$w_buff1_used~0=~a$w_buff1_used~0_In544716352} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In544716352, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In544716352, ~a$w_buff0_used~0=~a$w_buff0_used~0_In544716352, ~a$w_buff1_used~0=~a$w_buff1_used~0_In544716352, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out544716352|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:40:03,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:40:03,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In1835266869 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1835266869 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1835266869| ~a$r_buff0_thd3~0_In1835266869)) (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1835266869|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1835266869, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1835266869} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1835266869, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1835266869, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1835266869|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:40:03,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In2050935026 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In2050935026 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In2050935026 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In2050935026 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out2050935026| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite43_Out2050935026| ~a$r_buff1_thd3~0_In2050935026) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2050935026, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2050935026, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2050935026, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2050935026} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out2050935026|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2050935026, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2050935026, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2050935026, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2050935026} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:40:03,079 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:40:03,079 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:40:03,079 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1095525177 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1095525177 256) 0))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In1095525177 |ULTIMATE.start_main_#t~ite47_Out1095525177|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1095525177| ~a~0_In1095525177)))) InVars {~a~0=~a~0_In1095525177, ~a$w_buff1~0=~a$w_buff1~0_In1095525177, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1095525177, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1095525177} OutVars{~a~0=~a~0_In1095525177, ~a$w_buff1~0=~a$w_buff1~0_In1095525177, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1095525177|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1095525177, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1095525177} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:40:03,079 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:40:03,080 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-7714752 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-7714752 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-7714752| 0) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In-7714752 |ULTIMATE.start_main_#t~ite49_Out-7714752|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-7714752, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7714752} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-7714752, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-7714752|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-7714752} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:40:03,080 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1047429420 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1047429420 256))) (.cse3 (= (mod ~a$r_buff0_thd0~0_In-1047429420 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-1047429420 256) 0))) (or (and (= ~a$w_buff1_used~0_In-1047429420 |ULTIMATE.start_main_#t~ite50_Out-1047429420|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-1047429420|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1047429420, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1047429420, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1047429420, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1047429420} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1047429420|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1047429420, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1047429420, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1047429420, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1047429420} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:40:03,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1805749016 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1805749016 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out1805749016| ~a$r_buff0_thd0~0_In1805749016) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out1805749016| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1805749016, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1805749016} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1805749016|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1805749016, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1805749016} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:40:03,082 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1402311375 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In-1402311375 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1402311375 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1402311375 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-1402311375| ~a$r_buff1_thd0~0_In-1402311375)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite52_Out-1402311375| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1402311375, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1402311375, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1402311375, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1402311375} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1402311375|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1402311375, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1402311375, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1402311375, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1402311375} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:40:03,082 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:40:03,161 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_6506e0a6-4c34-4c02-875e-8635362d88a1/bin/uautomizer/witness.graphml [2019-12-07 18:40:03,162 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:40:03,163 INFO L168 Benchmark]: Toolchain (without parser) took 97798.50 ms. Allocated memory was 1.0 GB in the beginning and 6.4 GB in the end (delta: 5.4 GB). Free memory was 940.7 MB in the beginning and 1.6 GB in the end (delta: -652.3 MB). Peak memory consumption was 4.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:40:03,163 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:40:03,164 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.76 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.9 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -120.7 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:40:03,164 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.93 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:40:03,164 INFO L168 Benchmark]: Boogie Preprocessor took 25.58 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:40:03,165 INFO L168 Benchmark]: RCFGBuilder took 409.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 996.1 MB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. [2019-12-07 18:40:03,165 INFO L168 Benchmark]: TraceAbstraction took 96826.36 ms. Allocated memory was 1.1 GB in the beginning and 6.4 GB in the end (delta: 5.3 GB). Free memory was 996.1 MB in the beginning and 1.6 GB in the end (delta: -615.1 MB). Peak memory consumption was 4.7 GB. Max. memory is 11.5 GB. [2019-12-07 18:40:03,165 INFO L168 Benchmark]: Witness Printer took 103.29 ms. Allocated memory is still 6.4 GB. Free memory was 1.6 GB in the beginning and 1.6 GB in the end (delta: 18.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:40:03,167 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.76 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.9 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -120.7 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.93 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.58 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 409.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 996.1 MB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 96826.36 ms. Allocated memory was 1.1 GB in the beginning and 6.4 GB in the end (delta: 5.3 GB). Free memory was 996.1 MB in the beginning and 1.6 GB in the end (delta: -615.1 MB). Peak memory consumption was 4.7 GB. Max. memory is 11.5 GB. * Witness Printer took 103.29 ms. Allocated memory is still 6.4 GB. Free memory was 1.6 GB in the beginning and 1.6 GB in the end (delta: 18.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 179 ProgramPointsBefore, 95 ProgramPointsAfterwards, 216 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 31 ChoiceCompositions, 6646 VarBasedMoverChecksPositive, 237 VarBasedMoverChecksNegative, 59 SemBasedMoverChecksPositive, 236 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 91218 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t275, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L742] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L743] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L744] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L745] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L746] 1 a$r_buff0_thd1 = (_Bool)1 [L749] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L752] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t276, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L766] 2 x = 1 [L769] 2 y = 1 [L772] 2 __unbuffered_p1_EAX = y [L775] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L841] FCALL, FORK 0 pthread_create(&t277, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L752] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L753] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L754] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 96.6s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 37.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9018 SDtfs, 11794 SDslu, 35320 SDs, 0 SdLazy, 27669 SolverSat, 553 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 22.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 523 GetRequests, 55 SyntacticMatches, 33 SemanticMatches, 435 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2819 ImplicationChecksByTransitivity, 4.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=168271occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 35.1s AutomataMinimizationTime, 31 MinimizatonAttempts, 264888 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 1529 NumberOfCodeBlocks, 1529 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 1431 ConstructedInterpolants, 0 QuantifiedInterpolants, 555677 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...