./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix011_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix011_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 226f9f7b9067513e57bf1604e9c0eb0a76532837 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:01:43,646 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:01:43,647 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:01:43,654 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:01:43,655 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:01:43,655 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:01:43,656 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:01:43,657 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:01:43,659 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:01:43,659 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:01:43,660 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:01:43,661 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:01:43,661 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:01:43,662 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:01:43,662 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:01:43,663 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:01:43,663 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:01:43,664 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:01:43,665 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:01:43,667 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:01:43,668 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:01:43,668 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:01:43,669 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:01:43,669 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:01:43,671 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:01:43,671 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:01:43,671 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:01:43,672 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:01:43,672 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:01:43,672 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:01:43,673 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:01:43,673 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:01:43,673 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:01:43,674 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:01:43,674 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:01:43,674 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:01:43,675 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:01:43,675 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:01:43,675 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:01:43,676 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:01:43,676 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:01:43,676 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:01:43,686 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:01:43,686 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:01:43,686 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:01:43,687 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:01:43,687 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:01:43,687 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:01:43,687 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:01:43,687 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:01:43,687 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:01:43,687 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:01:43,688 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:01:43,688 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:01:43,688 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:01:43,688 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:01:43,688 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:01:43,688 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:01:43,688 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:01:43,689 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:01:43,689 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:01:43,689 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:01:43,689 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:01:43,689 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:01:43,689 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:01:43,689 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:01:43,689 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:01:43,689 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:01:43,690 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:01:43,690 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:01:43,690 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:01:43,690 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 226f9f7b9067513e57bf1604e9c0eb0a76532837 [2019-12-07 14:01:43,787 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:01:43,794 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:01:43,797 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:01:43,798 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:01:43,798 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:01:43,798 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix011_power.oepc.i [2019-12-07 14:01:43,833 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/data/d03a99c10/f6ce9ae1e3ff42a0abcfca0ff7bab43a/FLAGfe81f1725 [2019-12-07 14:01:44,269 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:01:44,270 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/sv-benchmarks/c/pthread-wmm/mix011_power.oepc.i [2019-12-07 14:01:44,281 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/data/d03a99c10/f6ce9ae1e3ff42a0abcfca0ff7bab43a/FLAGfe81f1725 [2019-12-07 14:01:44,289 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/data/d03a99c10/f6ce9ae1e3ff42a0abcfca0ff7bab43a [2019-12-07 14:01:44,291 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:01:44,292 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:01:44,293 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:01:44,293 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:01:44,295 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:01:44,296 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,297 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44, skipping insertion in model container [2019-12-07 14:01:44,298 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,303 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:01:44,333 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:01:44,610 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:01:44,617 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:01:44,659 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:01:44,712 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:01:44,712 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44 WrapperNode [2019-12-07 14:01:44,712 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:01:44,713 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:01:44,713 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:01:44,713 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:01:44,719 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,733 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,752 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:01:44,752 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:01:44,753 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:01:44,753 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:01:44,759 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,759 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,763 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,763 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,771 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,774 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,776 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... [2019-12-07 14:01:44,780 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:01:44,780 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:01:44,780 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:01:44,780 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:01:44,781 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:01:44,828 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:01:44,828 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:01:44,828 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:01:44,828 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:01:44,829 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:01:44,829 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:01:44,829 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:01:44,829 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:01:44,829 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:01:44,829 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:01:44,829 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:01:44,830 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:01:44,830 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:01:44,831 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:01:45,216 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:01:45,216 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:01:45,217 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:01:45 BoogieIcfgContainer [2019-12-07 14:01:45,217 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:01:45,218 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:01:45,218 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:01:45,220 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:01:45,220 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:01:44" (1/3) ... [2019-12-07 14:01:45,220 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e884053 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:01:45, skipping insertion in model container [2019-12-07 14:01:45,220 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:44" (2/3) ... [2019-12-07 14:01:45,221 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e884053 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:01:45, skipping insertion in model container [2019-12-07 14:01:45,221 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:01:45" (3/3) ... [2019-12-07 14:01:45,222 INFO L109 eAbstractionObserver]: Analyzing ICFG mix011_power.oepc.i [2019-12-07 14:01:45,228 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:01:45,228 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:01:45,233 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:01:45,234 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:01:45,259 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,259 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,259 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,259 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,260 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,260 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,260 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,260 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,260 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,260 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,264 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,265 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,265 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,265 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,265 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,265 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,265 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,265 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,265 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,266 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,267 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,267 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,267 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,267 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,267 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,268 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,269 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,270 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,271 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,272 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,273 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,274 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,275 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,276 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,277 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,278 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,279 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:45,290 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:01:45,302 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:01:45,303 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:01:45,303 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:01:45,303 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:01:45,303 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:01:45,303 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:01:45,303 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:01:45,303 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:01:45,316 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 14:01:45,317 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 14:01:45,371 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 14:01:45,371 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:01:45,383 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 692 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:01:45,399 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 14:01:45,430 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 14:01:45,430 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:01:45,435 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 692 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:01:45,452 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 14:01:45,453 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:01:48,627 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 14:01:48,723 INFO L206 etLargeBlockEncoding]: Checked pairs total: 90866 [2019-12-07 14:01:48,723 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 14:01:48,726 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 103 transitions [2019-12-07 14:02:05,505 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 123302 states. [2019-12-07 14:02:05,506 INFO L276 IsEmpty]: Start isEmpty. Operand 123302 states. [2019-12-07 14:02:05,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 14:02:05,510 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:05,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 14:02:05,511 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:05,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:05,515 INFO L82 PathProgramCache]: Analyzing trace with hash 918873, now seen corresponding path program 1 times [2019-12-07 14:02:05,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:02:05,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214695562] [2019-12-07 14:02:05,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:05,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:05,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:05,652 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214695562] [2019-12-07 14:02:05,652 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:05,652 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:02:05,653 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1652980864] [2019-12-07 14:02:05,656 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:02:05,656 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:02:05,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:02:05,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:05,667 INFO L87 Difference]: Start difference. First operand 123302 states. Second operand 3 states. [2019-12-07 14:02:06,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:06,545 INFO L93 Difference]: Finished difference Result 122174 states and 518852 transitions. [2019-12-07 14:02:06,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:02:06,547 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 14:02:06,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:06,984 INFO L225 Difference]: With dead ends: 122174 [2019-12-07 14:02:06,984 INFO L226 Difference]: Without dead ends: 115076 [2019-12-07 14:02:06,985 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:12,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115076 states. [2019-12-07 14:02:14,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115076 to 115076. [2019-12-07 14:02:14,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115076 states. [2019-12-07 14:02:15,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115076 states to 115076 states and 488094 transitions. [2019-12-07 14:02:15,456 INFO L78 Accepts]: Start accepts. Automaton has 115076 states and 488094 transitions. Word has length 3 [2019-12-07 14:02:15,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:15,457 INFO L462 AbstractCegarLoop]: Abstraction has 115076 states and 488094 transitions. [2019-12-07 14:02:15,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:02:15,457 INFO L276 IsEmpty]: Start isEmpty. Operand 115076 states and 488094 transitions. [2019-12-07 14:02:15,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:02:15,460 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:15,460 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:15,460 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:15,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:15,460 INFO L82 PathProgramCache]: Analyzing trace with hash 1360334080, now seen corresponding path program 1 times [2019-12-07 14:02:15,461 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:02:15,461 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1027930694] [2019-12-07 14:02:15,461 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:15,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:15,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:15,528 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1027930694] [2019-12-07 14:02:15,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:15,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:02:15,529 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1101446040] [2019-12-07 14:02:15,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:02:15,530 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:02:15,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:02:15,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:02:15,530 INFO L87 Difference]: Start difference. First operand 115076 states and 488094 transitions. Second operand 4 states. [2019-12-07 14:02:16,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:16,532 INFO L93 Difference]: Finished difference Result 178684 states and 728513 transitions. [2019-12-07 14:02:16,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:02:16,533 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 14:02:16,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:16,990 INFO L225 Difference]: With dead ends: 178684 [2019-12-07 14:02:16,990 INFO L226 Difference]: Without dead ends: 178635 [2019-12-07 14:02:16,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:24,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178635 states. [2019-12-07 14:02:27,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178635 to 162755. [2019-12-07 14:02:27,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162755 states. [2019-12-07 14:02:27,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162755 states to 162755 states and 672033 transitions. [2019-12-07 14:02:27,496 INFO L78 Accepts]: Start accepts. Automaton has 162755 states and 672033 transitions. Word has length 11 [2019-12-07 14:02:27,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:27,496 INFO L462 AbstractCegarLoop]: Abstraction has 162755 states and 672033 transitions. [2019-12-07 14:02:27,497 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:02:27,497 INFO L276 IsEmpty]: Start isEmpty. Operand 162755 states and 672033 transitions. [2019-12-07 14:02:27,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:02:27,502 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:27,502 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:27,502 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:27,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:27,502 INFO L82 PathProgramCache]: Analyzing trace with hash 1888852276, now seen corresponding path program 1 times [2019-12-07 14:02:27,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:02:27,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127876399] [2019-12-07 14:02:27,503 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:27,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:27,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:27,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127876399] [2019-12-07 14:02:27,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:27,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:02:27,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794780572] [2019-12-07 14:02:27,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:02:27,565 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:02:27,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:02:27,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:02:27,565 INFO L87 Difference]: Start difference. First operand 162755 states and 672033 transitions. Second operand 4 states. [2019-12-07 14:02:29,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:29,220 INFO L93 Difference]: Finished difference Result 229896 states and 928060 transitions. [2019-12-07 14:02:29,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:02:29,221 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:02:29,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:29,792 INFO L225 Difference]: With dead ends: 229896 [2019-12-07 14:02:29,792 INFO L226 Difference]: Without dead ends: 229840 [2019-12-07 14:02:29,792 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:38,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229840 states. [2019-12-07 14:02:41,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229840 to 194046. [2019-12-07 14:02:41,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194046 states. [2019-12-07 14:02:41,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194046 states to 194046 states and 796782 transitions. [2019-12-07 14:02:41,725 INFO L78 Accepts]: Start accepts. Automaton has 194046 states and 796782 transitions. Word has length 13 [2019-12-07 14:02:41,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:41,726 INFO L462 AbstractCegarLoop]: Abstraction has 194046 states and 796782 transitions. [2019-12-07 14:02:41,726 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:02:41,726 INFO L276 IsEmpty]: Start isEmpty. Operand 194046 states and 796782 transitions. [2019-12-07 14:02:41,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 14:02:41,734 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:41,734 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:41,735 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:41,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:41,735 INFO L82 PathProgramCache]: Analyzing trace with hash -1220224201, now seen corresponding path program 1 times [2019-12-07 14:02:41,735 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:02:41,735 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191715979] [2019-12-07 14:02:41,735 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:41,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:41,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:41,786 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191715979] [2019-12-07 14:02:41,786 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:41,786 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:02:41,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1236475564] [2019-12-07 14:02:41,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:02:41,787 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:02:41,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:02:41,787 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:41,788 INFO L87 Difference]: Start difference. First operand 194046 states and 796782 transitions. Second operand 5 states. [2019-12-07 14:02:43,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:43,689 INFO L93 Difference]: Finished difference Result 261814 states and 1064888 transitions. [2019-12-07 14:02:43,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:02:43,690 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 14:02:43,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:44,336 INFO L225 Difference]: With dead ends: 261814 [2019-12-07 14:02:44,336 INFO L226 Difference]: Without dead ends: 261814 [2019-12-07 14:02:44,337 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:02:51,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261814 states. [2019-12-07 14:02:57,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261814 to 214683. [2019-12-07 14:02:57,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214683 states. [2019-12-07 14:02:57,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214683 states to 214683 states and 880739 transitions. [2019-12-07 14:02:57,704 INFO L78 Accepts]: Start accepts. Automaton has 214683 states and 880739 transitions. Word has length 16 [2019-12-07 14:02:57,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:57,704 INFO L462 AbstractCegarLoop]: Abstraction has 214683 states and 880739 transitions. [2019-12-07 14:02:57,704 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:02:57,704 INFO L276 IsEmpty]: Start isEmpty. Operand 214683 states and 880739 transitions. [2019-12-07 14:02:57,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:02:57,718 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:57,718 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:57,718 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:57,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:57,718 INFO L82 PathProgramCache]: Analyzing trace with hash 654894503, now seen corresponding path program 1 times [2019-12-07 14:02:57,719 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:02:57,719 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218018664] [2019-12-07 14:02:57,719 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:57,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:57,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:57,777 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218018664] [2019-12-07 14:02:57,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:57,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:02:57,778 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076772567] [2019-12-07 14:02:57,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:02:57,778 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:02:57,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:02:57,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:57,779 INFO L87 Difference]: Start difference. First operand 214683 states and 880739 transitions. Second operand 3 states. [2019-12-07 14:02:59,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:59,739 INFO L93 Difference]: Finished difference Result 386564 states and 1576020 transitions. [2019-12-07 14:02:59,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:02:59,740 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:02:59,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:00,609 INFO L225 Difference]: With dead ends: 386564 [2019-12-07 14:03:00,610 INFO L226 Difference]: Without dead ends: 343708 [2019-12-07 14:03:00,610 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:09,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343708 states. [2019-12-07 14:03:14,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343708 to 330290. [2019-12-07 14:03:14,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 330290 states. [2019-12-07 14:03:15,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330290 states to 330290 states and 1355549 transitions. [2019-12-07 14:03:15,287 INFO L78 Accepts]: Start accepts. Automaton has 330290 states and 1355549 transitions. Word has length 18 [2019-12-07 14:03:15,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:15,287 INFO L462 AbstractCegarLoop]: Abstraction has 330290 states and 1355549 transitions. [2019-12-07 14:03:15,287 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:03:15,287 INFO L276 IsEmpty]: Start isEmpty. Operand 330290 states and 1355549 transitions. [2019-12-07 14:03:15,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:03:15,307 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:15,307 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:15,307 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:15,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:15,308 INFO L82 PathProgramCache]: Analyzing trace with hash -1827269975, now seen corresponding path program 1 times [2019-12-07 14:03:15,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:03:15,308 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152023697] [2019-12-07 14:03:15,308 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:15,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:15,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:15,361 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [152023697] [2019-12-07 14:03:15,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:15,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:03:15,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975351771] [2019-12-07 14:03:15,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:03:15,362 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:03:15,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:03:15,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:03:15,363 INFO L87 Difference]: Start difference. First operand 330290 states and 1355549 transitions. Second operand 5 states. [2019-12-07 14:03:20,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:20,610 INFO L93 Difference]: Finished difference Result 437662 states and 1764155 transitions. [2019-12-07 14:03:20,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:03:20,611 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:03:20,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:22,015 INFO L225 Difference]: With dead ends: 437662 [2019-12-07 14:03:22,015 INFO L226 Difference]: Without dead ends: 437564 [2019-12-07 14:03:22,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:03:31,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437564 states. [2019-12-07 14:03:37,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437564 to 344733. [2019-12-07 14:03:37,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344733 states. [2019-12-07 14:03:38,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344733 states to 344733 states and 1412505 transitions. [2019-12-07 14:03:38,177 INFO L78 Accepts]: Start accepts. Automaton has 344733 states and 1412505 transitions. Word has length 19 [2019-12-07 14:03:38,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:38,178 INFO L462 AbstractCegarLoop]: Abstraction has 344733 states and 1412505 transitions. [2019-12-07 14:03:38,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:03:38,178 INFO L276 IsEmpty]: Start isEmpty. Operand 344733 states and 1412505 transitions. [2019-12-07 14:03:38,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:03:38,202 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:38,202 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:38,202 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:38,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:38,203 INFO L82 PathProgramCache]: Analyzing trace with hash 627404309, now seen corresponding path program 1 times [2019-12-07 14:03:38,203 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:03:38,203 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417120966] [2019-12-07 14:03:38,203 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:38,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:38,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:38,242 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417120966] [2019-12-07 14:03:38,243 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:38,243 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:03:38,243 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034959030] [2019-12-07 14:03:38,243 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:03:38,243 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:03:38,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:03:38,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:38,244 INFO L87 Difference]: Start difference. First operand 344733 states and 1412505 transitions. Second operand 3 states. [2019-12-07 14:03:40,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:40,067 INFO L93 Difference]: Finished difference Result 323711 states and 1312316 transitions. [2019-12-07 14:03:40,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:03:40,067 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 14:03:40,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:40,883 INFO L225 Difference]: With dead ends: 323711 [2019-12-07 14:03:40,883 INFO L226 Difference]: Without dead ends: 323711 [2019-12-07 14:03:40,883 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:51,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323711 states. [2019-12-07 14:03:55,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323711 to 320855. [2019-12-07 14:03:55,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 320855 states. [2019-12-07 14:03:57,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320855 states to 320855 states and 1301826 transitions. [2019-12-07 14:03:57,003 INFO L78 Accepts]: Start accepts. Automaton has 320855 states and 1301826 transitions. Word has length 19 [2019-12-07 14:03:57,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:57,003 INFO L462 AbstractCegarLoop]: Abstraction has 320855 states and 1301826 transitions. [2019-12-07 14:03:57,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:03:57,003 INFO L276 IsEmpty]: Start isEmpty. Operand 320855 states and 1301826 transitions. [2019-12-07 14:03:57,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:03:57,024 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:57,024 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:57,024 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:57,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:57,024 INFO L82 PathProgramCache]: Analyzing trace with hash -563916010, now seen corresponding path program 1 times [2019-12-07 14:03:57,024 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:03:57,024 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1351371516] [2019-12-07 14:03:57,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:57,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:57,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:57,075 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1351371516] [2019-12-07 14:03:57,075 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:57,075 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:03:57,075 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1416122147] [2019-12-07 14:03:57,076 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:03:57,076 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:03:57,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:03:57,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:03:57,076 INFO L87 Difference]: Start difference. First operand 320855 states and 1301826 transitions. Second operand 4 states. [2019-12-07 14:03:58,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:58,468 INFO L93 Difference]: Finished difference Result 333038 states and 1339314 transitions. [2019-12-07 14:03:58,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:03:58,469 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 14:03:58,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:59,801 INFO L225 Difference]: With dead ends: 333038 [2019-12-07 14:03:59,802 INFO L226 Difference]: Without dead ends: 333038 [2019-12-07 14:03:59,802 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:07,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333038 states. [2019-12-07 14:04:11,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333038 to 317095. [2019-12-07 14:04:11,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317095 states. [2019-12-07 14:04:12,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317095 states to 317095 states and 1287624 transitions. [2019-12-07 14:04:12,514 INFO L78 Accepts]: Start accepts. Automaton has 317095 states and 1287624 transitions. Word has length 19 [2019-12-07 14:04:12,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:12,514 INFO L462 AbstractCegarLoop]: Abstraction has 317095 states and 1287624 transitions. [2019-12-07 14:04:12,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:04:12,514 INFO L276 IsEmpty]: Start isEmpty. Operand 317095 states and 1287624 transitions. [2019-12-07 14:04:12,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:04:12,534 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:12,534 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:12,534 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:12,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:12,534 INFO L82 PathProgramCache]: Analyzing trace with hash -1173347385, now seen corresponding path program 1 times [2019-12-07 14:04:12,535 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:12,535 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212452390] [2019-12-07 14:04:12,535 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:12,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:12,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:12,577 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212452390] [2019-12-07 14:04:12,577 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:12,577 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:12,577 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [630666107] [2019-12-07 14:04:12,578 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:04:12,578 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:12,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:04:12,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:12,578 INFO L87 Difference]: Start difference. First operand 317095 states and 1287624 transitions. Second operand 4 states. [2019-12-07 14:04:16,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:16,822 INFO L93 Difference]: Finished difference Result 332007 states and 1335868 transitions. [2019-12-07 14:04:16,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:04:16,823 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 14:04:16,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:17,630 INFO L225 Difference]: With dead ends: 332007 [2019-12-07 14:04:17,630 INFO L226 Difference]: Without dead ends: 332007 [2019-12-07 14:04:17,630 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:25,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 332007 states. [2019-12-07 14:04:29,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 332007 to 316788. [2019-12-07 14:04:29,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 316788 states. [2019-12-07 14:04:30,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316788 states to 316788 states and 1286469 transitions. [2019-12-07 14:04:30,758 INFO L78 Accepts]: Start accepts. Automaton has 316788 states and 1286469 transitions. Word has length 19 [2019-12-07 14:04:30,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:30,759 INFO L462 AbstractCegarLoop]: Abstraction has 316788 states and 1286469 transitions. [2019-12-07 14:04:30,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:04:30,759 INFO L276 IsEmpty]: Start isEmpty. Operand 316788 states and 1286469 transitions. [2019-12-07 14:04:30,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 14:04:30,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:30,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:30,785 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:30,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:30,785 INFO L82 PathProgramCache]: Analyzing trace with hash -2025543399, now seen corresponding path program 1 times [2019-12-07 14:04:30,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:30,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2103835119] [2019-12-07 14:04:30,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:30,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:30,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:30,811 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2103835119] [2019-12-07 14:04:30,811 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:30,811 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:30,811 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1628091195] [2019-12-07 14:04:30,812 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:04:30,812 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:30,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:04:30,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:30,812 INFO L87 Difference]: Start difference. First operand 316788 states and 1286469 transitions. Second operand 3 states. [2019-12-07 14:04:30,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:31,000 INFO L93 Difference]: Finished difference Result 61763 states and 197455 transitions. [2019-12-07 14:04:31,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:04:31,000 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 14:04:31,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:31,092 INFO L225 Difference]: With dead ends: 61763 [2019-12-07 14:04:31,093 INFO L226 Difference]: Without dead ends: 61763 [2019-12-07 14:04:31,093 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:31,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61763 states. [2019-12-07 14:04:31,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61763 to 61763. [2019-12-07 14:04:31,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61763 states. [2019-12-07 14:04:32,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61763 states to 61763 states and 197455 transitions. [2019-12-07 14:04:32,058 INFO L78 Accepts]: Start accepts. Automaton has 61763 states and 197455 transitions. Word has length 20 [2019-12-07 14:04:32,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:32,059 INFO L462 AbstractCegarLoop]: Abstraction has 61763 states and 197455 transitions. [2019-12-07 14:04:32,059 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:04:32,059 INFO L276 IsEmpty]: Start isEmpty. Operand 61763 states and 197455 transitions. [2019-12-07 14:04:32,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:04:32,064 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:32,064 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:32,064 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:32,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:32,064 INFO L82 PathProgramCache]: Analyzing trace with hash -1720601530, now seen corresponding path program 1 times [2019-12-07 14:04:32,064 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:32,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748823903] [2019-12-07 14:04:32,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:32,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:32,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:32,102 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748823903] [2019-12-07 14:04:32,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:32,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:04:32,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812460682] [2019-12-07 14:04:32,103 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:04:32,103 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:32,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:04:32,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:04:32,103 INFO L87 Difference]: Start difference. First operand 61763 states and 197455 transitions. Second operand 6 states. [2019-12-07 14:04:33,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:33,280 INFO L93 Difference]: Finished difference Result 89712 states and 280731 transitions. [2019-12-07 14:04:33,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:04:33,281 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 14:04:33,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:33,403 INFO L225 Difference]: With dead ends: 89712 [2019-12-07 14:04:33,403 INFO L226 Difference]: Without dead ends: 89705 [2019-12-07 14:04:33,403 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:04:33,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89705 states. [2019-12-07 14:04:34,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89705 to 67441. [2019-12-07 14:04:34,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67441 states. [2019-12-07 14:04:34,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67441 states to 67441 states and 214030 transitions. [2019-12-07 14:04:34,625 INFO L78 Accepts]: Start accepts. Automaton has 67441 states and 214030 transitions. Word has length 22 [2019-12-07 14:04:34,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:34,625 INFO L462 AbstractCegarLoop]: Abstraction has 67441 states and 214030 transitions. [2019-12-07 14:04:34,625 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:04:34,625 INFO L276 IsEmpty]: Start isEmpty. Operand 67441 states and 214030 transitions. [2019-12-07 14:04:34,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:04:34,640 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:34,640 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:34,640 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:34,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:34,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1856606199, now seen corresponding path program 1 times [2019-12-07 14:04:34,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:34,641 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62573738] [2019-12-07 14:04:34,641 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:34,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:34,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:34,678 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [62573738] [2019-12-07 14:04:34,678 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:34,678 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:04:34,679 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047176245] [2019-12-07 14:04:34,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:04:34,679 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:34,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:04:34,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:04:34,679 INFO L87 Difference]: Start difference. First operand 67441 states and 214030 transitions. Second operand 6 states. [2019-12-07 14:04:35,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:35,172 INFO L93 Difference]: Finished difference Result 90070 states and 280708 transitions. [2019-12-07 14:04:35,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 14:04:35,173 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 14:04:35,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:35,292 INFO L225 Difference]: With dead ends: 90070 [2019-12-07 14:04:35,293 INFO L226 Difference]: Without dead ends: 90032 [2019-12-07 14:04:35,293 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:04:36,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90032 states. [2019-12-07 14:04:36,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90032 to 69461. [2019-12-07 14:04:36,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69461 states. [2019-12-07 14:04:36,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69461 states to 69461 states and 220032 transitions. [2019-12-07 14:04:36,909 INFO L78 Accepts]: Start accepts. Automaton has 69461 states and 220032 transitions. Word has length 27 [2019-12-07 14:04:36,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:36,909 INFO L462 AbstractCegarLoop]: Abstraction has 69461 states and 220032 transitions. [2019-12-07 14:04:36,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:04:36,909 INFO L276 IsEmpty]: Start isEmpty. Operand 69461 states and 220032 transitions. [2019-12-07 14:04:36,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 14:04:36,931 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:36,931 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:36,931 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:36,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:36,932 INFO L82 PathProgramCache]: Analyzing trace with hash -2030740248, now seen corresponding path program 1 times [2019-12-07 14:04:36,932 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:36,932 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864578702] [2019-12-07 14:04:36,932 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:36,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:36,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:36,963 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1864578702] [2019-12-07 14:04:36,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:36,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:04:36,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971854496] [2019-12-07 14:04:36,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:04:36,964 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:36,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:04:36,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:36,964 INFO L87 Difference]: Start difference. First operand 69461 states and 220032 transitions. Second operand 4 states. [2019-12-07 14:04:37,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:37,052 INFO L93 Difference]: Finished difference Result 26709 states and 81284 transitions. [2019-12-07 14:04:37,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:04:37,052 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 14:04:37,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:37,088 INFO L225 Difference]: With dead ends: 26709 [2019-12-07 14:04:37,088 INFO L226 Difference]: Without dead ends: 26709 [2019-12-07 14:04:37,088 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:37,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26709 states. [2019-12-07 14:04:37,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26709 to 25010. [2019-12-07 14:04:37,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25010 states. [2019-12-07 14:04:37,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25010 states to 25010 states and 76174 transitions. [2019-12-07 14:04:37,469 INFO L78 Accepts]: Start accepts. Automaton has 25010 states and 76174 transitions. Word has length 30 [2019-12-07 14:04:37,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:37,469 INFO L462 AbstractCegarLoop]: Abstraction has 25010 states and 76174 transitions. [2019-12-07 14:04:37,469 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:04:37,469 INFO L276 IsEmpty]: Start isEmpty. Operand 25010 states and 76174 transitions. [2019-12-07 14:04:37,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 14:04:37,488 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:37,488 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:37,488 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:37,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:37,489 INFO L82 PathProgramCache]: Analyzing trace with hash -1731527828, now seen corresponding path program 1 times [2019-12-07 14:04:37,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:37,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93531259] [2019-12-07 14:04:37,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:37,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:37,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:37,538 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [93531259] [2019-12-07 14:04:37,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:37,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:04:37,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1691979921] [2019-12-07 14:04:37,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:04:37,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:37,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:04:37,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:04:37,539 INFO L87 Difference]: Start difference. First operand 25010 states and 76174 transitions. Second operand 7 states. [2019-12-07 14:04:38,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:38,227 INFO L93 Difference]: Finished difference Result 31914 states and 94644 transitions. [2019-12-07 14:04:38,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 14:04:38,228 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 14:04:38,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:38,262 INFO L225 Difference]: With dead ends: 31914 [2019-12-07 14:04:38,262 INFO L226 Difference]: Without dead ends: 31914 [2019-12-07 14:04:38,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:04:38,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31914 states. [2019-12-07 14:04:38,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31914 to 24517. [2019-12-07 14:04:38,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24517 states. [2019-12-07 14:04:38,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24517 states to 24517 states and 74709 transitions. [2019-12-07 14:04:38,665 INFO L78 Accepts]: Start accepts. Automaton has 24517 states and 74709 transitions. Word has length 33 [2019-12-07 14:04:38,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:38,665 INFO L462 AbstractCegarLoop]: Abstraction has 24517 states and 74709 transitions. [2019-12-07 14:04:38,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:04:38,665 INFO L276 IsEmpty]: Start isEmpty. Operand 24517 states and 74709 transitions. [2019-12-07 14:04:38,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:04:38,686 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:38,687 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:38,687 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:38,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:38,687 INFO L82 PathProgramCache]: Analyzing trace with hash 743961375, now seen corresponding path program 1 times [2019-12-07 14:04:38,687 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:38,687 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1188464489] [2019-12-07 14:04:38,687 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:38,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:38,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:38,748 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1188464489] [2019-12-07 14:04:38,748 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:38,748 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:04:38,748 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891530793] [2019-12-07 14:04:38,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:04:38,749 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:38,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:04:38,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:38,749 INFO L87 Difference]: Start difference. First operand 24517 states and 74709 transitions. Second operand 4 states. [2019-12-07 14:04:38,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:38,846 INFO L93 Difference]: Finished difference Result 33290 states and 101983 transitions. [2019-12-07 14:04:38,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:04:38,846 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 41 [2019-12-07 14:04:38,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:38,861 INFO L225 Difference]: With dead ends: 33290 [2019-12-07 14:04:38,861 INFO L226 Difference]: Without dead ends: 12633 [2019-12-07 14:04:38,861 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:38,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12633 states. [2019-12-07 14:04:39,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12633 to 12286. [2019-12-07 14:04:39,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12286 states. [2019-12-07 14:04:39,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12286 states to 12286 states and 37034 transitions. [2019-12-07 14:04:39,034 INFO L78 Accepts]: Start accepts. Automaton has 12286 states and 37034 transitions. Word has length 41 [2019-12-07 14:04:39,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:39,034 INFO L462 AbstractCegarLoop]: Abstraction has 12286 states and 37034 transitions. [2019-12-07 14:04:39,034 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:04:39,034 INFO L276 IsEmpty]: Start isEmpty. Operand 12286 states and 37034 transitions. [2019-12-07 14:04:39,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:04:39,042 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:39,042 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:39,042 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:39,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:39,043 INFO L82 PathProgramCache]: Analyzing trace with hash 114736773, now seen corresponding path program 2 times [2019-12-07 14:04:39,043 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:39,043 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461809454] [2019-12-07 14:04:39,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:39,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:39,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:39,074 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [461809454] [2019-12-07 14:04:39,074 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:39,074 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:39,074 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [399299539] [2019-12-07 14:04:39,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:04:39,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:39,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:04:39,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:39,075 INFO L87 Difference]: Start difference. First operand 12286 states and 37034 transitions. Second operand 3 states. [2019-12-07 14:04:39,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:39,107 INFO L93 Difference]: Finished difference Result 11573 states and 34231 transitions. [2019-12-07 14:04:39,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:04:39,108 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 14:04:39,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:39,119 INFO L225 Difference]: With dead ends: 11573 [2019-12-07 14:04:39,119 INFO L226 Difference]: Without dead ends: 11573 [2019-12-07 14:04:39,119 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:39,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11573 states. [2019-12-07 14:04:39,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11573 to 11287. [2019-12-07 14:04:39,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11287 states. [2019-12-07 14:04:39,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11287 states to 11287 states and 33440 transitions. [2019-12-07 14:04:39,277 INFO L78 Accepts]: Start accepts. Automaton has 11287 states and 33440 transitions. Word has length 41 [2019-12-07 14:04:39,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:39,277 INFO L462 AbstractCegarLoop]: Abstraction has 11287 states and 33440 transitions. [2019-12-07 14:04:39,277 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:04:39,277 INFO L276 IsEmpty]: Start isEmpty. Operand 11287 states and 33440 transitions. [2019-12-07 14:04:39,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 14:04:39,285 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:39,285 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:39,286 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:39,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:39,286 INFO L82 PathProgramCache]: Analyzing trace with hash 1958340684, now seen corresponding path program 1 times [2019-12-07 14:04:39,286 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:39,286 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528953191] [2019-12-07 14:04:39,286 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:39,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:39,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:39,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528953191] [2019-12-07 14:04:39,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:39,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:04:39,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475301850] [2019-12-07 14:04:39,324 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:04:39,324 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:39,324 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:04:39,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:04:39,325 INFO L87 Difference]: Start difference. First operand 11287 states and 33440 transitions. Second operand 5 states. [2019-12-07 14:04:39,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:39,363 INFO L93 Difference]: Finished difference Result 10340 states and 31388 transitions. [2019-12-07 14:04:39,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:04:39,363 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 14:04:39,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:39,372 INFO L225 Difference]: With dead ends: 10340 [2019-12-07 14:04:39,372 INFO L226 Difference]: Without dead ends: 8869 [2019-12-07 14:04:39,373 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:04:39,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8869 states. [2019-12-07 14:04:39,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8869 to 8869. [2019-12-07 14:04:39,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8869 states. [2019-12-07 14:04:39,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8869 states to 8869 states and 27721 transitions. [2019-12-07 14:04:39,500 INFO L78 Accepts]: Start accepts. Automaton has 8869 states and 27721 transitions. Word has length 42 [2019-12-07 14:04:39,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:39,500 INFO L462 AbstractCegarLoop]: Abstraction has 8869 states and 27721 transitions. [2019-12-07 14:04:39,500 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:04:39,501 INFO L276 IsEmpty]: Start isEmpty. Operand 8869 states and 27721 transitions. [2019-12-07 14:04:39,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:04:39,507 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:39,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:39,507 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:39,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:39,508 INFO L82 PathProgramCache]: Analyzing trace with hash -668465134, now seen corresponding path program 1 times [2019-12-07 14:04:39,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:39,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326580328] [2019-12-07 14:04:39,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:39,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:39,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:39,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326580328] [2019-12-07 14:04:39,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:39,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:04:39,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [417573826] [2019-12-07 14:04:39,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:04:39,539 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:39,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:04:39,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:39,540 INFO L87 Difference]: Start difference. First operand 8869 states and 27721 transitions. Second operand 3 states. [2019-12-07 14:04:39,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:39,590 INFO L93 Difference]: Finished difference Result 13626 states and 41798 transitions. [2019-12-07 14:04:39,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:04:39,591 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:04:39,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:39,605 INFO L225 Difference]: With dead ends: 13626 [2019-12-07 14:04:39,605 INFO L226 Difference]: Without dead ends: 13626 [2019-12-07 14:04:39,605 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:39,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13626 states. [2019-12-07 14:04:39,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13626 to 10499. [2019-12-07 14:04:39,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10499 states. [2019-12-07 14:04:39,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10499 states to 10499 states and 32435 transitions. [2019-12-07 14:04:39,776 INFO L78 Accepts]: Start accepts. Automaton has 10499 states and 32435 transitions. Word has length 66 [2019-12-07 14:04:39,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:39,777 INFO L462 AbstractCegarLoop]: Abstraction has 10499 states and 32435 transitions. [2019-12-07 14:04:39,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:04:39,777 INFO L276 IsEmpty]: Start isEmpty. Operand 10499 states and 32435 transitions. [2019-12-07 14:04:39,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:04:39,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:39,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:39,785 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:39,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:39,785 INFO L82 PathProgramCache]: Analyzing trace with hash 1032760116, now seen corresponding path program 1 times [2019-12-07 14:04:39,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:39,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [366209318] [2019-12-07 14:04:39,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:39,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:39,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:39,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [366209318] [2019-12-07 14:04:39,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:39,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:04:39,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828487236] [2019-12-07 14:04:39,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:04:39,859 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:39,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:04:39,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:04:39,860 INFO L87 Difference]: Start difference. First operand 10499 states and 32435 transitions. Second operand 7 states. [2019-12-07 14:04:40,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:40,427 INFO L93 Difference]: Finished difference Result 20888 states and 62932 transitions. [2019-12-07 14:04:40,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 14:04:40,427 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 14:04:40,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:40,447 INFO L225 Difference]: With dead ends: 20888 [2019-12-07 14:04:40,447 INFO L226 Difference]: Without dead ends: 20888 [2019-12-07 14:04:40,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:04:40,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20888 states. [2019-12-07 14:04:40,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20888 to 14396. [2019-12-07 14:04:40,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14396 states. [2019-12-07 14:04:40,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14396 states to 14396 states and 44212 transitions. [2019-12-07 14:04:40,737 INFO L78 Accepts]: Start accepts. Automaton has 14396 states and 44212 transitions. Word has length 66 [2019-12-07 14:04:40,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:40,738 INFO L462 AbstractCegarLoop]: Abstraction has 14396 states and 44212 transitions. [2019-12-07 14:04:40,738 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:04:40,738 INFO L276 IsEmpty]: Start isEmpty. Operand 14396 states and 44212 transitions. [2019-12-07 14:04:40,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:04:40,749 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:40,749 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:40,750 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:40,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:40,750 INFO L82 PathProgramCache]: Analyzing trace with hash 1875695112, now seen corresponding path program 2 times [2019-12-07 14:04:40,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:40,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417657899] [2019-12-07 14:04:40,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:40,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:40,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:40,784 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417657899] [2019-12-07 14:04:40,784 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:40,784 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:40,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [873011180] [2019-12-07 14:04:40,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:04:40,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:40,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:04:40,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:40,785 INFO L87 Difference]: Start difference. First operand 14396 states and 44212 transitions. Second operand 3 states. [2019-12-07 14:04:40,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:40,876 INFO L93 Difference]: Finished difference Result 17598 states and 53928 transitions. [2019-12-07 14:04:40,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:04:40,877 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:04:40,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:40,899 INFO L225 Difference]: With dead ends: 17598 [2019-12-07 14:04:40,900 INFO L226 Difference]: Without dead ends: 17598 [2019-12-07 14:04:40,900 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:40,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17598 states. [2019-12-07 14:04:41,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17598 to 13031. [2019-12-07 14:04:41,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13031 states. [2019-12-07 14:04:41,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13031 states to 13031 states and 40444 transitions. [2019-12-07 14:04:41,119 INFO L78 Accepts]: Start accepts. Automaton has 13031 states and 40444 transitions. Word has length 66 [2019-12-07 14:04:41,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:41,119 INFO L462 AbstractCegarLoop]: Abstraction has 13031 states and 40444 transitions. [2019-12-07 14:04:41,119 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:04:41,119 INFO L276 IsEmpty]: Start isEmpty. Operand 13031 states and 40444 transitions. [2019-12-07 14:04:41,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:41,131 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:41,131 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:41,131 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:41,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:41,132 INFO L82 PathProgramCache]: Analyzing trace with hash 1169670237, now seen corresponding path program 1 times [2019-12-07 14:04:41,132 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:41,132 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663788085] [2019-12-07 14:04:41,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:41,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:41,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:41,315 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1663788085] [2019-12-07 14:04:41,316 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:41,316 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:04:41,316 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1678967214] [2019-12-07 14:04:41,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:04:41,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:41,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:04:41,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:04:41,316 INFO L87 Difference]: Start difference. First operand 13031 states and 40444 transitions. Second operand 12 states. [2019-12-07 14:04:42,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:42,277 INFO L93 Difference]: Finished difference Result 25210 states and 77774 transitions. [2019-12-07 14:04:42,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 14:04:42,278 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 14:04:42,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:42,301 INFO L225 Difference]: With dead ends: 25210 [2019-12-07 14:04:42,301 INFO L226 Difference]: Without dead ends: 21968 [2019-12-07 14:04:42,302 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 276 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=220, Invalid=1040, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 14:04:42,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21968 states. [2019-12-07 14:04:42,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21968 to 17817. [2019-12-07 14:04:42,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17817 states. [2019-12-07 14:04:42,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17817 states to 17817 states and 54965 transitions. [2019-12-07 14:04:42,582 INFO L78 Accepts]: Start accepts. Automaton has 17817 states and 54965 transitions. Word has length 67 [2019-12-07 14:04:42,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:42,582 INFO L462 AbstractCegarLoop]: Abstraction has 17817 states and 54965 transitions. [2019-12-07 14:04:42,583 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:04:42,583 INFO L276 IsEmpty]: Start isEmpty. Operand 17817 states and 54965 transitions. [2019-12-07 14:04:42,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:42,597 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:42,597 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:42,597 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:42,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:42,598 INFO L82 PathProgramCache]: Analyzing trace with hash 791833971, now seen corresponding path program 2 times [2019-12-07 14:04:42,598 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:42,598 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929017387] [2019-12-07 14:04:42,598 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:42,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:42,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:42,782 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1929017387] [2019-12-07 14:04:42,782 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:42,782 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:04:42,782 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [549227674] [2019-12-07 14:04:42,783 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:04:42,783 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:42,783 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:04:42,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:04:42,783 INFO L87 Difference]: Start difference. First operand 17817 states and 54965 transitions. Second operand 11 states. [2019-12-07 14:04:43,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:43,611 INFO L93 Difference]: Finished difference Result 27961 states and 84494 transitions. [2019-12-07 14:04:43,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 14:04:43,611 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:04:43,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:43,631 INFO L225 Difference]: With dead ends: 27961 [2019-12-07 14:04:43,631 INFO L226 Difference]: Without dead ends: 19704 [2019-12-07 14:04:43,632 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=483, Unknown=0, NotChecked=0, Total=600 [2019-12-07 14:04:43,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19704 states. [2019-12-07 14:04:43,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19704 to 17705. [2019-12-07 14:04:43,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17705 states. [2019-12-07 14:04:43,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17705 states to 17705 states and 54110 transitions. [2019-12-07 14:04:43,894 INFO L78 Accepts]: Start accepts. Automaton has 17705 states and 54110 transitions. Word has length 67 [2019-12-07 14:04:43,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:43,894 INFO L462 AbstractCegarLoop]: Abstraction has 17705 states and 54110 transitions. [2019-12-07 14:04:43,895 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:04:43,895 INFO L276 IsEmpty]: Start isEmpty. Operand 17705 states and 54110 transitions. [2019-12-07 14:04:43,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:43,909 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:43,909 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:43,909 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:43,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:43,909 INFO L82 PathProgramCache]: Analyzing trace with hash 709682779, now seen corresponding path program 3 times [2019-12-07 14:04:43,909 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:43,909 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459431506] [2019-12-07 14:04:43,909 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:43,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:44,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:44,042 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [459431506] [2019-12-07 14:04:44,042 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:44,042 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:04:44,042 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294433039] [2019-12-07 14:04:44,042 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:04:44,042 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:44,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:04:44,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:04:44,043 INFO L87 Difference]: Start difference. First operand 17705 states and 54110 transitions. Second operand 11 states. [2019-12-07 14:04:46,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:46,991 INFO L93 Difference]: Finished difference Result 39379 states and 121108 transitions. [2019-12-07 14:04:46,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 14:04:46,992 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:04:46,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:47,022 INFO L225 Difference]: With dead ends: 39379 [2019-12-07 14:04:47,023 INFO L226 Difference]: Without dead ends: 26801 [2019-12-07 14:04:47,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=180, Invalid=750, Unknown=0, NotChecked=0, Total=930 [2019-12-07 14:04:47,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26801 states. [2019-12-07 14:04:47,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26801 to 19292. [2019-12-07 14:04:47,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19292 states. [2019-12-07 14:04:47,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19292 states to 19292 states and 58631 transitions. [2019-12-07 14:04:47,354 INFO L78 Accepts]: Start accepts. Automaton has 19292 states and 58631 transitions. Word has length 67 [2019-12-07 14:04:47,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:47,354 INFO L462 AbstractCegarLoop]: Abstraction has 19292 states and 58631 transitions. [2019-12-07 14:04:47,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:04:47,355 INFO L276 IsEmpty]: Start isEmpty. Operand 19292 states and 58631 transitions. [2019-12-07 14:04:47,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:47,371 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:47,371 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:47,372 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:47,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:47,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1574036275, now seen corresponding path program 4 times [2019-12-07 14:04:47,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:47,372 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670955013] [2019-12-07 14:04:47,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:47,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:47,666 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:47,666 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670955013] [2019-12-07 14:04:47,666 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:47,667 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:04:47,667 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [296464956] [2019-12-07 14:04:47,667 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:04:47,667 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:47,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:04:47,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:04:47,667 INFO L87 Difference]: Start difference. First operand 19292 states and 58631 transitions. Second operand 15 states. [2019-12-07 14:04:53,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:53,134 INFO L93 Difference]: Finished difference Result 55720 states and 166369 transitions. [2019-12-07 14:04:53,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 79 states. [2019-12-07 14:04:53,135 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 14:04:53,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:53,178 INFO L225 Difference]: With dead ends: 55720 [2019-12-07 14:04:53,178 INFO L226 Difference]: Without dead ends: 40695 [2019-12-07 14:04:53,180 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2170 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=977, Invalid=5503, Unknown=0, NotChecked=0, Total=6480 [2019-12-07 14:04:53,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40695 states. [2019-12-07 14:04:53,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40695 to 20224. [2019-12-07 14:04:53,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20224 states. [2019-12-07 14:04:53,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20224 states to 20224 states and 61109 transitions. [2019-12-07 14:04:53,600 INFO L78 Accepts]: Start accepts. Automaton has 20224 states and 61109 transitions. Word has length 67 [2019-12-07 14:04:53,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:53,600 INFO L462 AbstractCegarLoop]: Abstraction has 20224 states and 61109 transitions. [2019-12-07 14:04:53,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:04:53,600 INFO L276 IsEmpty]: Start isEmpty. Operand 20224 states and 61109 transitions. [2019-12-07 14:04:53,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:53,619 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:53,619 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:53,619 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:53,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:53,619 INFO L82 PathProgramCache]: Analyzing trace with hash -140953989, now seen corresponding path program 5 times [2019-12-07 14:04:53,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:53,620 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1639710248] [2019-12-07 14:04:53,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:53,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:53,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:53,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1639710248] [2019-12-07 14:04:53,915 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:53,915 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:04:53,915 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121897623] [2019-12-07 14:04:53,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:04:53,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:53,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:04:53,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:04:53,915 INFO L87 Difference]: Start difference. First operand 20224 states and 61109 transitions. Second operand 16 states. [2019-12-07 14:04:59,659 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 21 [2019-12-07 14:05:01,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:01,531 INFO L93 Difference]: Finished difference Result 43289 states and 128309 transitions. [2019-12-07 14:05:01,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 14:05:01,531 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 14:05:01,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:01,567 INFO L225 Difference]: With dead ends: 43289 [2019-12-07 14:05:01,567 INFO L226 Difference]: Without dead ends: 37103 [2019-12-07 14:05:01,569 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1512 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=791, Invalid=4179, Unknown=0, NotChecked=0, Total=4970 [2019-12-07 14:05:01,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37103 states. [2019-12-07 14:05:01,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37103 to 19836. [2019-12-07 14:05:01,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19836 states. [2019-12-07 14:05:01,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19836 states to 19836 states and 59969 transitions. [2019-12-07 14:05:01,950 INFO L78 Accepts]: Start accepts. Automaton has 19836 states and 59969 transitions. Word has length 67 [2019-12-07 14:05:01,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:01,950 INFO L462 AbstractCegarLoop]: Abstraction has 19836 states and 59969 transitions. [2019-12-07 14:05:01,950 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:05:01,950 INFO L276 IsEmpty]: Start isEmpty. Operand 19836 states and 59969 transitions. [2019-12-07 14:05:01,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:05:01,968 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:01,968 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:01,968 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:01,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:01,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1709159453, now seen corresponding path program 6 times [2019-12-07 14:05:01,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:01,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844801317] [2019-12-07 14:05:01,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:01,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:02,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:02,235 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1844801317] [2019-12-07 14:05:02,236 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:02,236 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:05:02,236 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [940800497] [2019-12-07 14:05:02,236 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:05:02,236 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:02,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:05:02,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:05:02,236 INFO L87 Difference]: Start difference. First operand 19836 states and 59969 transitions. Second operand 16 states. [2019-12-07 14:05:03,039 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 39 [2019-12-07 14:05:04,509 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 35 [2019-12-07 14:05:05,608 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 33 [2019-12-07 14:05:11,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:11,528 INFO L93 Difference]: Finished difference Result 39544 states and 117716 transitions. [2019-12-07 14:05:11,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2019-12-07 14:05:11,529 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 14:05:11,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:11,572 INFO L225 Difference]: With dead ends: 39544 [2019-12-07 14:05:11,573 INFO L226 Difference]: Without dead ends: 38851 [2019-12-07 14:05:11,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2059 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=954, Invalid=5366, Unknown=0, NotChecked=0, Total=6320 [2019-12-07 14:05:11,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38851 states. [2019-12-07 14:05:11,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38851 to 19516. [2019-12-07 14:05:11,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19516 states. [2019-12-07 14:05:12,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19516 states to 19516 states and 59101 transitions. [2019-12-07 14:05:12,015 INFO L78 Accepts]: Start accepts. Automaton has 19516 states and 59101 transitions. Word has length 67 [2019-12-07 14:05:12,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:12,015 INFO L462 AbstractCegarLoop]: Abstraction has 19516 states and 59101 transitions. [2019-12-07 14:05:12,015 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:05:12,015 INFO L276 IsEmpty]: Start isEmpty. Operand 19516 states and 59101 transitions. [2019-12-07 14:05:12,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:05:12,031 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:12,032 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:12,032 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:12,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:12,032 INFO L82 PathProgramCache]: Analyzing trace with hash -2140478285, now seen corresponding path program 7 times [2019-12-07 14:05:12,032 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:12,032 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600970372] [2019-12-07 14:05:12,032 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:12,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:12,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:12,280 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [600970372] [2019-12-07 14:05:12,280 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:12,280 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:05:12,280 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627533302] [2019-12-07 14:05:12,281 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:05:12,281 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:12,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:05:12,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:05:12,281 INFO L87 Difference]: Start difference. First operand 19516 states and 59101 transitions. Second operand 15 states. [2019-12-07 14:05:16,318 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 33 [2019-12-07 14:05:18,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:18,160 INFO L93 Difference]: Finished difference Result 49395 states and 147718 transitions. [2019-12-07 14:05:18,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2019-12-07 14:05:18,161 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 14:05:18,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:18,213 INFO L225 Difference]: With dead ends: 49395 [2019-12-07 14:05:18,213 INFO L226 Difference]: Without dead ends: 37324 [2019-12-07 14:05:18,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1711 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=813, Invalid=4589, Unknown=0, NotChecked=0, Total=5402 [2019-12-07 14:05:18,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37324 states. [2019-12-07 14:05:18,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37324 to 18662. [2019-12-07 14:05:18,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18662 states. [2019-12-07 14:05:18,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18662 states to 18662 states and 56743 transitions. [2019-12-07 14:05:18,624 INFO L78 Accepts]: Start accepts. Automaton has 18662 states and 56743 transitions. Word has length 67 [2019-12-07 14:05:18,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:18,624 INFO L462 AbstractCegarLoop]: Abstraction has 18662 states and 56743 transitions. [2019-12-07 14:05:18,624 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:05:18,624 INFO L276 IsEmpty]: Start isEmpty. Operand 18662 states and 56743 transitions. [2019-12-07 14:05:18,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:05:18,641 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:18,641 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:18,641 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:18,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:18,641 INFO L82 PathProgramCache]: Analyzing trace with hash -394449869, now seen corresponding path program 8 times [2019-12-07 14:05:18,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:18,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178685932] [2019-12-07 14:05:18,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:18,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:18,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:18,982 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1178685932] [2019-12-07 14:05:18,982 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:18,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:05:18,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302441604] [2019-12-07 14:05:18,982 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:05:18,983 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:18,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:05:18,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:05:18,983 INFO L87 Difference]: Start difference. First operand 18662 states and 56743 transitions. Second operand 16 states. [2019-12-07 14:05:23,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:23,839 INFO L93 Difference]: Finished difference Result 38665 states and 116051 transitions. [2019-12-07 14:05:23,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 14:05:23,839 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 14:05:23,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:23,881 INFO L225 Difference]: With dead ends: 38665 [2019-12-07 14:05:23,881 INFO L226 Difference]: Without dead ends: 37272 [2019-12-07 14:05:23,883 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1392 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=754, Invalid=3938, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 14:05:23,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37272 states. [2019-12-07 14:05:24,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37272 to 18662. [2019-12-07 14:05:24,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18662 states. [2019-12-07 14:05:24,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18662 states to 18662 states and 56725 transitions. [2019-12-07 14:05:24,284 INFO L78 Accepts]: Start accepts. Automaton has 18662 states and 56725 transitions. Word has length 67 [2019-12-07 14:05:24,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:24,284 INFO L462 AbstractCegarLoop]: Abstraction has 18662 states and 56725 transitions. [2019-12-07 14:05:24,284 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:05:24,285 INFO L276 IsEmpty]: Start isEmpty. Operand 18662 states and 56725 transitions. [2019-12-07 14:05:24,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:05:24,301 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:24,301 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:24,301 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:24,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:24,302 INFO L82 PathProgramCache]: Analyzing trace with hash -1284484685, now seen corresponding path program 9 times [2019-12-07 14:05:24,302 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:24,302 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956349969] [2019-12-07 14:05:24,302 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:24,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:24,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:24,408 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [956349969] [2019-12-07 14:05:24,408 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:24,408 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:05:24,408 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118993564] [2019-12-07 14:05:24,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:05:24,408 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:24,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:05:24,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:05:24,409 INFO L87 Difference]: Start difference. First operand 18662 states and 56725 transitions. Second operand 11 states. [2019-12-07 14:05:25,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:25,183 INFO L93 Difference]: Finished difference Result 42374 states and 128690 transitions. [2019-12-07 14:05:25,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 14:05:25,183 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:05:25,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:25,211 INFO L225 Difference]: With dead ends: 42374 [2019-12-07 14:05:25,211 INFO L226 Difference]: Without dead ends: 27756 [2019-12-07 14:05:25,212 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 297 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=248, Invalid=1012, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 14:05:25,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27756 states. [2019-12-07 14:05:25,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27756 to 14901. [2019-12-07 14:05:25,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14901 states. [2019-12-07 14:05:25,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14901 states to 14901 states and 45522 transitions. [2019-12-07 14:05:25,505 INFO L78 Accepts]: Start accepts. Automaton has 14901 states and 45522 transitions. Word has length 67 [2019-12-07 14:05:25,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:25,505 INFO L462 AbstractCegarLoop]: Abstraction has 14901 states and 45522 transitions. [2019-12-07 14:05:25,505 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:05:25,505 INFO L276 IsEmpty]: Start isEmpty. Operand 14901 states and 45522 transitions. [2019-12-07 14:05:25,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:05:25,518 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:25,518 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:25,518 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:25,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:25,519 INFO L82 PathProgramCache]: Analyzing trace with hash 656134515, now seen corresponding path program 10 times [2019-12-07 14:05:25,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:25,519 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502234843] [2019-12-07 14:05:25,519 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:25,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:05:25,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:05:25,582 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:05:25,583 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:05:25,585 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~a$r_buff1_thd0~0_203 0) (= 0 v_~a$r_buff1_thd1~0_191) (= v_~z~0_36 0) (= 0 |v_ULTIMATE.start_main_~#t281~0.offset_26|) (= v_~a$r_buff0_thd0~0_228 0) (= 0 v_~a$r_buff0_thd1~0_317) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~a$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_42 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t281~0.base_37|) (= v_~a$r_buff0_thd3~0_430 0) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= (select .cse0 |v_ULTIMATE.start_main_~#t281~0.base_37|) 0) (= v_~__unbuffered_cnt~0_111 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x~0_176) (= v_~__unbuffered_p1_EBX~0_55 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t281~0.base_37| 4)) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t281~0.base_37| 1)) (= 0 |v_#NULL.base_4|) (= v_~a$mem_tmp~0_16 0) (= 0 v_~a$w_buff0_used~0_889) (= v_~a$w_buff0~0_416 0) (= v_~a$r_buff1_thd3~0_333 0) (= 0 v_~a$w_buff1_used~0_596) (= |v_#NULL.offset_4| 0) (= 0 v_~a$w_buff1~0_333) (= 0 v_~a$r_buff1_thd2~0_185) (= v_~a~0_191 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~weak$$choice0~0_13) (= v_~weak$$choice2~0_131 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t281~0.base_37| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t281~0.base_37|) |v_ULTIMATE.start_main_~#t281~0.offset_26| 0)) |v_#memory_int_23|) (= v_~y~0_31 0) (= 0 v_~a$read_delayed~0_8) (= v_~a$flush_delayed~0_26 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t282~0.base=|v_ULTIMATE.start_main_~#t282~0.base_38|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_228, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_127|, ~a~0=v_~a~0_191, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ULTIMATE.start_main_~#t283~0.offset=|v_ULTIMATE.start_main_~#t283~0.offset_18|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_333, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_889, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_317, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_416, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_203, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, ~x~0=v_~x~0_176, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_67|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~a$w_buff1~0=v_~a$w_buff1~0_333, ULTIMATE.start_main_~#t283~0.base=|v_ULTIMATE.start_main_~#t283~0.base_30|, ~y~0=v_~y~0_31, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_55, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_191, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_430, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t282~0.offset=|v_ULTIMATE.start_main_~#t282~0.offset_26|, ULTIMATE.start_main_~#t281~0.base=|v_ULTIMATE.start_main_~#t281~0.base_37|, ~a$flush_delayed~0=v_~a$flush_delayed~0_26, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_36, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_596, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t281~0.offset=|v_ULTIMATE.start_main_~#t281~0.offset_26|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t282~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t283~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t283~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t282~0.offset, ULTIMATE.start_main_~#t281~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t281~0.offset] because there is no mapped edge [2019-12-07 14:05:25,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t282~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t282~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t282~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t282~0.base_13|) |v_ULTIMATE.start_main_~#t282~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t282~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t282~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t282~0.offset_11|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t282~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t282~0.base=|v_ULTIMATE.start_main_~#t282~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t282~0.offset=|v_ULTIMATE.start_main_~#t282~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t282~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t282~0.offset] because there is no mapped edge [2019-12-07 14:05:25,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L750: Formula: (and (= v_~a$r_buff0_thd1~0_28 v_~a$r_buff1_thd1~0_23) (= v_~a$r_buff0_thd2~0_20 v_~a$r_buff1_thd2~0_16) (= v_~a$r_buff0_thd0~0_18 v_~a$r_buff1_thd0~0_17) (= v_~a$r_buff0_thd1~0_27 1) (= 1 v_~x~0_7) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~a$r_buff0_thd3~0_73 v_~a$r_buff1_thd3~0_40)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_28, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18} OutVars{~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_23, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_40, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_16, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_17, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_27, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18, ~x~0=v_~x~0_7} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 14:05:25,587 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L776-2-->L776-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-698442741 256))) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-698442741 256) 0))) (or (and (= ~a$w_buff1~0_In-698442741 |P1Thread1of1ForFork2_#t~ite9_Out-698442741|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a~0_In-698442741 |P1Thread1of1ForFork2_#t~ite9_Out-698442741|)))) InVars {~a~0=~a~0_In-698442741, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} OutVars{~a~0=~a~0_In-698442741, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-698442741|, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:05:25,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_47) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_47, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 14:05:25,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In857221944 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In857221944 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out857221944| 0)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out857221944| ~a$w_buff0_used~0_In857221944) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In857221944, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In857221944} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out857221944|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In857221944, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In857221944} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:05:25,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-732052024 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-732052024 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd1~0_In-732052024 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-732052024 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-732052024|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-732052024 |P0Thread1of1ForFork1_#t~ite6_Out-732052024|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-732052024, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-732052024} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-732052024|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-732052024, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-732052024} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:05:25,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L753-->L754: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_In-1350836257 ~a$r_buff0_thd1~0_Out-1350836257)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1350836257 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1350836257 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-1350836257) (not .cse0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1350836257} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1350836257|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1350836257} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:05:25,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L754-->L754-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In1196256965 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In1196256965 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In1196256965 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1196256965 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1196256965| ~a$r_buff1_thd1~0_In1196256965) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1196256965| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1196256965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1196256965} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1196256965|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1196256965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1196256965} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:05:25,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_148 |v_P0Thread1of1ForFork1_#t~ite8_50|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_148, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:05:25,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L837-1-->L839: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t283~0.base_12|) 0) (= |v_ULTIMATE.start_main_~#t283~0.offset_10| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t283~0.base_12| 4) |v_#length_15|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t283~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t283~0.base_12| 0)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t283~0.base_12| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t283~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t283~0.base_12|) |v_ULTIMATE.start_main_~#t283~0.offset_10| 2)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t283~0.base=|v_ULTIMATE.start_main_~#t283~0.base_12|, #length=|v_#length_15|, ULTIMATE.start_main_~#t283~0.offset=|v_ULTIMATE.start_main_~#t283~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t283~0.base, #length, ULTIMATE.start_main_~#t283~0.offset] because there is no mapped edge [2019-12-07 14:05:25,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2128766623 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out-2128766623| ~a$w_buff0~0_In-2128766623) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2128766623 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-2128766623 256)) (and (= (mod ~a$w_buff1_used~0_In-2128766623 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In-2128766623 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite21_Out-2128766623| |P2Thread1of1ForFork0_#t~ite20_Out-2128766623|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-2128766623| ~a$w_buff0~0_In-2128766623) (= |P2Thread1of1ForFork0_#t~ite20_In-2128766623| |P2Thread1of1ForFork0_#t~ite20_Out-2128766623|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-2128766623, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-2128766623|, ~weak$$choice2~0=~weak$$choice2~0_In-2128766623} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-2128766623|, ~a$w_buff0~0=~a$w_buff0~0_In-2128766623, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-2128766623|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623, ~weak$$choice2~0=~weak$$choice2~0_In-2128766623} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 14:05:25,591 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L803-->L803-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-954633407 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-954633407 256)))) (or (and .cse0 (= (mod ~a$w_buff1_used~0_In-954633407 256) 0)) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-954633407 256))) (= (mod ~a$w_buff0_used~0_In-954633407 256) 0))) (= ~a$w_buff0_used~0_In-954633407 |P2Thread1of1ForFork0_#t~ite26_Out-954633407|) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-954633407| |P2Thread1of1ForFork0_#t~ite27_Out-954633407|)) (and (= ~a$w_buff0_used~0_In-954633407 |P2Thread1of1ForFork0_#t~ite27_Out-954633407|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In-954633407| |P2Thread1of1ForFork0_#t~ite26_Out-954633407|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-954633407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-954633407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-954633407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-954633407, ~weak$$choice2~0=~weak$$choice2~0_In-954633407} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-954633407|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-954633407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-954633407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-954633407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-954633407, ~weak$$choice2~0=~weak$$choice2~0_In-954633407} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 14:05:25,591 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1483486921 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite30_Out1483486921| ~a$w_buff1_used~0_In1483486921) (= |P2Thread1of1ForFork0_#t~ite29_In1483486921| |P2Thread1of1ForFork0_#t~ite29_Out1483486921|)) (and (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1483486921 256)))) (or (= (mod ~a$w_buff0_used~0_In1483486921 256) 0) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1483486921 256) 0)) (and (= (mod ~a$w_buff1_used~0_In1483486921 256) 0) .cse1))) .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out1483486921| ~a$w_buff1_used~0_In1483486921) (= |P2Thread1of1ForFork0_#t~ite30_Out1483486921| |P2Thread1of1ForFork0_#t~ite29_Out1483486921|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1483486921, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483486921, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483486921, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921, ~weak$$choice2~0=~weak$$choice2~0_In1483486921, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1483486921|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1483486921, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483486921, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483486921, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1483486921|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1483486921|, ~weak$$choice2~0=~weak$$choice2~0_In1483486921} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 14:05:25,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L805-->L806: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~a$r_buff0_thd3~0_136 v_~a$r_buff0_thd3~0_135)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_135, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:05:25,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_12 0) (= v_~a~0_57 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_57, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 14:05:25,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L812-2-->L812-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In620891655 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In620891655 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out620891655| ~a$w_buff1~0_In620891655)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out620891655| ~a~0_In620891655)))) InVars {~a~0=~a~0_In620891655, ~a$w_buff1~0=~a$w_buff1~0_In620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In620891655, ~a$w_buff1_used~0=~a$w_buff1_used~0_In620891655} OutVars{~a~0=~a~0_In620891655, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out620891655|, ~a$w_buff1~0=~a$w_buff1~0_In620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In620891655, ~a$w_buff1_used~0=~a$w_buff1_used~0_In620891655} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:05:25,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L812-4-->L813: Formula: (= v_~a~0_20 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_20, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:05:25,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-242601350 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-242601350 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-242601350| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-242601350 |P2Thread1of1ForFork0_#t~ite40_Out-242601350|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-242601350|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:05:25,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd3~0_In-1862954145 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1862954145 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1862954145 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1862954145 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1862954145| ~a$w_buff1_used~0_In-1862954145)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1862954145|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1862954145|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:05:25,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1439427895 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1439427895 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1439427895| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1439427895| ~a$r_buff0_thd3~0_In1439427895) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1439427895|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:05:25,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In542272179 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In542272179 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In542272179 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In542272179 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out542272179|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In542272179 |P2Thread1of1ForFork0_#t~ite43_Out542272179|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In542272179, ~a$w_buff0_used~0=~a$w_buff0_used~0_In542272179, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In542272179, ~a$w_buff1_used~0=~a$w_buff1_used~0_In542272179} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out542272179|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In542272179, ~a$w_buff0_used~0=~a$w_buff0_used~0_In542272179, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In542272179, ~a$w_buff1_used~0=~a$w_buff1_used~0_In542272179} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:05:25,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_122 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_122, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:05:25,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1099508783 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1099508783 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1099508783| ~a$w_buff0_used~0_In1099508783) (or .cse0 .cse1)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out1099508783| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1099508783|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:05:25,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-864958858 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-864958858 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-864958858 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-864958858 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-864958858| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-864958858| ~a$w_buff1_used~0_In-864958858) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-864958858, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-864958858, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-864958858, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-864958858} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-864958858, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-864958858, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-864958858, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-864958858|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-864958858} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:05:25,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1632737010 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1632737010 256)))) (or (and (= ~a$r_buff0_thd2~0_In-1632737010 |P1Thread1of1ForFork2_#t~ite13_Out-1632737010|) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1632737010| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1632737010, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1632737010} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1632737010, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1632737010, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1632737010|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:05:25,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-2030690428 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-2030690428 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-2030690428 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In-2030690428 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out-2030690428| ~a$r_buff1_thd2~0_In-2030690428) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-2030690428| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2030690428, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2030690428, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2030690428|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:05:25,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_79) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_79, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:05:25,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L839-1-->L845: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:05:25,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L845-2-->L845-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-222160885 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-222160885 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-222160885| ~a~0_In-222160885)) (and (not .cse1) (= ~a$w_buff1~0_In-222160885 |ULTIMATE.start_main_#t~ite47_Out-222160885|) (not .cse0)))) InVars {~a~0=~a~0_In-222160885, ~a$w_buff1~0=~a$w_buff1~0_In-222160885, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-222160885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-222160885} OutVars{~a~0=~a~0_In-222160885, ~a$w_buff1~0=~a$w_buff1~0_In-222160885, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-222160885|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-222160885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-222160885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 14:05:25,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L845-4-->L846: Formula: (= v_~a~0_30 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_30, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:05:25,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1368432698 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1368432698 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1368432698| ~a$w_buff0_used~0_In1368432698) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out1368432698| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1368432698|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:05:25,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L847-->L847-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1841604176 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1841604176 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1841604176 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In1841604176 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1841604176 |ULTIMATE.start_main_#t~ite50_Out1841604176|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1841604176|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1841604176|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:05:25,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-1127002274 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-1127002274 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1127002274| 0)) (and (= ~a$r_buff0_thd0~0_In-1127002274 |ULTIMATE.start_main_#t~ite51_Out-1127002274|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1127002274, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1127002274} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1127002274|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1127002274, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1127002274} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:05:25,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1870467941 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1870467941 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-1870467941 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1870467941 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd0~0_In-1870467941 |ULTIMATE.start_main_#t~ite52_Out-1870467941|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1870467941|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1870467941|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:05:25,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~a$r_buff1_thd0~0_158 |v_ULTIMATE.start_main_#t~ite52_40|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_18 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 2 v_~x~0_125) (= v_~__unbuffered_p1_EBX~0_21 0) (= v_~__unbuffered_p2_EBX~0_24 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_158, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:05:25,650 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:05:25 BasicIcfg [2019-12-07 14:05:25,650 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:05:25,650 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:05:25,651 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:05:25,651 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:05:25,651 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:01:45" (3/4) ... [2019-12-07 14:05:25,652 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:05:25,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~a$r_buff1_thd0~0_203 0) (= 0 v_~a$r_buff1_thd1~0_191) (= v_~z~0_36 0) (= 0 |v_ULTIMATE.start_main_~#t281~0.offset_26|) (= v_~a$r_buff0_thd0~0_228 0) (= 0 v_~a$r_buff0_thd1~0_317) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~a$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_42 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t281~0.base_37|) (= v_~a$r_buff0_thd3~0_430 0) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= (select .cse0 |v_ULTIMATE.start_main_~#t281~0.base_37|) 0) (= v_~__unbuffered_cnt~0_111 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x~0_176) (= v_~__unbuffered_p1_EBX~0_55 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t281~0.base_37| 4)) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t281~0.base_37| 1)) (= 0 |v_#NULL.base_4|) (= v_~a$mem_tmp~0_16 0) (= 0 v_~a$w_buff0_used~0_889) (= v_~a$w_buff0~0_416 0) (= v_~a$r_buff1_thd3~0_333 0) (= 0 v_~a$w_buff1_used~0_596) (= |v_#NULL.offset_4| 0) (= 0 v_~a$w_buff1~0_333) (= 0 v_~a$r_buff1_thd2~0_185) (= v_~a~0_191 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~weak$$choice0~0_13) (= v_~weak$$choice2~0_131 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t281~0.base_37| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t281~0.base_37|) |v_ULTIMATE.start_main_~#t281~0.offset_26| 0)) |v_#memory_int_23|) (= v_~y~0_31 0) (= 0 v_~a$read_delayed~0_8) (= v_~a$flush_delayed~0_26 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t282~0.base=|v_ULTIMATE.start_main_~#t282~0.base_38|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_228, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_127|, ~a~0=v_~a~0_191, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ULTIMATE.start_main_~#t283~0.offset=|v_ULTIMATE.start_main_~#t283~0.offset_18|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_333, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_889, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_317, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_416, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_203, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, ~x~0=v_~x~0_176, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_67|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~a$w_buff1~0=v_~a$w_buff1~0_333, ULTIMATE.start_main_~#t283~0.base=|v_ULTIMATE.start_main_~#t283~0.base_30|, ~y~0=v_~y~0_31, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_55, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_191, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_430, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t282~0.offset=|v_ULTIMATE.start_main_~#t282~0.offset_26|, ULTIMATE.start_main_~#t281~0.base=|v_ULTIMATE.start_main_~#t281~0.base_37|, ~a$flush_delayed~0=v_~a$flush_delayed~0_26, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_36, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_596, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t281~0.offset=|v_ULTIMATE.start_main_~#t281~0.offset_26|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t282~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t283~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t283~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t282~0.offset, ULTIMATE.start_main_~#t281~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t281~0.offset] because there is no mapped edge [2019-12-07 14:05:25,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t282~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t282~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t282~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t282~0.base_13|) |v_ULTIMATE.start_main_~#t282~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t282~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t282~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t282~0.offset_11|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t282~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t282~0.base=|v_ULTIMATE.start_main_~#t282~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t282~0.offset=|v_ULTIMATE.start_main_~#t282~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t282~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t282~0.offset] because there is no mapped edge [2019-12-07 14:05:25,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L750: Formula: (and (= v_~a$r_buff0_thd1~0_28 v_~a$r_buff1_thd1~0_23) (= v_~a$r_buff0_thd2~0_20 v_~a$r_buff1_thd2~0_16) (= v_~a$r_buff0_thd0~0_18 v_~a$r_buff1_thd0~0_17) (= v_~a$r_buff0_thd1~0_27 1) (= 1 v_~x~0_7) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~a$r_buff0_thd3~0_73 v_~a$r_buff1_thd3~0_40)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_28, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18} OutVars{~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_23, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_40, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_16, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_17, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_27, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18, ~x~0=v_~x~0_7} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 14:05:25,655 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L776-2-->L776-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-698442741 256))) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-698442741 256) 0))) (or (and (= ~a$w_buff1~0_In-698442741 |P1Thread1of1ForFork2_#t~ite9_Out-698442741|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a~0_In-698442741 |P1Thread1of1ForFork2_#t~ite9_Out-698442741|)))) InVars {~a~0=~a~0_In-698442741, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} OutVars{~a~0=~a~0_In-698442741, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-698442741|, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:05:25,655 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_47) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_47, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 14:05:25,655 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In857221944 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In857221944 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out857221944| 0)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out857221944| ~a$w_buff0_used~0_In857221944) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In857221944, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In857221944} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out857221944|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In857221944, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In857221944} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:05:25,655 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-732052024 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-732052024 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd1~0_In-732052024 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-732052024 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-732052024|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-732052024 |P0Thread1of1ForFork1_#t~ite6_Out-732052024|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-732052024, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-732052024} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-732052024|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-732052024, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-732052024} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:05:25,656 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L753-->L754: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_In-1350836257 ~a$r_buff0_thd1~0_Out-1350836257)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1350836257 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1350836257 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-1350836257) (not .cse0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1350836257} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1350836257|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1350836257} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:05:25,656 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L754-->L754-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In1196256965 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In1196256965 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In1196256965 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1196256965 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1196256965| ~a$r_buff1_thd1~0_In1196256965) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1196256965| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1196256965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1196256965} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1196256965|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1196256965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1196256965} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:05:25,656 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_148 |v_P0Thread1of1ForFork1_#t~ite8_50|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_148, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:05:25,656 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L837-1-->L839: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t283~0.base_12|) 0) (= |v_ULTIMATE.start_main_~#t283~0.offset_10| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t283~0.base_12| 4) |v_#length_15|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t283~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t283~0.base_12| 0)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t283~0.base_12| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t283~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t283~0.base_12|) |v_ULTIMATE.start_main_~#t283~0.offset_10| 2)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t283~0.base=|v_ULTIMATE.start_main_~#t283~0.base_12|, #length=|v_#length_15|, ULTIMATE.start_main_~#t283~0.offset=|v_ULTIMATE.start_main_~#t283~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t283~0.base, #length, ULTIMATE.start_main_~#t283~0.offset] because there is no mapped edge [2019-12-07 14:05:25,657 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2128766623 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out-2128766623| ~a$w_buff0~0_In-2128766623) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2128766623 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-2128766623 256)) (and (= (mod ~a$w_buff1_used~0_In-2128766623 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In-2128766623 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite21_Out-2128766623| |P2Thread1of1ForFork0_#t~ite20_Out-2128766623|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-2128766623| ~a$w_buff0~0_In-2128766623) (= |P2Thread1of1ForFork0_#t~ite20_In-2128766623| |P2Thread1of1ForFork0_#t~ite20_Out-2128766623|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-2128766623, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-2128766623|, ~weak$$choice2~0=~weak$$choice2~0_In-2128766623} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-2128766623|, ~a$w_buff0~0=~a$w_buff0~0_In-2128766623, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-2128766623|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623, ~weak$$choice2~0=~weak$$choice2~0_In-2128766623} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 14:05:25,658 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L803-->L803-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-954633407 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-954633407 256)))) (or (and .cse0 (= (mod ~a$w_buff1_used~0_In-954633407 256) 0)) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-954633407 256))) (= (mod ~a$w_buff0_used~0_In-954633407 256) 0))) (= ~a$w_buff0_used~0_In-954633407 |P2Thread1of1ForFork0_#t~ite26_Out-954633407|) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-954633407| |P2Thread1of1ForFork0_#t~ite27_Out-954633407|)) (and (= ~a$w_buff0_used~0_In-954633407 |P2Thread1of1ForFork0_#t~ite27_Out-954633407|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In-954633407| |P2Thread1of1ForFork0_#t~ite26_Out-954633407|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-954633407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-954633407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-954633407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-954633407, ~weak$$choice2~0=~weak$$choice2~0_In-954633407} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-954633407|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-954633407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-954633407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-954633407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-954633407, ~weak$$choice2~0=~weak$$choice2~0_In-954633407} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 14:05:25,659 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1483486921 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite30_Out1483486921| ~a$w_buff1_used~0_In1483486921) (= |P2Thread1of1ForFork0_#t~ite29_In1483486921| |P2Thread1of1ForFork0_#t~ite29_Out1483486921|)) (and (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1483486921 256)))) (or (= (mod ~a$w_buff0_used~0_In1483486921 256) 0) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1483486921 256) 0)) (and (= (mod ~a$w_buff1_used~0_In1483486921 256) 0) .cse1))) .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out1483486921| ~a$w_buff1_used~0_In1483486921) (= |P2Thread1of1ForFork0_#t~ite30_Out1483486921| |P2Thread1of1ForFork0_#t~ite29_Out1483486921|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1483486921, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483486921, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483486921, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921, ~weak$$choice2~0=~weak$$choice2~0_In1483486921, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1483486921|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1483486921, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483486921, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483486921, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1483486921|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1483486921|, ~weak$$choice2~0=~weak$$choice2~0_In1483486921} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 14:05:25,659 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L805-->L806: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~a$r_buff0_thd3~0_136 v_~a$r_buff0_thd3~0_135)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_135, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:05:25,660 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_12 0) (= v_~a~0_57 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_57, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 14:05:25,660 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L812-2-->L812-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In620891655 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In620891655 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out620891655| ~a$w_buff1~0_In620891655)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out620891655| ~a~0_In620891655)))) InVars {~a~0=~a~0_In620891655, ~a$w_buff1~0=~a$w_buff1~0_In620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In620891655, ~a$w_buff1_used~0=~a$w_buff1_used~0_In620891655} OutVars{~a~0=~a~0_In620891655, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out620891655|, ~a$w_buff1~0=~a$w_buff1~0_In620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In620891655, ~a$w_buff1_used~0=~a$w_buff1_used~0_In620891655} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:05:25,660 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L812-4-->L813: Formula: (= v_~a~0_20 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_20, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:05:25,660 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-242601350 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-242601350 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-242601350| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-242601350 |P2Thread1of1ForFork0_#t~ite40_Out-242601350|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-242601350|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:05:25,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd3~0_In-1862954145 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1862954145 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1862954145 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1862954145 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1862954145| ~a$w_buff1_used~0_In-1862954145)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1862954145|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1862954145|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:05:25,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1439427895 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1439427895 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1439427895| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1439427895| ~a$r_buff0_thd3~0_In1439427895) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1439427895|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:05:25,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In542272179 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In542272179 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In542272179 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In542272179 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out542272179|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In542272179 |P2Thread1of1ForFork0_#t~ite43_Out542272179|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In542272179, ~a$w_buff0_used~0=~a$w_buff0_used~0_In542272179, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In542272179, ~a$w_buff1_used~0=~a$w_buff1_used~0_In542272179} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out542272179|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In542272179, ~a$w_buff0_used~0=~a$w_buff0_used~0_In542272179, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In542272179, ~a$w_buff1_used~0=~a$w_buff1_used~0_In542272179} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:05:25,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_122 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_122, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:05:25,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1099508783 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1099508783 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1099508783| ~a$w_buff0_used~0_In1099508783) (or .cse0 .cse1)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out1099508783| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1099508783|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:05:25,662 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-864958858 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-864958858 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-864958858 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-864958858 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-864958858| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-864958858| ~a$w_buff1_used~0_In-864958858) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-864958858, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-864958858, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-864958858, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-864958858} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-864958858, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-864958858, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-864958858, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-864958858|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-864958858} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:05:25,662 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1632737010 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1632737010 256)))) (or (and (= ~a$r_buff0_thd2~0_In-1632737010 |P1Thread1of1ForFork2_#t~ite13_Out-1632737010|) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1632737010| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1632737010, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1632737010} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1632737010, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1632737010, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1632737010|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:05:25,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-2030690428 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-2030690428 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-2030690428 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In-2030690428 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out-2030690428| ~a$r_buff1_thd2~0_In-2030690428) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-2030690428| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2030690428, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2030690428, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2030690428|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:05:25,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_79) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_79, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:05:25,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L839-1-->L845: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:05:25,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L845-2-->L845-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-222160885 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-222160885 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-222160885| ~a~0_In-222160885)) (and (not .cse1) (= ~a$w_buff1~0_In-222160885 |ULTIMATE.start_main_#t~ite47_Out-222160885|) (not .cse0)))) InVars {~a~0=~a~0_In-222160885, ~a$w_buff1~0=~a$w_buff1~0_In-222160885, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-222160885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-222160885} OutVars{~a~0=~a~0_In-222160885, ~a$w_buff1~0=~a$w_buff1~0_In-222160885, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-222160885|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-222160885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-222160885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 14:05:25,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L845-4-->L846: Formula: (= v_~a~0_30 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_30, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:05:25,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1368432698 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1368432698 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1368432698| ~a$w_buff0_used~0_In1368432698) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out1368432698| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1368432698|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:05:25,664 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L847-->L847-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1841604176 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1841604176 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1841604176 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In1841604176 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1841604176 |ULTIMATE.start_main_#t~ite50_Out1841604176|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1841604176|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1841604176|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:05:25,664 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-1127002274 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-1127002274 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1127002274| 0)) (and (= ~a$r_buff0_thd0~0_In-1127002274 |ULTIMATE.start_main_#t~ite51_Out-1127002274|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1127002274, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1127002274} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1127002274|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1127002274, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1127002274} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:05:25,665 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1870467941 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1870467941 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-1870467941 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1870467941 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd0~0_In-1870467941 |ULTIMATE.start_main_#t~ite52_Out-1870467941|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1870467941|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1870467941|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:05:25,665 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~a$r_buff1_thd0~0_158 |v_ULTIMATE.start_main_#t~ite52_40|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_18 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 2 v_~x~0_125) (= v_~__unbuffered_p1_EBX~0_21 0) (= v_~__unbuffered_p2_EBX~0_24 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_158, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:05:25,714 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_d2a1c5c1-af11-4803-93dd-a6b02b7c38c6/bin/uautomizer/witness.graphml [2019-12-07 14:05:25,714 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:05:25,715 INFO L168 Benchmark]: Toolchain (without parser) took 221423.21 ms. Allocated memory was 1.0 GB in the beginning and 7.4 GB in the end (delta: 6.4 GB). Free memory was 939.4 MB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,715 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:05:25,715 INFO L168 Benchmark]: CACSL2BoogieTranslator took 419.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -136.2 MB). Peak memory consumption was 20.0 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,716 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,716 INFO L168 Benchmark]: Boogie Preprocessor took 27.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:05:25,716 INFO L168 Benchmark]: RCFGBuilder took 437.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 62.7 MB). Peak memory consumption was 62.7 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,716 INFO L168 Benchmark]: TraceAbstraction took 220432.52 ms. Allocated memory was 1.1 GB in the beginning and 7.4 GB in the end (delta: 6.3 GB). Free memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,716 INFO L168 Benchmark]: Witness Printer took 63.57 ms. Allocated memory is still 7.4 GB. Free memory was 3.2 GB in the beginning and 3.2 GB in the end (delta: 9.7 MB). Peak memory consumption was 9.7 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,718 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 419.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -136.2 MB). Peak memory consumption was 20.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 437.13 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 62.7 MB). Peak memory consumption was 62.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 220432.52 ms. Allocated memory was 1.1 GB in the beginning and 7.4 GB in the end (delta: 6.3 GB). Free memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. * Witness Printer took 63.57 ms. Allocated memory is still 7.4 GB. Free memory was 3.2 GB in the beginning and 3.2 GB in the end (delta: 9.7 MB). Peak memory consumption was 9.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 178 ProgramPointsBefore, 94 ProgramPointsAfterwards, 215 TransitionsBefore, 103 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7568 VarBasedMoverChecksPositive, 290 VarBasedMoverChecksNegative, 97 SemBasedMoverChecksPositive, 263 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 90866 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t281, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t282, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L735] 1 a$w_buff1 = a$w_buff0 [L736] 1 a$w_buff0 = 1 [L737] 1 a$w_buff1_used = a$w_buff0_used [L738] 1 a$w_buff0_used = (_Bool)1 [L750] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L764] 2 x = 2 [L767] 2 y = 1 [L770] 2 __unbuffered_p1_EAX = y [L773] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L750] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L751] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L752] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L839] FCALL, FORK 0 pthread_create(&t283, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L790] 3 z = 1 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=2, y=1, z=1] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L812] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L845] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 220.2s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 70.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8110 SDtfs, 12778 SDslu, 35353 SDs, 0 SdLazy, 29665 SolverSat, 719 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 24.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 621 GetRequests, 29 SyntacticMatches, 22 SemanticMatches, 570 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9800 ImplicationChecksByTransitivity, 11.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=344733occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 126.0s AutomataMinimizationTime, 29 MinimizatonAttempts, 426681 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 1261 NumberOfCodeBlocks, 1261 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 1165 ConstructedInterpolants, 0 QuantifiedInterpolants, 480753 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...