./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix011_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix011_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash df10c8e8c00f3e86b0e6390a02969638bb731c1f ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:38:17,415 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:38:17,416 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:38:17,423 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:38:17,423 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:38:17,424 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:38:17,425 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:38:17,426 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:38:17,428 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:38:17,428 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:38:17,429 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:38:17,429 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:38:17,430 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:38:17,430 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:38:17,431 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:38:17,432 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:38:17,432 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:38:17,433 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:38:17,434 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:38:17,436 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:38:17,437 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:38:17,437 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:38:17,438 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:38:17,439 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:38:17,440 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:38:17,440 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:38:17,441 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:38:17,441 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:38:17,441 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:38:17,442 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:38:17,442 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:38:17,443 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:38:17,443 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:38:17,443 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:38:17,444 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:38:17,444 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:38:17,444 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:38:17,445 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:38:17,445 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:38:17,445 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:38:17,446 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:38:17,446 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:38:17,455 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:38:17,456 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:38:17,456 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:38:17,456 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:38:17,457 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:38:17,457 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:38:17,457 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:38:17,457 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:38:17,457 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:38:17,457 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:38:17,457 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:38:17,457 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:38:17,458 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:38:17,458 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:38:17,458 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:38:17,458 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:38:17,458 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:38:17,458 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:38:17,458 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:38:17,459 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:38:17,459 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:38:17,459 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:38:17,459 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:38:17,459 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:38:17,459 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:38:17,459 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:38:17,459 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:38:17,460 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:38:17,460 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:38:17,460 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> df10c8e8c00f3e86b0e6390a02969638bb731c1f [2019-12-07 18:38:17,559 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:38:17,566 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:38:17,569 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:38:17,570 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:38:17,570 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:38:17,570 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix011_pso.oepc.i [2019-12-07 18:38:17,606 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/data/909fa2872/ff319e7e46ca4fa5bc1e0b9f744f63fb/FLAGd2dc2b464 [2019-12-07 18:38:17,982 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:38:17,982 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/sv-benchmarks/c/pthread-wmm/mix011_pso.oepc.i [2019-12-07 18:38:17,993 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/data/909fa2872/ff319e7e46ca4fa5bc1e0b9f744f63fb/FLAGd2dc2b464 [2019-12-07 18:38:18,002 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/data/909fa2872/ff319e7e46ca4fa5bc1e0b9f744f63fb [2019-12-07 18:38:18,004 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:38:18,005 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:38:18,006 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:38:18,006 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:38:18,008 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:38:18,009 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,010 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18, skipping insertion in model container [2019-12-07 18:38:18,010 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,015 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:38:18,045 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:38:18,293 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:38:18,300 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:38:18,342 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:38:18,386 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:38:18,386 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18 WrapperNode [2019-12-07 18:38:18,386 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:38:18,387 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:38:18,387 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:38:18,387 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:38:18,392 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,405 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,423 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:38:18,423 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:38:18,423 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:38:18,423 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:38:18,429 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,430 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,433 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,433 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,440 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,443 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,445 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... [2019-12-07 18:38:18,448 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:38:18,449 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:38:18,449 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:38:18,449 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:38:18,449 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:38:18,489 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:38:18,489 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:38:18,489 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:38:18,489 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:38:18,490 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:38:18,490 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:38:18,490 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:38:18,490 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:38:18,490 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:38:18,490 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:38:18,490 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:38:18,490 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:38:18,490 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:38:18,491 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:38:18,851 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:38:18,852 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:38:18,853 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:38:18 BoogieIcfgContainer [2019-12-07 18:38:18,853 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:38:18,854 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:38:18,854 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:38:18,856 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:38:18,857 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:38:18" (1/3) ... [2019-12-07 18:38:18,857 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e884053 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:38:18, skipping insertion in model container [2019-12-07 18:38:18,857 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:38:18" (2/3) ... [2019-12-07 18:38:18,858 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e884053 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:38:18, skipping insertion in model container [2019-12-07 18:38:18,858 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:38:18" (3/3) ... [2019-12-07 18:38:18,859 INFO L109 eAbstractionObserver]: Analyzing ICFG mix011_pso.oepc.i [2019-12-07 18:38:18,868 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:38:18,868 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:38:18,874 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:38:18,875 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:38:18,900 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,900 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,901 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,901 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,901 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,901 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,901 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,901 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,905 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,906 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,906 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,906 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,906 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,906 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,912 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,912 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,919 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,919 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,919 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,919 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,919 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,919 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,920 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,920 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,920 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,920 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,920 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,920 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,920 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,921 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,921 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,921 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,921 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,921 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,921 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,922 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,922 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,922 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,922 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,922 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,923 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,924 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,925 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,926 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,927 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,928 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,929 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,930 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,931 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:38:18,942 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:38:18,958 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:38:18,959 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:38:18,959 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:38:18,959 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:38:18,959 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:38:18,959 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:38:18,959 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:38:18,959 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:38:18,973 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 18:38:18,975 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 18:38:19,046 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 18:38:19,047 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:38:19,058 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 692 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:38:19,075 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 18:38:19,115 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 18:38:19,116 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:38:19,123 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 692 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:38:19,141 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:38:19,142 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:38:22,254 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 18:38:22,347 INFO L206 etLargeBlockEncoding]: Checked pairs total: 90866 [2019-12-07 18:38:22,347 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 18:38:22,350 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 103 transitions [2019-12-07 18:38:39,557 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 123302 states. [2019-12-07 18:38:39,559 INFO L276 IsEmpty]: Start isEmpty. Operand 123302 states. [2019-12-07 18:38:39,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:38:39,563 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:38:39,563 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:38:39,563 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:38:39,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:38:39,567 INFO L82 PathProgramCache]: Analyzing trace with hash 918873, now seen corresponding path program 1 times [2019-12-07 18:38:39,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:38:39,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214695562] [2019-12-07 18:38:39,573 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:38:39,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:38:39,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:38:39,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214695562] [2019-12-07 18:38:39,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:38:39,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:38:39,714 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1652980864] [2019-12-07 18:38:39,716 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:38:39,717 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:38:39,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:38:39,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:38:39,727 INFO L87 Difference]: Start difference. First operand 123302 states. Second operand 3 states. [2019-12-07 18:38:40,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:38:40,592 INFO L93 Difference]: Finished difference Result 122174 states and 518852 transitions. [2019-12-07 18:38:40,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:38:40,594 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:38:40,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:38:41,027 INFO L225 Difference]: With dead ends: 122174 [2019-12-07 18:38:41,027 INFO L226 Difference]: Without dead ends: 115076 [2019-12-07 18:38:41,028 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:38:47,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115076 states. [2019-12-07 18:38:48,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115076 to 115076. [2019-12-07 18:38:48,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115076 states. [2019-12-07 18:38:48,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115076 states to 115076 states and 488094 transitions. [2019-12-07 18:38:48,959 INFO L78 Accepts]: Start accepts. Automaton has 115076 states and 488094 transitions. Word has length 3 [2019-12-07 18:38:48,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:38:48,959 INFO L462 AbstractCegarLoop]: Abstraction has 115076 states and 488094 transitions. [2019-12-07 18:38:48,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:38:48,960 INFO L276 IsEmpty]: Start isEmpty. Operand 115076 states and 488094 transitions. [2019-12-07 18:38:48,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:38:48,962 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:38:48,962 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:38:48,962 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:38:48,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:38:48,963 INFO L82 PathProgramCache]: Analyzing trace with hash 1360334080, now seen corresponding path program 1 times [2019-12-07 18:38:48,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:38:48,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1027930694] [2019-12-07 18:38:48,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:38:48,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:38:49,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:38:49,023 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1027930694] [2019-12-07 18:38:49,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:38:49,023 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:38:49,023 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1101446040] [2019-12-07 18:38:49,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:38:49,024 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:38:49,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:38:49,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:38:49,024 INFO L87 Difference]: Start difference. First operand 115076 states and 488094 transitions. Second operand 4 states. [2019-12-07 18:38:49,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:38:49,974 INFO L93 Difference]: Finished difference Result 178684 states and 728513 transitions. [2019-12-07 18:38:49,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:38:49,975 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:38:49,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:38:50,832 INFO L225 Difference]: With dead ends: 178684 [2019-12-07 18:38:50,832 INFO L226 Difference]: Without dead ends: 178635 [2019-12-07 18:38:50,833 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:38:58,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178635 states. [2019-12-07 18:39:00,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178635 to 162755. [2019-12-07 18:39:00,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162755 states. [2019-12-07 18:39:01,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162755 states to 162755 states and 672033 transitions. [2019-12-07 18:39:01,151 INFO L78 Accepts]: Start accepts. Automaton has 162755 states and 672033 transitions. Word has length 11 [2019-12-07 18:39:01,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:01,152 INFO L462 AbstractCegarLoop]: Abstraction has 162755 states and 672033 transitions. [2019-12-07 18:39:01,152 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:39:01,152 INFO L276 IsEmpty]: Start isEmpty. Operand 162755 states and 672033 transitions. [2019-12-07 18:39:01,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:39:01,161 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:01,161 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:01,162 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:01,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:01,162 INFO L82 PathProgramCache]: Analyzing trace with hash 1888852276, now seen corresponding path program 1 times [2019-12-07 18:39:01,162 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:01,162 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127876399] [2019-12-07 18:39:01,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:01,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:01,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:01,228 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127876399] [2019-12-07 18:39:01,228 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:01,228 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:39:01,228 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794780572] [2019-12-07 18:39:01,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:39:01,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:01,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:39:01,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:39:01,229 INFO L87 Difference]: Start difference. First operand 162755 states and 672033 transitions. Second operand 4 states. [2019-12-07 18:39:02,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:02,815 INFO L93 Difference]: Finished difference Result 229896 states and 928060 transitions. [2019-12-07 18:39:02,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:39:02,816 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:39:02,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:03,427 INFO L225 Difference]: With dead ends: 229896 [2019-12-07 18:39:03,427 INFO L226 Difference]: Without dead ends: 229840 [2019-12-07 18:39:03,427 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:10,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229840 states. [2019-12-07 18:39:15,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229840 to 194046. [2019-12-07 18:39:15,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194046 states. [2019-12-07 18:39:16,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194046 states to 194046 states and 796782 transitions. [2019-12-07 18:39:16,151 INFO L78 Accepts]: Start accepts. Automaton has 194046 states and 796782 transitions. Word has length 13 [2019-12-07 18:39:16,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:16,152 INFO L462 AbstractCegarLoop]: Abstraction has 194046 states and 796782 transitions. [2019-12-07 18:39:16,152 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:39:16,152 INFO L276 IsEmpty]: Start isEmpty. Operand 194046 states and 796782 transitions. [2019-12-07 18:39:16,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:39:16,160 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:16,160 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:16,160 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:16,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:16,160 INFO L82 PathProgramCache]: Analyzing trace with hash -1220224201, now seen corresponding path program 1 times [2019-12-07 18:39:16,160 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:16,161 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191715979] [2019-12-07 18:39:16,161 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:16,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:16,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:16,210 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191715979] [2019-12-07 18:39:16,211 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:16,211 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:16,211 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1236475564] [2019-12-07 18:39:16,211 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:39:16,211 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:16,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:39:16,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:16,212 INFO L87 Difference]: Start difference. First operand 194046 states and 796782 transitions. Second operand 5 states. [2019-12-07 18:39:17,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:17,614 INFO L93 Difference]: Finished difference Result 261814 states and 1064888 transitions. [2019-12-07 18:39:17,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:39:17,614 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:39:17,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:18,296 INFO L225 Difference]: With dead ends: 261814 [2019-12-07 18:39:18,296 INFO L226 Difference]: Without dead ends: 261814 [2019-12-07 18:39:18,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:39:25,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261814 states. [2019-12-07 18:39:31,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261814 to 214683. [2019-12-07 18:39:31,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214683 states. [2019-12-07 18:39:32,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214683 states to 214683 states and 880739 transitions. [2019-12-07 18:39:32,456 INFO L78 Accepts]: Start accepts. Automaton has 214683 states and 880739 transitions. Word has length 16 [2019-12-07 18:39:32,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:32,456 INFO L462 AbstractCegarLoop]: Abstraction has 214683 states and 880739 transitions. [2019-12-07 18:39:32,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:39:32,457 INFO L276 IsEmpty]: Start isEmpty. Operand 214683 states and 880739 transitions. [2019-12-07 18:39:32,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:39:32,469 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:32,469 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:32,470 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:32,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:32,470 INFO L82 PathProgramCache]: Analyzing trace with hash 654894503, now seen corresponding path program 1 times [2019-12-07 18:39:32,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:32,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218018664] [2019-12-07 18:39:32,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:32,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:32,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:32,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218018664] [2019-12-07 18:39:32,537 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:32,537 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:39:32,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076772567] [2019-12-07 18:39:32,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:39:32,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:32,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:39:32,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:32,539 INFO L87 Difference]: Start difference. First operand 214683 states and 880739 transitions. Second operand 3 states. [2019-12-07 18:39:34,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:34,784 INFO L93 Difference]: Finished difference Result 386564 states and 1576020 transitions. [2019-12-07 18:39:34,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:39:34,784 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:39:34,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:35,642 INFO L225 Difference]: With dead ends: 386564 [2019-12-07 18:39:35,642 INFO L226 Difference]: Without dead ends: 343708 [2019-12-07 18:39:35,643 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:39:47,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343708 states. [2019-12-07 18:39:51,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343708 to 330290. [2019-12-07 18:39:51,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 330290 states. [2019-12-07 18:39:53,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330290 states to 330290 states and 1355549 transitions. [2019-12-07 18:39:53,470 INFO L78 Accepts]: Start accepts. Automaton has 330290 states and 1355549 transitions. Word has length 18 [2019-12-07 18:39:53,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:39:53,470 INFO L462 AbstractCegarLoop]: Abstraction has 330290 states and 1355549 transitions. [2019-12-07 18:39:53,470 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:39:53,470 INFO L276 IsEmpty]: Start isEmpty. Operand 330290 states and 1355549 transitions. [2019-12-07 18:39:53,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:39:53,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:39:53,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:39:53,491 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:39:53,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:39:53,492 INFO L82 PathProgramCache]: Analyzing trace with hash -1827269975, now seen corresponding path program 1 times [2019-12-07 18:39:53,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:39:53,492 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152023697] [2019-12-07 18:39:53,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:39:53,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:39:53,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:39:53,534 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [152023697] [2019-12-07 18:39:53,534 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:39:53,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:39:53,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [918804965] [2019-12-07 18:39:53,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:39:53,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:39:53,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:39:53,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:39:53,535 INFO L87 Difference]: Start difference. First operand 330290 states and 1355549 transitions. Second operand 5 states. [2019-12-07 18:39:56,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:39:56,578 INFO L93 Difference]: Finished difference Result 437662 states and 1764155 transitions. [2019-12-07 18:39:56,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:39:56,578 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:39:56,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:39:57,797 INFO L225 Difference]: With dead ends: 437662 [2019-12-07 18:39:57,797 INFO L226 Difference]: Without dead ends: 437564 [2019-12-07 18:39:57,797 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:40:11,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437564 states. [2019-12-07 18:40:17,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437564 to 344733. [2019-12-07 18:40:17,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344733 states. [2019-12-07 18:40:18,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344733 states to 344733 states and 1412505 transitions. [2019-12-07 18:40:18,591 INFO L78 Accepts]: Start accepts. Automaton has 344733 states and 1412505 transitions. Word has length 19 [2019-12-07 18:40:18,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:18,592 INFO L462 AbstractCegarLoop]: Abstraction has 344733 states and 1412505 transitions. [2019-12-07 18:40:18,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:40:18,592 INFO L276 IsEmpty]: Start isEmpty. Operand 344733 states and 1412505 transitions. [2019-12-07 18:40:18,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:40:18,618 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:18,618 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:18,618 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:18,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:18,618 INFO L82 PathProgramCache]: Analyzing trace with hash 627404309, now seen corresponding path program 1 times [2019-12-07 18:40:18,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:18,619 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340678745] [2019-12-07 18:40:18,619 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:18,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:18,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:18,644 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340678745] [2019-12-07 18:40:18,644 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:18,644 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:40:18,644 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118675350] [2019-12-07 18:40:18,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:40:18,645 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:18,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:40:18,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:18,645 INFO L87 Difference]: Start difference. First operand 344733 states and 1412505 transitions. Second operand 3 states. [2019-12-07 18:40:18,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:18,868 INFO L93 Difference]: Finished difference Result 67138 states and 216073 transitions. [2019-12-07 18:40:18,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:40:18,869 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:40:18,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:18,980 INFO L225 Difference]: With dead ends: 67138 [2019-12-07 18:40:18,980 INFO L226 Difference]: Without dead ends: 67138 [2019-12-07 18:40:18,981 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:19,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67138 states. [2019-12-07 18:40:19,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67138 to 66994. [2019-12-07 18:40:19,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66994 states. [2019-12-07 18:40:20,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66994 states to 66994 states and 215665 transitions. [2019-12-07 18:40:20,070 INFO L78 Accepts]: Start accepts. Automaton has 66994 states and 215665 transitions. Word has length 19 [2019-12-07 18:40:20,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:20,070 INFO L462 AbstractCegarLoop]: Abstraction has 66994 states and 215665 transitions. [2019-12-07 18:40:20,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:40:20,071 INFO L276 IsEmpty]: Start isEmpty. Operand 66994 states and 215665 transitions. [2019-12-07 18:40:20,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:40:20,078 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:20,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:20,079 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:20,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:20,079 INFO L82 PathProgramCache]: Analyzing trace with hash -1720601530, now seen corresponding path program 1 times [2019-12-07 18:40:20,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:20,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785180952] [2019-12-07 18:40:20,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:20,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:20,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:20,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [785180952] [2019-12-07 18:40:20,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:20,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:40:20,129 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074360290] [2019-12-07 18:40:20,129 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:40:20,129 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:20,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:40:20,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:40:20,130 INFO L87 Difference]: Start difference. First operand 66994 states and 215665 transitions. Second operand 6 states. [2019-12-07 18:40:20,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:20,862 INFO L93 Difference]: Finished difference Result 96343 states and 303161 transitions. [2019-12-07 18:40:20,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:40:20,862 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:40:20,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:21,003 INFO L225 Difference]: With dead ends: 96343 [2019-12-07 18:40:21,003 INFO L226 Difference]: Without dead ends: 96336 [2019-12-07 18:40:21,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:40:21,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96336 states. [2019-12-07 18:40:22,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96336 to 72978. [2019-12-07 18:40:22,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72978 states. [2019-12-07 18:40:22,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72978 states to 72978 states and 233059 transitions. [2019-12-07 18:40:22,687 INFO L78 Accepts]: Start accepts. Automaton has 72978 states and 233059 transitions. Word has length 22 [2019-12-07 18:40:22,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:22,687 INFO L462 AbstractCegarLoop]: Abstraction has 72978 states and 233059 transitions. [2019-12-07 18:40:22,687 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:40:22,687 INFO L276 IsEmpty]: Start isEmpty. Operand 72978 states and 233059 transitions. [2019-12-07 18:40:22,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:40:22,709 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:22,709 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:22,710 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:22,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:22,710 INFO L82 PathProgramCache]: Analyzing trace with hash 1856606199, now seen corresponding path program 1 times [2019-12-07 18:40:22,710 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:22,710 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853622320] [2019-12-07 18:40:22,710 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:22,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:22,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:22,760 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1853622320] [2019-12-07 18:40:22,760 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:22,760 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:40:22,760 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1666522644] [2019-12-07 18:40:22,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:40:22,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:22,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:40:22,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:40:22,761 INFO L87 Difference]: Start difference. First operand 72978 states and 233059 transitions. Second operand 6 states. [2019-12-07 18:40:23,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:23,357 INFO L93 Difference]: Finished difference Result 96677 states and 303027 transitions. [2019-12-07 18:40:23,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:40:23,358 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:40:23,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:23,499 INFO L225 Difference]: With dead ends: 96677 [2019-12-07 18:40:23,499 INFO L226 Difference]: Without dead ends: 96639 [2019-12-07 18:40:23,500 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:40:23,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96639 states. [2019-12-07 18:40:24,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96639 to 78189. [2019-12-07 18:40:24,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78189 states. [2019-12-07 18:40:24,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78189 states to 78189 states and 249085 transitions. [2019-12-07 18:40:24,985 INFO L78 Accepts]: Start accepts. Automaton has 78189 states and 249085 transitions. Word has length 27 [2019-12-07 18:40:24,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:24,986 INFO L462 AbstractCegarLoop]: Abstraction has 78189 states and 249085 transitions. [2019-12-07 18:40:24,986 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:40:24,986 INFO L276 IsEmpty]: Start isEmpty. Operand 78189 states and 249085 transitions. [2019-12-07 18:40:25,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:40:25,013 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:25,013 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:25,013 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:25,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:25,014 INFO L82 PathProgramCache]: Analyzing trace with hash 594750670, now seen corresponding path program 1 times [2019-12-07 18:40:25,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:25,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322464922] [2019-12-07 18:40:25,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:25,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:25,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:25,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [322464922] [2019-12-07 18:40:25,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:25,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:40:25,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382399712] [2019-12-07 18:40:25,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:40:25,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:25,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:40:25,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:25,048 INFO L87 Difference]: Start difference. First operand 78189 states and 249085 transitions. Second operand 3 states. [2019-12-07 18:40:25,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:25,265 INFO L93 Difference]: Finished difference Result 75148 states and 237276 transitions. [2019-12-07 18:40:25,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:40:25,265 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 18:40:25,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:25,381 INFO L225 Difference]: With dead ends: 75148 [2019-12-07 18:40:25,381 INFO L226 Difference]: Without dead ends: 75148 [2019-12-07 18:40:25,381 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:25,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75148 states. [2019-12-07 18:40:26,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75148 to 70228. [2019-12-07 18:40:26,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70228 states. [2019-12-07 18:40:26,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70228 states to 70228 states and 222340 transitions. [2019-12-07 18:40:26,592 INFO L78 Accepts]: Start accepts. Automaton has 70228 states and 222340 transitions. Word has length 29 [2019-12-07 18:40:26,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:26,592 INFO L462 AbstractCegarLoop]: Abstraction has 70228 states and 222340 transitions. [2019-12-07 18:40:26,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:40:26,592 INFO L276 IsEmpty]: Start isEmpty. Operand 70228 states and 222340 transitions. [2019-12-07 18:40:26,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:40:26,613 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:26,614 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:26,614 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:26,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:26,614 INFO L82 PathProgramCache]: Analyzing trace with hash -760516630, now seen corresponding path program 1 times [2019-12-07 18:40:26,614 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:26,614 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807879161] [2019-12-07 18:40:26,614 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:26,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:26,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:26,648 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807879161] [2019-12-07 18:40:26,648 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:26,648 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:40:26,648 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067331343] [2019-12-07 18:40:26,649 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:40:26,649 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:26,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:40:26,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:40:26,649 INFO L87 Difference]: Start difference. First operand 70228 states and 222340 transitions. Second operand 4 states. [2019-12-07 18:40:26,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:26,729 INFO L93 Difference]: Finished difference Result 27189 states and 82712 transitions. [2019-12-07 18:40:26,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:40:26,730 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 18:40:26,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:26,765 INFO L225 Difference]: With dead ends: 27189 [2019-12-07 18:40:26,765 INFO L226 Difference]: Without dead ends: 27189 [2019-12-07 18:40:26,766 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:40:26,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27189 states. [2019-12-07 18:40:27,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27189 to 25490. [2019-12-07 18:40:27,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25490 states. [2019-12-07 18:40:27,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25490 states to 25490 states and 77602 transitions. [2019-12-07 18:40:27,151 INFO L78 Accepts]: Start accepts. Automaton has 25490 states and 77602 transitions. Word has length 30 [2019-12-07 18:40:27,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:27,151 INFO L462 AbstractCegarLoop]: Abstraction has 25490 states and 77602 transitions. [2019-12-07 18:40:27,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:40:27,151 INFO L276 IsEmpty]: Start isEmpty. Operand 25490 states and 77602 transitions. [2019-12-07 18:40:27,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:40:27,174 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:27,174 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:27,174 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:27,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:27,174 INFO L82 PathProgramCache]: Analyzing trace with hash -1731527828, now seen corresponding path program 1 times [2019-12-07 18:40:27,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:27,175 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9200594] [2019-12-07 18:40:27,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:27,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:27,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:27,224 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [9200594] [2019-12-07 18:40:27,224 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:27,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:40:27,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828306644] [2019-12-07 18:40:27,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:40:27,225 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:27,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:40:27,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:40:27,225 INFO L87 Difference]: Start difference. First operand 25490 states and 77602 transitions. Second operand 7 states. [2019-12-07 18:40:27,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:27,900 INFO L93 Difference]: Finished difference Result 32394 states and 96072 transitions. [2019-12-07 18:40:27,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:40:27,900 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:40:27,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:27,938 INFO L225 Difference]: With dead ends: 32394 [2019-12-07 18:40:27,938 INFO L226 Difference]: Without dead ends: 32394 [2019-12-07 18:40:27,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:40:28,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32394 states. [2019-12-07 18:40:28,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32394 to 24997. [2019-12-07 18:40:28,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24997 states. [2019-12-07 18:40:28,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24997 states to 24997 states and 76137 transitions. [2019-12-07 18:40:28,350 INFO L78 Accepts]: Start accepts. Automaton has 24997 states and 76137 transitions. Word has length 33 [2019-12-07 18:40:28,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:28,350 INFO L462 AbstractCegarLoop]: Abstraction has 24997 states and 76137 transitions. [2019-12-07 18:40:28,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:40:28,350 INFO L276 IsEmpty]: Start isEmpty. Operand 24997 states and 76137 transitions. [2019-12-07 18:40:28,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:40:28,372 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:28,373 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:28,373 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:28,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:28,373 INFO L82 PathProgramCache]: Analyzing trace with hash 86698678, now seen corresponding path program 1 times [2019-12-07 18:40:28,373 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:28,374 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820724469] [2019-12-07 18:40:28,374 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:28,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:28,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:28,415 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820724469] [2019-12-07 18:40:28,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:28,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:40:28,415 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [481025768] [2019-12-07 18:40:28,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:40:28,415 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:28,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:40:28,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:40:28,416 INFO L87 Difference]: Start difference. First operand 24997 states and 76137 transitions. Second operand 5 states. [2019-12-07 18:40:28,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:28,486 INFO L93 Difference]: Finished difference Result 23042 states and 71828 transitions. [2019-12-07 18:40:28,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:40:28,487 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:40:28,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:28,514 INFO L225 Difference]: With dead ends: 23042 [2019-12-07 18:40:28,514 INFO L226 Difference]: Without dead ends: 22492 [2019-12-07 18:40:28,514 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:40:28,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22492 states. [2019-12-07 18:40:28,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22492 to 13013. [2019-12-07 18:40:28,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13013 states. [2019-12-07 18:40:28,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13013 states to 13013 states and 40655 transitions. [2019-12-07 18:40:28,790 INFO L78 Accepts]: Start accepts. Automaton has 13013 states and 40655 transitions. Word has length 40 [2019-12-07 18:40:28,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:28,790 INFO L462 AbstractCegarLoop]: Abstraction has 13013 states and 40655 transitions. [2019-12-07 18:40:28,790 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:40:28,790 INFO L276 IsEmpty]: Start isEmpty. Operand 13013 states and 40655 transitions. [2019-12-07 18:40:28,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:40:28,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:28,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:28,802 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:28,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:28,803 INFO L82 PathProgramCache]: Analyzing trace with hash -325613083, now seen corresponding path program 1 times [2019-12-07 18:40:28,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:28,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218718016] [2019-12-07 18:40:28,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:28,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:28,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:28,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218718016] [2019-12-07 18:40:28,839 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:28,839 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:40:28,839 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482552368] [2019-12-07 18:40:28,839 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:40:28,839 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:28,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:40:28,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:28,840 INFO L87 Difference]: Start difference. First operand 13013 states and 40655 transitions. Second operand 3 states. [2019-12-07 18:40:28,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:28,925 INFO L93 Difference]: Finished difference Result 18794 states and 58056 transitions. [2019-12-07 18:40:28,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:40:28,925 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:40:28,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:28,947 INFO L225 Difference]: With dead ends: 18794 [2019-12-07 18:40:28,947 INFO L226 Difference]: Without dead ends: 18794 [2019-12-07 18:40:28,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:29,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18794 states. [2019-12-07 18:40:29,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18794 to 14536. [2019-12-07 18:40:29,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14536 states. [2019-12-07 18:40:29,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14536 states to 14536 states and 45236 transitions. [2019-12-07 18:40:29,184 INFO L78 Accepts]: Start accepts. Automaton has 14536 states and 45236 transitions. Word has length 65 [2019-12-07 18:40:29,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:29,185 INFO L462 AbstractCegarLoop]: Abstraction has 14536 states and 45236 transitions. [2019-12-07 18:40:29,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:40:29,185 INFO L276 IsEmpty]: Start isEmpty. Operand 14536 states and 45236 transitions. [2019-12-07 18:40:29,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:40:29,197 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:29,197 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:29,197 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:29,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:29,198 INFO L82 PathProgramCache]: Analyzing trace with hash 1375612167, now seen corresponding path program 1 times [2019-12-07 18:40:29,198 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:29,198 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700358109] [2019-12-07 18:40:29,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:29,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:29,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:29,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700358109] [2019-12-07 18:40:29,279 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:29,280 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:40:29,280 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290578745] [2019-12-07 18:40:29,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:40:29,280 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:29,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:40:29,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:40:29,281 INFO L87 Difference]: Start difference. First operand 14536 states and 45236 transitions. Second operand 7 states. [2019-12-07 18:40:29,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:29,985 INFO L93 Difference]: Finished difference Result 26585 states and 80763 transitions. [2019-12-07 18:40:29,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:40:29,985 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 18:40:29,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:30,016 INFO L225 Difference]: With dead ends: 26585 [2019-12-07 18:40:30,017 INFO L226 Difference]: Without dead ends: 26585 [2019-12-07 18:40:30,017 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 10 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:40:30,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26585 states. [2019-12-07 18:40:30,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26585 to 18807. [2019-12-07 18:40:30,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18807 states. [2019-12-07 18:40:30,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18807 states to 18807 states and 58420 transitions. [2019-12-07 18:40:30,348 INFO L78 Accepts]: Start accepts. Automaton has 18807 states and 58420 transitions. Word has length 65 [2019-12-07 18:40:30,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:30,348 INFO L462 AbstractCegarLoop]: Abstraction has 18807 states and 58420 transitions. [2019-12-07 18:40:30,348 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:40:30,348 INFO L276 IsEmpty]: Start isEmpty. Operand 18807 states and 58420 transitions. [2019-12-07 18:40:30,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:40:30,365 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:30,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:30,365 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:30,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:30,365 INFO L82 PathProgramCache]: Analyzing trace with hash -2076420133, now seen corresponding path program 2 times [2019-12-07 18:40:30,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:30,366 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100731479] [2019-12-07 18:40:30,366 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:30,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:30,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:30,406 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100731479] [2019-12-07 18:40:30,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:30,407 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:40:30,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1210073346] [2019-12-07 18:40:30,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:40:30,407 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:30,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:40:30,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:30,407 INFO L87 Difference]: Start difference. First operand 18807 states and 58420 transitions. Second operand 3 states. [2019-12-07 18:40:30,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:30,500 INFO L93 Difference]: Finished difference Result 22662 states and 70263 transitions. [2019-12-07 18:40:30,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:40:30,501 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:40:30,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:30,526 INFO L225 Difference]: With dead ends: 22662 [2019-12-07 18:40:30,526 INFO L226 Difference]: Without dead ends: 22662 [2019-12-07 18:40:30,526 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:30,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22662 states. [2019-12-07 18:40:30,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22662 to 17511. [2019-12-07 18:40:30,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17511 states. [2019-12-07 18:40:30,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17511 states to 17511 states and 54944 transitions. [2019-12-07 18:40:30,814 INFO L78 Accepts]: Start accepts. Automaton has 17511 states and 54944 transitions. Word has length 65 [2019-12-07 18:40:30,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:30,815 INFO L462 AbstractCegarLoop]: Abstraction has 17511 states and 54944 transitions. [2019-12-07 18:40:30,815 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:40:30,815 INFO L276 IsEmpty]: Start isEmpty. Operand 17511 states and 54944 transitions. [2019-12-07 18:40:30,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:40:30,830 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:30,830 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:30,830 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:30,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:30,831 INFO L82 PathProgramCache]: Analyzing trace with hash -1086818070, now seen corresponding path program 1 times [2019-12-07 18:40:30,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:30,831 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682742661] [2019-12-07 18:40:30,831 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:30,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:30,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:30,882 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1682742661] [2019-12-07 18:40:30,882 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:30,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:40:30,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [481538700] [2019-12-07 18:40:30,882 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:40:30,882 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:30,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:40:30,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:30,883 INFO L87 Difference]: Start difference. First operand 17511 states and 54944 transitions. Second operand 3 states. [2019-12-07 18:40:30,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:30,929 INFO L93 Difference]: Finished difference Result 16475 states and 50823 transitions. [2019-12-07 18:40:30,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:40:30,930 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:40:30,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:30,948 INFO L225 Difference]: With dead ends: 16475 [2019-12-07 18:40:30,948 INFO L226 Difference]: Without dead ends: 16475 [2019-12-07 18:40:30,948 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:31,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16475 states. [2019-12-07 18:40:31,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16475 to 15595. [2019-12-07 18:40:31,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15595 states. [2019-12-07 18:40:31,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15595 states to 15595 states and 48253 transitions. [2019-12-07 18:40:31,226 INFO L78 Accepts]: Start accepts. Automaton has 15595 states and 48253 transitions. Word has length 66 [2019-12-07 18:40:31,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:31,226 INFO L462 AbstractCegarLoop]: Abstraction has 15595 states and 48253 transitions. [2019-12-07 18:40:31,226 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:40:31,226 INFO L276 IsEmpty]: Start isEmpty. Operand 15595 states and 48253 transitions. [2019-12-07 18:40:31,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:31,238 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:31,238 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:31,238 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:31,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:31,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1650479011, now seen corresponding path program 1 times [2019-12-07 18:40:31,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:31,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158743659] [2019-12-07 18:40:31,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:31,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:31,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:31,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158743659] [2019-12-07 18:40:31,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:31,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:40:31,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294191091] [2019-12-07 18:40:31,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:40:31,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:31,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:40:31,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:40:31,306 INFO L87 Difference]: Start difference. First operand 15595 states and 48253 transitions. Second operand 7 states. [2019-12-07 18:40:31,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:31,601 INFO L93 Difference]: Finished difference Result 45436 states and 139220 transitions. [2019-12-07 18:40:31,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:40:31,601 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 18:40:31,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:31,638 INFO L225 Difference]: With dead ends: 45436 [2019-12-07 18:40:31,638 INFO L226 Difference]: Without dead ends: 33208 [2019-12-07 18:40:31,639 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:40:31,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33208 states. [2019-12-07 18:40:31,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33208 to 18481. [2019-12-07 18:40:31,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18481 states. [2019-12-07 18:40:32,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18481 states to 18481 states and 56728 transitions. [2019-12-07 18:40:32,022 INFO L78 Accepts]: Start accepts. Automaton has 18481 states and 56728 transitions. Word has length 67 [2019-12-07 18:40:32,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:32,022 INFO L462 AbstractCegarLoop]: Abstraction has 18481 states and 56728 transitions. [2019-12-07 18:40:32,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:40:32,022 INFO L276 IsEmpty]: Start isEmpty. Operand 18481 states and 56728 transitions. [2019-12-07 18:40:32,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:32,038 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:32,039 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:32,039 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:32,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:32,039 INFO L82 PathProgramCache]: Analyzing trace with hash -2130416035, now seen corresponding path program 2 times [2019-12-07 18:40:32,039 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:32,039 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [271121214] [2019-12-07 18:40:32,039 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:32,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:32,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:32,076 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [271121214] [2019-12-07 18:40:32,076 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:32,076 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:40:32,076 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1796114389] [2019-12-07 18:40:32,077 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:40:32,077 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:32,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:40:32,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:32,077 INFO L87 Difference]: Start difference. First operand 18481 states and 56728 transitions. Second operand 3 states. [2019-12-07 18:40:32,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:32,156 INFO L93 Difference]: Finished difference Result 32336 states and 99450 transitions. [2019-12-07 18:40:32,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:40:32,156 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 18:40:32,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:32,173 INFO L225 Difference]: With dead ends: 32336 [2019-12-07 18:40:32,173 INFO L226 Difference]: Without dead ends: 15450 [2019-12-07 18:40:32,173 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:32,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15450 states. [2019-12-07 18:40:32,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15450 to 15450. [2019-12-07 18:40:32,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15450 states. [2019-12-07 18:40:32,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15450 states to 15450 states and 47550 transitions. [2019-12-07 18:40:32,392 INFO L78 Accepts]: Start accepts. Automaton has 15450 states and 47550 transitions. Word has length 67 [2019-12-07 18:40:32,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:32,392 INFO L462 AbstractCegarLoop]: Abstraction has 15450 states and 47550 transitions. [2019-12-07 18:40:32,392 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:40:32,392 INFO L276 IsEmpty]: Start isEmpty. Operand 15450 states and 47550 transitions. [2019-12-07 18:40:32,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:32,406 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:32,406 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:32,406 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:32,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:32,406 INFO L82 PathProgramCache]: Analyzing trace with hash 1169670237, now seen corresponding path program 3 times [2019-12-07 18:40:32,406 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:32,406 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313781983] [2019-12-07 18:40:32,407 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:32,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:32,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:32,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313781983] [2019-12-07 18:40:32,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:32,760 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:40:32,760 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1131822182] [2019-12-07 18:40:32,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:40:32,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:32,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:40:32,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:40:32,760 INFO L87 Difference]: Start difference. First operand 15450 states and 47550 transitions. Second operand 15 states. [2019-12-07 18:40:38,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:38,577 INFO L93 Difference]: Finished difference Result 47249 states and 143462 transitions. [2019-12-07 18:40:38,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2019-12-07 18:40:38,578 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 18:40:38,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:38,628 INFO L225 Difference]: With dead ends: 47249 [2019-12-07 18:40:38,628 INFO L226 Difference]: Without dead ends: 43890 [2019-12-07 18:40:38,630 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1795 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=808, Invalid=4742, Unknown=0, NotChecked=0, Total=5550 [2019-12-07 18:40:38,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43890 states. [2019-12-07 18:40:39,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43890 to 18746. [2019-12-07 18:40:39,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18746 states. [2019-12-07 18:40:39,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18746 states to 18746 states and 57565 transitions. [2019-12-07 18:40:39,067 INFO L78 Accepts]: Start accepts. Automaton has 18746 states and 57565 transitions. Word has length 67 [2019-12-07 18:40:39,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:39,067 INFO L462 AbstractCegarLoop]: Abstraction has 18746 states and 57565 transitions. [2019-12-07 18:40:39,067 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:40:39,067 INFO L276 IsEmpty]: Start isEmpty. Operand 18746 states and 57565 transitions. [2019-12-07 18:40:39,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:39,085 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:39,085 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:39,085 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:39,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:39,085 INFO L82 PathProgramCache]: Analyzing trace with hash 791833971, now seen corresponding path program 4 times [2019-12-07 18:40:39,085 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:39,085 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904424511] [2019-12-07 18:40:39,085 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:39,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:39,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:39,397 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904424511] [2019-12-07 18:40:39,397 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:39,398 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:40:39,398 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1478796695] [2019-12-07 18:40:39,398 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:40:39,398 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:39,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:40:39,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:40:39,398 INFO L87 Difference]: Start difference. First operand 18746 states and 57565 transitions. Second operand 15 states. [2019-12-07 18:40:43,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:43,945 INFO L93 Difference]: Finished difference Result 37603 states and 112876 transitions. [2019-12-07 18:40:43,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 18:40:43,945 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 18:40:43,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:43,977 INFO L225 Difference]: With dead ends: 37603 [2019-12-07 18:40:43,977 INFO L226 Difference]: Without dead ends: 30941 [2019-12-07 18:40:43,978 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 764 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=412, Invalid=2240, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 18:40:44,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30941 states. [2019-12-07 18:40:44,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30941 to 17566. [2019-12-07 18:40:44,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17566 states. [2019-12-07 18:40:44,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17566 states to 17566 states and 53811 transitions. [2019-12-07 18:40:44,304 INFO L78 Accepts]: Start accepts. Automaton has 17566 states and 53811 transitions. Word has length 67 [2019-12-07 18:40:44,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:44,304 INFO L462 AbstractCegarLoop]: Abstraction has 17566 states and 53811 transitions. [2019-12-07 18:40:44,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:40:44,304 INFO L276 IsEmpty]: Start isEmpty. Operand 17566 states and 53811 transitions. [2019-12-07 18:40:44,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:44,319 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:44,319 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:44,319 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:44,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:44,319 INFO L82 PathProgramCache]: Analyzing trace with hash -923156293, now seen corresponding path program 5 times [2019-12-07 18:40:44,319 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:44,319 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [278389434] [2019-12-07 18:40:44,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:44,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:44,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:44,628 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [278389434] [2019-12-07 18:40:44,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:44,628 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:40:44,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1099715833] [2019-12-07 18:40:44,629 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:40:44,629 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:44,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:40:44,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:40:44,629 INFO L87 Difference]: Start difference. First operand 17566 states and 53811 transitions. Second operand 16 states. [2019-12-07 18:40:52,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:52,332 INFO L93 Difference]: Finished difference Result 35725 states and 107745 transitions. [2019-12-07 18:40:52,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 18:40:52,333 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:40:52,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:52,388 INFO L225 Difference]: With dead ends: 35725 [2019-12-07 18:40:52,389 INFO L226 Difference]: Without dead ends: 30232 [2019-12-07 18:40:52,390 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1288 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=589, Invalid=3443, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 18:40:52,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30232 states. [2019-12-07 18:40:52,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30232 to 17130. [2019-12-07 18:40:52,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17130 states. [2019-12-07 18:40:52,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17130 states to 17130 states and 52555 transitions. [2019-12-07 18:40:52,802 INFO L78 Accepts]: Start accepts. Automaton has 17130 states and 52555 transitions. Word has length 67 [2019-12-07 18:40:52,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:52,802 INFO L462 AbstractCegarLoop]: Abstraction has 17130 states and 52555 transitions. [2019-12-07 18:40:52,802 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:40:52,802 INFO L276 IsEmpty]: Start isEmpty. Operand 17130 states and 52555 transitions. [2019-12-07 18:40:52,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:40:52,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:52,815 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:52,815 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:52,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:52,816 INFO L82 PathProgramCache]: Analyzing trace with hash -1167813035, now seen corresponding path program 6 times [2019-12-07 18:40:52,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:52,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1192196407] [2019-12-07 18:40:52,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:52,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:53,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:53,207 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1192196407] [2019-12-07 18:40:53,207 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:53,207 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:40:53,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694910418] [2019-12-07 18:40:53,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:40:53,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:53,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:40:53,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:40:53,208 INFO L87 Difference]: Start difference. First operand 17130 states and 52555 transitions. Second operand 16 states. [2019-12-07 18:41:03,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:03,574 INFO L93 Difference]: Finished difference Result 44158 states and 133593 transitions. [2019-12-07 18:41:03,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 18:41:03,574 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:41:03,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:03,623 INFO L225 Difference]: With dead ends: 44158 [2019-12-07 18:41:03,623 INFO L226 Difference]: Without dead ends: 41476 [2019-12-07 18:41:03,625 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1307 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=632, Invalid=3924, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 18:41:03,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41476 states. [2019-12-07 18:41:04,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41476 to 18448. [2019-12-07 18:41:04,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18448 states. [2019-12-07 18:41:04,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18448 states to 18448 states and 56510 transitions. [2019-12-07 18:41:04,052 INFO L78 Accepts]: Start accepts. Automaton has 18448 states and 56510 transitions. Word has length 67 [2019-12-07 18:41:04,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:04,052 INFO L462 AbstractCegarLoop]: Abstraction has 18448 states and 56510 transitions. [2019-12-07 18:41:04,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:41:04,052 INFO L276 IsEmpty]: Start isEmpty. Operand 18448 states and 56510 transitions. [2019-12-07 18:41:04,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:04,069 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:04,069 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:04,069 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:04,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:04,069 INFO L82 PathProgramCache]: Analyzing trace with hash -1545649301, now seen corresponding path program 7 times [2019-12-07 18:41:04,069 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:04,070 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482075492] [2019-12-07 18:41:04,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:04,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:04,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:04,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [482075492] [2019-12-07 18:41:04,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:04,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:41:04,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1235746042] [2019-12-07 18:41:04,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:41:04,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:04,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:41:04,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:41:04,413 INFO L87 Difference]: Start difference. First operand 18448 states and 56510 transitions. Second operand 16 states. [2019-12-07 18:41:08,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:08,043 INFO L93 Difference]: Finished difference Result 32331 states and 97967 transitions. [2019-12-07 18:41:08,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 18:41:08,043 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:41:08,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:08,079 INFO L225 Difference]: With dead ends: 32331 [2019-12-07 18:41:08,080 INFO L226 Difference]: Without dead ends: 29361 [2019-12-07 18:41:08,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 729 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=349, Invalid=2201, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 18:41:08,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29361 states. [2019-12-07 18:41:08,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29361 to 18280. [2019-12-07 18:41:08,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18280 states. [2019-12-07 18:41:08,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18280 states to 18280 states and 55802 transitions. [2019-12-07 18:41:08,426 INFO L78 Accepts]: Start accepts. Automaton has 18280 states and 55802 transitions. Word has length 67 [2019-12-07 18:41:08,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:08,426 INFO L462 AbstractCegarLoop]: Abstraction has 18280 states and 55802 transitions. [2019-12-07 18:41:08,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:41:08,426 INFO L276 IsEmpty]: Start isEmpty. Operand 18280 states and 55802 transitions. [2019-12-07 18:41:08,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:08,443 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:08,443 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:08,443 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:08,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:08,443 INFO L82 PathProgramCache]: Analyzing trace with hash 1034327731, now seen corresponding path program 8 times [2019-12-07 18:41:08,443 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:08,444 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286061205] [2019-12-07 18:41:08,444 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:08,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:08,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:08,746 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286061205] [2019-12-07 18:41:08,747 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:08,747 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 18:41:08,747 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695189707] [2019-12-07 18:41:08,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 18:41:08,747 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:08,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 18:41:08,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:41:08,747 INFO L87 Difference]: Start difference. First operand 18280 states and 55802 transitions. Second operand 17 states. [2019-12-07 18:41:13,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:13,570 INFO L93 Difference]: Finished difference Result 30631 states and 92899 transitions. [2019-12-07 18:41:13,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2019-12-07 18:41:13,571 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 18:41:13,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:13,617 INFO L225 Difference]: With dead ends: 30631 [2019-12-07 18:41:13,617 INFO L226 Difference]: Without dead ends: 28718 [2019-12-07 18:41:13,618 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1145 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=481, Invalid=3179, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 18:41:13,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28718 states. [2019-12-07 18:41:13,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28718 to 18220. [2019-12-07 18:41:13,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18220 states. [2019-12-07 18:41:13,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18220 states to 18220 states and 55644 transitions. [2019-12-07 18:41:13,957 INFO L78 Accepts]: Start accepts. Automaton has 18220 states and 55644 transitions. Word has length 67 [2019-12-07 18:41:13,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:13,957 INFO L462 AbstractCegarLoop]: Abstraction has 18220 states and 55644 transitions. [2019-12-07 18:41:13,957 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 18:41:13,958 INFO L276 IsEmpty]: Start isEmpty. Operand 18220 states and 55644 transitions. [2019-12-07 18:41:13,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:13,974 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:13,974 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:13,974 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:13,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:13,974 INFO L82 PathProgramCache]: Analyzing trace with hash 709682779, now seen corresponding path program 9 times [2019-12-07 18:41:13,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:13,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858912811] [2019-12-07 18:41:13,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:13,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:14,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:14,415 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858912811] [2019-12-07 18:41:14,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:14,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:41:14,416 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708513] [2019-12-07 18:41:14,416 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:41:14,416 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:14,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:41:14,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:41:14,416 INFO L87 Difference]: Start difference. First operand 18220 states and 55644 transitions. Second operand 16 states. [2019-12-07 18:41:16,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:16,197 INFO L93 Difference]: Finished difference Result 26457 states and 79327 transitions. [2019-12-07 18:41:16,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 18:41:16,198 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:41:16,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:16,227 INFO L225 Difference]: With dead ends: 26457 [2019-12-07 18:41:16,227 INFO L226 Difference]: Without dead ends: 24506 [2019-12-07 18:41:16,228 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 2 SyntacticMatches, 5 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 361 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=259, Invalid=1547, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 18:41:16,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24506 states. [2019-12-07 18:41:16,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24506 to 19539. [2019-12-07 18:41:16,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19539 states. [2019-12-07 18:41:16,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19539 states to 19539 states and 59147 transitions. [2019-12-07 18:41:16,533 INFO L78 Accepts]: Start accepts. Automaton has 19539 states and 59147 transitions. Word has length 67 [2019-12-07 18:41:16,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:16,533 INFO L462 AbstractCegarLoop]: Abstraction has 19539 states and 59147 transitions. [2019-12-07 18:41:16,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:41:16,533 INFO L276 IsEmpty]: Start isEmpty. Operand 19539 states and 59147 transitions. [2019-12-07 18:41:16,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:16,550 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:16,550 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:16,550 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:16,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:16,551 INFO L82 PathProgramCache]: Analyzing trace with hash 1468475269, now seen corresponding path program 10 times [2019-12-07 18:41:16,551 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:16,551 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31515030] [2019-12-07 18:41:16,551 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:16,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:16,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:16,668 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31515030] [2019-12-07 18:41:16,668 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:16,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:41:16,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1716914650] [2019-12-07 18:41:16,668 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:41:16,668 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:16,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:41:16,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:41:16,669 INFO L87 Difference]: Start difference. First operand 19539 states and 59147 transitions. Second operand 11 states. [2019-12-07 18:41:17,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:17,331 INFO L93 Difference]: Finished difference Result 42641 states and 129018 transitions. [2019-12-07 18:41:17,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:41:17,332 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:41:17,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:17,361 INFO L225 Difference]: With dead ends: 42641 [2019-12-07 18:41:17,361 INFO L226 Difference]: Without dead ends: 27744 [2019-12-07 18:41:17,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 241 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=853, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 18:41:17,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27744 states. [2019-12-07 18:41:17,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27744 to 14935. [2019-12-07 18:41:17,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14935 states. [2019-12-07 18:41:17,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14935 states to 14935 states and 45228 transitions. [2019-12-07 18:41:17,655 INFO L78 Accepts]: Start accepts. Automaton has 14935 states and 45228 transitions. Word has length 67 [2019-12-07 18:41:17,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:17,655 INFO L462 AbstractCegarLoop]: Abstraction has 14935 states and 45228 transitions. [2019-12-07 18:41:17,655 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:41:17,655 INFO L276 IsEmpty]: Start isEmpty. Operand 14935 states and 45228 transitions. [2019-12-07 18:41:17,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:17,668 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:17,668 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:17,668 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:17,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:17,668 INFO L82 PathProgramCache]: Analyzing trace with hash 844805957, now seen corresponding path program 11 times [2019-12-07 18:41:17,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:17,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918706113] [2019-12-07 18:41:17,669 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:17,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:17,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:17,786 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918706113] [2019-12-07 18:41:17,787 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:17,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:41:17,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1075497768] [2019-12-07 18:41:17,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:41:17,787 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:17,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:41:17,787 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:41:17,787 INFO L87 Difference]: Start difference. First operand 14935 states and 45228 transitions. Second operand 12 states. [2019-12-07 18:41:18,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:18,523 INFO L93 Difference]: Finished difference Result 27486 states and 83217 transitions. [2019-12-07 18:41:18,524 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:41:18,524 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:41:18,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:18,566 INFO L225 Difference]: With dead ends: 27486 [2019-12-07 18:41:18,566 INFO L226 Difference]: Without dead ends: 27157 [2019-12-07 18:41:18,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:41:18,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27157 states. [2019-12-07 18:41:18,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27157 to 14683. [2019-12-07 18:41:18,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14683 states. [2019-12-07 18:41:18,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14683 states to 14683 states and 44551 transitions. [2019-12-07 18:41:18,865 INFO L78 Accepts]: Start accepts. Automaton has 14683 states and 44551 transitions. Word has length 67 [2019-12-07 18:41:18,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:18,865 INFO L462 AbstractCegarLoop]: Abstraction has 14683 states and 44551 transitions. [2019-12-07 18:41:18,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:41:18,865 INFO L276 IsEmpty]: Start isEmpty. Operand 14683 states and 44551 transitions. [2019-12-07 18:41:18,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:18,878 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:18,879 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:18,879 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:18,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:18,879 INFO L82 PathProgramCache]: Analyzing trace with hash 656134515, now seen corresponding path program 12 times [2019-12-07 18:41:18,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:18,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911428489] [2019-12-07 18:41:18,879 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:18,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:41:18,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:41:18,962 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:41:18,962 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:41:18,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~a$r_buff1_thd0~0_203 0) (= 0 v_~a$r_buff1_thd1~0_191) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t287~0.base_37| 4)) (= v_~z~0_36 0) (= v_~a$r_buff0_thd0~0_228 0) (= 0 v_~a$r_buff0_thd1~0_317) (= 0 v_~a$read_delayed_var~0.base_8) (= (select .cse0 |v_ULTIMATE.start_main_~#t287~0.base_37|) 0) (= 0 v_~a$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_42 0) (= v_~a$r_buff0_thd3~0_430 0) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= v_~__unbuffered_cnt~0_111 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x~0_176) (= v_~__unbuffered_p1_EBX~0_55 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t287~0.base_37| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t287~0.base_37|) |v_ULTIMATE.start_main_~#t287~0.offset_26| 0)) |v_#memory_int_23|) (= 0 |v_#NULL.base_4|) (= v_~a$mem_tmp~0_16 0) (= 0 v_~a$w_buff0_used~0_889) (= v_~a$w_buff0~0_416 0) (= v_~a$r_buff1_thd3~0_333 0) (= 0 v_~a$w_buff1_used~0_596) (= |v_#NULL.offset_4| 0) (= 0 v_~a$w_buff1~0_333) (= 0 v_~a$r_buff1_thd2~0_185) (= v_~a~0_191 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t287~0.base_37| 1)) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~weak$$choice0~0_13) (= v_~weak$$choice2~0_131 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t287~0.base_37|) (= v_~y~0_31 0) (= 0 v_~a$read_delayed~0_8) (= |v_ULTIMATE.start_main_~#t287~0.offset_26| 0) (= v_~a$flush_delayed~0_26 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t288~0.base=|v_ULTIMATE.start_main_~#t288~0.base_38|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ULTIMATE.start_main_~#t288~0.offset=|v_ULTIMATE.start_main_~#t288~0.offset_26|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_228, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_127|, ~a~0=v_~a~0_191, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_333, ULTIMATE.start_main_~#t289~0.base=|v_ULTIMATE.start_main_~#t289~0.base_30|, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_889, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_317, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_416, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_203, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, ~x~0=v_~x~0_176, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_67|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~a$w_buff1~0=v_~a$w_buff1~0_333, ULTIMATE.start_main_~#t287~0.offset=|v_ULTIMATE.start_main_~#t287~0.offset_26|, ~y~0=v_~y~0_31, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_55, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_~#t289~0.offset=|v_ULTIMATE.start_main_~#t289~0.offset_18|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_191, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_430, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t287~0.base=|v_ULTIMATE.start_main_~#t287~0.base_37|, ~a$flush_delayed~0=v_~a$flush_delayed~0_26, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_36, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_596, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t288~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t288~0.offset, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ULTIMATE.start_main_~#t289~0.base, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t287~0.offset, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t289~0.offset, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t287~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:41:18,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t288~0.base_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t288~0.base_13| 4) |v_#length_17|) (= |v_ULTIMATE.start_main_~#t288~0.offset_11| 0) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t288~0.base_13|)) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t288~0.base_13| 1) |v_#valid_40|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t288~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t288~0.base_13|) |v_ULTIMATE.start_main_~#t288~0.offset_11| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t288~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t288~0.base=|v_ULTIMATE.start_main_~#t288~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t288~0.offset=|v_ULTIMATE.start_main_~#t288~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t288~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t288~0.offset] because there is no mapped edge [2019-12-07 18:41:18,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L750: Formula: (and (= v_~a$r_buff0_thd1~0_28 v_~a$r_buff1_thd1~0_23) (= v_~a$r_buff0_thd2~0_20 v_~a$r_buff1_thd2~0_16) (= v_~a$r_buff0_thd0~0_18 v_~a$r_buff1_thd0~0_17) (= v_~a$r_buff0_thd1~0_27 1) (= 1 v_~x~0_7) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~a$r_buff0_thd3~0_73 v_~a$r_buff1_thd3~0_40)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_28, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18} OutVars{~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_23, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_40, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_16, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_17, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_27, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18, ~x~0=v_~x~0_7} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:41:18,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L776-2-->L776-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-698442741 256))) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-698442741 256) 0))) (or (and (= ~a$w_buff1~0_In-698442741 |P1Thread1of1ForFork2_#t~ite9_Out-698442741|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a~0_In-698442741 |P1Thread1of1ForFork2_#t~ite9_Out-698442741|)))) InVars {~a~0=~a~0_In-698442741, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} OutVars{~a~0=~a~0_In-698442741, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-698442741|, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:41:18,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_47) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_47, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:41:18,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In857221944 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In857221944 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out857221944| 0)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out857221944| ~a$w_buff0_used~0_In857221944) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In857221944, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In857221944} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out857221944|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In857221944, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In857221944} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:41:18,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-732052024 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-732052024 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd1~0_In-732052024 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-732052024 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-732052024|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-732052024 |P0Thread1of1ForFork1_#t~ite6_Out-732052024|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-732052024, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-732052024} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-732052024|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-732052024, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-732052024} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:41:18,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L753-->L754: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_In-1350836257 ~a$r_buff0_thd1~0_Out-1350836257)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1350836257 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1350836257 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-1350836257) (not .cse0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1350836257} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1350836257|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1350836257} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:41:18,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L754-->L754-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In1196256965 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In1196256965 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In1196256965 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1196256965 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1196256965| ~a$r_buff1_thd1~0_In1196256965) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1196256965| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1196256965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1196256965} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1196256965|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1196256965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1196256965} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:41:18,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_148 |v_P0Thread1of1ForFork1_#t~ite8_50|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_148, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:41:18,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L837-1-->L839: Formula: (and (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t289~0.base_12| 1)) (= |v_ULTIMATE.start_main_~#t289~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t289~0.base_12| 4)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t289~0.base_12|)) (not (= 0 |v_ULTIMATE.start_main_~#t289~0.base_12|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t289~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t289~0.base_12|) |v_ULTIMATE.start_main_~#t289~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t289~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t289~0.offset=|v_ULTIMATE.start_main_~#t289~0.offset_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t289~0.base=|v_ULTIMATE.start_main_~#t289~0.base_12|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t289~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t289~0.base, #length] because there is no mapped edge [2019-12-07 18:41:18,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2128766623 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out-2128766623| ~a$w_buff0~0_In-2128766623) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2128766623 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-2128766623 256)) (and (= (mod ~a$w_buff1_used~0_In-2128766623 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In-2128766623 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite21_Out-2128766623| |P2Thread1of1ForFork0_#t~ite20_Out-2128766623|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-2128766623| ~a$w_buff0~0_In-2128766623) (= |P2Thread1of1ForFork0_#t~ite20_In-2128766623| |P2Thread1of1ForFork0_#t~ite20_Out-2128766623|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-2128766623, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-2128766623|, ~weak$$choice2~0=~weak$$choice2~0_In-2128766623} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-2128766623|, ~a$w_buff0~0=~a$w_buff0~0_In-2128766623, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-2128766623|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623, ~weak$$choice2~0=~weak$$choice2~0_In-2128766623} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:41:18,970 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L803-->L803-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-954633407 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-954633407 256)))) (or (and .cse0 (= (mod ~a$w_buff1_used~0_In-954633407 256) 0)) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-954633407 256))) (= (mod ~a$w_buff0_used~0_In-954633407 256) 0))) (= ~a$w_buff0_used~0_In-954633407 |P2Thread1of1ForFork0_#t~ite26_Out-954633407|) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-954633407| |P2Thread1of1ForFork0_#t~ite27_Out-954633407|)) (and (= ~a$w_buff0_used~0_In-954633407 |P2Thread1of1ForFork0_#t~ite27_Out-954633407|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In-954633407| |P2Thread1of1ForFork0_#t~ite26_Out-954633407|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-954633407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-954633407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-954633407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-954633407, ~weak$$choice2~0=~weak$$choice2~0_In-954633407} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-954633407|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-954633407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-954633407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-954633407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-954633407, ~weak$$choice2~0=~weak$$choice2~0_In-954633407} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:41:18,971 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1483486921 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite30_Out1483486921| ~a$w_buff1_used~0_In1483486921) (= |P2Thread1of1ForFork0_#t~ite29_In1483486921| |P2Thread1of1ForFork0_#t~ite29_Out1483486921|)) (and (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1483486921 256)))) (or (= (mod ~a$w_buff0_used~0_In1483486921 256) 0) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1483486921 256) 0)) (and (= (mod ~a$w_buff1_used~0_In1483486921 256) 0) .cse1))) .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out1483486921| ~a$w_buff1_used~0_In1483486921) (= |P2Thread1of1ForFork0_#t~ite30_Out1483486921| |P2Thread1of1ForFork0_#t~ite29_Out1483486921|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1483486921, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483486921, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483486921, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921, ~weak$$choice2~0=~weak$$choice2~0_In1483486921, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1483486921|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1483486921, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483486921, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483486921, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1483486921|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1483486921|, ~weak$$choice2~0=~weak$$choice2~0_In1483486921} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:41:18,971 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L805-->L806: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~a$r_buff0_thd3~0_136 v_~a$r_buff0_thd3~0_135)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_135, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:41:18,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_12 0) (= v_~a~0_57 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_57, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:41:18,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L812-2-->L812-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In620891655 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In620891655 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out620891655| ~a$w_buff1~0_In620891655)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out620891655| ~a~0_In620891655)))) InVars {~a~0=~a~0_In620891655, ~a$w_buff1~0=~a$w_buff1~0_In620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In620891655, ~a$w_buff1_used~0=~a$w_buff1_used~0_In620891655} OutVars{~a~0=~a~0_In620891655, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out620891655|, ~a$w_buff1~0=~a$w_buff1~0_In620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In620891655, ~a$w_buff1_used~0=~a$w_buff1_used~0_In620891655} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:41:18,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L812-4-->L813: Formula: (= v_~a~0_20 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_20, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:41:18,972 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-242601350 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-242601350 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-242601350| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-242601350 |P2Thread1of1ForFork0_#t~ite40_Out-242601350|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-242601350|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:41:18,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd3~0_In-1862954145 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1862954145 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1862954145 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1862954145 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1862954145| ~a$w_buff1_used~0_In-1862954145)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1862954145|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1862954145|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:41:18,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1439427895 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1439427895 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1439427895| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1439427895| ~a$r_buff0_thd3~0_In1439427895) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1439427895|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:41:18,973 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In542272179 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In542272179 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In542272179 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In542272179 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out542272179|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In542272179 |P2Thread1of1ForFork0_#t~ite43_Out542272179|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In542272179, ~a$w_buff0_used~0=~a$w_buff0_used~0_In542272179, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In542272179, ~a$w_buff1_used~0=~a$w_buff1_used~0_In542272179} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out542272179|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In542272179, ~a$w_buff0_used~0=~a$w_buff0_used~0_In542272179, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In542272179, ~a$w_buff1_used~0=~a$w_buff1_used~0_In542272179} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:41:18,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_122 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_122, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:41:18,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1099508783 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1099508783 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1099508783| ~a$w_buff0_used~0_In1099508783) (or .cse0 .cse1)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out1099508783| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1099508783|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:41:18,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-864958858 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-864958858 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-864958858 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-864958858 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-864958858| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-864958858| ~a$w_buff1_used~0_In-864958858) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-864958858, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-864958858, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-864958858, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-864958858} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-864958858, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-864958858, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-864958858, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-864958858|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-864958858} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:41:18,974 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1632737010 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1632737010 256)))) (or (and (= ~a$r_buff0_thd2~0_In-1632737010 |P1Thread1of1ForFork2_#t~ite13_Out-1632737010|) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1632737010| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1632737010, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1632737010} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1632737010, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1632737010, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1632737010|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:41:18,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-2030690428 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-2030690428 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-2030690428 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In-2030690428 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out-2030690428| ~a$r_buff1_thd2~0_In-2030690428) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-2030690428| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2030690428, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2030690428, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2030690428|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:41:18,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_79) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_79, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:41:18,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L839-1-->L845: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:41:18,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L845-2-->L845-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-222160885 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-222160885 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-222160885| ~a~0_In-222160885)) (and (not .cse1) (= ~a$w_buff1~0_In-222160885 |ULTIMATE.start_main_#t~ite47_Out-222160885|) (not .cse0)))) InVars {~a~0=~a~0_In-222160885, ~a$w_buff1~0=~a$w_buff1~0_In-222160885, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-222160885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-222160885} OutVars{~a~0=~a~0_In-222160885, ~a$w_buff1~0=~a$w_buff1~0_In-222160885, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-222160885|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-222160885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-222160885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:41:18,975 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L845-4-->L846: Formula: (= v_~a~0_30 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_30, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:41:18,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1368432698 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1368432698 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1368432698| ~a$w_buff0_used~0_In1368432698) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out1368432698| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1368432698|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:41:18,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L847-->L847-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1841604176 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1841604176 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1841604176 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In1841604176 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1841604176 |ULTIMATE.start_main_#t~ite50_Out1841604176|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1841604176|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1841604176|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:41:18,976 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-1127002274 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-1127002274 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1127002274| 0)) (and (= ~a$r_buff0_thd0~0_In-1127002274 |ULTIMATE.start_main_#t~ite51_Out-1127002274|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1127002274, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1127002274} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1127002274|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1127002274, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1127002274} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:41:18,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1870467941 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1870467941 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-1870467941 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1870467941 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd0~0_In-1870467941 |ULTIMATE.start_main_#t~ite52_Out-1870467941|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1870467941|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1870467941|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:41:18,977 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~a$r_buff1_thd0~0_158 |v_ULTIMATE.start_main_#t~ite52_40|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_18 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 2 v_~x~0_125) (= v_~__unbuffered_p1_EBX~0_21 0) (= v_~__unbuffered_p2_EBX~0_24 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_158, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:41:19,030 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:41:19 BasicIcfg [2019-12-07 18:41:19,030 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:41:19,030 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:41:19,030 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:41:19,031 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:41:19,031 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:38:18" (3/4) ... [2019-12-07 18:41:19,033 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:41:19,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~a$r_buff1_thd0~0_203 0) (= 0 v_~a$r_buff1_thd1~0_191) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t287~0.base_37| 4)) (= v_~z~0_36 0) (= v_~a$r_buff0_thd0~0_228 0) (= 0 v_~a$r_buff0_thd1~0_317) (= 0 v_~a$read_delayed_var~0.base_8) (= (select .cse0 |v_ULTIMATE.start_main_~#t287~0.base_37|) 0) (= 0 v_~a$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_42 0) (= v_~a$r_buff0_thd3~0_430 0) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= v_~__unbuffered_cnt~0_111 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x~0_176) (= v_~__unbuffered_p1_EBX~0_55 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t287~0.base_37| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t287~0.base_37|) |v_ULTIMATE.start_main_~#t287~0.offset_26| 0)) |v_#memory_int_23|) (= 0 |v_#NULL.base_4|) (= v_~a$mem_tmp~0_16 0) (= 0 v_~a$w_buff0_used~0_889) (= v_~a$w_buff0~0_416 0) (= v_~a$r_buff1_thd3~0_333 0) (= 0 v_~a$w_buff1_used~0_596) (= |v_#NULL.offset_4| 0) (= 0 v_~a$w_buff1~0_333) (= 0 v_~a$r_buff1_thd2~0_185) (= v_~a~0_191 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t287~0.base_37| 1)) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~weak$$choice0~0_13) (= v_~weak$$choice2~0_131 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t287~0.base_37|) (= v_~y~0_31 0) (= 0 v_~a$read_delayed~0_8) (= |v_ULTIMATE.start_main_~#t287~0.offset_26| 0) (= v_~a$flush_delayed~0_26 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t288~0.base=|v_ULTIMATE.start_main_~#t288~0.base_38|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ULTIMATE.start_main_~#t288~0.offset=|v_ULTIMATE.start_main_~#t288~0.offset_26|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_228, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_127|, ~a~0=v_~a~0_191, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_333, ULTIMATE.start_main_~#t289~0.base=|v_ULTIMATE.start_main_~#t289~0.base_30|, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_889, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_317, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_416, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_203, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, ~x~0=v_~x~0_176, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_67|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~a$w_buff1~0=v_~a$w_buff1~0_333, ULTIMATE.start_main_~#t287~0.offset=|v_ULTIMATE.start_main_~#t287~0.offset_26|, ~y~0=v_~y~0_31, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_55, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_~#t289~0.offset=|v_ULTIMATE.start_main_~#t289~0.offset_18|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_191, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_430, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t287~0.base=|v_ULTIMATE.start_main_~#t287~0.base_37|, ~a$flush_delayed~0=v_~a$flush_delayed~0_26, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_36, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_596, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t288~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t288~0.offset, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ULTIMATE.start_main_~#t289~0.base, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t287~0.offset, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t289~0.offset, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t287~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:41:19,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t288~0.base_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t288~0.base_13| 4) |v_#length_17|) (= |v_ULTIMATE.start_main_~#t288~0.offset_11| 0) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t288~0.base_13|)) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t288~0.base_13| 1) |v_#valid_40|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t288~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t288~0.base_13|) |v_ULTIMATE.start_main_~#t288~0.offset_11| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t288~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t288~0.base=|v_ULTIMATE.start_main_~#t288~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t288~0.offset=|v_ULTIMATE.start_main_~#t288~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t288~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t288~0.offset] because there is no mapped edge [2019-12-07 18:41:19,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L750: Formula: (and (= v_~a$r_buff0_thd1~0_28 v_~a$r_buff1_thd1~0_23) (= v_~a$r_buff0_thd2~0_20 v_~a$r_buff1_thd2~0_16) (= v_~a$r_buff0_thd0~0_18 v_~a$r_buff1_thd0~0_17) (= v_~a$r_buff0_thd1~0_27 1) (= 1 v_~x~0_7) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~a$r_buff0_thd3~0_73 v_~a$r_buff1_thd3~0_40)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_28, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18} OutVars{~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_23, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_40, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_16, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_17, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_27, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18, ~x~0=v_~x~0_7} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:41:19,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L776-2-->L776-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-698442741 256))) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-698442741 256) 0))) (or (and (= ~a$w_buff1~0_In-698442741 |P1Thread1of1ForFork2_#t~ite9_Out-698442741|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a~0_In-698442741 |P1Thread1of1ForFork2_#t~ite9_Out-698442741|)))) InVars {~a~0=~a~0_In-698442741, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} OutVars{~a~0=~a~0_In-698442741, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-698442741|, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:41:19,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_47) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_47, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:41:19,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In857221944 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In857221944 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out857221944| 0)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out857221944| ~a$w_buff0_used~0_In857221944) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In857221944, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In857221944} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out857221944|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In857221944, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In857221944} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:41:19,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-732052024 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-732052024 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd1~0_In-732052024 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-732052024 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-732052024|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-732052024 |P0Thread1of1ForFork1_#t~ite6_Out-732052024|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-732052024, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-732052024} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-732052024|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-732052024, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-732052024} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:41:19,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L753-->L754: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_In-1350836257 ~a$r_buff0_thd1~0_Out-1350836257)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1350836257 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1350836257 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= 0 ~a$r_buff0_thd1~0_Out-1350836257) (not .cse0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1350836257} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1350836257|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1350836257} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:41:19,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L754-->L754-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In1196256965 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In1196256965 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In1196256965 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1196256965 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1196256965| ~a$r_buff1_thd1~0_In1196256965) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1196256965| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1196256965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1196256965} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1196256965|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1196256965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1196256965} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:41:19,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_148 |v_P0Thread1of1ForFork1_#t~ite8_50|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_148, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:41:19,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L837-1-->L839: Formula: (and (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t289~0.base_12| 1)) (= |v_ULTIMATE.start_main_~#t289~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t289~0.base_12| 4)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t289~0.base_12|)) (not (= 0 |v_ULTIMATE.start_main_~#t289~0.base_12|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t289~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t289~0.base_12|) |v_ULTIMATE.start_main_~#t289~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t289~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t289~0.offset=|v_ULTIMATE.start_main_~#t289~0.offset_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t289~0.base=|v_ULTIMATE.start_main_~#t289~0.base_12|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t289~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t289~0.base, #length] because there is no mapped edge [2019-12-07 18:41:19,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2128766623 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out-2128766623| ~a$w_buff0~0_In-2128766623) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2128766623 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-2128766623 256)) (and (= (mod ~a$w_buff1_used~0_In-2128766623 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In-2128766623 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite21_Out-2128766623| |P2Thread1of1ForFork0_#t~ite20_Out-2128766623|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-2128766623| ~a$w_buff0~0_In-2128766623) (= |P2Thread1of1ForFork0_#t~ite20_In-2128766623| |P2Thread1of1ForFork0_#t~ite20_Out-2128766623|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-2128766623, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-2128766623|, ~weak$$choice2~0=~weak$$choice2~0_In-2128766623} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-2128766623|, ~a$w_buff0~0=~a$w_buff0~0_In-2128766623, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-2128766623|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623, ~weak$$choice2~0=~weak$$choice2~0_In-2128766623} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:41:19,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L803-->L803-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-954633407 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-954633407 256)))) (or (and .cse0 (= (mod ~a$w_buff1_used~0_In-954633407 256) 0)) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-954633407 256))) (= (mod ~a$w_buff0_used~0_In-954633407 256) 0))) (= ~a$w_buff0_used~0_In-954633407 |P2Thread1of1ForFork0_#t~ite26_Out-954633407|) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-954633407| |P2Thread1of1ForFork0_#t~ite27_Out-954633407|)) (and (= ~a$w_buff0_used~0_In-954633407 |P2Thread1of1ForFork0_#t~ite27_Out-954633407|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In-954633407| |P2Thread1of1ForFork0_#t~ite26_Out-954633407|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-954633407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-954633407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-954633407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-954633407, ~weak$$choice2~0=~weak$$choice2~0_In-954633407} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-954633407|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-954633407|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-954633407, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-954633407, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-954633407, ~weak$$choice2~0=~weak$$choice2~0_In-954633407} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:41:19,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1483486921 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite30_Out1483486921| ~a$w_buff1_used~0_In1483486921) (= |P2Thread1of1ForFork0_#t~ite29_In1483486921| |P2Thread1of1ForFork0_#t~ite29_Out1483486921|)) (and (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1483486921 256)))) (or (= (mod ~a$w_buff0_used~0_In1483486921 256) 0) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1483486921 256) 0)) (and (= (mod ~a$w_buff1_used~0_In1483486921 256) 0) .cse1))) .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out1483486921| ~a$w_buff1_used~0_In1483486921) (= |P2Thread1of1ForFork0_#t~ite30_Out1483486921| |P2Thread1of1ForFork0_#t~ite29_Out1483486921|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1483486921, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483486921, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483486921, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921, ~weak$$choice2~0=~weak$$choice2~0_In1483486921, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1483486921|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1483486921, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483486921, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483486921, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1483486921|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1483486921|, ~weak$$choice2~0=~weak$$choice2~0_In1483486921} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:41:19,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L805-->L806: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~a$r_buff0_thd3~0_136 v_~a$r_buff0_thd3~0_135)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_135, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:41:19,042 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_12 0) (= v_~a~0_57 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_57, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:41:19,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L812-2-->L812-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In620891655 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In620891655 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out620891655| ~a$w_buff1~0_In620891655)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out620891655| ~a~0_In620891655)))) InVars {~a~0=~a~0_In620891655, ~a$w_buff1~0=~a$w_buff1~0_In620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In620891655, ~a$w_buff1_used~0=~a$w_buff1_used~0_In620891655} OutVars{~a~0=~a~0_In620891655, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out620891655|, ~a$w_buff1~0=~a$w_buff1~0_In620891655, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In620891655, ~a$w_buff1_used~0=~a$w_buff1_used~0_In620891655} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:41:19,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L812-4-->L813: Formula: (= v_~a~0_20 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_20, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:41:19,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-242601350 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-242601350 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-242601350| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-242601350 |P2Thread1of1ForFork0_#t~ite40_Out-242601350|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-242601350|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:41:19,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd3~0_In-1862954145 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1862954145 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1862954145 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1862954145 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1862954145| ~a$w_buff1_used~0_In-1862954145)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1862954145|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1862954145, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1862954145, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1862954145, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1862954145, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1862954145|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:41:19,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1439427895 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1439427895 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1439427895| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1439427895| ~a$r_buff0_thd3~0_In1439427895) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1439427895, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1439427895, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1439427895|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:41:19,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In542272179 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In542272179 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In542272179 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In542272179 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out542272179|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In542272179 |P2Thread1of1ForFork0_#t~ite43_Out542272179|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In542272179, ~a$w_buff0_used~0=~a$w_buff0_used~0_In542272179, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In542272179, ~a$w_buff1_used~0=~a$w_buff1_used~0_In542272179} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out542272179|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In542272179, ~a$w_buff0_used~0=~a$w_buff0_used~0_In542272179, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In542272179, ~a$w_buff1_used~0=~a$w_buff1_used~0_In542272179} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:41:19,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_122 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_122, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:41:19,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1099508783 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1099508783 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1099508783| ~a$w_buff0_used~0_In1099508783) (or .cse0 .cse1)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out1099508783| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1099508783|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:41:19,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-864958858 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-864958858 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-864958858 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-864958858 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-864958858| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-864958858| ~a$w_buff1_used~0_In-864958858) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-864958858, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-864958858, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-864958858, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-864958858} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-864958858, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-864958858, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-864958858, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-864958858|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-864958858} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:41:19,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1632737010 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1632737010 256)))) (or (and (= ~a$r_buff0_thd2~0_In-1632737010 |P1Thread1of1ForFork2_#t~ite13_Out-1632737010|) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1632737010| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1632737010, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1632737010} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1632737010, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1632737010, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1632737010|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:41:19,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-2030690428 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-2030690428 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-2030690428 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In-2030690428 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out-2030690428| ~a$r_buff1_thd2~0_In-2030690428) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-2030690428| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2030690428, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2030690428, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2030690428|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:41:19,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_79) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_79, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:41:19,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L839-1-->L845: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:41:19,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L845-2-->L845-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-222160885 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-222160885 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-222160885| ~a~0_In-222160885)) (and (not .cse1) (= ~a$w_buff1~0_In-222160885 |ULTIMATE.start_main_#t~ite47_Out-222160885|) (not .cse0)))) InVars {~a~0=~a~0_In-222160885, ~a$w_buff1~0=~a$w_buff1~0_In-222160885, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-222160885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-222160885} OutVars{~a~0=~a~0_In-222160885, ~a$w_buff1~0=~a$w_buff1~0_In-222160885, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-222160885|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-222160885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-222160885} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:41:19,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L845-4-->L846: Formula: (= v_~a~0_30 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_30, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:41:19,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1368432698 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1368432698 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1368432698| ~a$w_buff0_used~0_In1368432698) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out1368432698| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1368432698|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:41:19,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L847-->L847-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1841604176 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1841604176 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1841604176 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In1841604176 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1841604176 |ULTIMATE.start_main_#t~ite50_Out1841604176|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1841604176|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1841604176|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:41:19,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-1127002274 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-1127002274 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1127002274| 0)) (and (= ~a$r_buff0_thd0~0_In-1127002274 |ULTIMATE.start_main_#t~ite51_Out-1127002274|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1127002274, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1127002274} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1127002274|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1127002274, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1127002274} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:41:19,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1870467941 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1870467941 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-1870467941 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1870467941 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd0~0_In-1870467941 |ULTIMATE.start_main_#t~ite52_Out-1870467941|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1870467941|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1870467941|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:41:19,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~a$r_buff1_thd0~0_158 |v_ULTIMATE.start_main_#t~ite52_40|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_18 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 2 v_~x~0_125) (= v_~__unbuffered_p1_EBX~0_21 0) (= v_~__unbuffered_p2_EBX~0_24 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_158, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:41:19,110 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_e1c85e6c-b739-4cee-9e96-d4b3809634a9/bin/uautomizer/witness.graphml [2019-12-07 18:41:19,110 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:41:19,112 INFO L168 Benchmark]: Toolchain (without parser) took 181106.44 ms. Allocated memory was 1.0 GB in the beginning and 8.3 GB in the end (delta: 7.3 GB). Free memory was 937.1 MB in the beginning and 3.1 GB in the end (delta: -2.2 GB). Peak memory consumption was 5.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:41:19,112 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:41:19,112 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.50 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -133.3 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:41:19,113 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.31 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:41:19,113 INFO L168 Benchmark]: Boogie Preprocessor took 25.42 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:41:19,113 INFO L168 Benchmark]: RCFGBuilder took 404.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:41:19,114 INFO L168 Benchmark]: TraceAbstraction took 180176.18 ms. Allocated memory was 1.1 GB in the beginning and 8.3 GB in the end (delta: 7.2 GB). Free memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 5.0 GB. Max. memory is 11.5 GB. [2019-12-07 18:41:19,114 INFO L168 Benchmark]: Witness Printer took 80.20 ms. Allocated memory is still 8.3 GB. Free memory was 3.2 GB in the beginning and 3.1 GB in the end (delta: 41.3 MB). Peak memory consumption was 41.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:41:19,116 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 380.50 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -133.3 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.31 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.42 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 404.29 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 180176.18 ms. Allocated memory was 1.1 GB in the beginning and 8.3 GB in the end (delta: 7.2 GB). Free memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 5.0 GB. Max. memory is 11.5 GB. * Witness Printer took 80.20 ms. Allocated memory is still 8.3 GB. Free memory was 3.2 GB in the beginning and 3.1 GB in the end (delta: 41.3 MB). Peak memory consumption was 41.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 94 ProgramPointsAfterwards, 215 TransitionsBefore, 103 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7568 VarBasedMoverChecksPositive, 290 VarBasedMoverChecksNegative, 97 SemBasedMoverChecksPositive, 263 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 90866 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t287, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t288, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L735] 1 a$w_buff1 = a$w_buff0 [L736] 1 a$w_buff0 = 1 [L737] 1 a$w_buff1_used = a$w_buff0_used [L738] 1 a$w_buff0_used = (_Bool)1 [L750] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L764] 2 x = 2 [L767] 2 y = 1 [L770] 2 __unbuffered_p1_EAX = y [L773] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L750] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L751] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L752] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L839] FCALL, FORK 0 pthread_create(&t289, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L790] 3 z = 1 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=2, y=1, z=1] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L812] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L845] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 180.0s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 59.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8294 SDtfs, 12591 SDslu, 35618 SDs, 0 SdLazy, 37855 SolverSat, 692 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 28.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 619 GetRequests, 43 SyntacticMatches, 28 SemanticMatches, 548 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7886 ImplicationChecksByTransitivity, 9.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=344733occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 95.1s AutomataMinimizationTime, 28 MinimizatonAttempts, 429773 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.0s InterpolantComputationTime, 1345 NumberOfCodeBlocks, 1345 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 1250 ConstructedInterpolants, 0 QuantifiedInterpolants, 579678 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...