./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix011_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix011_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d0c857540f60da97f28da9d00344b0959aa1d4c3 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:57:34,957 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:57:34,958 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:57:34,966 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:57:34,966 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:57:34,966 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:57:34,967 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:57:34,969 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:57:34,970 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:57:34,970 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:57:34,971 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:57:34,972 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:57:34,972 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:57:34,973 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:57:34,973 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:57:34,974 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:57:34,975 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:57:34,975 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:57:34,977 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:57:34,978 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:57:34,979 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:57:34,980 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:57:34,981 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:57:34,981 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:57:34,983 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:57:34,983 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:57:34,983 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:57:34,984 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:57:34,984 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:57:34,984 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:57:34,984 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:57:34,985 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:57:34,985 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:57:34,986 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:57:34,986 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:57:34,986 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:57:34,987 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:57:34,987 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:57:34,987 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:57:34,988 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:57:34,988 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:57:34,988 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:57:34,997 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:57:34,998 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:57:34,998 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:57:34,998 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:57:34,999 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:57:34,999 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:57:35,000 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:57:35,000 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:57:35,000 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:57:35,000 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:57:35,000 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:57:35,000 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:57:35,000 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:57:35,000 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:57:35,000 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:57:35,001 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:57:35,001 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:57:35,001 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:57:35,001 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:57:35,001 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:57:35,001 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:57:35,001 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d0c857540f60da97f28da9d00344b0959aa1d4c3 [2019-12-07 16:57:35,101 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:57:35,111 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:57:35,113 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:57:35,115 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:57:35,115 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:57:35,116 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix011_rmo.oepc.i [2019-12-07 16:57:35,160 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/data/63d08b334/2ec3a317f0954ff398ee5ad9fd5afcda/FLAGc9d92a821 [2019-12-07 16:57:35,616 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:57:35,616 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/sv-benchmarks/c/pthread-wmm/mix011_rmo.oepc.i [2019-12-07 16:57:35,628 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/data/63d08b334/2ec3a317f0954ff398ee5ad9fd5afcda/FLAGc9d92a821 [2019-12-07 16:57:35,638 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/data/63d08b334/2ec3a317f0954ff398ee5ad9fd5afcda [2019-12-07 16:57:35,640 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:57:35,641 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:57:35,642 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:57:35,642 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:57:35,645 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:57:35,645 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:57:35" (1/1) ... [2019-12-07 16:57:35,647 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@64f07b81 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:35, skipping insertion in model container [2019-12-07 16:57:35,647 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:57:35" (1/1) ... [2019-12-07 16:57:35,652 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:57:35,688 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:57:35,970 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:57:35,978 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:57:36,023 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:57:36,076 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:57:36,076 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36 WrapperNode [2019-12-07 16:57:36,076 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:57:36,077 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:57:36,077 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:57:36,077 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:57:36,082 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,096 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,113 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:57:36,114 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:57:36,114 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:57:36,114 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:57:36,120 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,120 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,123 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,123 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,130 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,133 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,136 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... [2019-12-07 16:57:36,139 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:57:36,139 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:57:36,139 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:57:36,139 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:57:36,140 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:57:36,182 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:57:36,183 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:57:36,183 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:57:36,183 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:57:36,183 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:57:36,183 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:57:36,183 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:57:36,183 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:57:36,183 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 16:57:36,183 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 16:57:36,183 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:57:36,184 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:57:36,184 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:57:36,185 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:57:36,545 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:57:36,546 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:57:36,547 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:57:36 BoogieIcfgContainer [2019-12-07 16:57:36,547 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:57:36,548 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:57:36,548 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:57:36,550 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:57:36,551 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:57:35" (1/3) ... [2019-12-07 16:57:36,551 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a2b409c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:57:36, skipping insertion in model container [2019-12-07 16:57:36,551 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:57:36" (2/3) ... [2019-12-07 16:57:36,552 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a2b409c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:57:36, skipping insertion in model container [2019-12-07 16:57:36,552 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:57:36" (3/3) ... [2019-12-07 16:57:36,553 INFO L109 eAbstractionObserver]: Analyzing ICFG mix011_rmo.oepc.i [2019-12-07 16:57:36,562 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:57:36,562 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:57:36,568 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:57:36,569 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:57:36,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,596 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,596 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,596 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,596 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,596 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,600 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,600 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,600 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,601 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,607 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,607 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,617 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,617 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,617 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,617 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,617 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,617 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,618 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,618 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,618 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,618 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,618 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,618 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,618 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,619 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,619 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,619 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,619 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,619 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,619 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,620 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,620 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,620 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,620 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,620 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,620 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,621 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,621 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,621 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,621 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,621 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,621 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,621 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,622 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,622 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,622 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,622 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,622 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,622 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,623 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,623 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,623 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,623 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,623 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,623 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,624 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,624 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,624 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,624 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,624 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,624 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,625 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,625 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,625 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:57:36,639 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 16:57:36,652 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:57:36,653 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:57:36,653 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:57:36,653 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:57:36,653 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:57:36,653 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:57:36,653 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:57:36,653 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:57:36,665 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 16:57:36,666 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 16:57:36,730 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 16:57:36,730 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:57:36,741 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 692 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:57:36,756 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 16:57:36,787 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 16:57:36,787 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:57:36,792 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 692 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:57:36,808 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 16:57:36,809 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:57:39,934 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 16:57:40,030 INFO L206 etLargeBlockEncoding]: Checked pairs total: 90866 [2019-12-07 16:57:40,030 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 16:57:40,032 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 103 transitions [2019-12-07 16:57:57,103 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 123302 states. [2019-12-07 16:57:57,104 INFO L276 IsEmpty]: Start isEmpty. Operand 123302 states. [2019-12-07 16:57:57,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 16:57:57,109 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:57:57,110 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 16:57:57,110 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:57:57,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:57:57,114 INFO L82 PathProgramCache]: Analyzing trace with hash 918873, now seen corresponding path program 1 times [2019-12-07 16:57:57,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:57:57,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1777816614] [2019-12-07 16:57:57,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:57:57,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:57:57,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:57:57,264 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1777816614] [2019-12-07 16:57:57,265 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:57:57,265 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:57:57,266 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594009139] [2019-12-07 16:57:57,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:57:57,269 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:57:57,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:57:57,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:57:57,279 INFO L87 Difference]: Start difference. First operand 123302 states. Second operand 3 states. [2019-12-07 16:57:58,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:57:58,168 INFO L93 Difference]: Finished difference Result 122174 states and 518852 transitions. [2019-12-07 16:57:58,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:57:58,170 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 16:57:58,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:57:58,801 INFO L225 Difference]: With dead ends: 122174 [2019-12-07 16:57:58,802 INFO L226 Difference]: Without dead ends: 115076 [2019-12-07 16:57:58,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:04,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115076 states. [2019-12-07 16:58:06,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115076 to 115076. [2019-12-07 16:58:06,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115076 states. [2019-12-07 16:58:06,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115076 states to 115076 states and 488094 transitions. [2019-12-07 16:58:06,730 INFO L78 Accepts]: Start accepts. Automaton has 115076 states and 488094 transitions. Word has length 3 [2019-12-07 16:58:06,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:06,731 INFO L462 AbstractCegarLoop]: Abstraction has 115076 states and 488094 transitions. [2019-12-07 16:58:06,731 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:58:06,731 INFO L276 IsEmpty]: Start isEmpty. Operand 115076 states and 488094 transitions. [2019-12-07 16:58:06,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:58:06,733 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:06,733 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:06,733 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:06,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:06,734 INFO L82 PathProgramCache]: Analyzing trace with hash 1360334080, now seen corresponding path program 1 times [2019-12-07 16:58:06,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:06,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063305279] [2019-12-07 16:58:06,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:06,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:06,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:06,794 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1063305279] [2019-12-07 16:58:06,794 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:06,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:58:06,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121735500] [2019-12-07 16:58:06,795 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:58:06,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:06,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:58:06,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:58:06,796 INFO L87 Difference]: Start difference. First operand 115076 states and 488094 transitions. Second operand 4 states. [2019-12-07 16:58:07,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:07,657 INFO L93 Difference]: Finished difference Result 178684 states and 728513 transitions. [2019-12-07 16:58:07,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:58:07,657 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:58:07,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:08,093 INFO L225 Difference]: With dead ends: 178684 [2019-12-07 16:58:08,093 INFO L226 Difference]: Without dead ends: 178635 [2019-12-07 16:58:08,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:58:15,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178635 states. [2019-12-07 16:58:17,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178635 to 162755. [2019-12-07 16:58:17,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162755 states. [2019-12-07 16:58:17,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162755 states to 162755 states and 672033 transitions. [2019-12-07 16:58:17,884 INFO L78 Accepts]: Start accepts. Automaton has 162755 states and 672033 transitions. Word has length 11 [2019-12-07 16:58:17,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:17,884 INFO L462 AbstractCegarLoop]: Abstraction has 162755 states and 672033 transitions. [2019-12-07 16:58:17,884 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:58:17,884 INFO L276 IsEmpty]: Start isEmpty. Operand 162755 states and 672033 transitions. [2019-12-07 16:58:17,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:58:17,890 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:17,891 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:17,891 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:17,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:17,891 INFO L82 PathProgramCache]: Analyzing trace with hash 1888852276, now seen corresponding path program 1 times [2019-12-07 16:58:17,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:17,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129941399] [2019-12-07 16:58:17,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:17,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:17,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:17,950 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129941399] [2019-12-07 16:58:17,950 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:17,950 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:58:17,950 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1800851645] [2019-12-07 16:58:17,951 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:58:17,951 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:17,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:58:17,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:58:17,951 INFO L87 Difference]: Start difference. First operand 162755 states and 672033 transitions. Second operand 4 states. [2019-12-07 16:58:19,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:19,377 INFO L93 Difference]: Finished difference Result 229896 states and 928060 transitions. [2019-12-07 16:58:19,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:58:19,378 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:58:19,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:19,954 INFO L225 Difference]: With dead ends: 229896 [2019-12-07 16:58:19,954 INFO L226 Difference]: Without dead ends: 229840 [2019-12-07 16:58:19,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:58:26,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229840 states. [2019-12-07 16:58:30,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229840 to 194046. [2019-12-07 16:58:30,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194046 states. [2019-12-07 16:58:31,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194046 states to 194046 states and 796782 transitions. [2019-12-07 16:58:31,677 INFO L78 Accepts]: Start accepts. Automaton has 194046 states and 796782 transitions. Word has length 13 [2019-12-07 16:58:31,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:31,678 INFO L462 AbstractCegarLoop]: Abstraction has 194046 states and 796782 transitions. [2019-12-07 16:58:31,678 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:58:31,678 INFO L276 IsEmpty]: Start isEmpty. Operand 194046 states and 796782 transitions. [2019-12-07 16:58:31,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 16:58:31,686 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:31,686 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:31,686 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:31,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:31,686 INFO L82 PathProgramCache]: Analyzing trace with hash -1220224201, now seen corresponding path program 1 times [2019-12-07 16:58:31,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:31,686 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120681987] [2019-12-07 16:58:31,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:31,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:31,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:31,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120681987] [2019-12-07 16:58:31,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:31,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:58:31,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270071028] [2019-12-07 16:58:31,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:58:31,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:31,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:58:31,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:58:31,735 INFO L87 Difference]: Start difference. First operand 194046 states and 796782 transitions. Second operand 5 states. [2019-12-07 16:58:33,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:33,052 INFO L93 Difference]: Finished difference Result 261814 states and 1064888 transitions. [2019-12-07 16:58:33,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:58:33,053 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 16:58:33,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:33,715 INFO L225 Difference]: With dead ends: 261814 [2019-12-07 16:58:33,715 INFO L226 Difference]: Without dead ends: 261814 [2019-12-07 16:58:33,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:58:40,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261814 states. [2019-12-07 16:58:45,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261814 to 214683. [2019-12-07 16:58:45,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214683 states. [2019-12-07 16:58:46,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214683 states to 214683 states and 880739 transitions. [2019-12-07 16:58:46,812 INFO L78 Accepts]: Start accepts. Automaton has 214683 states and 880739 transitions. Word has length 16 [2019-12-07 16:58:46,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:46,813 INFO L462 AbstractCegarLoop]: Abstraction has 214683 states and 880739 transitions. [2019-12-07 16:58:46,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:58:46,813 INFO L276 IsEmpty]: Start isEmpty. Operand 214683 states and 880739 transitions. [2019-12-07 16:58:46,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 16:58:46,826 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:46,826 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:46,826 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:46,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:46,827 INFO L82 PathProgramCache]: Analyzing trace with hash 654894503, now seen corresponding path program 1 times [2019-12-07 16:58:46,827 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:46,827 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635389905] [2019-12-07 16:58:46,827 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:46,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:46,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:46,860 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635389905] [2019-12-07 16:58:46,860 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:46,860 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:58:46,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533702619] [2019-12-07 16:58:46,861 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:58:46,861 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:46,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:58:46,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:46,861 INFO L87 Difference]: Start difference. First operand 214683 states and 880739 transitions. Second operand 3 states. [2019-12-07 16:58:46,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:46,975 INFO L93 Difference]: Finished difference Result 40101 states and 129192 transitions. [2019-12-07 16:58:46,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:58:46,976 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 16:58:46,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:47,035 INFO L225 Difference]: With dead ends: 40101 [2019-12-07 16:58:47,035 INFO L226 Difference]: Without dead ends: 40101 [2019-12-07 16:58:47,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:47,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40101 states. [2019-12-07 16:58:47,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40101 to 39981. [2019-12-07 16:58:47,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39981 states. [2019-12-07 16:58:47,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39981 states to 39981 states and 128832 transitions. [2019-12-07 16:58:47,661 INFO L78 Accepts]: Start accepts. Automaton has 39981 states and 128832 transitions. Word has length 18 [2019-12-07 16:58:47,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:47,662 INFO L462 AbstractCegarLoop]: Abstraction has 39981 states and 128832 transitions. [2019-12-07 16:58:47,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:58:47,662 INFO L276 IsEmpty]: Start isEmpty. Operand 39981 states and 128832 transitions. [2019-12-07 16:58:47,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:58:47,666 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:47,666 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:47,666 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:47,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:47,667 INFO L82 PathProgramCache]: Analyzing trace with hash -1720601530, now seen corresponding path program 1 times [2019-12-07 16:58:47,667 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:47,667 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788571576] [2019-12-07 16:58:47,667 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:47,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:47,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:47,715 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [788571576] [2019-12-07 16:58:47,715 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:47,715 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:58:47,715 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [250053557] [2019-12-07 16:58:47,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:58:47,716 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:47,716 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:58:47,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:58:47,716 INFO L87 Difference]: Start difference. First operand 39981 states and 128832 transitions. Second operand 6 states. [2019-12-07 16:58:48,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:48,343 INFO L93 Difference]: Finished difference Result 59624 states and 187628 transitions. [2019-12-07 16:58:48,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 16:58:48,343 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 16:58:48,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:48,429 INFO L225 Difference]: With dead ends: 59624 [2019-12-07 16:58:48,429 INFO L226 Difference]: Without dead ends: 59617 [2019-12-07 16:58:48,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:58:48,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59617 states. [2019-12-07 16:58:49,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59617 to 40463. [2019-12-07 16:58:49,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40463 states. [2019-12-07 16:58:49,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40463 states to 40463 states and 129749 transitions. [2019-12-07 16:58:49,620 INFO L78 Accepts]: Start accepts. Automaton has 40463 states and 129749 transitions. Word has length 22 [2019-12-07 16:58:49,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:49,621 INFO L462 AbstractCegarLoop]: Abstraction has 40463 states and 129749 transitions. [2019-12-07 16:58:49,621 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:58:49,621 INFO L276 IsEmpty]: Start isEmpty. Operand 40463 states and 129749 transitions. [2019-12-07 16:58:49,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:58:49,628 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:49,628 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:49,629 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:49,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:49,629 INFO L82 PathProgramCache]: Analyzing trace with hash -74763598, now seen corresponding path program 1 times [2019-12-07 16:58:49,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:49,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871237856] [2019-12-07 16:58:49,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:49,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:49,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:49,674 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871237856] [2019-12-07 16:58:49,674 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:49,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:58:49,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [114365787] [2019-12-07 16:58:49,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:58:49,675 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:49,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:58:49,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:58:49,676 INFO L87 Difference]: Start difference. First operand 40463 states and 129749 transitions. Second operand 4 states. [2019-12-07 16:58:49,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:49,731 INFO L93 Difference]: Finished difference Result 16096 states and 48753 transitions. [2019-12-07 16:58:49,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:58:49,731 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 16:58:49,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:49,749 INFO L225 Difference]: With dead ends: 16096 [2019-12-07 16:58:49,749 INFO L226 Difference]: Without dead ends: 16096 [2019-12-07 16:58:49,749 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:58:49,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16096 states. [2019-12-07 16:58:49,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16096 to 15803. [2019-12-07 16:58:49,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15803 states. [2019-12-07 16:58:49,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15803 states to 15803 states and 47917 transitions. [2019-12-07 16:58:49,962 INFO L78 Accepts]: Start accepts. Automaton has 15803 states and 47917 transitions. Word has length 25 [2019-12-07 16:58:49,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:49,962 INFO L462 AbstractCegarLoop]: Abstraction has 15803 states and 47917 transitions. [2019-12-07 16:58:49,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:58:49,962 INFO L276 IsEmpty]: Start isEmpty. Operand 15803 states and 47917 transitions. [2019-12-07 16:58:49,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 16:58:49,972 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:49,972 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:49,972 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:49,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:49,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1856606199, now seen corresponding path program 1 times [2019-12-07 16:58:49,972 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:49,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960080068] [2019-12-07 16:58:49,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:49,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:50,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:50,027 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960080068] [2019-12-07 16:58:50,028 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:50,028 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:58:50,028 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338060634] [2019-12-07 16:58:50,028 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:58:50,028 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:50,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:58:50,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:58:50,029 INFO L87 Difference]: Start difference. First operand 15803 states and 47917 transitions. Second operand 6 states. [2019-12-07 16:58:50,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:50,339 INFO L93 Difference]: Finished difference Result 22779 states and 67340 transitions. [2019-12-07 16:58:50,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 16:58:50,339 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 16:58:50,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:50,362 INFO L225 Difference]: With dead ends: 22779 [2019-12-07 16:58:50,362 INFO L226 Difference]: Without dead ends: 22779 [2019-12-07 16:58:50,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:58:50,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22779 states. [2019-12-07 16:58:50,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22779 to 18120. [2019-12-07 16:58:50,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18120 states. [2019-12-07 16:58:50,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18120 states to 18120 states and 54739 transitions. [2019-12-07 16:58:50,625 INFO L78 Accepts]: Start accepts. Automaton has 18120 states and 54739 transitions. Word has length 27 [2019-12-07 16:58:50,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:50,625 INFO L462 AbstractCegarLoop]: Abstraction has 18120 states and 54739 transitions. [2019-12-07 16:58:50,625 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:58:50,625 INFO L276 IsEmpty]: Start isEmpty. Operand 18120 states and 54739 transitions. [2019-12-07 16:58:50,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 16:58:50,640 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:50,640 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:50,640 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:50,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:50,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1731527828, now seen corresponding path program 1 times [2019-12-07 16:58:50,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:50,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [657986522] [2019-12-07 16:58:50,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:50,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:50,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:50,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [657986522] [2019-12-07 16:58:50,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:50,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:58:50,701 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546452858] [2019-12-07 16:58:50,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:58:50,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:50,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:58:50,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:58:50,702 INFO L87 Difference]: Start difference. First operand 18120 states and 54739 transitions. Second operand 7 states. [2019-12-07 16:58:51,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:51,335 INFO L93 Difference]: Finished difference Result 24798 states and 73024 transitions. [2019-12-07 16:58:51,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 16:58:51,336 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 16:58:51,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:51,363 INFO L225 Difference]: With dead ends: 24798 [2019-12-07 16:58:51,363 INFO L226 Difference]: Without dead ends: 24798 [2019-12-07 16:58:51,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 16:58:51,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24798 states. [2019-12-07 16:58:51,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24798 to 16706. [2019-12-07 16:58:51,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16706 states. [2019-12-07 16:58:51,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16706 states to 16706 states and 50524 transitions. [2019-12-07 16:58:51,629 INFO L78 Accepts]: Start accepts. Automaton has 16706 states and 50524 transitions. Word has length 33 [2019-12-07 16:58:51,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:51,630 INFO L462 AbstractCegarLoop]: Abstraction has 16706 states and 50524 transitions. [2019-12-07 16:58:51,630 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:58:51,630 INFO L276 IsEmpty]: Start isEmpty. Operand 16706 states and 50524 transitions. [2019-12-07 16:58:51,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 16:58:51,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:51,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:51,648 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:51,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:51,649 INFO L82 PathProgramCache]: Analyzing trace with hash -1723865273, now seen corresponding path program 1 times [2019-12-07 16:58:51,649 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:51,649 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265153984] [2019-12-07 16:58:51,649 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:51,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:51,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:51,717 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [265153984] [2019-12-07 16:58:51,718 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:51,718 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:58:51,718 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1553869954] [2019-12-07 16:58:51,718 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:58:51,718 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:51,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:58:51,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:58:51,719 INFO L87 Difference]: Start difference. First operand 16706 states and 50524 transitions. Second operand 6 states. [2019-12-07 16:58:52,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:52,468 INFO L93 Difference]: Finished difference Result 28112 states and 83769 transitions. [2019-12-07 16:58:52,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:58:52,468 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 16:58:52,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:52,499 INFO L225 Difference]: With dead ends: 28112 [2019-12-07 16:58:52,499 INFO L226 Difference]: Without dead ends: 28112 [2019-12-07 16:58:52,500 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:58:52,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28112 states. [2019-12-07 16:58:53,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28112 to 23785. [2019-12-07 16:58:53,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23785 states. [2019-12-07 16:58:53,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23785 states to 23785 states and 71777 transitions. [2019-12-07 16:58:53,124 INFO L78 Accepts]: Start accepts. Automaton has 23785 states and 71777 transitions. Word has length 39 [2019-12-07 16:58:53,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:53,124 INFO L462 AbstractCegarLoop]: Abstraction has 23785 states and 71777 transitions. [2019-12-07 16:58:53,124 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:58:53,124 INFO L276 IsEmpty]: Start isEmpty. Operand 23785 states and 71777 transitions. [2019-12-07 16:58:53,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 16:58:53,146 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:53,146 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:53,147 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:53,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:53,147 INFO L82 PathProgramCache]: Analyzing trace with hash -577354189, now seen corresponding path program 2 times [2019-12-07 16:58:53,147 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:53,147 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968599491] [2019-12-07 16:58:53,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:53,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:53,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:53,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968599491] [2019-12-07 16:58:53,199 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:53,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:58:53,200 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [803254113] [2019-12-07 16:58:53,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:58:53,200 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:53,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:58:53,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:58:53,200 INFO L87 Difference]: Start difference. First operand 23785 states and 71777 transitions. Second operand 6 states. [2019-12-07 16:58:53,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:53,720 INFO L93 Difference]: Finished difference Result 40374 states and 122091 transitions. [2019-12-07 16:58:53,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:58:53,720 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 16:58:53,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:53,767 INFO L225 Difference]: With dead ends: 40374 [2019-12-07 16:58:53,767 INFO L226 Difference]: Without dead ends: 40374 [2019-12-07 16:58:53,767 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:58:53,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40374 states. [2019-12-07 16:58:54,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40374 to 26887. [2019-12-07 16:58:54,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26887 states. [2019-12-07 16:58:54,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26887 states to 26887 states and 81533 transitions. [2019-12-07 16:58:54,218 INFO L78 Accepts]: Start accepts. Automaton has 26887 states and 81533 transitions. Word has length 39 [2019-12-07 16:58:54,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:54,218 INFO L462 AbstractCegarLoop]: Abstraction has 26887 states and 81533 transitions. [2019-12-07 16:58:54,219 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:58:54,219 INFO L276 IsEmpty]: Start isEmpty. Operand 26887 states and 81533 transitions. [2019-12-07 16:58:54,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 16:58:54,241 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:54,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:54,241 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:54,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:54,241 INFO L82 PathProgramCache]: Analyzing trace with hash -572121455, now seen corresponding path program 3 times [2019-12-07 16:58:54,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:54,242 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762953311] [2019-12-07 16:58:54,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:54,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:54,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:54,282 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762953311] [2019-12-07 16:58:54,283 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:54,283 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:58:54,283 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1372476422] [2019-12-07 16:58:54,283 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:58:54,283 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:54,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:58:54,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:54,284 INFO L87 Difference]: Start difference. First operand 26887 states and 81533 transitions. Second operand 3 states. [2019-12-07 16:58:54,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:54,347 INFO L93 Difference]: Finished difference Result 22584 states and 67354 transitions. [2019-12-07 16:58:54,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:58:54,348 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 16:58:54,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:54,371 INFO L225 Difference]: With dead ends: 22584 [2019-12-07 16:58:54,371 INFO L226 Difference]: Without dead ends: 22584 [2019-12-07 16:58:54,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:54,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22584 states. [2019-12-07 16:58:54,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22584 to 22576. [2019-12-07 16:58:54,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22576 states. [2019-12-07 16:58:54,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22576 states to 22576 states and 67338 transitions. [2019-12-07 16:58:54,646 INFO L78 Accepts]: Start accepts. Automaton has 22576 states and 67338 transitions. Word has length 39 [2019-12-07 16:58:54,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:54,646 INFO L462 AbstractCegarLoop]: Abstraction has 22576 states and 67338 transitions. [2019-12-07 16:58:54,646 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:58:54,646 INFO L276 IsEmpty]: Start isEmpty. Operand 22576 states and 67338 transitions. [2019-12-07 16:58:54,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 16:58:54,666 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:54,666 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:54,666 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:54,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:54,666 INFO L82 PathProgramCache]: Analyzing trace with hash -2111065440, now seen corresponding path program 1 times [2019-12-07 16:58:54,666 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:54,666 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589120879] [2019-12-07 16:58:54,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:54,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:54,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:54,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589120879] [2019-12-07 16:58:54,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:54,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:58:54,703 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614479297] [2019-12-07 16:58:54,703 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:58:54,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:54,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:58:54,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:58:54,704 INFO L87 Difference]: Start difference. First operand 22576 states and 67338 transitions. Second operand 5 states. [2019-12-07 16:58:54,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:54,767 INFO L93 Difference]: Finished difference Result 21326 states and 64457 transitions. [2019-12-07 16:58:54,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:58:54,767 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 16:58:54,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:54,790 INFO L225 Difference]: With dead ends: 21326 [2019-12-07 16:58:54,790 INFO L226 Difference]: Without dead ends: 21326 [2019-12-07 16:58:54,790 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:58:54,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21326 states. [2019-12-07 16:58:55,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21326 to 20472. [2019-12-07 16:58:55,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20472 states. [2019-12-07 16:58:55,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20472 states to 20472 states and 62150 transitions. [2019-12-07 16:58:55,083 INFO L78 Accepts]: Start accepts. Automaton has 20472 states and 62150 transitions. Word has length 40 [2019-12-07 16:58:55,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:55,083 INFO L462 AbstractCegarLoop]: Abstraction has 20472 states and 62150 transitions. [2019-12-07 16:58:55,083 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:58:55,083 INFO L276 IsEmpty]: Start isEmpty. Operand 20472 states and 62150 transitions. [2019-12-07 16:58:55,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:58:55,102 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:55,102 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:55,102 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:55,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:55,102 INFO L82 PathProgramCache]: Analyzing trace with hash 1095109457, now seen corresponding path program 1 times [2019-12-07 16:58:55,102 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:55,102 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085835333] [2019-12-07 16:58:55,102 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:55,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:55,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:55,130 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085835333] [2019-12-07 16:58:55,130 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:55,130 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:58:55,131 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937392898] [2019-12-07 16:58:55,131 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:58:55,131 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:55,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:58:55,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:55,131 INFO L87 Difference]: Start difference. First operand 20472 states and 62150 transitions. Second operand 3 states. [2019-12-07 16:58:55,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:55,215 INFO L93 Difference]: Finished difference Result 30928 states and 92753 transitions. [2019-12-07 16:58:55,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:58:55,216 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 16:58:55,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:55,253 INFO L225 Difference]: With dead ends: 30928 [2019-12-07 16:58:55,254 INFO L226 Difference]: Without dead ends: 30928 [2019-12-07 16:58:55,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:55,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30928 states. [2019-12-07 16:58:55,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30928 to 22801. [2019-12-07 16:58:55,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22801 states. [2019-12-07 16:58:55,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22801 states to 22801 states and 68930 transitions. [2019-12-07 16:58:55,618 INFO L78 Accepts]: Start accepts. Automaton has 22801 states and 68930 transitions. Word has length 65 [2019-12-07 16:58:55,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:55,618 INFO L462 AbstractCegarLoop]: Abstraction has 22801 states and 68930 transitions. [2019-12-07 16:58:55,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:58:55,618 INFO L276 IsEmpty]: Start isEmpty. Operand 22801 states and 68930 transitions. [2019-12-07 16:58:55,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:58:55,637 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:55,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:55,637 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:55,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:55,638 INFO L82 PathProgramCache]: Analyzing trace with hash 1288535023, now seen corresponding path program 1 times [2019-12-07 16:58:55,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:55,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095405601] [2019-12-07 16:58:55,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:55,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:55,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:55,708 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095405601] [2019-12-07 16:58:55,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:55,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:58:55,708 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [299669549] [2019-12-07 16:58:55,708 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:58:55,709 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:55,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:58:55,709 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:58:55,709 INFO L87 Difference]: Start difference. First operand 22801 states and 68930 transitions. Second operand 7 states. [2019-12-07 16:58:56,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:56,584 INFO L93 Difference]: Finished difference Result 35434 states and 105501 transitions. [2019-12-07 16:58:56,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 16:58:56,584 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 16:58:56,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:56,627 INFO L225 Difference]: With dead ends: 35434 [2019-12-07 16:58:56,627 INFO L226 Difference]: Without dead ends: 35434 [2019-12-07 16:58:56,628 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 10 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:58:56,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35434 states. [2019-12-07 16:58:56,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35434 to 24566. [2019-12-07 16:58:56,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24566 states. [2019-12-07 16:58:57,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24566 states to 24566 states and 74008 transitions. [2019-12-07 16:58:57,028 INFO L78 Accepts]: Start accepts. Automaton has 24566 states and 74008 transitions. Word has length 65 [2019-12-07 16:58:57,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:57,028 INFO L462 AbstractCegarLoop]: Abstraction has 24566 states and 74008 transitions. [2019-12-07 16:58:57,028 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:58:57,028 INFO L276 IsEmpty]: Start isEmpty. Operand 24566 states and 74008 transitions. [2019-12-07 16:58:57,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:58:57,047 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:57,047 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:57,047 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:57,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:57,047 INFO L82 PathProgramCache]: Analyzing trace with hash 1869915803, now seen corresponding path program 2 times [2019-12-07 16:58:57,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:57,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859178912] [2019-12-07 16:58:57,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:57,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:57,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:57,087 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859178912] [2019-12-07 16:58:57,087 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:57,087 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:58:57,087 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807761192] [2019-12-07 16:58:57,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:58:57,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:57,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:58:57,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:57,088 INFO L87 Difference]: Start difference. First operand 24566 states and 74008 transitions. Second operand 3 states. [2019-12-07 16:58:57,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:58:57,185 INFO L93 Difference]: Finished difference Result 30992 states and 93216 transitions. [2019-12-07 16:58:57,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:58:57,186 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 16:58:57,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:58:57,221 INFO L225 Difference]: With dead ends: 30992 [2019-12-07 16:58:57,221 INFO L226 Difference]: Without dead ends: 30992 [2019-12-07 16:58:57,221 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:58:57,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30992 states. [2019-12-07 16:58:57,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30992 to 25222. [2019-12-07 16:58:57,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25222 states. [2019-12-07 16:58:57,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25222 states to 25222 states and 76380 transitions. [2019-12-07 16:58:57,612 INFO L78 Accepts]: Start accepts. Automaton has 25222 states and 76380 transitions. Word has length 65 [2019-12-07 16:58:57,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:58:57,612 INFO L462 AbstractCegarLoop]: Abstraction has 25222 states and 76380 transitions. [2019-12-07 16:58:57,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:58:57,612 INFO L276 IsEmpty]: Start isEmpty. Operand 25222 states and 76380 transitions. [2019-12-07 16:58:57,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:58:57,637 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:58:57,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:58:57,637 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:58:57,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:58:57,638 INFO L82 PathProgramCache]: Analyzing trace with hash 775863718, now seen corresponding path program 1 times [2019-12-07 16:58:57,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:58:57,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1744555173] [2019-12-07 16:58:57,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:58:57,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:58:57,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:58:57,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1744555173] [2019-12-07 16:58:57,856 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:58:57,856 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:58:57,856 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2144510691] [2019-12-07 16:58:57,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:58:57,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:58:57,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:58:57,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:58:57,857 INFO L87 Difference]: Start difference. First operand 25222 states and 76380 transitions. Second operand 12 states. [2019-12-07 16:59:02,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:02,066 INFO L93 Difference]: Finished difference Result 40774 states and 121332 transitions. [2019-12-07 16:59:02,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 16:59:02,066 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 16:59:02,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:02,111 INFO L225 Difference]: With dead ends: 40774 [2019-12-07 16:59:02,111 INFO L226 Difference]: Without dead ends: 40774 [2019-12-07 16:59:02,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 3 SyntacticMatches, 6 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 661 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=410, Invalid=1942, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 16:59:02,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40774 states. [2019-12-07 16:59:02,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40774 to 27544. [2019-12-07 16:59:02,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27544 states. [2019-12-07 16:59:02,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27544 states to 27544 states and 83352 transitions. [2019-12-07 16:59:02,576 INFO L78 Accepts]: Start accepts. Automaton has 27544 states and 83352 transitions. Word has length 66 [2019-12-07 16:59:02,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:02,576 INFO L462 AbstractCegarLoop]: Abstraction has 27544 states and 83352 transitions. [2019-12-07 16:59:02,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:59:02,576 INFO L276 IsEmpty]: Start isEmpty. Operand 27544 states and 83352 transitions. [2019-12-07 16:59:02,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:59:02,603 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:02,603 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:02,603 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:02,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:02,603 INFO L82 PathProgramCache]: Analyzing trace with hash -572654756, now seen corresponding path program 2 times [2019-12-07 16:59:02,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:02,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1727581991] [2019-12-07 16:59:02,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:02,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:02,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:02,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1727581991] [2019-12-07 16:59:02,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:02,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:59:02,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [827400941] [2019-12-07 16:59:02,744 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:59:02,744 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:02,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:59:02,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:59:02,745 INFO L87 Difference]: Start difference. First operand 27544 states and 83352 transitions. Second operand 10 states. [2019-12-07 16:59:04,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:04,825 INFO L93 Difference]: Finished difference Result 41234 states and 122506 transitions. [2019-12-07 16:59:04,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 16:59:04,826 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 16:59:04,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:04,888 INFO L225 Difference]: With dead ends: 41234 [2019-12-07 16:59:04,889 INFO L226 Difference]: Without dead ends: 41234 [2019-12-07 16:59:04,889 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=124, Invalid=428, Unknown=0, NotChecked=0, Total=552 [2019-12-07 16:59:04,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41234 states. [2019-12-07 16:59:05,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41234 to 28834. [2019-12-07 16:59:05,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28834 states. [2019-12-07 16:59:05,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28834 states to 28834 states and 87189 transitions. [2019-12-07 16:59:05,451 INFO L78 Accepts]: Start accepts. Automaton has 28834 states and 87189 transitions. Word has length 66 [2019-12-07 16:59:05,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:05,451 INFO L462 AbstractCegarLoop]: Abstraction has 28834 states and 87189 transitions. [2019-12-07 16:59:05,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:59:05,451 INFO L276 IsEmpty]: Start isEmpty. Operand 28834 states and 87189 transitions. [2019-12-07 16:59:05,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:59:05,476 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:05,476 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:05,476 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:05,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:05,476 INFO L82 PathProgramCache]: Analyzing trace with hash 336999168, now seen corresponding path program 3 times [2019-12-07 16:59:05,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:05,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260816156] [2019-12-07 16:59:05,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:05,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:05,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:05,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1260816156] [2019-12-07 16:59:05,704 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:05,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 16:59:05,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287426501] [2019-12-07 16:59:05,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:59:05,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:05,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:59:05,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=114, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:59:05,704 INFO L87 Difference]: Start difference. First operand 28834 states and 87189 transitions. Second operand 13 states. [2019-12-07 16:59:08,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:08,671 INFO L93 Difference]: Finished difference Result 42132 states and 125159 transitions. [2019-12-07 16:59:08,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 16:59:08,673 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 66 [2019-12-07 16:59:08,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:08,731 INFO L225 Difference]: With dead ends: 42132 [2019-12-07 16:59:08,731 INFO L226 Difference]: Without dead ends: 42132 [2019-12-07 16:59:08,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 564 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=376, Invalid=1786, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 16:59:08,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42132 states. [2019-12-07 16:59:09,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42132 to 26140. [2019-12-07 16:59:09,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26140 states. [2019-12-07 16:59:09,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26140 states to 26140 states and 79283 transitions. [2019-12-07 16:59:09,205 INFO L78 Accepts]: Start accepts. Automaton has 26140 states and 79283 transitions. Word has length 66 [2019-12-07 16:59:09,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:09,205 INFO L462 AbstractCegarLoop]: Abstraction has 26140 states and 79283 transitions. [2019-12-07 16:59:09,205 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:59:09,205 INFO L276 IsEmpty]: Start isEmpty. Operand 26140 states and 79283 transitions. [2019-12-07 16:59:09,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:59:09,231 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:09,231 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:09,231 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:09,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:09,231 INFO L82 PathProgramCache]: Analyzing trace with hash 747036562, now seen corresponding path program 4 times [2019-12-07 16:59:09,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:09,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997610860] [2019-12-07 16:59:09,231 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:09,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:09,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:09,454 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997610860] [2019-12-07 16:59:09,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:09,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:59:09,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959130607] [2019-12-07 16:59:09,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:59:09,455 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:09,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:59:09,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:59:09,455 INFO L87 Difference]: Start difference. First operand 26140 states and 79283 transitions. Second operand 12 states. [2019-12-07 16:59:12,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:12,432 INFO L93 Difference]: Finished difference Result 103832 states and 311485 transitions. [2019-12-07 16:59:12,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 16:59:12,433 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 16:59:12,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:12,531 INFO L225 Difference]: With dead ends: 103832 [2019-12-07 16:59:12,531 INFO L226 Difference]: Without dead ends: 81473 [2019-12-07 16:59:12,532 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 242 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=236, Invalid=954, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 16:59:12,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81473 states. [2019-12-07 16:59:13,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81473 to 26977. [2019-12-07 16:59:13,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26977 states. [2019-12-07 16:59:13,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26977 states to 26977 states and 82188 transitions. [2019-12-07 16:59:13,210 INFO L78 Accepts]: Start accepts. Automaton has 26977 states and 82188 transitions. Word has length 66 [2019-12-07 16:59:13,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:13,210 INFO L462 AbstractCegarLoop]: Abstraction has 26977 states and 82188 transitions. [2019-12-07 16:59:13,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:59:13,210 INFO L276 IsEmpty]: Start isEmpty. Operand 26977 states and 82188 transitions. [2019-12-07 16:59:13,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:59:13,238 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:13,238 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:13,239 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:13,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:13,239 INFO L82 PathProgramCache]: Analyzing trace with hash 34605392, now seen corresponding path program 5 times [2019-12-07 16:59:13,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:13,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591054746] [2019-12-07 16:59:13,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:13,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:13,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:13,278 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1591054746] [2019-12-07 16:59:13,278 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:13,279 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:59:13,279 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983357075] [2019-12-07 16:59:13,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:59:13,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:13,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:59:13,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:59:13,279 INFO L87 Difference]: Start difference. First operand 26977 states and 82188 transitions. Second operand 3 states. [2019-12-07 16:59:13,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:13,348 INFO L93 Difference]: Finished difference Result 26976 states and 82186 transitions. [2019-12-07 16:59:13,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:59:13,349 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 16:59:13,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:13,382 INFO L225 Difference]: With dead ends: 26976 [2019-12-07 16:59:13,382 INFO L226 Difference]: Without dead ends: 26976 [2019-12-07 16:59:13,383 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:59:13,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26976 states. [2019-12-07 16:59:13,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26976 to 17730. [2019-12-07 16:59:13,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17730 states. [2019-12-07 16:59:13,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17730 states to 17730 states and 55312 transitions. [2019-12-07 16:59:13,676 INFO L78 Accepts]: Start accepts. Automaton has 17730 states and 55312 transitions. Word has length 66 [2019-12-07 16:59:13,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:13,677 INFO L462 AbstractCegarLoop]: Abstraction has 17730 states and 55312 transitions. [2019-12-07 16:59:13,677 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:59:13,677 INFO L276 IsEmpty]: Start isEmpty. Operand 17730 states and 55312 transitions. [2019-12-07 16:59:13,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:13,691 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:13,691 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:13,691 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:13,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:13,692 INFO L82 PathProgramCache]: Analyzing trace with hash -1650479011, now seen corresponding path program 1 times [2019-12-07 16:59:13,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:13,692 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340603409] [2019-12-07 16:59:13,692 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:13,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:13,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:13,769 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340603409] [2019-12-07 16:59:13,769 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:13,769 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:59:13,769 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178553960] [2019-12-07 16:59:13,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:59:13,769 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:13,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:59:13,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:59:13,770 INFO L87 Difference]: Start difference. First operand 17730 states and 55312 transitions. Second operand 7 states. [2019-12-07 16:59:14,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:14,250 INFO L93 Difference]: Finished difference Result 73980 states and 227634 transitions. [2019-12-07 16:59:14,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 16:59:14,250 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 16:59:14,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:14,319 INFO L225 Difference]: With dead ends: 73980 [2019-12-07 16:59:14,319 INFO L226 Difference]: Without dead ends: 53658 [2019-12-07 16:59:14,319 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 16:59:14,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53658 states. [2019-12-07 16:59:14,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53658 to 18612. [2019-12-07 16:59:14,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18612 states. [2019-12-07 16:59:14,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18612 states to 18612 states and 57164 transitions. [2019-12-07 16:59:14,788 INFO L78 Accepts]: Start accepts. Automaton has 18612 states and 57164 transitions. Word has length 67 [2019-12-07 16:59:14,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:14,788 INFO L462 AbstractCegarLoop]: Abstraction has 18612 states and 57164 transitions. [2019-12-07 16:59:14,788 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:59:14,788 INFO L276 IsEmpty]: Start isEmpty. Operand 18612 states and 57164 transitions. [2019-12-07 16:59:14,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:14,851 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:14,851 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:14,851 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:14,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:14,851 INFO L82 PathProgramCache]: Analyzing trace with hash -2130416035, now seen corresponding path program 2 times [2019-12-07 16:59:14,851 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:14,851 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144170234] [2019-12-07 16:59:14,852 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:14,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:14,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:14,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144170234] [2019-12-07 16:59:14,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:14,922 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:59:14,922 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031311168] [2019-12-07 16:59:14,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:59:14,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:14,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:59:14,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:59:14,922 INFO L87 Difference]: Start difference. First operand 18612 states and 57164 transitions. Second operand 4 states. [2019-12-07 16:59:15,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:15,001 INFO L93 Difference]: Finished difference Result 32447 states and 99812 transitions. [2019-12-07 16:59:15,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:59:15,001 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 16:59:15,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:15,018 INFO L225 Difference]: With dead ends: 32447 [2019-12-07 16:59:15,018 INFO L226 Difference]: Without dead ends: 15388 [2019-12-07 16:59:15,018 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:59:15,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15388 states. [2019-12-07 16:59:15,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15388 to 15388. [2019-12-07 16:59:15,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15388 states. [2019-12-07 16:59:15,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15388 states to 15388 states and 47398 transitions. [2019-12-07 16:59:15,226 INFO L78 Accepts]: Start accepts. Automaton has 15388 states and 47398 transitions. Word has length 67 [2019-12-07 16:59:15,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:15,226 INFO L462 AbstractCegarLoop]: Abstraction has 15388 states and 47398 transitions. [2019-12-07 16:59:15,226 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:59:15,226 INFO L276 IsEmpty]: Start isEmpty. Operand 15388 states and 47398 transitions. [2019-12-07 16:59:15,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:15,241 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:15,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:15,241 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:15,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:15,241 INFO L82 PathProgramCache]: Analyzing trace with hash 1169670237, now seen corresponding path program 3 times [2019-12-07 16:59:15,242 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:15,242 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958665899] [2019-12-07 16:59:15,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:15,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:15,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:15,378 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958665899] [2019-12-07 16:59:15,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:15,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:59:15,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002227684] [2019-12-07 16:59:15,378 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:59:15,379 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:15,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:59:15,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:59:15,379 INFO L87 Difference]: Start difference. First operand 15388 states and 47398 transitions. Second operand 11 states. [2019-12-07 16:59:16,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:16,177 INFO L93 Difference]: Finished difference Result 40944 states and 125478 transitions. [2019-12-07 16:59:16,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 16:59:16,178 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 16:59:16,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:16,217 INFO L225 Difference]: With dead ends: 40944 [2019-12-07 16:59:16,217 INFO L226 Difference]: Without dead ends: 34919 [2019-12-07 16:59:16,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=254, Invalid=1006, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 16:59:16,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34919 states. [2019-12-07 16:59:16,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34919 to 19408. [2019-12-07 16:59:16,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19408 states. [2019-12-07 16:59:16,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19408 states to 19408 states and 59546 transitions. [2019-12-07 16:59:16,587 INFO L78 Accepts]: Start accepts. Automaton has 19408 states and 59546 transitions. Word has length 67 [2019-12-07 16:59:16,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:16,587 INFO L462 AbstractCegarLoop]: Abstraction has 19408 states and 59546 transitions. [2019-12-07 16:59:16,587 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:59:16,587 INFO L276 IsEmpty]: Start isEmpty. Operand 19408 states and 59546 transitions. [2019-12-07 16:59:16,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:16,603 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:16,603 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:16,603 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:16,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:16,604 INFO L82 PathProgramCache]: Analyzing trace with hash 791833971, now seen corresponding path program 4 times [2019-12-07 16:59:16,604 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:16,604 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [643004469] [2019-12-07 16:59:16,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:16,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:16,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:16,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [643004469] [2019-12-07 16:59:16,738 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:16,738 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 16:59:16,738 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [75077122] [2019-12-07 16:59:16,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 16:59:16,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:16,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 16:59:16,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 16:59:16,739 INFO L87 Difference]: Start difference. First operand 19408 states and 59546 transitions. Second operand 10 states. [2019-12-07 16:59:18,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:18,717 INFO L93 Difference]: Finished difference Result 33070 states and 100696 transitions. [2019-12-07 16:59:18,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 16:59:18,718 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 16:59:18,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:18,749 INFO L225 Difference]: With dead ends: 33070 [2019-12-07 16:59:18,750 INFO L226 Difference]: Without dead ends: 27629 [2019-12-07 16:59:18,750 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 130 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=132, Invalid=570, Unknown=0, NotChecked=0, Total=702 [2019-12-07 16:59:18,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27629 states. [2019-12-07 16:59:19,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27629 to 18497. [2019-12-07 16:59:19,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18497 states. [2019-12-07 16:59:19,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18497 states to 18497 states and 56376 transitions. [2019-12-07 16:59:19,056 INFO L78 Accepts]: Start accepts. Automaton has 18497 states and 56376 transitions. Word has length 67 [2019-12-07 16:59:19,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:19,056 INFO L462 AbstractCegarLoop]: Abstraction has 18497 states and 56376 transitions. [2019-12-07 16:59:19,056 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 16:59:19,056 INFO L276 IsEmpty]: Start isEmpty. Operand 18497 states and 56376 transitions. [2019-12-07 16:59:19,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:19,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:19,072 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:19,072 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:19,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:19,072 INFO L82 PathProgramCache]: Analyzing trace with hash 709682779, now seen corresponding path program 5 times [2019-12-07 16:59:19,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:19,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118878966] [2019-12-07 16:59:19,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:19,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:19,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:19,407 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118878966] [2019-12-07 16:59:19,407 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:19,407 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 16:59:19,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1126718118] [2019-12-07 16:59:19,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 16:59:19,408 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:19,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 16:59:19,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=204, Unknown=0, NotChecked=0, Total=240 [2019-12-07 16:59:19,408 INFO L87 Difference]: Start difference. First operand 18497 states and 56376 transitions. Second operand 16 states. [2019-12-07 16:59:24,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:24,348 INFO L93 Difference]: Finished difference Result 43823 states and 130622 transitions. [2019-12-07 16:59:24,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 16:59:24,348 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 16:59:24,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:24,392 INFO L225 Difference]: With dead ends: 43823 [2019-12-07 16:59:24,393 INFO L226 Difference]: Without dead ends: 39012 [2019-12-07 16:59:24,394 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 935 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=523, Invalid=3017, Unknown=0, NotChecked=0, Total=3540 [2019-12-07 16:59:24,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39012 states. [2019-12-07 16:59:24,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39012 to 18818. [2019-12-07 16:59:24,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18818 states. [2019-12-07 16:59:24,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18818 states to 18818 states and 56957 transitions. [2019-12-07 16:59:24,776 INFO L78 Accepts]: Start accepts. Automaton has 18818 states and 56957 transitions. Word has length 67 [2019-12-07 16:59:24,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:24,776 INFO L462 AbstractCegarLoop]: Abstraction has 18818 states and 56957 transitions. [2019-12-07 16:59:24,776 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 16:59:24,776 INFO L276 IsEmpty]: Start isEmpty. Operand 18818 states and 56957 transitions. [2019-12-07 16:59:24,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:24,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:24,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:24,793 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:24,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:24,793 INFO L82 PathProgramCache]: Analyzing trace with hash -1005307485, now seen corresponding path program 6 times [2019-12-07 16:59:24,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:24,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611641539] [2019-12-07 16:59:24,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:24,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:25,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:25,098 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611641539] [2019-12-07 16:59:25,098 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:25,098 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 16:59:25,098 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [956420815] [2019-12-07 16:59:25,098 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 16:59:25,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:25,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 16:59:25,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:59:25,098 INFO L87 Difference]: Start difference. First operand 18818 states and 56957 transitions. Second operand 17 states. [2019-12-07 16:59:31,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:31,788 INFO L93 Difference]: Finished difference Result 29496 states and 88861 transitions. [2019-12-07 16:59:31,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2019-12-07 16:59:31,789 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 16:59:31,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:31,839 INFO L225 Difference]: With dead ends: 29496 [2019-12-07 16:59:31,839 INFO L226 Difference]: Without dead ends: 28689 [2019-12-07 16:59:31,841 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=450, Invalid=2972, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 16:59:31,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28689 states. [2019-12-07 16:59:32,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28689 to 18778. [2019-12-07 16:59:32,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18778 states. [2019-12-07 16:59:32,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18778 states to 18778 states and 56839 transitions. [2019-12-07 16:59:32,155 INFO L78 Accepts]: Start accepts. Automaton has 18778 states and 56839 transitions. Word has length 67 [2019-12-07 16:59:32,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:32,155 INFO L462 AbstractCegarLoop]: Abstraction has 18778 states and 56839 transitions. [2019-12-07 16:59:32,155 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 16:59:32,155 INFO L276 IsEmpty]: Start isEmpty. Operand 18778 states and 56839 transitions. [2019-12-07 16:59:32,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:32,172 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:32,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:32,172 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:32,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:32,172 INFO L82 PathProgramCache]: Analyzing trace with hash -795166045, now seen corresponding path program 7 times [2019-12-07 16:59:32,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:32,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782472269] [2019-12-07 16:59:32,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:32,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:32,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:32,437 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1782472269] [2019-12-07 16:59:32,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:32,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 16:59:32,437 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157673423] [2019-12-07 16:59:32,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 16:59:32,438 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:32,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 16:59:32,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:59:32,438 INFO L87 Difference]: Start difference. First operand 18778 states and 56839 transitions. Second operand 15 states. [2019-12-07 16:59:37,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:37,509 INFO L93 Difference]: Finished difference Result 31032 states and 92678 transitions. [2019-12-07 16:59:37,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 16:59:37,509 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 16:59:37,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:37,540 INFO L225 Difference]: With dead ends: 31032 [2019-12-07 16:59:37,540 INFO L226 Difference]: Without dead ends: 27956 [2019-12-07 16:59:37,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 326 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=244, Invalid=1162, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 16:59:37,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27956 states. [2019-12-07 16:59:37,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27956 to 18918. [2019-12-07 16:59:37,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18918 states. [2019-12-07 16:59:37,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18918 states to 18918 states and 57322 transitions. [2019-12-07 16:59:37,852 INFO L78 Accepts]: Start accepts. Automaton has 18918 states and 57322 transitions. Word has length 67 [2019-12-07 16:59:37,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:37,852 INFO L462 AbstractCegarLoop]: Abstraction has 18918 states and 57322 transitions. [2019-12-07 16:59:37,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 16:59:37,852 INFO L276 IsEmpty]: Start isEmpty. Operand 18918 states and 57322 transitions. [2019-12-07 16:59:37,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:37,869 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:37,869 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:37,869 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:37,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:37,869 INFO L82 PathProgramCache]: Analyzing trace with hash -1215027361, now seen corresponding path program 8 times [2019-12-07 16:59:37,869 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:37,870 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737789418] [2019-12-07 16:59:37,870 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:37,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:37,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:37,996 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737789418] [2019-12-07 16:59:37,996 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:37,997 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:59:37,997 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815761270] [2019-12-07 16:59:37,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:59:37,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:37,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:59:37,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:59:37,997 INFO L87 Difference]: Start difference. First operand 18918 states and 57322 transitions. Second operand 11 states. [2019-12-07 16:59:38,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:38,812 INFO L93 Difference]: Finished difference Result 35532 states and 107421 transitions. [2019-12-07 16:59:38,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 16:59:38,812 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 16:59:38,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:38,844 INFO L225 Difference]: With dead ends: 35532 [2019-12-07 16:59:38,844 INFO L226 Difference]: Without dead ends: 28632 [2019-12-07 16:59:38,845 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 248 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=229, Invalid=893, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 16:59:38,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28632 states. [2019-12-07 16:59:39,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28632 to 14895. [2019-12-07 16:59:39,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14895 states. [2019-12-07 16:59:39,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14895 states to 14895 states and 45410 transitions. [2019-12-07 16:59:39,151 INFO L78 Accepts]: Start accepts. Automaton has 14895 states and 45410 transitions. Word has length 67 [2019-12-07 16:59:39,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:39,152 INFO L462 AbstractCegarLoop]: Abstraction has 14895 states and 45410 transitions. [2019-12-07 16:59:39,152 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:59:39,152 INFO L276 IsEmpty]: Start isEmpty. Operand 14895 states and 45410 transitions. [2019-12-07 16:59:39,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:39,164 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:39,164 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:39,164 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:39,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:39,165 INFO L82 PathProgramCache]: Analyzing trace with hash -1079904183, now seen corresponding path program 9 times [2019-12-07 16:59:39,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:39,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118580454] [2019-12-07 16:59:39,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:39,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:59:39,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:59:39,292 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118580454] [2019-12-07 16:59:39,292 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:59:39,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:59:39,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411784067] [2019-12-07 16:59:39,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:59:39,293 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:59:39,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:59:39,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:59:39,293 INFO L87 Difference]: Start difference. First operand 14895 states and 45410 transitions. Second operand 12 states. [2019-12-07 16:59:39,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:59:39,960 INFO L93 Difference]: Finished difference Result 28513 states and 86858 transitions. [2019-12-07 16:59:39,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 16:59:39,960 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 16:59:39,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:59:39,991 INFO L225 Difference]: With dead ends: 28513 [2019-12-07 16:59:39,991 INFO L226 Difference]: Without dead ends: 28072 [2019-12-07 16:59:39,992 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=190, Invalid=866, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 16:59:40,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28072 states. [2019-12-07 16:59:40,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28072 to 14623. [2019-12-07 16:59:40,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14623 states. [2019-12-07 16:59:40,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14623 states to 14623 states and 44714 transitions. [2019-12-07 16:59:40,274 INFO L78 Accepts]: Start accepts. Automaton has 14623 states and 44714 transitions. Word has length 67 [2019-12-07 16:59:40,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:59:40,275 INFO L462 AbstractCegarLoop]: Abstraction has 14623 states and 44714 transitions. [2019-12-07 16:59:40,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:59:40,275 INFO L276 IsEmpty]: Start isEmpty. Operand 14623 states and 44714 transitions. [2019-12-07 16:59:40,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:59:40,287 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:59:40,287 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:59:40,287 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:59:40,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:59:40,288 INFO L82 PathProgramCache]: Analyzing trace with hash 656134515, now seen corresponding path program 10 times [2019-12-07 16:59:40,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:59:40,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077163525] [2019-12-07 16:59:40,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:59:40,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:59:40,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:59:40,357 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:59:40,358 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:59:40,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~a$r_buff1_thd0~0_203 0) (= 0 v_~a$r_buff1_thd1~0_191) (= v_~z~0_36 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t293~0.base_37|) 0) (= v_~a$r_buff0_thd0~0_228 0) (= 0 v_~a$r_buff0_thd1~0_317) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~a$r_buff0_thd2~0_205) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t293~0.base_37| 4)) (= v_~main$tmp_guard1~0_42 0) (= v_~a$r_buff0_thd3~0_430 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t293~0.base_37|) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= v_~__unbuffered_cnt~0_111 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x~0_176) (= v_~__unbuffered_p1_EBX~0_55 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= 0 |v_#NULL.base_4|) (= v_~a$mem_tmp~0_16 0) (= 0 v_~a$w_buff0_used~0_889) (= v_~a$w_buff0~0_416 0) (= v_~a$r_buff1_thd3~0_333 0) (= 0 v_~a$w_buff1_used~0_596) (= |v_#NULL.offset_4| 0) (= 0 v_~a$w_buff1~0_333) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t293~0.base_37| 1)) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t293~0.base_37| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t293~0.base_37|) |v_ULTIMATE.start_main_~#t293~0.offset_26| 0)) |v_#memory_int_23|) (= 0 v_~a$r_buff1_thd2~0_185) (= v_~a~0_191 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~weak$$choice0~0_13) (= v_~weak$$choice2~0_131 0) (= |v_ULTIMATE.start_main_~#t293~0.offset_26| 0) (= v_~y~0_31 0) (= 0 v_~a$read_delayed~0_8) (= v_~a$flush_delayed~0_26 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_228, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_127|, ~a~0=v_~a~0_191, ULTIMATE.start_main_~#t293~0.offset=|v_ULTIMATE.start_main_~#t293~0.offset_26|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, ULTIMATE.start_main_~#t294~0.base=|v_ULTIMATE.start_main_~#t294~0.base_38|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_333, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_889, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_317, ULTIMATE.start_main_~#t295~0.base=|v_ULTIMATE.start_main_~#t295~0.base_30|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_~#t295~0.offset=|v_ULTIMATE.start_main_~#t295~0.offset_18|, ~a$w_buff0~0=v_~a$w_buff0~0_416, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_203, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, ~x~0=v_~x~0_176, ULTIMATE.start_main_~#t294~0.offset=|v_ULTIMATE.start_main_~#t294~0.offset_26|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_67|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~a$w_buff1~0=v_~a$w_buff1~0_333, ~y~0=v_~y~0_31, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_55, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_191, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_430, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_26, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_36, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_596, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t293~0.base=|v_ULTIMATE.start_main_~#t293~0.base_37|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_~#t293~0.offset, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t294~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t295~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t295~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t294~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t293~0.base] because there is no mapped edge [2019-12-07 16:59:40,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L835-1-->L837: Formula: (and (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t294~0.base_13|) 0) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t294~0.base_13| 1) |v_#valid_40|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t294~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t294~0.base_13|) |v_ULTIMATE.start_main_~#t294~0.offset_11| 1)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t294~0.base_13|)) (= |v_ULTIMATE.start_main_~#t294~0.offset_11| 0) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t294~0.base_13| 4) |v_#length_17|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t294~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t294~0.offset=|v_ULTIMATE.start_main_~#t294~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, ULTIMATE.start_main_~#t294~0.base=|v_ULTIMATE.start_main_~#t294~0.base_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t294~0.offset, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t294~0.base, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 16:59:40,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L750: Formula: (and (= v_~a$r_buff0_thd1~0_28 v_~a$r_buff1_thd1~0_23) (= v_~a$r_buff0_thd2~0_20 v_~a$r_buff1_thd2~0_16) (= v_~a$r_buff0_thd0~0_18 v_~a$r_buff1_thd0~0_17) (= v_~a$r_buff0_thd1~0_27 1) (= 1 v_~x~0_7) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~a$r_buff0_thd3~0_73 v_~a$r_buff1_thd3~0_40)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_28, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18} OutVars{~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_23, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_40, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_16, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_17, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_27, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18, ~x~0=v_~x~0_7} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 16:59:40,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L776-2-->L776-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In221916422 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In221916422 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In221916422 |P1Thread1of1ForFork2_#t~ite9_Out221916422|) (not .cse1)) (and (or .cse0 .cse1) (= ~a~0_In221916422 |P1Thread1of1ForFork2_#t~ite9_Out221916422|)))) InVars {~a~0=~a~0_In221916422, ~a$w_buff1~0=~a$w_buff1~0_In221916422, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In221916422, ~a$w_buff1_used~0=~a$w_buff1_used~0_In221916422} OutVars{~a~0=~a~0_In221916422, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out221916422|, ~a$w_buff1~0=~a$w_buff1~0_In221916422, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In221916422, ~a$w_buff1_used~0=~a$w_buff1_used~0_In221916422} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 16:59:40,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_47) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_47, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 16:59:40,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-741496457 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-741496457 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-741496457|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In-741496457 |P0Thread1of1ForFork1_#t~ite5_Out-741496457|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-741496457, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-741496457} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-741496457|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-741496457, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-741496457} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 16:59:40,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In693888590 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In693888590 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In693888590 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In693888590 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out693888590| 0)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out693888590| ~a$w_buff1_used~0_In693888590) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In693888590, ~a$w_buff0_used~0=~a$w_buff0_used~0_In693888590, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In693888590, ~a$w_buff1_used~0=~a$w_buff1_used~0_In693888590} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out693888590|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In693888590, ~a$w_buff0_used~0=~a$w_buff0_used~0_In693888590, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In693888590, ~a$w_buff1_used~0=~a$w_buff1_used~0_In693888590} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 16:59:40,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L753-->L754: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-2100830407 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In-2100830407 256))) (.cse1 (= ~a$r_buff0_thd1~0_In-2100830407 ~a$r_buff0_thd1~0_Out-2100830407))) (or (and .cse0 .cse1) (and (= ~a$r_buff0_thd1~0_Out-2100830407 0) (not .cse2) (not .cse0)) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2100830407, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2100830407} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-2100830407|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2100830407, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-2100830407} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:59:40,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L754-->L754-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1993965850 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1993965850 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In-1993965850 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1993965850 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1993965850| ~a$r_buff1_thd1~0_In-1993965850) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1993965850| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1993965850, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1993965850, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1993965850, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1993965850} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1993965850|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1993965850, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1993965850, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1993965850, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1993965850} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 16:59:40,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_148 |v_P0Thread1of1ForFork1_#t~ite8_50|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_148, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:59:40,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L837-1-->L839: Formula: (and (not (= |v_ULTIMATE.start_main_~#t295~0.base_12| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t295~0.base_12|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t295~0.base_12|)) (= |v_ULTIMATE.start_main_~#t295~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t295~0.base_12| 4)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t295~0.base_12| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t295~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t295~0.base_12|) |v_ULTIMATE.start_main_~#t295~0.offset_10| 2)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t295~0.offset=|v_ULTIMATE.start_main_~#t295~0.offset_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t295~0.base=|v_ULTIMATE.start_main_~#t295~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t295~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t295~0.base] because there is no mapped edge [2019-12-07 16:59:40,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L801-->L801-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In2040604612 256)))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In2040604612 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In2040604612 256)) .cse0) (and (= 0 (mod ~a$w_buff1_used~0_In2040604612 256)) .cse0) (= 0 (mod ~a$w_buff0_used~0_In2040604612 256)))) (= |P2Thread1of1ForFork0_#t~ite21_Out2040604612| |P2Thread1of1ForFork0_#t~ite20_Out2040604612|) .cse1 (= ~a$w_buff0~0_In2040604612 |P2Thread1of1ForFork0_#t~ite20_Out2040604612|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out2040604612| ~a$w_buff0~0_In2040604612) (= |P2Thread1of1ForFork0_#t~ite20_In2040604612| |P2Thread1of1ForFork0_#t~ite20_Out2040604612|) (not .cse1)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In2040604612, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2040604612, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2040604612, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2040604612, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2040604612, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In2040604612|, ~weak$$choice2~0=~weak$$choice2~0_In2040604612} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out2040604612|, ~a$w_buff0~0=~a$w_buff0~0_In2040604612, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2040604612, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2040604612, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2040604612, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out2040604612|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2040604612, ~weak$$choice2~0=~weak$$choice2~0_In2040604612} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 16:59:40,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1456114080 256) 0))) (or (and (= ~a$w_buff0_used~0_In1456114080 |P2Thread1of1ForFork0_#t~ite26_Out1456114080|) (= |P2Thread1of1ForFork0_#t~ite27_Out1456114080| |P2Thread1of1ForFork0_#t~ite26_Out1456114080|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1456114080 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1456114080 256)) (and (= 0 (mod ~a$w_buff1_used~0_In1456114080 256)) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In1456114080 256) 0) .cse1)))) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out1456114080| ~a$w_buff0_used~0_In1456114080) (= |P2Thread1of1ForFork0_#t~ite26_In1456114080| |P2Thread1of1ForFork0_#t~ite26_Out1456114080|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1456114080|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1456114080, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1456114080, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1456114080, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1456114080, ~weak$$choice2~0=~weak$$choice2~0_In1456114080} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1456114080|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1456114080|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1456114080, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1456114080, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1456114080, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1456114080, ~weak$$choice2~0=~weak$$choice2~0_In1456114080} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 16:59:40,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L804-->L804-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1794497240 256) 0))) (or (and (= ~a$w_buff1_used~0_In1794497240 |P2Thread1of1ForFork0_#t~ite29_Out1794497240|) (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1794497240 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1794497240 256)) (and (= (mod ~a$r_buff1_thd3~0_In1794497240 256) 0) .cse0) (and (= 0 (mod ~a$w_buff1_used~0_In1794497240 256)) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite30_Out1794497240| |P2Thread1of1ForFork0_#t~ite29_Out1794497240|)) (and (not .cse1) (= ~a$w_buff1_used~0_In1794497240 |P2Thread1of1ForFork0_#t~ite30_Out1794497240|) (= |P2Thread1of1ForFork0_#t~ite29_In1794497240| |P2Thread1of1ForFork0_#t~ite29_Out1794497240|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1794497240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1794497240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1794497240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1794497240, ~weak$$choice2~0=~weak$$choice2~0_In1794497240, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1794497240|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1794497240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1794497240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1794497240, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1794497240|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1794497240, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1794497240|, ~weak$$choice2~0=~weak$$choice2~0_In1794497240} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:59:40,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L805-->L806: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~a$r_buff0_thd3~0_136 v_~a$r_buff0_thd3~0_135)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_135, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:59:40,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_12 0) (= v_~a~0_57 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_57, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 16:59:40,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L812-2-->L812-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-2063077792 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-2063077792 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-2063077792| ~a$w_buff1~0_In-2063077792) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-2063077792| ~a~0_In-2063077792)))) InVars {~a~0=~a~0_In-2063077792, ~a$w_buff1~0=~a$w_buff1~0_In-2063077792, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2063077792, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2063077792} OutVars{~a~0=~a~0_In-2063077792, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-2063077792|, ~a$w_buff1~0=~a$w_buff1~0_In-2063077792, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2063077792, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2063077792} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:59:40,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L812-4-->L813: Formula: (= v_~a~0_20 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_20, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:59:40,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1483999240 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1483999240 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1483999240| ~a$w_buff0_used~0_In1483999240)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out1483999240| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1483999240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483999240} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1483999240|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483999240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483999240} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 16:59:40,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-1113421025 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1113421025 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In-1113421025 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-1113421025 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1113421025| ~a$w_buff1_used~0_In-1113421025) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1113421025|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1113421025, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1113421025, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1113421025, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1113421025} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1113421025, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1113421025, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1113421025, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1113421025, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1113421025|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 16:59:40,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In816314277 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In816314277 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out816314277| ~a$r_buff0_thd3~0_In816314277) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out816314277| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In816314277, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In816314277} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In816314277, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In816314277, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out816314277|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 16:59:40,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L816-->L816-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-274310577 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-274310577 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-274310577 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-274310577 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-274310577| ~a$r_buff1_thd3~0_In-274310577) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-274310577| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-274310577, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-274310577, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-274310577, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-274310577} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-274310577|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-274310577, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-274310577, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-274310577, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-274310577} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 16:59:40,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_122 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_122, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:59:40,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-208205612 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-208205612 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-208205612|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-208205612| ~a$w_buff0_used~0_In-208205612)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-208205612, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-208205612} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-208205612, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-208205612, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-208205612|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 16:59:40,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In2131199101 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In2131199101 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In2131199101 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In2131199101 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out2131199101|)) (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In2131199101 |P1Thread1of1ForFork2_#t~ite12_Out2131199101|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2131199101, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2131199101, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2131199101, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2131199101} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2131199101, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2131199101, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2131199101, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out2131199101|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2131199101} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 16:59:40,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1645647226 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1645647226 256)))) (or (and (= ~a$r_buff0_thd2~0_In1645647226 |P1Thread1of1ForFork2_#t~ite13_Out1645647226|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out1645647226| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1645647226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1645647226} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1645647226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1645647226, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1645647226|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 16:59:40,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd2~0_In-712320461 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-712320461 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-712320461 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-712320461 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-712320461|)) (and (or .cse2 .cse3) (= ~a$r_buff1_thd2~0_In-712320461 |P1Thread1of1ForFork2_#t~ite14_Out-712320461|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-712320461, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-712320461, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-712320461, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-712320461} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-712320461, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-712320461, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-712320461, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-712320461, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-712320461|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 16:59:40,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_79) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_79, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:59:40,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L839-1-->L845: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:59:40,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L845-2-->L845-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In972901548 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In972901548 256)))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out972901548| ~a$w_buff1~0_In972901548) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out972901548| ~a~0_In972901548)))) InVars {~a~0=~a~0_In972901548, ~a$w_buff1~0=~a$w_buff1~0_In972901548, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In972901548, ~a$w_buff1_used~0=~a$w_buff1_used~0_In972901548} OutVars{~a~0=~a~0_In972901548, ~a$w_buff1~0=~a$w_buff1~0_In972901548, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out972901548|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In972901548, ~a$w_buff1_used~0=~a$w_buff1_used~0_In972901548} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 16:59:40,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L845-4-->L846: Formula: (= v_~a~0_30 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_30, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:59:40,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In1457658804 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1457658804 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1457658804| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out1457658804| ~a$w_buff0_used~0_In1457658804)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1457658804, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1457658804} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1457658804, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1457658804|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1457658804} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 16:59:40,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In-1184585601 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1184585601 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-1184585601 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1184585601 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-1184585601| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-1184585601 |ULTIMATE.start_main_#t~ite50_Out-1184585601|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1184585601, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1184585601, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1184585601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1184585601} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1184585601|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1184585601, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1184585601, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1184585601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1184585601} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 16:59:40,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1088196199 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1088196199 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-1088196199 |ULTIMATE.start_main_#t~ite51_Out-1088196199|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1088196199| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1088196199, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1088196199} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1088196199|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1088196199, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1088196199} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:59:40,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1646470838 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1646470838 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In1646470838 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1646470838 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1646470838| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out1646470838| ~a$r_buff1_thd0~0_In1646470838)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1646470838, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1646470838, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1646470838, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1646470838} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1646470838|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1646470838, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1646470838, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1646470838, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1646470838} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 16:59:40,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~a$r_buff1_thd0~0_158 |v_ULTIMATE.start_main_#t~ite52_40|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_18 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 2 v_~x~0_125) (= v_~__unbuffered_p1_EBX~0_21 0) (= v_~__unbuffered_p2_EBX~0_24 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_158, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:59:40,425 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:59:40 BasicIcfg [2019-12-07 16:59:40,425 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:59:40,425 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:59:40,425 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:59:40,425 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:59:40,425 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:57:36" (3/4) ... [2019-12-07 16:59:40,427 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:59:40,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~a$r_buff1_thd0~0_203 0) (= 0 v_~a$r_buff1_thd1~0_191) (= v_~z~0_36 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t293~0.base_37|) 0) (= v_~a$r_buff0_thd0~0_228 0) (= 0 v_~a$r_buff0_thd1~0_317) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~a$r_buff0_thd2~0_205) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t293~0.base_37| 4)) (= v_~main$tmp_guard1~0_42 0) (= v_~a$r_buff0_thd3~0_430 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t293~0.base_37|) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= v_~__unbuffered_cnt~0_111 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x~0_176) (= v_~__unbuffered_p1_EBX~0_55 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= 0 |v_#NULL.base_4|) (= v_~a$mem_tmp~0_16 0) (= 0 v_~a$w_buff0_used~0_889) (= v_~a$w_buff0~0_416 0) (= v_~a$r_buff1_thd3~0_333 0) (= 0 v_~a$w_buff1_used~0_596) (= |v_#NULL.offset_4| 0) (= 0 v_~a$w_buff1~0_333) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t293~0.base_37| 1)) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t293~0.base_37| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t293~0.base_37|) |v_ULTIMATE.start_main_~#t293~0.offset_26| 0)) |v_#memory_int_23|) (= 0 v_~a$r_buff1_thd2~0_185) (= v_~a~0_191 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~weak$$choice0~0_13) (= v_~weak$$choice2~0_131 0) (= |v_ULTIMATE.start_main_~#t293~0.offset_26| 0) (= v_~y~0_31 0) (= 0 v_~a$read_delayed~0_8) (= v_~a$flush_delayed~0_26 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_228, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_127|, ~a~0=v_~a~0_191, ULTIMATE.start_main_~#t293~0.offset=|v_ULTIMATE.start_main_~#t293~0.offset_26|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, ULTIMATE.start_main_~#t294~0.base=|v_ULTIMATE.start_main_~#t294~0.base_38|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_333, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_889, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_317, ULTIMATE.start_main_~#t295~0.base=|v_ULTIMATE.start_main_~#t295~0.base_30|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ULTIMATE.start_main_~#t295~0.offset=|v_ULTIMATE.start_main_~#t295~0.offset_18|, ~a$w_buff0~0=v_~a$w_buff0~0_416, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_203, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, ~x~0=v_~x~0_176, ULTIMATE.start_main_~#t294~0.offset=|v_ULTIMATE.start_main_~#t294~0.offset_26|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_67|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~a$w_buff1~0=v_~a$w_buff1~0_333, ~y~0=v_~y~0_31, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_55, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_191, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_430, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_26, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_36, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_596, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t293~0.base=|v_ULTIMATE.start_main_~#t293~0.base_37|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_~#t293~0.offset, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t294~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t295~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t295~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t294~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t293~0.base] because there is no mapped edge [2019-12-07 16:59:40,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L835-1-->L837: Formula: (and (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t294~0.base_13|) 0) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t294~0.base_13| 1) |v_#valid_40|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t294~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t294~0.base_13|) |v_ULTIMATE.start_main_~#t294~0.offset_11| 1)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t294~0.base_13|)) (= |v_ULTIMATE.start_main_~#t294~0.offset_11| 0) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t294~0.base_13| 4) |v_#length_17|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t294~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t294~0.offset=|v_ULTIMATE.start_main_~#t294~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, ULTIMATE.start_main_~#t294~0.base=|v_ULTIMATE.start_main_~#t294~0.base_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t294~0.offset, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t294~0.base, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 16:59:40,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L750: Formula: (and (= v_~a$r_buff0_thd1~0_28 v_~a$r_buff1_thd1~0_23) (= v_~a$r_buff0_thd2~0_20 v_~a$r_buff1_thd2~0_16) (= v_~a$r_buff0_thd0~0_18 v_~a$r_buff1_thd0~0_17) (= v_~a$r_buff0_thd1~0_27 1) (= 1 v_~x~0_7) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~a$r_buff0_thd3~0_73 v_~a$r_buff1_thd3~0_40)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_28, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18} OutVars{~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_23, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_40, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_16, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_17, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_27, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18, ~x~0=v_~x~0_7} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 16:59:40,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L776-2-->L776-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In221916422 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In221916422 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In221916422 |P1Thread1of1ForFork2_#t~ite9_Out221916422|) (not .cse1)) (and (or .cse0 .cse1) (= ~a~0_In221916422 |P1Thread1of1ForFork2_#t~ite9_Out221916422|)))) InVars {~a~0=~a~0_In221916422, ~a$w_buff1~0=~a$w_buff1~0_In221916422, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In221916422, ~a$w_buff1_used~0=~a$w_buff1_used~0_In221916422} OutVars{~a~0=~a~0_In221916422, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out221916422|, ~a$w_buff1~0=~a$w_buff1~0_In221916422, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In221916422, ~a$w_buff1_used~0=~a$w_buff1_used~0_In221916422} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 16:59:40,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_47) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_47, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 16:59:40,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-741496457 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-741496457 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-741496457|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In-741496457 |P0Thread1of1ForFork1_#t~ite5_Out-741496457|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-741496457, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-741496457} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-741496457|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-741496457, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-741496457} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 16:59:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In693888590 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In693888590 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd1~0_In693888590 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In693888590 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out693888590| 0)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out693888590| ~a$w_buff1_used~0_In693888590) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In693888590, ~a$w_buff0_used~0=~a$w_buff0_used~0_In693888590, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In693888590, ~a$w_buff1_used~0=~a$w_buff1_used~0_In693888590} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out693888590|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In693888590, ~a$w_buff0_used~0=~a$w_buff0_used~0_In693888590, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In693888590, ~a$w_buff1_used~0=~a$w_buff1_used~0_In693888590} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 16:59:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L753-->L754: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-2100830407 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In-2100830407 256))) (.cse1 (= ~a$r_buff0_thd1~0_In-2100830407 ~a$r_buff0_thd1~0_Out-2100830407))) (or (and .cse0 .cse1) (and (= ~a$r_buff0_thd1~0_Out-2100830407 0) (not .cse2) (not .cse0)) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2100830407, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2100830407} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-2100830407|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2100830407, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-2100830407} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:59:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L754-->L754-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1993965850 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1993965850 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In-1993965850 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1993965850 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1993965850| ~a$r_buff1_thd1~0_In-1993965850) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1993965850| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1993965850, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1993965850, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1993965850, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1993965850} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1993965850|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1993965850, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1993965850, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1993965850, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1993965850} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 16:59:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_148 |v_P0Thread1of1ForFork1_#t~ite8_50|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_148, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:59:40,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L837-1-->L839: Formula: (and (not (= |v_ULTIMATE.start_main_~#t295~0.base_12| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t295~0.base_12|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t295~0.base_12|)) (= |v_ULTIMATE.start_main_~#t295~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t295~0.base_12| 4)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t295~0.base_12| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t295~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t295~0.base_12|) |v_ULTIMATE.start_main_~#t295~0.offset_10| 2)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t295~0.offset=|v_ULTIMATE.start_main_~#t295~0.offset_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t295~0.base=|v_ULTIMATE.start_main_~#t295~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t295~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t295~0.base] because there is no mapped edge [2019-12-07 16:59:40,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L801-->L801-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In2040604612 256)))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In2040604612 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In2040604612 256)) .cse0) (and (= 0 (mod ~a$w_buff1_used~0_In2040604612 256)) .cse0) (= 0 (mod ~a$w_buff0_used~0_In2040604612 256)))) (= |P2Thread1of1ForFork0_#t~ite21_Out2040604612| |P2Thread1of1ForFork0_#t~ite20_Out2040604612|) .cse1 (= ~a$w_buff0~0_In2040604612 |P2Thread1of1ForFork0_#t~ite20_Out2040604612|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out2040604612| ~a$w_buff0~0_In2040604612) (= |P2Thread1of1ForFork0_#t~ite20_In2040604612| |P2Thread1of1ForFork0_#t~ite20_Out2040604612|) (not .cse1)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In2040604612, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2040604612, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2040604612, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2040604612, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2040604612, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In2040604612|, ~weak$$choice2~0=~weak$$choice2~0_In2040604612} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out2040604612|, ~a$w_buff0~0=~a$w_buff0~0_In2040604612, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2040604612, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2040604612, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2040604612, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out2040604612|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2040604612, ~weak$$choice2~0=~weak$$choice2~0_In2040604612} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 16:59:40,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1456114080 256) 0))) (or (and (= ~a$w_buff0_used~0_In1456114080 |P2Thread1of1ForFork0_#t~ite26_Out1456114080|) (= |P2Thread1of1ForFork0_#t~ite27_Out1456114080| |P2Thread1of1ForFork0_#t~ite26_Out1456114080|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1456114080 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1456114080 256)) (and (= 0 (mod ~a$w_buff1_used~0_In1456114080 256)) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In1456114080 256) 0) .cse1)))) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out1456114080| ~a$w_buff0_used~0_In1456114080) (= |P2Thread1of1ForFork0_#t~ite26_In1456114080| |P2Thread1of1ForFork0_#t~ite26_Out1456114080|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1456114080|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1456114080, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1456114080, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1456114080, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1456114080, ~weak$$choice2~0=~weak$$choice2~0_In1456114080} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1456114080|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1456114080|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1456114080, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1456114080, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1456114080, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1456114080, ~weak$$choice2~0=~weak$$choice2~0_In1456114080} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 16:59:40,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L804-->L804-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1794497240 256) 0))) (or (and (= ~a$w_buff1_used~0_In1794497240 |P2Thread1of1ForFork0_#t~ite29_Out1794497240|) (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1794497240 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1794497240 256)) (and (= (mod ~a$r_buff1_thd3~0_In1794497240 256) 0) .cse0) (and (= 0 (mod ~a$w_buff1_used~0_In1794497240 256)) .cse0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite30_Out1794497240| |P2Thread1of1ForFork0_#t~ite29_Out1794497240|)) (and (not .cse1) (= ~a$w_buff1_used~0_In1794497240 |P2Thread1of1ForFork0_#t~ite30_Out1794497240|) (= |P2Thread1of1ForFork0_#t~ite29_In1794497240| |P2Thread1of1ForFork0_#t~ite29_Out1794497240|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1794497240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1794497240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1794497240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1794497240, ~weak$$choice2~0=~weak$$choice2~0_In1794497240, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1794497240|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1794497240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1794497240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1794497240, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1794497240|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1794497240, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1794497240|, ~weak$$choice2~0=~weak$$choice2~0_In1794497240} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:59:40,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L805-->L806: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~a$r_buff0_thd3~0_136 v_~a$r_buff0_thd3~0_135)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_135, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:59:40,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_12 0) (= v_~a~0_57 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_57, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 16:59:40,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L812-2-->L812-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-2063077792 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-2063077792 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-2063077792| ~a$w_buff1~0_In-2063077792) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-2063077792| ~a~0_In-2063077792)))) InVars {~a~0=~a~0_In-2063077792, ~a$w_buff1~0=~a$w_buff1~0_In-2063077792, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2063077792, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2063077792} OutVars{~a~0=~a~0_In-2063077792, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-2063077792|, ~a$w_buff1~0=~a$w_buff1~0_In-2063077792, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2063077792, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2063077792} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:59:40,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L812-4-->L813: Formula: (= v_~a~0_20 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_20, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:59:40,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1483999240 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1483999240 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1483999240| ~a$w_buff0_used~0_In1483999240)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out1483999240| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1483999240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483999240} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1483999240|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1483999240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1483999240} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 16:59:40,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-1113421025 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1113421025 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In-1113421025 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-1113421025 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1113421025| ~a$w_buff1_used~0_In-1113421025) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1113421025|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1113421025, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1113421025, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1113421025, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1113421025} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1113421025, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1113421025, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1113421025, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1113421025, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1113421025|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 16:59:40,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In816314277 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In816314277 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out816314277| ~a$r_buff0_thd3~0_In816314277) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out816314277| 0) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In816314277, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In816314277} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In816314277, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In816314277, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out816314277|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 16:59:40,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L816-->L816-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-274310577 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-274310577 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-274310577 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-274310577 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-274310577| ~a$r_buff1_thd3~0_In-274310577) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-274310577| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-274310577, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-274310577, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-274310577, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-274310577} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-274310577|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-274310577, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-274310577, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-274310577, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-274310577} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 16:59:40,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_122 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_122, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:59:40,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-208205612 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-208205612 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-208205612|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-208205612| ~a$w_buff0_used~0_In-208205612)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-208205612, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-208205612} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-208205612, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-208205612, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-208205612|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 16:59:40,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In2131199101 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In2131199101 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In2131199101 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In2131199101 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out2131199101|)) (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In2131199101 |P1Thread1of1ForFork2_#t~ite12_Out2131199101|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2131199101, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2131199101, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2131199101, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2131199101} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2131199101, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In2131199101, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2131199101, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out2131199101|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2131199101} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 16:59:40,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1645647226 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1645647226 256)))) (or (and (= ~a$r_buff0_thd2~0_In1645647226 |P1Thread1of1ForFork2_#t~ite13_Out1645647226|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out1645647226| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1645647226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1645647226} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1645647226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1645647226, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1645647226|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 16:59:40,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd2~0_In-712320461 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-712320461 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-712320461 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-712320461 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-712320461|)) (and (or .cse2 .cse3) (= ~a$r_buff1_thd2~0_In-712320461 |P1Thread1of1ForFork2_#t~ite14_Out-712320461|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-712320461, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-712320461, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-712320461, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-712320461} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-712320461, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-712320461, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-712320461, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-712320461, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-712320461|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 16:59:40,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_79) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_79, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:59:40,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L839-1-->L845: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:59:40,438 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L845-2-->L845-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In972901548 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In972901548 256)))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out972901548| ~a$w_buff1~0_In972901548) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out972901548| ~a~0_In972901548)))) InVars {~a~0=~a~0_In972901548, ~a$w_buff1~0=~a$w_buff1~0_In972901548, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In972901548, ~a$w_buff1_used~0=~a$w_buff1_used~0_In972901548} OutVars{~a~0=~a~0_In972901548, ~a$w_buff1~0=~a$w_buff1~0_In972901548, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out972901548|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In972901548, ~a$w_buff1_used~0=~a$w_buff1_used~0_In972901548} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 16:59:40,438 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L845-4-->L846: Formula: (= v_~a~0_30 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_30, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:59:40,438 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In1457658804 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1457658804 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1457658804| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out1457658804| ~a$w_buff0_used~0_In1457658804)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1457658804, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1457658804} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1457658804, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1457658804|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1457658804} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 16:59:40,438 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd0~0_In-1184585601 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1184585601 256))) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-1184585601 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1184585601 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-1184585601| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-1184585601 |ULTIMATE.start_main_#t~ite50_Out-1184585601|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1184585601, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1184585601, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1184585601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1184585601} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1184585601|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1184585601, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1184585601, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1184585601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1184585601} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 16:59:40,439 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1088196199 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1088196199 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In-1088196199 |ULTIMATE.start_main_#t~ite51_Out-1088196199|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1088196199| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1088196199, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1088196199} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1088196199|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1088196199, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1088196199} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:59:40,439 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1646470838 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1646470838 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In1646470838 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1646470838 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1646470838| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out1646470838| ~a$r_buff1_thd0~0_In1646470838)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1646470838, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1646470838, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1646470838, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1646470838} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1646470838|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1646470838, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1646470838, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1646470838, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1646470838} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 16:59:40,439 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~a$r_buff1_thd0~0_158 |v_ULTIMATE.start_main_#t~ite52_40|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_18 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 2 v_~x~0_125) (= v_~__unbuffered_p1_EBX~0_21 0) (= v_~__unbuffered_p2_EBX~0_24 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_158, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:59:40,490 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_20b2f2c5-6047-4f35-a14b-da5cfa745a59/bin/uautomizer/witness.graphml [2019-12-07 16:59:40,490 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:59:40,491 INFO L168 Benchmark]: Toolchain (without parser) took 124849.93 ms. Allocated memory was 1.0 GB in the beginning and 7.4 GB in the end (delta: 6.4 GB). Free memory was 942.4 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 16:59:40,491 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 962.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:59:40,491 INFO L168 Benchmark]: CACSL2BoogieTranslator took 434.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -133.3 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. [2019-12-07 16:59:40,492 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. [2019-12-07 16:59:40,492 INFO L168 Benchmark]: Boogie Preprocessor took 25.41 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:59:40,492 INFO L168 Benchmark]: RCFGBuilder took 407.74 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.8 MB). Peak memory consumption was 60.8 MB. Max. memory is 11.5 GB. [2019-12-07 16:59:40,492 INFO L168 Benchmark]: TraceAbstraction took 123876.94 ms. Allocated memory was 1.1 GB in the beginning and 7.4 GB in the end (delta: 6.3 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 16:59:40,493 INFO L168 Benchmark]: Witness Printer took 65.00 ms. Allocated memory is still 7.4 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 11.2 MB). Peak memory consumption was 11.2 MB. Max. memory is 11.5 GB. [2019-12-07 16:59:40,494 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 962.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 434.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -133.3 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.41 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 407.74 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.8 MB). Peak memory consumption was 60.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 123876.94 ms. Allocated memory was 1.1 GB in the beginning and 7.4 GB in the end (delta: 6.3 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. * Witness Printer took 65.00 ms. Allocated memory is still 7.4 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 11.2 MB). Peak memory consumption was 11.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 94 ProgramPointsAfterwards, 215 TransitionsBefore, 103 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7568 VarBasedMoverChecksPositive, 290 VarBasedMoverChecksNegative, 97 SemBasedMoverChecksPositive, 263 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 90866 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t293, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t294, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L735] 1 a$w_buff1 = a$w_buff0 [L736] 1 a$w_buff0 = 1 [L737] 1 a$w_buff1_used = a$w_buff0_used [L738] 1 a$w_buff0_used = (_Bool)1 [L750] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L764] 2 x = 2 [L767] 2 y = 1 [L770] 2 __unbuffered_p1_EAX = y [L773] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L750] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L751] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L752] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L839] FCALL, FORK 0 pthread_create(&t295, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L790] 3 z = 1 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=2, y=1, z=1] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L812] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L845] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 123.7s, OverallIterations: 31, TraceHistogramMax: 1, AutomataDifference: 45.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9369 SDtfs, 12749 SDslu, 38138 SDs, 0 SdLazy, 30908 SolverSat, 672 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 24.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 645 GetRequests, 83 SyntacticMatches, 36 SemanticMatches, 526 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4964 ImplicationChecksByTransitivity, 8.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=214683occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 53.2s AutomataMinimizationTime, 30 MinimizatonAttempts, 405946 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 1520 NumberOfCodeBlocks, 1520 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 1423 ConstructedInterpolants, 0 QuantifiedInterpolants, 640576 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...