./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix011_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix011_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e0fc5747625a0d652be1f6e8b64d5710c845fef9 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:55:21,141 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:55:21,142 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:55:21,150 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:55:21,150 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:55:21,151 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:55:21,152 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:55:21,153 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:55:21,154 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:55:21,155 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:55:21,155 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:55:21,156 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:55:21,156 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:55:21,157 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:55:21,158 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:55:21,159 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:55:21,159 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:55:21,160 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:55:21,161 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:55:21,163 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:55:21,164 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:55:21,165 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:55:21,166 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:55:21,166 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:55:21,168 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:55:21,168 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:55:21,168 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:55:21,169 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:55:21,169 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:55:21,169 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:55:21,170 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:55:21,170 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:55:21,171 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:55:21,171 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:55:21,172 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:55:21,172 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:55:21,172 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:55:21,172 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:55:21,172 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:55:21,173 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:55:21,173 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:55:21,174 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:55:21,183 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:55:21,184 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:55:21,184 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:55:21,185 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:55:21,185 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:55:21,185 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:55:21,185 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:55:21,185 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:55:21,185 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:55:21,185 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:55:21,186 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:55:21,186 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:55:21,186 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:55:21,186 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:55:21,186 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:55:21,186 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:55:21,186 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:55:21,187 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:55:21,187 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:55:21,187 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:55:21,187 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:55:21,187 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:55:21,187 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:55:21,188 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:55:21,188 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:55:21,188 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:55:21,188 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:55:21,188 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:55:21,188 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:55:21,188 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e0fc5747625a0d652be1f6e8b64d5710c845fef9 [2019-12-07 18:55:21,288 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:55:21,298 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:55:21,301 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:55:21,302 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:55:21,303 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:55:21,303 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix011_tso.oepc.i [2019-12-07 18:55:21,341 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/data/06ef0360b/b1af422b54dd4774aaf4cc814589b2a0/FLAG3928c80d5 [2019-12-07 18:55:21,713 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:55:21,713 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/sv-benchmarks/c/pthread-wmm/mix011_tso.oepc.i [2019-12-07 18:55:21,723 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/data/06ef0360b/b1af422b54dd4774aaf4cc814589b2a0/FLAG3928c80d5 [2019-12-07 18:55:21,732 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/data/06ef0360b/b1af422b54dd4774aaf4cc814589b2a0 [2019-12-07 18:55:21,734 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:55:21,735 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:55:21,735 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:55:21,735 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:55:21,737 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:55:21,738 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:55:21" (1/1) ... [2019-12-07 18:55:21,740 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:21, skipping insertion in model container [2019-12-07 18:55:21,740 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:55:21" (1/1) ... [2019-12-07 18:55:21,744 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:55:21,773 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:55:22,032 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:55:22,040 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:55:22,081 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:55:22,126 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:55:22,126 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22 WrapperNode [2019-12-07 18:55:22,126 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:55:22,127 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:55:22,127 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:55:22,127 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:55:22,132 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,145 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,165 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:55:22,166 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:55:22,166 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:55:22,166 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:55:22,172 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,172 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,175 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,176 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,183 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,186 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,188 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... [2019-12-07 18:55:22,191 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:55:22,192 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:55:22,192 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:55:22,192 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:55:22,192 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:55:22,235 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:55:22,235 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:55:22,235 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:55:22,235 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:55:22,235 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:55:22,235 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:55:22,235 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:55:22,236 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:55:22,236 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:55:22,236 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:55:22,236 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:55:22,236 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:55:22,236 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:55:22,237 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:55:22,593 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:55:22,594 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:55:22,594 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:55:22 BoogieIcfgContainer [2019-12-07 18:55:22,595 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:55:22,595 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:55:22,595 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:55:22,597 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:55:22,597 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:55:21" (1/3) ... [2019-12-07 18:55:22,598 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@75163a9a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:55:22, skipping insertion in model container [2019-12-07 18:55:22,598 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:55:22" (2/3) ... [2019-12-07 18:55:22,598 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@75163a9a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:55:22, skipping insertion in model container [2019-12-07 18:55:22,598 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:55:22" (3/3) ... [2019-12-07 18:55:22,599 INFO L109 eAbstractionObserver]: Analyzing ICFG mix011_tso.oepc.i [2019-12-07 18:55:22,606 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:55:22,606 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:55:22,611 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:55:22,611 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:55:22,634 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,634 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,634 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,634 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,638 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,638 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,638 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,638 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,639 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,639 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,639 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,640 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,641 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,642 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,642 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,642 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,642 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,643 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:55:22,656 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:55:22,669 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:55:22,669 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:55:22,669 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:55:22,669 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:55:22,669 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:55:22,669 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:55:22,669 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:55:22,669 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:55:22,680 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 18:55:22,682 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 18:55:22,738 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 18:55:22,738 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:55:22,748 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 587 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:55:22,762 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 18:55:22,792 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 18:55:22,793 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:55:22,798 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 587 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:55:22,812 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 18:55:22,813 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:55:25,752 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 18:55:25,854 INFO L206 etLargeBlockEncoding]: Checked pairs total: 79597 [2019-12-07 18:55:25,855 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 18:55:25,857 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 104 transitions [2019-12-07 18:55:41,830 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 120990 states. [2019-12-07 18:55:41,832 INFO L276 IsEmpty]: Start isEmpty. Operand 120990 states. [2019-12-07 18:55:41,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 18:55:41,836 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:41,836 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 18:55:41,836 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:41,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:41,840 INFO L82 PathProgramCache]: Analyzing trace with hash 823804832, now seen corresponding path program 1 times [2019-12-07 18:55:41,846 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:41,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855660195] [2019-12-07 18:55:41,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:41,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:41,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:41,987 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855660195] [2019-12-07 18:55:41,988 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:41,988 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:55:41,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1919051270] [2019-12-07 18:55:41,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:55:41,992 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:42,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:55:42,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:42,002 INFO L87 Difference]: Start difference. First operand 120990 states. Second operand 3 states. [2019-12-07 18:55:42,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:42,733 INFO L93 Difference]: Finished difference Result 120600 states and 514006 transitions. [2019-12-07 18:55:42,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:55:42,734 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 18:55:42,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:43,434 INFO L225 Difference]: With dead ends: 120600 [2019-12-07 18:55:43,434 INFO L226 Difference]: Without dead ends: 118052 [2019-12-07 18:55:43,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:55:47,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118052 states. [2019-12-07 18:55:50,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118052 to 118052. [2019-12-07 18:55:50,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118052 states. [2019-12-07 18:55:50,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118052 states to 118052 states and 503618 transitions. [2019-12-07 18:55:50,590 INFO L78 Accepts]: Start accepts. Automaton has 118052 states and 503618 transitions. Word has length 5 [2019-12-07 18:55:50,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:55:50,590 INFO L462 AbstractCegarLoop]: Abstraction has 118052 states and 503618 transitions. [2019-12-07 18:55:50,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:55:50,590 INFO L276 IsEmpty]: Start isEmpty. Operand 118052 states and 503618 transitions. [2019-12-07 18:55:50,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:55:50,593 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:55:50,593 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:55:50,594 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:55:50,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:55:50,594 INFO L82 PathProgramCache]: Analyzing trace with hash -1936906510, now seen corresponding path program 1 times [2019-12-07 18:55:50,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:55:50,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1442602043] [2019-12-07 18:55:50,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:55:50,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:55:50,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:55:50,645 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1442602043] [2019-12-07 18:55:50,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:55:50,645 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:55:50,646 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116640779] [2019-12-07 18:55:50,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:55:50,647 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:55:50,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:55:50,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:55:50,647 INFO L87 Difference]: Start difference. First operand 118052 states and 503618 transitions. Second operand 4 states. [2019-12-07 18:55:51,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:55:51,811 INFO L93 Difference]: Finished difference Result 184662 states and 757542 transitions. [2019-12-07 18:55:51,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:55:51,812 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:55:51,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:55:52,290 INFO L225 Difference]: With dead ends: 184662 [2019-12-07 18:55:52,291 INFO L226 Difference]: Without dead ends: 184613 [2019-12-07 18:55:52,291 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:55:57,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184613 states. [2019-12-07 18:56:01,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184613 to 167233. [2019-12-07 18:56:01,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167233 states. [2019-12-07 18:56:01,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167233 states to 167233 states and 693346 transitions. [2019-12-07 18:56:01,926 INFO L78 Accepts]: Start accepts. Automaton has 167233 states and 693346 transitions. Word has length 11 [2019-12-07 18:56:01,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:01,926 INFO L462 AbstractCegarLoop]: Abstraction has 167233 states and 693346 transitions. [2019-12-07 18:56:01,926 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:01,926 INFO L276 IsEmpty]: Start isEmpty. Operand 167233 states and 693346 transitions. [2019-12-07 18:56:01,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:56:01,929 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:01,929 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:01,929 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:01,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:01,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1309496674, now seen corresponding path program 1 times [2019-12-07 18:56:01,929 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:01,929 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412338170] [2019-12-07 18:56:01,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:01,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:01,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:01,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [412338170] [2019-12-07 18:56:01,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:01,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:01,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [841758160] [2019-12-07 18:56:01,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:56:01,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:01,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:56:01,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:01,985 INFO L87 Difference]: Start difference. First operand 167233 states and 693346 transitions. Second operand 4 states. [2019-12-07 18:56:02,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:02,975 INFO L93 Difference]: Finished difference Result 212509 states and 866050 transitions. [2019-12-07 18:56:02,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:56:02,976 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:56:02,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:03,510 INFO L225 Difference]: With dead ends: 212509 [2019-12-07 18:56:03,510 INFO L226 Difference]: Without dead ends: 212509 [2019-12-07 18:56:03,511 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:09,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212509 states. [2019-12-07 18:56:13,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212509 to 189631. [2019-12-07 18:56:13,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189631 states. [2019-12-07 18:56:14,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189631 states to 189631 states and 780306 transitions. [2019-12-07 18:56:14,235 INFO L78 Accepts]: Start accepts. Automaton has 189631 states and 780306 transitions. Word has length 13 [2019-12-07 18:56:14,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:14,236 INFO L462 AbstractCegarLoop]: Abstraction has 189631 states and 780306 transitions. [2019-12-07 18:56:14,236 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:14,236 INFO L276 IsEmpty]: Start isEmpty. Operand 189631 states and 780306 transitions. [2019-12-07 18:56:14,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:56:14,238 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:14,238 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:14,238 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:14,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:14,239 INFO L82 PathProgramCache]: Analyzing trace with hash -2091761214, now seen corresponding path program 1 times [2019-12-07 18:56:14,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:14,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703395233] [2019-12-07 18:56:14,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:14,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:14,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:14,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703395233] [2019-12-07 18:56:14,277 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:14,277 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:14,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767690117] [2019-12-07 18:56:14,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:56:14,277 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:14,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:56:14,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:14,278 INFO L87 Difference]: Start difference. First operand 189631 states and 780306 transitions. Second operand 4 states. [2019-12-07 18:56:15,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:15,822 INFO L93 Difference]: Finished difference Result 262486 states and 1060846 transitions. [2019-12-07 18:56:15,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:56:15,823 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:56:15,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:16,500 INFO L225 Difference]: With dead ends: 262486 [2019-12-07 18:56:16,500 INFO L226 Difference]: Without dead ends: 262423 [2019-12-07 18:56:16,500 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:22,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262423 states. [2019-12-07 18:56:28,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262423 to 213032. [2019-12-07 18:56:28,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213032 states. [2019-12-07 18:56:28,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213032 states to 213032 states and 875776 transitions. [2019-12-07 18:56:28,716 INFO L78 Accepts]: Start accepts. Automaton has 213032 states and 875776 transitions. Word has length 13 [2019-12-07 18:56:28,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:28,717 INFO L462 AbstractCegarLoop]: Abstraction has 213032 states and 875776 transitions. [2019-12-07 18:56:28,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:28,717 INFO L276 IsEmpty]: Start isEmpty. Operand 213032 states and 875776 transitions. [2019-12-07 18:56:28,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:56:28,732 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:28,732 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:28,733 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:28,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:28,733 INFO L82 PathProgramCache]: Analyzing trace with hash -730789889, now seen corresponding path program 1 times [2019-12-07 18:56:28,733 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:28,733 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [430803651] [2019-12-07 18:56:28,733 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:28,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:28,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:28,785 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [430803651] [2019-12-07 18:56:28,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:28,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:28,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597046716] [2019-12-07 18:56:28,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:56:28,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:28,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:56:28,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:28,786 INFO L87 Difference]: Start difference. First operand 213032 states and 875776 transitions. Second operand 5 states. [2019-12-07 18:56:30,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:30,708 INFO L93 Difference]: Finished difference Result 314419 states and 1263029 transitions. [2019-12-07 18:56:30,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:56:30,709 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:56:30,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:31,478 INFO L225 Difference]: With dead ends: 314419 [2019-12-07 18:56:31,478 INFO L226 Difference]: Without dead ends: 314356 [2019-12-07 18:56:31,478 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:37,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314356 states. [2019-12-07 18:56:41,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314356 to 224697. [2019-12-07 18:56:41,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224697 states. [2019-12-07 18:56:42,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224697 states to 224697 states and 919025 transitions. [2019-12-07 18:56:42,098 INFO L78 Accepts]: Start accepts. Automaton has 224697 states and 919025 transitions. Word has length 19 [2019-12-07 18:56:42,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:42,099 INFO L462 AbstractCegarLoop]: Abstraction has 224697 states and 919025 transitions. [2019-12-07 18:56:42,099 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:56:42,099 INFO L276 IsEmpty]: Start isEmpty. Operand 224697 states and 919025 transitions. [2019-12-07 18:56:42,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:56:42,111 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:42,112 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:42,112 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:42,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:42,112 INFO L82 PathProgramCache]: Analyzing trace with hash 1023468144, now seen corresponding path program 1 times [2019-12-07 18:56:42,112 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:42,112 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808251894] [2019-12-07 18:56:42,112 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:42,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:42,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:42,165 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808251894] [2019-12-07 18:56:42,166 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:42,166 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:42,166 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1003174014] [2019-12-07 18:56:42,166 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:56:42,166 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:42,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:56:42,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:56:42,167 INFO L87 Difference]: Start difference. First operand 224697 states and 919025 transitions. Second operand 4 states. [2019-12-07 18:56:42,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:42,674 INFO L93 Difference]: Finished difference Result 48817 states and 158747 transitions. [2019-12-07 18:56:42,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:56:42,675 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 18:56:42,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:42,734 INFO L225 Difference]: With dead ends: 48817 [2019-12-07 18:56:42,734 INFO L226 Difference]: Without dead ends: 43049 [2019-12-07 18:56:42,734 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:42,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43049 states. [2019-12-07 18:56:43,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43049 to 43049. [2019-12-07 18:56:43,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43049 states. [2019-12-07 18:56:43,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43049 states to 43049 states and 137632 transitions. [2019-12-07 18:56:43,393 INFO L78 Accepts]: Start accepts. Automaton has 43049 states and 137632 transitions. Word has length 19 [2019-12-07 18:56:43,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:43,394 INFO L462 AbstractCegarLoop]: Abstraction has 43049 states and 137632 transitions. [2019-12-07 18:56:43,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:56:43,394 INFO L276 IsEmpty]: Start isEmpty. Operand 43049 states and 137632 transitions. [2019-12-07 18:56:43,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:56:43,396 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:43,396 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:43,396 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:43,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:43,397 INFO L82 PathProgramCache]: Analyzing trace with hash -4084112, now seen corresponding path program 1 times [2019-12-07 18:56:43,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:43,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053683990] [2019-12-07 18:56:43,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:43,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:43,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:43,440 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053683990] [2019-12-07 18:56:43,440 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:43,440 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:43,441 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1418259240] [2019-12-07 18:56:43,441 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:56:43,441 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:43,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:56:43,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:43,441 INFO L87 Difference]: Start difference. First operand 43049 states and 137632 transitions. Second operand 5 states. [2019-12-07 18:56:43,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:43,931 INFO L93 Difference]: Finished difference Result 60449 states and 189465 transitions. [2019-12-07 18:56:43,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:56:43,932 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:56:43,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:44,015 INFO L225 Difference]: With dead ends: 60449 [2019-12-07 18:56:44,015 INFO L226 Difference]: Without dead ends: 60268 [2019-12-07 18:56:44,015 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:44,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60268 states. [2019-12-07 18:56:44,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60268 to 43868. [2019-12-07 18:56:44,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43868 states. [2019-12-07 18:56:44,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43868 states to 43868 states and 140115 transitions. [2019-12-07 18:56:44,795 INFO L78 Accepts]: Start accepts. Automaton has 43868 states and 140115 transitions. Word has length 19 [2019-12-07 18:56:44,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:44,795 INFO L462 AbstractCegarLoop]: Abstraction has 43868 states and 140115 transitions. [2019-12-07 18:56:44,795 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:56:44,795 INFO L276 IsEmpty]: Start isEmpty. Operand 43868 states and 140115 transitions. [2019-12-07 18:56:44,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:56:44,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:44,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:44,802 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:44,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:44,802 INFO L82 PathProgramCache]: Analyzing trace with hash 1550589235, now seen corresponding path program 1 times [2019-12-07 18:56:44,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:44,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [580097682] [2019-12-07 18:56:44,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:44,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:44,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:44,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [580097682] [2019-12-07 18:56:44,841 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:44,841 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:44,841 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356691500] [2019-12-07 18:56:44,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:56:44,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:44,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:56:44,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:44,842 INFO L87 Difference]: Start difference. First operand 43868 states and 140115 transitions. Second operand 5 states. [2019-12-07 18:56:45,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:45,539 INFO L93 Difference]: Finished difference Result 58028 states and 182043 transitions. [2019-12-07 18:56:45,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:56:45,540 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:56:45,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:45,620 INFO L225 Difference]: With dead ends: 58028 [2019-12-07 18:56:45,620 INFO L226 Difference]: Without dead ends: 58028 [2019-12-07 18:56:45,621 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:45,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58028 states. [2019-12-07 18:56:46,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58028 to 46049. [2019-12-07 18:56:46,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46049 states. [2019-12-07 18:56:46,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46049 states to 46049 states and 146753 transitions. [2019-12-07 18:56:46,387 INFO L78 Accepts]: Start accepts. Automaton has 46049 states and 146753 transitions. Word has length 25 [2019-12-07 18:56:46,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:46,387 INFO L462 AbstractCegarLoop]: Abstraction has 46049 states and 146753 transitions. [2019-12-07 18:56:46,387 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:56:46,387 INFO L276 IsEmpty]: Start isEmpty. Operand 46049 states and 146753 transitions. [2019-12-07 18:56:46,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:56:46,400 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:46,400 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:46,400 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:46,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:46,400 INFO L82 PathProgramCache]: Analyzing trace with hash -1773863128, now seen corresponding path program 1 times [2019-12-07 18:56:46,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:46,401 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104179100] [2019-12-07 18:56:46,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:46,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:46,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:46,478 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [104179100] [2019-12-07 18:56:46,478 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:46,478 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:56:46,478 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1997699057] [2019-12-07 18:56:46,478 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:56:46,479 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:46,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:56:46,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:56:46,479 INFO L87 Difference]: Start difference. First operand 46049 states and 146753 transitions. Second operand 6 states. [2019-12-07 18:56:47,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:47,142 INFO L93 Difference]: Finished difference Result 57254 states and 180190 transitions. [2019-12-07 18:56:47,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:56:47,142 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 18:56:47,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:47,222 INFO L225 Difference]: With dead ends: 57254 [2019-12-07 18:56:47,222 INFO L226 Difference]: Without dead ends: 57241 [2019-12-07 18:56:47,222 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:56:47,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57241 states. [2019-12-07 18:56:48,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57241 to 42787. [2019-12-07 18:56:48,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42787 states. [2019-12-07 18:56:49,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42787 states to 42787 states and 136979 transitions. [2019-12-07 18:56:49,016 INFO L78 Accepts]: Start accepts. Automaton has 42787 states and 136979 transitions. Word has length 31 [2019-12-07 18:56:49,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:49,017 INFO L462 AbstractCegarLoop]: Abstraction has 42787 states and 136979 transitions. [2019-12-07 18:56:49,017 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:56:49,017 INFO L276 IsEmpty]: Start isEmpty. Operand 42787 states and 136979 transitions. [2019-12-07 18:56:49,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:56:49,043 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:49,043 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:49,043 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:49,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:49,044 INFO L82 PathProgramCache]: Analyzing trace with hash 1046244468, now seen corresponding path program 1 times [2019-12-07 18:56:49,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:49,044 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056741470] [2019-12-07 18:56:49,044 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:49,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:49,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:49,092 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056741470] [2019-12-07 18:56:49,092 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:49,092 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:56:49,092 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [993507672] [2019-12-07 18:56:49,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:56:49,092 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:49,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:56:49,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:56:49,093 INFO L87 Difference]: Start difference. First operand 42787 states and 136979 transitions. Second operand 5 states. [2019-12-07 18:56:49,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:49,148 INFO L93 Difference]: Finished difference Result 9436 states and 25717 transitions. [2019-12-07 18:56:49,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:56:49,148 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2019-12-07 18:56:49,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:49,158 INFO L225 Difference]: With dead ends: 9436 [2019-12-07 18:56:49,159 INFO L226 Difference]: Without dead ends: 8329 [2019-12-07 18:56:49,159 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:56:49,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8329 states. [2019-12-07 18:56:49,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8329 to 8189. [2019-12-07 18:56:49,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8189 states. [2019-12-07 18:56:49,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8189 states to 8189 states and 22081 transitions. [2019-12-07 18:56:49,265 INFO L78 Accepts]: Start accepts. Automaton has 8189 states and 22081 transitions. Word has length 39 [2019-12-07 18:56:49,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:49,265 INFO L462 AbstractCegarLoop]: Abstraction has 8189 states and 22081 transitions. [2019-12-07 18:56:49,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:56:49,265 INFO L276 IsEmpty]: Start isEmpty. Operand 8189 states and 22081 transitions. [2019-12-07 18:56:49,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 18:56:49,274 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:49,274 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:49,274 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:49,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:49,274 INFO L82 PathProgramCache]: Analyzing trace with hash -1542499933, now seen corresponding path program 1 times [2019-12-07 18:56:49,274 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:49,274 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764484271] [2019-12-07 18:56:49,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:49,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:49,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:49,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1764484271] [2019-12-07 18:56:49,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:49,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:56:49,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665025094] [2019-12-07 18:56:49,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:56:49,336 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:49,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:56:49,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:56:49,337 INFO L87 Difference]: Start difference. First operand 8189 states and 22081 transitions. Second operand 6 states. [2019-12-07 18:56:49,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:49,389 INFO L93 Difference]: Finished difference Result 5813 states and 16624 transitions. [2019-12-07 18:56:49,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:56:49,390 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-12-07 18:56:49,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:49,394 INFO L225 Difference]: With dead ends: 5813 [2019-12-07 18:56:49,394 INFO L226 Difference]: Without dead ends: 5730 [2019-12-07 18:56:49,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:49,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5730 states. [2019-12-07 18:56:49,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5730 to 5317. [2019-12-07 18:56:49,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5317 states. [2019-12-07 18:56:49,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5317 states to 5317 states and 15342 transitions. [2019-12-07 18:56:49,462 INFO L78 Accepts]: Start accepts. Automaton has 5317 states and 15342 transitions. Word has length 51 [2019-12-07 18:56:49,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:49,462 INFO L462 AbstractCegarLoop]: Abstraction has 5317 states and 15342 transitions. [2019-12-07 18:56:49,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:56:49,462 INFO L276 IsEmpty]: Start isEmpty. Operand 5317 states and 15342 transitions. [2019-12-07 18:56:49,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:56:49,468 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:49,468 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:49,468 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:49,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:49,468 INFO L82 PathProgramCache]: Analyzing trace with hash -254245097, now seen corresponding path program 1 times [2019-12-07 18:56:49,468 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:49,468 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144658543] [2019-12-07 18:56:49,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:49,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:49,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:49,502 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144658543] [2019-12-07 18:56:49,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:49,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:56:49,503 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166306264] [2019-12-07 18:56:49,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:49,503 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:49,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:49,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:49,503 INFO L87 Difference]: Start difference. First operand 5317 states and 15342 transitions. Second operand 3 states. [2019-12-07 18:56:49,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:49,536 INFO L93 Difference]: Finished difference Result 5328 states and 15357 transitions. [2019-12-07 18:56:49,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:49,536 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:56:49,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:49,541 INFO L225 Difference]: With dead ends: 5328 [2019-12-07 18:56:49,541 INFO L226 Difference]: Without dead ends: 5328 [2019-12-07 18:56:49,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:49,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5328 states. [2019-12-07 18:56:49,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5328 to 5324. [2019-12-07 18:56:49,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5324 states. [2019-12-07 18:56:49,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5324 states to 5324 states and 15353 transitions. [2019-12-07 18:56:49,607 INFO L78 Accepts]: Start accepts. Automaton has 5324 states and 15353 transitions. Word has length 65 [2019-12-07 18:56:49,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:49,607 INFO L462 AbstractCegarLoop]: Abstraction has 5324 states and 15353 transitions. [2019-12-07 18:56:49,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:49,607 INFO L276 IsEmpty]: Start isEmpty. Operand 5324 states and 15353 transitions. [2019-12-07 18:56:49,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:56:49,611 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:49,611 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:49,611 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:49,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:49,612 INFO L82 PathProgramCache]: Analyzing trace with hash -137933894, now seen corresponding path program 1 times [2019-12-07 18:56:49,612 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:49,612 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [940642488] [2019-12-07 18:56:49,612 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:49,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:49,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:49,659 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [940642488] [2019-12-07 18:56:49,659 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:49,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:49,660 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1997624433] [2019-12-07 18:56:49,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:49,660 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:49,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:49,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:49,660 INFO L87 Difference]: Start difference. First operand 5324 states and 15353 transitions. Second operand 3 states. [2019-12-07 18:56:49,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:49,678 INFO L93 Difference]: Finished difference Result 5038 states and 14320 transitions. [2019-12-07 18:56:49,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:49,678 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:56:49,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:49,682 INFO L225 Difference]: With dead ends: 5038 [2019-12-07 18:56:49,682 INFO L226 Difference]: Without dead ends: 5038 [2019-12-07 18:56:49,683 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:49,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5038 states. [2019-12-07 18:56:49,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5038 to 5038. [2019-12-07 18:56:49,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5038 states. [2019-12-07 18:56:49,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5038 states to 5038 states and 14320 transitions. [2019-12-07 18:56:49,747 INFO L78 Accepts]: Start accepts. Automaton has 5038 states and 14320 transitions. Word has length 65 [2019-12-07 18:56:49,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:49,747 INFO L462 AbstractCegarLoop]: Abstraction has 5038 states and 14320 transitions. [2019-12-07 18:56:49,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:49,747 INFO L276 IsEmpty]: Start isEmpty. Operand 5038 states and 14320 transitions. [2019-12-07 18:56:49,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:56:49,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:49,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:49,752 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:49,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:49,752 INFO L82 PathProgramCache]: Analyzing trace with hash -1502280655, now seen corresponding path program 1 times [2019-12-07 18:56:49,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:49,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708814060] [2019-12-07 18:56:49,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:49,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:49,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:49,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708814060] [2019-12-07 18:56:49,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:49,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:49,804 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [756923626] [2019-12-07 18:56:49,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:49,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:49,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:49,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:49,804 INFO L87 Difference]: Start difference. First operand 5038 states and 14320 transitions. Second operand 3 states. [2019-12-07 18:56:49,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:49,820 INFO L93 Difference]: Finished difference Result 4739 states and 13248 transitions. [2019-12-07 18:56:49,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:49,821 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:56:49,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:49,824 INFO L225 Difference]: With dead ends: 4739 [2019-12-07 18:56:49,824 INFO L226 Difference]: Without dead ends: 4739 [2019-12-07 18:56:49,825 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:49,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4739 states. [2019-12-07 18:56:49,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4739 to 4739. [2019-12-07 18:56:49,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4739 states. [2019-12-07 18:56:49,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4739 states to 4739 states and 13248 transitions. [2019-12-07 18:56:49,882 INFO L78 Accepts]: Start accepts. Automaton has 4739 states and 13248 transitions. Word has length 66 [2019-12-07 18:56:49,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:49,882 INFO L462 AbstractCegarLoop]: Abstraction has 4739 states and 13248 transitions. [2019-12-07 18:56:49,883 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:49,883 INFO L276 IsEmpty]: Start isEmpty. Operand 4739 states and 13248 transitions. [2019-12-07 18:56:49,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:56:49,886 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:49,886 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:49,886 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:49,886 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:49,886 INFO L82 PathProgramCache]: Analyzing trace with hash -166415791, now seen corresponding path program 1 times [2019-12-07 18:56:49,886 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:49,887 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172332903] [2019-12-07 18:56:49,887 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:49,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:49,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:49,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1172332903] [2019-12-07 18:56:49,942 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:49,942 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:56:49,942 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1298275534] [2019-12-07 18:56:49,942 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:56:49,942 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:49,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:56:49,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:49,943 INFO L87 Difference]: Start difference. First operand 4739 states and 13248 transitions. Second operand 3 states. [2019-12-07 18:56:49,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:49,980 INFO L93 Difference]: Finished difference Result 4739 states and 13247 transitions. [2019-12-07 18:56:49,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:56:49,980 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 18:56:49,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:49,985 INFO L225 Difference]: With dead ends: 4739 [2019-12-07 18:56:49,985 INFO L226 Difference]: Without dead ends: 4739 [2019-12-07 18:56:49,985 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:56:50,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4739 states. [2019-12-07 18:56:50,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4739 to 4739. [2019-12-07 18:56:50,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4739 states. [2019-12-07 18:56:50,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4739 states to 4739 states and 13247 transitions. [2019-12-07 18:56:50,048 INFO L78 Accepts]: Start accepts. Automaton has 4739 states and 13247 transitions. Word has length 67 [2019-12-07 18:56:50,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:50,048 INFO L462 AbstractCegarLoop]: Abstraction has 4739 states and 13247 transitions. [2019-12-07 18:56:50,048 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:56:50,049 INFO L276 IsEmpty]: Start isEmpty. Operand 4739 states and 13247 transitions. [2019-12-07 18:56:50,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:50,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:50,052 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:50,052 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:50,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:50,052 INFO L82 PathProgramCache]: Analyzing trace with hash 339723314, now seen corresponding path program 1 times [2019-12-07 18:56:50,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:50,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577916691] [2019-12-07 18:56:50,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:50,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:50,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:50,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577916691] [2019-12-07 18:56:50,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:50,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:56:50,122 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672988807] [2019-12-07 18:56:50,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:56:50,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:50,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:56:50,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:56:50,122 INFO L87 Difference]: Start difference. First operand 4739 states and 13247 transitions. Second operand 6 states. [2019-12-07 18:56:50,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:50,175 INFO L93 Difference]: Finished difference Result 7588 states and 21130 transitions. [2019-12-07 18:56:50,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:56:50,176 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-12-07 18:56:50,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:50,179 INFO L225 Difference]: With dead ends: 7588 [2019-12-07 18:56:50,179 INFO L226 Difference]: Without dead ends: 3736 [2019-12-07 18:56:50,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:50,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3736 states. [2019-12-07 18:56:50,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3736 to 3736. [2019-12-07 18:56:50,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3736 states. [2019-12-07 18:56:50,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3736 states to 3736 states and 10374 transitions. [2019-12-07 18:56:50,227 INFO L78 Accepts]: Start accepts. Automaton has 3736 states and 10374 transitions. Word has length 68 [2019-12-07 18:56:50,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:50,227 INFO L462 AbstractCegarLoop]: Abstraction has 3736 states and 10374 transitions. [2019-12-07 18:56:50,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:56:50,227 INFO L276 IsEmpty]: Start isEmpty. Operand 3736 states and 10374 transitions. [2019-12-07 18:56:50,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:50,230 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:50,230 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:50,230 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:50,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:50,230 INFO L82 PathProgramCache]: Analyzing trace with hash -1526398644, now seen corresponding path program 2 times [2019-12-07 18:56:50,230 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:50,230 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [804687483] [2019-12-07 18:56:50,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:50,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:50,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:50,295 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [804687483] [2019-12-07 18:56:50,295 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:50,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:56:50,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555652806] [2019-12-07 18:56:50,296 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:56:50,296 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:50,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:56:50,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:56:50,296 INFO L87 Difference]: Start difference. First operand 3736 states and 10374 transitions. Second operand 6 states. [2019-12-07 18:56:50,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:50,348 INFO L93 Difference]: Finished difference Result 5509 states and 15330 transitions. [2019-12-07 18:56:50,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:56:50,348 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-12-07 18:56:50,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:50,351 INFO L225 Difference]: With dead ends: 5509 [2019-12-07 18:56:50,351 INFO L226 Difference]: Without dead ends: 1964 [2019-12-07 18:56:50,351 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:56:50,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1964 states. [2019-12-07 18:56:50,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1964 to 1964. [2019-12-07 18:56:50,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1964 states. [2019-12-07 18:56:50,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1964 states to 1964 states and 5463 transitions. [2019-12-07 18:56:50,393 INFO L78 Accepts]: Start accepts. Automaton has 1964 states and 5463 transitions. Word has length 68 [2019-12-07 18:56:50,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:50,394 INFO L462 AbstractCegarLoop]: Abstraction has 1964 states and 5463 transitions. [2019-12-07 18:56:50,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:56:50,394 INFO L276 IsEmpty]: Start isEmpty. Operand 1964 states and 5463 transitions. [2019-12-07 18:56:50,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:50,396 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:50,396 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:50,396 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:50,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:50,397 INFO L82 PathProgramCache]: Analyzing trace with hash 1148584830, now seen corresponding path program 3 times [2019-12-07 18:56:50,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:50,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502369475] [2019-12-07 18:56:50,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:50,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:50,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:50,753 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1502369475] [2019-12-07 18:56:50,753 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:50,753 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 18:56:50,753 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1825430051] [2019-12-07 18:56:50,753 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 18:56:50,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:50,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 18:56:50,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=283, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:56:50,754 INFO L87 Difference]: Start difference. First operand 1964 states and 5463 transitions. Second operand 19 states. [2019-12-07 18:56:52,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:52,394 INFO L93 Difference]: Finished difference Result 6076 states and 17000 transitions. [2019-12-07 18:56:52,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 18:56:52,395 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 68 [2019-12-07 18:56:52,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:52,399 INFO L225 Difference]: With dead ends: 6076 [2019-12-07 18:56:52,399 INFO L226 Difference]: Without dead ends: 6044 [2019-12-07 18:56:52,400 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 684 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=550, Invalid=2420, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 18:56:52,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6044 states. [2019-12-07 18:56:52,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6044 to 3124. [2019-12-07 18:56:52,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3124 states. [2019-12-07 18:56:52,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3124 states to 3124 states and 8689 transitions. [2019-12-07 18:56:52,453 INFO L78 Accepts]: Start accepts. Automaton has 3124 states and 8689 transitions. Word has length 68 [2019-12-07 18:56:52,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:52,453 INFO L462 AbstractCegarLoop]: Abstraction has 3124 states and 8689 transitions. [2019-12-07 18:56:52,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 18:56:52,453 INFO L276 IsEmpty]: Start isEmpty. Operand 3124 states and 8689 transitions. [2019-12-07 18:56:52,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:52,455 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:52,455 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:52,455 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:52,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:52,455 INFO L82 PathProgramCache]: Analyzing trace with hash 334493844, now seen corresponding path program 4 times [2019-12-07 18:56:52,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:52,456 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606342941] [2019-12-07 18:56:52,456 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:52,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:52,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:52,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1606342941] [2019-12-07 18:56:52,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:52,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:56:52,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1606034671] [2019-12-07 18:56:52,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:56:52,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:52,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:56:52,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:56:52,736 INFO L87 Difference]: Start difference. First operand 3124 states and 8689 transitions. Second operand 15 states. [2019-12-07 18:56:53,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:53,276 INFO L93 Difference]: Finished difference Result 7658 states and 21121 transitions. [2019-12-07 18:56:53,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 18:56:53,276 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 68 [2019-12-07 18:56:53,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:53,282 INFO L225 Difference]: With dead ends: 7658 [2019-12-07 18:56:53,282 INFO L226 Difference]: Without dead ends: 7626 [2019-12-07 18:56:53,282 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=148, Invalid=664, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:56:53,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7626 states. [2019-12-07 18:56:53,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7626 to 3158. [2019-12-07 18:56:53,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3158 states. [2019-12-07 18:56:53,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3158 states to 3158 states and 8766 transitions. [2019-12-07 18:56:53,341 INFO L78 Accepts]: Start accepts. Automaton has 3158 states and 8766 transitions. Word has length 68 [2019-12-07 18:56:53,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:53,341 INFO L462 AbstractCegarLoop]: Abstraction has 3158 states and 8766 transitions. [2019-12-07 18:56:53,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:56:53,341 INFO L276 IsEmpty]: Start isEmpty. Operand 3158 states and 8766 transitions. [2019-12-07 18:56:53,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:53,343 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:53,343 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:53,343 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:53,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:53,344 INFO L82 PathProgramCache]: Analyzing trace with hash 1353264956, now seen corresponding path program 5 times [2019-12-07 18:56:53,344 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:53,344 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406374209] [2019-12-07 18:56:53,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:53,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:53,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:53,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1406374209] [2019-12-07 18:56:53,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:53,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:56:53,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106307236] [2019-12-07 18:56:53,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 18:56:53,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:53,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 18:56:53,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:56:53,528 INFO L87 Difference]: Start difference. First operand 3158 states and 8766 transitions. Second operand 14 states. [2019-12-07 18:56:53,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:53,931 INFO L93 Difference]: Finished difference Result 5364 states and 14725 transitions. [2019-12-07 18:56:53,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:56:53,932 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 68 [2019-12-07 18:56:53,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:53,936 INFO L225 Difference]: With dead ends: 5364 [2019-12-07 18:56:53,936 INFO L226 Difference]: Without dead ends: 5332 [2019-12-07 18:56:53,936 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:56:53,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5332 states. [2019-12-07 18:56:53,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5332 to 3290. [2019-12-07 18:56:53,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3290 states. [2019-12-07 18:56:53,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3290 states to 3290 states and 9144 transitions. [2019-12-07 18:56:53,987 INFO L78 Accepts]: Start accepts. Automaton has 3290 states and 9144 transitions. Word has length 68 [2019-12-07 18:56:53,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:53,988 INFO L462 AbstractCegarLoop]: Abstraction has 3290 states and 9144 transitions. [2019-12-07 18:56:53,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 18:56:53,988 INFO L276 IsEmpty]: Start isEmpty. Operand 3290 states and 9144 transitions. [2019-12-07 18:56:53,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:53,990 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:53,990 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:53,990 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:53,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:53,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1013261128, now seen corresponding path program 6 times [2019-12-07 18:56:53,991 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:53,991 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960289528] [2019-12-07 18:56:53,991 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:54,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:54,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:54,267 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1960289528] [2019-12-07 18:56:54,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:54,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 18:56:54,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602764896] [2019-12-07 18:56:54,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 18:56:54,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:54,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 18:56:54,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:56:54,268 INFO L87 Difference]: Start difference. First operand 3290 states and 9144 transitions. Second operand 17 states. [2019-12-07 18:56:54,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:54,979 INFO L93 Difference]: Finished difference Result 6495 states and 17872 transitions. [2019-12-07 18:56:54,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:56:54,980 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 68 [2019-12-07 18:56:54,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:54,984 INFO L225 Difference]: With dead ends: 6495 [2019-12-07 18:56:54,984 INFO L226 Difference]: Without dead ends: 6463 [2019-12-07 18:56:54,985 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=238, Invalid=1168, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 18:56:55,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6463 states. [2019-12-07 18:56:55,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6463 to 3290. [2019-12-07 18:56:55,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3290 states. [2019-12-07 18:56:55,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3290 states to 3290 states and 9144 transitions. [2019-12-07 18:56:55,038 INFO L78 Accepts]: Start accepts. Automaton has 3290 states and 9144 transitions. Word has length 68 [2019-12-07 18:56:55,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:55,038 INFO L462 AbstractCegarLoop]: Abstraction has 3290 states and 9144 transitions. [2019-12-07 18:56:55,038 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 18:56:55,039 INFO L276 IsEmpty]: Start isEmpty. Operand 3290 states and 9144 transitions. [2019-12-07 18:56:55,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:55,041 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:55,041 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:55,041 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:55,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:55,041 INFO L82 PathProgramCache]: Analyzing trace with hash 1686228904, now seen corresponding path program 7 times [2019-12-07 18:56:55,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:55,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146687328] [2019-12-07 18:56:55,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:55,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:55,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:55,263 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146687328] [2019-12-07 18:56:55,263 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:55,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:56:55,264 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [675775418] [2019-12-07 18:56:55,264 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:56:55,264 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:55,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:56:55,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:56:55,264 INFO L87 Difference]: Start difference. First operand 3290 states and 9144 transitions. Second operand 16 states. [2019-12-07 18:56:55,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:55,830 INFO L93 Difference]: Finished difference Result 5772 states and 15878 transitions. [2019-12-07 18:56:55,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:56:55,830 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 68 [2019-12-07 18:56:55,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:55,835 INFO L225 Difference]: With dead ends: 5772 [2019-12-07 18:56:55,835 INFO L226 Difference]: Without dead ends: 5740 [2019-12-07 18:56:55,835 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 151 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=164, Invalid=766, Unknown=0, NotChecked=0, Total=930 [2019-12-07 18:56:55,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5740 states. [2019-12-07 18:56:55,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5740 to 3228. [2019-12-07 18:56:55,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3228 states. [2019-12-07 18:56:55,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3228 states to 3228 states and 8947 transitions. [2019-12-07 18:56:55,887 INFO L78 Accepts]: Start accepts. Automaton has 3228 states and 8947 transitions. Word has length 68 [2019-12-07 18:56:55,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:55,887 INFO L462 AbstractCegarLoop]: Abstraction has 3228 states and 8947 transitions. [2019-12-07 18:56:55,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:56:55,887 INFO L276 IsEmpty]: Start isEmpty. Operand 3228 states and 8947 transitions. [2019-12-07 18:56:55,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:55,889 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:55,889 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:55,889 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:55,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:55,889 INFO L82 PathProgramCache]: Analyzing trace with hash -1461259038, now seen corresponding path program 8 times [2019-12-07 18:56:55,889 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:55,889 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [473652628] [2019-12-07 18:56:55,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:55,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:56,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:56,196 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [473652628] [2019-12-07 18:56:56,196 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:56,196 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 18:56:56,196 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1960084524] [2019-12-07 18:56:56,196 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 18:56:56,196 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:56,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 18:56:56,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:56:56,197 INFO L87 Difference]: Start difference. First operand 3228 states and 8947 transitions. Second operand 18 states. [2019-12-07 18:56:58,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:56:58,972 INFO L93 Difference]: Finished difference Result 7383 states and 20257 transitions. [2019-12-07 18:56:58,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 18:56:58,973 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 68 [2019-12-07 18:56:58,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:56:58,984 INFO L225 Difference]: With dead ends: 7383 [2019-12-07 18:56:58,984 INFO L226 Difference]: Without dead ends: 7351 [2019-12-07 18:56:58,986 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 585 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=457, Invalid=2093, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 18:56:59,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7351 states. [2019-12-07 18:56:59,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7351 to 3380. [2019-12-07 18:56:59,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3380 states. [2019-12-07 18:56:59,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3380 states to 3380 states and 9372 transitions. [2019-12-07 18:56:59,089 INFO L78 Accepts]: Start accepts. Automaton has 3380 states and 9372 transitions. Word has length 68 [2019-12-07 18:56:59,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:56:59,090 INFO L462 AbstractCegarLoop]: Abstraction has 3380 states and 9372 transitions. [2019-12-07 18:56:59,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 18:56:59,090 INFO L276 IsEmpty]: Start isEmpty. Operand 3380 states and 9372 transitions. [2019-12-07 18:56:59,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:56:59,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:56:59,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:56:59,092 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:56:59,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:56:59,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1526168476, now seen corresponding path program 9 times [2019-12-07 18:56:59,092 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:56:59,092 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574778946] [2019-12-07 18:56:59,092 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:56:59,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:56:59,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:56:59,459 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574778946] [2019-12-07 18:56:59,459 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:56:59,459 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 18:56:59,459 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1031810030] [2019-12-07 18:56:59,460 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 18:56:59,460 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:56:59,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 18:56:59,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=318, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:56:59,460 INFO L87 Difference]: Start difference. First operand 3380 states and 9372 transitions. Second operand 20 states. [2019-12-07 18:57:01,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:01,669 INFO L93 Difference]: Finished difference Result 6985 states and 19197 transitions. [2019-12-07 18:57:01,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 18:57:01,669 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 68 [2019-12-07 18:57:01,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:01,675 INFO L225 Difference]: With dead ends: 6985 [2019-12-07 18:57:01,676 INFO L226 Difference]: Without dead ends: 6953 [2019-12-07 18:57:01,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 724 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=547, Invalid=2533, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 18:57:01,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6953 states. [2019-12-07 18:57:01,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6953 to 3340. [2019-12-07 18:57:01,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3340 states. [2019-12-07 18:57:01,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3340 states to 3340 states and 9255 transitions. [2019-12-07 18:57:01,736 INFO L78 Accepts]: Start accepts. Automaton has 3340 states and 9255 transitions. Word has length 68 [2019-12-07 18:57:01,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:01,736 INFO L462 AbstractCegarLoop]: Abstraction has 3340 states and 9255 transitions. [2019-12-07 18:57:01,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 18:57:01,736 INFO L276 IsEmpty]: Start isEmpty. Operand 3340 states and 9255 transitions. [2019-12-07 18:57:01,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:57:01,739 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:01,739 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:01,739 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:01,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:01,739 INFO L82 PathProgramCache]: Analyzing trace with hash -1465527438, now seen corresponding path program 10 times [2019-12-07 18:57:01,739 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:01,739 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446563503] [2019-12-07 18:57:01,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:01,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:01,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:01,944 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446563503] [2019-12-07 18:57:01,944 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:01,944 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:57:01,944 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [220635535] [2019-12-07 18:57:01,945 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:57:01,945 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:01,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:57:01,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:57:01,945 INFO L87 Difference]: Start difference. First operand 3340 states and 9255 transitions. Second operand 15 states. [2019-12-07 18:57:02,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:02,547 INFO L93 Difference]: Finished difference Result 7637 states and 21046 transitions. [2019-12-07 18:57:02,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:57:02,547 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 68 [2019-12-07 18:57:02,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:02,553 INFO L225 Difference]: With dead ends: 7637 [2019-12-07 18:57:02,553 INFO L226 Difference]: Without dead ends: 7605 [2019-12-07 18:57:02,553 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 142 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=159, Invalid=711, Unknown=0, NotChecked=0, Total=870 [2019-12-07 18:57:02,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7605 states. [2019-12-07 18:57:02,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7605 to 3348. [2019-12-07 18:57:02,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3348 states. [2019-12-07 18:57:02,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3348 states to 3348 states and 9260 transitions. [2019-12-07 18:57:02,612 INFO L78 Accepts]: Start accepts. Automaton has 3348 states and 9260 transitions. Word has length 68 [2019-12-07 18:57:02,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:02,612 INFO L462 AbstractCegarLoop]: Abstraction has 3348 states and 9260 transitions. [2019-12-07 18:57:02,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:57:02,612 INFO L276 IsEmpty]: Start isEmpty. Operand 3348 states and 9260 transitions. [2019-12-07 18:57:02,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:57:02,614 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:02,614 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:02,614 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:02,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:02,614 INFO L82 PathProgramCache]: Analyzing trace with hash 283642216, now seen corresponding path program 11 times [2019-12-07 18:57:02,614 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:02,614 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698669391] [2019-12-07 18:57:02,614 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:02,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:02,835 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:02,835 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698669391] [2019-12-07 18:57:02,835 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:02,835 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:57:02,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015337005] [2019-12-07 18:57:02,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:57:02,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:02,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:57:02,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:57:02,836 INFO L87 Difference]: Start difference. First operand 3348 states and 9260 transitions. Second operand 16 states. [2019-12-07 18:57:03,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:03,662 INFO L93 Difference]: Finished difference Result 7117 states and 19569 transitions. [2019-12-07 18:57:03,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 18:57:03,662 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 68 [2019-12-07 18:57:03,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:03,668 INFO L225 Difference]: With dead ends: 7117 [2019-12-07 18:57:03,668 INFO L226 Difference]: Without dead ends: 7085 [2019-12-07 18:57:03,668 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 302 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=239, Invalid=1243, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 18:57:03,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7085 states. [2019-12-07 18:57:03,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7085 to 3356. [2019-12-07 18:57:03,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3356 states. [2019-12-07 18:57:03,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3356 states to 3356 states and 9282 transitions. [2019-12-07 18:57:03,724 INFO L78 Accepts]: Start accepts. Automaton has 3356 states and 9282 transitions. Word has length 68 [2019-12-07 18:57:03,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:03,725 INFO L462 AbstractCegarLoop]: Abstraction has 3356 states and 9282 transitions. [2019-12-07 18:57:03,725 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:57:03,725 INFO L276 IsEmpty]: Start isEmpty. Operand 3356 states and 9282 transitions. [2019-12-07 18:57:03,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:57:03,726 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:03,727 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:03,727 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:03,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:03,727 INFO L82 PathProgramCache]: Analyzing trace with hash -606090792, now seen corresponding path program 12 times [2019-12-07 18:57:03,727 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:03,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [936367600] [2019-12-07 18:57:03,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:03,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:57:03,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:57:03,934 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [936367600] [2019-12-07 18:57:03,934 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:57:03,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:57:03,934 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813626405] [2019-12-07 18:57:03,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:57:03,934 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:57:03,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:57:03,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:57:03,935 INFO L87 Difference]: Start difference. First operand 3356 states and 9282 transitions. Second operand 16 states. [2019-12-07 18:57:04,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:57:04,397 INFO L93 Difference]: Finished difference Result 5434 states and 14921 transitions. [2019-12-07 18:57:04,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:57:04,398 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 68 [2019-12-07 18:57:04,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:57:04,402 INFO L225 Difference]: With dead ends: 5434 [2019-12-07 18:57:04,402 INFO L226 Difference]: Without dead ends: 5402 [2019-12-07 18:57:04,402 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=198, Invalid=794, Unknown=0, NotChecked=0, Total=992 [2019-12-07 18:57:04,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5402 states. [2019-12-07 18:57:04,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5402 to 3200. [2019-12-07 18:57:04,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3200 states. [2019-12-07 18:57:04,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3200 states to 3200 states and 8803 transitions. [2019-12-07 18:57:04,449 INFO L78 Accepts]: Start accepts. Automaton has 3200 states and 8803 transitions. Word has length 68 [2019-12-07 18:57:04,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:57:04,449 INFO L462 AbstractCegarLoop]: Abstraction has 3200 states and 8803 transitions. [2019-12-07 18:57:04,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:57:04,449 INFO L276 IsEmpty]: Start isEmpty. Operand 3200 states and 8803 transitions. [2019-12-07 18:57:04,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:57:04,451 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:57:04,451 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:57:04,451 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:57:04,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:57:04,452 INFO L82 PathProgramCache]: Analyzing trace with hash -1194296684, now seen corresponding path program 13 times [2019-12-07 18:57:04,452 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:57:04,452 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989309448] [2019-12-07 18:57:04,452 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:57:04,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:57:04,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:57:04,526 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:57:04,526 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:57:04,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_59| 0 0))) (and (= 0 v_~x$w_buff0~0_188) (= 0 v_~x$r_buff1_thd2~0_143) (= v_~y~0_87 0) (= v_~a~0_16 0) (= 0 v_~x$w_buff1~0_199) (= v_~x$r_buff0_thd0~0_333 0) (= 0 v_~__unbuffered_cnt~0_56) (= 0 v_~x~0_237) (= v_~__unbuffered_p1_EBX~0_93 0) (= v_~main$tmp_guard1~0_21 0) (< 0 |v_#StackHeapBarrier_16|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t299~0.base_23| 4) |v_#length_23|) (= 0 v_~weak$$choice0~0_32) (= 0 |v_ULTIMATE.start_main_~#t299~0.offset_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= |v_#valid_57| (store .cse0 |v_ULTIMATE.start_main_~#t299~0.base_23| 1)) (= v_~x$flush_delayed~0_92 0) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t299~0.base_23|) (= v_~x$r_buff1_thd0~0_241 0) (= 0 v_~x$read_delayed~0_6) (= v_~z~0_87 0) (= v_~__unbuffered_p2_EBX~0_18 0) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p1_EAX~0_94) (= 0 v_~x$w_buff0_used~0_640) (= 0 v_~x$w_buff1_used~0_439) (= 0 v_~weak$$choice2~0_98) (= (select .cse0 |v_ULTIMATE.start_main_~#t299~0.base_23|) 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t299~0.base_23| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t299~0.base_23|) |v_ULTIMATE.start_main_~#t299~0.offset_17| 0)) |v_#memory_int_19|) (= v_~x$r_buff1_thd1~0_134 0) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~x$r_buff0_thd1~0_158 0) (= v_~x$mem_tmp~0_37 0) (= 0 v_~x$r_buff0_thd2~0_236) (= 0 v_~__unbuffered_p2_EAX~0_18) (= 0 v_~x$r_buff1_thd3~0_174) (= 0 v_~x$r_buff0_thd3~0_152) (= v_~main$tmp_guard0~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_59|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_56|, ~x$w_buff0~0=v_~x$w_buff0~0_188, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_38|, ~x$flush_delayed~0=v_~x$flush_delayed~0_92, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_22|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_41|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_24|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_40|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_134, ULTIMATE.start_main_~#t301~0.base=|v_ULTIMATE.start_main_~#t301~0.base_18|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_152, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_69|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_61|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_36|, ~a~0=v_~a~0_16, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_111|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_94, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_18, ULTIMATE.start_main_~#t301~0.offset=|v_ULTIMATE.start_main_~#t301~0.offset_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_333, ULTIMATE.start_main_~#t300~0.offset=|v_ULTIMATE.start_main_~#t300~0.offset_18|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_18, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_42|, ~x$w_buff1~0=v_~x$w_buff1~0_199, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_38|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_439, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_143, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_45|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_30|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_32, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, ~x~0=v_~x~0_237, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_158, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_56|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_66|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_25|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_174, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_138|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~x$mem_tmp~0=v_~x$mem_tmp~0_37, ULTIMATE.start_main_~#t299~0.base=|v_ULTIMATE.start_main_~#t299~0.base_23|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_20|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_71|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_30|, ~y~0=v_~y~0_87, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ULTIMATE.start_main_~#t300~0.base=|v_ULTIMATE.start_main_~#t300~0.base_24|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_93, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_25|, ULTIMATE.start_main_~#t299~0.offset=|v_ULTIMATE.start_main_~#t299~0.offset_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_46|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_56|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_37, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_241, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_236, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_24|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_640, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_27|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_87, ~weak$$choice2~0=v_~weak$$choice2~0_98, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ULTIMATE.start_main_~#t301~0.base, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t301~0.offset, ~x$r_buff0_thd0~0, ULTIMATE.start_main_~#t300~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_~#t299~0.base, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t300~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t299~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:57:04,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L822-1-->L824: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t300~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t300~0.base_13| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t300~0.base_13| 4)) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t300~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t300~0.offset_11|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t300~0.base_13|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t300~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t300~0.base_13|) |v_ULTIMATE.start_main_~#t300~0.offset_11| 1)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t300~0.offset=|v_ULTIMATE.start_main_~#t300~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_5|, ULTIMATE.start_main_~#t300~0.base=|v_ULTIMATE.start_main_~#t300~0.base_13|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t300~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t300~0.base, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:57:04,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L824-1-->L826: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t301~0.base_10|) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t301~0.base_10| 1) |v_#valid_29|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t301~0.base_10|)) (= |v_ULTIMATE.start_main_~#t301~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t301~0.base_10|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t301~0.base_10| 4)) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t301~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t301~0.base_10|) |v_ULTIMATE.start_main_~#t301~0.offset_9| 2)) |v_#memory_int_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t301~0.base=|v_ULTIMATE.start_main_~#t301~0.base_10|, ULTIMATE.start_main_~#t301~0.offset=|v_ULTIMATE.start_main_~#t301~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t301~0.base, ULTIMATE.start_main_~#t301~0.offset] because there is no mapped edge [2019-12-07 18:57:04,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L4-->L776: Formula: (and (= ~x$r_buff0_thd1~0_In-357559008 ~x$r_buff1_thd1~0_Out-357559008) (= ~z~0_In-357559008 ~__unbuffered_p1_EBX~0_Out-357559008) (= ~x$r_buff0_thd2~0_In-357559008 ~x$r_buff1_thd2~0_Out-357559008) (not (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-357559008 0)) (= ~y~0_Out-357559008 1) (= ~x$r_buff1_thd0~0_Out-357559008 ~x$r_buff0_thd0~0_In-357559008) (= ~x$r_buff1_thd3~0_Out-357559008 ~x$r_buff0_thd3~0_In-357559008) (= ~x$r_buff0_thd2~0_Out-357559008 1) (= ~__unbuffered_p1_EAX~0_Out-357559008 ~y~0_Out-357559008)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-357559008, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-357559008, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-357559008, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-357559008, ~z~0=~z~0_In-357559008, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-357559008} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-357559008, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-357559008, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out-357559008, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_Out-357559008, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out-357559008, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out-357559008, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-357559008, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-357559008, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out-357559008, P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-357559008, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out-357559008, ~z~0=~z~0_In-357559008, ~y~0=~y~0_Out-357559008} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0, ~y~0] because there is no mapped edge [2019-12-07 18:57:04,531 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L799-2-->L799-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-958624221 256))) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-958624221 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-958624221| ~x~0_In-958624221)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-958624221| ~x$w_buff1~0_In-958624221) (not .cse0) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-958624221, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-958624221, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-958624221, ~x~0=~x~0_In-958624221} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-958624221|, ~x$w_buff1~0=~x$w_buff1~0_In-958624221, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-958624221, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-958624221, ~x~0=~x~0_In-958624221} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:57:04,531 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L799-4-->L800: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~x~0_49) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_7|, ~x~0=v_~x~0_49} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 18:57:04,531 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In1115480367 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1115480367 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1115480367 |P2Thread1of1ForFork2_#t~ite17_Out1115480367|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1115480367|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1115480367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1115480367} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1115480367, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1115480367|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1115480367} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:57:04,531 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-490459346 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-490459346 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-490459346 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd3~0_In-490459346 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite18_Out-490459346| ~x$w_buff1_used~0_In-490459346) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out-490459346| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-490459346, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-490459346, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-490459346, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490459346} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-490459346, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-490459346, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-490459346, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-490459346|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490459346} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 18:57:04,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L802-->L802-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1156123313 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-1156123313 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite19_Out-1156123313| 0) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd3~0_In-1156123313 |P2Thread1of1ForFork2_#t~ite19_Out-1156123313|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1156123313, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1156123313} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1156123313, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1156123313|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1156123313} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 18:57:04,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L741-2-->L741-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In1583539076 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1583539076 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite3_Out1583539076| ~x$w_buff1~0_In1583539076) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x~0_In1583539076 |P0Thread1of1ForFork0_#t~ite3_Out1583539076|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1583539076, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1583539076, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1583539076, ~x~0=~x~0_In1583539076} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1583539076|, ~x$w_buff1~0=~x$w_buff1~0_In1583539076, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1583539076, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1583539076, ~x~0=~x~0_In1583539076} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 18:57:04,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L741-4-->L742: Formula: (= v_~x~0_29 |v_P0Thread1of1ForFork0_#t~ite3_10|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_10|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_9|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_5|, ~x~0=v_~x~0_29} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 18:57:04,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L742-->L742-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In504356548 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In504356548 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out504356548|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In504356548 |P0Thread1of1ForFork0_#t~ite5_Out504356548|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In504356548, ~x$w_buff0_used~0=~x$w_buff0_used~0_In504356548} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out504356548|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In504356548, ~x$w_buff0_used~0=~x$w_buff0_used~0_In504356548} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:57:04,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L743-->L743-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In178690615 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In178690615 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In178690615 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In178690615 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out178690615|)) (and (= ~x$w_buff1_used~0_In178690615 |P0Thread1of1ForFork0_#t~ite6_Out178690615|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In178690615, ~x$w_buff1_used~0=~x$w_buff1_used~0_In178690615, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In178690615, ~x$w_buff0_used~0=~x$w_buff0_used~0_In178690615} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out178690615|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In178690615, ~x$w_buff1_used~0=~x$w_buff1_used~0_In178690615, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In178690615, ~x$w_buff0_used~0=~x$w_buff0_used~0_In178690615} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:57:04,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L744-->L744-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1055093669 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1055093669 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out1055093669| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out1055093669| ~x$r_buff0_thd1~0_In1055093669) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1055093669, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1055093669} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1055093669, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1055093669|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1055093669} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 18:57:04,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L745-->L745-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-680633405 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-680633405 256))) (.cse2 (= (mod ~x$r_buff1_thd1~0_In-680633405 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-680633405 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-680633405| ~x$r_buff1_thd1~0_In-680633405) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-680633405| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-680633405, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-680633405, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-680633405, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680633405} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-680633405, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-680633405|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-680633405, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-680633405, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680633405} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:57:04,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1540650697 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1540650697 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1540650697 256))) (.cse3 (= (mod ~x$r_buff1_thd3~0_In-1540650697 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite20_Out-1540650697| ~x$r_buff1_thd3~0_In-1540650697)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite20_Out-1540650697| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1540650697, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1540650697, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1540650697, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1540650697} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1540650697|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1540650697, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1540650697, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1540650697, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1540650697} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 18:57:04,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L803-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_26 (+ v_~__unbuffered_cnt~0_27 1)) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~x$r_buff1_thd3~0_77 |v_P2Thread1of1ForFork2_#t~ite20_20|)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_19|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_77, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:57:04,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L777-->L777-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1490869190 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-1490869190 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1490869190| ~x$w_buff0_used~0_In-1490869190)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1490869190|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1490869190, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1490869190} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1490869190|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1490869190, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1490869190} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:57:04,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1561380396 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1561380396 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1561380396 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1561380396 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1561380396|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In1561380396 |P1Thread1of1ForFork1_#t~ite12_Out1561380396|) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1561380396, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1561380396, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1561380396, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1561380396} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1561380396, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1561380396, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1561380396|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1561380396, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1561380396} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:57:04,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L779-->L780: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_Out-1346113155 ~x$r_buff0_thd2~0_In-1346113155)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1346113155 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1346113155 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (= ~x$r_buff0_thd2~0_Out-1346113155 0) (not .cse2) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1346113155, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1346113155} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1346113155|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1346113155, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1346113155} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:57:04,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L780-->L780-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In-94957641 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-94957641 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-94957641 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-94957641 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out-94957641| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite14_Out-94957641| ~x$r_buff1_thd2~0_In-94957641)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-94957641, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-94957641, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-94957641, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-94957641} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-94957641, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-94957641, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-94957641, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-94957641|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-94957641} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:57:04,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L780-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_90 |v_P1Thread1of1ForFork1_#t~ite14_22|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_90, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_21|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:57:04,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L745-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd1~0_74 |v_P0Thread1of1ForFork0_#t~ite8_18|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_17|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_74} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 18:57:04,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L830-->L832-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= 0 (mod v_~x$r_buff0_thd0~0_44 256)) (= 0 (mod v_~x$w_buff0_used~0_78 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_78} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_78} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:57:04,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L832-2-->L832-5: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In198926683 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In198926683 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite25_Out198926683| |ULTIMATE.start_main_#t~ite24_Out198926683|))) (or (and (= ~x~0_In198926683 |ULTIMATE.start_main_#t~ite24_Out198926683|) .cse0 (or .cse1 .cse2)) (and (not .cse2) (not .cse1) (= |ULTIMATE.start_main_#t~ite24_Out198926683| ~x$w_buff1~0_In198926683) .cse0))) InVars {~x$w_buff1~0=~x$w_buff1~0_In198926683, ~x$w_buff1_used~0=~x$w_buff1_used~0_In198926683, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In198926683, ~x~0=~x~0_In198926683} OutVars{~x$w_buff1~0=~x$w_buff1~0_In198926683, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out198926683|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out198926683|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In198926683, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In198926683, ~x~0=~x~0_In198926683} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 18:57:04,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In891655024 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In891655024 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite26_Out891655024| ~x$w_buff0_used~0_In891655024)) (and (= 0 |ULTIMATE.start_main_#t~ite26_Out891655024|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In891655024, ~x$w_buff0_used~0=~x$w_buff0_used~0_In891655024} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In891655024, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out891655024|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In891655024} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 18:57:04,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L834-->L834-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-729267847 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-729267847 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In-729267847 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-729267847 256)))) (or (and (= ~x$w_buff1_used~0_In-729267847 |ULTIMATE.start_main_#t~ite27_Out-729267847|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-729267847|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-729267847, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-729267847, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-729267847, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-729267847} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-729267847, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-729267847, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-729267847|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-729267847, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-729267847} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 18:57:04,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L835-->L835-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1339714063 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1339714063 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-1339714063 |ULTIMATE.start_main_#t~ite28_Out-1339714063|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite28_Out-1339714063|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1339714063, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1339714063} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1339714063, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1339714063|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1339714063} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 18:57:04,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L836-->L836-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In486033693 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In486033693 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In486033693 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In486033693 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite29_Out486033693|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~x$r_buff1_thd0~0_In486033693 |ULTIMATE.start_main_#t~ite29_Out486033693|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In486033693, ~x$w_buff1_used~0=~x$w_buff1_used~0_In486033693, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In486033693, ~x$w_buff0_used~0=~x$w_buff0_used~0_In486033693} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In486033693, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out486033693|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In486033693, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In486033693, ~x$w_buff0_used~0=~x$w_buff0_used~0_In486033693} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 18:57:04,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L844-->L844-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1037114962 256)))) (or (and (= |ULTIMATE.start_main_#t~ite35_Out1037114962| ~x$w_buff0~0_In1037114962) (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In1037114962 256) 0))) (or (= (mod ~x$w_buff0_used~0_In1037114962 256) 0) (and (= (mod ~x$r_buff1_thd0~0_In1037114962 256) 0) .cse0) (and (= 0 (mod ~x$w_buff1_used~0_In1037114962 256)) .cse0))) .cse1 (= |ULTIMATE.start_main_#t~ite36_Out1037114962| |ULTIMATE.start_main_#t~ite35_Out1037114962|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite36_Out1037114962| ~x$w_buff0~0_In1037114962) (= |ULTIMATE.start_main_#t~ite35_In1037114962| |ULTIMATE.start_main_#t~ite35_Out1037114962|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In1037114962, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1037114962, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In1037114962|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1037114962, ~weak$$choice2~0=~weak$$choice2~0_In1037114962, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1037114962, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1037114962} OutVars{~x$w_buff0~0=~x$w_buff0~0_In1037114962, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1037114962, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out1037114962|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out1037114962|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1037114962, ~weak$$choice2~0=~weak$$choice2~0_In1037114962, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1037114962, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1037114962} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 18:57:04,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L845-->L845-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In494283743 256)))) (or (and (= |ULTIMATE.start_main_#t~ite38_In494283743| |ULTIMATE.start_main_#t~ite38_Out494283743|) (not .cse0) (= ~x$w_buff1~0_In494283743 |ULTIMATE.start_main_#t~ite39_Out494283743|)) (and (= |ULTIMATE.start_main_#t~ite38_Out494283743| ~x$w_buff1~0_In494283743) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In494283743 256) 0))) (or (and .cse1 (= (mod ~x$r_buff1_thd0~0_In494283743 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In494283743 256)) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In494283743 256))))) (= |ULTIMATE.start_main_#t~ite38_Out494283743| |ULTIMATE.start_main_#t~ite39_Out494283743|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In494283743, ~x$w_buff1~0=~x$w_buff1~0_In494283743, ~x$w_buff1_used~0=~x$w_buff1_used~0_In494283743, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In494283743|, ~weak$$choice2~0=~weak$$choice2~0_In494283743, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In494283743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In494283743} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In494283743, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out494283743|, ~x$w_buff1~0=~x$w_buff1~0_In494283743, ~x$w_buff1_used~0=~x$w_buff1_used~0_In494283743, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out494283743|, ~weak$$choice2~0=~weak$$choice2~0_In494283743, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In494283743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In494283743} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 18:57:04,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L848-->L849: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~x$r_buff0_thd0~0_142 v_~x$r_buff0_thd0~0_141)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_142, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_141, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_21|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_9|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:57:04,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L851-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= (mod v_~x$flush_delayed~0_49 256) 0)) (= v_~x$flush_delayed~0_48 0) (= v_~x$mem_tmp~0_10 v_~x~0_112)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_49, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ~x$flush_delayed~0=v_~x$flush_delayed~0_48, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_112, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:57:04,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:57:04,596 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:57:04 BasicIcfg [2019-12-07 18:57:04,596 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:57:04,596 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:57:04,596 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:57:04,596 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:57:04,597 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:55:22" (3/4) ... [2019-12-07 18:57:04,598 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:57:04,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_59| 0 0))) (and (= 0 v_~x$w_buff0~0_188) (= 0 v_~x$r_buff1_thd2~0_143) (= v_~y~0_87 0) (= v_~a~0_16 0) (= 0 v_~x$w_buff1~0_199) (= v_~x$r_buff0_thd0~0_333 0) (= 0 v_~__unbuffered_cnt~0_56) (= 0 v_~x~0_237) (= v_~__unbuffered_p1_EBX~0_93 0) (= v_~main$tmp_guard1~0_21 0) (< 0 |v_#StackHeapBarrier_16|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t299~0.base_23| 4) |v_#length_23|) (= 0 v_~weak$$choice0~0_32) (= 0 |v_ULTIMATE.start_main_~#t299~0.offset_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= |v_#valid_57| (store .cse0 |v_ULTIMATE.start_main_~#t299~0.base_23| 1)) (= v_~x$flush_delayed~0_92 0) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t299~0.base_23|) (= v_~x$r_buff1_thd0~0_241 0) (= 0 v_~x$read_delayed~0_6) (= v_~z~0_87 0) (= v_~__unbuffered_p2_EBX~0_18 0) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p1_EAX~0_94) (= 0 v_~x$w_buff0_used~0_640) (= 0 v_~x$w_buff1_used~0_439) (= 0 v_~weak$$choice2~0_98) (= (select .cse0 |v_ULTIMATE.start_main_~#t299~0.base_23|) 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t299~0.base_23| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t299~0.base_23|) |v_ULTIMATE.start_main_~#t299~0.offset_17| 0)) |v_#memory_int_19|) (= v_~x$r_buff1_thd1~0_134 0) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~x$r_buff0_thd1~0_158 0) (= v_~x$mem_tmp~0_37 0) (= 0 v_~x$r_buff0_thd2~0_236) (= 0 v_~__unbuffered_p2_EAX~0_18) (= 0 v_~x$r_buff1_thd3~0_174) (= 0 v_~x$r_buff0_thd3~0_152) (= v_~main$tmp_guard0~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_59|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_56|, ~x$w_buff0~0=v_~x$w_buff0~0_188, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_38|, ~x$flush_delayed~0=v_~x$flush_delayed~0_92, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_22|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_41|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_24|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_40|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_134, ULTIMATE.start_main_~#t301~0.base=|v_ULTIMATE.start_main_~#t301~0.base_18|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_152, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_69|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_61|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_36|, ~a~0=v_~a~0_16, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_111|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_94, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_18, ULTIMATE.start_main_~#t301~0.offset=|v_ULTIMATE.start_main_~#t301~0.offset_15|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_333, ULTIMATE.start_main_~#t300~0.offset=|v_ULTIMATE.start_main_~#t300~0.offset_18|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_18, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_42|, ~x$w_buff1~0=v_~x$w_buff1~0_199, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_38|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_439, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_143, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_45|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_30|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_32, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, ~x~0=v_~x~0_237, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_158, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_56|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_66|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_25|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_174, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_138|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~x$mem_tmp~0=v_~x$mem_tmp~0_37, ULTIMATE.start_main_~#t299~0.base=|v_ULTIMATE.start_main_~#t299~0.base_23|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_20|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_71|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_30|, ~y~0=v_~y~0_87, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ULTIMATE.start_main_~#t300~0.base=|v_ULTIMATE.start_main_~#t300~0.base_24|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_93, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_25|, ULTIMATE.start_main_~#t299~0.offset=|v_ULTIMATE.start_main_~#t299~0.offset_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_46|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_56|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_37, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_241, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_236, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_24|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_640, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_27|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_87, ~weak$$choice2~0=v_~weak$$choice2~0_98, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ULTIMATE.start_main_~#t301~0.base, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t301~0.offset, ~x$r_buff0_thd0~0, ULTIMATE.start_main_~#t300~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_~#t299~0.base, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t300~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t299~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:57:04,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L822-1-->L824: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t300~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t300~0.base_13| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t300~0.base_13| 4)) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t300~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t300~0.offset_11|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t300~0.base_13|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t300~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t300~0.base_13|) |v_ULTIMATE.start_main_~#t300~0.offset_11| 1)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t300~0.offset=|v_ULTIMATE.start_main_~#t300~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_5|, ULTIMATE.start_main_~#t300~0.base=|v_ULTIMATE.start_main_~#t300~0.base_13|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t300~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t300~0.base, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:57:04,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L824-1-->L826: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t301~0.base_10|) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t301~0.base_10| 1) |v_#valid_29|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t301~0.base_10|)) (= |v_ULTIMATE.start_main_~#t301~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t301~0.base_10|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t301~0.base_10| 4)) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t301~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t301~0.base_10|) |v_ULTIMATE.start_main_~#t301~0.offset_9| 2)) |v_#memory_int_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t301~0.base=|v_ULTIMATE.start_main_~#t301~0.base_10|, ULTIMATE.start_main_~#t301~0.offset=|v_ULTIMATE.start_main_~#t301~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t301~0.base, ULTIMATE.start_main_~#t301~0.offset] because there is no mapped edge [2019-12-07 18:57:04,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L4-->L776: Formula: (and (= ~x$r_buff0_thd1~0_In-357559008 ~x$r_buff1_thd1~0_Out-357559008) (= ~z~0_In-357559008 ~__unbuffered_p1_EBX~0_Out-357559008) (= ~x$r_buff0_thd2~0_In-357559008 ~x$r_buff1_thd2~0_Out-357559008) (not (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-357559008 0)) (= ~y~0_Out-357559008 1) (= ~x$r_buff1_thd0~0_Out-357559008 ~x$r_buff0_thd0~0_In-357559008) (= ~x$r_buff1_thd3~0_Out-357559008 ~x$r_buff0_thd3~0_In-357559008) (= ~x$r_buff0_thd2~0_Out-357559008 1) (= ~__unbuffered_p1_EAX~0_Out-357559008 ~y~0_Out-357559008)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-357559008, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-357559008, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-357559008, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-357559008, ~z~0=~z~0_In-357559008, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-357559008} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-357559008, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-357559008, ~__unbuffered_p1_EBX~0=~__unbuffered_p1_EBX~0_Out-357559008, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_Out-357559008, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out-357559008, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out-357559008, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-357559008, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-357559008, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out-357559008, P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In-357559008, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_Out-357559008, ~z~0=~z~0_In-357559008, ~y~0=~y~0_Out-357559008} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~__unbuffered_p1_EAX~0, ~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0, ~y~0] because there is no mapped edge [2019-12-07 18:57:04,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L799-2-->L799-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-958624221 256))) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-958624221 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-958624221| ~x~0_In-958624221)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-958624221| ~x$w_buff1~0_In-958624221) (not .cse0) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-958624221, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-958624221, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-958624221, ~x~0=~x~0_In-958624221} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-958624221|, ~x$w_buff1~0=~x$w_buff1~0_In-958624221, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-958624221, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-958624221, ~x~0=~x~0_In-958624221} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:57:04,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L799-4-->L800: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~x~0_49) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_7|, ~x~0=v_~x~0_49} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 18:57:04,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In1115480367 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1115480367 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1115480367 |P2Thread1of1ForFork2_#t~ite17_Out1115480367|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1115480367|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1115480367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1115480367} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1115480367, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1115480367|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1115480367} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:57:04,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-490459346 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-490459346 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-490459346 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd3~0_In-490459346 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite18_Out-490459346| ~x$w_buff1_used~0_In-490459346) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out-490459346| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-490459346, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-490459346, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-490459346, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490459346} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-490459346, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-490459346, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-490459346, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-490459346|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490459346} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 18:57:04,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L802-->L802-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1156123313 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-1156123313 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite19_Out-1156123313| 0) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd3~0_In-1156123313 |P2Thread1of1ForFork2_#t~ite19_Out-1156123313|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1156123313, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1156123313} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1156123313, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1156123313|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1156123313} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 18:57:04,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L741-2-->L741-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In1583539076 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1583539076 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite3_Out1583539076| ~x$w_buff1~0_In1583539076) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x~0_In1583539076 |P0Thread1of1ForFork0_#t~ite3_Out1583539076|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1583539076, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1583539076, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1583539076, ~x~0=~x~0_In1583539076} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1583539076|, ~x$w_buff1~0=~x$w_buff1~0_In1583539076, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1583539076, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1583539076, ~x~0=~x~0_In1583539076} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 18:57:04,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L741-4-->L742: Formula: (= v_~x~0_29 |v_P0Thread1of1ForFork0_#t~ite3_10|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_10|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_9|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_5|, ~x~0=v_~x~0_29} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 18:57:04,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L742-->L742-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In504356548 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In504356548 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out504356548|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In504356548 |P0Thread1of1ForFork0_#t~ite5_Out504356548|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In504356548, ~x$w_buff0_used~0=~x$w_buff0_used~0_In504356548} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out504356548|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In504356548, ~x$w_buff0_used~0=~x$w_buff0_used~0_In504356548} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:57:04,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L743-->L743-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In178690615 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In178690615 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In178690615 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In178690615 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out178690615|)) (and (= ~x$w_buff1_used~0_In178690615 |P0Thread1of1ForFork0_#t~ite6_Out178690615|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In178690615, ~x$w_buff1_used~0=~x$w_buff1_used~0_In178690615, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In178690615, ~x$w_buff0_used~0=~x$w_buff0_used~0_In178690615} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out178690615|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In178690615, ~x$w_buff1_used~0=~x$w_buff1_used~0_In178690615, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In178690615, ~x$w_buff0_used~0=~x$w_buff0_used~0_In178690615} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:57:04,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L744-->L744-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1055093669 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1055093669 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out1055093669| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out1055093669| ~x$r_buff0_thd1~0_In1055093669) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1055093669, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1055093669} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1055093669, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1055093669|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1055093669} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 18:57:04,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L745-->L745-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-680633405 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-680633405 256))) (.cse2 (= (mod ~x$r_buff1_thd1~0_In-680633405 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-680633405 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-680633405| ~x$r_buff1_thd1~0_In-680633405) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-680633405| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-680633405, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-680633405, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-680633405, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680633405} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-680633405, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-680633405|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-680633405, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-680633405, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680633405} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:57:04,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1540650697 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1540650697 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1540650697 256))) (.cse3 (= (mod ~x$r_buff1_thd3~0_In-1540650697 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite20_Out-1540650697| ~x$r_buff1_thd3~0_In-1540650697)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite20_Out-1540650697| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1540650697, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1540650697, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1540650697, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1540650697} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1540650697|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1540650697, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1540650697, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1540650697, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1540650697} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 18:57:04,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L803-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_26 (+ v_~__unbuffered_cnt~0_27 1)) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~x$r_buff1_thd3~0_77 |v_P2Thread1of1ForFork2_#t~ite20_20|)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_19|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_77, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:57:04,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L777-->L777-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1490869190 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-1490869190 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1490869190| ~x$w_buff0_used~0_In-1490869190)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1490869190|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1490869190, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1490869190} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1490869190|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1490869190, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1490869190} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:57:04,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1561380396 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1561380396 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1561380396 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1561380396 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1561380396|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In1561380396 |P1Thread1of1ForFork1_#t~ite12_Out1561380396|) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1561380396, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1561380396, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1561380396, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1561380396} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1561380396, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1561380396, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1561380396|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1561380396, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1561380396} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:57:04,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L779-->L780: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_Out-1346113155 ~x$r_buff0_thd2~0_In-1346113155)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1346113155 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1346113155 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (= ~x$r_buff0_thd2~0_Out-1346113155 0) (not .cse2) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1346113155, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1346113155} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1346113155|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1346113155, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1346113155} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:57:04,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L780-->L780-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In-94957641 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-94957641 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-94957641 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-94957641 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out-94957641| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite14_Out-94957641| ~x$r_buff1_thd2~0_In-94957641)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-94957641, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-94957641, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-94957641, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-94957641} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-94957641, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-94957641, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-94957641, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-94957641|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-94957641} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:57:04,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L780-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_90 |v_P1Thread1of1ForFork1_#t~ite14_22|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_22|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_90, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_21|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:57:04,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L745-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd1~0_74 |v_P0Thread1of1ForFork0_#t~ite8_18|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_17|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_74} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 18:57:04,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L830-->L832-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= 0 (mod v_~x$r_buff0_thd0~0_44 256)) (= 0 (mod v_~x$w_buff0_used~0_78 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_78} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_78} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:57:04,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L832-2-->L832-5: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In198926683 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In198926683 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite25_Out198926683| |ULTIMATE.start_main_#t~ite24_Out198926683|))) (or (and (= ~x~0_In198926683 |ULTIMATE.start_main_#t~ite24_Out198926683|) .cse0 (or .cse1 .cse2)) (and (not .cse2) (not .cse1) (= |ULTIMATE.start_main_#t~ite24_Out198926683| ~x$w_buff1~0_In198926683) .cse0))) InVars {~x$w_buff1~0=~x$w_buff1~0_In198926683, ~x$w_buff1_used~0=~x$w_buff1_used~0_In198926683, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In198926683, ~x~0=~x~0_In198926683} OutVars{~x$w_buff1~0=~x$w_buff1~0_In198926683, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out198926683|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out198926683|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In198926683, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In198926683, ~x~0=~x~0_In198926683} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 18:57:04,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In891655024 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In891655024 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite26_Out891655024| ~x$w_buff0_used~0_In891655024)) (and (= 0 |ULTIMATE.start_main_#t~ite26_Out891655024|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In891655024, ~x$w_buff0_used~0=~x$w_buff0_used~0_In891655024} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In891655024, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out891655024|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In891655024} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 18:57:04,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L834-->L834-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-729267847 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-729267847 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In-729267847 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-729267847 256)))) (or (and (= ~x$w_buff1_used~0_In-729267847 |ULTIMATE.start_main_#t~ite27_Out-729267847|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-729267847|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-729267847, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-729267847, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-729267847, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-729267847} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-729267847, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-729267847, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-729267847|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-729267847, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-729267847} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 18:57:04,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L835-->L835-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1339714063 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1339714063 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-1339714063 |ULTIMATE.start_main_#t~ite28_Out-1339714063|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite28_Out-1339714063|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1339714063, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1339714063} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1339714063, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1339714063|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1339714063} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 18:57:04,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L836-->L836-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In486033693 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In486033693 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In486033693 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In486033693 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite29_Out486033693|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~x$r_buff1_thd0~0_In486033693 |ULTIMATE.start_main_#t~ite29_Out486033693|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In486033693, ~x$w_buff1_used~0=~x$w_buff1_used~0_In486033693, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In486033693, ~x$w_buff0_used~0=~x$w_buff0_used~0_In486033693} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In486033693, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out486033693|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In486033693, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In486033693, ~x$w_buff0_used~0=~x$w_buff0_used~0_In486033693} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 18:57:04,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L844-->L844-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1037114962 256)))) (or (and (= |ULTIMATE.start_main_#t~ite35_Out1037114962| ~x$w_buff0~0_In1037114962) (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In1037114962 256) 0))) (or (= (mod ~x$w_buff0_used~0_In1037114962 256) 0) (and (= (mod ~x$r_buff1_thd0~0_In1037114962 256) 0) .cse0) (and (= 0 (mod ~x$w_buff1_used~0_In1037114962 256)) .cse0))) .cse1 (= |ULTIMATE.start_main_#t~ite36_Out1037114962| |ULTIMATE.start_main_#t~ite35_Out1037114962|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite36_Out1037114962| ~x$w_buff0~0_In1037114962) (= |ULTIMATE.start_main_#t~ite35_In1037114962| |ULTIMATE.start_main_#t~ite35_Out1037114962|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In1037114962, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1037114962, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In1037114962|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1037114962, ~weak$$choice2~0=~weak$$choice2~0_In1037114962, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1037114962, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1037114962} OutVars{~x$w_buff0~0=~x$w_buff0~0_In1037114962, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1037114962, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out1037114962|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out1037114962|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1037114962, ~weak$$choice2~0=~weak$$choice2~0_In1037114962, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1037114962, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1037114962} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 18:57:04,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L845-->L845-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In494283743 256)))) (or (and (= |ULTIMATE.start_main_#t~ite38_In494283743| |ULTIMATE.start_main_#t~ite38_Out494283743|) (not .cse0) (= ~x$w_buff1~0_In494283743 |ULTIMATE.start_main_#t~ite39_Out494283743|)) (and (= |ULTIMATE.start_main_#t~ite38_Out494283743| ~x$w_buff1~0_In494283743) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In494283743 256) 0))) (or (and .cse1 (= (mod ~x$r_buff1_thd0~0_In494283743 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In494283743 256)) (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In494283743 256))))) (= |ULTIMATE.start_main_#t~ite38_Out494283743| |ULTIMATE.start_main_#t~ite39_Out494283743|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In494283743, ~x$w_buff1~0=~x$w_buff1~0_In494283743, ~x$w_buff1_used~0=~x$w_buff1_used~0_In494283743, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In494283743|, ~weak$$choice2~0=~weak$$choice2~0_In494283743, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In494283743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In494283743} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In494283743, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out494283743|, ~x$w_buff1~0=~x$w_buff1~0_In494283743, ~x$w_buff1_used~0=~x$w_buff1_used~0_In494283743, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out494283743|, ~weak$$choice2~0=~weak$$choice2~0_In494283743, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In494283743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In494283743} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 18:57:04,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L848-->L849: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~x$r_buff0_thd0~0_142 v_~x$r_buff0_thd0~0_141)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_142, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_141, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_21|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_9|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:57:04,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L851-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= (mod v_~x$flush_delayed~0_49 256) 0)) (= v_~x$flush_delayed~0_48 0) (= v_~x$mem_tmp~0_10 v_~x~0_112)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_49, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ~x$flush_delayed~0=v_~x$flush_delayed~0_48, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_112, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:57:04,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:57:04,661 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_8c1e2e20-efeb-44ce-a034-b0b21de479a4/bin/uautomizer/witness.graphml [2019-12-07 18:57:04,661 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:57:04,662 INFO L168 Benchmark]: Toolchain (without parser) took 102927.35 ms. Allocated memory was 1.0 GB in the beginning and 6.8 GB in the end (delta: 5.8 GB). Free memory was 939.8 MB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. [2019-12-07 18:57:04,662 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:57:04,662 INFO L168 Benchmark]: CACSL2BoogieTranslator took 391.53 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -126.4 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:57:04,663 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:57:04,663 INFO L168 Benchmark]: Boogie Preprocessor took 25.76 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:57:04,663 INFO L168 Benchmark]: RCFGBuilder took 403.09 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.9 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:57:04,663 INFO L168 Benchmark]: TraceAbstraction took 102000.72 ms. Allocated memory was 1.1 GB in the beginning and 6.8 GB in the end (delta: 5.7 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. [2019-12-07 18:57:04,663 INFO L168 Benchmark]: Witness Printer took 64.72 ms. Allocated memory is still 6.8 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 31.7 MB). Peak memory consumption was 31.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:57:04,665 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 391.53 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -126.4 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.76 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 403.09 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.9 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 102000.72 ms. Allocated memory was 1.1 GB in the beginning and 6.8 GB in the end (delta: 5.7 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. * Witness Printer took 64.72 ms. Allocated memory is still 6.8 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 31.7 MB). Peak memory consumption was 31.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 178 ProgramPointsBefore, 95 ProgramPointsAfterwards, 215 TransitionsBefore, 104 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 32 ChoiceCompositions, 6122 VarBasedMoverChecksPositive, 218 VarBasedMoverChecksNegative, 28 SemBasedMoverChecksPositive, 265 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 79597 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t299, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L824] FCALL, FORK 0 pthread_create(&t300, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L826] FCALL, FORK 0 pthread_create(&t301, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L755] 2 x$w_buff1 = x$w_buff0 [L756] 2 x$w_buff0 = 2 [L757] 2 x$w_buff1_used = x$w_buff0_used [L758] 2 x$w_buff0_used = (_Bool)1 [L776] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L776] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L790] 3 z = 1 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L799] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] 1 a = 1 [L738] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=2, y=1, z=1] [L800] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L801] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L802] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L741] 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L742] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L743] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L744] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L777] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L778] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L828] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L832] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L833] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L834] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L835] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L836] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L839] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L840] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L841] 0 x$flush_delayed = weak$$choice2 [L842] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, x$flush_delayed=7, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L843] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, x$flush_delayed=7, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L843] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L844] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L845] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L846] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, x$flush_delayed=7, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L846] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L847] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, x$flush_delayed=7, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L847] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L849] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, x$flush_delayed=7, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L849] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L850] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, x$flush_delayed=7, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 101.8s, OverallIterations: 28, TraceHistogramMax: 1, AutomataDifference: 23.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4512 SDtfs, 7603 SDslu, 18288 SDs, 0 SdLazy, 12650 SolverSat, 636 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 482 GetRequests, 27 SyntacticMatches, 17 SemanticMatches, 438 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3245 ImplicationChecksByTransitivity, 5.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=224697occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 55.4s AutomataMinimizationTime, 27 MinimizatonAttempts, 255585 StatesRemovedByMinimization, 20 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.0s InterpolantComputationTime, 1392 NumberOfCodeBlocks, 1392 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1297 ConstructedInterpolants, 0 QuantifiedInterpolants, 560341 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 27 InterpolantComputations, 27 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...