./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix015_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix015_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2eeff5b0a14a1f8cbc0f99d66cf35ba97bf7f2a7 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:41:10,379 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:41:10,381 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:41:10,388 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:41:10,388 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:41:10,389 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:41:10,390 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:41:10,391 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:41:10,393 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:41:10,393 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:41:10,394 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:41:10,395 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:41:10,395 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:41:10,396 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:41:10,396 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:41:10,397 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:41:10,398 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:41:10,398 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:41:10,399 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:41:10,401 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:41:10,402 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:41:10,403 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:41:10,403 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:41:10,404 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:41:10,406 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:41:10,406 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:41:10,406 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:41:10,407 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:41:10,407 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:41:10,407 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:41:10,408 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:41:10,408 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:41:10,409 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:41:10,409 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:41:10,410 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:41:10,410 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:41:10,410 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:41:10,410 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:41:10,410 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:41:10,411 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:41:10,411 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:41:10,412 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:41:10,421 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:41:10,421 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:41:10,422 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:41:10,422 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:41:10,422 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:41:10,422 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:41:10,422 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:41:10,422 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:41:10,423 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:41:10,424 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:41:10,424 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:41:10,424 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:41:10,424 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:41:10,424 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:41:10,424 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:41:10,424 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:41:10,424 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:41:10,425 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:41:10,425 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:41:10,425 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:41:10,425 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:41:10,425 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2eeff5b0a14a1f8cbc0f99d66cf35ba97bf7f2a7 [2019-12-07 18:41:10,527 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:41:10,535 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:41:10,537 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:41:10,538 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:41:10,539 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:41:10,539 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix015_power.oepc.i [2019-12-07 18:41:10,578 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/data/8af4c930d/def879ae331d4b3ea018e6a95bd2f1d0/FLAGf00041893 [2019-12-07 18:41:11,071 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:41:11,071 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/sv-benchmarks/c/pthread-wmm/mix015_power.oepc.i [2019-12-07 18:41:11,082 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/data/8af4c930d/def879ae331d4b3ea018e6a95bd2f1d0/FLAGf00041893 [2019-12-07 18:41:11,092 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/data/8af4c930d/def879ae331d4b3ea018e6a95bd2f1d0 [2019-12-07 18:41:11,094 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:41:11,095 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:41:11,095 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:41:11,095 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:41:11,098 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:41:11,098 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,100 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11, skipping insertion in model container [2019-12-07 18:41:11,100 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,107 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:41:11,147 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:41:11,400 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:41:11,408 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:41:11,452 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:41:11,498 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:41:11,498 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11 WrapperNode [2019-12-07 18:41:11,498 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:41:11,499 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:41:11,499 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:41:11,499 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:41:11,505 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,519 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,538 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:41:11,539 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:41:11,539 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:41:11,539 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:41:11,545 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,545 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,549 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,549 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,556 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,559 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,562 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... [2019-12-07 18:41:11,565 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:41:11,565 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:41:11,565 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:41:11,565 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:41:11,566 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:41:11,608 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:41:11,608 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:41:11,608 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:41:11,608 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:41:11,608 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:41:11,608 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:41:11,608 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:41:11,609 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:41:11,609 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:41:11,609 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:41:11,609 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:41:11,609 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:41:11,609 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:41:11,610 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:41:11,994 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:41:11,994 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:41:11,995 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:41:11 BoogieIcfgContainer [2019-12-07 18:41:11,995 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:41:11,996 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:41:11,996 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:41:11,997 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:41:11,998 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:41:11" (1/3) ... [2019-12-07 18:41:11,998 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8f0f478 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:41:11, skipping insertion in model container [2019-12-07 18:41:11,998 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:41:11" (2/3) ... [2019-12-07 18:41:11,998 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8f0f478 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:41:11, skipping insertion in model container [2019-12-07 18:41:11,999 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:41:11" (3/3) ... [2019-12-07 18:41:12,000 INFO L109 eAbstractionObserver]: Analyzing ICFG mix015_power.oepc.i [2019-12-07 18:41:12,006 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:41:12,006 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:41:12,011 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:41:12,011 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:41:12,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,037 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,038 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,038 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,038 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,038 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,042 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,042 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,042 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,042 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,042 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,043 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,046 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,047 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,047 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,058 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,059 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,059 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,059 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,059 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,059 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,059 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,059 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,059 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,060 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,060 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,060 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,060 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,060 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,060 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,060 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,060 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,061 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,061 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,061 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,061 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:41:12,073 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:41:12,086 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:41:12,086 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:41:12,086 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:41:12,086 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:41:12,086 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:41:12,086 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:41:12,086 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:41:12,086 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:41:12,097 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 18:41:12,099 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 18:41:12,153 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 18:41:12,153 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:41:12,164 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 685 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:41:12,180 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 18:41:12,212 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 18:41:12,212 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:41:12,218 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 685 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:41:12,233 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:41:12,234 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:41:15,091 WARN L192 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 18:41:15,353 WARN L192 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 18:41:15,382 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80759 [2019-12-07 18:41:15,382 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 18:41:15,385 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 102 transitions [2019-12-07 18:41:30,510 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118022 states. [2019-12-07 18:41:30,512 INFO L276 IsEmpty]: Start isEmpty. Operand 118022 states. [2019-12-07 18:41:30,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:41:30,515 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:30,516 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:41:30,516 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:30,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:30,520 INFO L82 PathProgramCache]: Analyzing trace with hash 922782, now seen corresponding path program 1 times [2019-12-07 18:41:30,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:30,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187369712] [2019-12-07 18:41:30,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:30,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:30,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:30,656 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187369712] [2019-12-07 18:41:30,657 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:30,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:41:30,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665529973] [2019-12-07 18:41:30,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:41:30,661 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:30,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:41:30,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:30,671 INFO L87 Difference]: Start difference. First operand 118022 states. Second operand 3 states. [2019-12-07 18:41:31,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:31,358 INFO L93 Difference]: Finished difference Result 116858 states and 495582 transitions. [2019-12-07 18:41:31,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:41:31,359 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:41:31,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:31,813 INFO L225 Difference]: With dead ends: 116858 [2019-12-07 18:41:31,813 INFO L226 Difference]: Without dead ends: 110138 [2019-12-07 18:41:31,814 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:36,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110138 states. [2019-12-07 18:41:39,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110138 to 110138. [2019-12-07 18:41:39,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110138 states. [2019-12-07 18:41:39,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110138 states to 110138 states and 466462 transitions. [2019-12-07 18:41:39,724 INFO L78 Accepts]: Start accepts. Automaton has 110138 states and 466462 transitions. Word has length 3 [2019-12-07 18:41:39,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:39,725 INFO L462 AbstractCegarLoop]: Abstraction has 110138 states and 466462 transitions. [2019-12-07 18:41:39,725 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:41:39,725 INFO L276 IsEmpty]: Start isEmpty. Operand 110138 states and 466462 transitions. [2019-12-07 18:41:39,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:41:39,727 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:39,728 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:39,728 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:39,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:39,728 INFO L82 PathProgramCache]: Analyzing trace with hash 228105342, now seen corresponding path program 1 times [2019-12-07 18:41:39,728 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:39,728 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957350936] [2019-12-07 18:41:39,728 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:39,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:39,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:39,790 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1957350936] [2019-12-07 18:41:39,790 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:39,790 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:41:39,790 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808743227] [2019-12-07 18:41:39,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:41:39,791 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:39,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:41:39,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:41:39,791 INFO L87 Difference]: Start difference. First operand 110138 states and 466462 transitions. Second operand 4 states. [2019-12-07 18:41:41,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:41,058 INFO L93 Difference]: Finished difference Result 170904 states and 695583 transitions. [2019-12-07 18:41:41,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:41:41,059 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:41:41,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:41,496 INFO L225 Difference]: With dead ends: 170904 [2019-12-07 18:41:41,496 INFO L226 Difference]: Without dead ends: 170855 [2019-12-07 18:41:41,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:41:47,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170855 states. [2019-12-07 18:41:50,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170855 to 156295. [2019-12-07 18:41:50,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156295 states. [2019-12-07 18:41:51,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156295 states to 156295 states and 644009 transitions. [2019-12-07 18:41:51,557 INFO L78 Accepts]: Start accepts. Automaton has 156295 states and 644009 transitions. Word has length 11 [2019-12-07 18:41:51,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:51,558 INFO L462 AbstractCegarLoop]: Abstraction has 156295 states and 644009 transitions. [2019-12-07 18:41:51,558 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:41:51,558 INFO L276 IsEmpty]: Start isEmpty. Operand 156295 states and 644009 transitions. [2019-12-07 18:41:51,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:41:51,562 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:51,562 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:51,563 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:51,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:51,563 INFO L82 PathProgramCache]: Analyzing trace with hash 891607686, now seen corresponding path program 1 times [2019-12-07 18:41:51,563 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:51,563 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242270812] [2019-12-07 18:41:51,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:51,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:51,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:51,616 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242270812] [2019-12-07 18:41:51,616 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:51,616 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:41:51,616 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879092305] [2019-12-07 18:41:51,616 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:41:51,616 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:51,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:41:51,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:41:51,617 INFO L87 Difference]: Start difference. First operand 156295 states and 644009 transitions. Second operand 4 states. [2019-12-07 18:41:52,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:52,751 INFO L93 Difference]: Finished difference Result 220310 states and 887732 transitions. [2019-12-07 18:41:52,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:41:52,752 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:41:52,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:53,360 INFO L225 Difference]: With dead ends: 220310 [2019-12-07 18:41:53,360 INFO L226 Difference]: Without dead ends: 220254 [2019-12-07 18:41:53,361 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:41:59,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220254 states. [2019-12-07 18:42:04,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220254 to 186375. [2019-12-07 18:42:04,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186375 states. [2019-12-07 18:42:05,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186375 states to 186375 states and 763816 transitions. [2019-12-07 18:42:05,125 INFO L78 Accepts]: Start accepts. Automaton has 186375 states and 763816 transitions. Word has length 13 [2019-12-07 18:42:05,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:05,126 INFO L462 AbstractCegarLoop]: Abstraction has 186375 states and 763816 transitions. [2019-12-07 18:42:05,126 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:05,126 INFO L276 IsEmpty]: Start isEmpty. Operand 186375 states and 763816 transitions. [2019-12-07 18:42:05,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:42:05,134 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:05,134 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:05,135 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:05,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:05,135 INFO L82 PathProgramCache]: Analyzing trace with hash -1993825600, now seen corresponding path program 1 times [2019-12-07 18:42:05,135 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:05,135 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340035666] [2019-12-07 18:42:05,135 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:05,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:05,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:05,190 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340035666] [2019-12-07 18:42:05,190 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:05,190 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:05,191 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870766742] [2019-12-07 18:42:05,191 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:05,191 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:05,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:05,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:05,192 INFO L87 Difference]: Start difference. First operand 186375 states and 763816 transitions. Second operand 4 states. [2019-12-07 18:42:06,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:06,663 INFO L93 Difference]: Finished difference Result 228896 states and 935239 transitions. [2019-12-07 18:42:06,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:42:06,664 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 18:42:06,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:07,291 INFO L225 Difference]: With dead ends: 228896 [2019-12-07 18:42:07,291 INFO L226 Difference]: Without dead ends: 228896 [2019-12-07 18:42:07,292 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:13,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228896 states. [2019-12-07 18:42:16,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228896 to 196221. [2019-12-07 18:42:16,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196221 states. [2019-12-07 18:42:17,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196221 states to 196221 states and 805432 transitions. [2019-12-07 18:42:17,281 INFO L78 Accepts]: Start accepts. Automaton has 196221 states and 805432 transitions. Word has length 16 [2019-12-07 18:42:17,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:17,282 INFO L462 AbstractCegarLoop]: Abstraction has 196221 states and 805432 transitions. [2019-12-07 18:42:17,282 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:17,282 INFO L276 IsEmpty]: Start isEmpty. Operand 196221 states and 805432 transitions. [2019-12-07 18:42:17,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:42:17,296 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:17,296 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:17,296 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:17,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:17,296 INFO L82 PathProgramCache]: Analyzing trace with hash 247907846, now seen corresponding path program 1 times [2019-12-07 18:42:17,297 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:17,297 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256315893] [2019-12-07 18:42:17,297 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:17,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:17,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:17,363 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256315893] [2019-12-07 18:42:17,364 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:17,364 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:17,364 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916607619] [2019-12-07 18:42:17,364 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:17,364 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:17,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:17,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:17,364 INFO L87 Difference]: Start difference. First operand 196221 states and 805432 transitions. Second operand 3 states. [2019-12-07 18:42:18,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:18,168 INFO L93 Difference]: Finished difference Result 184863 states and 750224 transitions. [2019-12-07 18:42:18,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:18,169 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:42:18,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:18,636 INFO L225 Difference]: With dead ends: 184863 [2019-12-07 18:42:18,636 INFO L226 Difference]: Without dead ends: 184863 [2019-12-07 18:42:18,636 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:26,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184863 states. [2019-12-07 18:42:28,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184863 to 181931. [2019-12-07 18:42:28,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181931 states. [2019-12-07 18:42:29,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181931 states to 181931 states and 739380 transitions. [2019-12-07 18:42:29,343 INFO L78 Accepts]: Start accepts. Automaton has 181931 states and 739380 transitions. Word has length 18 [2019-12-07 18:42:29,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:29,343 INFO L462 AbstractCegarLoop]: Abstraction has 181931 states and 739380 transitions. [2019-12-07 18:42:29,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:29,344 INFO L276 IsEmpty]: Start isEmpty. Operand 181931 states and 739380 transitions. [2019-12-07 18:42:29,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:42:29,353 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:29,353 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:29,353 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:29,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:29,353 INFO L82 PathProgramCache]: Analyzing trace with hash 436764514, now seen corresponding path program 1 times [2019-12-07 18:42:29,353 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:29,353 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991655374] [2019-12-07 18:42:29,353 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:29,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:29,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:29,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991655374] [2019-12-07 18:42:29,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:29,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:29,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [170531487] [2019-12-07 18:42:29,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:29,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:29,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:29,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:29,389 INFO L87 Difference]: Start difference. First operand 181931 states and 739380 transitions. Second operand 3 states. [2019-12-07 18:42:29,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:29,493 INFO L93 Difference]: Finished difference Result 34343 states and 110090 transitions. [2019-12-07 18:42:29,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:29,493 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:42:29,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:29,542 INFO L225 Difference]: With dead ends: 34343 [2019-12-07 18:42:29,542 INFO L226 Difference]: Without dead ends: 34343 [2019-12-07 18:42:29,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:29,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34343 states. [2019-12-07 18:42:30,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34343 to 34343. [2019-12-07 18:42:30,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34343 states. [2019-12-07 18:42:30,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34343 states to 34343 states and 110090 transitions. [2019-12-07 18:42:30,119 INFO L78 Accepts]: Start accepts. Automaton has 34343 states and 110090 transitions. Word has length 18 [2019-12-07 18:42:30,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:30,120 INFO L462 AbstractCegarLoop]: Abstraction has 34343 states and 110090 transitions. [2019-12-07 18:42:30,120 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:30,120 INFO L276 IsEmpty]: Start isEmpty. Operand 34343 states and 110090 transitions. [2019-12-07 18:42:30,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:42:30,124 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:30,124 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:30,125 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:30,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:30,125 INFO L82 PathProgramCache]: Analyzing trace with hash 674854723, now seen corresponding path program 1 times [2019-12-07 18:42:30,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:30,125 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015669328] [2019-12-07 18:42:30,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:30,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:30,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:30,171 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015669328] [2019-12-07 18:42:30,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:30,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:30,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070433079] [2019-12-07 18:42:30,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:30,172 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:30,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:30,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:30,172 INFO L87 Difference]: Start difference. First operand 34343 states and 110090 transitions. Second operand 5 states. [2019-12-07 18:42:30,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:30,542 INFO L93 Difference]: Finished difference Result 44978 states and 141898 transitions. [2019-12-07 18:42:30,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:42:30,542 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:42:30,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:30,602 INFO L225 Difference]: With dead ends: 44978 [2019-12-07 18:42:30,602 INFO L226 Difference]: Without dead ends: 44971 [2019-12-07 18:42:30,603 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:42:30,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44971 states. [2019-12-07 18:42:31,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44971 to 34083. [2019-12-07 18:42:31,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34083 states. [2019-12-07 18:42:31,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34083 states to 34083 states and 109118 transitions. [2019-12-07 18:42:31,263 INFO L78 Accepts]: Start accepts. Automaton has 34083 states and 109118 transitions. Word has length 22 [2019-12-07 18:42:31,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:31,264 INFO L462 AbstractCegarLoop]: Abstraction has 34083 states and 109118 transitions. [2019-12-07 18:42:31,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:31,264 INFO L276 IsEmpty]: Start isEmpty. Operand 34083 states and 109118 transitions. [2019-12-07 18:42:31,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:42:31,271 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:31,271 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:31,271 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:31,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:31,272 INFO L82 PathProgramCache]: Analyzing trace with hash 332765886, now seen corresponding path program 1 times [2019-12-07 18:42:31,272 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:31,272 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513243469] [2019-12-07 18:42:31,272 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:31,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:31,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:31,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [513243469] [2019-12-07 18:42:31,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:31,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:31,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731063991] [2019-12-07 18:42:31,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:31,321 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:31,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:31,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:31,321 INFO L87 Difference]: Start difference. First operand 34083 states and 109118 transitions. Second operand 5 states. [2019-12-07 18:42:31,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:31,969 INFO L93 Difference]: Finished difference Result 48327 states and 151757 transitions. [2019-12-07 18:42:31,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:42:31,970 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:42:31,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:32,026 INFO L225 Difference]: With dead ends: 48327 [2019-12-07 18:42:32,027 INFO L226 Difference]: Without dead ends: 48314 [2019-12-07 18:42:32,027 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:32,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48314 states. [2019-12-07 18:42:32,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48314 to 39994. [2019-12-07 18:42:32,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39994 states. [2019-12-07 18:42:32,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39994 states to 39994 states and 127549 transitions. [2019-12-07 18:42:32,726 INFO L78 Accepts]: Start accepts. Automaton has 39994 states and 127549 transitions. Word has length 25 [2019-12-07 18:42:32,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:32,726 INFO L462 AbstractCegarLoop]: Abstraction has 39994 states and 127549 transitions. [2019-12-07 18:42:32,726 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:32,726 INFO L276 IsEmpty]: Start isEmpty. Operand 39994 states and 127549 transitions. [2019-12-07 18:42:32,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:42:32,737 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:32,737 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:32,737 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:32,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:32,737 INFO L82 PathProgramCache]: Analyzing trace with hash 445555351, now seen corresponding path program 1 times [2019-12-07 18:42:32,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:32,737 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624669576] [2019-12-07 18:42:32,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:32,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:32,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:32,763 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624669576] [2019-12-07 18:42:32,763 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:32,763 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:32,763 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [888030357] [2019-12-07 18:42:32,764 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:32,764 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:32,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:32,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:32,764 INFO L87 Difference]: Start difference. First operand 39994 states and 127549 transitions. Second operand 3 states. [2019-12-07 18:42:32,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:32,953 INFO L93 Difference]: Finished difference Result 61770 states and 196231 transitions. [2019-12-07 18:42:32,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:32,953 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 18:42:32,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:33,046 INFO L225 Difference]: With dead ends: 61770 [2019-12-07 18:42:33,046 INFO L226 Difference]: Without dead ends: 61770 [2019-12-07 18:42:33,046 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:33,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61770 states. [2019-12-07 18:42:33,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61770 to 48028. [2019-12-07 18:42:33,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48028 states. [2019-12-07 18:42:33,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48028 states to 48028 states and 153444 transitions. [2019-12-07 18:42:33,925 INFO L78 Accepts]: Start accepts. Automaton has 48028 states and 153444 transitions. Word has length 27 [2019-12-07 18:42:33,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:33,925 INFO L462 AbstractCegarLoop]: Abstraction has 48028 states and 153444 transitions. [2019-12-07 18:42:33,925 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:33,925 INFO L276 IsEmpty]: Start isEmpty. Operand 48028 states and 153444 transitions. [2019-12-07 18:42:33,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:42:33,938 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:33,938 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:33,938 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:33,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:33,939 INFO L82 PathProgramCache]: Analyzing trace with hash 1217095067, now seen corresponding path program 1 times [2019-12-07 18:42:33,939 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:33,939 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087828773] [2019-12-07 18:42:33,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:33,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:33,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:33,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087828773] [2019-12-07 18:42:33,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:33,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:33,960 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [703822362] [2019-12-07 18:42:33,960 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:33,960 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:33,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:33,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:33,961 INFO L87 Difference]: Start difference. First operand 48028 states and 153444 transitions. Second operand 3 states. [2019-12-07 18:42:34,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:34,230 INFO L93 Difference]: Finished difference Result 61770 states and 193163 transitions. [2019-12-07 18:42:34,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:34,231 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 18:42:34,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:34,313 INFO L225 Difference]: With dead ends: 61770 [2019-12-07 18:42:34,313 INFO L226 Difference]: Without dead ends: 61770 [2019-12-07 18:42:34,314 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:34,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61770 states. [2019-12-07 18:42:35,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61770 to 48028. [2019-12-07 18:42:35,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48028 states. [2019-12-07 18:42:35,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48028 states to 48028 states and 150376 transitions. [2019-12-07 18:42:35,176 INFO L78 Accepts]: Start accepts. Automaton has 48028 states and 150376 transitions. Word has length 27 [2019-12-07 18:42:35,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:35,177 INFO L462 AbstractCegarLoop]: Abstraction has 48028 states and 150376 transitions. [2019-12-07 18:42:35,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:35,177 INFO L276 IsEmpty]: Start isEmpty. Operand 48028 states and 150376 transitions. [2019-12-07 18:42:35,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:42:35,190 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:35,190 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:35,190 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:35,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:35,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1361870049, now seen corresponding path program 1 times [2019-12-07 18:42:35,190 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:35,190 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412195911] [2019-12-07 18:42:35,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:35,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:35,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:35,247 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [412195911] [2019-12-07 18:42:35,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:35,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:42:35,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2030773104] [2019-12-07 18:42:35,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:42:35,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:35,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:42:35,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:35,248 INFO L87 Difference]: Start difference. First operand 48028 states and 150376 transitions. Second operand 6 states. [2019-12-07 18:42:35,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:35,760 INFO L93 Difference]: Finished difference Result 89495 states and 279640 transitions. [2019-12-07 18:42:35,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:42:35,760 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:42:35,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:35,886 INFO L225 Difference]: With dead ends: 89495 [2019-12-07 18:42:35,886 INFO L226 Difference]: Without dead ends: 89476 [2019-12-07 18:42:35,886 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:42:36,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89476 states. [2019-12-07 18:42:36,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89476 to 50180. [2019-12-07 18:42:36,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50180 states. [2019-12-07 18:42:37,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50180 states to 50180 states and 156998 transitions. [2019-12-07 18:42:37,089 INFO L78 Accepts]: Start accepts. Automaton has 50180 states and 156998 transitions. Word has length 27 [2019-12-07 18:42:37,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:37,090 INFO L462 AbstractCegarLoop]: Abstraction has 50180 states and 156998 transitions. [2019-12-07 18:42:37,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:42:37,090 INFO L276 IsEmpty]: Start isEmpty. Operand 50180 states and 156998 transitions. [2019-12-07 18:42:37,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:42:37,106 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:37,106 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:37,107 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:37,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:37,107 INFO L82 PathProgramCache]: Analyzing trace with hash -2015671980, now seen corresponding path program 1 times [2019-12-07 18:42:37,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:37,107 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2078873757] [2019-12-07 18:42:37,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:37,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:37,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:37,160 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2078873757] [2019-12-07 18:42:37,160 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:37,160 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:42:37,160 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [126683228] [2019-12-07 18:42:37,161 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:42:37,161 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:37,161 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:42:37,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:37,161 INFO L87 Difference]: Start difference. First operand 50180 states and 156998 transitions. Second operand 6 states. [2019-12-07 18:42:37,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:37,724 INFO L93 Difference]: Finished difference Result 83334 states and 258731 transitions. [2019-12-07 18:42:37,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:42:37,725 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 18:42:37,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:37,845 INFO L225 Difference]: With dead ends: 83334 [2019-12-07 18:42:37,845 INFO L226 Difference]: Without dead ends: 83312 [2019-12-07 18:42:37,845 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:42:38,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83312 states. [2019-12-07 18:42:38,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83312 to 49804. [2019-12-07 18:42:38,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49804 states. [2019-12-07 18:42:38,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49804 states to 49804 states and 155755 transitions. [2019-12-07 18:42:38,959 INFO L78 Accepts]: Start accepts. Automaton has 49804 states and 155755 transitions. Word has length 28 [2019-12-07 18:42:38,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:38,959 INFO L462 AbstractCegarLoop]: Abstraction has 49804 states and 155755 transitions. [2019-12-07 18:42:38,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:42:38,960 INFO L276 IsEmpty]: Start isEmpty. Operand 49804 states and 155755 transitions. [2019-12-07 18:42:38,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:42:38,976 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:38,976 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:38,976 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:38,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:38,976 INFO L82 PathProgramCache]: Analyzing trace with hash -238960576, now seen corresponding path program 1 times [2019-12-07 18:42:38,977 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:38,977 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481440029] [2019-12-07 18:42:38,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:38,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:39,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:39,009 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481440029] [2019-12-07 18:42:39,009 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:39,009 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:39,010 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [397007219] [2019-12-07 18:42:39,010 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:39,010 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:39,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:39,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:39,011 INFO L87 Difference]: Start difference. First operand 49804 states and 155755 transitions. Second operand 4 states. [2019-12-07 18:42:39,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:39,070 INFO L93 Difference]: Finished difference Result 18907 states and 56660 transitions. [2019-12-07 18:42:39,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:42:39,070 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 18:42:39,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:39,089 INFO L225 Difference]: With dead ends: 18907 [2019-12-07 18:42:39,089 INFO L226 Difference]: Without dead ends: 18907 [2019-12-07 18:42:39,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:39,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18907 states. [2019-12-07 18:42:39,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18907 to 17941. [2019-12-07 18:42:39,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17941 states. [2019-12-07 18:42:39,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17941 states to 17941 states and 53802 transitions. [2019-12-07 18:42:39,338 INFO L78 Accepts]: Start accepts. Automaton has 17941 states and 53802 transitions. Word has length 29 [2019-12-07 18:42:39,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:39,338 INFO L462 AbstractCegarLoop]: Abstraction has 17941 states and 53802 transitions. [2019-12-07 18:42:39,338 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:39,338 INFO L276 IsEmpty]: Start isEmpty. Operand 17941 states and 53802 transitions. [2019-12-07 18:42:39,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:42:39,422 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:39,422 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:39,422 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:39,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:39,422 INFO L82 PathProgramCache]: Analyzing trace with hash 405285854, now seen corresponding path program 1 times [2019-12-07 18:42:39,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:39,423 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [861347317] [2019-12-07 18:42:39,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:39,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:39,466 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:39,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [861347317] [2019-12-07 18:42:39,467 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:39,467 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:39,467 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [132549569] [2019-12-07 18:42:39,467 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:39,467 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:39,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:39,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:39,468 INFO L87 Difference]: Start difference. First operand 17941 states and 53802 transitions. Second operand 5 states. [2019-12-07 18:42:39,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:39,693 INFO L93 Difference]: Finished difference Result 20466 states and 60692 transitions. [2019-12-07 18:42:39,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:42:39,693 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 18:42:39,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:39,715 INFO L225 Difference]: With dead ends: 20466 [2019-12-07 18:42:39,716 INFO L226 Difference]: Without dead ends: 20466 [2019-12-07 18:42:39,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:39,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20466 states. [2019-12-07 18:42:39,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20466 to 17997. [2019-12-07 18:42:39,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17997 states. [2019-12-07 18:42:39,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17997 states to 17997 states and 53962 transitions. [2019-12-07 18:42:39,989 INFO L78 Accepts]: Start accepts. Automaton has 17997 states and 53962 transitions. Word has length 33 [2019-12-07 18:42:39,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:39,989 INFO L462 AbstractCegarLoop]: Abstraction has 17997 states and 53962 transitions. [2019-12-07 18:42:39,989 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:39,989 INFO L276 IsEmpty]: Start isEmpty. Operand 17997 states and 53962 transitions. [2019-12-07 18:42:40,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:42:40,001 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:40,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:40,002 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:40,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:40,002 INFO L82 PathProgramCache]: Analyzing trace with hash -1258895234, now seen corresponding path program 2 times [2019-12-07 18:42:40,002 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:40,002 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813528519] [2019-12-07 18:42:40,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:40,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:40,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:40,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813528519] [2019-12-07 18:42:40,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:40,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:42:40,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1790552052] [2019-12-07 18:42:40,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:42:40,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:40,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:42:40,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:40,051 INFO L87 Difference]: Start difference. First operand 17997 states and 53962 transitions. Second operand 7 states. [2019-12-07 18:42:40,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:40,738 INFO L93 Difference]: Finished difference Result 34917 states and 103336 transitions. [2019-12-07 18:42:40,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:42:40,739 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:42:40,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:40,778 INFO L225 Difference]: With dead ends: 34917 [2019-12-07 18:42:40,778 INFO L226 Difference]: Without dead ends: 34917 [2019-12-07 18:42:40,779 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:42:40,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34917 states. [2019-12-07 18:42:41,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34917 to 18320. [2019-12-07 18:42:41,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18320 states. [2019-12-07 18:42:41,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18320 states to 18320 states and 54975 transitions. [2019-12-07 18:42:41,159 INFO L78 Accepts]: Start accepts. Automaton has 18320 states and 54975 transitions. Word has length 33 [2019-12-07 18:42:41,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:41,160 INFO L462 AbstractCegarLoop]: Abstraction has 18320 states and 54975 transitions. [2019-12-07 18:42:41,160 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:42:41,160 INFO L276 IsEmpty]: Start isEmpty. Operand 18320 states and 54975 transitions. [2019-12-07 18:42:41,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:42:41,173 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:41,173 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:41,173 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:41,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:41,174 INFO L82 PathProgramCache]: Analyzing trace with hash -454706214, now seen corresponding path program 3 times [2019-12-07 18:42:41,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:41,174 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158917335] [2019-12-07 18:42:41,174 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:41,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:41,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:41,232 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158917335] [2019-12-07 18:42:41,232 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:41,232 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:42:41,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2044538637] [2019-12-07 18:42:41,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:42:41,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:41,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:42:41,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:42:41,233 INFO L87 Difference]: Start difference. First operand 18320 states and 54975 transitions. Second operand 8 states. [2019-12-07 18:42:42,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:42,758 INFO L93 Difference]: Finished difference Result 42046 states and 122991 transitions. [2019-12-07 18:42:42,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:42:42,759 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 18:42:42,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:42,816 INFO L225 Difference]: With dead ends: 42046 [2019-12-07 18:42:42,816 INFO L226 Difference]: Without dead ends: 42046 [2019-12-07 18:42:42,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:42:42,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42046 states. [2019-12-07 18:42:43,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42046 to 18195. [2019-12-07 18:42:43,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18195 states. [2019-12-07 18:42:43,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18195 states to 18195 states and 54590 transitions. [2019-12-07 18:42:43,243 INFO L78 Accepts]: Start accepts. Automaton has 18195 states and 54590 transitions. Word has length 33 [2019-12-07 18:42:43,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:43,243 INFO L462 AbstractCegarLoop]: Abstraction has 18195 states and 54590 transitions. [2019-12-07 18:42:43,243 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:42:43,244 INFO L276 IsEmpty]: Start isEmpty. Operand 18195 states and 54590 transitions. [2019-12-07 18:42:43,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:42:43,258 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:43,258 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:43,258 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:43,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:43,258 INFO L82 PathProgramCache]: Analyzing trace with hash -1655017129, now seen corresponding path program 1 times [2019-12-07 18:42:43,258 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:43,259 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514211834] [2019-12-07 18:42:43,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:43,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:43,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:43,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514211834] [2019-12-07 18:42:43,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:43,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:42:43,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804765617] [2019-12-07 18:42:43,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:42:43,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:43,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:42:43,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:43,320 INFO L87 Difference]: Start difference. First operand 18195 states and 54590 transitions. Second operand 7 states. [2019-12-07 18:42:44,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:44,092 INFO L93 Difference]: Finished difference Result 32185 states and 94761 transitions. [2019-12-07 18:42:44,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:42:44,092 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 18:42:44,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:44,124 INFO L225 Difference]: With dead ends: 32185 [2019-12-07 18:42:44,124 INFO L226 Difference]: Without dead ends: 32185 [2019-12-07 18:42:44,125 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:42:44,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32185 states. [2019-12-07 18:42:44,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32185 to 17916. [2019-12-07 18:42:44,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17916 states. [2019-12-07 18:42:44,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17916 states to 17916 states and 53754 transitions. [2019-12-07 18:42:44,483 INFO L78 Accepts]: Start accepts. Automaton has 17916 states and 53754 transitions. Word has length 34 [2019-12-07 18:42:44,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:44,483 INFO L462 AbstractCegarLoop]: Abstraction has 17916 states and 53754 transitions. [2019-12-07 18:42:44,483 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:42:44,483 INFO L276 IsEmpty]: Start isEmpty. Operand 17916 states and 53754 transitions. [2019-12-07 18:42:44,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:42:44,496 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:44,496 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:44,496 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:44,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:44,496 INFO L82 PathProgramCache]: Analyzing trace with hash 2107636055, now seen corresponding path program 2 times [2019-12-07 18:42:44,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:44,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801523933] [2019-12-07 18:42:44,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:44,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:44,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:44,552 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801523933] [2019-12-07 18:42:44,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:44,553 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:42:44,553 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1919037239] [2019-12-07 18:42:44,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:42:44,553 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:44,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:42:44,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:42:44,553 INFO L87 Difference]: Start difference. First operand 17916 states and 53754 transitions. Second operand 8 states. [2019-12-07 18:42:45,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:45,491 INFO L93 Difference]: Finished difference Result 37165 states and 108100 transitions. [2019-12-07 18:42:45,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:42:45,491 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 18:42:45,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:45,532 INFO L225 Difference]: With dead ends: 37165 [2019-12-07 18:42:45,532 INFO L226 Difference]: Without dead ends: 37165 [2019-12-07 18:42:45,533 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:42:45,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37165 states. [2019-12-07 18:42:45,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37165 to 17448. [2019-12-07 18:42:45,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17448 states. [2019-12-07 18:42:45,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17448 states to 17448 states and 52365 transitions. [2019-12-07 18:42:45,921 INFO L78 Accepts]: Start accepts. Automaton has 17448 states and 52365 transitions. Word has length 34 [2019-12-07 18:42:45,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:45,921 INFO L462 AbstractCegarLoop]: Abstraction has 17448 states and 52365 transitions. [2019-12-07 18:42:45,921 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:42:45,921 INFO L276 IsEmpty]: Start isEmpty. Operand 17448 states and 52365 transitions. [2019-12-07 18:42:45,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:42:45,936 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:45,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:45,936 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:45,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:45,936 INFO L82 PathProgramCache]: Analyzing trace with hash -1063261264, now seen corresponding path program 1 times [2019-12-07 18:42:45,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:45,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164693385] [2019-12-07 18:42:45,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:45,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:45,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:45,978 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164693385] [2019-12-07 18:42:45,978 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:45,978 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:45,979 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740261363] [2019-12-07 18:42:45,979 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:45,979 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:45,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:45,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:45,979 INFO L87 Difference]: Start difference. First operand 17448 states and 52365 transitions. Second operand 3 states. [2019-12-07 18:42:46,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:46,023 INFO L93 Difference]: Finished difference Result 16644 states and 49187 transitions. [2019-12-07 18:42:46,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:46,023 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 18:42:46,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:46,040 INFO L225 Difference]: With dead ends: 16644 [2019-12-07 18:42:46,041 INFO L226 Difference]: Without dead ends: 16644 [2019-12-07 18:42:46,041 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:46,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16644 states. [2019-12-07 18:42:46,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16644 to 16394. [2019-12-07 18:42:46,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16394 states. [2019-12-07 18:42:46,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16394 states to 16394 states and 48489 transitions. [2019-12-07 18:42:46,269 INFO L78 Accepts]: Start accepts. Automaton has 16394 states and 48489 transitions. Word has length 40 [2019-12-07 18:42:46,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:46,269 INFO L462 AbstractCegarLoop]: Abstraction has 16394 states and 48489 transitions. [2019-12-07 18:42:46,269 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:46,269 INFO L276 IsEmpty]: Start isEmpty. Operand 16394 states and 48489 transitions. [2019-12-07 18:42:46,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:42:46,282 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:46,282 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:46,282 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:46,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:46,282 INFO L82 PathProgramCache]: Analyzing trace with hash -1269693180, now seen corresponding path program 1 times [2019-12-07 18:42:46,283 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:46,283 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104439060] [2019-12-07 18:42:46,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:46,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:46,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:46,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104439060] [2019-12-07 18:42:46,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:46,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:46,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1360807555] [2019-12-07 18:42:46,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:46,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:46,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:46,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:46,337 INFO L87 Difference]: Start difference. First operand 16394 states and 48489 transitions. Second operand 4 states. [2019-12-07 18:42:46,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:46,386 INFO L93 Difference]: Finished difference Result 16392 states and 48485 transitions. [2019-12-07 18:42:46,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:42:46,386 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 41 [2019-12-07 18:42:46,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:46,404 INFO L225 Difference]: With dead ends: 16392 [2019-12-07 18:42:46,404 INFO L226 Difference]: Without dead ends: 16392 [2019-12-07 18:42:46,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:46,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16392 states. [2019-12-07 18:42:46,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16392 to 16392. [2019-12-07 18:42:46,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16392 states. [2019-12-07 18:42:46,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16392 states to 16392 states and 48485 transitions. [2019-12-07 18:42:46,623 INFO L78 Accepts]: Start accepts. Automaton has 16392 states and 48485 transitions. Word has length 41 [2019-12-07 18:42:46,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:46,624 INFO L462 AbstractCegarLoop]: Abstraction has 16392 states and 48485 transitions. [2019-12-07 18:42:46,624 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:46,624 INFO L276 IsEmpty]: Start isEmpty. Operand 16392 states and 48485 transitions. [2019-12-07 18:42:46,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 18:42:46,636 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:46,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:46,636 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:46,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:46,636 INFO L82 PathProgramCache]: Analyzing trace with hash 1004559121, now seen corresponding path program 1 times [2019-12-07 18:42:46,637 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:46,637 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014739440] [2019-12-07 18:42:46,637 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:46,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:46,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:46,669 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014739440] [2019-12-07 18:42:46,669 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:46,669 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:42:46,669 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816677250] [2019-12-07 18:42:46,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:46,670 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:46,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:46,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:46,670 INFO L87 Difference]: Start difference. First operand 16392 states and 48485 transitions. Second operand 5 states. [2019-12-07 18:42:46,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:46,723 INFO L93 Difference]: Finished difference Result 14944 states and 45371 transitions. [2019-12-07 18:42:46,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:42:46,723 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 18:42:46,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:46,739 INFO L225 Difference]: With dead ends: 14944 [2019-12-07 18:42:46,739 INFO L226 Difference]: Without dead ends: 14944 [2019-12-07 18:42:46,740 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:46,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14944 states. [2019-12-07 18:42:46,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14944 to 13549. [2019-12-07 18:42:46,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13549 states. [2019-12-07 18:42:46,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13549 states to 13549 states and 41323 transitions. [2019-12-07 18:42:46,946 INFO L78 Accepts]: Start accepts. Automaton has 13549 states and 41323 transitions. Word has length 42 [2019-12-07 18:42:46,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:46,947 INFO L462 AbstractCegarLoop]: Abstraction has 13549 states and 41323 transitions. [2019-12-07 18:42:46,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:46,947 INFO L276 IsEmpty]: Start isEmpty. Operand 13549 states and 41323 transitions. [2019-12-07 18:42:46,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:42:46,959 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:46,959 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:46,959 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:46,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:46,959 INFO L82 PathProgramCache]: Analyzing trace with hash -1998793289, now seen corresponding path program 1 times [2019-12-07 18:42:46,960 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:46,960 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [83045077] [2019-12-07 18:42:46,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:47,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:47,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:47,036 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [83045077] [2019-12-07 18:42:47,036 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:47,036 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:42:47,036 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2106395752] [2019-12-07 18:42:47,036 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:42:47,037 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:47,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:42:47,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:47,037 INFO L87 Difference]: Start difference. First operand 13549 states and 41323 transitions. Second operand 3 states. [2019-12-07 18:42:47,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:47,103 INFO L93 Difference]: Finished difference Result 16230 states and 49496 transitions. [2019-12-07 18:42:47,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:42:47,104 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:42:47,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:47,125 INFO L225 Difference]: With dead ends: 16230 [2019-12-07 18:42:47,125 INFO L226 Difference]: Without dead ends: 16230 [2019-12-07 18:42:47,125 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:42:47,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16230 states. [2019-12-07 18:42:47,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16230 to 13312. [2019-12-07 18:42:47,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13312 states. [2019-12-07 18:42:47,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13312 states to 13312 states and 40848 transitions. [2019-12-07 18:42:47,341 INFO L78 Accepts]: Start accepts. Automaton has 13312 states and 40848 transitions. Word has length 66 [2019-12-07 18:42:47,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:47,342 INFO L462 AbstractCegarLoop]: Abstraction has 13312 states and 40848 transitions. [2019-12-07 18:42:47,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:42:47,342 INFO L276 IsEmpty]: Start isEmpty. Operand 13312 states and 40848 transitions. [2019-12-07 18:42:47,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:47,354 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:47,354 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:47,354 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:47,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:47,354 INFO L82 PathProgramCache]: Analyzing trace with hash 144628366, now seen corresponding path program 1 times [2019-12-07 18:42:47,354 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:47,355 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073359089] [2019-12-07 18:42:47,355 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:47,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:47,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:47,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2073359089] [2019-12-07 18:42:47,423 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:47,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:42:47,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [675158838] [2019-12-07 18:42:47,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:42:47,424 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:47,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:42:47,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:47,424 INFO L87 Difference]: Start difference. First operand 13312 states and 40848 transitions. Second operand 7 states. [2019-12-07 18:42:48,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:48,444 INFO L93 Difference]: Finished difference Result 29452 states and 87872 transitions. [2019-12-07 18:42:48,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:42:48,445 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 18:42:48,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:48,476 INFO L225 Difference]: With dead ends: 29452 [2019-12-07 18:42:48,476 INFO L226 Difference]: Without dead ends: 29452 [2019-12-07 18:42:48,477 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:42:48,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29452 states. [2019-12-07 18:42:48,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29452 to 16658. [2019-12-07 18:42:48,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16658 states. [2019-12-07 18:42:48,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16658 states to 16658 states and 51099 transitions. [2019-12-07 18:42:48,804 INFO L78 Accepts]: Start accepts. Automaton has 16658 states and 51099 transitions. Word has length 67 [2019-12-07 18:42:48,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:48,804 INFO L462 AbstractCegarLoop]: Abstraction has 16658 states and 51099 transitions. [2019-12-07 18:42:48,804 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:42:48,804 INFO L276 IsEmpty]: Start isEmpty. Operand 16658 states and 51099 transitions. [2019-12-07 18:42:48,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:48,819 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:48,819 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:48,819 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:48,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:48,819 INFO L82 PathProgramCache]: Analyzing trace with hash 208126770, now seen corresponding path program 1 times [2019-12-07 18:42:48,820 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:48,820 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137118810] [2019-12-07 18:42:48,820 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:48,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:48,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:48,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2137118810] [2019-12-07 18:42:48,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:48,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:48,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [939908663] [2019-12-07 18:42:48,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:48,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:48,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:48,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:48,871 INFO L87 Difference]: Start difference. First operand 16658 states and 51099 transitions. Second operand 4 states. [2019-12-07 18:42:48,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:48,953 INFO L93 Difference]: Finished difference Result 16486 states and 50386 transitions. [2019-12-07 18:42:48,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:42:48,953 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:42:48,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:48,971 INFO L225 Difference]: With dead ends: 16486 [2019-12-07 18:42:48,971 INFO L226 Difference]: Without dead ends: 16486 [2019-12-07 18:42:48,972 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:49,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16486 states. [2019-12-07 18:42:49,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16486 to 14455. [2019-12-07 18:42:49,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14455 states. [2019-12-07 18:42:49,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14455 states to 14455 states and 44174 transitions. [2019-12-07 18:42:49,202 INFO L78 Accepts]: Start accepts. Automaton has 14455 states and 44174 transitions. Word has length 67 [2019-12-07 18:42:49,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:49,202 INFO L462 AbstractCegarLoop]: Abstraction has 14455 states and 44174 transitions. [2019-12-07 18:42:49,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:49,202 INFO L276 IsEmpty]: Start isEmpty. Operand 14455 states and 44174 transitions. [2019-12-07 18:42:49,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:49,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:49,215 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:49,215 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:49,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:49,216 INFO L82 PathProgramCache]: Analyzing trace with hash 751511131, now seen corresponding path program 1 times [2019-12-07 18:42:49,216 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:49,216 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834073897] [2019-12-07 18:42:49,216 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:49,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:49,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:49,273 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834073897] [2019-12-07 18:42:49,273 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:49,273 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:42:49,273 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141227179] [2019-12-07 18:42:49,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:42:49,274 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:49,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:42:49,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:42:49,274 INFO L87 Difference]: Start difference. First operand 14455 states and 44174 transitions. Second operand 4 states. [2019-12-07 18:42:49,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:49,351 INFO L93 Difference]: Finished difference Result 24687 states and 75589 transitions. [2019-12-07 18:42:49,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:42:49,351 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:42:49,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:49,363 INFO L225 Difference]: With dead ends: 24687 [2019-12-07 18:42:49,363 INFO L226 Difference]: Without dead ends: 11243 [2019-12-07 18:42:49,364 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:49,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11243 states. [2019-12-07 18:42:49,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11243 to 11243. [2019-12-07 18:42:49,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11243 states. [2019-12-07 18:42:49,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11243 states to 11243 states and 34427 transitions. [2019-12-07 18:42:49,521 INFO L78 Accepts]: Start accepts. Automaton has 11243 states and 34427 transitions. Word has length 67 [2019-12-07 18:42:49,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:49,521 INFO L462 AbstractCegarLoop]: Abstraction has 11243 states and 34427 transitions. [2019-12-07 18:42:49,521 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:42:49,521 INFO L276 IsEmpty]: Start isEmpty. Operand 11243 states and 34427 transitions. [2019-12-07 18:42:49,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:49,529 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:49,529 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:49,529 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:49,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:49,530 INFO L82 PathProgramCache]: Analyzing trace with hash 691736411, now seen corresponding path program 2 times [2019-12-07 18:42:49,530 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:49,530 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170186158] [2019-12-07 18:42:49,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:49,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:49,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:49,615 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170186158] [2019-12-07 18:42:49,615 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:49,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:42:49,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649323503] [2019-12-07 18:42:49,615 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:42:49,615 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:49,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:42:49,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:42:49,616 INFO L87 Difference]: Start difference. First operand 11243 states and 34427 transitions. Second operand 5 states. [2019-12-07 18:42:49,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:49,678 INFO L93 Difference]: Finished difference Result 19918 states and 61172 transitions. [2019-12-07 18:42:49,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:42:49,679 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 18:42:49,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:49,689 INFO L225 Difference]: With dead ends: 19918 [2019-12-07 18:42:49,689 INFO L226 Difference]: Without dead ends: 9508 [2019-12-07 18:42:49,689 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:42:49,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9508 states. [2019-12-07 18:42:49,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9508 to 9508. [2019-12-07 18:42:49,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9508 states. [2019-12-07 18:42:49,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9508 states to 9508 states and 29065 transitions. [2019-12-07 18:42:49,829 INFO L78 Accepts]: Start accepts. Automaton has 9508 states and 29065 transitions. Word has length 67 [2019-12-07 18:42:49,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:49,829 INFO L462 AbstractCegarLoop]: Abstraction has 9508 states and 29065 transitions. [2019-12-07 18:42:49,829 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:42:49,829 INFO L276 IsEmpty]: Start isEmpty. Operand 9508 states and 29065 transitions. [2019-12-07 18:42:49,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:49,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:49,837 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:49,837 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:49,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:49,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1197749059, now seen corresponding path program 3 times [2019-12-07 18:42:49,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:49,837 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1582616022] [2019-12-07 18:42:49,837 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:49,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:50,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:50,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1582616022] [2019-12-07 18:42:50,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:50,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:42:50,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563973255] [2019-12-07 18:42:50,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:42:50,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:50,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:42:50,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:42:50,044 INFO L87 Difference]: Start difference. First operand 9508 states and 29065 transitions. Second operand 13 states. [2019-12-07 18:42:50,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:50,945 INFO L93 Difference]: Finished difference Result 18202 states and 54458 transitions. [2019-12-07 18:42:50,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 18:42:50,945 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 18:42:50,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:50,957 INFO L225 Difference]: With dead ends: 18202 [2019-12-07 18:42:50,958 INFO L226 Difference]: Without dead ends: 11979 [2019-12-07 18:42:50,958 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=136, Invalid=620, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:42:51,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11979 states. [2019-12-07 18:42:51,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11979 to 10575. [2019-12-07 18:42:51,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10575 states. [2019-12-07 18:42:51,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10575 states to 10575 states and 32125 transitions. [2019-12-07 18:42:51,131 INFO L78 Accepts]: Start accepts. Automaton has 10575 states and 32125 transitions. Word has length 67 [2019-12-07 18:42:51,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:51,131 INFO L462 AbstractCegarLoop]: Abstraction has 10575 states and 32125 transitions. [2019-12-07 18:42:51,131 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:42:51,132 INFO L276 IsEmpty]: Start isEmpty. Operand 10575 states and 32125 transitions. [2019-12-07 18:42:51,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:51,139 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:51,140 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:51,140 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:51,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:51,140 INFO L82 PathProgramCache]: Analyzing trace with hash -1290130541, now seen corresponding path program 4 times [2019-12-07 18:42:51,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:51,140 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57075587] [2019-12-07 18:42:51,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:51,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:51,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:51,188 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57075587] [2019-12-07 18:42:51,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:51,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:42:51,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926517167] [2019-12-07 18:42:51,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:42:51,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:51,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:42:51,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:42:51,189 INFO L87 Difference]: Start difference. First operand 10575 states and 32125 transitions. Second operand 7 states. [2019-12-07 18:42:51,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:51,341 INFO L93 Difference]: Finished difference Result 18779 states and 56066 transitions. [2019-12-07 18:42:51,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:42:51,341 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 18:42:51,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:51,355 INFO L225 Difference]: With dead ends: 18779 [2019-12-07 18:42:51,355 INFO L226 Difference]: Without dead ends: 13812 [2019-12-07 18:42:51,356 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:42:51,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13812 states. [2019-12-07 18:42:51,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13812 to 10998. [2019-12-07 18:42:51,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10998 states. [2019-12-07 18:42:51,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10998 states to 10998 states and 33228 transitions. [2019-12-07 18:42:51,536 INFO L78 Accepts]: Start accepts. Automaton has 10998 states and 33228 transitions. Word has length 67 [2019-12-07 18:42:51,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:51,536 INFO L462 AbstractCegarLoop]: Abstraction has 10998 states and 33228 transitions. [2019-12-07 18:42:51,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:42:51,537 INFO L276 IsEmpty]: Start isEmpty. Operand 10998 states and 33228 transitions. [2019-12-07 18:42:51,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:51,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:51,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:51,546 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:51,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:51,546 INFO L82 PathProgramCache]: Analyzing trace with hash 2078724657, now seen corresponding path program 5 times [2019-12-07 18:42:51,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:51,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748171990] [2019-12-07 18:42:51,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:51,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:51,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:51,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748171990] [2019-12-07 18:42:51,633 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:51,633 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:42:51,633 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766726715] [2019-12-07 18:42:51,634 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:42:51,634 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:51,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:42:51,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:42:51,634 INFO L87 Difference]: Start difference. First operand 10998 states and 33228 transitions. Second operand 9 states. [2019-12-07 18:42:52,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:52,439 INFO L93 Difference]: Finished difference Result 20805 states and 61926 transitions. [2019-12-07 18:42:52,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:42:52,440 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 18:42:52,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:52,464 INFO L225 Difference]: With dead ends: 20805 [2019-12-07 18:42:52,464 INFO L226 Difference]: Without dead ends: 15106 [2019-12-07 18:42:52,465 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:42:52,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15106 states. [2019-12-07 18:42:52,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15106 to 11621. [2019-12-07 18:42:52,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11621 states. [2019-12-07 18:42:52,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11621 states to 11621 states and 34761 transitions. [2019-12-07 18:42:52,655 INFO L78 Accepts]: Start accepts. Automaton has 11621 states and 34761 transitions. Word has length 67 [2019-12-07 18:42:52,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:52,656 INFO L462 AbstractCegarLoop]: Abstraction has 11621 states and 34761 transitions. [2019-12-07 18:42:52,656 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:42:52,656 INFO L276 IsEmpty]: Start isEmpty. Operand 11621 states and 34761 transitions. [2019-12-07 18:42:52,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:52,665 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:52,665 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:52,665 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:52,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:52,666 INFO L82 PathProgramCache]: Analyzing trace with hash 721495091, now seen corresponding path program 6 times [2019-12-07 18:42:52,666 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:52,666 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [377170281] [2019-12-07 18:42:52,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:52,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:52,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:52,811 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [377170281] [2019-12-07 18:42:52,811 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:52,811 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:42:52,811 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899381655] [2019-12-07 18:42:52,811 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:42:52,811 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:52,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:42:52,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:42:52,812 INFO L87 Difference]: Start difference. First operand 11621 states and 34761 transitions. Second operand 11 states. [2019-12-07 18:42:53,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:53,961 INFO L93 Difference]: Finished difference Result 18761 states and 54643 transitions. [2019-12-07 18:42:53,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 18:42:53,962 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:42:53,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:53,988 INFO L225 Difference]: With dead ends: 18761 [2019-12-07 18:42:53,988 INFO L226 Difference]: Without dead ends: 16514 [2019-12-07 18:42:53,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=396, Unknown=0, NotChecked=0, Total=506 [2019-12-07 18:42:54,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16514 states. [2019-12-07 18:42:54,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16514 to 11887. [2019-12-07 18:42:54,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11887 states. [2019-12-07 18:42:54,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11887 states to 11887 states and 35342 transitions. [2019-12-07 18:42:54,188 INFO L78 Accepts]: Start accepts. Automaton has 11887 states and 35342 transitions. Word has length 67 [2019-12-07 18:42:54,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:54,188 INFO L462 AbstractCegarLoop]: Abstraction has 11887 states and 35342 transitions. [2019-12-07 18:42:54,188 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:42:54,188 INFO L276 IsEmpty]: Start isEmpty. Operand 11887 states and 35342 transitions. [2019-12-07 18:42:54,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:54,197 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:54,197 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:54,198 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:54,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:54,198 INFO L82 PathProgramCache]: Analyzing trace with hash -1716057561, now seen corresponding path program 7 times [2019-12-07 18:42:54,198 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:54,198 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1160296368] [2019-12-07 18:42:54,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:54,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:54,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:54,558 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1160296368] [2019-12-07 18:42:54,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:54,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 18:42:54,558 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593998570] [2019-12-07 18:42:54,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 18:42:54,558 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:54,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 18:42:54,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:42:54,559 INFO L87 Difference]: Start difference. First operand 11887 states and 35342 transitions. Second operand 17 states. [2019-12-07 18:42:57,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:57,572 INFO L93 Difference]: Finished difference Result 18123 states and 52432 transitions. [2019-12-07 18:42:57,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 18:42:57,573 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 18:42:57,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:57,600 INFO L225 Difference]: With dead ends: 18123 [2019-12-07 18:42:57,600 INFO L226 Difference]: Without dead ends: 16956 [2019-12-07 18:42:57,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 510 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=310, Invalid=1582, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 18:42:57,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16956 states. [2019-12-07 18:42:57,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16956 to 11801. [2019-12-07 18:42:57,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11801 states. [2019-12-07 18:42:57,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11801 states to 11801 states and 35129 transitions. [2019-12-07 18:42:57,835 INFO L78 Accepts]: Start accepts. Automaton has 11801 states and 35129 transitions. Word has length 67 [2019-12-07 18:42:57,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:57,835 INFO L462 AbstractCegarLoop]: Abstraction has 11801 states and 35129 transitions. [2019-12-07 18:42:57,835 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 18:42:57,835 INFO L276 IsEmpty]: Start isEmpty. Operand 11801 states and 35129 transitions. [2019-12-07 18:42:57,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:57,844 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:57,844 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:57,844 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:57,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:57,844 INFO L82 PathProgramCache]: Analyzing trace with hash 88464887, now seen corresponding path program 8 times [2019-12-07 18:42:57,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:57,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95049508] [2019-12-07 18:42:57,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:57,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:58,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:58,015 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95049508] [2019-12-07 18:42:58,015 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:58,015 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:42:58,015 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318942199] [2019-12-07 18:42:58,016 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 18:42:58,016 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:58,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 18:42:58,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=152, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:42:58,016 INFO L87 Difference]: Start difference. First operand 11801 states and 35129 transitions. Second operand 14 states. [2019-12-07 18:42:59,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:42:59,370 INFO L93 Difference]: Finished difference Result 22766 states and 66419 transitions. [2019-12-07 18:42:59,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 18:42:59,370 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 18:42:59,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:42:59,385 INFO L225 Difference]: With dead ends: 22766 [2019-12-07 18:42:59,385 INFO L226 Difference]: Without dead ends: 16203 [2019-12-07 18:42:59,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=189, Invalid=1001, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 18:42:59,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16203 states. [2019-12-07 18:42:59,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16203 to 11553. [2019-12-07 18:42:59,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11553 states. [2019-12-07 18:42:59,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11553 states to 11553 states and 34311 transitions. [2019-12-07 18:42:59,580 INFO L78 Accepts]: Start accepts. Automaton has 11553 states and 34311 transitions. Word has length 67 [2019-12-07 18:42:59,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:42:59,580 INFO L462 AbstractCegarLoop]: Abstraction has 11553 states and 34311 transitions. [2019-12-07 18:42:59,580 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 18:42:59,580 INFO L276 IsEmpty]: Start isEmpty. Operand 11553 states and 34311 transitions. [2019-12-07 18:42:59,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:42:59,590 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:42:59,590 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:42:59,590 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:42:59,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:42:59,591 INFO L82 PathProgramCache]: Analyzing trace with hash 575406353, now seen corresponding path program 9 times [2019-12-07 18:42:59,591 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:42:59,591 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [861901150] [2019-12-07 18:42:59,591 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:42:59,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:42:59,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:42:59,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [861901150] [2019-12-07 18:42:59,815 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:42:59,815 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:42:59,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258638012] [2019-12-07 18:42:59,815 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:42:59,815 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:42:59,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:42:59,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:42:59,816 INFO L87 Difference]: Start difference. First operand 11553 states and 34311 transitions. Second operand 11 states. [2019-12-07 18:43:00,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:00,400 INFO L93 Difference]: Finished difference Result 16611 states and 49137 transitions. [2019-12-07 18:43:00,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 18:43:00,401 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:43:00,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:00,416 INFO L225 Difference]: With dead ends: 16611 [2019-12-07 18:43:00,416 INFO L226 Difference]: Without dead ends: 15592 [2019-12-07 18:43:00,417 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 125 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=130, Invalid=572, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:43:00,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15592 states. [2019-12-07 18:43:00,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15592 to 13664. [2019-12-07 18:43:00,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13664 states. [2019-12-07 18:43:00,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13664 states to 13664 states and 40652 transitions. [2019-12-07 18:43:00,632 INFO L78 Accepts]: Start accepts. Automaton has 13664 states and 40652 transitions. Word has length 67 [2019-12-07 18:43:00,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:00,633 INFO L462 AbstractCegarLoop]: Abstraction has 13664 states and 40652 transitions. [2019-12-07 18:43:00,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:43:00,633 INFO L276 IsEmpty]: Start isEmpty. Operand 13664 states and 40652 transitions. [2019-12-07 18:43:00,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:43:00,645 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:00,645 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:00,645 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:00,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:00,646 INFO L82 PathProgramCache]: Analyzing trace with hash -600013973, now seen corresponding path program 10 times [2019-12-07 18:43:00,646 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:00,646 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191933255] [2019-12-07 18:43:00,646 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:00,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:00,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:00,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191933255] [2019-12-07 18:43:00,831 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:00,831 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:43:00,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168981779] [2019-12-07 18:43:00,831 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:43:00,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:00,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:43:00,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:43:00,831 INFO L87 Difference]: Start difference. First operand 13664 states and 40652 transitions. Second operand 11 states. [2019-12-07 18:43:01,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:01,803 INFO L93 Difference]: Finished difference Result 16342 states and 47697 transitions. [2019-12-07 18:43:01,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 18:43:01,804 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:43:01,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:01,825 INFO L225 Difference]: With dead ends: 16342 [2019-12-07 18:43:01,825 INFO L226 Difference]: Without dead ends: 13498 [2019-12-07 18:43:01,826 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=122, Invalid=478, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:43:01,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13498 states. [2019-12-07 18:43:01,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13498 to 11297. [2019-12-07 18:43:01,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11297 states. [2019-12-07 18:43:02,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11297 states to 11297 states and 33662 transitions. [2019-12-07 18:43:02,005 INFO L78 Accepts]: Start accepts. Automaton has 11297 states and 33662 transitions. Word has length 67 [2019-12-07 18:43:02,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:02,005 INFO L462 AbstractCegarLoop]: Abstraction has 11297 states and 33662 transitions. [2019-12-07 18:43:02,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:43:02,006 INFO L276 IsEmpty]: Start isEmpty. Operand 11297 states and 33662 transitions. [2019-12-07 18:43:02,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:43:02,015 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:02,015 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:02,015 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:02,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:02,015 INFO L82 PathProgramCache]: Analyzing trace with hash 975038819, now seen corresponding path program 11 times [2019-12-07 18:43:02,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:02,016 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456545935] [2019-12-07 18:43:02,016 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:02,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:02,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:02,113 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456545935] [2019-12-07 18:43:02,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:02,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:43:02,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [829975421] [2019-12-07 18:43:02,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:43:02,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:02,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:43:02,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:43:02,113 INFO L87 Difference]: Start difference. First operand 11297 states and 33662 transitions. Second operand 10 states. [2019-12-07 18:43:03,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:03,173 INFO L93 Difference]: Finished difference Result 14311 states and 41545 transitions. [2019-12-07 18:43:03,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:43:03,174 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:43:03,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:03,195 INFO L225 Difference]: With dead ends: 14311 [2019-12-07 18:43:03,195 INFO L226 Difference]: Without dead ends: 13472 [2019-12-07 18:43:03,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:43:03,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13472 states. [2019-12-07 18:43:03,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13472 to 10927. [2019-12-07 18:43:03,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10927 states. [2019-12-07 18:43:03,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10927 states to 10927 states and 32628 transitions. [2019-12-07 18:43:03,372 INFO L78 Accepts]: Start accepts. Automaton has 10927 states and 32628 transitions. Word has length 67 [2019-12-07 18:43:03,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:03,372 INFO L462 AbstractCegarLoop]: Abstraction has 10927 states and 32628 transitions. [2019-12-07 18:43:03,372 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:43:03,372 INFO L276 IsEmpty]: Start isEmpty. Operand 10927 states and 32628 transitions. [2019-12-07 18:43:03,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:43:03,381 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:03,381 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:03,381 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:03,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:03,382 INFO L82 PathProgramCache]: Analyzing trace with hash -478785703, now seen corresponding path program 12 times [2019-12-07 18:43:03,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:03,382 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [360309442] [2019-12-07 18:43:03,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:03,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:03,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:03,461 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [360309442] [2019-12-07 18:43:03,461 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:03,462 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:43:03,462 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084581679] [2019-12-07 18:43:03,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:43:03,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:03,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:43:03,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:43:03,462 INFO L87 Difference]: Start difference. First operand 10927 states and 32628 transitions. Second operand 10 states. [2019-12-07 18:43:04,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:04,786 INFO L93 Difference]: Finished difference Result 13908 states and 40682 transitions. [2019-12-07 18:43:04,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:43:04,787 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:43:04,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:04,798 INFO L225 Difference]: With dead ends: 13908 [2019-12-07 18:43:04,799 INFO L226 Difference]: Without dead ends: 13665 [2019-12-07 18:43:04,799 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:43:04,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13665 states. [2019-12-07 18:43:04,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13665 to 10943. [2019-12-07 18:43:04,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10943 states. [2019-12-07 18:43:04,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10943 states to 10943 states and 32668 transitions. [2019-12-07 18:43:04,967 INFO L78 Accepts]: Start accepts. Automaton has 10943 states and 32668 transitions. Word has length 67 [2019-12-07 18:43:04,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:04,967 INFO L462 AbstractCegarLoop]: Abstraction has 10943 states and 32668 transitions. [2019-12-07 18:43:04,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:43:04,967 INFO L276 IsEmpty]: Start isEmpty. Operand 10943 states and 32668 transitions. [2019-12-07 18:43:04,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:43:04,976 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:04,976 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:04,977 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:04,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:04,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1516551711, now seen corresponding path program 13 times [2019-12-07 18:43:04,977 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:04,977 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215024494] [2019-12-07 18:43:04,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:04,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:43:05,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:43:05,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215024494] [2019-12-07 18:43:05,256 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:43:05,256 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:43:05,256 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1239931162] [2019-12-07 18:43:05,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 18:43:05,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:43:05,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 18:43:05,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:43:05,257 INFO L87 Difference]: Start difference. First operand 10943 states and 32668 transitions. Second operand 14 states. [2019-12-07 18:43:06,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:43:06,518 INFO L93 Difference]: Finished difference Result 15418 states and 44877 transitions. [2019-12-07 18:43:06,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 18:43:06,518 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 18:43:06,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:43:06,532 INFO L225 Difference]: With dead ends: 15418 [2019-12-07 18:43:06,532 INFO L226 Difference]: Without dead ends: 15175 [2019-12-07 18:43:06,533 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=222, Invalid=968, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 18:43:06,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15175 states. [2019-12-07 18:43:06,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15175 to 10767. [2019-12-07 18:43:06,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10767 states. [2019-12-07 18:43:06,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10767 states to 10767 states and 32196 transitions. [2019-12-07 18:43:06,713 INFO L78 Accepts]: Start accepts. Automaton has 10767 states and 32196 transitions. Word has length 67 [2019-12-07 18:43:06,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:43:06,713 INFO L462 AbstractCegarLoop]: Abstraction has 10767 states and 32196 transitions. [2019-12-07 18:43:06,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 18:43:06,713 INFO L276 IsEmpty]: Start isEmpty. Operand 10767 states and 32196 transitions. [2019-12-07 18:43:06,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:43:06,722 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:43:06,722 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:43:06,722 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:43:06,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:43:06,722 INFO L82 PathProgramCache]: Analyzing trace with hash -494782975, now seen corresponding path program 14 times [2019-12-07 18:43:06,722 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:43:06,723 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887137724] [2019-12-07 18:43:06,723 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:43:06,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:43:06,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:43:06,809 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:43:06,809 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:43:06,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~weak$$choice0~0_10) (= v_~a$r_buff1_thd0~0_132 0) (= 0 v_~a$w_buff0_used~0_689) (= 0 v_~a$w_buff1_used~0_376) (= v_~a$r_buff0_thd3~0_328 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t385~0.base_29| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t385~0.base_29|) |v_ULTIMATE.start_main_~#t385~0.offset_22| 0)) |v_#memory_int_21|) (= |v_#NULL.offset_6| 0) (= v_~y~0_79 0) (= 0 v_~a$r_buff1_thd1~0_125) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t385~0.base_29|)) (= 0 v_~__unbuffered_p0_EAX~0_92) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~x~0_69 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t385~0.base_29| 4)) (= 0 v_~a$r_buff1_thd2~0_129) (< 0 |v_#StackHeapBarrier_17|) (= v_~__unbuffered_p0_EBX~0_92 0) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t385~0.base_29| 1)) (= v_~a$flush_delayed~0_23 0) (= v_~a$r_buff1_thd3~0_224 0) (= v_~__unbuffered_p2_EBX~0_38 0) (= 0 v_~__unbuffered_cnt~0_98) (= 0 |v_ULTIMATE.start_main_~#t385~0.offset_22|) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~a$r_buff0_thd2~0_124) (= v_~a~0_181 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~a$r_buff0_thd1~0_195) (= v_~a$mem_tmp~0_12 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~a$w_buff1~0_172) (= v_~a$r_buff0_thd0~0_144 0) (= v_~a$w_buff0~0_228 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t385~0.base_29|) (= v_~weak$$choice2~0_107 0) (= v_~z~0_20 0) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_129, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_281|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ~a~0=v_~a~0_181, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_67|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_92, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t386~0.base=|v_ULTIMATE.start_main_~#t386~0.base_29|, ULTIMATE.start_main_~#t387~0.offset=|v_ULTIMATE.start_main_~#t387~0.offset_15|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_92, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_224, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_689, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_195, ULTIMATE.start_main_~#t386~0.offset=|v_ULTIMATE.start_main_~#t386~0.offset_22|, ULTIMATE.start_main_~#t385~0.offset=|v_ULTIMATE.start_main_~#t385~0.offset_22|, ~weak$$choice0~0=v_~weak$$choice0~0_10, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t385~0.base=|v_ULTIMATE.start_main_~#t385~0.base_29|, ~a$w_buff0~0=v_~a$w_buff0~0_228, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_69, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_124, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_12, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_172, ~y~0=v_~y~0_79, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_125, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_328, ULTIMATE.start_main_~#t387~0.base=|v_ULTIMATE.start_main_~#t387~0.base_17|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_376, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t386~0.base, ULTIMATE.start_main_~#t387~0.offset, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t386~0.offset, ULTIMATE.start_main_~#t385~0.offset, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t385~0.base, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ULTIMATE.start_main_~#t387~0.base, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:43:06,812 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L837-1-->L839: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t386~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t386~0.offset_10|) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t386~0.base_12| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t386~0.base_12| 4)) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t386~0.base_12|)) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t386~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t386~0.base_12|) |v_ULTIMATE.start_main_~#t386~0.offset_10| 1))) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t386~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t386~0.base=|v_ULTIMATE.start_main_~#t386~0.base_12|, ULTIMATE.start_main_~#t386~0.offset=|v_ULTIMATE.start_main_~#t386~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t386~0.base, ULTIMATE.start_main_~#t386~0.offset] because there is no mapped edge [2019-12-07 18:43:06,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L839-1-->L841: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t387~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t387~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t387~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t387~0.base_13| 4)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t387~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t387~0.base_13|) |v_ULTIMATE.start_main_~#t387~0.offset_11| 2))) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t387~0.base_13| 1) |v_#valid_36|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t387~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t387~0.base=|v_ULTIMATE.start_main_~#t387~0.base_13|, ULTIMATE.start_main_~#t387~0.offset=|v_ULTIMATE.start_main_~#t387~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t387~0.base, ULTIMATE.start_main_~#t387~0.offset] because there is no mapped edge [2019-12-07 18:43:06,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L758: Formula: (and (= ~y~0_In1189180660 ~__unbuffered_p0_EBX~0_Out1189180660) (= ~a$r_buff1_thd3~0_Out1189180660 ~a$r_buff0_thd3~0_In1189180660) (= ~a$r_buff0_thd1~0_In1189180660 ~a$r_buff1_thd1~0_Out1189180660) (= ~a$r_buff1_thd0~0_Out1189180660 ~a$r_buff0_thd0~0_In1189180660) (= ~x~0_Out1189180660 ~__unbuffered_p0_EAX~0_Out1189180660) (= ~x~0_Out1189180660 1) (= ~a$r_buff0_thd1~0_Out1189180660 1) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660 0)) (= ~a$r_buff1_thd2~0_Out1189180660 ~a$r_buff0_thd2~0_In1189180660)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1189180660, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1189180660, ~y~0=~y~0_In1189180660} OutVars{~__unbuffered_p0_EBX~0=~__unbuffered_p0_EBX~0_Out1189180660, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out1189180660, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out1189180660, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out1189180660, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1189180660, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1189180660, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out1189180660, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1189180660, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660, ~y~0=~y~0_In1189180660, ~x~0=~x~0_Out1189180660} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:43:06,815 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-937894682 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-937894682 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-937894682|) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-937894682 |P0Thread1of1ForFork1_#t~ite5_Out-937894682|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-937894682, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-937894682} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-937894682|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-937894682, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-937894682} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:43:06,816 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L760-->L760-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd1~0_In-1585101839 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-1585101839 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1585101839 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1585101839 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1585101839| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1585101839| ~a$w_buff1_used~0_In-1585101839) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1585101839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1585101839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1585101839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1585101839} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1585101839|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1585101839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1585101839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1585101839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1585101839} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:43:06,816 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L778-2-->L778-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In2133123573 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In2133123573 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out2133123573| ~a$w_buff1~0_In2133123573) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out2133123573| ~a~0_In2133123573) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In2133123573, ~a$w_buff1~0=~a$w_buff1~0_In2133123573, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573} OutVars{~a~0=~a~0_In2133123573, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out2133123573|, ~a$w_buff1~0=~a$w_buff1~0_In2133123573, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:43:06,816 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~a~0_28) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{~a~0=v_~a~0_28, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_13|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:43:06,816 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L761-->L762: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-45258574 256))) (.cse0 (= ~a$r_buff0_thd1~0_Out-45258574 ~a$r_buff0_thd1~0_In-45258574)) (.cse2 (= (mod ~a$w_buff0_used~0_In-45258574 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= ~a$r_buff0_thd1~0_Out-45258574 0)) (and .cse0 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-45258574, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-45258574} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-45258574|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-45258574, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-45258574} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:43:06,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L762-->L762-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1928924319 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1928924319 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-1928924319 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1928924319 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1928924319|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1928924319| ~a$r_buff1_thd1~0_In-1928924319) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1928924319, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1928924319, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1928924319, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1928924319} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1928924319|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1928924319, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1928924319, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1928924319, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1928924319} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:43:06,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L762-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork1_#t~ite8_34|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:43:06,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1426044151 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1426044151 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1426044151|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1426044151 |P1Thread1of1ForFork2_#t~ite11_Out1426044151|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1426044151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1426044151} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1426044151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1426044151, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1426044151|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:43:06,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1154043594 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out-1154043594| ~a$w_buff0~0_In-1154043594) (= |P2Thread1of1ForFork0_#t~ite21_Out-1154043594| |P2Thread1of1ForFork0_#t~ite20_Out-1154043594|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1154043594 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-1154043594 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In-1154043594 256) 0)) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1154043594 256)))))) (and (= |P2Thread1of1ForFork0_#t~ite20_In-1154043594| |P2Thread1of1ForFork0_#t~ite20_Out-1154043594|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out-1154043594| ~a$w_buff0~0_In-1154043594)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1154043594, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1154043594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1154043594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1154043594, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1154043594, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1154043594|, ~weak$$choice2~0=~weak$$choice2~0_In-1154043594} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1154043594|, ~a$w_buff0~0=~a$w_buff0~0_In-1154043594, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1154043594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1154043594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1154043594, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1154043594|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1154043594, ~weak$$choice2~0=~weak$$choice2~0_In-1154043594} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:43:06,818 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-6436047 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In-6436047| |P2Thread1of1ForFork0_#t~ite23_Out-6436047|) (not .cse0) (= ~a$w_buff1~0_In-6436047 |P2Thread1of1ForFork0_#t~ite24_Out-6436047|)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite24_Out-6436047| |P2Thread1of1ForFork0_#t~ite23_Out-6436047|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-6436047 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-6436047 256)) .cse1) (and (= 0 (mod ~a$r_buff1_thd3~0_In-6436047 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-6436047 256)))) (= ~a$w_buff1~0_In-6436047 |P2Thread1of1ForFork0_#t~ite23_Out-6436047|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-6436047, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047, ~weak$$choice2~0=~weak$$choice2~0_In-6436047} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-6436047, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-6436047|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047, ~weak$$choice2~0=~weak$$choice2~0_In-6436047} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 18:43:06,818 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L805-->L805-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-451554226 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out-451554226| |P2Thread1of1ForFork0_#t~ite27_Out-451554226|) (= |P2Thread1of1ForFork0_#t~ite26_Out-451554226| ~a$w_buff0_used~0_In-451554226) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-451554226 256) 0))) (or (and (= (mod ~a$w_buff1_used~0_In-451554226 256) 0) .cse0) (= (mod ~a$w_buff0_used~0_In-451554226 256) 0) (and (= (mod ~a$r_buff1_thd3~0_In-451554226 256) 0) .cse0))) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite26_In-451554226| |P2Thread1of1ForFork0_#t~ite26_Out-451554226|) (= |P2Thread1of1ForFork0_#t~ite27_Out-451554226| ~a$w_buff0_used~0_In-451554226) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-451554226|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-451554226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-451554226, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-451554226, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-451554226, ~weak$$choice2~0=~weak$$choice2~0_In-451554226} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-451554226|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-451554226|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-451554226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-451554226, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-451554226, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-451554226, ~weak$$choice2~0=~weak$$choice2~0_In-451554226} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:43:06,819 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_53 v_~a$r_buff0_thd3~0_52) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_53, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_52, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:43:06,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_16 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_16, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:43:06,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L814-2-->L814-4: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In1442892500 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1442892500 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1442892500| ~a~0_In1442892500) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1442892500| ~a$w_buff1~0_In1442892500) (not .cse0)))) InVars {~a~0=~a~0_In1442892500, ~a$w_buff1~0=~a$w_buff1~0_In1442892500, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1442892500, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1442892500} OutVars{~a~0=~a~0_In1442892500, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1442892500|, ~a$w_buff1~0=~a$w_buff1~0_In1442892500, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1442892500, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1442892500} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:43:06,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L814-4-->L815: Formula: (= v_~a~0_36 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_36, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:43:06,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-2092120927 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-2092120927 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-2092120927| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-2092120927| ~a$w_buff0_used~0_In-2092120927)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2092120927, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2092120927} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-2092120927|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2092120927, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2092120927} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:43:06,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1501182449 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1501182449 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1501182449 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In1501182449 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out1501182449| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite41_Out1501182449| ~a$w_buff1_used~0_In1501182449) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1501182449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1501182449, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1501182449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1501182449} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1501182449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1501182449, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1501182449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1501182449, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1501182449|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:43:06,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-262341295 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-262341295 256) 0))) (or (and (= ~a$r_buff0_thd3~0_In-262341295 |P2Thread1of1ForFork0_#t~ite42_Out-262341295|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-262341295|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-262341295, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-262341295} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-262341295, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-262341295, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-262341295|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:43:06,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L818-->L818-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-183389922 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-183389922 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-183389922 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-183389922 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-183389922|)) (and (= ~a$r_buff1_thd3~0_In-183389922 |P2Thread1of1ForFork0_#t~ite43_Out-183389922|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-183389922|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:43:06,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In-854439071 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-854439071 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-854439071 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-854439071 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-854439071|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-854439071 |P1Thread1of1ForFork2_#t~ite12_Out-854439071|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-854439071, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-854439071, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-854439071, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-854439071} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-854439071, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-854439071, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-854439071, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-854439071|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-854439071} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:43:06,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1551876107 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1551876107 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1551876107| 0) (not .cse0) (not .cse1)) (and (= ~a$r_buff0_thd2~0_In1551876107 |P1Thread1of1ForFork2_#t~ite13_Out1551876107|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1551876107, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1551876107} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1551876107, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1551876107, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1551876107|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:43:06,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L782-->L782-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1093184653 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1093184653 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In1093184653 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1093184653 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1093184653|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In1093184653 |P1Thread1of1ForFork2_#t~ite14_Out1093184653|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1093184653, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1093184653, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1093184653, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1093184653} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1093184653, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1093184653, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1093184653, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1093184653, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1093184653|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:43:06,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L818-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_123 |v_P2Thread1of1ForFork0_#t~ite43_32|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_123, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:43:06,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_42| v_~a$r_buff1_thd2~0_99) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_42|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_99, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_41|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:43:06,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_36) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:43:06,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L847-2-->L847-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-635834680 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-635834680 256)))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In-635834680 |ULTIMATE.start_main_#t~ite47_Out-635834680|)) (and (= ~a~0_In-635834680 |ULTIMATE.start_main_#t~ite47_Out-635834680|) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-635834680, ~a$w_buff1~0=~a$w_buff1~0_In-635834680, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-635834680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-635834680} OutVars{~a~0=~a~0_In-635834680, ~a$w_buff1~0=~a$w_buff1~0_In-635834680, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-635834680|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-635834680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-635834680} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:43:06,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-4-->L848: Formula: (= v_~a~0_44 |v_ULTIMATE.start_main_#t~ite47_19|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_19|} OutVars{~a~0=v_~a~0_44, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_18|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:43:06,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1665037191 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1665037191 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1665037191| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-1665037191| ~a$w_buff0_used~0_In-1665037191) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1665037191, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1665037191} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1665037191, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1665037191|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1665037191} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:43:06,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1722430003 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1722430003 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In1722430003 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1722430003 256) 0))) (or (and (= ~a$w_buff1_used~0_In1722430003 |ULTIMATE.start_main_#t~ite50_Out1722430003|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out1722430003| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1722430003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1722430003, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1722430003, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1722430003} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1722430003|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1722430003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1722430003, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1722430003, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1722430003} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:43:06,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1100143245 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1100143245 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1100143245| ~a$r_buff0_thd0~0_In-1100143245)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1100143245| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1100143245|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:43:06,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1904379072 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-1904379072 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1904379072 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1904379072 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1904379072| ~a$r_buff1_thd0~0_In-1904379072) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1904379072| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1904379072, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1904379072, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1904379072, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1904379072} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1904379072|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1904379072, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1904379072, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1904379072, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1904379072} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:43:06,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~a$r_buff1_thd0~0_125 |v_ULTIMATE.start_main_#t~ite52_55|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~main$tmp_guard1~0_29 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_29 0) (= 0 v_~__unbuffered_p1_EAX~0_28) (= 1 v_~__unbuffered_p2_EAX~0_26) (= v_~__unbuffered_p0_EBX~0_85 0) (= 1 v_~__unbuffered_p0_EAX~0_85))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_55|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_125, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:43:06,878 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:43:06 BasicIcfg [2019-12-07 18:43:06,878 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:43:06,878 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:43:06,878 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:43:06,878 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:43:06,879 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:41:11" (3/4) ... [2019-12-07 18:43:06,880 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:43:06,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~weak$$choice0~0_10) (= v_~a$r_buff1_thd0~0_132 0) (= 0 v_~a$w_buff0_used~0_689) (= 0 v_~a$w_buff1_used~0_376) (= v_~a$r_buff0_thd3~0_328 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t385~0.base_29| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t385~0.base_29|) |v_ULTIMATE.start_main_~#t385~0.offset_22| 0)) |v_#memory_int_21|) (= |v_#NULL.offset_6| 0) (= v_~y~0_79 0) (= 0 v_~a$r_buff1_thd1~0_125) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t385~0.base_29|)) (= 0 v_~__unbuffered_p0_EAX~0_92) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~x~0_69 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t385~0.base_29| 4)) (= 0 v_~a$r_buff1_thd2~0_129) (< 0 |v_#StackHeapBarrier_17|) (= v_~__unbuffered_p0_EBX~0_92 0) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t385~0.base_29| 1)) (= v_~a$flush_delayed~0_23 0) (= v_~a$r_buff1_thd3~0_224 0) (= v_~__unbuffered_p2_EBX~0_38 0) (= 0 v_~__unbuffered_cnt~0_98) (= 0 |v_ULTIMATE.start_main_~#t385~0.offset_22|) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~a$r_buff0_thd2~0_124) (= v_~a~0_181 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~a$r_buff0_thd1~0_195) (= v_~a$mem_tmp~0_12 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~a$w_buff1~0_172) (= v_~a$r_buff0_thd0~0_144 0) (= v_~a$w_buff0~0_228 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t385~0.base_29|) (= v_~weak$$choice2~0_107 0) (= v_~z~0_20 0) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_129, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_281|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ~a~0=v_~a~0_181, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_67|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_92, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t386~0.base=|v_ULTIMATE.start_main_~#t386~0.base_29|, ULTIMATE.start_main_~#t387~0.offset=|v_ULTIMATE.start_main_~#t387~0.offset_15|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_92, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_224, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_689, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_195, ULTIMATE.start_main_~#t386~0.offset=|v_ULTIMATE.start_main_~#t386~0.offset_22|, ULTIMATE.start_main_~#t385~0.offset=|v_ULTIMATE.start_main_~#t385~0.offset_22|, ~weak$$choice0~0=v_~weak$$choice0~0_10, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t385~0.base=|v_ULTIMATE.start_main_~#t385~0.base_29|, ~a$w_buff0~0=v_~a$w_buff0~0_228, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_69, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_124, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_12, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_172, ~y~0=v_~y~0_79, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_125, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_328, ULTIMATE.start_main_~#t387~0.base=|v_ULTIMATE.start_main_~#t387~0.base_17|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_376, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t386~0.base, ULTIMATE.start_main_~#t387~0.offset, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t386~0.offset, ULTIMATE.start_main_~#t385~0.offset, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t385~0.base, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ULTIMATE.start_main_~#t387~0.base, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:43:06,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L837-1-->L839: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t386~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t386~0.offset_10|) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t386~0.base_12| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t386~0.base_12| 4)) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t386~0.base_12|)) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t386~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t386~0.base_12|) |v_ULTIMATE.start_main_~#t386~0.offset_10| 1))) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t386~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t386~0.base=|v_ULTIMATE.start_main_~#t386~0.base_12|, ULTIMATE.start_main_~#t386~0.offset=|v_ULTIMATE.start_main_~#t386~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t386~0.base, ULTIMATE.start_main_~#t386~0.offset] because there is no mapped edge [2019-12-07 18:43:06,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L839-1-->L841: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t387~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t387~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t387~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t387~0.base_13| 4)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t387~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t387~0.base_13|) |v_ULTIMATE.start_main_~#t387~0.offset_11| 2))) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t387~0.base_13| 1) |v_#valid_36|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t387~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t387~0.base=|v_ULTIMATE.start_main_~#t387~0.base_13|, ULTIMATE.start_main_~#t387~0.offset=|v_ULTIMATE.start_main_~#t387~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t387~0.base, ULTIMATE.start_main_~#t387~0.offset] because there is no mapped edge [2019-12-07 18:43:06,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L758: Formula: (and (= ~y~0_In1189180660 ~__unbuffered_p0_EBX~0_Out1189180660) (= ~a$r_buff1_thd3~0_Out1189180660 ~a$r_buff0_thd3~0_In1189180660) (= ~a$r_buff0_thd1~0_In1189180660 ~a$r_buff1_thd1~0_Out1189180660) (= ~a$r_buff1_thd0~0_Out1189180660 ~a$r_buff0_thd0~0_In1189180660) (= ~x~0_Out1189180660 ~__unbuffered_p0_EAX~0_Out1189180660) (= ~x~0_Out1189180660 1) (= ~a$r_buff0_thd1~0_Out1189180660 1) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660 0)) (= ~a$r_buff1_thd2~0_Out1189180660 ~a$r_buff0_thd2~0_In1189180660)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1189180660, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1189180660, ~y~0=~y~0_In1189180660} OutVars{~__unbuffered_p0_EBX~0=~__unbuffered_p0_EBX~0_Out1189180660, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out1189180660, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out1189180660, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out1189180660, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1189180660, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1189180660, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out1189180660, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1189180660, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660, ~y~0=~y~0_In1189180660, ~x~0=~x~0_Out1189180660} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 18:43:06,884 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-937894682 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-937894682 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-937894682|) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-937894682 |P0Thread1of1ForFork1_#t~ite5_Out-937894682|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-937894682, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-937894682} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-937894682|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-937894682, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-937894682} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:43:06,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L760-->L760-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd1~0_In-1585101839 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-1585101839 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1585101839 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1585101839 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1585101839| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1585101839| ~a$w_buff1_used~0_In-1585101839) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1585101839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1585101839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1585101839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1585101839} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1585101839|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1585101839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1585101839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1585101839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1585101839} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:43:06,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L778-2-->L778-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In2133123573 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In2133123573 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out2133123573| ~a$w_buff1~0_In2133123573) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out2133123573| ~a~0_In2133123573) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In2133123573, ~a$w_buff1~0=~a$w_buff1~0_In2133123573, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573} OutVars{~a~0=~a~0_In2133123573, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out2133123573|, ~a$w_buff1~0=~a$w_buff1~0_In2133123573, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:43:06,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~a~0_28) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{~a~0=v_~a~0_28, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_13|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:43:06,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L761-->L762: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-45258574 256))) (.cse0 (= ~a$r_buff0_thd1~0_Out-45258574 ~a$r_buff0_thd1~0_In-45258574)) (.cse2 (= (mod ~a$w_buff0_used~0_In-45258574 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= ~a$r_buff0_thd1~0_Out-45258574 0)) (and .cse0 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-45258574, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-45258574} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-45258574|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-45258574, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-45258574} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:43:06,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L762-->L762-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1928924319 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1928924319 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-1928924319 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1928924319 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1928924319|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1928924319| ~a$r_buff1_thd1~0_In-1928924319) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1928924319, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1928924319, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1928924319, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1928924319} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1928924319|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1928924319, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1928924319, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1928924319, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1928924319} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:43:06,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L762-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork1_#t~ite8_34|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:43:06,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1426044151 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1426044151 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1426044151|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1426044151 |P1Thread1of1ForFork2_#t~ite11_Out1426044151|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1426044151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1426044151} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1426044151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1426044151, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1426044151|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:43:06,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1154043594 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out-1154043594| ~a$w_buff0~0_In-1154043594) (= |P2Thread1of1ForFork0_#t~ite21_Out-1154043594| |P2Thread1of1ForFork0_#t~ite20_Out-1154043594|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1154043594 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-1154043594 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In-1154043594 256) 0)) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1154043594 256)))))) (and (= |P2Thread1of1ForFork0_#t~ite20_In-1154043594| |P2Thread1of1ForFork0_#t~ite20_Out-1154043594|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out-1154043594| ~a$w_buff0~0_In-1154043594)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1154043594, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1154043594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1154043594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1154043594, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1154043594, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1154043594|, ~weak$$choice2~0=~weak$$choice2~0_In-1154043594} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1154043594|, ~a$w_buff0~0=~a$w_buff0~0_In-1154043594, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1154043594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1154043594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1154043594, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1154043594|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1154043594, ~weak$$choice2~0=~weak$$choice2~0_In-1154043594} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:43:06,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-6436047 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In-6436047| |P2Thread1of1ForFork0_#t~ite23_Out-6436047|) (not .cse0) (= ~a$w_buff1~0_In-6436047 |P2Thread1of1ForFork0_#t~ite24_Out-6436047|)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite24_Out-6436047| |P2Thread1of1ForFork0_#t~ite23_Out-6436047|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-6436047 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-6436047 256)) .cse1) (and (= 0 (mod ~a$r_buff1_thd3~0_In-6436047 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-6436047 256)))) (= ~a$w_buff1~0_In-6436047 |P2Thread1of1ForFork0_#t~ite23_Out-6436047|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-6436047, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047, ~weak$$choice2~0=~weak$$choice2~0_In-6436047} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-6436047, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-6436047|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047, ~weak$$choice2~0=~weak$$choice2~0_In-6436047} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 18:43:06,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L805-->L805-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-451554226 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out-451554226| |P2Thread1of1ForFork0_#t~ite27_Out-451554226|) (= |P2Thread1of1ForFork0_#t~ite26_Out-451554226| ~a$w_buff0_used~0_In-451554226) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-451554226 256) 0))) (or (and (= (mod ~a$w_buff1_used~0_In-451554226 256) 0) .cse0) (= (mod ~a$w_buff0_used~0_In-451554226 256) 0) (and (= (mod ~a$r_buff1_thd3~0_In-451554226 256) 0) .cse0))) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite26_In-451554226| |P2Thread1of1ForFork0_#t~ite26_Out-451554226|) (= |P2Thread1of1ForFork0_#t~ite27_Out-451554226| ~a$w_buff0_used~0_In-451554226) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-451554226|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-451554226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-451554226, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-451554226, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-451554226, ~weak$$choice2~0=~weak$$choice2~0_In-451554226} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-451554226|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-451554226|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-451554226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-451554226, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-451554226, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-451554226, ~weak$$choice2~0=~weak$$choice2~0_In-451554226} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:43:06,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_53 v_~a$r_buff0_thd3~0_52) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_53, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_52, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:43:06,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_16 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_16, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:43:06,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L814-2-->L814-4: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In1442892500 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1442892500 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1442892500| ~a~0_In1442892500) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1442892500| ~a$w_buff1~0_In1442892500) (not .cse0)))) InVars {~a~0=~a~0_In1442892500, ~a$w_buff1~0=~a$w_buff1~0_In1442892500, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1442892500, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1442892500} OutVars{~a~0=~a~0_In1442892500, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1442892500|, ~a$w_buff1~0=~a$w_buff1~0_In1442892500, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1442892500, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1442892500} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:43:06,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L814-4-->L815: Formula: (= v_~a~0_36 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_36, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:43:06,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-2092120927 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-2092120927 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-2092120927| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-2092120927| ~a$w_buff0_used~0_In-2092120927)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2092120927, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2092120927} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-2092120927|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2092120927, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2092120927} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:43:06,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1501182449 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1501182449 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1501182449 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In1501182449 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out1501182449| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite41_Out1501182449| ~a$w_buff1_used~0_In1501182449) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1501182449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1501182449, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1501182449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1501182449} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1501182449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1501182449, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1501182449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1501182449, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1501182449|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:43:06,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-262341295 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-262341295 256) 0))) (or (and (= ~a$r_buff0_thd3~0_In-262341295 |P2Thread1of1ForFork0_#t~ite42_Out-262341295|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-262341295|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-262341295, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-262341295} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-262341295, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-262341295, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-262341295|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:43:06,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L818-->L818-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-183389922 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-183389922 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-183389922 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-183389922 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-183389922|)) (and (= ~a$r_buff1_thd3~0_In-183389922 |P2Thread1of1ForFork0_#t~ite43_Out-183389922|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-183389922|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:43:06,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In-854439071 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-854439071 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-854439071 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-854439071 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-854439071|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-854439071 |P1Thread1of1ForFork2_#t~ite12_Out-854439071|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-854439071, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-854439071, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-854439071, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-854439071} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-854439071, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-854439071, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-854439071, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-854439071|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-854439071} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:43:06,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1551876107 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1551876107 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1551876107| 0) (not .cse0) (not .cse1)) (and (= ~a$r_buff0_thd2~0_In1551876107 |P1Thread1of1ForFork2_#t~ite13_Out1551876107|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1551876107, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1551876107} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1551876107, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1551876107, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1551876107|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:43:06,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L782-->L782-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1093184653 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1093184653 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In1093184653 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1093184653 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1093184653|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In1093184653 |P1Thread1of1ForFork2_#t~ite14_Out1093184653|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1093184653, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1093184653, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1093184653, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1093184653} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1093184653, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1093184653, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1093184653, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1093184653, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1093184653|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:43:06,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L818-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_123 |v_P2Thread1of1ForFork0_#t~ite43_32|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_123, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:43:06,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_42| v_~a$r_buff1_thd2~0_99) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_42|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_99, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_41|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:43:06,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_36) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:43:06,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L847-2-->L847-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-635834680 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-635834680 256)))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In-635834680 |ULTIMATE.start_main_#t~ite47_Out-635834680|)) (and (= ~a~0_In-635834680 |ULTIMATE.start_main_#t~ite47_Out-635834680|) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-635834680, ~a$w_buff1~0=~a$w_buff1~0_In-635834680, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-635834680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-635834680} OutVars{~a~0=~a~0_In-635834680, ~a$w_buff1~0=~a$w_buff1~0_In-635834680, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-635834680|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-635834680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-635834680} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:43:06,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-4-->L848: Formula: (= v_~a~0_44 |v_ULTIMATE.start_main_#t~ite47_19|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_19|} OutVars{~a~0=v_~a~0_44, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_18|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:43:06,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1665037191 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1665037191 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1665037191| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-1665037191| ~a$w_buff0_used~0_In-1665037191) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1665037191, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1665037191} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1665037191, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1665037191|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1665037191} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:43:06,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1722430003 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1722430003 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In1722430003 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1722430003 256) 0))) (or (and (= ~a$w_buff1_used~0_In1722430003 |ULTIMATE.start_main_#t~ite50_Out1722430003|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out1722430003| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1722430003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1722430003, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1722430003, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1722430003} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1722430003|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1722430003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1722430003, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1722430003, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1722430003} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:43:06,893 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1100143245 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1100143245 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1100143245| ~a$r_buff0_thd0~0_In-1100143245)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1100143245| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1100143245|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:43:06,894 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1904379072 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-1904379072 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1904379072 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1904379072 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1904379072| ~a$r_buff1_thd0~0_In-1904379072) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1904379072| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1904379072, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1904379072, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1904379072, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1904379072} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1904379072|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1904379072, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1904379072, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1904379072, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1904379072} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:43:06,894 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~a$r_buff1_thd0~0_125 |v_ULTIMATE.start_main_#t~ite52_55|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~main$tmp_guard1~0_29 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_29 0) (= 0 v_~__unbuffered_p1_EAX~0_28) (= 1 v_~__unbuffered_p2_EAX~0_26) (= v_~__unbuffered_p0_EBX~0_85 0) (= 1 v_~__unbuffered_p0_EAX~0_85))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_55|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_125, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:43:06,943 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_abff9466-db69-41c2-b369-8c9908e2e8c6/bin/uautomizer/witness.graphml [2019-12-07 18:43:06,943 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:43:06,944 INFO L168 Benchmark]: Toolchain (without parser) took 115849.32 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 937.2 MB in the beginning and 4.0 GB in the end (delta: -3.1 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-12-07 18:43:06,944 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:43:06,944 INFO L168 Benchmark]: CACSL2BoogieTranslator took 403.36 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -119.5 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:43:06,944 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.65 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:43:06,945 INFO L168 Benchmark]: Boogie Preprocessor took 26.18 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:43:06,945 INFO L168 Benchmark]: RCFGBuilder took 429.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 995.1 MB in the end (delta: 61.6 MB). Peak memory consumption was 61.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:43:06,945 INFO L168 Benchmark]: TraceAbstraction took 114882.45 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 995.1 MB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:43:06,946 INFO L168 Benchmark]: Witness Printer took 64.60 ms. Allocated memory is still 7.3 GB. Free memory was 4.0 GB in the beginning and 4.0 GB in the end (delta: 11.8 MB). Peak memory consumption was 11.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:43:06,947 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 403.36 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -119.5 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.65 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.18 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 429.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 995.1 MB in the end (delta: 61.6 MB). Peak memory consumption was 61.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 114882.45 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 995.1 MB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 64.60 ms. Allocated memory is still 7.3 GB. Free memory was 4.0 GB in the beginning and 4.0 GB in the end (delta: 11.8 MB). Peak memory consumption was 11.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 179 ProgramPointsBefore, 94 ProgramPointsAfterwards, 216 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 33 ChoiceCompositions, 7151 VarBasedMoverChecksPositive, 221 VarBasedMoverChecksNegative, 29 SemBasedMoverChecksPositive, 258 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 80759 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t385, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t386, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L841] FCALL, FORK 0 pthread_create(&t387, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 a$w_buff1 = a$w_buff0 [L738] 1 a$w_buff0 = 1 [L739] 1 a$w_buff1_used = a$w_buff0_used [L740] 1 a$w_buff0_used = (_Bool)1 [L758] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L772] 2 y = 1 [L775] 2 __unbuffered_p1_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=7, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=7, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=1, y=1, z=1] [L758] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L759] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L760] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=7, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=7, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=7, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=1, y=1, z=1] [L814] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=1, y=1, z=1] [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 114.7s, OverallIterations: 38, TraceHistogramMax: 1, AutomataDifference: 30.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8052 SDtfs, 11188 SDslu, 27248 SDs, 0 SdLazy, 20394 SolverSat, 585 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 515 GetRequests, 63 SyntacticMatches, 27 SemanticMatches, 425 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1951 ImplicationChecksByTransitivity, 4.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=196221occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 62.3s AutomataMinimizationTime, 37 MinimizatonAttempts, 336738 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 1692 NumberOfCodeBlocks, 1692 NumberOfCodeBlocksAsserted, 38 NumberOfCheckSat, 1588 ConstructedInterpolants, 0 QuantifiedInterpolants, 530593 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 37 InterpolantComputations, 37 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...