./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix015_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix015_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2fea58fdbf9706d848fbc36539872fbde4e50f84 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:04:02,040 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:04:02,041 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:04:02,049 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:04:02,049 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:04:02,050 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:04:02,051 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:04:02,053 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:04:02,055 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:04:02,055 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:04:02,056 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:04:02,057 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:04:02,058 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:04:02,058 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:04:02,059 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:04:02,060 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:04:02,060 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:04:02,061 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:04:02,062 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:04:02,064 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:04:02,065 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:04:02,066 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:04:02,066 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:04:02,067 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:04:02,068 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:04:02,068 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:04:02,069 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:04:02,069 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:04:02,069 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:04:02,070 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:04:02,070 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:04:02,070 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:04:02,071 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:04:02,072 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:04:02,072 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:04:02,073 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:04:02,073 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:04:02,073 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:04:02,073 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:04:02,074 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:04:02,075 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:04:02,075 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:04:02,087 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:04:02,087 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:04:02,088 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:04:02,088 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:04:02,088 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:04:02,089 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:04:02,089 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:04:02,089 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:04:02,089 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:04:02,089 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:04:02,090 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:04:02,090 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:04:02,090 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:04:02,090 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:04:02,091 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:04:02,091 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:04:02,091 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:04:02,091 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:04:02,091 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:04:02,092 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:04:02,092 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:04:02,092 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:04:02,092 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:04:02,092 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:04:02,093 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:04:02,093 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:04:02,093 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:04:02,093 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:04:02,093 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:04:02,093 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2fea58fdbf9706d848fbc36539872fbde4e50f84 [2019-12-07 12:04:02,199 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:04:02,208 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:04:02,211 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:04:02,212 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:04:02,213 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:04:02,213 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix015_pso.oepc.i [2019-12-07 12:04:02,251 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/data/06d3f8191/b72d76fb710146b8b0f7ec61f942559c/FLAG9c5d4fbbb [2019-12-07 12:04:02,731 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:04:02,731 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/sv-benchmarks/c/pthread-wmm/mix015_pso.oepc.i [2019-12-07 12:04:02,741 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/data/06d3f8191/b72d76fb710146b8b0f7ec61f942559c/FLAG9c5d4fbbb [2019-12-07 12:04:02,750 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/data/06d3f8191/b72d76fb710146b8b0f7ec61f942559c [2019-12-07 12:04:02,752 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:04:02,753 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:04:02,753 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:04:02,753 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:04:02,756 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:04:02,756 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:04:02" (1/1) ... [2019-12-07 12:04:02,758 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:02, skipping insertion in model container [2019-12-07 12:04:02,758 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:04:02" (1/1) ... [2019-12-07 12:04:02,763 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:04:02,790 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:04:03,045 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:04:03,053 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:04:03,097 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:04:03,146 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:04:03,147 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03 WrapperNode [2019-12-07 12:04:03,147 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:04:03,147 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:04:03,147 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:04:03,148 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:04:03,153 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,166 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,185 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:04:03,185 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:04:03,185 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:04:03,185 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:04:03,191 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,192 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,195 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,195 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,202 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,205 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,208 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... [2019-12-07 12:04:03,211 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:04:03,211 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:04:03,212 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:04:03,212 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:04:03,212 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:04:03,260 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:04:03,260 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:04:03,260 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:04:03,261 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:04:03,261 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:04:03,261 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:04:03,261 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:04:03,261 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:04:03,261 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:04:03,261 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:04:03,261 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:04:03,262 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:04:03,262 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:04:03,263 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:04:03,637 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:04:03,637 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:04:03,638 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:04:03 BoogieIcfgContainer [2019-12-07 12:04:03,638 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:04:03,639 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:04:03,639 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:04:03,641 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:04:03,641 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:04:02" (1/3) ... [2019-12-07 12:04:03,642 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8f0f478 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:04:03, skipping insertion in model container [2019-12-07 12:04:03,642 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:04:03" (2/3) ... [2019-12-07 12:04:03,642 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8f0f478 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:04:03, skipping insertion in model container [2019-12-07 12:04:03,642 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:04:03" (3/3) ... [2019-12-07 12:04:03,643 INFO L109 eAbstractionObserver]: Analyzing ICFG mix015_pso.oepc.i [2019-12-07 12:04:03,650 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:04:03,650 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:04:03,655 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:04:03,656 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:04:03,682 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,682 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,682 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,682 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,683 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,683 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,683 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,683 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,683 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,683 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,683 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,684 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,685 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,686 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,686 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,686 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,686 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,686 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,687 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,687 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,693 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,694 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,695 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,696 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:04:03,715 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:04:03,728 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:04:03,728 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:04:03,728 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:04:03,728 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:04:03,728 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:04:03,728 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:04:03,728 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:04:03,728 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:04:03,740 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 12:04:03,742 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 12:04:03,798 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 12:04:03,798 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:04:03,809 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 685 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:04:03,825 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 12:04:03,856 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 12:04:03,856 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:04:03,861 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 685 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:04:03,876 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 12:04:03,877 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:04:06,714 WARN L192 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 12:04:07,000 WARN L192 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 12:04:07,028 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80759 [2019-12-07 12:04:07,028 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 12:04:07,030 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 102 transitions [2019-12-07 12:04:22,181 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118022 states. [2019-12-07 12:04:22,183 INFO L276 IsEmpty]: Start isEmpty. Operand 118022 states. [2019-12-07 12:04:22,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 12:04:22,186 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:04:22,187 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 12:04:22,187 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:04:22,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:04:22,191 INFO L82 PathProgramCache]: Analyzing trace with hash 922782, now seen corresponding path program 1 times [2019-12-07 12:04:22,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:04:22,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187369712] [2019-12-07 12:04:22,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:04:22,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:04:22,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:04:22,333 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187369712] [2019-12-07 12:04:22,334 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:04:22,334 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:04:22,334 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665529973] [2019-12-07 12:04:22,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:04:22,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:04:22,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:04:22,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:04:22,348 INFO L87 Difference]: Start difference. First operand 118022 states. Second operand 3 states. [2019-12-07 12:04:23,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:04:23,060 INFO L93 Difference]: Finished difference Result 116858 states and 495582 transitions. [2019-12-07 12:04:23,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:04:23,062 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 12:04:23,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:04:23,516 INFO L225 Difference]: With dead ends: 116858 [2019-12-07 12:04:23,516 INFO L226 Difference]: Without dead ends: 110138 [2019-12-07 12:04:23,517 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:04:28,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110138 states. [2019-12-07 12:04:30,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110138 to 110138. [2019-12-07 12:04:30,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110138 states. [2019-12-07 12:04:31,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110138 states to 110138 states and 466462 transitions. [2019-12-07 12:04:31,327 INFO L78 Accepts]: Start accepts. Automaton has 110138 states and 466462 transitions. Word has length 3 [2019-12-07 12:04:31,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:04:31,327 INFO L462 AbstractCegarLoop]: Abstraction has 110138 states and 466462 transitions. [2019-12-07 12:04:31,327 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:04:31,327 INFO L276 IsEmpty]: Start isEmpty. Operand 110138 states and 466462 transitions. [2019-12-07 12:04:31,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:04:31,330 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:04:31,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:04:31,330 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:04:31,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:04:31,330 INFO L82 PathProgramCache]: Analyzing trace with hash 228105342, now seen corresponding path program 1 times [2019-12-07 12:04:31,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:04:31,330 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957350936] [2019-12-07 12:04:31,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:04:31,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:04:31,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:04:31,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1957350936] [2019-12-07 12:04:31,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:04:31,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:04:31,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808743227] [2019-12-07 12:04:31,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:04:31,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:04:31,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:04:31,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:04:31,395 INFO L87 Difference]: Start difference. First operand 110138 states and 466462 transitions. Second operand 4 states. [2019-12-07 12:04:32,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:04:32,559 INFO L93 Difference]: Finished difference Result 170904 states and 695583 transitions. [2019-12-07 12:04:32,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:04:32,560 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:04:32,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:04:33,006 INFO L225 Difference]: With dead ends: 170904 [2019-12-07 12:04:33,006 INFO L226 Difference]: Without dead ends: 170855 [2019-12-07 12:04:33,007 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:04:38,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170855 states. [2019-12-07 12:04:42,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170855 to 156295. [2019-12-07 12:04:42,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156295 states. [2019-12-07 12:04:42,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156295 states to 156295 states and 644009 transitions. [2019-12-07 12:04:42,911 INFO L78 Accepts]: Start accepts. Automaton has 156295 states and 644009 transitions. Word has length 11 [2019-12-07 12:04:42,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:04:42,911 INFO L462 AbstractCegarLoop]: Abstraction has 156295 states and 644009 transitions. [2019-12-07 12:04:42,911 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:04:42,911 INFO L276 IsEmpty]: Start isEmpty. Operand 156295 states and 644009 transitions. [2019-12-07 12:04:42,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:04:42,916 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:04:42,916 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:04:42,916 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:04:42,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:04:42,916 INFO L82 PathProgramCache]: Analyzing trace with hash 891607686, now seen corresponding path program 1 times [2019-12-07 12:04:42,917 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:04:42,917 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242270812] [2019-12-07 12:04:42,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:04:42,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:04:42,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:04:42,971 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242270812] [2019-12-07 12:04:42,971 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:04:42,971 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:04:42,972 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879092305] [2019-12-07 12:04:42,972 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:04:42,972 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:04:42,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:04:42,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:04:42,972 INFO L87 Difference]: Start difference. First operand 156295 states and 644009 transitions. Second operand 4 states. [2019-12-07 12:04:44,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:04:44,059 INFO L93 Difference]: Finished difference Result 220310 states and 887732 transitions. [2019-12-07 12:04:44,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:04:44,060 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:04:44,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:04:44,619 INFO L225 Difference]: With dead ends: 220310 [2019-12-07 12:04:44,619 INFO L226 Difference]: Without dead ends: 220254 [2019-12-07 12:04:44,619 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:04:51,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220254 states. [2019-12-07 12:04:55,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220254 to 186375. [2019-12-07 12:04:55,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186375 states. [2019-12-07 12:04:56,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186375 states to 186375 states and 763816 transitions. [2019-12-07 12:04:56,677 INFO L78 Accepts]: Start accepts. Automaton has 186375 states and 763816 transitions. Word has length 13 [2019-12-07 12:04:56,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:04:56,678 INFO L462 AbstractCegarLoop]: Abstraction has 186375 states and 763816 transitions. [2019-12-07 12:04:56,678 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:04:56,678 INFO L276 IsEmpty]: Start isEmpty. Operand 186375 states and 763816 transitions. [2019-12-07 12:04:56,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:04:56,686 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:04:56,686 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:04:56,686 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:04:56,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:04:56,686 INFO L82 PathProgramCache]: Analyzing trace with hash -1993825600, now seen corresponding path program 1 times [2019-12-07 12:04:56,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:04:56,687 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340035666] [2019-12-07 12:04:56,687 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:04:56,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:04:56,749 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:04:56,749 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340035666] [2019-12-07 12:04:56,749 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:04:56,749 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:04:56,749 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870766742] [2019-12-07 12:04:56,750 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:04:56,750 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:04:56,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:04:56,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:04:56,750 INFO L87 Difference]: Start difference. First operand 186375 states and 763816 transitions. Second operand 4 states. [2019-12-07 12:04:57,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:04:57,835 INFO L93 Difference]: Finished difference Result 228896 states and 935239 transitions. [2019-12-07 12:04:57,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:04:57,836 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:04:57,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:04:58,450 INFO L225 Difference]: With dead ends: 228896 [2019-12-07 12:04:58,450 INFO L226 Difference]: Without dead ends: 228896 [2019-12-07 12:04:58,450 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:05,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228896 states. [2019-12-07 12:05:07,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228896 to 196221. [2019-12-07 12:05:07,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196221 states. [2019-12-07 12:05:11,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196221 states to 196221 states and 805432 transitions. [2019-12-07 12:05:11,851 INFO L78 Accepts]: Start accepts. Automaton has 196221 states and 805432 transitions. Word has length 16 [2019-12-07 12:05:11,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:11,851 INFO L462 AbstractCegarLoop]: Abstraction has 196221 states and 805432 transitions. [2019-12-07 12:05:11,851 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:05:11,852 INFO L276 IsEmpty]: Start isEmpty. Operand 196221 states and 805432 transitions. [2019-12-07 12:05:11,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:05:11,863 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:11,863 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:11,863 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:11,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:11,864 INFO L82 PathProgramCache]: Analyzing trace with hash 247907846, now seen corresponding path program 1 times [2019-12-07 12:05:11,864 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:11,864 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256315893] [2019-12-07 12:05:11,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:11,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:11,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:11,919 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256315893] [2019-12-07 12:05:11,919 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:11,919 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:05:11,919 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916607619] [2019-12-07 12:05:11,919 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:05:11,920 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:11,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:05:11,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:11,920 INFO L87 Difference]: Start difference. First operand 196221 states and 805432 transitions. Second operand 3 states. [2019-12-07 12:05:12,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:12,676 INFO L93 Difference]: Finished difference Result 184863 states and 750224 transitions. [2019-12-07 12:05:12,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:05:12,677 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:05:12,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:13,129 INFO L225 Difference]: With dead ends: 184863 [2019-12-07 12:05:13,129 INFO L226 Difference]: Without dead ends: 184863 [2019-12-07 12:05:13,129 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:18,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184863 states. [2019-12-07 12:05:20,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184863 to 181931. [2019-12-07 12:05:20,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181931 states. [2019-12-07 12:05:21,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181931 states to 181931 states and 739380 transitions. [2019-12-07 12:05:21,282 INFO L78 Accepts]: Start accepts. Automaton has 181931 states and 739380 transitions. Word has length 18 [2019-12-07 12:05:21,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:21,282 INFO L462 AbstractCegarLoop]: Abstraction has 181931 states and 739380 transitions. [2019-12-07 12:05:21,282 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:05:21,282 INFO L276 IsEmpty]: Start isEmpty. Operand 181931 states and 739380 transitions. [2019-12-07 12:05:21,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:05:21,292 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:21,292 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:21,292 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:21,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:21,292 INFO L82 PathProgramCache]: Analyzing trace with hash 436764514, now seen corresponding path program 1 times [2019-12-07 12:05:21,292 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:21,292 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991655374] [2019-12-07 12:05:21,292 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:21,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:21,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:21,323 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991655374] [2019-12-07 12:05:21,323 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:21,323 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:05:21,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2082481736] [2019-12-07 12:05:21,324 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:05:21,324 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:21,324 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:05:21,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:21,324 INFO L87 Difference]: Start difference. First operand 181931 states and 739380 transitions. Second operand 3 states. [2019-12-07 12:05:21,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:21,426 INFO L93 Difference]: Finished difference Result 34343 states and 110090 transitions. [2019-12-07 12:05:21,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:05:21,426 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:05:21,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:21,472 INFO L225 Difference]: With dead ends: 34343 [2019-12-07 12:05:21,472 INFO L226 Difference]: Without dead ends: 34343 [2019-12-07 12:05:21,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:22,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34343 states. [2019-12-07 12:05:22,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34343 to 34343. [2019-12-07 12:05:22,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34343 states. [2019-12-07 12:05:22,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34343 states to 34343 states and 110090 transitions. [2019-12-07 12:05:22,342 INFO L78 Accepts]: Start accepts. Automaton has 34343 states and 110090 transitions. Word has length 18 [2019-12-07 12:05:22,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:22,342 INFO L462 AbstractCegarLoop]: Abstraction has 34343 states and 110090 transitions. [2019-12-07 12:05:22,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:05:22,342 INFO L276 IsEmpty]: Start isEmpty. Operand 34343 states and 110090 transitions. [2019-12-07 12:05:22,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:05:22,346 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:22,347 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:22,347 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:22,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:22,347 INFO L82 PathProgramCache]: Analyzing trace with hash 674854723, now seen corresponding path program 1 times [2019-12-07 12:05:22,347 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:22,347 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502451984] [2019-12-07 12:05:22,347 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:22,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:22,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:22,386 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502451984] [2019-12-07 12:05:22,386 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:22,386 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:22,386 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1046434741] [2019-12-07 12:05:22,387 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:05:22,387 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:22,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:05:22,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:22,387 INFO L87 Difference]: Start difference. First operand 34343 states and 110090 transitions. Second operand 5 states. [2019-12-07 12:05:22,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:22,752 INFO L93 Difference]: Finished difference Result 44978 states and 141898 transitions. [2019-12-07 12:05:22,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:05:22,753 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:05:22,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:22,812 INFO L225 Difference]: With dead ends: 44978 [2019-12-07 12:05:22,812 INFO L226 Difference]: Without dead ends: 44971 [2019-12-07 12:05:22,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:05:23,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44971 states. [2019-12-07 12:05:23,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44971 to 34083. [2019-12-07 12:05:23,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34083 states. [2019-12-07 12:05:23,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34083 states to 34083 states and 109118 transitions. [2019-12-07 12:05:23,461 INFO L78 Accepts]: Start accepts. Automaton has 34083 states and 109118 transitions. Word has length 22 [2019-12-07 12:05:23,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:23,461 INFO L462 AbstractCegarLoop]: Abstraction has 34083 states and 109118 transitions. [2019-12-07 12:05:23,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:05:23,462 INFO L276 IsEmpty]: Start isEmpty. Operand 34083 states and 109118 transitions. [2019-12-07 12:05:23,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:05:23,469 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:23,469 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:23,469 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:23,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:23,469 INFO L82 PathProgramCache]: Analyzing trace with hash 332765886, now seen corresponding path program 1 times [2019-12-07 12:05:23,469 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:23,469 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050070597] [2019-12-07 12:05:23,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:23,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:23,507 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:23,508 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050070597] [2019-12-07 12:05:23,508 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:23,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:23,508 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270682735] [2019-12-07 12:05:23,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:05:23,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:23,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:05:23,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:23,509 INFO L87 Difference]: Start difference. First operand 34083 states and 109118 transitions. Second operand 5 states. [2019-12-07 12:05:23,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:23,894 INFO L93 Difference]: Finished difference Result 48327 states and 151757 transitions. [2019-12-07 12:05:23,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:05:23,895 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:05:23,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:23,959 INFO L225 Difference]: With dead ends: 48327 [2019-12-07 12:05:23,959 INFO L226 Difference]: Without dead ends: 48314 [2019-12-07 12:05:23,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:05:24,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48314 states. [2019-12-07 12:05:24,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48314 to 39994. [2019-12-07 12:05:24,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39994 states. [2019-12-07 12:05:24,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39994 states to 39994 states and 127549 transitions. [2019-12-07 12:05:24,682 INFO L78 Accepts]: Start accepts. Automaton has 39994 states and 127549 transitions. Word has length 25 [2019-12-07 12:05:24,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:24,682 INFO L462 AbstractCegarLoop]: Abstraction has 39994 states and 127549 transitions. [2019-12-07 12:05:24,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:05:24,682 INFO L276 IsEmpty]: Start isEmpty. Operand 39994 states and 127549 transitions. [2019-12-07 12:05:24,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:05:24,693 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:24,693 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:24,693 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:24,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:24,860 INFO L82 PathProgramCache]: Analyzing trace with hash 445555351, now seen corresponding path program 1 times [2019-12-07 12:05:24,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:24,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859336296] [2019-12-07 12:05:24,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:24,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:24,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:24,885 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859336296] [2019-12-07 12:05:24,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:24,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:24,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1868774970] [2019-12-07 12:05:24,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:05:24,886 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:24,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:05:24,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:24,886 INFO L87 Difference]: Start difference. First operand 39994 states and 127549 transitions. Second operand 3 states. [2019-12-07 12:05:25,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:25,062 INFO L93 Difference]: Finished difference Result 61770 states and 196231 transitions. [2019-12-07 12:05:25,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:05:25,063 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:05:25,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:25,152 INFO L225 Difference]: With dead ends: 61770 [2019-12-07 12:05:25,152 INFO L226 Difference]: Without dead ends: 61770 [2019-12-07 12:05:25,152 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:25,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61770 states. [2019-12-07 12:05:25,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61770 to 48028. [2019-12-07 12:05:25,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48028 states. [2019-12-07 12:05:26,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48028 states to 48028 states and 153444 transitions. [2019-12-07 12:05:26,022 INFO L78 Accepts]: Start accepts. Automaton has 48028 states and 153444 transitions. Word has length 27 [2019-12-07 12:05:26,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:26,022 INFO L462 AbstractCegarLoop]: Abstraction has 48028 states and 153444 transitions. [2019-12-07 12:05:26,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:05:26,022 INFO L276 IsEmpty]: Start isEmpty. Operand 48028 states and 153444 transitions. [2019-12-07 12:05:26,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:05:26,035 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:26,035 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:26,035 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:26,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:26,035 INFO L82 PathProgramCache]: Analyzing trace with hash 1217095067, now seen corresponding path program 1 times [2019-12-07 12:05:26,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:26,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573403626] [2019-12-07 12:05:26,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:26,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:26,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:26,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573403626] [2019-12-07 12:05:26,056 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:26,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:26,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1874678735] [2019-12-07 12:05:26,056 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:05:26,056 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:26,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:05:26,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:26,057 INFO L87 Difference]: Start difference. First operand 48028 states and 153444 transitions. Second operand 3 states. [2019-12-07 12:05:26,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:26,213 INFO L93 Difference]: Finished difference Result 61770 states and 193163 transitions. [2019-12-07 12:05:26,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:05:26,214 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:05:26,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:26,300 INFO L225 Difference]: With dead ends: 61770 [2019-12-07 12:05:26,300 INFO L226 Difference]: Without dead ends: 61770 [2019-12-07 12:05:26,300 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:26,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61770 states. [2019-12-07 12:05:27,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61770 to 48028. [2019-12-07 12:05:27,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48028 states. [2019-12-07 12:05:27,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48028 states to 48028 states and 150376 transitions. [2019-12-07 12:05:27,165 INFO L78 Accepts]: Start accepts. Automaton has 48028 states and 150376 transitions. Word has length 27 [2019-12-07 12:05:27,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:27,165 INFO L462 AbstractCegarLoop]: Abstraction has 48028 states and 150376 transitions. [2019-12-07 12:05:27,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:05:27,165 INFO L276 IsEmpty]: Start isEmpty. Operand 48028 states and 150376 transitions. [2019-12-07 12:05:27,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:05:27,178 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:27,178 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:27,178 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:27,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:27,178 INFO L82 PathProgramCache]: Analyzing trace with hash 1361870049, now seen corresponding path program 1 times [2019-12-07 12:05:27,178 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:27,178 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [475162480] [2019-12-07 12:05:27,178 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:27,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:27,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:27,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [475162480] [2019-12-07 12:05:27,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:27,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:05:27,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879996805] [2019-12-07 12:05:27,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:05:27,422 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:27,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:05:27,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:05:27,423 INFO L87 Difference]: Start difference. First operand 48028 states and 150376 transitions. Second operand 6 states. [2019-12-07 12:05:27,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:27,939 INFO L93 Difference]: Finished difference Result 89495 states and 279640 transitions. [2019-12-07 12:05:27,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:05:27,940 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 12:05:27,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:28,066 INFO L225 Difference]: With dead ends: 89495 [2019-12-07 12:05:28,066 INFO L226 Difference]: Without dead ends: 89476 [2019-12-07 12:05:28,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:05:28,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89476 states. [2019-12-07 12:05:29,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89476 to 50180. [2019-12-07 12:05:29,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50180 states. [2019-12-07 12:05:29,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50180 states to 50180 states and 156998 transitions. [2019-12-07 12:05:29,191 INFO L78 Accepts]: Start accepts. Automaton has 50180 states and 156998 transitions. Word has length 27 [2019-12-07 12:05:29,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:29,191 INFO L462 AbstractCegarLoop]: Abstraction has 50180 states and 156998 transitions. [2019-12-07 12:05:29,191 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:05:29,191 INFO L276 IsEmpty]: Start isEmpty. Operand 50180 states and 156998 transitions. [2019-12-07 12:05:29,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 12:05:29,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:29,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:29,208 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:29,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:29,208 INFO L82 PathProgramCache]: Analyzing trace with hash -2015671980, now seen corresponding path program 1 times [2019-12-07 12:05:29,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:29,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676174668] [2019-12-07 12:05:29,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:29,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:29,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:29,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676174668] [2019-12-07 12:05:29,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:29,252 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:05:29,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601739122] [2019-12-07 12:05:29,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:05:29,253 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:29,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:05:29,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:05:29,253 INFO L87 Difference]: Start difference. First operand 50180 states and 156998 transitions. Second operand 6 states. [2019-12-07 12:05:29,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:29,832 INFO L93 Difference]: Finished difference Result 83334 states and 258731 transitions. [2019-12-07 12:05:29,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:05:29,832 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 12:05:29,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:29,950 INFO L225 Difference]: With dead ends: 83334 [2019-12-07 12:05:29,950 INFO L226 Difference]: Without dead ends: 83312 [2019-12-07 12:05:29,950 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:05:30,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83312 states. [2019-12-07 12:05:31,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83312 to 49804. [2019-12-07 12:05:31,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49804 states. [2019-12-07 12:05:31,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49804 states to 49804 states and 155755 transitions. [2019-12-07 12:05:31,162 INFO L78 Accepts]: Start accepts. Automaton has 49804 states and 155755 transitions. Word has length 28 [2019-12-07 12:05:31,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:31,162 INFO L462 AbstractCegarLoop]: Abstraction has 49804 states and 155755 transitions. [2019-12-07 12:05:31,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:05:31,162 INFO L276 IsEmpty]: Start isEmpty. Operand 49804 states and 155755 transitions. [2019-12-07 12:05:31,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:05:31,178 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:31,179 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:31,179 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:31,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:31,179 INFO L82 PathProgramCache]: Analyzing trace with hash -238960576, now seen corresponding path program 1 times [2019-12-07 12:05:31,179 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:31,179 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225938585] [2019-12-07 12:05:31,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:31,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:31,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:31,236 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1225938585] [2019-12-07 12:05:31,236 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:31,236 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:05:31,236 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034968675] [2019-12-07 12:05:31,237 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:05:31,237 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:31,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:05:31,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:05:31,237 INFO L87 Difference]: Start difference. First operand 49804 states and 155755 transitions. Second operand 4 states. [2019-12-07 12:05:31,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:31,384 INFO L93 Difference]: Finished difference Result 49845 states and 155743 transitions. [2019-12-07 12:05:31,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:05:31,385 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 12:05:31,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:31,453 INFO L225 Difference]: With dead ends: 49845 [2019-12-07 12:05:31,453 INFO L226 Difference]: Without dead ends: 49845 [2019-12-07 12:05:31,453 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:05:31,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49845 states. [2019-12-07 12:05:32,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49845 to 49752. [2019-12-07 12:05:32,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49752 states. [2019-12-07 12:05:32,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49752 states to 49752 states and 155600 transitions. [2019-12-07 12:05:32,262 INFO L78 Accepts]: Start accepts. Automaton has 49752 states and 155600 transitions. Word has length 29 [2019-12-07 12:05:32,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:32,263 INFO L462 AbstractCegarLoop]: Abstraction has 49752 states and 155600 transitions. [2019-12-07 12:05:32,263 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:05:32,263 INFO L276 IsEmpty]: Start isEmpty. Operand 49752 states and 155600 transitions. [2019-12-07 12:05:32,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 12:05:32,278 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:32,278 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:32,278 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:32,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:32,279 INFO L82 PathProgramCache]: Analyzing trace with hash 1610566857, now seen corresponding path program 1 times [2019-12-07 12:05:32,279 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:32,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605201792] [2019-12-07 12:05:32,279 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:32,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:32,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:32,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605201792] [2019-12-07 12:05:32,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:32,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:32,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896844292] [2019-12-07 12:05:32,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:05:32,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:32,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:05:32,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:05:32,309 INFO L87 Difference]: Start difference. First operand 49752 states and 155600 transitions. Second operand 4 states. [2019-12-07 12:05:32,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:32,371 INFO L93 Difference]: Finished difference Result 18905 states and 56656 transitions. [2019-12-07 12:05:32,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:05:32,371 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 12:05:32,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:32,391 INFO L225 Difference]: With dead ends: 18905 [2019-12-07 12:05:32,391 INFO L226 Difference]: Without dead ends: 18905 [2019-12-07 12:05:32,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:05:32,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18905 states. [2019-12-07 12:05:32,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18905 to 17939. [2019-12-07 12:05:32,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17939 states. [2019-12-07 12:05:32,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17939 states to 17939 states and 53798 transitions. [2019-12-07 12:05:32,645 INFO L78 Accepts]: Start accepts. Automaton has 17939 states and 53798 transitions. Word has length 30 [2019-12-07 12:05:32,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:32,645 INFO L462 AbstractCegarLoop]: Abstraction has 17939 states and 53798 transitions. [2019-12-07 12:05:32,645 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:05:32,645 INFO L276 IsEmpty]: Start isEmpty. Operand 17939 states and 53798 transitions. [2019-12-07 12:05:32,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:05:32,657 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:32,657 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:32,657 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:32,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:32,658 INFO L82 PathProgramCache]: Analyzing trace with hash 405285854, now seen corresponding path program 1 times [2019-12-07 12:05:32,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:32,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382789463] [2019-12-07 12:05:32,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:32,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:32,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:32,689 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382789463] [2019-12-07 12:05:32,689 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:32,689 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:32,689 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1891458811] [2019-12-07 12:05:32,690 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:05:32,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:32,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:05:32,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:32,690 INFO L87 Difference]: Start difference. First operand 17939 states and 53798 transitions. Second operand 5 states. [2019-12-07 12:05:32,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:32,925 INFO L93 Difference]: Finished difference Result 20464 states and 60688 transitions. [2019-12-07 12:05:32,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:05:32,925 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 12:05:32,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:32,946 INFO L225 Difference]: With dead ends: 20464 [2019-12-07 12:05:32,946 INFO L226 Difference]: Without dead ends: 20464 [2019-12-07 12:05:32,946 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:05:33,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20464 states. [2019-12-07 12:05:33,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20464 to 17995. [2019-12-07 12:05:33,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17995 states. [2019-12-07 12:05:33,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17995 states to 17995 states and 53958 transitions. [2019-12-07 12:05:33,318 INFO L78 Accepts]: Start accepts. Automaton has 17995 states and 53958 transitions. Word has length 33 [2019-12-07 12:05:33,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:33,319 INFO L462 AbstractCegarLoop]: Abstraction has 17995 states and 53958 transitions. [2019-12-07 12:05:33,319 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:05:33,319 INFO L276 IsEmpty]: Start isEmpty. Operand 17995 states and 53958 transitions. [2019-12-07 12:05:33,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:05:33,331 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:33,331 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:33,331 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:33,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:33,331 INFO L82 PathProgramCache]: Analyzing trace with hash -1258895234, now seen corresponding path program 2 times [2019-12-07 12:05:33,331 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:33,331 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153103739] [2019-12-07 12:05:33,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:33,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:33,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:33,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153103739] [2019-12-07 12:05:33,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:33,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:05:33,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1023583774] [2019-12-07 12:05:33,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:05:33,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:33,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:05:33,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:05:33,389 INFO L87 Difference]: Start difference. First operand 17995 states and 53958 transitions. Second operand 7 states. [2019-12-07 12:05:34,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:34,159 INFO L93 Difference]: Finished difference Result 34915 states and 103332 transitions. [2019-12-07 12:05:34,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:05:34,160 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 12:05:34,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:34,199 INFO L225 Difference]: With dead ends: 34915 [2019-12-07 12:05:34,199 INFO L226 Difference]: Without dead ends: 34915 [2019-12-07 12:05:34,199 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:05:34,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34915 states. [2019-12-07 12:05:34,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34915 to 18318. [2019-12-07 12:05:34,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18318 states. [2019-12-07 12:05:34,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18318 states to 18318 states and 54971 transitions. [2019-12-07 12:05:34,573 INFO L78 Accepts]: Start accepts. Automaton has 18318 states and 54971 transitions. Word has length 33 [2019-12-07 12:05:34,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:34,573 INFO L462 AbstractCegarLoop]: Abstraction has 18318 states and 54971 transitions. [2019-12-07 12:05:34,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:05:34,573 INFO L276 IsEmpty]: Start isEmpty. Operand 18318 states and 54971 transitions. [2019-12-07 12:05:34,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 12:05:34,587 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:34,587 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:34,587 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:34,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:34,587 INFO L82 PathProgramCache]: Analyzing trace with hash -454706214, now seen corresponding path program 3 times [2019-12-07 12:05:34,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:34,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488466372] [2019-12-07 12:05:34,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:34,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:34,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:34,654 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488466372] [2019-12-07 12:05:34,654 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:34,654 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:05:34,654 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585545534] [2019-12-07 12:05:34,654 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 12:05:34,654 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:34,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 12:05:34,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:05:34,655 INFO L87 Difference]: Start difference. First operand 18318 states and 54971 transitions. Second operand 8 states. [2019-12-07 12:05:35,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:35,597 INFO L93 Difference]: Finished difference Result 42044 states and 122987 transitions. [2019-12-07 12:05:35,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 12:05:35,597 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 12:05:35,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:35,643 INFO L225 Difference]: With dead ends: 42044 [2019-12-07 12:05:35,644 INFO L226 Difference]: Without dead ends: 42044 [2019-12-07 12:05:35,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 12:05:35,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42044 states. [2019-12-07 12:05:36,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42044 to 18193. [2019-12-07 12:05:36,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18193 states. [2019-12-07 12:05:36,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18193 states to 18193 states and 54586 transitions. [2019-12-07 12:05:36,054 INFO L78 Accepts]: Start accepts. Automaton has 18193 states and 54586 transitions. Word has length 33 [2019-12-07 12:05:36,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:36,055 INFO L462 AbstractCegarLoop]: Abstraction has 18193 states and 54586 transitions. [2019-12-07 12:05:36,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 12:05:36,055 INFO L276 IsEmpty]: Start isEmpty. Operand 18193 states and 54586 transitions. [2019-12-07 12:05:36,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 12:05:36,067 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:36,067 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:36,067 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:36,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:36,067 INFO L82 PathProgramCache]: Analyzing trace with hash -1655017129, now seen corresponding path program 1 times [2019-12-07 12:05:36,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:36,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070190950] [2019-12-07 12:05:36,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:36,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:36,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:36,135 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1070190950] [2019-12-07 12:05:36,135 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:36,135 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:05:36,135 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429792104] [2019-12-07 12:05:36,135 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:05:36,135 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:36,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:05:36,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:05:36,136 INFO L87 Difference]: Start difference. First operand 18193 states and 54586 transitions. Second operand 7 states. [2019-12-07 12:05:37,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:37,183 INFO L93 Difference]: Finished difference Result 32183 states and 94757 transitions. [2019-12-07 12:05:37,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:05:37,184 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 12:05:37,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:37,230 INFO L225 Difference]: With dead ends: 32183 [2019-12-07 12:05:37,230 INFO L226 Difference]: Without dead ends: 32183 [2019-12-07 12:05:37,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:05:37,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32183 states. [2019-12-07 12:05:37,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32183 to 17914. [2019-12-07 12:05:37,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17914 states. [2019-12-07 12:05:37,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17914 states to 17914 states and 53750 transitions. [2019-12-07 12:05:37,718 INFO L78 Accepts]: Start accepts. Automaton has 17914 states and 53750 transitions. Word has length 34 [2019-12-07 12:05:37,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:37,718 INFO L462 AbstractCegarLoop]: Abstraction has 17914 states and 53750 transitions. [2019-12-07 12:05:37,718 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:05:37,718 INFO L276 IsEmpty]: Start isEmpty. Operand 17914 states and 53750 transitions. [2019-12-07 12:05:37,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 12:05:37,728 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:37,728 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:37,729 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:37,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:37,729 INFO L82 PathProgramCache]: Analyzing trace with hash 2107636055, now seen corresponding path program 2 times [2019-12-07 12:05:37,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:37,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1329590108] [2019-12-07 12:05:37,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:37,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:37,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:37,782 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1329590108] [2019-12-07 12:05:37,782 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:37,782 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:05:37,782 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [271527945] [2019-12-07 12:05:37,782 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 12:05:37,782 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:37,783 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 12:05:37,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:05:37,783 INFO L87 Difference]: Start difference. First operand 17914 states and 53750 transitions. Second operand 8 states. [2019-12-07 12:05:38,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:38,763 INFO L93 Difference]: Finished difference Result 37163 states and 108096 transitions. [2019-12-07 12:05:38,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 12:05:38,763 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 12:05:38,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:38,802 INFO L225 Difference]: With dead ends: 37163 [2019-12-07 12:05:38,802 INFO L226 Difference]: Without dead ends: 37163 [2019-12-07 12:05:38,802 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 12:05:38,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37163 states. [2019-12-07 12:05:39,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37163 to 17446. [2019-12-07 12:05:39,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17446 states. [2019-12-07 12:05:39,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17446 states to 17446 states and 52361 transitions. [2019-12-07 12:05:39,180 INFO L78 Accepts]: Start accepts. Automaton has 17446 states and 52361 transitions. Word has length 34 [2019-12-07 12:05:39,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:39,180 INFO L462 AbstractCegarLoop]: Abstraction has 17446 states and 52361 transitions. [2019-12-07 12:05:39,180 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 12:05:39,180 INFO L276 IsEmpty]: Start isEmpty. Operand 17446 states and 52361 transitions. [2019-12-07 12:05:39,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:05:39,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:39,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:39,194 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:39,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:39,194 INFO L82 PathProgramCache]: Analyzing trace with hash 1591146573, now seen corresponding path program 1 times [2019-12-07 12:05:39,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:39,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1195703616] [2019-12-07 12:05:39,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:39,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:39,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:39,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1195703616] [2019-12-07 12:05:39,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:39,227 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:05:39,227 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [562413389] [2019-12-07 12:05:39,227 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:05:39,227 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:39,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:05:39,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:39,228 INFO L87 Difference]: Start difference. First operand 17446 states and 52361 transitions. Second operand 5 states. [2019-12-07 12:05:39,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:39,278 INFO L93 Difference]: Finished difference Result 15976 states and 49189 transitions. [2019-12-07 12:05:39,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:05:39,278 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 12:05:39,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:39,295 INFO L225 Difference]: With dead ends: 15976 [2019-12-07 12:05:39,295 INFO L226 Difference]: Without dead ends: 15976 [2019-12-07 12:05:39,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:39,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15976 states. [2019-12-07 12:05:39,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15976 to 14581. [2019-12-07 12:05:39,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14581 states. [2019-12-07 12:05:39,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14581 states to 14581 states and 45141 transitions. [2019-12-07 12:05:39,514 INFO L78 Accepts]: Start accepts. Automaton has 14581 states and 45141 transitions. Word has length 41 [2019-12-07 12:05:39,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:39,515 INFO L462 AbstractCegarLoop]: Abstraction has 14581 states and 45141 transitions. [2019-12-07 12:05:39,515 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:05:39,515 INFO L276 IsEmpty]: Start isEmpty. Operand 14581 states and 45141 transitions. [2019-12-07 12:05:39,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 12:05:39,527 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:39,527 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:39,527 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:39,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:39,528 INFO L82 PathProgramCache]: Analyzing trace with hash -961209461, now seen corresponding path program 1 times [2019-12-07 12:05:39,528 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:39,528 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41107030] [2019-12-07 12:05:39,528 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:39,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:39,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:39,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41107030] [2019-12-07 12:05:39,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:39,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:05:39,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1873607063] [2019-12-07 12:05:39,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:05:39,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:39,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:05:39,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:39,563 INFO L87 Difference]: Start difference. First operand 14581 states and 45141 transitions. Second operand 3 states. [2019-12-07 12:05:39,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:39,632 INFO L93 Difference]: Finished difference Result 17628 states and 54560 transitions. [2019-12-07 12:05:39,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:05:39,632 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 12:05:39,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:39,652 INFO L225 Difference]: With dead ends: 17628 [2019-12-07 12:05:39,652 INFO L226 Difference]: Without dead ends: 17628 [2019-12-07 12:05:39,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:39,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17628 states. [2019-12-07 12:05:39,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17628 to 14468. [2019-12-07 12:05:39,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14468 states. [2019-12-07 12:05:39,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14468 states to 14468 states and 45095 transitions. [2019-12-07 12:05:39,887 INFO L78 Accepts]: Start accepts. Automaton has 14468 states and 45095 transitions. Word has length 65 [2019-12-07 12:05:39,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:39,887 INFO L462 AbstractCegarLoop]: Abstraction has 14468 states and 45095 transitions. [2019-12-07 12:05:39,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:05:39,887 INFO L276 IsEmpty]: Start isEmpty. Operand 14468 states and 45095 transitions. [2019-12-07 12:05:39,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:05:39,899 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:39,900 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:39,900 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:39,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:39,900 INFO L82 PathProgramCache]: Analyzing trace with hash -2050011334, now seen corresponding path program 1 times [2019-12-07 12:05:39,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:39,900 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [852827098] [2019-12-07 12:05:39,900 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:39,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:39,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:39,963 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [852827098] [2019-12-07 12:05:39,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:39,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 12:05:39,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [858888305] [2019-12-07 12:05:39,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:05:39,964 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:39,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:05:39,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:05:39,965 INFO L87 Difference]: Start difference. First operand 14468 states and 45095 transitions. Second operand 7 states. [2019-12-07 12:05:40,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:40,862 INFO L93 Difference]: Finished difference Result 32675 states and 98935 transitions. [2019-12-07 12:05:40,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 12:05:40,863 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 12:05:40,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:40,900 INFO L225 Difference]: With dead ends: 32675 [2019-12-07 12:05:40,900 INFO L226 Difference]: Without dead ends: 32675 [2019-12-07 12:05:40,901 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 12:05:41,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32675 states. [2019-12-07 12:05:41,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32675 to 18532. [2019-12-07 12:05:41,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18532 states. [2019-12-07 12:05:41,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18532 states to 18532 states and 57683 transitions. [2019-12-07 12:05:41,267 INFO L78 Accepts]: Start accepts. Automaton has 18532 states and 57683 transitions. Word has length 66 [2019-12-07 12:05:41,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:41,268 INFO L462 AbstractCegarLoop]: Abstraction has 18532 states and 57683 transitions. [2019-12-07 12:05:41,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:05:41,268 INFO L276 IsEmpty]: Start isEmpty. Operand 18532 states and 57683 transitions. [2019-12-07 12:05:41,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:05:41,284 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:41,284 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:41,284 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:41,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:41,284 INFO L82 PathProgramCache]: Analyzing trace with hash -1986512930, now seen corresponding path program 1 times [2019-12-07 12:05:41,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:41,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [559758211] [2019-12-07 12:05:41,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:41,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:41,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:41,333 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [559758211] [2019-12-07 12:05:41,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:41,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:41,334 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109306642] [2019-12-07 12:05:41,334 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:05:41,334 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:41,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:05:41,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:05:41,334 INFO L87 Difference]: Start difference. First operand 18532 states and 57683 transitions. Second operand 4 states. [2019-12-07 12:05:41,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:41,414 INFO L93 Difference]: Finished difference Result 18330 states and 56852 transitions. [2019-12-07 12:05:41,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:05:41,414 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 12:05:41,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:41,434 INFO L225 Difference]: With dead ends: 18330 [2019-12-07 12:05:41,434 INFO L226 Difference]: Without dead ends: 18330 [2019-12-07 12:05:41,434 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:41,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18330 states. [2019-12-07 12:05:41,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18330 to 16314. [2019-12-07 12:05:41,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16314 states. [2019-12-07 12:05:41,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16314 states to 16314 states and 50618 transitions. [2019-12-07 12:05:41,789 INFO L78 Accepts]: Start accepts. Automaton has 16314 states and 50618 transitions. Word has length 66 [2019-12-07 12:05:41,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:41,789 INFO L462 AbstractCegarLoop]: Abstraction has 16314 states and 50618 transitions. [2019-12-07 12:05:41,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:05:41,790 INFO L276 IsEmpty]: Start isEmpty. Operand 16314 states and 50618 transitions. [2019-12-07 12:05:41,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:05:41,803 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:41,803 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:41,803 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:41,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:41,803 INFO L82 PathProgramCache]: Analyzing trace with hash -1443128569, now seen corresponding path program 1 times [2019-12-07 12:05:41,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:41,804 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624285876] [2019-12-07 12:05:41,804 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:41,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:41,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:41,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624285876] [2019-12-07 12:05:41,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:41,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:41,858 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1228628180] [2019-12-07 12:05:41,858 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:05:41,858 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:41,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:05:41,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:05:41,859 INFO L87 Difference]: Start difference. First operand 16314 states and 50618 transitions. Second operand 4 states. [2019-12-07 12:05:41,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:41,936 INFO L93 Difference]: Finished difference Result 27858 states and 86798 transitions. [2019-12-07 12:05:41,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:05:41,936 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 12:05:41,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:41,951 INFO L225 Difference]: With dead ends: 27858 [2019-12-07 12:05:41,951 INFO L226 Difference]: Without dead ends: 13020 [2019-12-07 12:05:41,951 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:42,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13020 states. [2019-12-07 12:05:42,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13020 to 13020. [2019-12-07 12:05:42,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13020 states. [2019-12-07 12:05:42,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13020 states to 13020 states and 40555 transitions. [2019-12-07 12:05:42,143 INFO L78 Accepts]: Start accepts. Automaton has 13020 states and 40555 transitions. Word has length 66 [2019-12-07 12:05:42,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:42,144 INFO L462 AbstractCegarLoop]: Abstraction has 13020 states and 40555 transitions. [2019-12-07 12:05:42,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:05:42,144 INFO L276 IsEmpty]: Start isEmpty. Operand 13020 states and 40555 transitions. [2019-12-07 12:05:42,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:05:42,156 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:42,156 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:42,156 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:42,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:42,156 INFO L82 PathProgramCache]: Analyzing trace with hash 1904298335, now seen corresponding path program 2 times [2019-12-07 12:05:42,157 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:42,157 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886524] [2019-12-07 12:05:42,157 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:42,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:42,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:42,198 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886524] [2019-12-07 12:05:42,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:42,198 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:05:42,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1716180696] [2019-12-07 12:05:42,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:05:42,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:42,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:05:42,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:05:42,199 INFO L87 Difference]: Start difference. First operand 13020 states and 40555 transitions. Second operand 4 states. [2019-12-07 12:05:42,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:42,260 INFO L93 Difference]: Finished difference Result 22639 states and 70890 transitions. [2019-12-07 12:05:42,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:05:42,261 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 12:05:42,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:42,272 INFO L225 Difference]: With dead ends: 22639 [2019-12-07 12:05:42,273 INFO L226 Difference]: Without dead ends: 10512 [2019-12-07 12:05:42,273 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:05:42,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10512 states. [2019-12-07 12:05:42,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10512 to 10512. [2019-12-07 12:05:42,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10512 states. [2019-12-07 12:05:42,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10512 states to 10512 states and 32874 transitions. [2019-12-07 12:05:42,429 INFO L78 Accepts]: Start accepts. Automaton has 10512 states and 32874 transitions. Word has length 66 [2019-12-07 12:05:42,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:42,430 INFO L462 AbstractCegarLoop]: Abstraction has 10512 states and 32874 transitions. [2019-12-07 12:05:42,430 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:05:42,430 INFO L276 IsEmpty]: Start isEmpty. Operand 10512 states and 32874 transitions. [2019-12-07 12:05:42,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:05:42,438 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:42,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:42,438 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:42,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:42,438 INFO L82 PathProgramCache]: Analyzing trace with hash -1283449633, now seen corresponding path program 3 times [2019-12-07 12:05:42,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:42,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092717087] [2019-12-07 12:05:42,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:42,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:42,509 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:42,509 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1092717087] [2019-12-07 12:05:42,509 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:42,509 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:05:42,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112933447] [2019-12-07 12:05:42,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:05:42,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:42,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:05:42,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:05:42,510 INFO L87 Difference]: Start difference. First operand 10512 states and 32874 transitions. Second operand 7 states. [2019-12-07 12:05:42,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:42,725 INFO L93 Difference]: Finished difference Result 19889 states and 61168 transitions. [2019-12-07 12:05:42,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 12:05:42,725 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 12:05:42,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:42,741 INFO L225 Difference]: With dead ends: 19889 [2019-12-07 12:05:42,741 INFO L226 Difference]: Without dead ends: 14478 [2019-12-07 12:05:42,742 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:05:42,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14478 states. [2019-12-07 12:05:42,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14478 to 12416. [2019-12-07 12:05:42,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12416 states. [2019-12-07 12:05:42,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12416 states to 12416 states and 38645 transitions. [2019-12-07 12:05:42,950 INFO L78 Accepts]: Start accepts. Automaton has 12416 states and 38645 transitions. Word has length 66 [2019-12-07 12:05:42,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:42,950 INFO L462 AbstractCegarLoop]: Abstraction has 12416 states and 38645 transitions. [2019-12-07 12:05:42,950 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:05:42,950 INFO L276 IsEmpty]: Start isEmpty. Operand 12416 states and 38645 transitions. [2019-12-07 12:05:42,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:05:42,961 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:42,961 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:42,961 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:42,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:42,962 INFO L82 PathProgramCache]: Analyzing trace with hash -599347457, now seen corresponding path program 4 times [2019-12-07 12:05:42,962 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:42,962 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959361436] [2019-12-07 12:05:42,962 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:42,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:42,998 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:42,998 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1959361436] [2019-12-07 12:05:42,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:42,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:05:42,998 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [865096806] [2019-12-07 12:05:42,999 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:05:42,999 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:42,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:05:42,999 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:42,999 INFO L87 Difference]: Start difference. First operand 12416 states and 38645 transitions. Second operand 3 states. [2019-12-07 12:05:43,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:43,029 INFO L93 Difference]: Finished difference Result 9730 states and 29711 transitions. [2019-12-07 12:05:43,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:05:43,029 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:05:43,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:43,039 INFO L225 Difference]: With dead ends: 9730 [2019-12-07 12:05:43,039 INFO L226 Difference]: Without dead ends: 9730 [2019-12-07 12:05:43,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:05:43,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9730 states. [2019-12-07 12:05:43,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9730 to 9508. [2019-12-07 12:05:43,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9508 states. [2019-12-07 12:05:43,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9508 states to 9508 states and 29065 transitions. [2019-12-07 12:05:43,178 INFO L78 Accepts]: Start accepts. Automaton has 9508 states and 29065 transitions. Word has length 66 [2019-12-07 12:05:43,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:43,178 INFO L462 AbstractCegarLoop]: Abstraction has 9508 states and 29065 transitions. [2019-12-07 12:05:43,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:05:43,178 INFO L276 IsEmpty]: Start isEmpty. Operand 9508 states and 29065 transitions. [2019-12-07 12:05:43,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:43,185 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:43,185 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:43,185 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:43,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:43,185 INFO L82 PathProgramCache]: Analyzing trace with hash -1197749059, now seen corresponding path program 1 times [2019-12-07 12:05:43,186 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:43,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [334934366] [2019-12-07 12:05:43,186 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:43,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:43,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:43,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [334934366] [2019-12-07 12:05:43,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:43,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:05:43,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [151517618] [2019-12-07 12:05:43,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:05:43,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:43,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:05:43,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:05:43,260 INFO L87 Difference]: Start difference. First operand 9508 states and 29065 transitions. Second operand 7 states. [2019-12-07 12:05:43,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:43,437 INFO L93 Difference]: Finished difference Result 18092 states and 54144 transitions. [2019-12-07 12:05:43,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 12:05:43,437 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 12:05:43,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:43,450 INFO L225 Difference]: With dead ends: 18092 [2019-12-07 12:05:43,450 INFO L226 Difference]: Without dead ends: 12981 [2019-12-07 12:05:43,450 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:05:43,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12981 states. [2019-12-07 12:05:43,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12981 to 10998. [2019-12-07 12:05:43,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10998 states. [2019-12-07 12:05:43,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10998 states to 10998 states and 33228 transitions. [2019-12-07 12:05:43,617 INFO L78 Accepts]: Start accepts. Automaton has 10998 states and 33228 transitions. Word has length 67 [2019-12-07 12:05:43,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:43,618 INFO L462 AbstractCegarLoop]: Abstraction has 10998 states and 33228 transitions. [2019-12-07 12:05:43,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:05:43,618 INFO L276 IsEmpty]: Start isEmpty. Operand 10998 states and 33228 transitions. [2019-12-07 12:05:43,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:43,626 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:43,626 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:43,626 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:43,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:43,626 INFO L82 PathProgramCache]: Analyzing trace with hash 2078724657, now seen corresponding path program 2 times [2019-12-07 12:05:43,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:43,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406502551] [2019-12-07 12:05:43,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:43,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:43,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:43,753 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406502551] [2019-12-07 12:05:43,753 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:43,753 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 12:05:43,753 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021779562] [2019-12-07 12:05:43,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 12:05:43,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:43,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 12:05:43,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:05:43,754 INFO L87 Difference]: Start difference. First operand 10998 states and 33228 transitions. Second operand 9 states. [2019-12-07 12:05:44,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:44,545 INFO L93 Difference]: Finished difference Result 20805 states and 61926 transitions. [2019-12-07 12:05:44,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 12:05:44,546 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 12:05:44,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:44,560 INFO L225 Difference]: With dead ends: 20805 [2019-12-07 12:05:44,560 INFO L226 Difference]: Without dead ends: 15106 [2019-12-07 12:05:44,561 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:05:44,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15106 states. [2019-12-07 12:05:44,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15106 to 11621. [2019-12-07 12:05:44,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11621 states. [2019-12-07 12:05:44,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11621 states to 11621 states and 34761 transitions. [2019-12-07 12:05:44,744 INFO L78 Accepts]: Start accepts. Automaton has 11621 states and 34761 transitions. Word has length 67 [2019-12-07 12:05:44,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:44,744 INFO L462 AbstractCegarLoop]: Abstraction has 11621 states and 34761 transitions. [2019-12-07 12:05:44,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 12:05:44,745 INFO L276 IsEmpty]: Start isEmpty. Operand 11621 states and 34761 transitions. [2019-12-07 12:05:44,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:44,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:44,753 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:44,754 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:44,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:44,754 INFO L82 PathProgramCache]: Analyzing trace with hash 721495091, now seen corresponding path program 3 times [2019-12-07 12:05:44,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:44,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419351462] [2019-12-07 12:05:44,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:44,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:45,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:45,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419351462] [2019-12-07 12:05:45,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:45,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 12:05:45,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1352265706] [2019-12-07 12:05:45,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 12:05:45,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:45,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 12:05:45,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2019-12-07 12:05:45,128 INFO L87 Difference]: Start difference. First operand 11621 states and 34761 transitions. Second operand 16 states. [2019-12-07 12:05:47,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:47,191 INFO L93 Difference]: Finished difference Result 17999 states and 52576 transitions. [2019-12-07 12:05:47,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 12:05:47,193 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 12:05:47,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:47,218 INFO L225 Difference]: With dead ends: 17999 [2019-12-07 12:05:47,218 INFO L226 Difference]: Without dead ends: 15584 [2019-12-07 12:05:47,219 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 348 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=255, Invalid=1151, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 12:05:47,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15584 states. [2019-12-07 12:05:47,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15584 to 11925. [2019-12-07 12:05:47,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11925 states. [2019-12-07 12:05:47,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11925 states to 11925 states and 35487 transitions. [2019-12-07 12:05:47,412 INFO L78 Accepts]: Start accepts. Automaton has 11925 states and 35487 transitions. Word has length 67 [2019-12-07 12:05:47,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:47,412 INFO L462 AbstractCegarLoop]: Abstraction has 11925 states and 35487 transitions. [2019-12-07 12:05:47,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 12:05:47,412 INFO L276 IsEmpty]: Start isEmpty. Operand 11925 states and 35487 transitions. [2019-12-07 12:05:47,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:47,422 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:47,422 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:47,422 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:47,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:47,422 INFO L82 PathProgramCache]: Analyzing trace with hash -468270879, now seen corresponding path program 4 times [2019-12-07 12:05:47,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:47,423 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812848124] [2019-12-07 12:05:47,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:47,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:47,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:47,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812848124] [2019-12-07 12:05:47,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:47,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 12:05:47,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630313677] [2019-12-07 12:05:47,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 12:05:47,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:47,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 12:05:47,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2019-12-07 12:05:47,797 INFO L87 Difference]: Start difference. First operand 11925 states and 35487 transitions. Second operand 17 states. [2019-12-07 12:05:51,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:51,869 INFO L93 Difference]: Finished difference Result 18353 states and 53421 transitions. [2019-12-07 12:05:51,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 12:05:51,870 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 12:05:51,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:51,898 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 12:05:51,899 INFO L226 Difference]: Without dead ends: 17054 [2019-12-07 12:05:51,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 428 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=289, Invalid=1351, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 12:05:51,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17054 states. [2019-12-07 12:05:52,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17054 to 11973. [2019-12-07 12:05:52,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11973 states. [2019-12-07 12:05:52,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11973 states to 11973 states and 35611 transitions. [2019-12-07 12:05:52,103 INFO L78 Accepts]: Start accepts. Automaton has 11973 states and 35611 transitions. Word has length 67 [2019-12-07 12:05:52,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:52,103 INFO L462 AbstractCegarLoop]: Abstraction has 11973 states and 35611 transitions. [2019-12-07 12:05:52,103 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 12:05:52,103 INFO L276 IsEmpty]: Start isEmpty. Operand 11973 states and 35611 transitions. [2019-12-07 12:05:52,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:52,113 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:52,114 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:52,114 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:52,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:52,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1716057561, now seen corresponding path program 5 times [2019-12-07 12:05:52,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:52,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229245106] [2019-12-07 12:05:52,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:52,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:52,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:52,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229245106] [2019-12-07 12:05:52,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:52,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 12:05:52,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [468577803] [2019-12-07 12:05:52,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 12:05:52,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:52,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 12:05:52,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2019-12-07 12:05:52,458 INFO L87 Difference]: Start difference. First operand 11973 states and 35611 transitions. Second operand 17 states. [2019-12-07 12:05:55,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:55,704 INFO L93 Difference]: Finished difference Result 18225 states and 52806 transitions. [2019-12-07 12:05:55,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 12:05:55,705 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 12:05:55,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:55,731 INFO L225 Difference]: With dead ends: 18225 [2019-12-07 12:05:55,731 INFO L226 Difference]: Without dead ends: 17058 [2019-12-07 12:05:55,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 510 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=310, Invalid=1582, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 12:05:55,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17058 states. [2019-12-07 12:05:55,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17058 to 11869. [2019-12-07 12:05:55,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11869 states. [2019-12-07 12:05:55,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11869 states to 11869 states and 35349 transitions. [2019-12-07 12:05:55,931 INFO L78 Accepts]: Start accepts. Automaton has 11869 states and 35349 transitions. Word has length 67 [2019-12-07 12:05:55,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:55,931 INFO L462 AbstractCegarLoop]: Abstraction has 11869 states and 35349 transitions. [2019-12-07 12:05:55,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 12:05:55,931 INFO L276 IsEmpty]: Start isEmpty. Operand 11869 states and 35349 transitions. [2019-12-07 12:05:55,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:55,940 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:55,940 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:55,940 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:55,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:55,940 INFO L82 PathProgramCache]: Analyzing trace with hash 88464887, now seen corresponding path program 6 times [2019-12-07 12:05:55,941 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:55,941 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [734691615] [2019-12-07 12:05:55,941 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:55,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:56,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:56,087 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [734691615] [2019-12-07 12:05:56,087 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:56,087 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:05:56,087 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744072762] [2019-12-07 12:05:56,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:05:56,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:56,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:05:56,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:05:56,088 INFO L87 Difference]: Start difference. First operand 11869 states and 35349 transitions. Second operand 11 states. [2019-12-07 12:05:56,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:56,679 INFO L93 Difference]: Finished difference Result 18343 states and 54544 transitions. [2019-12-07 12:05:56,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 12:05:56,679 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:05:56,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:56,696 INFO L225 Difference]: With dead ends: 18343 [2019-12-07 12:05:56,696 INFO L226 Difference]: Without dead ends: 17324 [2019-12-07 12:05:56,696 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=139, Invalid=617, Unknown=0, NotChecked=0, Total=756 [2019-12-07 12:05:56,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17324 states. [2019-12-07 12:05:56,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17324 to 15396. [2019-12-07 12:05:56,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15396 states. [2019-12-07 12:05:56,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15396 states to 15396 states and 46059 transitions. [2019-12-07 12:05:56,933 INFO L78 Accepts]: Start accepts. Automaton has 15396 states and 46059 transitions. Word has length 67 [2019-12-07 12:05:56,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:56,933 INFO L462 AbstractCegarLoop]: Abstraction has 15396 states and 46059 transitions. [2019-12-07 12:05:56,933 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:05:56,933 INFO L276 IsEmpty]: Start isEmpty. Operand 15396 states and 46059 transitions. [2019-12-07 12:05:56,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:56,946 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:56,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:56,946 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:56,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:56,946 INFO L82 PathProgramCache]: Analyzing trace with hash 324937045, now seen corresponding path program 7 times [2019-12-07 12:05:56,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:56,947 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1949970936] [2019-12-07 12:05:56,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:56,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:57,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:57,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1949970936] [2019-12-07 12:05:57,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:57,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:05:57,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002969363] [2019-12-07 12:05:57,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:05:57,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:57,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:05:57,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:05:57,068 INFO L87 Difference]: Start difference. First operand 15396 states and 46059 transitions. Second operand 11 states. [2019-12-07 12:05:57,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:57,551 INFO L93 Difference]: Finished difference Result 18074 states and 53104 transitions. [2019-12-07 12:05:57,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 12:05:57,552 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 12:05:57,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:57,564 INFO L225 Difference]: With dead ends: 18074 [2019-12-07 12:05:57,565 INFO L226 Difference]: Without dead ends: 13498 [2019-12-07 12:05:57,565 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=132, Invalid=570, Unknown=0, NotChecked=0, Total=702 [2019-12-07 12:05:57,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13498 states. [2019-12-07 12:05:57,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13498 to 11297. [2019-12-07 12:05:57,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11297 states. [2019-12-07 12:05:57,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11297 states to 11297 states and 33668 transitions. [2019-12-07 12:05:57,738 INFO L78 Accepts]: Start accepts. Automaton has 11297 states and 33668 transitions. Word has length 67 [2019-12-07 12:05:57,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:57,739 INFO L462 AbstractCegarLoop]: Abstraction has 11297 states and 33668 transitions. [2019-12-07 12:05:57,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:05:57,739 INFO L276 IsEmpty]: Start isEmpty. Operand 11297 states and 33668 transitions. [2019-12-07 12:05:57,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:57,748 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:57,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:57,748 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:57,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:57,748 INFO L82 PathProgramCache]: Analyzing trace with hash 975038819, now seen corresponding path program 8 times [2019-12-07 12:05:57,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:57,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383233157] [2019-12-07 12:05:57,749 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:57,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:57,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:57,875 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383233157] [2019-12-07 12:05:57,875 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:57,875 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:05:57,875 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102318186] [2019-12-07 12:05:57,875 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:05:57,875 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:57,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:05:57,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:05:57,876 INFO L87 Difference]: Start difference. First operand 11297 states and 33668 transitions. Second operand 10 states. [2019-12-07 12:05:58,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:58,581 INFO L93 Difference]: Finished difference Result 14311 states and 41551 transitions. [2019-12-07 12:05:58,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:05:58,581 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:05:58,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:58,594 INFO L225 Difference]: With dead ends: 14311 [2019-12-07 12:05:58,594 INFO L226 Difference]: Without dead ends: 13472 [2019-12-07 12:05:58,595 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=345, Unknown=0, NotChecked=0, Total=420 [2019-12-07 12:05:58,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13472 states. [2019-12-07 12:05:58,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13472 to 10927. [2019-12-07 12:05:58,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10927 states. [2019-12-07 12:05:58,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10927 states to 10927 states and 32628 transitions. [2019-12-07 12:05:58,761 INFO L78 Accepts]: Start accepts. Automaton has 10927 states and 32628 transitions. Word has length 67 [2019-12-07 12:05:58,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:58,761 INFO L462 AbstractCegarLoop]: Abstraction has 10927 states and 32628 transitions. [2019-12-07 12:05:58,761 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:05:58,761 INFO L276 IsEmpty]: Start isEmpty. Operand 10927 states and 32628 transitions. [2019-12-07 12:05:58,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:58,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:58,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:58,769 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:58,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:58,770 INFO L82 PathProgramCache]: Analyzing trace with hash -478785703, now seen corresponding path program 9 times [2019-12-07 12:05:58,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:58,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531345496] [2019-12-07 12:05:58,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:58,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:58,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:58,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1531345496] [2019-12-07 12:05:58,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:58,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:05:58,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911548506] [2019-12-07 12:05:58,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:05:58,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:58,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:05:58,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:05:58,871 INFO L87 Difference]: Start difference. First operand 10927 states and 32628 transitions. Second operand 10 states. [2019-12-07 12:05:59,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:05:59,506 INFO L93 Difference]: Finished difference Result 13908 states and 40682 transitions. [2019-12-07 12:05:59,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 12:05:59,507 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 12:05:59,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:05:59,520 INFO L225 Difference]: With dead ends: 13908 [2019-12-07 12:05:59,520 INFO L226 Difference]: Without dead ends: 13665 [2019-12-07 12:05:59,521 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2019-12-07 12:05:59,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13665 states. [2019-12-07 12:05:59,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13665 to 10943. [2019-12-07 12:05:59,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10943 states. [2019-12-07 12:05:59,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10943 states to 10943 states and 32668 transitions. [2019-12-07 12:05:59,692 INFO L78 Accepts]: Start accepts. Automaton has 10943 states and 32668 transitions. Word has length 67 [2019-12-07 12:05:59,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:05:59,692 INFO L462 AbstractCegarLoop]: Abstraction has 10943 states and 32668 transitions. [2019-12-07 12:05:59,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:05:59,692 INFO L276 IsEmpty]: Start isEmpty. Operand 10943 states and 32668 transitions. [2019-12-07 12:05:59,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:05:59,700 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:05:59,700 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:05:59,701 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:05:59,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:05:59,701 INFO L82 PathProgramCache]: Analyzing trace with hash -1516551711, now seen corresponding path program 10 times [2019-12-07 12:05:59,701 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:05:59,701 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640976751] [2019-12-07 12:05:59,701 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:05:59,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:05:59,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:05:59,804 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [640976751] [2019-12-07 12:05:59,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:05:59,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:05:59,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [236169383] [2019-12-07 12:05:59,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:05:59,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:05:59,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:05:59,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:05:59,805 INFO L87 Difference]: Start difference. First operand 10943 states and 32668 transitions. Second operand 12 states. [2019-12-07 12:06:00,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:06:00,271 INFO L93 Difference]: Finished difference Result 13273 states and 38984 transitions. [2019-12-07 12:06:00,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 12:06:00,272 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 12:06:00,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:06:00,285 INFO L225 Difference]: With dead ends: 13273 [2019-12-07 12:06:00,285 INFO L226 Difference]: Without dead ends: 13058 [2019-12-07 12:06:00,286 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 12:06:00,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13058 states. [2019-12-07 12:06:00,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13058 to 10767. [2019-12-07 12:06:00,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10767 states. [2019-12-07 12:06:00,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10767 states to 10767 states and 32196 transitions. [2019-12-07 12:06:00,451 INFO L78 Accepts]: Start accepts. Automaton has 10767 states and 32196 transitions. Word has length 67 [2019-12-07 12:06:00,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:06:00,451 INFO L462 AbstractCegarLoop]: Abstraction has 10767 states and 32196 transitions. [2019-12-07 12:06:00,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:06:00,451 INFO L276 IsEmpty]: Start isEmpty. Operand 10767 states and 32196 transitions. [2019-12-07 12:06:00,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:06:00,459 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:06:00,460 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:06:00,460 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:06:00,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:06:00,460 INFO L82 PathProgramCache]: Analyzing trace with hash -494782975, now seen corresponding path program 11 times [2019-12-07 12:06:00,460 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:06:00,460 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369661523] [2019-12-07 12:06:00,460 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:06:00,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:06:00,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:06:00,538 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:06:00,538 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:06:00,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t391~0.base_29|) (= 0 v_~weak$$choice0~0_10) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t391~0.base_29| 4)) (= v_~a$r_buff1_thd0~0_132 0) (= 0 v_~a$w_buff0_used~0_689) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t391~0.base_29| 1)) (= 0 v_~a$w_buff1_used~0_376) (= v_~a$r_buff0_thd3~0_328 0) (= |v_#NULL.offset_6| 0) (= v_~y~0_79 0) (= 0 |v_ULTIMATE.start_main_~#t391~0.offset_22|) (= 0 v_~a$r_buff1_thd1~0_125) (= 0 v_~__unbuffered_p0_EAX~0_92) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~x~0_69 0) (= 0 v_~a$r_buff1_thd2~0_129) (< 0 |v_#StackHeapBarrier_17|) (= v_~__unbuffered_p0_EBX~0_92 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t391~0.base_29|)) (= v_~a$flush_delayed~0_23 0) (= v_~a$r_buff1_thd3~0_224 0) (= v_~__unbuffered_p2_EBX~0_38 0) (= 0 v_~__unbuffered_cnt~0_98) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~a$r_buff0_thd2~0_124) (= v_~a~0_181 0) (= 0 |v_#NULL.base_6|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t391~0.base_29| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t391~0.base_29|) |v_ULTIMATE.start_main_~#t391~0.offset_22| 0)) |v_#memory_int_21|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~a$r_buff0_thd1~0_195) (= v_~a$mem_tmp~0_12 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~a$w_buff1~0_172) (= v_~a$r_buff0_thd0~0_144 0) (= v_~a$w_buff0~0_228 0) (= v_~weak$$choice2~0_107 0) (= v_~z~0_20 0) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_129, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_281|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ~a~0=v_~a~0_181, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_67|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_92, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ULTIMATE.start_main_~#t392~0.base=|v_ULTIMATE.start_main_~#t392~0.base_29|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_92, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_224, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_689, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_195, ~weak$$choice0~0=v_~weak$$choice0~0_10, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_228, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_69, ULTIMATE.start_main_~#t391~0.base=|v_ULTIMATE.start_main_~#t391~0.base_29|, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_124, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_12, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_172, ~y~0=v_~y~0_79, ULTIMATE.start_main_~#t393~0.offset=|v_ULTIMATE.start_main_~#t393~0.offset_15|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_125, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_328, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_~#t392~0.offset=|v_ULTIMATE.start_main_~#t392~0.offset_22|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t393~0.base=|v_ULTIMATE.start_main_~#t393~0.base_17|, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_376, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6, ULTIMATE.start_main_~#t391~0.offset=|v_ULTIMATE.start_main_~#t391~0.offset_22|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t392~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t391~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t393~0.offset, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t392~0.offset, #NULL.base, ULTIMATE.start_main_~#t393~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t391~0.offset] because there is no mapped edge [2019-12-07 12:06:00,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L837-1-->L839: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t392~0.base_12|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t392~0.base_12|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t392~0.base_12| 4) |v_#length_13|) (not (= 0 |v_ULTIMATE.start_main_~#t392~0.base_12|)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t392~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t392~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t392~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t392~0.base_12|) |v_ULTIMATE.start_main_~#t392~0.offset_10| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t392~0.base=|v_ULTIMATE.start_main_~#t392~0.base_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t392~0.offset=|v_ULTIMATE.start_main_~#t392~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t392~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t392~0.offset] because there is no mapped edge [2019-12-07 12:06:00,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L839-1-->L841: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t393~0.offset_11|) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t393~0.base_13| 1) |v_#valid_36|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t393~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t393~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t393~0.base_13|) |v_ULTIMATE.start_main_~#t393~0.offset_11| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t393~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t393~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t393~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t393~0.offset=|v_ULTIMATE.start_main_~#t393~0.offset_11|, ULTIMATE.start_main_~#t393~0.base=|v_ULTIMATE.start_main_~#t393~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t393~0.offset, ULTIMATE.start_main_~#t393~0.base] because there is no mapped edge [2019-12-07 12:06:00,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L758: Formula: (and (= ~y~0_In1189180660 ~__unbuffered_p0_EBX~0_Out1189180660) (= ~a$r_buff1_thd3~0_Out1189180660 ~a$r_buff0_thd3~0_In1189180660) (= ~a$r_buff0_thd1~0_In1189180660 ~a$r_buff1_thd1~0_Out1189180660) (= ~a$r_buff1_thd0~0_Out1189180660 ~a$r_buff0_thd0~0_In1189180660) (= ~x~0_Out1189180660 ~__unbuffered_p0_EAX~0_Out1189180660) (= ~x~0_Out1189180660 1) (= ~a$r_buff0_thd1~0_Out1189180660 1) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660 0)) (= ~a$r_buff1_thd2~0_Out1189180660 ~a$r_buff0_thd2~0_In1189180660)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1189180660, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1189180660, ~y~0=~y~0_In1189180660} OutVars{~__unbuffered_p0_EBX~0=~__unbuffered_p0_EBX~0_Out1189180660, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out1189180660, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out1189180660, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out1189180660, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1189180660, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1189180660, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out1189180660, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1189180660, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660, ~y~0=~y~0_In1189180660, ~x~0=~x~0_Out1189180660} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 12:06:00,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-937894682 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-937894682 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-937894682|) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-937894682 |P0Thread1of1ForFork1_#t~ite5_Out-937894682|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-937894682, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-937894682} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-937894682|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-937894682, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-937894682} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:06:00,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L760-->L760-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd1~0_In-1585101839 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-1585101839 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1585101839 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1585101839 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1585101839| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1585101839| ~a$w_buff1_used~0_In-1585101839) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1585101839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1585101839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1585101839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1585101839} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1585101839|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1585101839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1585101839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1585101839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1585101839} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:06:00,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L778-2-->L778-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In2133123573 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In2133123573 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out2133123573| ~a$w_buff1~0_In2133123573) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out2133123573| ~a~0_In2133123573) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In2133123573, ~a$w_buff1~0=~a$w_buff1~0_In2133123573, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573} OutVars{~a~0=~a~0_In2133123573, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out2133123573|, ~a$w_buff1~0=~a$w_buff1~0_In2133123573, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 12:06:00,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~a~0_28) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{~a~0=v_~a~0_28, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_13|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 12:06:00,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L761-->L762: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-45258574 256))) (.cse0 (= ~a$r_buff0_thd1~0_Out-45258574 ~a$r_buff0_thd1~0_In-45258574)) (.cse2 (= (mod ~a$w_buff0_used~0_In-45258574 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= ~a$r_buff0_thd1~0_Out-45258574 0)) (and .cse0 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-45258574, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-45258574} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-45258574|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-45258574, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-45258574} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:06:00,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L762-->L762-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1928924319 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1928924319 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-1928924319 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1928924319 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1928924319|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1928924319| ~a$r_buff1_thd1~0_In-1928924319) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1928924319, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1928924319, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1928924319, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1928924319} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1928924319|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1928924319, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1928924319, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1928924319, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1928924319} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:06:00,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L762-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork1_#t~ite8_34|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:06:00,546 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1426044151 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1426044151 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1426044151|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1426044151 |P1Thread1of1ForFork2_#t~ite11_Out1426044151|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1426044151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1426044151} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1426044151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1426044151, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1426044151|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:06:00,546 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1154043594 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out-1154043594| ~a$w_buff0~0_In-1154043594) (= |P2Thread1of1ForFork0_#t~ite21_Out-1154043594| |P2Thread1of1ForFork0_#t~ite20_Out-1154043594|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1154043594 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-1154043594 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In-1154043594 256) 0)) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1154043594 256)))))) (and (= |P2Thread1of1ForFork0_#t~ite20_In-1154043594| |P2Thread1of1ForFork0_#t~ite20_Out-1154043594|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out-1154043594| ~a$w_buff0~0_In-1154043594)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1154043594, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1154043594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1154043594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1154043594, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1154043594, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1154043594|, ~weak$$choice2~0=~weak$$choice2~0_In-1154043594} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1154043594|, ~a$w_buff0~0=~a$w_buff0~0_In-1154043594, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1154043594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1154043594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1154043594, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1154043594|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1154043594, ~weak$$choice2~0=~weak$$choice2~0_In-1154043594} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 12:06:00,546 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-6436047 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In-6436047| |P2Thread1of1ForFork0_#t~ite23_Out-6436047|) (not .cse0) (= ~a$w_buff1~0_In-6436047 |P2Thread1of1ForFork0_#t~ite24_Out-6436047|)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite24_Out-6436047| |P2Thread1of1ForFork0_#t~ite23_Out-6436047|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-6436047 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-6436047 256)) .cse1) (and (= 0 (mod ~a$r_buff1_thd3~0_In-6436047 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-6436047 256)))) (= ~a$w_buff1~0_In-6436047 |P2Thread1of1ForFork0_#t~ite23_Out-6436047|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-6436047, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047, ~weak$$choice2~0=~weak$$choice2~0_In-6436047} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-6436047, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-6436047|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047, ~weak$$choice2~0=~weak$$choice2~0_In-6436047} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 12:06:00,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L805-->L805-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-451554226 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out-451554226| |P2Thread1of1ForFork0_#t~ite27_Out-451554226|) (= |P2Thread1of1ForFork0_#t~ite26_Out-451554226| ~a$w_buff0_used~0_In-451554226) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-451554226 256) 0))) (or (and (= (mod ~a$w_buff1_used~0_In-451554226 256) 0) .cse0) (= (mod ~a$w_buff0_used~0_In-451554226 256) 0) (and (= (mod ~a$r_buff1_thd3~0_In-451554226 256) 0) .cse0))) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite26_In-451554226| |P2Thread1of1ForFork0_#t~ite26_Out-451554226|) (= |P2Thread1of1ForFork0_#t~ite27_Out-451554226| ~a$w_buff0_used~0_In-451554226) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-451554226|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-451554226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-451554226, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-451554226, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-451554226, ~weak$$choice2~0=~weak$$choice2~0_In-451554226} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-451554226|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-451554226|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-451554226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-451554226, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-451554226, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-451554226, ~weak$$choice2~0=~weak$$choice2~0_In-451554226} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 12:06:00,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_53 v_~a$r_buff0_thd3~0_52) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_53, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_52, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:06:00,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_16 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_16, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 12:06:00,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L814-2-->L814-4: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In1442892500 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1442892500 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1442892500| ~a~0_In1442892500) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1442892500| ~a$w_buff1~0_In1442892500) (not .cse0)))) InVars {~a~0=~a~0_In1442892500, ~a$w_buff1~0=~a$w_buff1~0_In1442892500, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1442892500, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1442892500} OutVars{~a~0=~a~0_In1442892500, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1442892500|, ~a$w_buff1~0=~a$w_buff1~0_In1442892500, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1442892500, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1442892500} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:06:00,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L814-4-->L815: Formula: (= v_~a~0_36 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_36, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:06:00,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-2092120927 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-2092120927 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-2092120927| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-2092120927| ~a$w_buff0_used~0_In-2092120927)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2092120927, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2092120927} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-2092120927|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2092120927, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2092120927} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:06:00,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1501182449 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1501182449 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1501182449 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In1501182449 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out1501182449| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite41_Out1501182449| ~a$w_buff1_used~0_In1501182449) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1501182449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1501182449, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1501182449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1501182449} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1501182449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1501182449, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1501182449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1501182449, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1501182449|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:06:00,550 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-262341295 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-262341295 256) 0))) (or (and (= ~a$r_buff0_thd3~0_In-262341295 |P2Thread1of1ForFork0_#t~ite42_Out-262341295|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-262341295|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-262341295, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-262341295} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-262341295, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-262341295, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-262341295|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:06:00,550 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L818-->L818-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-183389922 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-183389922 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-183389922 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-183389922 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-183389922|)) (and (= ~a$r_buff1_thd3~0_In-183389922 |P2Thread1of1ForFork0_#t~ite43_Out-183389922|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-183389922|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:06:00,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In-854439071 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-854439071 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-854439071 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-854439071 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-854439071|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-854439071 |P1Thread1of1ForFork2_#t~ite12_Out-854439071|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-854439071, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-854439071, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-854439071, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-854439071} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-854439071, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-854439071, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-854439071, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-854439071|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-854439071} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:06:00,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1551876107 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1551876107 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1551876107| 0) (not .cse0) (not .cse1)) (and (= ~a$r_buff0_thd2~0_In1551876107 |P1Thread1of1ForFork2_#t~ite13_Out1551876107|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1551876107, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1551876107} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1551876107, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1551876107, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1551876107|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:06:00,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L782-->L782-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1093184653 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1093184653 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In1093184653 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1093184653 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1093184653|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In1093184653 |P1Thread1of1ForFork2_#t~ite14_Out1093184653|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1093184653, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1093184653, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1093184653, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1093184653} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1093184653, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1093184653, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1093184653, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1093184653, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1093184653|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:06:00,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L818-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_123 |v_P2Thread1of1ForFork0_#t~ite43_32|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_123, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:06:00,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_42| v_~a$r_buff1_thd2~0_99) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_42|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_99, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_41|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:06:00,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_36) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:06:00,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L847-2-->L847-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-635834680 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-635834680 256)))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In-635834680 |ULTIMATE.start_main_#t~ite47_Out-635834680|)) (and (= ~a~0_In-635834680 |ULTIMATE.start_main_#t~ite47_Out-635834680|) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-635834680, ~a$w_buff1~0=~a$w_buff1~0_In-635834680, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-635834680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-635834680} OutVars{~a~0=~a~0_In-635834680, ~a$w_buff1~0=~a$w_buff1~0_In-635834680, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-635834680|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-635834680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-635834680} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 12:06:00,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-4-->L848: Formula: (= v_~a~0_44 |v_ULTIMATE.start_main_#t~ite47_19|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_19|} OutVars{~a~0=v_~a~0_44, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_18|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:06:00,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1665037191 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1665037191 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1665037191| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-1665037191| ~a$w_buff0_used~0_In-1665037191) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1665037191, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1665037191} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1665037191, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1665037191|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1665037191} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:06:00,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1722430003 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1722430003 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In1722430003 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1722430003 256) 0))) (or (and (= ~a$w_buff1_used~0_In1722430003 |ULTIMATE.start_main_#t~ite50_Out1722430003|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out1722430003| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1722430003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1722430003, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1722430003, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1722430003} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1722430003|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1722430003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1722430003, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1722430003, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1722430003} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:06:00,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1100143245 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1100143245 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1100143245| ~a$r_buff0_thd0~0_In-1100143245)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1100143245| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1100143245|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:06:00,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1904379072 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-1904379072 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1904379072 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1904379072 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1904379072| ~a$r_buff1_thd0~0_In-1904379072) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1904379072| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1904379072, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1904379072, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1904379072, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1904379072} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1904379072|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1904379072, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1904379072, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1904379072, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1904379072} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:06:00,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~a$r_buff1_thd0~0_125 |v_ULTIMATE.start_main_#t~ite52_55|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~main$tmp_guard1~0_29 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_29 0) (= 0 v_~__unbuffered_p1_EAX~0_28) (= 1 v_~__unbuffered_p2_EAX~0_26) (= v_~__unbuffered_p0_EBX~0_85 0) (= 1 v_~__unbuffered_p0_EAX~0_85))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_55|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_125, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:06:00,605 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:06:00 BasicIcfg [2019-12-07 12:06:00,605 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:06:00,606 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:06:00,606 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:06:00,606 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:06:00,606 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:04:03" (3/4) ... [2019-12-07 12:06:00,608 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:06:00,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t391~0.base_29|) (= 0 v_~weak$$choice0~0_10) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t391~0.base_29| 4)) (= v_~a$r_buff1_thd0~0_132 0) (= 0 v_~a$w_buff0_used~0_689) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t391~0.base_29| 1)) (= 0 v_~a$w_buff1_used~0_376) (= v_~a$r_buff0_thd3~0_328 0) (= |v_#NULL.offset_6| 0) (= v_~y~0_79 0) (= 0 |v_ULTIMATE.start_main_~#t391~0.offset_22|) (= 0 v_~a$r_buff1_thd1~0_125) (= 0 v_~__unbuffered_p0_EAX~0_92) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~x~0_69 0) (= 0 v_~a$r_buff1_thd2~0_129) (< 0 |v_#StackHeapBarrier_17|) (= v_~__unbuffered_p0_EBX~0_92 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t391~0.base_29|)) (= v_~a$flush_delayed~0_23 0) (= v_~a$r_buff1_thd3~0_224 0) (= v_~__unbuffered_p2_EBX~0_38 0) (= 0 v_~__unbuffered_cnt~0_98) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~a$r_buff0_thd2~0_124) (= v_~a~0_181 0) (= 0 |v_#NULL.base_6|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t391~0.base_29| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t391~0.base_29|) |v_ULTIMATE.start_main_~#t391~0.offset_22| 0)) |v_#memory_int_21|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~a$r_buff0_thd1~0_195) (= v_~a$mem_tmp~0_12 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~a$w_buff1~0_172) (= v_~a$r_buff0_thd0~0_144 0) (= v_~a$w_buff0~0_228 0) (= v_~weak$$choice2~0_107 0) (= v_~z~0_20 0) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_129, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_281|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ~a~0=v_~a~0_181, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_67|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_92, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ULTIMATE.start_main_~#t392~0.base=|v_ULTIMATE.start_main_~#t392~0.base_29|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_92, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_224, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_689, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_195, ~weak$$choice0~0=v_~weak$$choice0~0_10, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_228, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_69, ULTIMATE.start_main_~#t391~0.base=|v_ULTIMATE.start_main_~#t391~0.base_29|, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_124, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_12, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_172, ~y~0=v_~y~0_79, ULTIMATE.start_main_~#t393~0.offset=|v_ULTIMATE.start_main_~#t393~0.offset_15|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_125, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_328, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_~#t392~0.offset=|v_ULTIMATE.start_main_~#t392~0.offset_22|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t393~0.base=|v_ULTIMATE.start_main_~#t393~0.base_17|, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_376, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6, ULTIMATE.start_main_~#t391~0.offset=|v_ULTIMATE.start_main_~#t391~0.offset_22|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t392~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t391~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t393~0.offset, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t392~0.offset, #NULL.base, ULTIMATE.start_main_~#t393~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t391~0.offset] because there is no mapped edge [2019-12-07 12:06:00,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L837-1-->L839: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t392~0.base_12|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t392~0.base_12|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t392~0.base_12| 4) |v_#length_13|) (not (= 0 |v_ULTIMATE.start_main_~#t392~0.base_12|)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t392~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t392~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t392~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t392~0.base_12|) |v_ULTIMATE.start_main_~#t392~0.offset_10| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t392~0.base=|v_ULTIMATE.start_main_~#t392~0.base_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t392~0.offset=|v_ULTIMATE.start_main_~#t392~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t392~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t392~0.offset] because there is no mapped edge [2019-12-07 12:06:00,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L839-1-->L841: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t393~0.offset_11|) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t393~0.base_13| 1) |v_#valid_36|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t393~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t393~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t393~0.base_13|) |v_ULTIMATE.start_main_~#t393~0.offset_11| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t393~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t393~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t393~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t393~0.offset=|v_ULTIMATE.start_main_~#t393~0.offset_11|, ULTIMATE.start_main_~#t393~0.base=|v_ULTIMATE.start_main_~#t393~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t393~0.offset, ULTIMATE.start_main_~#t393~0.base] because there is no mapped edge [2019-12-07 12:06:00,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L758: Formula: (and (= ~y~0_In1189180660 ~__unbuffered_p0_EBX~0_Out1189180660) (= ~a$r_buff1_thd3~0_Out1189180660 ~a$r_buff0_thd3~0_In1189180660) (= ~a$r_buff0_thd1~0_In1189180660 ~a$r_buff1_thd1~0_Out1189180660) (= ~a$r_buff1_thd0~0_Out1189180660 ~a$r_buff0_thd0~0_In1189180660) (= ~x~0_Out1189180660 ~__unbuffered_p0_EAX~0_Out1189180660) (= ~x~0_Out1189180660 1) (= ~a$r_buff0_thd1~0_Out1189180660 1) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660 0)) (= ~a$r_buff1_thd2~0_Out1189180660 ~a$r_buff0_thd2~0_In1189180660)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1189180660, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1189180660, ~y~0=~y~0_In1189180660} OutVars{~__unbuffered_p0_EBX~0=~__unbuffered_p0_EBX~0_Out1189180660, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out1189180660, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out1189180660, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out1189180660, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1189180660, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1189180660, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1189180660, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1189180660, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out1189180660, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1189180660, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1189180660, ~y~0=~y~0_In1189180660, ~x~0=~x~0_Out1189180660} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 12:06:00,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-937894682 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-937894682 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-937894682|) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In-937894682 |P0Thread1of1ForFork1_#t~ite5_Out-937894682|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-937894682, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-937894682} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-937894682|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-937894682, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-937894682} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 12:06:00,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L760-->L760-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd1~0_In-1585101839 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-1585101839 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-1585101839 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1585101839 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1585101839| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1585101839| ~a$w_buff1_used~0_In-1585101839) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1585101839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1585101839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1585101839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1585101839} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1585101839|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1585101839, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1585101839, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1585101839, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1585101839} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 12:06:00,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L778-2-->L778-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In2133123573 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In2133123573 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out2133123573| ~a$w_buff1~0_In2133123573) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out2133123573| ~a~0_In2133123573) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In2133123573, ~a$w_buff1~0=~a$w_buff1~0_In2133123573, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573} OutVars{~a~0=~a~0_In2133123573, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out2133123573|, ~a$w_buff1~0=~a$w_buff1~0_In2133123573, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In2133123573, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2133123573} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 12:06:00,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~a~0_28) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{~a~0=v_~a~0_28, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_13|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 12:06:00,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L761-->L762: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-45258574 256))) (.cse0 (= ~a$r_buff0_thd1~0_Out-45258574 ~a$r_buff0_thd1~0_In-45258574)) (.cse2 (= (mod ~a$w_buff0_used~0_In-45258574 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= ~a$r_buff0_thd1~0_Out-45258574 0)) (and .cse0 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-45258574, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-45258574} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-45258574|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-45258574, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-45258574} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 12:06:00,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L762-->L762-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1928924319 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1928924319 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-1928924319 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1928924319 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1928924319|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1928924319| ~a$r_buff1_thd1~0_In-1928924319) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1928924319, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1928924319, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1928924319, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1928924319} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1928924319|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1928924319, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1928924319, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1928924319, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1928924319} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 12:06:00,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L762-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork1_#t~ite8_34|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 12:06:00,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1426044151 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1426044151 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1426044151|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1426044151 |P1Thread1of1ForFork2_#t~ite11_Out1426044151|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1426044151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1426044151} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1426044151, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1426044151, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1426044151|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 12:06:00,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1154043594 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out-1154043594| ~a$w_buff0~0_In-1154043594) (= |P2Thread1of1ForFork0_#t~ite21_Out-1154043594| |P2Thread1of1ForFork0_#t~ite20_Out-1154043594|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1154043594 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-1154043594 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In-1154043594 256) 0)) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1154043594 256)))))) (and (= |P2Thread1of1ForFork0_#t~ite20_In-1154043594| |P2Thread1of1ForFork0_#t~ite20_Out-1154043594|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out-1154043594| ~a$w_buff0~0_In-1154043594)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1154043594, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1154043594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1154043594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1154043594, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1154043594, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1154043594|, ~weak$$choice2~0=~weak$$choice2~0_In-1154043594} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1154043594|, ~a$w_buff0~0=~a$w_buff0~0_In-1154043594, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1154043594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1154043594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1154043594, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1154043594|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1154043594, ~weak$$choice2~0=~weak$$choice2~0_In-1154043594} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 12:06:00,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-6436047 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In-6436047| |P2Thread1of1ForFork0_#t~ite23_Out-6436047|) (not .cse0) (= ~a$w_buff1~0_In-6436047 |P2Thread1of1ForFork0_#t~ite24_Out-6436047|)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite24_Out-6436047| |P2Thread1of1ForFork0_#t~ite23_Out-6436047|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-6436047 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-6436047 256)) .cse1) (and (= 0 (mod ~a$r_buff1_thd3~0_In-6436047 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-6436047 256)))) (= ~a$w_buff1~0_In-6436047 |P2Thread1of1ForFork0_#t~ite23_Out-6436047|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-6436047, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047, ~weak$$choice2~0=~weak$$choice2~0_In-6436047} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-6436047, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-6436047|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-6436047|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6436047, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-6436047, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-6436047, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6436047, ~weak$$choice2~0=~weak$$choice2~0_In-6436047} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 12:06:00,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L805-->L805-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-451554226 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out-451554226| |P2Thread1of1ForFork0_#t~ite27_Out-451554226|) (= |P2Thread1of1ForFork0_#t~ite26_Out-451554226| ~a$w_buff0_used~0_In-451554226) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-451554226 256) 0))) (or (and (= (mod ~a$w_buff1_used~0_In-451554226 256) 0) .cse0) (= (mod ~a$w_buff0_used~0_In-451554226 256) 0) (and (= (mod ~a$r_buff1_thd3~0_In-451554226 256) 0) .cse0))) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite26_In-451554226| |P2Thread1of1ForFork0_#t~ite26_Out-451554226|) (= |P2Thread1of1ForFork0_#t~ite27_Out-451554226| ~a$w_buff0_used~0_In-451554226) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-451554226|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-451554226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-451554226, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-451554226, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-451554226, ~weak$$choice2~0=~weak$$choice2~0_In-451554226} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-451554226|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-451554226|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-451554226, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-451554226, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-451554226, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-451554226, ~weak$$choice2~0=~weak$$choice2~0_In-451554226} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 12:06:00,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_53 v_~a$r_buff0_thd3~0_52) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_53, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_52, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:06:00,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_16 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_16, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 12:06:00,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L814-2-->L814-4: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In1442892500 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1442892500 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1442892500| ~a~0_In1442892500) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1442892500| ~a$w_buff1~0_In1442892500) (not .cse0)))) InVars {~a~0=~a~0_In1442892500, ~a$w_buff1~0=~a$w_buff1~0_In1442892500, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1442892500, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1442892500} OutVars{~a~0=~a~0_In1442892500, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1442892500|, ~a$w_buff1~0=~a$w_buff1~0_In1442892500, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1442892500, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1442892500} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:06:00,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L814-4-->L815: Formula: (= v_~a~0_36 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_36, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 12:06:00,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-2092120927 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-2092120927 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out-2092120927| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-2092120927| ~a$w_buff0_used~0_In-2092120927)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-2092120927, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2092120927} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-2092120927|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2092120927, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2092120927} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 12:06:00,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1501182449 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1501182449 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1501182449 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In1501182449 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out1501182449| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite41_Out1501182449| ~a$w_buff1_used~0_In1501182449) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1501182449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1501182449, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1501182449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1501182449} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1501182449, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1501182449, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1501182449, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1501182449, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1501182449|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 12:06:00,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-262341295 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-262341295 256) 0))) (or (and (= ~a$r_buff0_thd3~0_In-262341295 |P2Thread1of1ForFork0_#t~ite42_Out-262341295|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-262341295|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-262341295, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-262341295} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-262341295, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-262341295, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-262341295|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 12:06:00,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L818-->L818-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-183389922 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-183389922 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-183389922 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-183389922 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-183389922|)) (and (= ~a$r_buff1_thd3~0_In-183389922 |P2Thread1of1ForFork0_#t~ite43_Out-183389922|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-183389922|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-183389922, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183389922, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-183389922, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-183389922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 12:06:00,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In-854439071 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-854439071 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-854439071 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-854439071 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-854439071|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-854439071 |P1Thread1of1ForFork2_#t~ite12_Out-854439071|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-854439071, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-854439071, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-854439071, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-854439071} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-854439071, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-854439071, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-854439071, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-854439071|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-854439071} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 12:06:00,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L781-->L781-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1551876107 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1551876107 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1551876107| 0) (not .cse0) (not .cse1)) (and (= ~a$r_buff0_thd2~0_In1551876107 |P1Thread1of1ForFork2_#t~ite13_Out1551876107|) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1551876107, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1551876107} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1551876107, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1551876107, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1551876107|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 12:06:00,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L782-->L782-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1093184653 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1093184653 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In1093184653 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1093184653 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1093184653|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In1093184653 |P1Thread1of1ForFork2_#t~ite14_Out1093184653|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1093184653, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1093184653, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1093184653, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1093184653} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1093184653, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1093184653, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1093184653, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1093184653, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1093184653|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 12:06:00,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L818-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_123 |v_P2Thread1of1ForFork0_#t~ite43_32|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_123, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 12:06:00,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_42| v_~a$r_buff1_thd2~0_99) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_42|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_99, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_41|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 12:06:00,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_36) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:06:00,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L847-2-->L847-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-635834680 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-635834680 256)))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In-635834680 |ULTIMATE.start_main_#t~ite47_Out-635834680|)) (and (= ~a~0_In-635834680 |ULTIMATE.start_main_#t~ite47_Out-635834680|) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In-635834680, ~a$w_buff1~0=~a$w_buff1~0_In-635834680, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-635834680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-635834680} OutVars{~a~0=~a~0_In-635834680, ~a$w_buff1~0=~a$w_buff1~0_In-635834680, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-635834680|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-635834680, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-635834680} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 12:06:00,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-4-->L848: Formula: (= v_~a~0_44 |v_ULTIMATE.start_main_#t~ite47_19|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_19|} OutVars{~a~0=v_~a~0_44, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_18|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:06:00,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1665037191 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1665037191 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-1665037191| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-1665037191| ~a$w_buff0_used~0_In-1665037191) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1665037191, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1665037191} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1665037191, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1665037191|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1665037191} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 12:06:00,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd0~0_In1722430003 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1722430003 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In1722430003 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1722430003 256) 0))) (or (and (= ~a$w_buff1_used~0_In1722430003 |ULTIMATE.start_main_#t~ite50_Out1722430003|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out1722430003| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1722430003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1722430003, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1722430003, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1722430003} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1722430003|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1722430003, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1722430003, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1722430003, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1722430003} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 12:06:00,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1100143245 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1100143245 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1100143245| ~a$r_buff0_thd0~0_In-1100143245)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1100143245| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1100143245|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1100143245, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1100143245} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 12:06:00,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1904379072 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-1904379072 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1904379072 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1904379072 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1904379072| ~a$r_buff1_thd0~0_In-1904379072) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1904379072| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1904379072, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1904379072, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1904379072, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1904379072} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1904379072|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1904379072, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1904379072, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1904379072, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1904379072} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 12:06:00,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~a$r_buff1_thd0~0_125 |v_ULTIMATE.start_main_#t~ite52_55|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~main$tmp_guard1~0_29 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_29 0) (= 0 v_~__unbuffered_p1_EAX~0_28) (= 1 v_~__unbuffered_p2_EAX~0_26) (= v_~__unbuffered_p0_EBX~0_85 0) (= 1 v_~__unbuffered_p0_EAX~0_85))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_55|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_125, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:06:00,669 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_326cb2b9-287f-471b-81d9-5b7ddb17e22b/bin/uautomizer/witness.graphml [2019-12-07 12:06:00,669 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:06:00,670 INFO L168 Benchmark]: Toolchain (without parser) took 117917.73 ms. Allocated memory was 1.0 GB in the beginning and 8.1 GB in the end (delta: 7.1 GB). Free memory was 932.6 MB in the beginning and 3.8 GB in the end (delta: -2.9 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 12:06:00,671 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:06:00,671 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 932.6 MB in the beginning and 1.1 GB in the end (delta: -136.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 12:06:00,671 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:06:00,671 INFO L168 Benchmark]: Boogie Preprocessor took 26.39 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:06:00,672 INFO L168 Benchmark]: RCFGBuilder took 426.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 62.2 MB). Peak memory consumption was 62.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:06:00,672 INFO L168 Benchmark]: TraceAbstraction took 116966.55 ms. Allocated memory was 1.1 GB in the beginning and 8.1 GB in the end (delta: 7.0 GB). Free memory was 1.0 GB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 12:06:00,672 INFO L168 Benchmark]: Witness Printer took 63.76 ms. Allocated memory is still 8.1 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 11.5 GB. [2019-12-07 12:06:00,673 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 932.6 MB in the beginning and 1.1 GB in the end (delta: -136.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.39 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 426.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 62.2 MB). Peak memory consumption was 62.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 116966.55 ms. Allocated memory was 1.1 GB in the beginning and 8.1 GB in the end (delta: 7.0 GB). Free memory was 1.0 GB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. * Witness Printer took 63.76 ms. Allocated memory is still 8.1 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 179 ProgramPointsBefore, 94 ProgramPointsAfterwards, 216 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 33 ChoiceCompositions, 7151 VarBasedMoverChecksPositive, 221 VarBasedMoverChecksNegative, 29 SemBasedMoverChecksPositive, 258 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 80759 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t391, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t392, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L841] FCALL, FORK 0 pthread_create(&t393, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 a$w_buff1 = a$w_buff0 [L738] 1 a$w_buff0 = 1 [L739] 1 a$w_buff1_used = a$w_buff0_used [L740] 1 a$w_buff0_used = (_Bool)1 [L758] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L772] 2 y = 1 [L775] 2 __unbuffered_p1_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L758] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L759] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L760] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 116.8s, OverallIterations: 38, TraceHistogramMax: 1, AutomataDifference: 29.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7981 SDtfs, 11360 SDslu, 26528 SDs, 0 SdLazy, 20071 SolverSat, 599 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 515 GetRequests, 61 SyntacticMatches, 22 SemanticMatches, 432 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2338 ImplicationChecksByTransitivity, 4.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=196221occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 64.4s AutomataMinimizationTime, 37 MinimizatonAttempts, 335586 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 1700 NumberOfCodeBlocks, 1700 NumberOfCodeBlocksAsserted, 38 NumberOfCheckSat, 1596 ConstructedInterpolants, 0 QuantifiedInterpolants, 678307 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 37 InterpolantComputations, 37 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...