./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix016_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix016_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1c2d021cf451e03b79f39859914612811d76f30b ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:17:15,135 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:17:15,136 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:17:15,144 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:17:15,144 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:17:15,145 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:17:15,145 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:17:15,147 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:17:15,148 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:17:15,148 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:17:15,149 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:17:15,150 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:17:15,150 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:17:15,151 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:17:15,151 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:17:15,152 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:17:15,153 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:17:15,153 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:17:15,154 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:17:15,156 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:17:15,157 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:17:15,158 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:17:15,158 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:17:15,159 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:17:15,160 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:17:15,161 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:17:15,161 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:17:15,161 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:17:15,161 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:17:15,162 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:17:15,162 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:17:15,163 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:17:15,163 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:17:15,163 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:17:15,164 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:17:15,164 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:17:15,164 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:17:15,165 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:17:15,165 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:17:15,165 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:17:15,166 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:17:15,166 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:17:15,176 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:17:15,176 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:17:15,177 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:17:15,177 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:17:15,177 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:17:15,177 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:17:15,177 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:17:15,177 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:17:15,177 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:17:15,178 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:17:15,178 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:17:15,178 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:17:15,178 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:17:15,178 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:17:15,178 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:17:15,178 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:17:15,178 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:17:15,179 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:17:15,179 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:17:15,179 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:17:15,179 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:17:15,179 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:17:15,179 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:17:15,179 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:17:15,179 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:17:15,180 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:17:15,180 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:17:15,180 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:17:15,180 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:17:15,180 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1c2d021cf451e03b79f39859914612811d76f30b [2019-12-07 14:17:15,278 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:17:15,288 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:17:15,291 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:17:15,292 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:17:15,293 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:17:15,293 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix016_power.oepc.i [2019-12-07 14:17:15,333 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/data/7ae505515/f49d7ffda27245c0a74c975412feb3aa/FLAGe4b3b62b7 [2019-12-07 14:17:15,815 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:17:15,815 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/sv-benchmarks/c/pthread-wmm/mix016_power.oepc.i [2019-12-07 14:17:15,826 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/data/7ae505515/f49d7ffda27245c0a74c975412feb3aa/FLAGe4b3b62b7 [2019-12-07 14:17:15,835 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/data/7ae505515/f49d7ffda27245c0a74c975412feb3aa [2019-12-07 14:17:15,837 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:17:15,838 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:17:15,839 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:17:15,839 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:17:15,841 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:17:15,842 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:17:15" (1/1) ... [2019-12-07 14:17:15,844 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d8e373 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:15, skipping insertion in model container [2019-12-07 14:17:15,844 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:17:15" (1/1) ... [2019-12-07 14:17:15,849 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:17:15,879 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:17:16,115 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:17:16,123 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:17:16,165 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:17:16,211 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:17:16,211 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16 WrapperNode [2019-12-07 14:17:16,211 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:17:16,212 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:17:16,212 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:17:16,212 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:17:16,217 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,230 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,249 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:17:16,249 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:17:16,249 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:17:16,249 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:17:16,256 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,256 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,259 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,259 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,266 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,269 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,272 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... [2019-12-07 14:17:16,275 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:17:16,275 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:17:16,275 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:17:16,275 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:17:16,276 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:17:16,318 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:17:16,319 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:17:16,319 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:17:16,319 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:17:16,319 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:17:16,319 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:17:16,319 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:17:16,319 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:17:16,319 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:17:16,319 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:17:16,319 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:17:16,320 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:17:16,320 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:17:16,321 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:17:16,708 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:17:16,708 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:17:16,709 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:17:16 BoogieIcfgContainer [2019-12-07 14:17:16,709 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:17:16,710 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:17:16,710 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:17:16,712 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:17:16,712 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:17:15" (1/3) ... [2019-12-07 14:17:16,713 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@772929e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:17:16, skipping insertion in model container [2019-12-07 14:17:16,713 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:17:16" (2/3) ... [2019-12-07 14:17:16,713 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@772929e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:17:16, skipping insertion in model container [2019-12-07 14:17:16,713 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:17:16" (3/3) ... [2019-12-07 14:17:16,715 INFO L109 eAbstractionObserver]: Analyzing ICFG mix016_power.oepc.i [2019-12-07 14:17:16,723 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:17:16,723 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:17:16,730 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:17:16,730 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:17:16,758 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,759 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,759 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,759 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,759 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,759 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,759 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,759 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,763 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,763 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:17:16,789 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:17:16,802 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:17:16,802 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:17:16,802 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:17:16,802 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:17:16,802 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:17:16,802 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:17:16,802 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:17:16,802 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:17:16,813 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 14:17:16,814 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 14:17:16,870 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 14:17:16,870 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:17:16,880 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 704 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:17:16,895 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 14:17:16,927 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 14:17:16,927 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:17:16,932 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 704 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:17:16,948 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 14:17:16,948 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:17:19,729 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 84 [2019-12-07 14:17:19,941 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-12-07 14:17:20,123 INFO L206 etLargeBlockEncoding]: Checked pairs total: 89688 [2019-12-07 14:17:20,124 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 14:17:20,126 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 101 transitions [2019-12-07 14:17:32,352 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 106864 states. [2019-12-07 14:17:32,353 INFO L276 IsEmpty]: Start isEmpty. Operand 106864 states. [2019-12-07 14:17:32,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 14:17:32,357 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:17:32,357 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 14:17:32,358 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:17:32,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:17:32,361 INFO L82 PathProgramCache]: Analyzing trace with hash 921701, now seen corresponding path program 1 times [2019-12-07 14:17:32,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:17:32,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104841439] [2019-12-07 14:17:32,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:17:32,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:17:32,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:17:32,505 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104841439] [2019-12-07 14:17:32,506 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:17:32,506 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:17:32,507 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785000851] [2019-12-07 14:17:32,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:17:32,510 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:17:32,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:17:32,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:17:32,521 INFO L87 Difference]: Start difference. First operand 106864 states. Second operand 3 states. [2019-12-07 14:17:33,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:17:33,337 INFO L93 Difference]: Finished difference Result 106034 states and 453004 transitions. [2019-12-07 14:17:33,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:17:33,338 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 14:17:33,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:17:33,895 INFO L225 Difference]: With dead ends: 106034 [2019-12-07 14:17:33,895 INFO L226 Difference]: Without dead ends: 99950 [2019-12-07 14:17:33,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:17:37,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99950 states. [2019-12-07 14:17:38,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99950 to 99950. [2019-12-07 14:17:38,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99950 states. [2019-12-07 14:17:41,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99950 states to 99950 states and 426445 transitions. [2019-12-07 14:17:41,030 INFO L78 Accepts]: Start accepts. Automaton has 99950 states and 426445 transitions. Word has length 3 [2019-12-07 14:17:41,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:17:41,031 INFO L462 AbstractCegarLoop]: Abstraction has 99950 states and 426445 transitions. [2019-12-07 14:17:41,031 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:17:41,031 INFO L276 IsEmpty]: Start isEmpty. Operand 99950 states and 426445 transitions. [2019-12-07 14:17:41,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:17:41,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:17:41,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:17:41,034 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:17:41,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:17:41,035 INFO L82 PathProgramCache]: Analyzing trace with hash 1680645281, now seen corresponding path program 1 times [2019-12-07 14:17:41,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:17:41,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1421878976] [2019-12-07 14:17:41,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:17:41,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:17:41,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:17:41,107 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1421878976] [2019-12-07 14:17:41,107 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:17:41,107 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:17:41,107 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960029103] [2019-12-07 14:17:41,108 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:17:41,108 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:17:41,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:17:41,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:17:41,109 INFO L87 Difference]: Start difference. First operand 99950 states and 426445 transitions. Second operand 4 states. [2019-12-07 14:17:41,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:17:41,884 INFO L93 Difference]: Finished difference Result 159384 states and 652094 transitions. [2019-12-07 14:17:41,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:17:41,885 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 14:17:41,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:17:42,281 INFO L225 Difference]: With dead ends: 159384 [2019-12-07 14:17:42,282 INFO L226 Difference]: Without dead ends: 159335 [2019-12-07 14:17:42,282 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:17:46,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159335 states. [2019-12-07 14:17:48,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159335 to 143879. [2019-12-07 14:17:48,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143879 states. [2019-12-07 14:17:49,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143879 states to 143879 states and 597281 transitions. [2019-12-07 14:17:49,317 INFO L78 Accepts]: Start accepts. Automaton has 143879 states and 597281 transitions. Word has length 11 [2019-12-07 14:17:49,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:17:49,317 INFO L462 AbstractCegarLoop]: Abstraction has 143879 states and 597281 transitions. [2019-12-07 14:17:49,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:17:49,318 INFO L276 IsEmpty]: Start isEmpty. Operand 143879 states and 597281 transitions. [2019-12-07 14:17:49,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:17:49,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:17:49,323 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:17:49,323 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:17:49,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:17:49,324 INFO L82 PathProgramCache]: Analyzing trace with hash -1535099311, now seen corresponding path program 1 times [2019-12-07 14:17:49,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:17:49,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770249854] [2019-12-07 14:17:49,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:17:49,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:17:49,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:17:49,384 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1770249854] [2019-12-07 14:17:49,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:17:49,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:17:49,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744079506] [2019-12-07 14:17:49,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:17:49,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:17:49,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:17:49,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:17:49,385 INFO L87 Difference]: Start difference. First operand 143879 states and 597281 transitions. Second operand 4 states. [2019-12-07 14:17:50,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:17:50,406 INFO L93 Difference]: Finished difference Result 202801 states and 822791 transitions. [2019-12-07 14:17:50,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:17:50,407 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:17:50,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:17:50,921 INFO L225 Difference]: With dead ends: 202801 [2019-12-07 14:17:50,921 INFO L226 Difference]: Without dead ends: 202745 [2019-12-07 14:17:50,921 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:17:57,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202745 states. [2019-12-07 14:17:59,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202745 to 170256. [2019-12-07 14:17:59,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170256 states. [2019-12-07 14:18:00,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170256 states to 170256 states and 703222 transitions. [2019-12-07 14:18:00,376 INFO L78 Accepts]: Start accepts. Automaton has 170256 states and 703222 transitions. Word has length 13 [2019-12-07 14:18:00,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:00,377 INFO L462 AbstractCegarLoop]: Abstraction has 170256 states and 703222 transitions. [2019-12-07 14:18:00,377 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:18:00,377 INFO L276 IsEmpty]: Start isEmpty. Operand 170256 states and 703222 transitions. [2019-12-07 14:18:00,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 14:18:00,383 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:00,384 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:00,384 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:00,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:00,384 INFO L82 PathProgramCache]: Analyzing trace with hash 1228744872, now seen corresponding path program 1 times [2019-12-07 14:18:00,384 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:00,384 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10923632] [2019-12-07 14:18:00,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:00,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:00,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:00,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10923632] [2019-12-07 14:18:00,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:00,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:18:00,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051336488] [2019-12-07 14:18:00,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:18:00,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:00,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:18:00,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:18:00,435 INFO L87 Difference]: Start difference. First operand 170256 states and 703222 transitions. Second operand 4 states. [2019-12-07 14:18:01,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:01,783 INFO L93 Difference]: Finished difference Result 214467 states and 881100 transitions. [2019-12-07 14:18:01,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:18:01,784 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 14:18:01,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:02,336 INFO L225 Difference]: With dead ends: 214467 [2019-12-07 14:18:02,336 INFO L226 Difference]: Without dead ends: 214467 [2019-12-07 14:18:02,336 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:18:07,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214467 states. [2019-12-07 14:18:12,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214467 to 183252. [2019-12-07 14:18:12,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183252 states. [2019-12-07 14:18:13,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183252 states to 183252 states and 757164 transitions. [2019-12-07 14:18:13,254 INFO L78 Accepts]: Start accepts. Automaton has 183252 states and 757164 transitions. Word has length 16 [2019-12-07 14:18:13,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:13,254 INFO L462 AbstractCegarLoop]: Abstraction has 183252 states and 757164 transitions. [2019-12-07 14:18:13,254 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:18:13,254 INFO L276 IsEmpty]: Start isEmpty. Operand 183252 states and 757164 transitions. [2019-12-07 14:18:13,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 14:18:13,262 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:13,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:13,262 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:13,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:13,263 INFO L82 PathProgramCache]: Analyzing trace with hash 1228651655, now seen corresponding path program 1 times [2019-12-07 14:18:13,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:13,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945767646] [2019-12-07 14:18:13,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:13,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:13,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:13,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945767646] [2019-12-07 14:18:13,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:13,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:18:13,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706711600] [2019-12-07 14:18:13,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:18:13,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:13,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:18:13,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:18:13,321 INFO L87 Difference]: Start difference. First operand 183252 states and 757164 transitions. Second operand 4 states. [2019-12-07 14:18:14,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:14,356 INFO L93 Difference]: Finished difference Result 223450 states and 919042 transitions. [2019-12-07 14:18:14,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:18:14,357 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 14:18:14,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:14,949 INFO L225 Difference]: With dead ends: 223450 [2019-12-07 14:18:14,949 INFO L226 Difference]: Without dead ends: 223450 [2019-12-07 14:18:14,949 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:18:20,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223450 states. [2019-12-07 14:18:22,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223450 to 182620. [2019-12-07 14:18:22,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182620 states. [2019-12-07 14:18:23,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182620 states to 182620 states and 754482 transitions. [2019-12-07 14:18:23,300 INFO L78 Accepts]: Start accepts. Automaton has 182620 states and 754482 transitions. Word has length 16 [2019-12-07 14:18:23,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:23,301 INFO L462 AbstractCegarLoop]: Abstraction has 182620 states and 754482 transitions. [2019-12-07 14:18:23,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:18:23,301 INFO L276 IsEmpty]: Start isEmpty. Operand 182620 states and 754482 transitions. [2019-12-07 14:18:23,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:18:23,310 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:23,310 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:23,310 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:23,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:23,310 INFO L82 PathProgramCache]: Analyzing trace with hash -1477868963, now seen corresponding path program 1 times [2019-12-07 14:18:23,310 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:23,310 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [338780142] [2019-12-07 14:18:23,311 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:23,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:23,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:23,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [338780142] [2019-12-07 14:18:23,355 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:23,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:18:23,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1489269897] [2019-12-07 14:18:23,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:18:23,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:23,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:18:23,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:18:23,356 INFO L87 Difference]: Start difference. First operand 182620 states and 754482 transitions. Second operand 3 states. [2019-12-07 14:18:24,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:24,030 INFO L93 Difference]: Finished difference Result 172048 states and 702793 transitions. [2019-12-07 14:18:24,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:18:24,030 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:18:24,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:24,435 INFO L225 Difference]: With dead ends: 172048 [2019-12-07 14:18:24,435 INFO L226 Difference]: Without dead ends: 172048 [2019-12-07 14:18:24,436 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:18:28,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172048 states. [2019-12-07 14:18:30,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172048 to 168916. [2019-12-07 14:18:30,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168916 states. [2019-12-07 14:18:34,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168916 states to 168916 states and 691209 transitions. [2019-12-07 14:18:34,169 INFO L78 Accepts]: Start accepts. Automaton has 168916 states and 691209 transitions. Word has length 18 [2019-12-07 14:18:34,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:34,169 INFO L462 AbstractCegarLoop]: Abstraction has 168916 states and 691209 transitions. [2019-12-07 14:18:34,169 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:18:34,169 INFO L276 IsEmpty]: Start isEmpty. Operand 168916 states and 691209 transitions. [2019-12-07 14:18:34,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:18:34,176 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:34,177 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:34,177 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:34,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:34,177 INFO L82 PathProgramCache]: Analyzing trace with hash 1555984850, now seen corresponding path program 1 times [2019-12-07 14:18:34,177 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:34,177 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143944170] [2019-12-07 14:18:34,177 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:34,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:34,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:34,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143944170] [2019-12-07 14:18:34,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:34,221 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:18:34,221 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6972079] [2019-12-07 14:18:34,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:18:34,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:34,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:18:34,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:18:34,221 INFO L87 Difference]: Start difference. First operand 168916 states and 691209 transitions. Second operand 3 states. [2019-12-07 14:18:34,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:34,857 INFO L93 Difference]: Finished difference Result 170314 states and 694707 transitions. [2019-12-07 14:18:34,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:18:34,857 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:18:34,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:35,257 INFO L225 Difference]: With dead ends: 170314 [2019-12-07 14:18:35,257 INFO L226 Difference]: Without dead ends: 170314 [2019-12-07 14:18:35,257 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:18:39,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170314 states. [2019-12-07 14:18:41,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170314 to 168913. [2019-12-07 14:18:41,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168913 states. [2019-12-07 14:18:42,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168913 states to 168913 states and 691197 transitions. [2019-12-07 14:18:42,178 INFO L78 Accepts]: Start accepts. Automaton has 168913 states and 691197 transitions. Word has length 18 [2019-12-07 14:18:42,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:42,178 INFO L462 AbstractCegarLoop]: Abstraction has 168913 states and 691197 transitions. [2019-12-07 14:18:42,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:18:42,178 INFO L276 IsEmpty]: Start isEmpty. Operand 168913 states and 691197 transitions. [2019-12-07 14:18:42,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:18:42,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:42,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:42,188 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:42,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:42,188 INFO L82 PathProgramCache]: Analyzing trace with hash 2011667091, now seen corresponding path program 1 times [2019-12-07 14:18:42,188 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:42,188 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187270818] [2019-12-07 14:18:42,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:42,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:42,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:42,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187270818] [2019-12-07 14:18:42,245 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:42,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:18:42,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161435389] [2019-12-07 14:18:42,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:18:42,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:42,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:18:42,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:18:42,247 INFO L87 Difference]: Start difference. First operand 168913 states and 691197 transitions. Second operand 5 states. [2019-12-07 14:18:43,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:43,618 INFO L93 Difference]: Finished difference Result 249917 states and 1003264 transitions. [2019-12-07 14:18:43,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:18:43,618 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:18:43,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:44,728 INFO L225 Difference]: With dead ends: 249917 [2019-12-07 14:18:44,729 INFO L226 Difference]: Without dead ends: 249826 [2019-12-07 14:18:44,729 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:18:49,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249826 states. [2019-12-07 14:18:52,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249826 to 180631. [2019-12-07 14:18:52,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180631 states. [2019-12-07 14:18:52,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180631 states to 180631 states and 738747 transitions. [2019-12-07 14:18:52,873 INFO L78 Accepts]: Start accepts. Automaton has 180631 states and 738747 transitions. Word has length 19 [2019-12-07 14:18:52,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:52,873 INFO L462 AbstractCegarLoop]: Abstraction has 180631 states and 738747 transitions. [2019-12-07 14:18:52,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:18:52,873 INFO L276 IsEmpty]: Start isEmpty. Operand 180631 states and 738747 transitions. [2019-12-07 14:18:52,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:18:52,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:52,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:52,883 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:52,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:52,883 INFO L82 PathProgramCache]: Analyzing trace with hash 1711322616, now seen corresponding path program 1 times [2019-12-07 14:18:52,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:52,883 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1631416063] [2019-12-07 14:18:52,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:52,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:52,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:52,917 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1631416063] [2019-12-07 14:18:52,917 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:52,917 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:18:52,918 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [493076226] [2019-12-07 14:18:52,918 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:18:52,918 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:52,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:18:52,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:18:52,918 INFO L87 Difference]: Start difference. First operand 180631 states and 738747 transitions. Second operand 4 states. [2019-12-07 14:18:53,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:53,090 INFO L93 Difference]: Finished difference Result 49477 states and 169015 transitions. [2019-12-07 14:18:53,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:18:53,091 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 14:18:53,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:53,151 INFO L225 Difference]: With dead ends: 49477 [2019-12-07 14:18:53,151 INFO L226 Difference]: Without dead ends: 38016 [2019-12-07 14:18:53,151 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:18:53,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38016 states. [2019-12-07 14:18:53,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38016 to 37911. [2019-12-07 14:18:53,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37911 states. [2019-12-07 14:18:55,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37911 states to 37911 states and 122210 transitions. [2019-12-07 14:18:55,488 INFO L78 Accepts]: Start accepts. Automaton has 37911 states and 122210 transitions. Word has length 19 [2019-12-07 14:18:55,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:55,488 INFO L462 AbstractCegarLoop]: Abstraction has 37911 states and 122210 transitions. [2019-12-07 14:18:55,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:18:55,488 INFO L276 IsEmpty]: Start isEmpty. Operand 37911 states and 122210 transitions. [2019-12-07 14:18:55,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:18:55,493 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:55,493 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:55,493 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:55,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:55,493 INFO L82 PathProgramCache]: Analyzing trace with hash -1838789338, now seen corresponding path program 1 times [2019-12-07 14:18:55,493 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:55,493 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1878202093] [2019-12-07 14:18:55,493 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:55,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:55,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:55,555 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1878202093] [2019-12-07 14:18:55,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:55,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:18:55,555 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769040633] [2019-12-07 14:18:55,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:18:55,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:55,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:18:55,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:18:55,556 INFO L87 Difference]: Start difference. First operand 37911 states and 122210 transitions. Second operand 5 states. [2019-12-07 14:18:55,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:55,965 INFO L93 Difference]: Finished difference Result 56118 states and 178431 transitions. [2019-12-07 14:18:55,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:18:55,965 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:18:55,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:56,047 INFO L225 Difference]: With dead ends: 56118 [2019-12-07 14:18:56,047 INFO L226 Difference]: Without dead ends: 56062 [2019-12-07 14:18:56,047 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:18:56,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56062 states. [2019-12-07 14:18:56,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56062 to 41136. [2019-12-07 14:18:56,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41136 states. [2019-12-07 14:18:56,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41136 states to 41136 states and 132447 transitions. [2019-12-07 14:18:56,772 INFO L78 Accepts]: Start accepts. Automaton has 41136 states and 132447 transitions. Word has length 22 [2019-12-07 14:18:56,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:56,772 INFO L462 AbstractCegarLoop]: Abstraction has 41136 states and 132447 transitions. [2019-12-07 14:18:56,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:18:56,773 INFO L276 IsEmpty]: Start isEmpty. Operand 41136 states and 132447 transitions. [2019-12-07 14:18:56,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:18:56,777 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:56,777 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:56,777 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:56,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:56,777 INFO L82 PathProgramCache]: Analyzing trace with hash -1838882555, now seen corresponding path program 1 times [2019-12-07 14:18:56,778 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:56,778 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556129751] [2019-12-07 14:18:56,778 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:56,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:56,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:56,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [556129751] [2019-12-07 14:18:56,825 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:56,825 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:18:56,825 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268926517] [2019-12-07 14:18:56,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:18:56,826 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:56,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:18:56,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:18:56,826 INFO L87 Difference]: Start difference. First operand 41136 states and 132447 transitions. Second operand 5 states. [2019-12-07 14:18:57,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:57,246 INFO L93 Difference]: Finished difference Result 56629 states and 179978 transitions. [2019-12-07 14:18:57,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:18:57,246 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:18:57,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:57,329 INFO L225 Difference]: With dead ends: 56629 [2019-12-07 14:18:57,329 INFO L226 Difference]: Without dead ends: 56573 [2019-12-07 14:18:57,329 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:18:57,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56573 states. [2019-12-07 14:18:57,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56573 to 38734. [2019-12-07 14:18:57,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38734 states. [2019-12-07 14:18:58,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38734 states to 38734 states and 124522 transitions. [2019-12-07 14:18:58,161 INFO L78 Accepts]: Start accepts. Automaton has 38734 states and 124522 transitions. Word has length 22 [2019-12-07 14:18:58,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:58,161 INFO L462 AbstractCegarLoop]: Abstraction has 38734 states and 124522 transitions. [2019-12-07 14:18:58,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:18:58,161 INFO L276 IsEmpty]: Start isEmpty. Operand 38734 states and 124522 transitions. [2019-12-07 14:18:58,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:18:58,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:58,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:58,171 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:58,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:58,171 INFO L82 PathProgramCache]: Analyzing trace with hash 270212897, now seen corresponding path program 1 times [2019-12-07 14:18:58,171 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:58,171 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572903232] [2019-12-07 14:18:58,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:58,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:58,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:58,189 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572903232] [2019-12-07 14:18:58,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:58,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:18:58,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1220999944] [2019-12-07 14:18:58,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:18:58,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:58,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:18:58,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:18:58,190 INFO L87 Difference]: Start difference. First operand 38734 states and 124522 transitions. Second operand 3 states. [2019-12-07 14:18:58,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:58,351 INFO L93 Difference]: Finished difference Result 59172 states and 189189 transitions. [2019-12-07 14:18:58,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:18:58,352 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 14:18:58,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:58,437 INFO L225 Difference]: With dead ends: 59172 [2019-12-07 14:18:58,437 INFO L226 Difference]: Without dead ends: 59172 [2019-12-07 14:18:58,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:18:58,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59172 states. [2019-12-07 14:18:59,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59172 to 45762. [2019-12-07 14:18:59,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45762 states. [2019-12-07 14:18:59,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45762 states to 45762 states and 147373 transitions. [2019-12-07 14:18:59,231 INFO L78 Accepts]: Start accepts. Automaton has 45762 states and 147373 transitions. Word has length 27 [2019-12-07 14:18:59,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:18:59,231 INFO L462 AbstractCegarLoop]: Abstraction has 45762 states and 147373 transitions. [2019-12-07 14:18:59,231 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:18:59,231 INFO L276 IsEmpty]: Start isEmpty. Operand 45762 states and 147373 transitions. [2019-12-07 14:18:59,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:18:59,243 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:18:59,243 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:18:59,243 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:18:59,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:18:59,243 INFO L82 PathProgramCache]: Analyzing trace with hash 2064759266, now seen corresponding path program 1 times [2019-12-07 14:18:59,243 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:18:59,243 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170031796] [2019-12-07 14:18:59,243 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:18:59,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:18:59,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:18:59,261 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170031796] [2019-12-07 14:18:59,261 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:18:59,261 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:18:59,261 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279773315] [2019-12-07 14:18:59,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:18:59,261 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:18:59,262 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:18:59,262 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:18:59,262 INFO L87 Difference]: Start difference. First operand 45762 states and 147373 transitions. Second operand 3 states. [2019-12-07 14:18:59,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:18:59,421 INFO L93 Difference]: Finished difference Result 59172 states and 184469 transitions. [2019-12-07 14:18:59,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:18:59,422 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 14:18:59,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:18:59,497 INFO L225 Difference]: With dead ends: 59172 [2019-12-07 14:18:59,497 INFO L226 Difference]: Without dead ends: 59172 [2019-12-07 14:18:59,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:18:59,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59172 states. [2019-12-07 14:19:00,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59172 to 45762. [2019-12-07 14:19:00,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45762 states. [2019-12-07 14:19:00,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45762 states to 45762 states and 142653 transitions. [2019-12-07 14:19:00,284 INFO L78 Accepts]: Start accepts. Automaton has 45762 states and 142653 transitions. Word has length 27 [2019-12-07 14:19:00,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:00,284 INFO L462 AbstractCegarLoop]: Abstraction has 45762 states and 142653 transitions. [2019-12-07 14:19:00,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:19:00,285 INFO L276 IsEmpty]: Start isEmpty. Operand 45762 states and 142653 transitions. [2019-12-07 14:19:00,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:19:00,296 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:00,297 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:00,297 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:00,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:00,297 INFO L82 PathProgramCache]: Analyzing trace with hash 2010439622, now seen corresponding path program 1 times [2019-12-07 14:19:00,297 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:00,297 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1206034813] [2019-12-07 14:19:00,297 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:00,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:00,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:00,491 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1206034813] [2019-12-07 14:19:00,491 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:00,491 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:19:00,491 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960426076] [2019-12-07 14:19:00,492 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:19:00,492 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:00,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:19:00,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:19:00,492 INFO L87 Difference]: Start difference. First operand 45762 states and 142653 transitions. Second operand 5 states. [2019-12-07 14:19:00,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:00,814 INFO L93 Difference]: Finished difference Result 56423 states and 173987 transitions. [2019-12-07 14:19:00,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:19:00,814 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 14:19:00,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:00,889 INFO L225 Difference]: With dead ends: 56423 [2019-12-07 14:19:00,889 INFO L226 Difference]: Without dead ends: 56247 [2019-12-07 14:19:00,889 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:19:01,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56247 states. [2019-12-07 14:19:01,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56247 to 47955. [2019-12-07 14:19:01,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47955 states. [2019-12-07 14:19:01,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47955 states to 47955 states and 149334 transitions. [2019-12-07 14:19:01,649 INFO L78 Accepts]: Start accepts. Automaton has 47955 states and 149334 transitions. Word has length 27 [2019-12-07 14:19:01,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:01,649 INFO L462 AbstractCegarLoop]: Abstraction has 47955 states and 149334 transitions. [2019-12-07 14:19:01,649 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:19:01,649 INFO L276 IsEmpty]: Start isEmpty. Operand 47955 states and 149334 transitions. [2019-12-07 14:19:01,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:19:01,661 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:01,662 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:01,662 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:01,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:01,662 INFO L82 PathProgramCache]: Analyzing trace with hash 773295241, now seen corresponding path program 1 times [2019-12-07 14:19:01,662 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:01,662 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454565500] [2019-12-07 14:19:01,662 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:01,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:01,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:01,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [454565500] [2019-12-07 14:19:01,720 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:01,720 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:19:01,720 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315387405] [2019-12-07 14:19:01,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:19:01,720 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:01,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:19:01,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:19:01,721 INFO L87 Difference]: Start difference. First operand 47955 states and 149334 transitions. Second operand 5 states. [2019-12-07 14:19:02,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:02,036 INFO L93 Difference]: Finished difference Result 58193 states and 179214 transitions. [2019-12-07 14:19:02,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:19:02,037 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 14:19:02,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:02,115 INFO L225 Difference]: With dead ends: 58193 [2019-12-07 14:19:02,115 INFO L226 Difference]: Without dead ends: 58009 [2019-12-07 14:19:02,116 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:19:02,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58009 states. [2019-12-07 14:19:02,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58009 to 47643. [2019-12-07 14:19:02,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47643 states. [2019-12-07 14:19:02,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47643 states to 47643 states and 148245 transitions. [2019-12-07 14:19:02,883 INFO L78 Accepts]: Start accepts. Automaton has 47643 states and 148245 transitions. Word has length 28 [2019-12-07 14:19:02,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:02,883 INFO L462 AbstractCegarLoop]: Abstraction has 47643 states and 148245 transitions. [2019-12-07 14:19:02,884 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:19:02,884 INFO L276 IsEmpty]: Start isEmpty. Operand 47643 states and 148245 transitions. [2019-12-07 14:19:02,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 14:19:02,893 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:02,893 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:02,893 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:02,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:02,894 INFO L82 PathProgramCache]: Analyzing trace with hash 1004344681, now seen corresponding path program 1 times [2019-12-07 14:19:02,894 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:02,894 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913559607] [2019-12-07 14:19:02,894 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:02,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:02,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:02,938 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913559607] [2019-12-07 14:19:02,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:02,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:19:02,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [638239225] [2019-12-07 14:19:02,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:19:02,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:02,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:19:02,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:19:02,938 INFO L87 Difference]: Start difference. First operand 47643 states and 148245 transitions. Second operand 5 states. [2019-12-07 14:19:03,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:03,021 INFO L93 Difference]: Finished difference Result 21071 states and 62980 transitions. [2019-12-07 14:19:03,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:19:03,022 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 14:19:03,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:03,041 INFO L225 Difference]: With dead ends: 21071 [2019-12-07 14:19:03,041 INFO L226 Difference]: Without dead ends: 18456 [2019-12-07 14:19:03,042 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:19:03,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18456 states. [2019-12-07 14:19:03,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18456 to 17377. [2019-12-07 14:19:03,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17377 states. [2019-12-07 14:19:03,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17377 states to 17377 states and 51737 transitions. [2019-12-07 14:19:03,327 INFO L78 Accepts]: Start accepts. Automaton has 17377 states and 51737 transitions. Word has length 29 [2019-12-07 14:19:03,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:03,327 INFO L462 AbstractCegarLoop]: Abstraction has 17377 states and 51737 transitions. [2019-12-07 14:19:03,327 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:19:03,327 INFO L276 IsEmpty]: Start isEmpty. Operand 17377 states and 51737 transitions. [2019-12-07 14:19:03,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 14:19:03,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:03,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:03,339 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:03,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:03,339 INFO L82 PathProgramCache]: Analyzing trace with hash -809721720, now seen corresponding path program 1 times [2019-12-07 14:19:03,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:03,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560822935] [2019-12-07 14:19:03,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:03,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:03,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:03,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560822935] [2019-12-07 14:19:03,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:03,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:19:03,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [149721304] [2019-12-07 14:19:03,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:19:03,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:03,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:19:03,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:19:03,389 INFO L87 Difference]: Start difference. First operand 17377 states and 51737 transitions. Second operand 6 states. [2019-12-07 14:19:03,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:03,804 INFO L93 Difference]: Finished difference Result 22018 states and 64719 transitions. [2019-12-07 14:19:03,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:19:03,804 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 14:19:03,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:03,825 INFO L225 Difference]: With dead ends: 22018 [2019-12-07 14:19:03,825 INFO L226 Difference]: Without dead ends: 21704 [2019-12-07 14:19:03,826 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:19:03,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21704 states. [2019-12-07 14:19:04,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21704 to 17452. [2019-12-07 14:19:04,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17452 states. [2019-12-07 14:19:04,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17452 states to 17452 states and 51966 transitions. [2019-12-07 14:19:04,082 INFO L78 Accepts]: Start accepts. Automaton has 17452 states and 51966 transitions. Word has length 33 [2019-12-07 14:19:04,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:04,082 INFO L462 AbstractCegarLoop]: Abstraction has 17452 states and 51966 transitions. [2019-12-07 14:19:04,082 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:19:04,082 INFO L276 IsEmpty]: Start isEmpty. Operand 17452 states and 51966 transitions. [2019-12-07 14:19:04,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 14:19:04,094 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:04,094 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:04,094 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:04,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:04,094 INFO L82 PathProgramCache]: Analyzing trace with hash -752360441, now seen corresponding path program 1 times [2019-12-07 14:19:04,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:04,094 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [607623293] [2019-12-07 14:19:04,094 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:04,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:04,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:04,144 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [607623293] [2019-12-07 14:19:04,144 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:04,144 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:19:04,144 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427554761] [2019-12-07 14:19:04,145 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:19:04,145 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:04,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:19:04,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:19:04,145 INFO L87 Difference]: Start difference. First operand 17452 states and 51966 transitions. Second operand 5 states. [2019-12-07 14:19:04,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:04,232 INFO L93 Difference]: Finished difference Result 17878 states and 53119 transitions. [2019-12-07 14:19:04,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:19:04,233 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-12-07 14:19:04,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:04,256 INFO L225 Difference]: With dead ends: 17878 [2019-12-07 14:19:04,256 INFO L226 Difference]: Without dead ends: 17878 [2019-12-07 14:19:04,256 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:19:04,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17878 states. [2019-12-07 14:19:04,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17878 to 17878. [2019-12-07 14:19:04,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17878 states. [2019-12-07 14:19:04,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17878 states to 17878 states and 53119 transitions. [2019-12-07 14:19:04,485 INFO L78 Accepts]: Start accepts. Automaton has 17878 states and 53119 transitions. Word has length 34 [2019-12-07 14:19:04,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:04,486 INFO L462 AbstractCegarLoop]: Abstraction has 17878 states and 53119 transitions. [2019-12-07 14:19:04,486 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:19:04,486 INFO L276 IsEmpty]: Start isEmpty. Operand 17878 states and 53119 transitions. [2019-12-07 14:19:04,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 14:19:04,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:04,498 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:04,498 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:04,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:04,499 INFO L82 PathProgramCache]: Analyzing trace with hash -1243510664, now seen corresponding path program 1 times [2019-12-07 14:19:04,499 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:04,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594609884] [2019-12-07 14:19:04,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:04,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:04,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:04,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594609884] [2019-12-07 14:19:04,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:04,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:19:04,555 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [626727891] [2019-12-07 14:19:04,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:19:04,555 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:04,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:19:04,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:19:04,555 INFO L87 Difference]: Start difference. First operand 17878 states and 53119 transitions. Second operand 6 states. [2019-12-07 14:19:04,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:04,968 INFO L93 Difference]: Finished difference Result 21466 states and 62840 transitions. [2019-12-07 14:19:04,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:19:04,969 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2019-12-07 14:19:04,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:04,989 INFO L225 Difference]: With dead ends: 21466 [2019-12-07 14:19:04,989 INFO L226 Difference]: Without dead ends: 21091 [2019-12-07 14:19:04,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:19:05,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21091 states. [2019-12-07 14:19:05,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21091 to 16771. [2019-12-07 14:19:05,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16771 states. [2019-12-07 14:19:05,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16771 states to 16771 states and 49889 transitions. [2019-12-07 14:19:05,238 INFO L78 Accepts]: Start accepts. Automaton has 16771 states and 49889 transitions. Word has length 35 [2019-12-07 14:19:05,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:05,238 INFO L462 AbstractCegarLoop]: Abstraction has 16771 states and 49889 transitions. [2019-12-07 14:19:05,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:19:05,238 INFO L276 IsEmpty]: Start isEmpty. Operand 16771 states and 49889 transitions. [2019-12-07 14:19:05,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:19:05,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:05,251 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:05,251 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:05,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:05,252 INFO L82 PathProgramCache]: Analyzing trace with hash 57427623, now seen corresponding path program 1 times [2019-12-07 14:19:05,252 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:05,252 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712149201] [2019-12-07 14:19:05,252 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:05,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:05,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:05,299 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712149201] [2019-12-07 14:19:05,299 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:05,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:19:05,300 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [564948362] [2019-12-07 14:19:05,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:19:05,300 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:05,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:19:05,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:19:05,300 INFO L87 Difference]: Start difference. First operand 16771 states and 49889 transitions. Second operand 5 states. [2019-12-07 14:19:05,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:05,664 INFO L93 Difference]: Finished difference Result 24966 states and 73533 transitions. [2019-12-07 14:19:05,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:19:05,664 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 14:19:05,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:05,690 INFO L225 Difference]: With dead ends: 24966 [2019-12-07 14:19:05,690 INFO L226 Difference]: Without dead ends: 24966 [2019-12-07 14:19:05,690 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:19:05,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24966 states. [2019-12-07 14:19:05,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24966 to 19912. [2019-12-07 14:19:05,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19912 states. [2019-12-07 14:19:05,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19912 states to 19912 states and 59389 transitions. [2019-12-07 14:19:05,983 INFO L78 Accepts]: Start accepts. Automaton has 19912 states and 59389 transitions. Word has length 40 [2019-12-07 14:19:05,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:05,983 INFO L462 AbstractCegarLoop]: Abstraction has 19912 states and 59389 transitions. [2019-12-07 14:19:05,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:19:05,983 INFO L276 IsEmpty]: Start isEmpty. Operand 19912 states and 59389 transitions. [2019-12-07 14:19:05,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:19:05,997 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:05,997 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:05,997 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:05,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:05,997 INFO L82 PathProgramCache]: Analyzing trace with hash 1323155467, now seen corresponding path program 2 times [2019-12-07 14:19:05,997 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:05,997 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546762248] [2019-12-07 14:19:05,997 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:06,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:06,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:06,224 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546762248] [2019-12-07 14:19:06,224 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:06,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:19:06,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376020463] [2019-12-07 14:19:06,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:19:06,224 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:06,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:19:06,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:19:06,225 INFO L87 Difference]: Start difference. First operand 19912 states and 59389 transitions. Second operand 10 states. [2019-12-07 14:19:06,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:06,547 INFO L93 Difference]: Finished difference Result 20358 states and 60498 transitions. [2019-12-07 14:19:06,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:19:06,547 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 40 [2019-12-07 14:19:06,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:06,568 INFO L225 Difference]: With dead ends: 20358 [2019-12-07 14:19:06,568 INFO L226 Difference]: Without dead ends: 20358 [2019-12-07 14:19:06,569 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=170, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:19:06,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20358 states. [2019-12-07 14:19:06,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20358 to 19884. [2019-12-07 14:19:06,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19884 states. [2019-12-07 14:19:06,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19884 states to 19884 states and 59256 transitions. [2019-12-07 14:19:06,824 INFO L78 Accepts]: Start accepts. Automaton has 19884 states and 59256 transitions. Word has length 40 [2019-12-07 14:19:06,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:06,824 INFO L462 AbstractCegarLoop]: Abstraction has 19884 states and 59256 transitions. [2019-12-07 14:19:06,824 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:19:06,824 INFO L276 IsEmpty]: Start isEmpty. Operand 19884 states and 59256 transitions. [2019-12-07 14:19:06,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:19:06,838 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:06,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:06,839 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:06,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:06,839 INFO L82 PathProgramCache]: Analyzing trace with hash 1472692188, now seen corresponding path program 1 times [2019-12-07 14:19:06,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:06,839 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340518982] [2019-12-07 14:19:06,839 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:06,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:06,866 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:06,866 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340518982] [2019-12-07 14:19:06,866 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:06,866 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:19:06,866 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1814228134] [2019-12-07 14:19:06,867 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:19:06,867 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:06,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:19:06,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:19:06,867 INFO L87 Difference]: Start difference. First operand 19884 states and 59256 transitions. Second operand 3 states. [2019-12-07 14:19:06,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:06,910 INFO L93 Difference]: Finished difference Result 16788 states and 49279 transitions. [2019-12-07 14:19:06,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:19:06,910 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 14:19:06,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:06,927 INFO L225 Difference]: With dead ends: 16788 [2019-12-07 14:19:06,927 INFO L226 Difference]: Without dead ends: 16788 [2019-12-07 14:19:06,927 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:19:06,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16788 states. [2019-12-07 14:19:07,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16788 to 16538. [2019-12-07 14:19:07,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16538 states. [2019-12-07 14:19:07,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16538 states to 16538 states and 48581 transitions. [2019-12-07 14:19:07,144 INFO L78 Accepts]: Start accepts. Automaton has 16538 states and 48581 transitions. Word has length 41 [2019-12-07 14:19:07,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:07,144 INFO L462 AbstractCegarLoop]: Abstraction has 16538 states and 48581 transitions. [2019-12-07 14:19:07,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:19:07,144 INFO L276 IsEmpty]: Start isEmpty. Operand 16538 states and 48581 transitions. [2019-12-07 14:19:07,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 14:19:07,156 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:07,156 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:07,156 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:07,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:07,156 INFO L82 PathProgramCache]: Analyzing trace with hash -1875088873, now seen corresponding path program 1 times [2019-12-07 14:19:07,156 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:07,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070630979] [2019-12-07 14:19:07,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:07,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:07,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:07,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2070630979] [2019-12-07 14:19:07,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:07,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:19:07,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1549564062] [2019-12-07 14:19:07,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:19:07,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:07,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:19:07,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:19:07,203 INFO L87 Difference]: Start difference. First operand 16538 states and 48581 transitions. Second operand 6 states. [2019-12-07 14:19:07,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:07,280 INFO L93 Difference]: Finished difference Result 15240 states and 45798 transitions. [2019-12-07 14:19:07,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:19:07,280 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 14:19:07,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:07,296 INFO L225 Difference]: With dead ends: 15240 [2019-12-07 14:19:07,296 INFO L226 Difference]: Without dead ends: 15108 [2019-12-07 14:19:07,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:19:07,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15108 states. [2019-12-07 14:19:07,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15108 to 13621. [2019-12-07 14:19:07,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13621 states. [2019-12-07 14:19:07,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13621 states to 13621 states and 41279 transitions. [2019-12-07 14:19:07,491 INFO L78 Accepts]: Start accepts. Automaton has 13621 states and 41279 transitions. Word has length 42 [2019-12-07 14:19:07,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:07,491 INFO L462 AbstractCegarLoop]: Abstraction has 13621 states and 41279 transitions. [2019-12-07 14:19:07,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:19:07,491 INFO L276 IsEmpty]: Start isEmpty. Operand 13621 states and 41279 transitions. [2019-12-07 14:19:07,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:19:07,502 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:07,502 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:07,502 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:07,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:07,502 INFO L82 PathProgramCache]: Analyzing trace with hash 208708978, now seen corresponding path program 1 times [2019-12-07 14:19:07,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:07,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1252627114] [2019-12-07 14:19:07,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:07,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:19:07,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:19:07,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1252627114] [2019-12-07 14:19:07,548 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:19:07,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:19:07,548 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1732188792] [2019-12-07 14:19:07,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:19:07,549 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:19:07,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:19:07,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:19:07,549 INFO L87 Difference]: Start difference. First operand 13621 states and 41279 transitions. Second operand 3 states. [2019-12-07 14:19:07,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:19:07,612 INFO L93 Difference]: Finished difference Result 15953 states and 48095 transitions. [2019-12-07 14:19:07,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:19:07,612 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:19:07,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:19:07,628 INFO L225 Difference]: With dead ends: 15953 [2019-12-07 14:19:07,628 INFO L226 Difference]: Without dead ends: 15953 [2019-12-07 14:19:07,628 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:19:07,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15953 states. [2019-12-07 14:19:07,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15953 to 12813. [2019-12-07 14:19:07,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12813 states. [2019-12-07 14:19:07,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12813 states to 12813 states and 38890 transitions. [2019-12-07 14:19:07,828 INFO L78 Accepts]: Start accepts. Automaton has 12813 states and 38890 transitions. Word has length 66 [2019-12-07 14:19:07,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:19:07,828 INFO L462 AbstractCegarLoop]: Abstraction has 12813 states and 38890 transitions. [2019-12-07 14:19:07,828 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:19:07,828 INFO L276 IsEmpty]: Start isEmpty. Operand 12813 states and 38890 transitions. [2019-12-07 14:19:07,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:19:07,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:19:07,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:19:07,839 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:19:07,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:19:07,839 INFO L82 PathProgramCache]: Analyzing trace with hash 817808390, now seen corresponding path program 1 times [2019-12-07 14:19:07,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:19:07,839 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [345444410] [2019-12-07 14:19:07,839 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:19:07,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:19:07,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:19:07,939 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:19:07,939 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:19:07,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= v_~z$r_buff1_thd1~0_114 0) (= v_~main$tmp_guard1~0_44 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~z$r_buff0_thd3~0_325) (= v_~z$mem_tmp~0_16 0) (= 0 v_~z$r_buff1_thd3~0_218) (= |v_#NULL.offset_3| 0) (= v_~z$read_delayed~0_8 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t409~0.base_44| 4)) (= 0 v_~weak$$choice0~0_15) (= v_~z$w_buff1~0_167 0) (= v_~z$r_buff0_thd0~0_136 0) (= v_~x~0_84 0) (= v_~z$r_buff0_thd1~0_185 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~__unbuffered_p2_EAX~0_46) (= 0 v_~weak$$choice2~0_93) (= 0 v_~__unbuffered_p1_EAX~0_60) (= v_~z$w_buff0~0_229 0) (= 0 v_~__unbuffered_p0_EAX~0_95) (= 0 v_~__unbuffered_cnt~0_63) (= v_~z$r_buff0_thd2~0_132 0) (= v_~z~0_167 0) (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t409~0.base_44| 1)) (= v_~main$tmp_guard0~0_44 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t409~0.base_44| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t409~0.base_44|) |v_ULTIMATE.start_main_~#t409~0.offset_30| 0)) |v_#memory_int_21|) (= v_~y~0_39 0) (= v_~z$w_buff1_used~0_386 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t409~0.base_44|) 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t409~0.base_44|) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~z$r_buff1_thd0~0_148 0) (= 0 |v_#NULL.base_3|) (= v_~z$w_buff0_used~0_680 0) (= v_~z$r_buff1_thd2~0_108 0) (= 0 |v_ULTIMATE.start_main_~#t409~0.offset_30|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t411~0.base=|v_ULTIMATE.start_main_~#t411~0.base_24|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_108, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_86|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_44|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_140|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_82|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_136, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_95, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_60, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_~#t410~0.offset=|v_ULTIMATE.start_main_~#t410~0.offset_30|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_386, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t410~0.base=|v_ULTIMATE.start_main_~#t410~0.base_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_114, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_325, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~x~0=v_~x~0_84, ULTIMATE.start_main_~#t409~0.base=|v_ULTIMATE.start_main_~#t409~0.base_44|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ~z$w_buff1~0=v_~z$w_buff1~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_103|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_148, ULTIMATE.start_main_~#t409~0.offset=|v_ULTIMATE.start_main_~#t409~0.offset_30|, ULTIMATE.start_main_~#t411~0.offset=|v_ULTIMATE.start_main_~#t411~0.offset_19|, ~y~0=v_~y~0_39, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_132, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_680, ~z$w_buff0~0=v_~z$w_buff0~0_229, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_218, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_44, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_167, ~weak$$choice2~0=v_~weak$$choice2~0_93, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_185} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t411~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t410~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t410~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t409~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t409~0.offset, ULTIMATE.start_main_~#t411~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:19:07,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L748: Formula: (and (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In191143849)) (= ~z$r_buff0_thd3~0_In191143849 ~z$r_buff1_thd3~0_Out191143849) (= 1 ~z$r_buff0_thd1~0_Out191143849) (= ~z$r_buff0_thd0~0_In191143849 ~z$r_buff1_thd0~0_Out191143849) (= ~z$r_buff1_thd2~0_Out191143849 ~z$r_buff0_thd2~0_In191143849) (= ~__unbuffered_p0_EAX~0_Out191143849 ~x~0_In191143849) (= ~z$r_buff0_thd1~0_In191143849 ~z$r_buff1_thd1~0_Out191143849)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In191143849, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In191143849, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In191143849, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In191143849, ~x~0=~x~0_In191143849, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In191143849} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out191143849, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In191143849, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out191143849, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out191143849, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out191143849, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out191143849, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In191143849, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In191143849, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out191143849, ~x~0=~x~0_In191143849, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In191143849} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:19:07,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L827-1-->L829: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t410~0.base_13|) 0) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t410~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t410~0.base_13| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t410~0.base_13| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t410~0.base_13|) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t410~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t410~0.base_13|) |v_ULTIMATE.start_main_~#t410~0.offset_11| 1))) (= |v_ULTIMATE.start_main_~#t410~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t410~0.offset=|v_ULTIMATE.start_main_~#t410~0.offset_11|, ULTIMATE.start_main_~#t410~0.base=|v_ULTIMATE.start_main_~#t410~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t410~0.offset, ULTIMATE.start_main_~#t410~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 14:19:07,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-2-->L768-5: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1461952420 256))) (.cse0 (= (mod ~z$r_buff1_thd2~0_In-1461952420 256) 0)) (.cse1 (= |P1Thread1of1ForFork2_#t~ite10_Out-1461952420| |P1Thread1of1ForFork2_#t~ite9_Out-1461952420|))) (or (and (= ~z$w_buff1~0_In-1461952420 |P1Thread1of1ForFork2_#t~ite9_Out-1461952420|) (not .cse0) .cse1 (not .cse2)) (and (or .cse2 .cse0) (= ~z~0_In-1461952420 |P1Thread1of1ForFork2_#t~ite9_Out-1461952420|) .cse1))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1461952420, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1461952420, ~z$w_buff1~0=~z$w_buff1~0_In-1461952420, ~z~0=~z~0_In-1461952420} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1461952420|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1461952420, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-1461952420|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1461952420, ~z$w_buff1~0=~z$w_buff1~0_In-1461952420, ~z~0=~z~0_In-1461952420} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 14:19:07,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In991244505 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In991244505 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In991244505 |P1Thread1of1ForFork2_#t~ite11_Out991244505|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out991244505|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In991244505, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In991244505} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In991244505, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out991244505|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In991244505} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:19:07,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-148878696 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-148878696 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-148878696 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-148878696 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-148878696| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite12_Out-148878696| ~z$w_buff1_used~0_In-148878696)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-148878696, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-148878696, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-148878696, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-148878696} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-148878696, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-148878696, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-148878696, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-148878696|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-148878696} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:19:07,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L829-1-->L831: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t411~0.base_10|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t411~0.base_10|) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t411~0.base_10| 1)) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t411~0.base_10|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t411~0.base_10| 4) |v_#length_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t411~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t411~0.base_10|) |v_ULTIMATE.start_main_~#t411~0.offset_9| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t411~0.offset_9| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t411~0.base=|v_ULTIMATE.start_main_~#t411~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t411~0.offset=|v_ULTIMATE.start_main_~#t411~0.offset_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t411~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t411~0.offset, #length] because there is no mapped edge [2019-12-07 14:19:07,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L793-->L793-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1677500996 256)))) (or (and (= ~z$w_buff0~0_In1677500996 |P2Thread1of1ForFork0_#t~ite21_Out1677500996|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In1677500996| |P2Thread1of1ForFork0_#t~ite20_Out1677500996|)) (and .cse0 (= ~z$w_buff0~0_In1677500996 |P2Thread1of1ForFork0_#t~ite20_Out1677500996|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1677500996 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1677500996 256)) .cse1) (= (mod ~z$w_buff0_used~0_In1677500996 256) 0) (and (= 0 (mod ~z$r_buff1_thd3~0_In1677500996 256)) .cse1))) (= |P2Thread1of1ForFork0_#t~ite21_Out1677500996| |P2Thread1of1ForFork0_#t~ite20_Out1677500996|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In1677500996, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1677500996, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1677500996, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1677500996, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1677500996, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1677500996|, ~weak$$choice2~0=~weak$$choice2~0_In1677500996} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1677500996|, ~z$w_buff0~0=~z$w_buff0~0_In1677500996, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1677500996, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1677500996, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1677500996, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1677500996, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1677500996|, ~weak$$choice2~0=~weak$$choice2~0_In1677500996} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 14:19:07,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L794-->L794-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1978505089 256) 0))) (or (and (= ~z$w_buff1~0_In1978505089 |P2Thread1of1ForFork0_#t~ite23_Out1978505089|) (= |P2Thread1of1ForFork0_#t~ite24_Out1978505089| |P2Thread1of1ForFork0_#t~ite23_Out1978505089|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1978505089 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1978505089 256) 0)) (and (= (mod ~z$w_buff1_used~0_In1978505089 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1978505089 256) 0)))) (and (= |P2Thread1of1ForFork0_#t~ite23_In1978505089| |P2Thread1of1ForFork0_#t~ite23_Out1978505089|) (= |P2Thread1of1ForFork0_#t~ite24_Out1978505089| ~z$w_buff1~0_In1978505089) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1978505089, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1978505089, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1978505089|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1978505089, ~z$w_buff1~0=~z$w_buff1~0_In1978505089, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1978505089, ~weak$$choice2~0=~weak$$choice2~0_In1978505089} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1978505089, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1978505089|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1978505089, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1978505089|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1978505089, ~z$w_buff1~0=~z$w_buff1~0_In1978505089, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1978505089, ~weak$$choice2~0=~weak$$choice2~0_In1978505089} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 14:19:07,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L797-->L798: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_160 v_~z$r_buff0_thd3~0_161)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_161, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_6|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_160, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:19:07,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L800-->L804: Formula: (and (= v_~z~0_54 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 14:19:07,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L804-2-->L804-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In468624171 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In468624171 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out468624171| ~z$w_buff1~0_In468624171)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out468624171| ~z~0_In468624171) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In468624171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In468624171, ~z$w_buff1~0=~z$w_buff1~0_In468624171, ~z~0=~z~0_In468624171} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out468624171|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In468624171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In468624171, ~z$w_buff1~0=~z$w_buff1~0_In468624171, ~z~0=~z~0_In468624171} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:19:07,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L804-4-->L805: Formula: (= v_~z~0_30 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|, ~z~0=v_~z~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 14:19:07,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L805-->L805-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-829393173 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-829393173 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-829393173| 0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-829393173 |P2Thread1of1ForFork0_#t~ite40_Out-829393173|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-829393173, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-829393173} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-829393173, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-829393173|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-829393173} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:19:07,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L771-->L771-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-372452487 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-372452487 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-372452487|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd2~0_In-372452487 |P1Thread1of1ForFork2_#t~ite13_Out-372452487|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-372452487, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-372452487} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-372452487, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-372452487|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-372452487} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:19:07,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In125441338 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In125441338 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out125441338|)) (and (= ~z$w_buff0_used~0_In125441338 |P0Thread1of1ForFork1_#t~ite5_Out125441338|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In125441338, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In125441338} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out125441338|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In125441338, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In125441338} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:19:07,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1357426455 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-1357426455 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1357426455 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In-1357426455 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out-1357426455| 0)) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out-1357426455| ~z$w_buff1_used~0_In-1357426455) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1357426455, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1357426455, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1357426455, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1357426455} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1357426455, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1357426455|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1357426455, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1357426455, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1357426455} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:19:07,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L751-->L752: Formula: (let ((.cse0 (= ~z$r_buff0_thd1~0_Out-901667012 ~z$r_buff0_thd1~0_In-901667012)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-901667012 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-901667012 256) 0))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse1) (not .cse2) (= ~z$r_buff0_thd1~0_Out-901667012 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-901667012, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-901667012} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-901667012, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-901667012|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-901667012} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:19:07,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd1~0_In-2122140654 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-2122140654 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In-2122140654 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-2122140654 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-2122140654|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out-2122140654| ~z$r_buff1_thd1~0_In-2122140654)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2122140654, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2122140654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2122140654, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2122140654} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-2122140654|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2122140654, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2122140654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2122140654, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2122140654} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:19:07,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd1~0_77 |v_P0Thread1of1ForFork1_#t~ite8_22|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_21|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_77, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:19:07,952 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L806-->L806-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In-1500356286 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1500356286 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1500356286 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1500356286 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1500356286| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1500356286| ~z$w_buff1_used~0_In-1500356286) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1500356286, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1500356286, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1500356286, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1500356286} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1500356286, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1500356286, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1500356286, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1500356286, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1500356286|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:19:07,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L807-->L807-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1513875085 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1513875085 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1513875085|) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1513875085| ~z$r_buff0_thd3~0_In1513875085)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1513875085, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1513875085} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1513875085, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1513875085, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1513875085|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:19:07,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1641344551 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1641344551 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1641344551 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1641344551 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In1641344551 |P2Thread1of1ForFork0_#t~ite43_Out1641344551|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out1641344551| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1641344551, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1641344551, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1641344551, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1641344551} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1641344551|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1641344551, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1641344551, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1641344551, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1641344551} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:19:07,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L808-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_131 |v_P2Thread1of1ForFork0_#t~ite43_24|) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_23|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_131, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:19:07,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-475226293 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-475226293 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-475226293 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In-475226293 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-475226293| ~z$r_buff1_thd2~0_In-475226293)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out-475226293| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-475226293, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-475226293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-475226293, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-475226293} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-475226293, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-475226293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-475226293, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-475226293|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-475226293} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:19:07,953 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_24| v_~z$r_buff1_thd2~0_56) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_24|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_23|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:19:07,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L835-->L837-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd0~0_51 256)) (= 0 (mod v_~z$w_buff0_used~0_293 256))) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 14:19:07,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L837-2-->L837-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1329442053 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1329442053 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1329442053| ~z~0_In1329442053)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out1329442053| ~z$w_buff1~0_In1329442053)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1329442053, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1329442053, ~z$w_buff1~0=~z$w_buff1~0_In1329442053, ~z~0=~z~0_In1329442053} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1329442053, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1329442053|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1329442053, ~z$w_buff1~0=~z$w_buff1~0_In1329442053, ~z~0=~z~0_In1329442053} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 14:19:07,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L837-4-->L838: Formula: (= v_~z~0_20 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_14|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 14:19:07,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L838-->L838-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-823744456 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-823744456 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-823744456|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-823744456 |ULTIMATE.start_main_#t~ite49_Out-823744456|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-823744456, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-823744456} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-823744456, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-823744456, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-823744456|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:19:07,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L839-->L839-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In-945494736 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-945494736 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-945494736 256))) (.cse3 (= (mod ~z$r_buff0_thd0~0_In-945494736 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-945494736| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite50_Out-945494736| ~z$w_buff1_used~0_In-945494736) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-945494736, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-945494736, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-945494736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-945494736} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-945494736|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-945494736, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-945494736, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-945494736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-945494736} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:19:07,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L840-->L840-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1162029594 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1162029594 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1162029594 |ULTIMATE.start_main_#t~ite51_Out-1162029594|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1162029594|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1162029594, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1162029594} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1162029594, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1162029594|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1162029594} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:19:07,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L841-->L841-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In245769322 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In245769322 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In245769322 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In245769322 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In245769322 |ULTIMATE.start_main_#t~ite52_Out245769322|)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out245769322|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In245769322, ~z$w_buff0_used~0=~z$w_buff0_used~0_In245769322, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In245769322, ~z$w_buff1_used~0=~z$w_buff1_used~0_In245769322} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out245769322|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In245769322, ~z$w_buff0_used~0=~z$w_buff0_used~0_In245769322, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In245769322, ~z$w_buff1_used~0=~z$w_buff1_used~0_In245769322} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:19:07,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] L841-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_23 256)) (= v_~z$r_buff1_thd0~0_123 |v_ULTIMATE.start_main_#t~ite52_43|) (= v_~main$tmp_guard1~0_23 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_72) (= v_~__unbuffered_p2_EBX~0_32 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:19:08,021 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:19:08 BasicIcfg [2019-12-07 14:19:08,021 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:19:08,021 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:19:08,022 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:19:08,022 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:19:08,022 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:17:16" (3/4) ... [2019-12-07 14:19:08,023 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:19:08,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= v_~z$r_buff1_thd1~0_114 0) (= v_~main$tmp_guard1~0_44 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~z$r_buff0_thd3~0_325) (= v_~z$mem_tmp~0_16 0) (= 0 v_~z$r_buff1_thd3~0_218) (= |v_#NULL.offset_3| 0) (= v_~z$read_delayed~0_8 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t409~0.base_44| 4)) (= 0 v_~weak$$choice0~0_15) (= v_~z$w_buff1~0_167 0) (= v_~z$r_buff0_thd0~0_136 0) (= v_~x~0_84 0) (= v_~z$r_buff0_thd1~0_185 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~__unbuffered_p2_EAX~0_46) (= 0 v_~weak$$choice2~0_93) (= 0 v_~__unbuffered_p1_EAX~0_60) (= v_~z$w_buff0~0_229 0) (= 0 v_~__unbuffered_p0_EAX~0_95) (= 0 v_~__unbuffered_cnt~0_63) (= v_~z$r_buff0_thd2~0_132 0) (= v_~z~0_167 0) (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t409~0.base_44| 1)) (= v_~main$tmp_guard0~0_44 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t409~0.base_44| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t409~0.base_44|) |v_ULTIMATE.start_main_~#t409~0.offset_30| 0)) |v_#memory_int_21|) (= v_~y~0_39 0) (= v_~z$w_buff1_used~0_386 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t409~0.base_44|) 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t409~0.base_44|) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~z$r_buff1_thd0~0_148 0) (= 0 |v_#NULL.base_3|) (= v_~z$w_buff0_used~0_680 0) (= v_~z$r_buff1_thd2~0_108 0) (= 0 |v_ULTIMATE.start_main_~#t409~0.offset_30|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t411~0.base=|v_ULTIMATE.start_main_~#t411~0.base_24|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_108, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_86|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_44|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_140|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_82|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_136, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_95, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_60, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_~#t410~0.offset=|v_ULTIMATE.start_main_~#t410~0.offset_30|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_386, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t410~0.base=|v_ULTIMATE.start_main_~#t410~0.base_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_114, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_325, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~x~0=v_~x~0_84, ULTIMATE.start_main_~#t409~0.base=|v_ULTIMATE.start_main_~#t409~0.base_44|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ~z$w_buff1~0=v_~z$w_buff1~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_103|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_148, ULTIMATE.start_main_~#t409~0.offset=|v_ULTIMATE.start_main_~#t409~0.offset_30|, ULTIMATE.start_main_~#t411~0.offset=|v_ULTIMATE.start_main_~#t411~0.offset_19|, ~y~0=v_~y~0_39, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_132, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_680, ~z$w_buff0~0=v_~z$w_buff0~0_229, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_218, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_44, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_167, ~weak$$choice2~0=v_~weak$$choice2~0_93, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_185} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t411~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t410~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t410~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t409~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t409~0.offset, ULTIMATE.start_main_~#t411~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:19:08,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L748: Formula: (and (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In191143849)) (= ~z$r_buff0_thd3~0_In191143849 ~z$r_buff1_thd3~0_Out191143849) (= 1 ~z$r_buff0_thd1~0_Out191143849) (= ~z$r_buff0_thd0~0_In191143849 ~z$r_buff1_thd0~0_Out191143849) (= ~z$r_buff1_thd2~0_Out191143849 ~z$r_buff0_thd2~0_In191143849) (= ~__unbuffered_p0_EAX~0_Out191143849 ~x~0_In191143849) (= ~z$r_buff0_thd1~0_In191143849 ~z$r_buff1_thd1~0_Out191143849)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In191143849, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In191143849, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In191143849, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In191143849, ~x~0=~x~0_In191143849, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In191143849} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out191143849, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In191143849, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out191143849, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out191143849, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out191143849, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out191143849, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In191143849, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In191143849, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out191143849, ~x~0=~x~0_In191143849, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In191143849} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:19:08,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L827-1-->L829: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t410~0.base_13|) 0) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t410~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t410~0.base_13| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t410~0.base_13| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t410~0.base_13|) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t410~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t410~0.base_13|) |v_ULTIMATE.start_main_~#t410~0.offset_11| 1))) (= |v_ULTIMATE.start_main_~#t410~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t410~0.offset=|v_ULTIMATE.start_main_~#t410~0.offset_11|, ULTIMATE.start_main_~#t410~0.base=|v_ULTIMATE.start_main_~#t410~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t410~0.offset, ULTIMATE.start_main_~#t410~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 14:19:08,025 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-2-->L768-5: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1461952420 256))) (.cse0 (= (mod ~z$r_buff1_thd2~0_In-1461952420 256) 0)) (.cse1 (= |P1Thread1of1ForFork2_#t~ite10_Out-1461952420| |P1Thread1of1ForFork2_#t~ite9_Out-1461952420|))) (or (and (= ~z$w_buff1~0_In-1461952420 |P1Thread1of1ForFork2_#t~ite9_Out-1461952420|) (not .cse0) .cse1 (not .cse2)) (and (or .cse2 .cse0) (= ~z~0_In-1461952420 |P1Thread1of1ForFork2_#t~ite9_Out-1461952420|) .cse1))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1461952420, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1461952420, ~z$w_buff1~0=~z$w_buff1~0_In-1461952420, ~z~0=~z~0_In-1461952420} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1461952420|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1461952420, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-1461952420|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1461952420, ~z$w_buff1~0=~z$w_buff1~0_In-1461952420, ~z~0=~z~0_In-1461952420} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 14:19:08,025 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In991244505 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In991244505 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In991244505 |P1Thread1of1ForFork2_#t~ite11_Out991244505|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out991244505|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In991244505, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In991244505} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In991244505, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out991244505|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In991244505} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:19:08,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-148878696 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-148878696 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-148878696 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-148878696 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-148878696| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite12_Out-148878696| ~z$w_buff1_used~0_In-148878696)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-148878696, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-148878696, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-148878696, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-148878696} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-148878696, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-148878696, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-148878696, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-148878696|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-148878696} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:19:08,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L829-1-->L831: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t411~0.base_10|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t411~0.base_10|) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t411~0.base_10| 1)) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t411~0.base_10|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t411~0.base_10| 4) |v_#length_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t411~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t411~0.base_10|) |v_ULTIMATE.start_main_~#t411~0.offset_9| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t411~0.offset_9| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t411~0.base=|v_ULTIMATE.start_main_~#t411~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t411~0.offset=|v_ULTIMATE.start_main_~#t411~0.offset_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t411~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t411~0.offset, #length] because there is no mapped edge [2019-12-07 14:19:08,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L793-->L793-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1677500996 256)))) (or (and (= ~z$w_buff0~0_In1677500996 |P2Thread1of1ForFork0_#t~ite21_Out1677500996|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In1677500996| |P2Thread1of1ForFork0_#t~ite20_Out1677500996|)) (and .cse0 (= ~z$w_buff0~0_In1677500996 |P2Thread1of1ForFork0_#t~ite20_Out1677500996|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1677500996 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1677500996 256)) .cse1) (= (mod ~z$w_buff0_used~0_In1677500996 256) 0) (and (= 0 (mod ~z$r_buff1_thd3~0_In1677500996 256)) .cse1))) (= |P2Thread1of1ForFork0_#t~ite21_Out1677500996| |P2Thread1of1ForFork0_#t~ite20_Out1677500996|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In1677500996, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1677500996, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1677500996, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1677500996, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1677500996, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In1677500996|, ~weak$$choice2~0=~weak$$choice2~0_In1677500996} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out1677500996|, ~z$w_buff0~0=~z$w_buff0~0_In1677500996, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1677500996, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1677500996, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1677500996, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1677500996, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out1677500996|, ~weak$$choice2~0=~weak$$choice2~0_In1677500996} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 14:19:08,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L794-->L794-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1978505089 256) 0))) (or (and (= ~z$w_buff1~0_In1978505089 |P2Thread1of1ForFork0_#t~ite23_Out1978505089|) (= |P2Thread1of1ForFork0_#t~ite24_Out1978505089| |P2Thread1of1ForFork0_#t~ite23_Out1978505089|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1978505089 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1978505089 256) 0)) (and (= (mod ~z$w_buff1_used~0_In1978505089 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1978505089 256) 0)))) (and (= |P2Thread1of1ForFork0_#t~ite23_In1978505089| |P2Thread1of1ForFork0_#t~ite23_Out1978505089|) (= |P2Thread1of1ForFork0_#t~ite24_Out1978505089| ~z$w_buff1~0_In1978505089) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1978505089, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1978505089, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1978505089|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1978505089, ~z$w_buff1~0=~z$w_buff1~0_In1978505089, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1978505089, ~weak$$choice2~0=~weak$$choice2~0_In1978505089} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1978505089, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1978505089|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1978505089, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1978505089|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1978505089, ~z$w_buff1~0=~z$w_buff1~0_In1978505089, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1978505089, ~weak$$choice2~0=~weak$$choice2~0_In1978505089} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 14:19:08,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L797-->L798: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_160 v_~z$r_buff0_thd3~0_161)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_161, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_6|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_160, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:19:08,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L800-->L804: Formula: (and (= v_~z~0_54 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 14:19:08,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L804-2-->L804-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In468624171 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In468624171 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out468624171| ~z$w_buff1~0_In468624171)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out468624171| ~z~0_In468624171) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In468624171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In468624171, ~z$w_buff1~0=~z$w_buff1~0_In468624171, ~z~0=~z~0_In468624171} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out468624171|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In468624171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In468624171, ~z$w_buff1~0=~z$w_buff1~0_In468624171, ~z~0=~z~0_In468624171} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:19:08,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L804-4-->L805: Formula: (= v_~z~0_30 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|, ~z~0=v_~z~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 14:19:08,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L805-->L805-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-829393173 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-829393173 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-829393173| 0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-829393173 |P2Thread1of1ForFork0_#t~ite40_Out-829393173|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-829393173, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-829393173} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-829393173, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-829393173|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-829393173} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:19:08,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L771-->L771-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-372452487 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-372452487 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-372452487|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd2~0_In-372452487 |P1Thread1of1ForFork2_#t~ite13_Out-372452487|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-372452487, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-372452487} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-372452487, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-372452487|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-372452487} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:19:08,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In125441338 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In125441338 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out125441338|)) (and (= ~z$w_buff0_used~0_In125441338 |P0Thread1of1ForFork1_#t~ite5_Out125441338|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In125441338, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In125441338} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out125441338|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In125441338, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In125441338} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:19:08,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1357426455 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-1357426455 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1357426455 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In-1357426455 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out-1357426455| 0)) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out-1357426455| ~z$w_buff1_used~0_In-1357426455) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1357426455, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1357426455, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1357426455, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1357426455} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1357426455, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1357426455|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1357426455, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1357426455, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1357426455} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:19:08,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L751-->L752: Formula: (let ((.cse0 (= ~z$r_buff0_thd1~0_Out-901667012 ~z$r_buff0_thd1~0_In-901667012)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-901667012 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-901667012 256) 0))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse1) (not .cse2) (= ~z$r_buff0_thd1~0_Out-901667012 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-901667012, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-901667012} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-901667012, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-901667012|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-901667012} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:19:08,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd1~0_In-2122140654 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-2122140654 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In-2122140654 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-2122140654 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-2122140654|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out-2122140654| ~z$r_buff1_thd1~0_In-2122140654)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2122140654, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2122140654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2122140654, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2122140654} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-2122140654|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2122140654, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2122140654, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2122140654, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2122140654} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:19:08,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd1~0_77 |v_P0Thread1of1ForFork1_#t~ite8_22|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_21|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_77, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:19:08,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L806-->L806-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In-1500356286 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1500356286 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1500356286 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1500356286 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1500356286| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1500356286| ~z$w_buff1_used~0_In-1500356286) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1500356286, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1500356286, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1500356286, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1500356286} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1500356286, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1500356286, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1500356286, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1500356286, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1500356286|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:19:08,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L807-->L807-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1513875085 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1513875085 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1513875085|) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1513875085| ~z$r_buff0_thd3~0_In1513875085)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1513875085, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1513875085} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1513875085, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1513875085, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1513875085|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:19:08,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1641344551 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1641344551 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1641344551 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1641344551 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In1641344551 |P2Thread1of1ForFork0_#t~ite43_Out1641344551|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out1641344551| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1641344551, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1641344551, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1641344551, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1641344551} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1641344551|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1641344551, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1641344551, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1641344551, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1641344551} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:19:08,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L808-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_131 |v_P2Thread1of1ForFork0_#t~ite43_24|) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_23|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_131, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:19:08,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-475226293 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-475226293 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-475226293 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In-475226293 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-475226293| ~z$r_buff1_thd2~0_In-475226293)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out-475226293| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-475226293, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-475226293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-475226293, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-475226293} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-475226293, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-475226293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-475226293, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-475226293|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-475226293} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:19:08,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_24| v_~z$r_buff1_thd2~0_56) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_24|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_23|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:19:08,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L835-->L837-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd0~0_51 256)) (= 0 (mod v_~z$w_buff0_used~0_293 256))) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 14:19:08,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L837-2-->L837-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1329442053 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1329442053 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1329442053| ~z~0_In1329442053)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out1329442053| ~z$w_buff1~0_In1329442053)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1329442053, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1329442053, ~z$w_buff1~0=~z$w_buff1~0_In1329442053, ~z~0=~z~0_In1329442053} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1329442053, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1329442053|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1329442053, ~z$w_buff1~0=~z$w_buff1~0_In1329442053, ~z~0=~z~0_In1329442053} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 14:19:08,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L837-4-->L838: Formula: (= v_~z~0_20 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_14|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 14:19:08,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L838-->L838-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-823744456 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-823744456 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-823744456|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-823744456 |ULTIMATE.start_main_#t~ite49_Out-823744456|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-823744456, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-823744456} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-823744456, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-823744456, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-823744456|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:19:08,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L839-->L839-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In-945494736 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-945494736 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-945494736 256))) (.cse3 (= (mod ~z$r_buff0_thd0~0_In-945494736 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-945494736| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite50_Out-945494736| ~z$w_buff1_used~0_In-945494736) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-945494736, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-945494736, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-945494736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-945494736} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-945494736|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-945494736, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-945494736, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-945494736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-945494736} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:19:08,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L840-->L840-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1162029594 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1162029594 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1162029594 |ULTIMATE.start_main_#t~ite51_Out-1162029594|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1162029594|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1162029594, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1162029594} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1162029594, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1162029594|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1162029594} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:19:08,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L841-->L841-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In245769322 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In245769322 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In245769322 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In245769322 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In245769322 |ULTIMATE.start_main_#t~ite52_Out245769322|)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out245769322|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In245769322, ~z$w_buff0_used~0=~z$w_buff0_used~0_In245769322, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In245769322, ~z$w_buff1_used~0=~z$w_buff1_used~0_In245769322} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out245769322|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In245769322, ~z$w_buff0_used~0=~z$w_buff0_used~0_In245769322, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In245769322, ~z$w_buff1_used~0=~z$w_buff1_used~0_In245769322} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:19:08,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] L841-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_23 256)) (= v_~z$r_buff1_thd0~0_123 |v_ULTIMATE.start_main_#t~ite52_43|) (= v_~main$tmp_guard1~0_23 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_72) (= v_~__unbuffered_p2_EBX~0_32 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:19:08,095 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_59c7c504-28d8-400f-9499-8b67dfeda3fd/bin/uautomizer/witness.graphml [2019-12-07 14:19:08,095 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:19:08,096 INFO L168 Benchmark]: Toolchain (without parser) took 112258.50 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.3 GB). Free memory was 938.1 MB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. [2019-12-07 14:19:08,097 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:19:08,097 INFO L168 Benchmark]: CACSL2BoogieTranslator took 372.64 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 129.5 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -159.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:19:08,097 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.09 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:19:08,097 INFO L168 Benchmark]: Boogie Preprocessor took 25.94 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:19:08,097 INFO L168 Benchmark]: RCFGBuilder took 434.37 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. [2019-12-07 14:19:08,098 INFO L168 Benchmark]: TraceAbstraction took 111311.32 ms. Allocated memory was 1.2 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. [2019-12-07 14:19:08,098 INFO L168 Benchmark]: Witness Printer took 73.88 ms. Allocated memory is still 7.3 GB. Free memory was 4.9 GB in the beginning and 4.9 GB in the end (delta: 45.1 MB). Peak memory consumption was 45.1 MB. Max. memory is 11.5 GB. [2019-12-07 14:19:08,099 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 372.64 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 129.5 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -159.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.09 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.94 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 434.37 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 111311.32 ms. Allocated memory was 1.2 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. * Witness Printer took 73.88 ms. Allocated memory is still 7.3 GB. Free memory was 4.9 GB in the beginning and 4.9 GB in the end (delta: 45.1 MB). Peak memory consumption was 45.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 101 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 51 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 32 ChoiceCompositions, 7082 VarBasedMoverChecksPositive, 219 VarBasedMoverChecksNegative, 19 SemBasedMoverChecksPositive, 262 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 89688 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L827] FCALL, FORK 0 pthread_create(&t409, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 1 z$w_buff1 = z$w_buff0 [L734] 1 z$w_buff0 = 1 [L735] 1 z$w_buff1_used = z$w_buff0_used [L736] 1 z$w_buff0_used = (_Bool)1 [L829] FCALL, FORK 0 pthread_create(&t410, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L762] 2 x = 1 [L765] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L769] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L831] FCALL, FORK 0 pthread_create(&t411, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L782] 3 y = 1 [L785] 3 __unbuffered_p2_EAX = y [L788] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L789] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L790] 3 z$flush_delayed = weak$$choice2 [L791] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L792] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L792] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L793] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L794] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L795] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L798] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L799] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L804] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L770] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L771] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L748] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L748] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L749] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L750] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L806] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L807] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L833] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L838] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L839] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L840] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 111.1s, OverallIterations: 25, TraceHistogramMax: 1, AutomataDifference: 16.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4060 SDtfs, 4459 SDslu, 6603 SDs, 0 SdLazy, 4014 SolverSat, 182 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 158 GetRequests, 33 SyntacticMatches, 16 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=183252occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 76.8s AutomataMinimizationTime, 24 MinimizatonAttempts, 292122 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 713 NumberOfCodeBlocks, 713 NumberOfCodeBlocksAsserted, 25 NumberOfCheckSat, 622 ConstructedInterpolants, 0 QuantifiedInterpolants, 99189 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 24 InterpolantComputations, 24 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...