./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix016_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix016_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6565d158823985534665480ec22139e84f23f802 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:54:43,180 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:54:43,181 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:54:43,189 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:54:43,190 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:54:43,191 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:54:43,192 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:54:43,194 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:54:43,195 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:54:43,196 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:54:43,197 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:54:43,197 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:54:43,198 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:54:43,198 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:54:43,199 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:54:43,200 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:54:43,200 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:54:43,201 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:54:43,202 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:54:43,204 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:54:43,205 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:54:43,205 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:54:43,206 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:54:43,206 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:54:43,208 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:54:43,208 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:54:43,208 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:54:43,209 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:54:43,209 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:54:43,210 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:54:43,210 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:54:43,210 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:54:43,211 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:54:43,211 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:54:43,212 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:54:43,212 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:54:43,213 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:54:43,213 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:54:43,213 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:54:43,214 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:54:43,214 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:54:43,215 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:54:43,227 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:54:43,227 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:54:43,228 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:54:43,229 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:54:43,229 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:54:43,229 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:54:43,229 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:54:43,229 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:54:43,229 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:54:43,230 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:54:43,230 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:54:43,230 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:54:43,230 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:54:43,230 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:54:43,231 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:54:43,231 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:54:43,231 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:54:43,231 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:54:43,231 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:54:43,232 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:54:43,232 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:54:43,232 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:54:43,232 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:54:43,232 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:54:43,232 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:54:43,233 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:54:43,233 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:54:43,233 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:54:43,233 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:54:43,233 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6565d158823985534665480ec22139e84f23f802 [2019-12-07 17:54:43,340 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:54:43,347 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:54:43,350 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:54:43,351 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:54:43,351 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:54:43,351 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix016_power.opt.i [2019-12-07 17:54:43,388 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/data/335f06661/4d31758029fb4b01b2c2a3a2ea3c6e80/FLAG9b7690091 [2019-12-07 17:54:43,869 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:54:43,870 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/sv-benchmarks/c/pthread-wmm/mix016_power.opt.i [2019-12-07 17:54:43,880 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/data/335f06661/4d31758029fb4b01b2c2a3a2ea3c6e80/FLAG9b7690091 [2019-12-07 17:54:44,370 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/data/335f06661/4d31758029fb4b01b2c2a3a2ea3c6e80 [2019-12-07 17:54:44,372 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:54:44,372 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:54:44,373 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:54:44,373 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:54:44,375 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:54:44,376 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,378 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f87f835 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44, skipping insertion in model container [2019-12-07 17:54:44,378 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,382 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:54:44,413 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:54:44,683 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:54:44,690 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:54:44,733 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:54:44,781 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:54:44,781 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44 WrapperNode [2019-12-07 17:54:44,781 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:54:44,782 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:54:44,782 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:54:44,782 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:54:44,787 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,801 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,820 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:54:44,820 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:54:44,820 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:54:44,820 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:54:44,826 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,827 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,830 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,830 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,837 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,839 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,841 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... [2019-12-07 17:54:44,845 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:54:44,845 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:54:44,845 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:54:44,845 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:54:44,846 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:54:44,886 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:54:44,886 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:54:44,886 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:54:44,886 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:54:44,886 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:54:44,886 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:54:44,886 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:54:44,887 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:54:44,887 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:54:44,887 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:54:44,887 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:54:44,887 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:54:44,887 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:54:44,889 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:54:45,252 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:54:45,252 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:54:45,254 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:54:45 BoogieIcfgContainer [2019-12-07 17:54:45,254 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:54:45,254 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:54:45,254 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:54:45,256 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:54:45,257 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:54:44" (1/3) ... [2019-12-07 17:54:45,257 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4aded33b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:54:45, skipping insertion in model container [2019-12-07 17:54:45,257 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:54:44" (2/3) ... [2019-12-07 17:54:45,258 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4aded33b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:54:45, skipping insertion in model container [2019-12-07 17:54:45,258 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:54:45" (3/3) ... [2019-12-07 17:54:45,259 INFO L109 eAbstractionObserver]: Analyzing ICFG mix016_power.opt.i [2019-12-07 17:54:45,265 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:54:45,265 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:54:45,270 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:54:45,270 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:54:45,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,294 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,294 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,295 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,295 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,296 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,297 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,298 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,299 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,300 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,301 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,302 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,303 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,304 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,305 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,305 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,305 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,305 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,305 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,305 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,306 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,306 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,306 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,306 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,306 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,306 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,306 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,306 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,307 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,308 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:54:45,326 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:54:45,339 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:54:45,339 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:54:45,339 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:54:45,339 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:54:45,339 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:54:45,339 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:54:45,339 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:54:45,339 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:54:45,351 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 165 places, 196 transitions [2019-12-07 17:54:45,352 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 17:54:45,403 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 17:54:45,404 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:54:45,414 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 712 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:54:45,428 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 17:54:45,455 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 17:54:45,455 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:54:45,460 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 712 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:54:45,476 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 17:54:45,477 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:54:48,491 WARN L192 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-12-07 17:54:48,672 WARN L192 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 17:54:48,763 INFO L206 etLargeBlockEncoding]: Checked pairs total: 75392 [2019-12-07 17:54:48,763 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 17:54:48,766 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 91 transitions [2019-12-07 17:54:57,877 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86190 states. [2019-12-07 17:54:57,879 INFO L276 IsEmpty]: Start isEmpty. Operand 86190 states. [2019-12-07 17:54:57,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 17:54:57,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:54:57,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 17:54:57,884 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:54:57,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:54:57,888 INFO L82 PathProgramCache]: Analyzing trace with hash 802149997, now seen corresponding path program 1 times [2019-12-07 17:54:57,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:54:57,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451228800] [2019-12-07 17:54:57,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:54:57,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:54:58,028 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:54:58,029 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451228800] [2019-12-07 17:54:58,029 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:54:58,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:54:58,030 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502443366] [2019-12-07 17:54:58,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:54:58,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:54:58,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:54:58,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:54:58,043 INFO L87 Difference]: Start difference. First operand 86190 states. Second operand 3 states. [2019-12-07 17:54:58,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:54:58,675 INFO L93 Difference]: Finished difference Result 85100 states and 365324 transitions. [2019-12-07 17:54:58,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:54:58,677 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 17:54:58,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:54:59,036 INFO L225 Difference]: With dead ends: 85100 [2019-12-07 17:54:59,036 INFO L226 Difference]: Without dead ends: 79822 [2019-12-07 17:54:59,037 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:02,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79822 states. [2019-12-07 17:55:03,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79822 to 79822. [2019-12-07 17:55:03,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79822 states. [2019-12-07 17:55:03,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79822 states to 79822 states and 342168 transitions. [2019-12-07 17:55:03,602 INFO L78 Accepts]: Start accepts. Automaton has 79822 states and 342168 transitions. Word has length 5 [2019-12-07 17:55:03,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:03,602 INFO L462 AbstractCegarLoop]: Abstraction has 79822 states and 342168 transitions. [2019-12-07 17:55:03,602 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:55:03,602 INFO L276 IsEmpty]: Start isEmpty. Operand 79822 states and 342168 transitions. [2019-12-07 17:55:03,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:55:03,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:03,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:03,609 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:03,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:03,610 INFO L82 PathProgramCache]: Analyzing trace with hash 1460490103, now seen corresponding path program 1 times [2019-12-07 17:55:03,610 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:03,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1337896880] [2019-12-07 17:55:03,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:03,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:03,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:03,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1337896880] [2019-12-07 17:55:03,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:03,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:55:03,672 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985626403] [2019-12-07 17:55:03,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:55:03,673 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:03,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:55:03,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:55:03,674 INFO L87 Difference]: Start difference. First operand 79822 states and 342168 transitions. Second operand 4 states. [2019-12-07 17:55:04,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:04,378 INFO L93 Difference]: Finished difference Result 125836 states and 518761 transitions. [2019-12-07 17:55:04,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:55:04,379 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:55:04,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:04,694 INFO L225 Difference]: With dead ends: 125836 [2019-12-07 17:55:04,694 INFO L226 Difference]: Without dead ends: 125752 [2019-12-07 17:55:04,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:55:09,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125752 states. [2019-12-07 17:55:11,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125752 to 112336. [2019-12-07 17:55:11,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112336 states. [2019-12-07 17:55:11,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112336 states to 112336 states and 468776 transitions. [2019-12-07 17:55:11,838 INFO L78 Accepts]: Start accepts. Automaton has 112336 states and 468776 transitions. Word has length 13 [2019-12-07 17:55:11,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:11,838 INFO L462 AbstractCegarLoop]: Abstraction has 112336 states and 468776 transitions. [2019-12-07 17:55:11,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:55:11,839 INFO L276 IsEmpty]: Start isEmpty. Operand 112336 states and 468776 transitions. [2019-12-07 17:55:11,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:55:11,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:11,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:11,841 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:11,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:11,842 INFO L82 PathProgramCache]: Analyzing trace with hash -1843446667, now seen corresponding path program 1 times [2019-12-07 17:55:11,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:11,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594292869] [2019-12-07 17:55:11,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:11,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:11,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:11,893 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594292869] [2019-12-07 17:55:11,893 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:11,894 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:55:11,894 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835065720] [2019-12-07 17:55:11,894 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:55:11,894 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:11,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:55:11,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:55:11,894 INFO L87 Difference]: Start difference. First operand 112336 states and 468776 transitions. Second operand 4 states. [2019-12-07 17:55:12,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:12,971 INFO L93 Difference]: Finished difference Result 156868 states and 641868 transitions. [2019-12-07 17:55:12,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:55:12,971 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:55:12,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:13,382 INFO L225 Difference]: With dead ends: 156868 [2019-12-07 17:55:13,382 INFO L226 Difference]: Without dead ends: 156772 [2019-12-07 17:55:13,383 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:55:17,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156772 states. [2019-12-07 17:55:19,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156772 to 131047. [2019-12-07 17:55:19,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131047 states. [2019-12-07 17:55:19,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131047 states to 131047 states and 544807 transitions. [2019-12-07 17:55:19,727 INFO L78 Accepts]: Start accepts. Automaton has 131047 states and 544807 transitions. Word has length 13 [2019-12-07 17:55:19,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:19,728 INFO L462 AbstractCegarLoop]: Abstraction has 131047 states and 544807 transitions. [2019-12-07 17:55:19,728 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:55:19,728 INFO L276 IsEmpty]: Start isEmpty. Operand 131047 states and 544807 transitions. [2019-12-07 17:55:19,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 17:55:19,731 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:19,731 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:19,731 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:19,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:19,731 INFO L82 PathProgramCache]: Analyzing trace with hash 890356816, now seen corresponding path program 1 times [2019-12-07 17:55:19,731 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:19,732 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121057258] [2019-12-07 17:55:19,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:19,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:19,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:19,777 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121057258] [2019-12-07 17:55:19,778 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:19,778 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:55:19,778 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132364225] [2019-12-07 17:55:19,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:55:19,778 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:19,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:55:19,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:55:19,779 INFO L87 Difference]: Start difference. First operand 131047 states and 544807 transitions. Second operand 5 states. [2019-12-07 17:55:21,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:21,825 INFO L93 Difference]: Finished difference Result 177820 states and 726114 transitions. [2019-12-07 17:55:21,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:55:21,825 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2019-12-07 17:55:21,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:22,258 INFO L225 Difference]: With dead ends: 177820 [2019-12-07 17:55:22,258 INFO L226 Difference]: Without dead ends: 177684 [2019-12-07 17:55:22,259 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:55:26,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177684 states. [2019-12-07 17:55:28,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177684 to 146241. [2019-12-07 17:55:28,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146241 states. [2019-12-07 17:55:28,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146241 states to 146241 states and 605983 transitions. [2019-12-07 17:55:28,848 INFO L78 Accepts]: Start accepts. Automaton has 146241 states and 605983 transitions. Word has length 14 [2019-12-07 17:55:28,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:28,848 INFO L462 AbstractCegarLoop]: Abstraction has 146241 states and 605983 transitions. [2019-12-07 17:55:28,848 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:55:28,848 INFO L276 IsEmpty]: Start isEmpty. Operand 146241 states and 605983 transitions. [2019-12-07 17:55:28,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:55:28,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:28,871 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:28,871 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:28,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:28,872 INFO L82 PathProgramCache]: Analyzing trace with hash 1219681260, now seen corresponding path program 1 times [2019-12-07 17:55:28,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:28,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590854847] [2019-12-07 17:55:28,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:28,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:28,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:28,911 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [590854847] [2019-12-07 17:55:28,911 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:28,911 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:55:28,911 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429581472] [2019-12-07 17:55:28,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:55:28,911 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:28,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:55:28,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:28,912 INFO L87 Difference]: Start difference. First operand 146241 states and 605983 transitions. Second operand 3 states. [2019-12-07 17:55:29,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:29,886 INFO L93 Difference]: Finished difference Result 146241 states and 599965 transitions. [2019-12-07 17:55:29,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:55:29,887 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:55:29,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:30,232 INFO L225 Difference]: With dead ends: 146241 [2019-12-07 17:55:30,232 INFO L226 Difference]: Without dead ends: 146241 [2019-12-07 17:55:30,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:34,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146241 states. [2019-12-07 17:55:37,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146241 to 142963. [2019-12-07 17:55:37,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142963 states. [2019-12-07 17:55:38,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142963 states to 142963 states and 587129 transitions. [2019-12-07 17:55:38,062 INFO L78 Accepts]: Start accepts. Automaton has 142963 states and 587129 transitions. Word has length 18 [2019-12-07 17:55:38,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:38,063 INFO L462 AbstractCegarLoop]: Abstraction has 142963 states and 587129 transitions. [2019-12-07 17:55:38,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:55:38,063 INFO L276 IsEmpty]: Start isEmpty. Operand 142963 states and 587129 transitions. [2019-12-07 17:55:38,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:55:38,073 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:38,073 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:38,073 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:38,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:38,074 INFO L82 PathProgramCache]: Analyzing trace with hash -1986597665, now seen corresponding path program 1 times [2019-12-07 17:55:38,074 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:38,074 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472970395] [2019-12-07 17:55:38,074 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:38,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:38,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:38,104 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472970395] [2019-12-07 17:55:38,104 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:38,104 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:55:38,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612919147] [2019-12-07 17:55:38,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:55:38,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:38,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:55:38,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:38,106 INFO L87 Difference]: Start difference. First operand 142963 states and 587129 transitions. Second operand 3 states. [2019-12-07 17:55:38,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:38,664 INFO L93 Difference]: Finished difference Result 142094 states and 583493 transitions. [2019-12-07 17:55:38,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:55:38,665 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:55:38,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:39,015 INFO L225 Difference]: With dead ends: 142094 [2019-12-07 17:55:39,015 INFO L226 Difference]: Without dead ends: 142094 [2019-12-07 17:55:39,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:42,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142094 states. [2019-12-07 17:55:44,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142094 to 142094. [2019-12-07 17:55:44,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142094 states. [2019-12-07 17:55:45,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142094 states to 142094 states and 583493 transitions. [2019-12-07 17:55:45,009 INFO L78 Accepts]: Start accepts. Automaton has 142094 states and 583493 transitions. Word has length 18 [2019-12-07 17:55:45,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:45,009 INFO L462 AbstractCegarLoop]: Abstraction has 142094 states and 583493 transitions. [2019-12-07 17:55:45,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:55:45,009 INFO L276 IsEmpty]: Start isEmpty. Operand 142094 states and 583493 transitions. [2019-12-07 17:55:45,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:55:45,024 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:45,024 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:45,024 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:45,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:45,024 INFO L82 PathProgramCache]: Analyzing trace with hash 934208247, now seen corresponding path program 1 times [2019-12-07 17:55:45,024 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:45,024 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973118522] [2019-12-07 17:55:45,024 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:45,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:45,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:45,045 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973118522] [2019-12-07 17:55:45,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:45,046 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:55:45,046 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [273911857] [2019-12-07 17:55:45,046 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:55:45,046 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:45,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:55:45,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:45,046 INFO L87 Difference]: Start difference. First operand 142094 states and 583493 transitions. Second operand 3 states. [2019-12-07 17:55:45,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:45,511 INFO L93 Difference]: Finished difference Result 29827 states and 98986 transitions. [2019-12-07 17:55:45,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:55:45,512 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:55:45,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:45,553 INFO L225 Difference]: With dead ends: 29827 [2019-12-07 17:55:45,553 INFO L226 Difference]: Without dead ends: 29827 [2019-12-07 17:55:45,553 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:45,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29827 states. [2019-12-07 17:55:45,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29827 to 29827. [2019-12-07 17:55:45,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29827 states. [2019-12-07 17:55:46,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29827 states to 29827 states and 98986 transitions. [2019-12-07 17:55:46,046 INFO L78 Accepts]: Start accepts. Automaton has 29827 states and 98986 transitions. Word has length 19 [2019-12-07 17:55:46,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:46,046 INFO L462 AbstractCegarLoop]: Abstraction has 29827 states and 98986 transitions. [2019-12-07 17:55:46,046 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:55:46,046 INFO L276 IsEmpty]: Start isEmpty. Operand 29827 states and 98986 transitions. [2019-12-07 17:55:46,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:55:46,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:46,052 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:46,052 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:46,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:46,053 INFO L82 PathProgramCache]: Analyzing trace with hash 454702152, now seen corresponding path program 1 times [2019-12-07 17:55:46,053 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:46,053 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481933296] [2019-12-07 17:55:46,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:46,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:46,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:46,097 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481933296] [2019-12-07 17:55:46,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:46,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:55:46,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634351637] [2019-12-07 17:55:46,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:55:46,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:46,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:55:46,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:55:46,098 INFO L87 Difference]: Start difference. First operand 29827 states and 98986 transitions. Second operand 6 states. [2019-12-07 17:55:46,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:46,630 INFO L93 Difference]: Finished difference Result 46569 states and 151775 transitions. [2019-12-07 17:55:46,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:55:46,630 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 17:55:46,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:46,694 INFO L225 Difference]: With dead ends: 46569 [2019-12-07 17:55:46,695 INFO L226 Difference]: Without dead ends: 46541 [2019-12-07 17:55:46,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:55:46,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46541 states. [2019-12-07 17:55:47,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46541 to 30863. [2019-12-07 17:55:47,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30863 states. [2019-12-07 17:55:47,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30863 states to 30863 states and 101561 transitions. [2019-12-07 17:55:47,308 INFO L78 Accepts]: Start accepts. Automaton has 30863 states and 101561 transitions. Word has length 22 [2019-12-07 17:55:47,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:47,308 INFO L462 AbstractCegarLoop]: Abstraction has 30863 states and 101561 transitions. [2019-12-07 17:55:47,308 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:55:47,308 INFO L276 IsEmpty]: Start isEmpty. Operand 30863 states and 101561 transitions. [2019-12-07 17:55:47,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:55:47,318 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:47,318 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:47,318 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:47,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:47,318 INFO L82 PathProgramCache]: Analyzing trace with hash -1218687100, now seen corresponding path program 1 times [2019-12-07 17:55:47,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:47,318 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022536829] [2019-12-07 17:55:47,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:47,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:47,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:47,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022536829] [2019-12-07 17:55:47,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:47,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:55:47,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134488888] [2019-12-07 17:55:47,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:55:47,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:47,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:55:47,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:55:47,355 INFO L87 Difference]: Start difference. First operand 30863 states and 101561 transitions. Second operand 5 states. [2019-12-07 17:55:47,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:47,662 INFO L93 Difference]: Finished difference Result 42434 states and 137781 transitions. [2019-12-07 17:55:47,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:55:47,662 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 17:55:47,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:47,721 INFO L225 Difference]: With dead ends: 42434 [2019-12-07 17:55:47,721 INFO L226 Difference]: Without dead ends: 42410 [2019-12-07 17:55:47,722 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:55:47,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42410 states. [2019-12-07 17:55:48,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42410 to 35328. [2019-12-07 17:55:48,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35328 states. [2019-12-07 17:55:48,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35328 states to 35328 states and 115486 transitions. [2019-12-07 17:55:48,349 INFO L78 Accepts]: Start accepts. Automaton has 35328 states and 115486 transitions. Word has length 25 [2019-12-07 17:55:48,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:48,349 INFO L462 AbstractCegarLoop]: Abstraction has 35328 states and 115486 transitions. [2019-12-07 17:55:48,349 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:55:48,349 INFO L276 IsEmpty]: Start isEmpty. Operand 35328 states and 115486 transitions. [2019-12-07 17:55:48,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:55:48,362 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:48,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:48,362 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:48,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:48,362 INFO L82 PathProgramCache]: Analyzing trace with hash 191244626, now seen corresponding path program 1 times [2019-12-07 17:55:48,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:48,363 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1604317685] [2019-12-07 17:55:48,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:48,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:48,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:48,405 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1604317685] [2019-12-07 17:55:48,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:48,406 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:55:48,406 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [264632723] [2019-12-07 17:55:48,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:55:48,406 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:48,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:55:48,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:55:48,406 INFO L87 Difference]: Start difference. First operand 35328 states and 115486 transitions. Second operand 6 states. [2019-12-07 17:55:48,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:48,803 INFO L93 Difference]: Finished difference Result 53273 states and 173420 transitions. [2019-12-07 17:55:48,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:55:48,804 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 17:55:48,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:48,886 INFO L225 Difference]: With dead ends: 53273 [2019-12-07 17:55:48,886 INFO L226 Difference]: Without dead ends: 53229 [2019-12-07 17:55:48,886 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:55:49,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53229 states. [2019-12-07 17:55:49,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53229 to 37008. [2019-12-07 17:55:49,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37008 states. [2019-12-07 17:55:49,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37008 states to 37008 states and 120929 transitions. [2019-12-07 17:55:49,617 INFO L78 Accepts]: Start accepts. Automaton has 37008 states and 120929 transitions. Word has length 27 [2019-12-07 17:55:49,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:49,617 INFO L462 AbstractCegarLoop]: Abstraction has 37008 states and 120929 transitions. [2019-12-07 17:55:49,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:55:49,617 INFO L276 IsEmpty]: Start isEmpty. Operand 37008 states and 120929 transitions. [2019-12-07 17:55:49,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:55:49,637 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:49,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:49,637 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:49,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:49,638 INFO L82 PathProgramCache]: Analyzing trace with hash -1967543379, now seen corresponding path program 1 times [2019-12-07 17:55:49,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:49,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918301576] [2019-12-07 17:55:49,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:49,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:49,666 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:49,667 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918301576] [2019-12-07 17:55:49,667 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:49,667 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:55:49,667 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1134065305] [2019-12-07 17:55:49,667 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:55:49,667 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:49,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:55:49,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:55:49,667 INFO L87 Difference]: Start difference. First operand 37008 states and 120929 transitions. Second operand 4 states. [2019-12-07 17:55:49,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:49,712 INFO L93 Difference]: Finished difference Result 13541 states and 41604 transitions. [2019-12-07 17:55:49,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:55:49,713 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 17:55:49,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:49,727 INFO L225 Difference]: With dead ends: 13541 [2019-12-07 17:55:49,728 INFO L226 Difference]: Without dead ends: 13541 [2019-12-07 17:55:49,728 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:55:49,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13541 states. [2019-12-07 17:55:49,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13541 to 13072. [2019-12-07 17:55:49,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13072 states. [2019-12-07 17:55:49,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13072 states to 13072 states and 40173 transitions. [2019-12-07 17:55:49,909 INFO L78 Accepts]: Start accepts. Automaton has 13072 states and 40173 transitions. Word has length 30 [2019-12-07 17:55:49,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:49,909 INFO L462 AbstractCegarLoop]: Abstraction has 13072 states and 40173 transitions. [2019-12-07 17:55:49,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:55:49,909 INFO L276 IsEmpty]: Start isEmpty. Operand 13072 states and 40173 transitions. [2019-12-07 17:55:49,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 17:55:49,922 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:49,922 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:49,922 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:49,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:49,922 INFO L82 PathProgramCache]: Analyzing trace with hash 1155983199, now seen corresponding path program 1 times [2019-12-07 17:55:49,923 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:49,923 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823466326] [2019-12-07 17:55:49,923 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:49,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:49,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:49,974 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823466326] [2019-12-07 17:55:49,974 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:49,974 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:55:49,974 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [26638921] [2019-12-07 17:55:49,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:55:49,975 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:49,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:55:49,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:55:49,975 INFO L87 Difference]: Start difference. First operand 13072 states and 40173 transitions. Second operand 7 states. [2019-12-07 17:55:50,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:50,595 INFO L93 Difference]: Finished difference Result 17406 states and 51903 transitions. [2019-12-07 17:55:50,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 17:55:50,596 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 17:55:50,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:50,614 INFO L225 Difference]: With dead ends: 17406 [2019-12-07 17:55:50,614 INFO L226 Difference]: Without dead ends: 17402 [2019-12-07 17:55:50,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=102, Invalid=278, Unknown=0, NotChecked=0, Total=380 [2019-12-07 17:55:50,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17402 states. [2019-12-07 17:55:50,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17402 to 12193. [2019-12-07 17:55:50,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12193 states. [2019-12-07 17:55:50,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12193 states to 12193 states and 37496 transitions. [2019-12-07 17:55:50,806 INFO L78 Accepts]: Start accepts. Automaton has 12193 states and 37496 transitions. Word has length 39 [2019-12-07 17:55:50,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:50,807 INFO L462 AbstractCegarLoop]: Abstraction has 12193 states and 37496 transitions. [2019-12-07 17:55:50,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:55:50,807 INFO L276 IsEmpty]: Start isEmpty. Operand 12193 states and 37496 transitions. [2019-12-07 17:55:50,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:55:50,817 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:50,817 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:50,817 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:50,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:50,817 INFO L82 PathProgramCache]: Analyzing trace with hash -1022330281, now seen corresponding path program 1 times [2019-12-07 17:55:50,817 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:50,817 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432986360] [2019-12-07 17:55:50,817 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:50,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:50,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:50,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432986360] [2019-12-07 17:55:50,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:50,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:55:50,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1613051432] [2019-12-07 17:55:50,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:55:50,859 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:50,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:55:50,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:55:50,859 INFO L87 Difference]: Start difference. First operand 12193 states and 37496 transitions. Second operand 5 states. [2019-12-07 17:55:50,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:50,902 INFO L93 Difference]: Finished difference Result 10798 states and 34133 transitions. [2019-12-07 17:55:50,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:55:50,903 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 17:55:50,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:50,914 INFO L225 Difference]: With dead ends: 10798 [2019-12-07 17:55:50,915 INFO L226 Difference]: Without dead ends: 10756 [2019-12-07 17:55:50,915 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:55:50,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10756 states. [2019-12-07 17:55:51,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10756 to 10588. [2019-12-07 17:55:51,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10588 states. [2019-12-07 17:55:51,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10588 states to 10588 states and 33568 transitions. [2019-12-07 17:55:51,062 INFO L78 Accepts]: Start accepts. Automaton has 10588 states and 33568 transitions. Word has length 40 [2019-12-07 17:55:51,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:51,062 INFO L462 AbstractCegarLoop]: Abstraction has 10588 states and 33568 transitions. [2019-12-07 17:55:51,062 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:55:51,062 INFO L276 IsEmpty]: Start isEmpty. Operand 10588 states and 33568 transitions. [2019-12-07 17:55:51,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 17:55:51,071 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:51,071 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:51,072 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:51,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:51,072 INFO L82 PathProgramCache]: Analyzing trace with hash -646862803, now seen corresponding path program 1 times [2019-12-07 17:55:51,072 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:51,072 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294285708] [2019-12-07 17:55:51,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:51,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:51,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:51,106 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294285708] [2019-12-07 17:55:51,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:51,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:55:51,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731596974] [2019-12-07 17:55:51,107 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:55:51,107 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:51,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:55:51,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:51,107 INFO L87 Difference]: Start difference. First operand 10588 states and 33568 transitions. Second operand 3 states. [2019-12-07 17:55:51,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:51,167 INFO L93 Difference]: Finished difference Result 14476 states and 45029 transitions. [2019-12-07 17:55:51,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:55:51,167 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 17:55:51,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:51,184 INFO L225 Difference]: With dead ends: 14476 [2019-12-07 17:55:51,184 INFO L226 Difference]: Without dead ends: 13968 [2019-12-07 17:55:51,184 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:51,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13968 states. [2019-12-07 17:55:51,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13968 to 11116. [2019-12-07 17:55:51,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11116 states. [2019-12-07 17:55:51,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11116 states to 11116 states and 35374 transitions. [2019-12-07 17:55:51,352 INFO L78 Accepts]: Start accepts. Automaton has 11116 states and 35374 transitions. Word has length 54 [2019-12-07 17:55:51,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:51,352 INFO L462 AbstractCegarLoop]: Abstraction has 11116 states and 35374 transitions. [2019-12-07 17:55:51,353 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:55:51,353 INFO L276 IsEmpty]: Start isEmpty. Operand 11116 states and 35374 transitions. [2019-12-07 17:55:51,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 17:55:51,362 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:51,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:51,362 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:51,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:51,363 INFO L82 PathProgramCache]: Analyzing trace with hash 667416220, now seen corresponding path program 1 times [2019-12-07 17:55:51,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:51,363 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415834627] [2019-12-07 17:55:51,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:51,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:51,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:51,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415834627] [2019-12-07 17:55:51,540 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:51,540 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:55:51,541 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853176392] [2019-12-07 17:55:51,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:55:51,541 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:51,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:55:51,541 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:55:51,541 INFO L87 Difference]: Start difference. First operand 11116 states and 35374 transitions. Second operand 11 states. [2019-12-07 17:55:52,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:52,264 INFO L93 Difference]: Finished difference Result 48207 states and 153135 transitions. [2019-12-07 17:55:52,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:55:52,265 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 54 [2019-12-07 17:55:52,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:52,287 INFO L225 Difference]: With dead ends: 48207 [2019-12-07 17:55:52,287 INFO L226 Difference]: Without dead ends: 18669 [2019-12-07 17:55:52,287 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:55:52,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18669 states. [2019-12-07 17:55:52,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18669 to 9701. [2019-12-07 17:55:52,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9701 states. [2019-12-07 17:55:52,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9701 states to 9701 states and 31207 transitions. [2019-12-07 17:55:52,488 INFO L78 Accepts]: Start accepts. Automaton has 9701 states and 31207 transitions. Word has length 54 [2019-12-07 17:55:52,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:52,489 INFO L462 AbstractCegarLoop]: Abstraction has 9701 states and 31207 transitions. [2019-12-07 17:55:52,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:55:52,489 INFO L276 IsEmpty]: Start isEmpty. Operand 9701 states and 31207 transitions. [2019-12-07 17:55:52,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 17:55:52,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:52,498 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:52,498 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:52,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:52,498 INFO L82 PathProgramCache]: Analyzing trace with hash -1444273636, now seen corresponding path program 2 times [2019-12-07 17:55:52,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:52,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241439343] [2019-12-07 17:55:52,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:52,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:52,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:52,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241439343] [2019-12-07 17:55:52,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:52,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:55:52,703 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [731226374] [2019-12-07 17:55:52,703 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:55:52,703 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:52,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:55:52,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:55:52,704 INFO L87 Difference]: Start difference. First operand 9701 states and 31207 transitions. Second operand 14 states. [2019-12-07 17:55:54,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:54,385 INFO L93 Difference]: Finished difference Result 29695 states and 91788 transitions. [2019-12-07 17:55:54,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 17:55:54,386 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-07 17:55:54,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:54,427 INFO L225 Difference]: With dead ends: 29695 [2019-12-07 17:55:54,428 INFO L226 Difference]: Without dead ends: 21348 [2019-12-07 17:55:54,428 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 301 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=269, Invalid=1137, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 17:55:54,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21348 states. [2019-12-07 17:55:54,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21348 to 10078. [2019-12-07 17:55:54,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10078 states. [2019-12-07 17:55:54,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10078 states to 10078 states and 32589 transitions. [2019-12-07 17:55:54,643 INFO L78 Accepts]: Start accepts. Automaton has 10078 states and 32589 transitions. Word has length 54 [2019-12-07 17:55:54,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:54,643 INFO L462 AbstractCegarLoop]: Abstraction has 10078 states and 32589 transitions. [2019-12-07 17:55:54,643 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:55:54,643 INFO L276 IsEmpty]: Start isEmpty. Operand 10078 states and 32589 transitions. [2019-12-07 17:55:54,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 17:55:54,653 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:54,654 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:54,654 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:54,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:54,654 INFO L82 PathProgramCache]: Analyzing trace with hash -232865060, now seen corresponding path program 3 times [2019-12-07 17:55:54,654 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:54,654 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917457258] [2019-12-07 17:55:54,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:54,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:54,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:54,861 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [917457258] [2019-12-07 17:55:54,861 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:54,861 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:55:54,861 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419037852] [2019-12-07 17:55:54,862 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:55:54,862 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:54,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:55:54,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:55:54,862 INFO L87 Difference]: Start difference. First operand 10078 states and 32589 transitions. Second operand 14 states. [2019-12-07 17:55:56,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:56,867 INFO L93 Difference]: Finished difference Result 24837 states and 77706 transitions. [2019-12-07 17:55:56,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 17:55:56,868 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-07 17:55:56,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:56,910 INFO L225 Difference]: With dead ends: 24837 [2019-12-07 17:55:56,911 INFO L226 Difference]: Without dead ends: 21362 [2019-12-07 17:55:56,911 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=759, Unknown=0, NotChecked=0, Total=930 [2019-12-07 17:55:56,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21362 states. [2019-12-07 17:55:57,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21362 to 10080. [2019-12-07 17:55:57,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10080 states. [2019-12-07 17:55:57,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10080 states to 10080 states and 32585 transitions. [2019-12-07 17:55:57,131 INFO L78 Accepts]: Start accepts. Automaton has 10080 states and 32585 transitions. Word has length 54 [2019-12-07 17:55:57,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:57,131 INFO L462 AbstractCegarLoop]: Abstraction has 10080 states and 32585 transitions. [2019-12-07 17:55:57,131 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:55:57,131 INFO L276 IsEmpty]: Start isEmpty. Operand 10080 states and 32585 transitions. [2019-12-07 17:55:57,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 17:55:57,141 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:57,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:57,141 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:57,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:57,141 INFO L82 PathProgramCache]: Analyzing trace with hash -84060940, now seen corresponding path program 4 times [2019-12-07 17:55:57,141 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:57,141 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1583726979] [2019-12-07 17:55:57,141 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:57,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:57,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:57,214 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1583726979] [2019-12-07 17:55:57,214 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:57,214 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:55:57,214 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1461510566] [2019-12-07 17:55:57,214 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:55:57,214 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:57,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:55:57,215 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:55:57,215 INFO L87 Difference]: Start difference. First operand 10080 states and 32585 transitions. Second operand 7 states. [2019-12-07 17:55:57,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:57,483 INFO L93 Difference]: Finished difference Result 26208 states and 83100 transitions. [2019-12-07 17:55:57,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:55:57,483 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 17:55:57,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:57,508 INFO L225 Difference]: With dead ends: 26208 [2019-12-07 17:55:57,509 INFO L226 Difference]: Without dead ends: 20956 [2019-12-07 17:55:57,509 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:55:57,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20956 states. [2019-12-07 17:55:57,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20956 to 12574. [2019-12-07 17:55:57,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12574 states. [2019-12-07 17:55:57,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12574 states to 12574 states and 40668 transitions. [2019-12-07 17:55:57,753 INFO L78 Accepts]: Start accepts. Automaton has 12574 states and 40668 transitions. Word has length 54 [2019-12-07 17:55:57,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:57,753 INFO L462 AbstractCegarLoop]: Abstraction has 12574 states and 40668 transitions. [2019-12-07 17:55:57,753 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:55:57,753 INFO L276 IsEmpty]: Start isEmpty. Operand 12574 states and 40668 transitions. [2019-12-07 17:55:57,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 17:55:57,766 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:57,766 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:57,766 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:57,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:57,766 INFO L82 PathProgramCache]: Analyzing trace with hash -535645294, now seen corresponding path program 5 times [2019-12-07 17:55:57,766 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:57,766 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251543241] [2019-12-07 17:55:57,766 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:57,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:57,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:57,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251543241] [2019-12-07 17:55:57,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:57,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:55:57,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937068705] [2019-12-07 17:55:57,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:55:57,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:57,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:55:57,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:57,797 INFO L87 Difference]: Start difference. First operand 12574 states and 40668 transitions. Second operand 3 states. [2019-12-07 17:55:57,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:55:57,828 INFO L93 Difference]: Finished difference Result 9464 states and 29863 transitions. [2019-12-07 17:55:57,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:55:57,828 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 17:55:57,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:55:57,839 INFO L225 Difference]: With dead ends: 9464 [2019-12-07 17:55:57,839 INFO L226 Difference]: Without dead ends: 9464 [2019-12-07 17:55:57,839 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:55:57,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9464 states. [2019-12-07 17:55:57,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9464 to 9008. [2019-12-07 17:55:57,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9008 states. [2019-12-07 17:55:57,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9008 states to 9008 states and 28402 transitions. [2019-12-07 17:55:57,968 INFO L78 Accepts]: Start accepts. Automaton has 9008 states and 28402 transitions. Word has length 54 [2019-12-07 17:55:57,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:55:57,968 INFO L462 AbstractCegarLoop]: Abstraction has 9008 states and 28402 transitions. [2019-12-07 17:55:57,968 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:55:57,968 INFO L276 IsEmpty]: Start isEmpty. Operand 9008 states and 28402 transitions. [2019-12-07 17:55:57,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:55:57,975 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:55:57,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:55:57,975 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:55:57,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:55:57,976 INFO L82 PathProgramCache]: Analyzing trace with hash 915079797, now seen corresponding path program 1 times [2019-12-07 17:55:57,976 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:55:57,976 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099951295] [2019-12-07 17:55:57,976 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:55:57,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:55:58,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:55:58,152 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2099951295] [2019-12-07 17:55:58,152 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:55:58,152 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:55:58,152 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034797681] [2019-12-07 17:55:58,152 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:55:58,152 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:55:58,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:55:58,152 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:55:58,152 INFO L87 Difference]: Start difference. First operand 9008 states and 28402 transitions. Second operand 13 states. [2019-12-07 17:56:00,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:56:00,544 INFO L93 Difference]: Finished difference Result 32350 states and 98378 transitions. [2019-12-07 17:56:00,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 17:56:00,545 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2019-12-07 17:56:00,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:56:00,582 INFO L225 Difference]: With dead ends: 32350 [2019-12-07 17:56:00,582 INFO L226 Difference]: Without dead ends: 20378 [2019-12-07 17:56:00,583 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 460 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=340, Invalid=1552, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 17:56:00,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20378 states. [2019-12-07 17:56:00,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20378 to 11428. [2019-12-07 17:56:00,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11428 states. [2019-12-07 17:56:00,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11428 states to 11428 states and 35890 transitions. [2019-12-07 17:56:00,804 INFO L78 Accepts]: Start accepts. Automaton has 11428 states and 35890 transitions. Word has length 55 [2019-12-07 17:56:00,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:56:00,804 INFO L462 AbstractCegarLoop]: Abstraction has 11428 states and 35890 transitions. [2019-12-07 17:56:00,804 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:56:00,804 INFO L276 IsEmpty]: Start isEmpty. Operand 11428 states and 35890 transitions. [2019-12-07 17:56:00,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:56:00,814 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:56:00,814 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:56:00,814 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:56:00,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:56:00,814 INFO L82 PathProgramCache]: Analyzing trace with hash -1003034569, now seen corresponding path program 2 times [2019-12-07 17:56:00,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:56:00,815 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064388503] [2019-12-07 17:56:00,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:56:00,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:56:01,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:56:01,088 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064388503] [2019-12-07 17:56:01,088 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:56:01,088 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:56:01,088 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495229134] [2019-12-07 17:56:01,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:56:01,089 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:56:01,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:56:01,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:56:01,089 INFO L87 Difference]: Start difference. First operand 11428 states and 35890 transitions. Second operand 15 states. [2019-12-07 17:56:03,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:56:03,547 INFO L93 Difference]: Finished difference Result 22914 states and 70417 transitions. [2019-12-07 17:56:03,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 17:56:03,547 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 55 [2019-12-07 17:56:03,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:56:03,569 INFO L225 Difference]: With dead ends: 22914 [2019-12-07 17:56:03,570 INFO L226 Difference]: Without dead ends: 17018 [2019-12-07 17:56:03,570 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 645 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=368, Invalid=1984, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 17:56:03,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17018 states. [2019-12-07 17:56:03,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17018 to 12907. [2019-12-07 17:56:03,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12907 states. [2019-12-07 17:56:03,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12907 states to 12907 states and 40038 transitions. [2019-12-07 17:56:03,780 INFO L78 Accepts]: Start accepts. Automaton has 12907 states and 40038 transitions. Word has length 55 [2019-12-07 17:56:03,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:56:03,780 INFO L462 AbstractCegarLoop]: Abstraction has 12907 states and 40038 transitions. [2019-12-07 17:56:03,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:56:03,780 INFO L276 IsEmpty]: Start isEmpty. Operand 12907 states and 40038 transitions. [2019-12-07 17:56:03,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:56:03,792 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:56:03,792 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:56:03,792 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:56:03,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:56:03,793 INFO L82 PathProgramCache]: Analyzing trace with hash -367516305, now seen corresponding path program 3 times [2019-12-07 17:56:03,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:56:03,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288755792] [2019-12-07 17:56:03,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:56:03,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:56:04,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:56:04,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [288755792] [2019-12-07 17:56:04,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:56:04,059 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 17:56:04,059 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679939502] [2019-12-07 17:56:04,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 17:56:04,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:56:04,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 17:56:04,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:56:04,059 INFO L87 Difference]: Start difference. First operand 12907 states and 40038 transitions. Second operand 16 states. [2019-12-07 17:56:05,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:56:05,850 INFO L93 Difference]: Finished difference Result 19175 states and 58418 transitions. [2019-12-07 17:56:05,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 17:56:05,850 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 55 [2019-12-07 17:56:05,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:56:05,870 INFO L225 Difference]: With dead ends: 19175 [2019-12-07 17:56:05,870 INFO L226 Difference]: Without dead ends: 16480 [2019-12-07 17:56:05,871 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 423 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=259, Invalid=1463, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 17:56:05,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16480 states. [2019-12-07 17:56:06,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16480 to 12905. [2019-12-07 17:56:06,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12905 states. [2019-12-07 17:56:06,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12905 states to 12905 states and 39977 transitions. [2019-12-07 17:56:06,075 INFO L78 Accepts]: Start accepts. Automaton has 12905 states and 39977 transitions. Word has length 55 [2019-12-07 17:56:06,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:56:06,075 INFO L462 AbstractCegarLoop]: Abstraction has 12905 states and 39977 transitions. [2019-12-07 17:56:06,075 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 17:56:06,075 INFO L276 IsEmpty]: Start isEmpty. Operand 12905 states and 39977 transitions. [2019-12-07 17:56:06,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:56:06,087 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:56:06,087 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:56:06,087 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:56:06,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:56:06,087 INFO L82 PathProgramCache]: Analyzing trace with hash 1545411663, now seen corresponding path program 4 times [2019-12-07 17:56:06,087 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:56:06,088 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406261727] [2019-12-07 17:56:06,088 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:56:06,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:56:06,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:56:06,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1406261727] [2019-12-07 17:56:06,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:56:06,328 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:56:06,328 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [398640561] [2019-12-07 17:56:06,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:56:06,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:56:06,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:56:06,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:56:06,329 INFO L87 Difference]: Start difference. First operand 12905 states and 39977 transitions. Second operand 13 states. [2019-12-07 17:56:07,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:56:07,339 INFO L93 Difference]: Finished difference Result 16822 states and 51534 transitions. [2019-12-07 17:56:07,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 17:56:07,340 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2019-12-07 17:56:07,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:56:07,378 INFO L225 Difference]: With dead ends: 16822 [2019-12-07 17:56:07,378 INFO L226 Difference]: Without dead ends: 16592 [2019-12-07 17:56:07,378 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=119, Invalid=583, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:56:07,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16592 states. [2019-12-07 17:56:07,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16592 to 13273. [2019-12-07 17:56:07,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13273 states. [2019-12-07 17:56:07,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13273 states to 13273 states and 40973 transitions. [2019-12-07 17:56:07,588 INFO L78 Accepts]: Start accepts. Automaton has 13273 states and 40973 transitions. Word has length 55 [2019-12-07 17:56:07,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:56:07,588 INFO L462 AbstractCegarLoop]: Abstraction has 13273 states and 40973 transitions. [2019-12-07 17:56:07,588 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:56:07,588 INFO L276 IsEmpty]: Start isEmpty. Operand 13273 states and 40973 transitions. [2019-12-07 17:56:07,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:56:07,600 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:56:07,600 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:56:07,601 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:56:07,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:56:07,601 INFO L82 PathProgramCache]: Analyzing trace with hash 1540693839, now seen corresponding path program 5 times [2019-12-07 17:56:07,601 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:56:07,601 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809963066] [2019-12-07 17:56:07,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:56:07,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:56:07,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:56:07,711 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809963066] [2019-12-07 17:56:07,711 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:56:07,711 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:56:07,711 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021662519] [2019-12-07 17:56:07,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:56:07,711 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:56:07,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:56:07,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:56:07,712 INFO L87 Difference]: Start difference. First operand 13273 states and 40973 transitions. Second operand 10 states. [2019-12-07 17:56:08,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:56:08,476 INFO L93 Difference]: Finished difference Result 27290 states and 83649 transitions. [2019-12-07 17:56:08,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 17:56:08,476 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 55 [2019-12-07 17:56:08,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:56:08,497 INFO L225 Difference]: With dead ends: 27290 [2019-12-07 17:56:08,497 INFO L226 Difference]: Without dead ends: 19810 [2019-12-07 17:56:08,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 262 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=236, Invalid=886, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 17:56:08,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19810 states. [2019-12-07 17:56:08,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19810 to 12796. [2019-12-07 17:56:08,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12796 states. [2019-12-07 17:56:08,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12796 states to 12796 states and 39489 transitions. [2019-12-07 17:56:08,721 INFO L78 Accepts]: Start accepts. Automaton has 12796 states and 39489 transitions. Word has length 55 [2019-12-07 17:56:08,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:56:08,722 INFO L462 AbstractCegarLoop]: Abstraction has 12796 states and 39489 transitions. [2019-12-07 17:56:08,722 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:56:08,722 INFO L276 IsEmpty]: Start isEmpty. Operand 12796 states and 39489 transitions. [2019-12-07 17:56:08,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:56:08,733 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:56:08,733 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:56:08,733 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:56:08,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:56:08,734 INFO L82 PathProgramCache]: Analyzing trace with hash 1318747633, now seen corresponding path program 6 times [2019-12-07 17:56:08,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:56:08,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789271740] [2019-12-07 17:56:08,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:56:08,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:56:08,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:56:08,866 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1789271740] [2019-12-07 17:56:08,866 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:56:08,866 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:56:08,866 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1401985321] [2019-12-07 17:56:08,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:56:08,866 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:56:08,867 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:56:08,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:56:08,867 INFO L87 Difference]: Start difference. First operand 12796 states and 39489 transitions. Second operand 11 states. [2019-12-07 17:56:09,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:56:09,418 INFO L93 Difference]: Finished difference Result 21756 states and 66965 transitions. [2019-12-07 17:56:09,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 17:56:09,418 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 55 [2019-12-07 17:56:09,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:56:09,441 INFO L225 Difference]: With dead ends: 21756 [2019-12-07 17:56:09,441 INFO L226 Difference]: Without dead ends: 21446 [2019-12-07 17:56:09,441 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=139, Invalid=617, Unknown=0, NotChecked=0, Total=756 [2019-12-07 17:56:09,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21446 states. [2019-12-07 17:56:09,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21446 to 15270. [2019-12-07 17:56:09,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15270 states. [2019-12-07 17:56:09,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15270 states to 15270 states and 47210 transitions. [2019-12-07 17:56:09,711 INFO L78 Accepts]: Start accepts. Automaton has 15270 states and 47210 transitions. Word has length 55 [2019-12-07 17:56:09,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:56:09,711 INFO L462 AbstractCegarLoop]: Abstraction has 15270 states and 47210 transitions. [2019-12-07 17:56:09,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:56:09,711 INFO L276 IsEmpty]: Start isEmpty. Operand 15270 states and 47210 transitions. [2019-12-07 17:56:09,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:56:09,724 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:56:09,724 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:56:09,725 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:56:09,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:56:09,725 INFO L82 PathProgramCache]: Analyzing trace with hash 1314029809, now seen corresponding path program 7 times [2019-12-07 17:56:09,725 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:56:09,725 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173342067] [2019-12-07 17:56:09,725 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:56:09,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:56:09,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:56:09,836 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173342067] [2019-12-07 17:56:09,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:56:09,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:56:09,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464483313] [2019-12-07 17:56:09,837 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:56:09,837 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:56:09,837 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:56:09,837 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:56:09,837 INFO L87 Difference]: Start difference. First operand 15270 states and 47210 transitions. Second operand 11 states. [2019-12-07 17:56:10,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:56:10,484 INFO L93 Difference]: Finished difference Result 21761 states and 66530 transitions. [2019-12-07 17:56:10,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 17:56:10,484 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 55 [2019-12-07 17:56:10,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:56:10,504 INFO L225 Difference]: With dead ends: 21761 [2019-12-07 17:56:10,504 INFO L226 Difference]: Without dead ends: 18685 [2019-12-07 17:56:10,504 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=132, Invalid=570, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:56:10,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18685 states. [2019-12-07 17:56:10,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18685 to 12486. [2019-12-07 17:56:10,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12486 states. [2019-12-07 17:56:10,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12486 states to 12486 states and 38520 transitions. [2019-12-07 17:56:10,715 INFO L78 Accepts]: Start accepts. Automaton has 12486 states and 38520 transitions. Word has length 55 [2019-12-07 17:56:10,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:56:10,716 INFO L462 AbstractCegarLoop]: Abstraction has 12486 states and 38520 transitions. [2019-12-07 17:56:10,716 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:56:10,716 INFO L276 IsEmpty]: Start isEmpty. Operand 12486 states and 38520 transitions. [2019-12-07 17:56:10,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:56:10,727 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:56:10,727 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:56:10,727 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:56:10,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:56:10,727 INFO L82 PathProgramCache]: Analyzing trace with hash -767893923, now seen corresponding path program 8 times [2019-12-07 17:56:10,727 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:56:10,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931141727] [2019-12-07 17:56:10,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:56:10,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:56:10,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:56:10,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931141727] [2019-12-07 17:56:10,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:56:10,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:56:10,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222295165] [2019-12-07 17:56:10,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:56:10,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:56:10,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:56:10,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:56:10,838 INFO L87 Difference]: Start difference. First operand 12486 states and 38520 transitions. Second operand 12 states. [2019-12-07 17:56:11,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:56:11,392 INFO L93 Difference]: Finished difference Result 18987 states and 57859 transitions. [2019-12-07 17:56:11,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 17:56:11,392 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 55 [2019-12-07 17:56:11,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:56:11,412 INFO L225 Difference]: With dead ends: 18987 [2019-12-07 17:56:11,412 INFO L226 Difference]: Without dead ends: 18597 [2019-12-07 17:56:11,413 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:56:11,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18597 states. [2019-12-07 17:56:11,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18597 to 12254. [2019-12-07 17:56:11,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12254 states. [2019-12-07 17:56:11,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12254 states to 12254 states and 37868 transitions. [2019-12-07 17:56:11,618 INFO L78 Accepts]: Start accepts. Automaton has 12254 states and 37868 transitions. Word has length 55 [2019-12-07 17:56:11,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:56:11,618 INFO L462 AbstractCegarLoop]: Abstraction has 12254 states and 37868 transitions. [2019-12-07 17:56:11,619 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:56:11,619 INFO L276 IsEmpty]: Start isEmpty. Operand 12254 states and 37868 transitions. [2019-12-07 17:56:11,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:56:11,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:56:11,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:56:11,629 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:56:11,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:56:11,629 INFO L82 PathProgramCache]: Analyzing trace with hash -238462213, now seen corresponding path program 9 times [2019-12-07 17:56:11,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:56:11,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376223019] [2019-12-07 17:56:11,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:56:11,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:56:11,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:56:11,692 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:56:11,692 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:56:11,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] ULTIMATE.startENTRY-->L823: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t412~0.base_40| 1)) (= 0 v_~__unbuffered_p2_EAX~0_40) (= 0 v_~__unbuffered_p0_EAX~0_50) (= 0 v_~x$w_buff0~0_407) (= 0 v_~weak$$choice0~0_14) (= v_~__unbuffered_cnt~0_133 0) (= 0 v_~x$w_buff0_used~0_981) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~x$r_buff1_thd1~0_402 0) (= 0 v_~x$w_buff1~0_314) (= v_~x$flush_delayed~0_48 0) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x~0_233) (= 0 v_~x$r_buff0_thd2~0_329) (< 0 |v_#StackHeapBarrier_15|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t412~0.base_40| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t412~0.base_40|) |v_ULTIMATE.start_main_~#t412~0.offset_28| 0)) |v_#memory_int_17|) (= 0 v_~x$r_buff0_thd3~0_134) (= v_~__unbuffered_p1_EAX~0_219 0) (= 0 v_~x$w_buff1_used~0_593) (= v_~z~0_23 0) (= 0 |v_#NULL.base_4|) (= v_~x$r_buff0_thd1~0_388 0) (= |v_ULTIMATE.start_main_~#t412~0.offset_28| 0) (= v_~main$tmp_guard1~0_38 0) (= 0 v_~x$read_delayed_var~0.offset_8) (= 0 v_~x$read_delayed~0_7) (= v_~x$mem_tmp~0_17 0) (= v_~main$tmp_guard0~0_20 0) (= v_~x$r_buff0_thd0~0_141 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t412~0.base_40|) 0) (= |v_#NULL.offset_4| 0) (= v_~weak$$choice2~0_186 0) (= v_~y~0_68 0) (= 0 v_~x$r_buff1_thd3~0_275) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t412~0.base_40|) (= v_~__unbuffered_p2_EBX~0_40 0) (= v_~x$r_buff1_thd0~0_274 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t412~0.base_40| 4)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_407, ULTIMATE.start_main_~#t414~0.base=|v_ULTIMATE.start_main_~#t414~0.base_19|, ~x$flush_delayed~0=v_~x$flush_delayed~0_48, ULTIMATE.start_main_~#t412~0.offset=|v_ULTIMATE.start_main_~#t412~0.offset_28|, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_402, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_134, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_43|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_50, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_219, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_40, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_141, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ~x$w_buff1~0=v_~x$w_buff1~0_314, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_593, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_133, ~x~0=v_~x~0_233, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_388, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_73|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_275, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ~x$mem_tmp~0=v_~x$mem_tmp~0_17, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_127|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_49|, ~y~0=v_~y~0_68, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_19|, ULTIMATE.start_main_~#t412~0.base=|v_ULTIMATE.start_main_~#t412~0.base_40|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_20, ULTIMATE.start_main_~#t413~0.base=|v_ULTIMATE.start_main_~#t413~0.base_32|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_274, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_329, ULTIMATE.start_main_~#t414~0.offset=|v_ULTIMATE.start_main_~#t414~0.offset_16|, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_981, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_77|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_10|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_186, ULTIMATE.start_main_~#t413~0.offset=|v_ULTIMATE.start_main_~#t413~0.offset_23|, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_~#t414~0.base, ~x$flush_delayed~0, ULTIMATE.start_main_~#t412~0.offset, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t412~0.base, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t413~0.base, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_~#t414~0.offset, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t413~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:56:11,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L823-1-->L825: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t413~0.base_11|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t413~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t413~0.base_11|) |v_ULTIMATE.start_main_~#t413~0.offset_10| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t413~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t413~0.offset_10|) (= (store |v_#valid_38| |v_ULTIMATE.start_main_~#t413~0.base_11| 1) |v_#valid_37|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t413~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t413~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, #length=|v_#length_15|, ULTIMATE.start_main_~#t413~0.base=|v_ULTIMATE.start_main_~#t413~0.base_11|, ULTIMATE.start_main_~#t413~0.offset=|v_ULTIMATE.start_main_~#t413~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t413~0.base, ULTIMATE.start_main_~#t413~0.offset] because there is no mapped edge [2019-12-07 17:56:11,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P1ENTRY-->L5-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9)) (= v_~x$w_buff1_used~0_59 v_~x$w_buff0_used~0_123) (= (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_122 256))) (not (= 0 (mod v_~x$w_buff1_used~0_59 256))))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|) (= 1 v_~x$w_buff0~0_27) (= v_P1Thread1of1ForFork0_~arg.offset_7 |v_P1Thread1of1ForFork0_#in~arg.offset_9|) (= 1 v_~x$w_buff0_used~0_122) (= v_~x$w_buff0~0_28 v_~x$w_buff1~0_20) (= v_P1Thread1of1ForFork0_~arg.base_7 |v_P1Thread1of1ForFork0_#in~arg.base_9|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_28, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_9|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_9|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_123} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_27, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_7, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_7, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_9|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|, ~x$w_buff1~0=v_~x$w_buff1~0_20, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_9|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_59, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_122} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:56:11,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L825-1-->L827: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t414~0.offset_10|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t414~0.base_11|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t414~0.base_11|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t414~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t414~0.base_11|) |v_ULTIMATE.start_main_~#t414~0.offset_10| 2))) (= (store |v_#valid_34| |v_ULTIMATE.start_main_~#t414~0.base_11| 1) |v_#valid_33|) (not (= |v_ULTIMATE.start_main_~#t414~0.base_11| 0)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t414~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t414~0.base=|v_ULTIMATE.start_main_~#t414~0.base_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|, ULTIMATE.start_main_~#t414~0.offset=|v_ULTIMATE.start_main_~#t414~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t414~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t414~0.offset] because there is no mapped edge [2019-12-07 17:56:11,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L800-2-->L800-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In681769879 256))) (.cse0 (= (mod ~x$r_buff1_thd3~0_In681769879 256) 0))) (or (and (not .cse0) (= ~x$w_buff1~0_In681769879 |P2Thread1of1ForFork1_#t~ite32_Out681769879|) (not .cse1)) (and (= ~x~0_In681769879 |P2Thread1of1ForFork1_#t~ite32_Out681769879|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In681769879, ~x$w_buff1_used~0=~x$w_buff1_used~0_In681769879, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In681769879, ~x~0=~x~0_In681769879} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out681769879|, ~x$w_buff1~0=~x$w_buff1~0_In681769879, ~x$w_buff1_used~0=~x$w_buff1_used~0_In681769879, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In681769879, ~x~0=~x~0_In681769879} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 17:56:11,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1092512122 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1092512122 256) 0))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out-1092512122|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite28_Out-1092512122| ~x$w_buff0_used~0_In-1092512122)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1092512122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1092512122} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1092512122, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-1092512122|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1092512122} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 17:56:11,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1010383429 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In1010383429 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1010383429 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In1010383429 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite29_Out1010383429| ~x$w_buff1_used~0_In1010383429) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite29_Out1010383429|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1010383429, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1010383429, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1010383429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1010383429} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1010383429, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1010383429, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1010383429, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1010383429|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1010383429} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:56:11,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L780-->L781: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In-552678360 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_In-552678360 ~x$r_buff0_thd2~0_Out-552678360)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-552678360 256)))) (or (and (not .cse0) (= 0 ~x$r_buff0_thd2~0_Out-552678360) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-552678360, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-552678360} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-552678360|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-552678360, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-552678360} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:56:11,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L781-->L781-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In758966527 256))) (.cse2 (= (mod ~x$r_buff1_thd2~0_In758966527 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In758966527 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In758966527 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd2~0_In758966527 |P1Thread1of1ForFork0_#t~ite31_Out758966527|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite31_Out758966527|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In758966527, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In758966527, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In758966527, ~x$w_buff0_used~0=~x$w_buff0_used~0_In758966527} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out758966527|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In758966527, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In758966527, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In758966527, ~x$w_buff0_used~0=~x$w_buff0_used~0_In758966527} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:56:11,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L781-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_51 |v_P1Thread1of1ForFork0_#t~ite31_32|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_31|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_51, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 17:56:11,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L744-->L744-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-659750289 256)))) (or (and (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-659750289 256)))) (or (and .cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-659750289 256))) (and (= 0 (mod ~x$w_buff1_used~0_In-659750289 256)) .cse0) (= 0 (mod ~x$w_buff0_used~0_In-659750289 256)))) (= |P0Thread1of1ForFork2_#t~ite14_Out-659750289| |P0Thread1of1ForFork2_#t~ite15_Out-659750289|) .cse1 (= ~x$w_buff0_used~0_In-659750289 |P0Thread1of1ForFork2_#t~ite14_Out-659750289|)) (and (not .cse1) (= ~x$w_buff0_used~0_In-659750289 |P0Thread1of1ForFork2_#t~ite15_Out-659750289|) (= |P0Thread1of1ForFork2_#t~ite14_In-659750289| |P0Thread1of1ForFork2_#t~ite14_Out-659750289|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-659750289, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-659750289, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-659750289, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_In-659750289|, ~weak$$choice2~0=~weak$$choice2~0_In-659750289, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-659750289} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-659750289, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-659750289, P0Thread1of1ForFork2_#t~ite15=|P0Thread1of1ForFork2_#t~ite15_Out-659750289|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-659750289, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_Out-659750289|, ~weak$$choice2~0=~weak$$choice2~0_In-659750289, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-659750289} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite15, P0Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:56:11,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L745-->L745-8: Formula: (let ((.cse0 (= |P0Thread1of1ForFork2_#t~ite18_Out-1883407491| |P0Thread1of1ForFork2_#t~ite17_Out-1883407491|)) (.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In-1883407491 256))) (.cse4 (= (mod ~x$w_buff1_used~0_In-1883407491 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1883407491 256) 0)) (.cse5 (= 0 (mod ~weak$$choice2~0_In-1883407491 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-1883407491 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite16_In-1883407491| |P0Thread1of1ForFork2_#t~ite16_Out-1883407491|) (or (and .cse0 (or .cse1 (and .cse2 .cse3) (and .cse2 .cse4)) (= |P0Thread1of1ForFork2_#t~ite17_Out-1883407491| ~x$w_buff1_used~0_In-1883407491) .cse5) (and (= |P0Thread1of1ForFork2_#t~ite17_In-1883407491| |P0Thread1of1ForFork2_#t~ite17_Out-1883407491|) (not .cse5) (= |P0Thread1of1ForFork2_#t~ite18_Out-1883407491| ~x$w_buff1_used~0_In-1883407491)))) (let ((.cse6 (not .cse2))) (and .cse0 (= |P0Thread1of1ForFork2_#t~ite16_Out-1883407491| 0) (= |P0Thread1of1ForFork2_#t~ite17_Out-1883407491| |P0Thread1of1ForFork2_#t~ite16_Out-1883407491|) (or .cse6 (not .cse3)) (or .cse6 (not .cse4)) (not .cse1) .cse5)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1883407491, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-1883407491|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1883407491, P0Thread1of1ForFork2_#t~ite16=|P0Thread1of1ForFork2_#t~ite16_In-1883407491|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1883407491, ~weak$$choice2~0=~weak$$choice2~0_In-1883407491, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1883407491} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1883407491, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-1883407491|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-1883407491|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1883407491, P0Thread1of1ForFork2_#t~ite16=|P0Thread1of1ForFork2_#t~ite16_Out-1883407491|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1883407491, ~weak$$choice2~0=~weak$$choice2~0_In-1883407491, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1883407491} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17, P0Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 17:56:11,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L745-8-->L747: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite18_53| v_~x$w_buff1_used~0_577) (not (= 0 (mod v_~weak$$choice2~0_176 256))) (= v_~x$r_buff0_thd1~0_373 v_~x$r_buff0_thd1~0_372)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_373, P0Thread1of1ForFork2_#t~ite18=|v_P0Thread1of1ForFork2_#t~ite18_53|, ~weak$$choice2~0=v_~weak$$choice2~0_176} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_37|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_372, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_25|, P0Thread1of1ForFork2_#t~ite18=|v_P0Thread1of1ForFork2_#t~ite18_52|, P0Thread1of1ForFork2_#t~ite17=|v_P0Thread1of1ForFork2_#t~ite17_46|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_577, P0Thread1of1ForFork2_#t~ite16=|v_P0Thread1of1ForFork2_#t~ite16_42|, ~weak$$choice2~0=v_~weak$$choice2~0_176, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_13|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite16, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:56:11,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L800-4-->L801: Formula: (= v_~x~0_36 |v_P2Thread1of1ForFork1_#t~ite32_12|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_12|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_11|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_19|, ~x~0=v_~x~0_36} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 17:56:11,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L749-->L757: Formula: (and (= v_~x$flush_delayed~0_13 0) (not (= (mod v_~x$flush_delayed~0_14 256) 0)) (= v_~x$mem_tmp~0_5 v_~x~0_56) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_14, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~x$mem_tmp~0=v_~x$mem_tmp~0_5} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~x$mem_tmp~0=v_~x$mem_tmp~0_5, ~x~0=v_~x~0_56} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 17:56:11,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L801-->L801-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-346810437 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In-346810437 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out-346810437| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-346810437 |P2Thread1of1ForFork1_#t~ite34_Out-346810437|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-346810437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-346810437} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-346810437|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-346810437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-346810437} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 17:56:11,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In2068129221 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In2068129221 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In2068129221 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In2068129221 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite35_Out2068129221|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In2068129221 |P2Thread1of1ForFork1_#t~ite35_Out2068129221|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In2068129221, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2068129221, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2068129221, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2068129221} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out2068129221|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2068129221, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2068129221, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2068129221, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2068129221} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 17:56:11,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L803-->L803-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-157369267 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-157369267 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out-157369267| 0)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-157369267| ~x$r_buff0_thd3~0_In-157369267) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-157369267, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-157369267} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-157369267|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-157369267, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-157369267} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 17:56:11,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-372731222 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-372731222 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-372731222 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-372731222 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out-372731222| ~x$r_buff1_thd3~0_In-372731222) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite37_Out-372731222|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-372731222, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-372731222, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-372731222, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-372731222} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out-372731222|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-372731222, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-372731222, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-372731222, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-372731222} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 17:56:11,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L804-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82) (= |v_P2Thread1of1ForFork1_#t~ite37_40| v_~x$r_buff1_thd3~0_144)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_40|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_39|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_144, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 17:56:11,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L827-1-->L833: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:56:11,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L833-2-->L833-5: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-862828190 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-862828190 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite41_Out-862828190| |ULTIMATE.start_main_#t~ite42_Out-862828190|))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite41_Out-862828190| ~x$w_buff1~0_In-862828190) .cse2) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite41_Out-862828190| ~x~0_In-862828190) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-862828190, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-862828190, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-862828190, ~x~0=~x~0_In-862828190} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-862828190|, ~x$w_buff1~0=~x$w_buff1~0_In-862828190, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-862828190, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-862828190, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-862828190|, ~x~0=~x~0_In-862828190} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:56:11,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1450691659 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1450691659 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite43_Out-1450691659| 0)) (and (= ~x$w_buff0_used~0_In-1450691659 |ULTIMATE.start_main_#t~ite43_Out-1450691659|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1450691659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1450691659} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1450691659, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1450691659|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1450691659} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 17:56:11,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L835-->L835-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In1994607304 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1994607304 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1994607304 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1994607304 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out1994607304| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In1994607304 |ULTIMATE.start_main_#t~ite44_Out1994607304|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1994607304, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1994607304, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1994607304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1994607304} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1994607304, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1994607304, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1994607304, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1994607304|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1994607304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:56:11,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1744963358 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1744963358 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out1744963358| ~x$r_buff0_thd0~0_In1744963358)) (and (= |ULTIMATE.start_main_#t~ite45_Out1744963358| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1744963358, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1744963358} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1744963358, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1744963358|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1744963358} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:56:11,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L837-->L837-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In1226948157 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In1226948157 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In1226948157 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1226948157 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out1226948157| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In1226948157 |ULTIMATE.start_main_#t~ite46_Out1226948157|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1226948157, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1226948157, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1226948157, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226948157} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1226948157, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1226948157|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1226948157, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1226948157, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226948157} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 17:56:11,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L837-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_22 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p1_EAX~0_205 0) (= v_~__unbuffered_p2_EBX~0_21 0) (= 0 v_~__unbuffered_p0_EAX~0_34))) 1 0)) 0 1) v_~main$tmp_guard1~0_22) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~x$r_buff1_thd0~0_258 |v_ULTIMATE.start_main_#t~ite46_45|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_205, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_45|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_205, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_44|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_258, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:56:11,767 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:56:11 BasicIcfg [2019-12-07 17:56:11,767 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:56:11,768 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:56:11,768 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:56:11,768 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:56:11,768 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:54:45" (3/4) ... [2019-12-07 17:56:11,770 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:56:11,771 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] ULTIMATE.startENTRY-->L823: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t412~0.base_40| 1)) (= 0 v_~__unbuffered_p2_EAX~0_40) (= 0 v_~__unbuffered_p0_EAX~0_50) (= 0 v_~x$w_buff0~0_407) (= 0 v_~weak$$choice0~0_14) (= v_~__unbuffered_cnt~0_133 0) (= 0 v_~x$w_buff0_used~0_981) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~x$r_buff1_thd1~0_402 0) (= 0 v_~x$w_buff1~0_314) (= v_~x$flush_delayed~0_48 0) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x~0_233) (= 0 v_~x$r_buff0_thd2~0_329) (< 0 |v_#StackHeapBarrier_15|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t412~0.base_40| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t412~0.base_40|) |v_ULTIMATE.start_main_~#t412~0.offset_28| 0)) |v_#memory_int_17|) (= 0 v_~x$r_buff0_thd3~0_134) (= v_~__unbuffered_p1_EAX~0_219 0) (= 0 v_~x$w_buff1_used~0_593) (= v_~z~0_23 0) (= 0 |v_#NULL.base_4|) (= v_~x$r_buff0_thd1~0_388 0) (= |v_ULTIMATE.start_main_~#t412~0.offset_28| 0) (= v_~main$tmp_guard1~0_38 0) (= 0 v_~x$read_delayed_var~0.offset_8) (= 0 v_~x$read_delayed~0_7) (= v_~x$mem_tmp~0_17 0) (= v_~main$tmp_guard0~0_20 0) (= v_~x$r_buff0_thd0~0_141 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t412~0.base_40|) 0) (= |v_#NULL.offset_4| 0) (= v_~weak$$choice2~0_186 0) (= v_~y~0_68 0) (= 0 v_~x$r_buff1_thd3~0_275) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t412~0.base_40|) (= v_~__unbuffered_p2_EBX~0_40 0) (= v_~x$r_buff1_thd0~0_274 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t412~0.base_40| 4)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_407, ULTIMATE.start_main_~#t414~0.base=|v_ULTIMATE.start_main_~#t414~0.base_19|, ~x$flush_delayed~0=v_~x$flush_delayed~0_48, ULTIMATE.start_main_~#t412~0.offset=|v_ULTIMATE.start_main_~#t412~0.offset_28|, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_402, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_134, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_43|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_50, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_219, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_40, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_141, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ~x$w_buff1~0=v_~x$w_buff1~0_314, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_593, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_133, ~x~0=v_~x~0_233, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_388, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_73|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_275, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ~x$mem_tmp~0=v_~x$mem_tmp~0_17, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_127|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_49|, ~y~0=v_~y~0_68, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_19|, ULTIMATE.start_main_~#t412~0.base=|v_ULTIMATE.start_main_~#t412~0.base_40|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_20, ULTIMATE.start_main_~#t413~0.base=|v_ULTIMATE.start_main_~#t413~0.base_32|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_274, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_329, ULTIMATE.start_main_~#t414~0.offset=|v_ULTIMATE.start_main_~#t414~0.offset_16|, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_981, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_77|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_10|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_186, ULTIMATE.start_main_~#t413~0.offset=|v_ULTIMATE.start_main_~#t413~0.offset_23|, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_~#t414~0.base, ~x$flush_delayed~0, ULTIMATE.start_main_~#t412~0.offset, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t412~0.base, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t413~0.base, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_~#t414~0.offset, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t413~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:56:11,771 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L823-1-->L825: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t413~0.base_11|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t413~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t413~0.base_11|) |v_ULTIMATE.start_main_~#t413~0.offset_10| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t413~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t413~0.offset_10|) (= (store |v_#valid_38| |v_ULTIMATE.start_main_~#t413~0.base_11| 1) |v_#valid_37|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t413~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t413~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, #length=|v_#length_15|, ULTIMATE.start_main_~#t413~0.base=|v_ULTIMATE.start_main_~#t413~0.base_11|, ULTIMATE.start_main_~#t413~0.offset=|v_ULTIMATE.start_main_~#t413~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t413~0.base, ULTIMATE.start_main_~#t413~0.offset] because there is no mapped edge [2019-12-07 17:56:11,772 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P1ENTRY-->L5-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9)) (= v_~x$w_buff1_used~0_59 v_~x$w_buff0_used~0_123) (= (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_122 256))) (not (= 0 (mod v_~x$w_buff1_used~0_59 256))))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|) (= 1 v_~x$w_buff0~0_27) (= v_P1Thread1of1ForFork0_~arg.offset_7 |v_P1Thread1of1ForFork0_#in~arg.offset_9|) (= 1 v_~x$w_buff0_used~0_122) (= v_~x$w_buff0~0_28 v_~x$w_buff1~0_20) (= v_P1Thread1of1ForFork0_~arg.base_7 |v_P1Thread1of1ForFork0_#in~arg.base_9|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_28, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_9|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_9|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_123} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_27, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_7, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_7, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_9|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|, ~x$w_buff1~0=v_~x$w_buff1~0_20, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_9|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_59, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_122} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:56:11,773 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L825-1-->L827: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t414~0.offset_10|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t414~0.base_11|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t414~0.base_11|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t414~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t414~0.base_11|) |v_ULTIMATE.start_main_~#t414~0.offset_10| 2))) (= (store |v_#valid_34| |v_ULTIMATE.start_main_~#t414~0.base_11| 1) |v_#valid_33|) (not (= |v_ULTIMATE.start_main_~#t414~0.base_11| 0)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t414~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t414~0.base=|v_ULTIMATE.start_main_~#t414~0.base_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|, ULTIMATE.start_main_~#t414~0.offset=|v_ULTIMATE.start_main_~#t414~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t414~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t414~0.offset] because there is no mapped edge [2019-12-07 17:56:11,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L800-2-->L800-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In681769879 256))) (.cse0 (= (mod ~x$r_buff1_thd3~0_In681769879 256) 0))) (or (and (not .cse0) (= ~x$w_buff1~0_In681769879 |P2Thread1of1ForFork1_#t~ite32_Out681769879|) (not .cse1)) (and (= ~x~0_In681769879 |P2Thread1of1ForFork1_#t~ite32_Out681769879|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In681769879, ~x$w_buff1_used~0=~x$w_buff1_used~0_In681769879, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In681769879, ~x~0=~x~0_In681769879} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out681769879|, ~x$w_buff1~0=~x$w_buff1~0_In681769879, ~x$w_buff1_used~0=~x$w_buff1_used~0_In681769879, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In681769879, ~x~0=~x~0_In681769879} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 17:56:11,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1092512122 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1092512122 256) 0))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out-1092512122|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite28_Out-1092512122| ~x$w_buff0_used~0_In-1092512122)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1092512122, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1092512122} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1092512122, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-1092512122|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1092512122} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 17:56:11,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1010383429 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In1010383429 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1010383429 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In1010383429 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite29_Out1010383429| ~x$w_buff1_used~0_In1010383429) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite29_Out1010383429|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1010383429, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1010383429, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1010383429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1010383429} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1010383429, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1010383429, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1010383429, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1010383429|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1010383429} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:56:11,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L780-->L781: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In-552678360 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_In-552678360 ~x$r_buff0_thd2~0_Out-552678360)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-552678360 256)))) (or (and (not .cse0) (= 0 ~x$r_buff0_thd2~0_Out-552678360) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-552678360, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-552678360} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-552678360|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-552678360, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-552678360} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:56:11,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L781-->L781-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In758966527 256))) (.cse2 (= (mod ~x$r_buff1_thd2~0_In758966527 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In758966527 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In758966527 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd2~0_In758966527 |P1Thread1of1ForFork0_#t~ite31_Out758966527|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite31_Out758966527|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In758966527, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In758966527, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In758966527, ~x$w_buff0_used~0=~x$w_buff0_used~0_In758966527} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out758966527|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In758966527, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In758966527, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In758966527, ~x$w_buff0_used~0=~x$w_buff0_used~0_In758966527} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:56:11,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L781-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_51 |v_P1Thread1of1ForFork0_#t~ite31_32|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_31|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_51, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 17:56:11,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L744-->L744-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-659750289 256)))) (or (and (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-659750289 256)))) (or (and .cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-659750289 256))) (and (= 0 (mod ~x$w_buff1_used~0_In-659750289 256)) .cse0) (= 0 (mod ~x$w_buff0_used~0_In-659750289 256)))) (= |P0Thread1of1ForFork2_#t~ite14_Out-659750289| |P0Thread1of1ForFork2_#t~ite15_Out-659750289|) .cse1 (= ~x$w_buff0_used~0_In-659750289 |P0Thread1of1ForFork2_#t~ite14_Out-659750289|)) (and (not .cse1) (= ~x$w_buff0_used~0_In-659750289 |P0Thread1of1ForFork2_#t~ite15_Out-659750289|) (= |P0Thread1of1ForFork2_#t~ite14_In-659750289| |P0Thread1of1ForFork2_#t~ite14_Out-659750289|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-659750289, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-659750289, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-659750289, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_In-659750289|, ~weak$$choice2~0=~weak$$choice2~0_In-659750289, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-659750289} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-659750289, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-659750289, P0Thread1of1ForFork2_#t~ite15=|P0Thread1of1ForFork2_#t~ite15_Out-659750289|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-659750289, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_Out-659750289|, ~weak$$choice2~0=~weak$$choice2~0_In-659750289, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-659750289} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite15, P0Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:56:11,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L745-->L745-8: Formula: (let ((.cse0 (= |P0Thread1of1ForFork2_#t~ite18_Out-1883407491| |P0Thread1of1ForFork2_#t~ite17_Out-1883407491|)) (.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In-1883407491 256))) (.cse4 (= (mod ~x$w_buff1_used~0_In-1883407491 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1883407491 256) 0)) (.cse5 (= 0 (mod ~weak$$choice2~0_In-1883407491 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-1883407491 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite16_In-1883407491| |P0Thread1of1ForFork2_#t~ite16_Out-1883407491|) (or (and .cse0 (or .cse1 (and .cse2 .cse3) (and .cse2 .cse4)) (= |P0Thread1of1ForFork2_#t~ite17_Out-1883407491| ~x$w_buff1_used~0_In-1883407491) .cse5) (and (= |P0Thread1of1ForFork2_#t~ite17_In-1883407491| |P0Thread1of1ForFork2_#t~ite17_Out-1883407491|) (not .cse5) (= |P0Thread1of1ForFork2_#t~ite18_Out-1883407491| ~x$w_buff1_used~0_In-1883407491)))) (let ((.cse6 (not .cse2))) (and .cse0 (= |P0Thread1of1ForFork2_#t~ite16_Out-1883407491| 0) (= |P0Thread1of1ForFork2_#t~ite17_Out-1883407491| |P0Thread1of1ForFork2_#t~ite16_Out-1883407491|) (or .cse6 (not .cse3)) (or .cse6 (not .cse4)) (not .cse1) .cse5)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1883407491, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-1883407491|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1883407491, P0Thread1of1ForFork2_#t~ite16=|P0Thread1of1ForFork2_#t~ite16_In-1883407491|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1883407491, ~weak$$choice2~0=~weak$$choice2~0_In-1883407491, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1883407491} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1883407491, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-1883407491|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-1883407491|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1883407491, P0Thread1of1ForFork2_#t~ite16=|P0Thread1of1ForFork2_#t~ite16_Out-1883407491|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1883407491, ~weak$$choice2~0=~weak$$choice2~0_In-1883407491, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1883407491} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17, P0Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 17:56:11,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L745-8-->L747: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite18_53| v_~x$w_buff1_used~0_577) (not (= 0 (mod v_~weak$$choice2~0_176 256))) (= v_~x$r_buff0_thd1~0_373 v_~x$r_buff0_thd1~0_372)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_373, P0Thread1of1ForFork2_#t~ite18=|v_P0Thread1of1ForFork2_#t~ite18_53|, ~weak$$choice2~0=v_~weak$$choice2~0_176} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_37|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_372, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_25|, P0Thread1of1ForFork2_#t~ite18=|v_P0Thread1of1ForFork2_#t~ite18_52|, P0Thread1of1ForFork2_#t~ite17=|v_P0Thread1of1ForFork2_#t~ite17_46|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_577, P0Thread1of1ForFork2_#t~ite16=|v_P0Thread1of1ForFork2_#t~ite16_42|, ~weak$$choice2~0=v_~weak$$choice2~0_176, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_13|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite16, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:56:11,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L800-4-->L801: Formula: (= v_~x~0_36 |v_P2Thread1of1ForFork1_#t~ite32_12|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_12|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_11|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_19|, ~x~0=v_~x~0_36} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 17:56:11,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L749-->L757: Formula: (and (= v_~x$flush_delayed~0_13 0) (not (= (mod v_~x$flush_delayed~0_14 256) 0)) (= v_~x$mem_tmp~0_5 v_~x~0_56) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_14, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~x$mem_tmp~0=v_~x$mem_tmp~0_5} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~x$mem_tmp~0=v_~x$mem_tmp~0_5, ~x~0=v_~x~0_56} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 17:56:11,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L801-->L801-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-346810437 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In-346810437 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out-346810437| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-346810437 |P2Thread1of1ForFork1_#t~ite34_Out-346810437|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-346810437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-346810437} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-346810437|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-346810437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-346810437} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 17:56:11,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In2068129221 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In2068129221 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In2068129221 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In2068129221 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite35_Out2068129221|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In2068129221 |P2Thread1of1ForFork1_#t~ite35_Out2068129221|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In2068129221, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2068129221, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2068129221, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2068129221} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out2068129221|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2068129221, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2068129221, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2068129221, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2068129221} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 17:56:11,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L803-->L803-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-157369267 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-157369267 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out-157369267| 0)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-157369267| ~x$r_buff0_thd3~0_In-157369267) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-157369267, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-157369267} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-157369267|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-157369267, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-157369267} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 17:56:11,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-372731222 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-372731222 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-372731222 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-372731222 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out-372731222| ~x$r_buff1_thd3~0_In-372731222) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite37_Out-372731222|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-372731222, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-372731222, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-372731222, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-372731222} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out-372731222|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-372731222, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-372731222, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-372731222, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-372731222} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 17:56:11,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L804-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82) (= |v_P2Thread1of1ForFork1_#t~ite37_40| v_~x$r_buff1_thd3~0_144)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_40|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_39|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_144, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 17:56:11,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L827-1-->L833: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:56:11,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L833-2-->L833-5: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-862828190 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-862828190 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite41_Out-862828190| |ULTIMATE.start_main_#t~ite42_Out-862828190|))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite41_Out-862828190| ~x$w_buff1~0_In-862828190) .cse2) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite41_Out-862828190| ~x~0_In-862828190) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-862828190, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-862828190, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-862828190, ~x~0=~x~0_In-862828190} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-862828190|, ~x$w_buff1~0=~x$w_buff1~0_In-862828190, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-862828190, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-862828190, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-862828190|, ~x~0=~x~0_In-862828190} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:56:11,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1450691659 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1450691659 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite43_Out-1450691659| 0)) (and (= ~x$w_buff0_used~0_In-1450691659 |ULTIMATE.start_main_#t~ite43_Out-1450691659|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1450691659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1450691659} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1450691659, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1450691659|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1450691659} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 17:56:11,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L835-->L835-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In1994607304 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1994607304 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1994607304 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1994607304 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out1994607304| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In1994607304 |ULTIMATE.start_main_#t~ite44_Out1994607304|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1994607304, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1994607304, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1994607304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1994607304} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1994607304, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1994607304, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1994607304, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1994607304|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1994607304} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:56:11,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1744963358 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1744963358 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out1744963358| ~x$r_buff0_thd0~0_In1744963358)) (and (= |ULTIMATE.start_main_#t~ite45_Out1744963358| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1744963358, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1744963358} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1744963358, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1744963358|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1744963358} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:56:11,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L837-->L837-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In1226948157 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In1226948157 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In1226948157 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1226948157 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out1226948157| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In1226948157 |ULTIMATE.start_main_#t~ite46_Out1226948157|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1226948157, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1226948157, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1226948157, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226948157} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1226948157, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1226948157|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1226948157, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1226948157, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226948157} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 17:56:11,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L837-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_22 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p1_EAX~0_205 0) (= v_~__unbuffered_p2_EBX~0_21 0) (= 0 v_~__unbuffered_p0_EAX~0_34))) 1 0)) 0 1) v_~main$tmp_guard1~0_22) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~x$r_buff1_thd0~0_258 |v_ULTIMATE.start_main_#t~ite46_45|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_205, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_45|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_205, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_44|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_258, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:56:11,841 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_2cb8833b-f5f1-4dec-8fcb-5b7d88cb3aa8/bin/uautomizer/witness.graphml [2019-12-07 17:56:11,841 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:56:11,843 INFO L168 Benchmark]: Toolchain (without parser) took 87470.23 ms. Allocated memory was 1.0 GB in the beginning and 6.4 GB in the end (delta: 5.4 GB). Free memory was 938.7 MB in the beginning and 2.8 GB in the end (delta: -1.9 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2019-12-07 17:56:11,843 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:56:11,843 INFO L168 Benchmark]: CACSL2BoogieTranslator took 408.66 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -131.7 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:56:11,844 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:56:11,844 INFO L168 Benchmark]: Boogie Preprocessor took 24.72 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:56:11,844 INFO L168 Benchmark]: RCFGBuilder took 408.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 17:56:11,845 INFO L168 Benchmark]: TraceAbstraction took 86512.94 ms. Allocated memory was 1.1 GB in the beginning and 6.4 GB in the end (delta: 5.3 GB). Free memory was 1.0 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 17:56:11,845 INFO L168 Benchmark]: Witness Printer took 73.89 ms. Allocated memory is still 6.4 GB. Free memory was 2.9 GB in the beginning and 2.8 GB in the end (delta: 55.8 MB). Peak memory consumption was 55.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:56:11,847 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 408.66 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -131.7 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.72 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 408.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 86512.94 ms. Allocated memory was 1.1 GB in the beginning and 6.4 GB in the end (delta: 5.3 GB). Free memory was 1.0 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. * Witness Printer took 73.89 ms. Allocated memory is still 6.4 GB. Free memory was 2.9 GB in the beginning and 2.8 GB in the end (delta: 55.8 MB). Peak memory consumption was 55.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 165 ProgramPointsBefore, 83 ProgramPointsAfterwards, 196 TransitionsBefore, 91 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 27 ChoiceCompositions, 6986 VarBasedMoverChecksPositive, 284 VarBasedMoverChecksNegative, 112 SemBasedMoverChecksPositive, 261 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 75392 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L823] FCALL, FORK 0 pthread_create(&t412, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L825] FCALL, FORK 0 pthread_create(&t413, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L767] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L768] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L769] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L770] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L771] 2 x$r_buff0_thd2 = (_Bool)1 [L774] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L777] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L827] FCALL, FORK 0 pthread_create(&t414, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L791] 3 y = 1 [L794] 3 __unbuffered_p2_EAX = y [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L800] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L777] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L778] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L734] 1 z = 1 [L737] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L738] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L739] 1 x$flush_delayed = weak$$choice2 [L740] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L741] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L779] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L741] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L742] EXPR 1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0))=1, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L742] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L743] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L743] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L744] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L747] EXPR 1 weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L747] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L748] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L801] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L802] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L803] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L833] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, x$flush_delayed=0, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L833] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L834] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L835] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L836] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 156 locations, 2 error locations. Result: UNSAFE, OverallTime: 86.3s, OverallIterations: 28, TraceHistogramMax: 1, AutomataDifference: 26.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6619 SDtfs, 9894 SDslu, 27504 SDs, 0 SdLazy, 19744 SolverSat, 470 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 473 GetRequests, 29 SyntacticMatches, 21 SemanticMatches, 423 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2914 ImplicationChecksByTransitivity, 4.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=146241occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 44.3s AutomataMinimizationTime, 27 MinimizatonAttempts, 207586 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 1102 NumberOfCodeBlocks, 1102 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1020 ConstructedInterpolants, 0 QuantifiedInterpolants, 374138 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 27 InterpolantComputations, 27 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...