./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix016_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix016_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b1412a690de3cc38ce6ec614fba13ad1fe09a6cf ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:01:30,126 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:01:30,128 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:01:30,136 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:01:30,136 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:01:30,137 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:01:30,138 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:01:30,139 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:01:30,140 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:01:30,141 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:01:30,142 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:01:30,142 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:01:30,143 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:01:30,143 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:01:30,144 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:01:30,145 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:01:30,145 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:01:30,146 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:01:30,147 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:01:30,148 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:01:30,149 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:01:30,150 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:01:30,151 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:01:30,151 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:01:30,153 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:01:30,153 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:01:30,153 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:01:30,154 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:01:30,154 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:01:30,154 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:01:30,154 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:01:30,155 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:01:30,155 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:01:30,156 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:01:30,156 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:01:30,156 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:01:30,157 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:01:30,157 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:01:30,157 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:01:30,158 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:01:30,158 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:01:30,158 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 19:01:30,167 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:01:30,167 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:01:30,168 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 19:01:30,168 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 19:01:30,168 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 19:01:30,168 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:01:30,168 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:01:30,169 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:01:30,170 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:01:30,170 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 19:01:30,170 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:01:30,170 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:01:30,170 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:01:30,170 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:01:30,170 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:01:30,170 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:01:30,170 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 19:01:30,171 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:01:30,171 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:01:30,171 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:01:30,171 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b1412a690de3cc38ce6ec614fba13ad1fe09a6cf [2019-12-07 19:01:30,269 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:01:30,276 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:01:30,278 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:01:30,279 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:01:30,280 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:01:30,280 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix016_pso.oepc.i [2019-12-07 19:01:30,316 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/data/f520e4bca/36f7be7f5e0841158db496a7f6e56fbd/FLAG83ebfdc98 [2019-12-07 19:01:30,838 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:01:30,839 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/sv-benchmarks/c/pthread-wmm/mix016_pso.oepc.i [2019-12-07 19:01:30,849 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/data/f520e4bca/36f7be7f5e0841158db496a7f6e56fbd/FLAG83ebfdc98 [2019-12-07 19:01:31,359 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/data/f520e4bca/36f7be7f5e0841158db496a7f6e56fbd [2019-12-07 19:01:31,365 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:01:31,368 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:01:31,370 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:01:31,371 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:01:31,376 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:01:31,377 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,380 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@227d51b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31, skipping insertion in model container [2019-12-07 19:01:31,380 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,387 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:01:31,416 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:01:31,667 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:01:31,675 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:01:31,716 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:01:31,760 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:01:31,761 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31 WrapperNode [2019-12-07 19:01:31,761 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:01:31,761 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:01:31,761 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:01:31,762 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:01:31,767 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,780 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,799 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:01:31,799 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:01:31,799 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:01:31,799 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:01:31,806 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,806 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,809 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,809 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,817 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,820 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,822 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... [2019-12-07 19:01:31,825 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:01:31,825 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:01:31,825 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:01:31,825 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:01:31,826 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:01:31,868 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:01:31,868 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:01:31,868 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:01:31,868 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:01:31,868 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:01:31,868 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:01:31,868 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:01:31,868 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:01:31,869 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:01:31,869 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:01:31,869 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:01:31,869 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:01:31,869 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:01:31,870 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:01:32,239 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:01:32,239 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:01:32,240 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:32 BoogieIcfgContainer [2019-12-07 19:01:32,240 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:01:32,241 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:01:32,241 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:01:32,243 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:01:32,244 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:01:31" (1/3) ... [2019-12-07 19:01:32,244 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45cd64a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:01:32, skipping insertion in model container [2019-12-07 19:01:32,245 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:31" (2/3) ... [2019-12-07 19:01:32,245 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45cd64a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:01:32, skipping insertion in model container [2019-12-07 19:01:32,245 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:32" (3/3) ... [2019-12-07 19:01:32,246 INFO L109 eAbstractionObserver]: Analyzing ICFG mix016_pso.oepc.i [2019-12-07 19:01:32,255 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:01:32,255 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:01:32,261 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:01:32,262 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:01:32,288 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,289 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,289 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,289 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,289 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,289 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,289 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,289 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,290 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,290 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,290 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,290 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,290 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,290 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,290 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,291 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,292 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,293 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,293 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,294 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,294 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,294 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,294 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,295 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,296 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,297 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,298 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,299 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,300 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,300 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,300 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,301 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,302 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,303 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,304 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,305 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,306 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,307 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,308 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,309 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,310 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,311 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,312 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,313 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,314 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,315 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:32,326 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 19:01:32,338 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:01:32,338 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:01:32,339 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:01:32,339 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:01:32,339 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:01:32,339 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:01:32,339 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:01:32,339 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:01:32,351 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 19:01:32,353 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 19:01:32,418 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 19:01:32,418 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:01:32,428 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 704 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:01:32,443 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 19:01:32,483 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 19:01:32,483 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:01:32,489 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 704 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:01:32,505 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 19:01:32,506 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:01:35,249 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 84 [2019-12-07 19:01:35,471 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-12-07 19:01:35,657 INFO L206 etLargeBlockEncoding]: Checked pairs total: 89688 [2019-12-07 19:01:35,658 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 19:01:35,660 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 101 transitions [2019-12-07 19:01:48,260 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 106864 states. [2019-12-07 19:01:48,261 INFO L276 IsEmpty]: Start isEmpty. Operand 106864 states. [2019-12-07 19:01:48,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 19:01:48,265 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:48,265 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 19:01:48,266 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:48,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:48,270 INFO L82 PathProgramCache]: Analyzing trace with hash 921701, now seen corresponding path program 1 times [2019-12-07 19:01:48,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:48,275 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646758210] [2019-12-07 19:01:48,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:48,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:48,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:48,414 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646758210] [2019-12-07 19:01:48,414 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:48,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:01:48,415 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1040408786] [2019-12-07 19:01:48,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:01:48,419 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:48,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:01:48,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:01:48,430 INFO L87 Difference]: Start difference. First operand 106864 states. Second operand 3 states. [2019-12-07 19:01:49,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:49,114 INFO L93 Difference]: Finished difference Result 106034 states and 453004 transitions. [2019-12-07 19:01:49,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:01:49,116 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 19:01:49,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:49,643 INFO L225 Difference]: With dead ends: 106034 [2019-12-07 19:01:49,643 INFO L226 Difference]: Without dead ends: 99950 [2019-12-07 19:01:49,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:01:53,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99950 states. [2019-12-07 19:01:54,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99950 to 99950. [2019-12-07 19:01:54,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99950 states. [2019-12-07 19:01:55,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99950 states to 99950 states and 426445 transitions. [2019-12-07 19:01:55,148 INFO L78 Accepts]: Start accepts. Automaton has 99950 states and 426445 transitions. Word has length 3 [2019-12-07 19:01:55,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:01:55,149 INFO L462 AbstractCegarLoop]: Abstraction has 99950 states and 426445 transitions. [2019-12-07 19:01:55,149 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:01:55,149 INFO L276 IsEmpty]: Start isEmpty. Operand 99950 states and 426445 transitions. [2019-12-07 19:01:55,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 19:01:55,153 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:55,153 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:01:55,153 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:55,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:55,153 INFO L82 PathProgramCache]: Analyzing trace with hash 1680645281, now seen corresponding path program 1 times [2019-12-07 19:01:55,153 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:55,154 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132884544] [2019-12-07 19:01:55,154 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:55,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:55,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:55,231 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132884544] [2019-12-07 19:01:55,231 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:55,231 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:01:55,232 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209628207] [2019-12-07 19:01:55,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:01:55,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:55,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:01:55,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:01:55,233 INFO L87 Difference]: Start difference. First operand 99950 states and 426445 transitions. Second operand 4 states. [2019-12-07 19:01:57,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:57,639 INFO L93 Difference]: Finished difference Result 159384 states and 652094 transitions. [2019-12-07 19:01:57,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:01:57,640 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 19:01:57,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:58,058 INFO L225 Difference]: With dead ends: 159384 [2019-12-07 19:01:58,058 INFO L226 Difference]: Without dead ends: 159335 [2019-12-07 19:01:58,059 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:02,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159335 states. [2019-12-07 19:02:04,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159335 to 143879. [2019-12-07 19:02:04,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143879 states. [2019-12-07 19:02:04,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143879 states to 143879 states and 597281 transitions. [2019-12-07 19:02:04,874 INFO L78 Accepts]: Start accepts. Automaton has 143879 states and 597281 transitions. Word has length 11 [2019-12-07 19:02:04,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:04,874 INFO L462 AbstractCegarLoop]: Abstraction has 143879 states and 597281 transitions. [2019-12-07 19:02:04,874 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:04,875 INFO L276 IsEmpty]: Start isEmpty. Operand 143879 states and 597281 transitions. [2019-12-07 19:02:04,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:02:04,881 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:04,881 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:04,881 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:04,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:04,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1535099311, now seen corresponding path program 1 times [2019-12-07 19:02:04,881 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:04,882 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042400482] [2019-12-07 19:02:04,882 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:04,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:04,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:04,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2042400482] [2019-12-07 19:02:04,941 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:04,942 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:04,942 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862305836] [2019-12-07 19:02:04,942 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:02:04,942 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:04,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:02:04,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:04,942 INFO L87 Difference]: Start difference. First operand 143879 states and 597281 transitions. Second operand 4 states. [2019-12-07 19:02:05,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:05,097 INFO L93 Difference]: Finished difference Result 42595 states and 146341 transitions. [2019-12-07 19:02:05,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:02:05,097 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:02:05,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:05,149 INFO L225 Difference]: With dead ends: 42595 [2019-12-07 19:02:05,150 INFO L226 Difference]: Without dead ends: 32718 [2019-12-07 19:02:05,150 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:05,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32718 states. [2019-12-07 19:02:05,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32718 to 32622. [2019-12-07 19:02:05,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32622 states. [2019-12-07 19:02:05,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32622 states to 32622 states and 106518 transitions. [2019-12-07 19:02:05,701 INFO L78 Accepts]: Start accepts. Automaton has 32622 states and 106518 transitions. Word has length 13 [2019-12-07 19:02:05,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:05,701 INFO L462 AbstractCegarLoop]: Abstraction has 32622 states and 106518 transitions. [2019-12-07 19:02:05,702 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:05,702 INFO L276 IsEmpty]: Start isEmpty. Operand 32622 states and 106518 transitions. [2019-12-07 19:02:05,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:02:05,704 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:05,704 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:05,704 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:05,704 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:05,704 INFO L82 PathProgramCache]: Analyzing trace with hash 1228744872, now seen corresponding path program 1 times [2019-12-07 19:02:05,704 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:05,704 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2092609020] [2019-12-07 19:02:05,704 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:05,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:05,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:05,757 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2092609020] [2019-12-07 19:02:05,757 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:05,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:05,758 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [571944898] [2019-12-07 19:02:05,758 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:02:05,758 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:05,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:02:05,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:05,758 INFO L87 Difference]: Start difference. First operand 32622 states and 106518 transitions. Second operand 4 states. [2019-12-07 19:02:05,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:05,995 INFO L93 Difference]: Finished difference Result 41342 states and 134101 transitions. [2019-12-07 19:02:05,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:02:05,996 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 19:02:05,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:06,064 INFO L225 Difference]: With dead ends: 41342 [2019-12-07 19:02:06,064 INFO L226 Difference]: Without dead ends: 41342 [2019-12-07 19:02:06,064 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:06,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41342 states. [2019-12-07 19:02:06,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41342 to 37015. [2019-12-07 19:02:06,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37015 states. [2019-12-07 19:02:07,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37015 states to 37015 states and 120557 transitions. [2019-12-07 19:02:07,038 INFO L78 Accepts]: Start accepts. Automaton has 37015 states and 120557 transitions. Word has length 16 [2019-12-07 19:02:07,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:07,039 INFO L462 AbstractCegarLoop]: Abstraction has 37015 states and 120557 transitions. [2019-12-07 19:02:07,039 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:07,039 INFO L276 IsEmpty]: Start isEmpty. Operand 37015 states and 120557 transitions. [2019-12-07 19:02:07,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:02:07,041 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:07,041 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:07,041 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:07,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:07,041 INFO L82 PathProgramCache]: Analyzing trace with hash 1228651655, now seen corresponding path program 1 times [2019-12-07 19:02:07,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:07,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921190612] [2019-12-07 19:02:07,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:07,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:07,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:07,094 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [921190612] [2019-12-07 19:02:07,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:07,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:07,094 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510798530] [2019-12-07 19:02:07,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:02:07,095 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:07,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:02:07,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:07,095 INFO L87 Difference]: Start difference. First operand 37015 states and 120557 transitions. Second operand 4 states. [2019-12-07 19:02:07,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:07,344 INFO L93 Difference]: Finished difference Result 44892 states and 145334 transitions. [2019-12-07 19:02:07,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:02:07,345 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 19:02:07,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:07,410 INFO L225 Difference]: With dead ends: 44892 [2019-12-07 19:02:07,411 INFO L226 Difference]: Without dead ends: 44892 [2019-12-07 19:02:07,411 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:07,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44892 states. [2019-12-07 19:02:08,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44892 to 36810. [2019-12-07 19:02:08,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36810 states. [2019-12-07 19:02:08,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36810 states to 36810 states and 119696 transitions. [2019-12-07 19:02:08,069 INFO L78 Accepts]: Start accepts. Automaton has 36810 states and 119696 transitions. Word has length 16 [2019-12-07 19:02:08,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:08,069 INFO L462 AbstractCegarLoop]: Abstraction has 36810 states and 119696 transitions. [2019-12-07 19:02:08,069 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:08,069 INFO L276 IsEmpty]: Start isEmpty. Operand 36810 states and 119696 transitions. [2019-12-07 19:02:08,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:02:08,076 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:08,076 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:08,076 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:08,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:08,076 INFO L82 PathProgramCache]: Analyzing trace with hash -1838789338, now seen corresponding path program 1 times [2019-12-07 19:02:08,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:08,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526736581] [2019-12-07 19:02:08,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:08,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:08,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:08,136 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526736581] [2019-12-07 19:02:08,136 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:08,136 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:08,136 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612982534] [2019-12-07 19:02:08,137 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:08,137 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:08,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:08,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:08,137 INFO L87 Difference]: Start difference. First operand 36810 states and 119696 transitions. Second operand 5 states. [2019-12-07 19:02:08,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:08,564 INFO L93 Difference]: Finished difference Result 55448 states and 177239 transitions. [2019-12-07 19:02:08,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:02:08,565 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:02:08,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:08,650 INFO L225 Difference]: With dead ends: 55448 [2019-12-07 19:02:08,650 INFO L226 Difference]: Without dead ends: 55392 [2019-12-07 19:02:08,651 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:02:08,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55392 states. [2019-12-07 19:02:09,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55392 to 38696. [2019-12-07 19:02:09,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38696 states. [2019-12-07 19:02:09,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38696 states to 38696 states and 125822 transitions. [2019-12-07 19:02:09,397 INFO L78 Accepts]: Start accepts. Automaton has 38696 states and 125822 transitions. Word has length 22 [2019-12-07 19:02:09,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:09,397 INFO L462 AbstractCegarLoop]: Abstraction has 38696 states and 125822 transitions. [2019-12-07 19:02:09,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:09,397 INFO L276 IsEmpty]: Start isEmpty. Operand 38696 states and 125822 transitions. [2019-12-07 19:02:09,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:02:09,403 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:09,403 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:09,403 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:09,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:09,403 INFO L82 PathProgramCache]: Analyzing trace with hash -1838882555, now seen corresponding path program 1 times [2019-12-07 19:02:09,403 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:09,403 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2116180735] [2019-12-07 19:02:09,404 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:09,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:09,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:09,462 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2116180735] [2019-12-07 19:02:09,462 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:09,462 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:09,462 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17729183] [2019-12-07 19:02:09,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:09,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:09,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:09,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:09,463 INFO L87 Difference]: Start difference. First operand 38696 states and 125822 transitions. Second operand 5 states. [2019-12-07 19:02:09,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:09,879 INFO L93 Difference]: Finished difference Result 57418 states and 182937 transitions. [2019-12-07 19:02:09,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:02:09,880 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:02:09,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:09,968 INFO L225 Difference]: With dead ends: 57418 [2019-12-07 19:02:09,968 INFO L226 Difference]: Without dead ends: 57362 [2019-12-07 19:02:09,968 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:02:10,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57362 states. [2019-12-07 19:02:11,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57362 to 36190. [2019-12-07 19:02:11,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36190 states. [2019-12-07 19:02:11,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36190 states to 36190 states and 117443 transitions. [2019-12-07 19:02:11,536 INFO L78 Accepts]: Start accepts. Automaton has 36190 states and 117443 transitions. Word has length 22 [2019-12-07 19:02:11,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:11,536 INFO L462 AbstractCegarLoop]: Abstraction has 36190 states and 117443 transitions. [2019-12-07 19:02:11,537 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:11,537 INFO L276 IsEmpty]: Start isEmpty. Operand 36190 states and 117443 transitions. [2019-12-07 19:02:11,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 19:02:11,544 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:11,544 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:11,544 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:11,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:11,545 INFO L82 PathProgramCache]: Analyzing trace with hash 320469370, now seen corresponding path program 1 times [2019-12-07 19:02:11,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:11,545 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014171029] [2019-12-07 19:02:11,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:11,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:11,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:11,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014171029] [2019-12-07 19:02:11,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:11,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:02:11,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [702629846] [2019-12-07 19:02:11,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:02:11,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:11,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:02:11,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:02:11,624 INFO L87 Difference]: Start difference. First operand 36190 states and 117443 transitions. Second operand 6 states. [2019-12-07 19:02:12,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:12,141 INFO L93 Difference]: Finished difference Result 51968 states and 164745 transitions. [2019-12-07 19:02:12,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:02:12,141 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 19:02:12,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:12,220 INFO L225 Difference]: With dead ends: 51968 [2019-12-07 19:02:12,220 INFO L226 Difference]: Without dead ends: 51955 [2019-12-07 19:02:12,221 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:02:12,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51955 states. [2019-12-07 19:02:12,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51955 to 41982. [2019-12-07 19:02:12,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41982 states. [2019-12-07 19:02:12,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41982 states to 41982 states and 135844 transitions. [2019-12-07 19:02:12,968 INFO L78 Accepts]: Start accepts. Automaton has 41982 states and 135844 transitions. Word has length 25 [2019-12-07 19:02:12,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:12,969 INFO L462 AbstractCegarLoop]: Abstraction has 41982 states and 135844 transitions. [2019-12-07 19:02:12,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:02:12,969 INFO L276 IsEmpty]: Start isEmpty. Operand 41982 states and 135844 transitions. [2019-12-07 19:02:12,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:02:12,979 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:12,979 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:12,979 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:12,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:12,980 INFO L82 PathProgramCache]: Analyzing trace with hash 270212897, now seen corresponding path program 1 times [2019-12-07 19:02:12,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:12,980 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047827577] [2019-12-07 19:02:12,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:12,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:13,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:13,005 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047827577] [2019-12-07 19:02:13,005 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:13,005 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:13,005 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914718137] [2019-12-07 19:02:13,005 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:02:13,006 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:13,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:02:13,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:13,006 INFO L87 Difference]: Start difference. First operand 41982 states and 135844 transitions. Second operand 3 states. [2019-12-07 19:02:13,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:13,200 INFO L93 Difference]: Finished difference Result 64909 states and 208822 transitions. [2019-12-07 19:02:13,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:02:13,201 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 19:02:13,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:13,305 INFO L225 Difference]: With dead ends: 64909 [2019-12-07 19:02:13,305 INFO L226 Difference]: Without dead ends: 64909 [2019-12-07 19:02:13,305 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:13,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64909 states. [2019-12-07 19:02:14,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64909 to 49315. [2019-12-07 19:02:14,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49315 states. [2019-12-07 19:02:14,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49315 states to 49315 states and 159887 transitions. [2019-12-07 19:02:14,240 INFO L78 Accepts]: Start accepts. Automaton has 49315 states and 159887 transitions. Word has length 27 [2019-12-07 19:02:14,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:14,241 INFO L462 AbstractCegarLoop]: Abstraction has 49315 states and 159887 transitions. [2019-12-07 19:02:14,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:02:14,241 INFO L276 IsEmpty]: Start isEmpty. Operand 49315 states and 159887 transitions. [2019-12-07 19:02:14,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:02:14,255 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:14,255 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:14,255 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:14,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:14,256 INFO L82 PathProgramCache]: Analyzing trace with hash 2064759266, now seen corresponding path program 1 times [2019-12-07 19:02:14,256 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:14,256 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [858712041] [2019-12-07 19:02:14,256 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:14,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:14,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:14,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [858712041] [2019-12-07 19:02:14,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:14,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:14,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949450502] [2019-12-07 19:02:14,276 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:02:14,276 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:14,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:02:14,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:14,277 INFO L87 Difference]: Start difference. First operand 49315 states and 159887 transitions. Second operand 3 states. [2019-12-07 19:02:14,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:14,471 INFO L93 Difference]: Finished difference Result 64909 states and 203873 transitions. [2019-12-07 19:02:14,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:02:14,472 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 19:02:14,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:14,571 INFO L225 Difference]: With dead ends: 64909 [2019-12-07 19:02:14,571 INFO L226 Difference]: Without dead ends: 64909 [2019-12-07 19:02:14,572 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:14,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64909 states. [2019-12-07 19:02:15,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64909 to 49315. [2019-12-07 19:02:15,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49315 states. [2019-12-07 19:02:15,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49315 states to 49315 states and 154938 transitions. [2019-12-07 19:02:15,570 INFO L78 Accepts]: Start accepts. Automaton has 49315 states and 154938 transitions. Word has length 27 [2019-12-07 19:02:15,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:15,571 INFO L462 AbstractCegarLoop]: Abstraction has 49315 states and 154938 transitions. [2019-12-07 19:02:15,571 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:02:15,571 INFO L276 IsEmpty]: Start isEmpty. Operand 49315 states and 154938 transitions. [2019-12-07 19:02:15,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:02:15,585 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:15,585 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:15,585 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:15,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:15,585 INFO L82 PathProgramCache]: Analyzing trace with hash 2010439622, now seen corresponding path program 1 times [2019-12-07 19:02:15,585 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:15,586 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [900510535] [2019-12-07 19:02:15,586 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:15,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:15,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:15,651 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [900510535] [2019-12-07 19:02:15,651 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:15,651 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:15,651 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507412661] [2019-12-07 19:02:15,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:15,651 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:15,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:15,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:15,651 INFO L87 Difference]: Start difference. First operand 49315 states and 154938 transitions. Second operand 5 states. [2019-12-07 19:02:16,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:16,011 INFO L93 Difference]: Finished difference Result 60684 states and 188418 transitions. [2019-12-07 19:02:16,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:02:16,011 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 19:02:16,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:16,103 INFO L225 Difference]: With dead ends: 60684 [2019-12-07 19:02:16,104 INFO L226 Difference]: Without dead ends: 60508 [2019-12-07 19:02:16,104 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:02:16,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60508 states. [2019-12-07 19:02:16,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60508 to 53763. [2019-12-07 19:02:16,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53763 states. [2019-12-07 19:02:17,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53763 states to 53763 states and 168544 transitions. [2019-12-07 19:02:17,025 INFO L78 Accepts]: Start accepts. Automaton has 53763 states and 168544 transitions. Word has length 27 [2019-12-07 19:02:17,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:17,025 INFO L462 AbstractCegarLoop]: Abstraction has 53763 states and 168544 transitions. [2019-12-07 19:02:17,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:17,025 INFO L276 IsEmpty]: Start isEmpty. Operand 53763 states and 168544 transitions. [2019-12-07 19:02:17,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 19:02:17,040 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:17,040 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:17,040 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:17,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:17,041 INFO L82 PathProgramCache]: Analyzing trace with hash -782285250, now seen corresponding path program 1 times [2019-12-07 19:02:17,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:17,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287028484] [2019-12-07 19:02:17,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:17,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:17,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:17,083 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287028484] [2019-12-07 19:02:17,083 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:17,083 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:02:17,083 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804002574] [2019-12-07 19:02:17,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:17,084 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:17,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:17,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:17,084 INFO L87 Difference]: Start difference. First operand 53763 states and 168544 transitions. Second operand 5 states. [2019-12-07 19:02:17,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:17,570 INFO L93 Difference]: Finished difference Result 73561 states and 228436 transitions. [2019-12-07 19:02:17,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:02:17,571 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 19:02:17,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:17,673 INFO L225 Difference]: With dead ends: 73561 [2019-12-07 19:02:17,673 INFO L226 Difference]: Without dead ends: 73561 [2019-12-07 19:02:17,673 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:02:17,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73561 states. [2019-12-07 19:02:18,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73561 to 63987. [2019-12-07 19:02:18,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63987 states. [2019-12-07 19:02:18,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63987 states to 63987 states and 200491 transitions. [2019-12-07 19:02:18,769 INFO L78 Accepts]: Start accepts. Automaton has 63987 states and 200491 transitions. Word has length 28 [2019-12-07 19:02:18,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:18,769 INFO L462 AbstractCegarLoop]: Abstraction has 63987 states and 200491 transitions. [2019-12-07 19:02:18,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:18,770 INFO L276 IsEmpty]: Start isEmpty. Operand 63987 states and 200491 transitions. [2019-12-07 19:02:18,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 19:02:18,792 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:18,792 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:18,792 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:18,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:18,793 INFO L82 PathProgramCache]: Analyzing trace with hash 773295241, now seen corresponding path program 1 times [2019-12-07 19:02:18,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:18,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737320139] [2019-12-07 19:02:18,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:18,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:18,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:18,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737320139] [2019-12-07 19:02:18,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:18,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:02:18,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200316402] [2019-12-07 19:02:18,851 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:02:18,851 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:18,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:02:18,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:02:18,852 INFO L87 Difference]: Start difference. First operand 63987 states and 200491 transitions. Second operand 6 states. [2019-12-07 19:02:19,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:19,111 INFO L93 Difference]: Finished difference Result 81753 states and 254673 transitions. [2019-12-07 19:02:19,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:02:19,111 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 19:02:19,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:19,229 INFO L225 Difference]: With dead ends: 81753 [2019-12-07 19:02:19,229 INFO L226 Difference]: Without dead ends: 81753 [2019-12-07 19:02:19,230 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:02:19,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81753 states. [2019-12-07 19:02:20,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81753 to 65328. [2019-12-07 19:02:20,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65328 states. [2019-12-07 19:02:20,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65328 states to 65328 states and 204383 transitions. [2019-12-07 19:02:20,461 INFO L78 Accepts]: Start accepts. Automaton has 65328 states and 204383 transitions. Word has length 28 [2019-12-07 19:02:20,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:20,462 INFO L462 AbstractCegarLoop]: Abstraction has 65328 states and 204383 transitions. [2019-12-07 19:02:20,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:02:20,462 INFO L276 IsEmpty]: Start isEmpty. Operand 65328 states and 204383 transitions. [2019-12-07 19:02:20,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 19:02:20,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:20,479 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:20,479 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:20,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:20,479 INFO L82 PathProgramCache]: Analyzing trace with hash 1004344681, now seen corresponding path program 1 times [2019-12-07 19:02:20,479 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:20,479 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980675104] [2019-12-07 19:02:20,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:20,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:20,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:20,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [980675104] [2019-12-07 19:02:20,529 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:20,529 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:02:20,529 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227627769] [2019-12-07 19:02:20,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:20,529 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:20,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:20,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:20,530 INFO L87 Difference]: Start difference. First operand 65328 states and 204383 transitions. Second operand 5 states. [2019-12-07 19:02:20,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:20,641 INFO L93 Difference]: Finished difference Result 32428 states and 96143 transitions. [2019-12-07 19:02:20,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:02:20,641 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 19:02:20,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:20,676 INFO L225 Difference]: With dead ends: 32428 [2019-12-07 19:02:20,676 INFO L226 Difference]: Without dead ends: 28293 [2019-12-07 19:02:20,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:02:20,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28293 states. [2019-12-07 19:02:21,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28293 to 26238. [2019-12-07 19:02:21,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26238 states. [2019-12-07 19:02:21,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26238 states to 26238 states and 77651 transitions. [2019-12-07 19:02:21,059 INFO L78 Accepts]: Start accepts. Automaton has 26238 states and 77651 transitions. Word has length 29 [2019-12-07 19:02:21,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:21,059 INFO L462 AbstractCegarLoop]: Abstraction has 26238 states and 77651 transitions. [2019-12-07 19:02:21,059 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:21,059 INFO L276 IsEmpty]: Start isEmpty. Operand 26238 states and 77651 transitions. [2019-12-07 19:02:21,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 19:02:21,073 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:21,073 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:21,073 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:21,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:21,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1192824778, now seen corresponding path program 1 times [2019-12-07 19:02:21,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:21,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138990215] [2019-12-07 19:02:21,074 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:21,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:21,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:21,123 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2138990215] [2019-12-07 19:02:21,123 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:21,123 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:21,123 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1291829080] [2019-12-07 19:02:21,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:21,124 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:21,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:21,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:21,124 INFO L87 Difference]: Start difference. First operand 26238 states and 77651 transitions. Second operand 5 states. [2019-12-07 19:02:21,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:21,372 INFO L93 Difference]: Finished difference Result 30033 states and 87782 transitions. [2019-12-07 19:02:21,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:02:21,372 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 19:02:21,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:21,405 INFO L225 Difference]: With dead ends: 30033 [2019-12-07 19:02:21,405 INFO L226 Difference]: Without dead ends: 29871 [2019-12-07 19:02:21,405 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:02:21,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29871 states. [2019-12-07 19:02:21,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29871 to 26490. [2019-12-07 19:02:21,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26490 states. [2019-12-07 19:02:21,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26490 states to 26490 states and 78172 transitions. [2019-12-07 19:02:21,791 INFO L78 Accepts]: Start accepts. Automaton has 26490 states and 78172 transitions. Word has length 29 [2019-12-07 19:02:21,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:21,791 INFO L462 AbstractCegarLoop]: Abstraction has 26490 states and 78172 transitions. [2019-12-07 19:02:21,791 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:21,791 INFO L276 IsEmpty]: Start isEmpty. Operand 26490 states and 78172 transitions. [2019-12-07 19:02:21,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 19:02:21,808 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:21,808 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:21,809 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:21,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:21,809 INFO L82 PathProgramCache]: Analyzing trace with hash -809721720, now seen corresponding path program 1 times [2019-12-07 19:02:21,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:21,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791578032] [2019-12-07 19:02:21,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:21,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:21,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:21,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [791578032] [2019-12-07 19:02:21,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:21,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:02:21,873 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [658728678] [2019-12-07 19:02:21,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:02:21,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:21,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:02:21,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:02:21,873 INFO L87 Difference]: Start difference. First operand 26490 states and 78172 transitions. Second operand 6 states. [2019-12-07 19:02:22,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:22,344 INFO L93 Difference]: Finished difference Result 33301 states and 96871 transitions. [2019-12-07 19:02:22,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:02:22,344 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 19:02:22,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:22,381 INFO L225 Difference]: With dead ends: 33301 [2019-12-07 19:02:22,381 INFO L226 Difference]: Without dead ends: 32980 [2019-12-07 19:02:22,381 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:02:22,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32980 states. [2019-12-07 19:02:22,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32980 to 27213. [2019-12-07 19:02:22,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27213 states. [2019-12-07 19:02:22,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27213 states to 27213 states and 80191 transitions. [2019-12-07 19:02:22,794 INFO L78 Accepts]: Start accepts. Automaton has 27213 states and 80191 transitions. Word has length 33 [2019-12-07 19:02:22,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:22,794 INFO L462 AbstractCegarLoop]: Abstraction has 27213 states and 80191 transitions. [2019-12-07 19:02:22,794 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:02:22,794 INFO L276 IsEmpty]: Start isEmpty. Operand 27213 states and 80191 transitions. [2019-12-07 19:02:22,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 19:02:22,814 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:22,814 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:22,814 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:22,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:22,815 INFO L82 PathProgramCache]: Analyzing trace with hash -1243510664, now seen corresponding path program 1 times [2019-12-07 19:02:22,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:22,815 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860753727] [2019-12-07 19:02:22,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:22,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:22,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:22,865 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860753727] [2019-12-07 19:02:22,865 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:22,865 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:02:22,865 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [729483832] [2019-12-07 19:02:22,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:02:22,866 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:22,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:02:22,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:02:22,866 INFO L87 Difference]: Start difference. First operand 27213 states and 80191 transitions. Second operand 6 states. [2019-12-07 19:02:23,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:23,303 INFO L93 Difference]: Finished difference Result 32714 states and 95014 transitions. [2019-12-07 19:02:23,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:02:23,303 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2019-12-07 19:02:23,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:23,338 INFO L225 Difference]: With dead ends: 32714 [2019-12-07 19:02:23,338 INFO L226 Difference]: Without dead ends: 32339 [2019-12-07 19:02:23,338 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:02:23,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32339 states. [2019-12-07 19:02:23,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32339 to 25005. [2019-12-07 19:02:23,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25005 states. [2019-12-07 19:02:23,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25005 states to 25005 states and 73766 transitions. [2019-12-07 19:02:23,734 INFO L78 Accepts]: Start accepts. Automaton has 25005 states and 73766 transitions. Word has length 35 [2019-12-07 19:02:23,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:23,734 INFO L462 AbstractCegarLoop]: Abstraction has 25005 states and 73766 transitions. [2019-12-07 19:02:23,734 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:02:23,734 INFO L276 IsEmpty]: Start isEmpty. Operand 25005 states and 73766 transitions. [2019-12-07 19:02:23,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 19:02:23,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:23,754 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:23,754 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:23,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:23,754 INFO L82 PathProgramCache]: Analyzing trace with hash -1741832356, now seen corresponding path program 1 times [2019-12-07 19:02:23,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:23,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858870120] [2019-12-07 19:02:23,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:23,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:23,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:23,805 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858870120] [2019-12-07 19:02:23,806 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:23,806 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:02:23,806 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274958465] [2019-12-07 19:02:23,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:23,806 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:23,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:23,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:23,806 INFO L87 Difference]: Start difference. First operand 25005 states and 73766 transitions. Second operand 5 states. [2019-12-07 19:02:24,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:24,228 INFO L93 Difference]: Finished difference Result 35863 states and 105034 transitions. [2019-12-07 19:02:24,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:02:24,228 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2019-12-07 19:02:24,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:24,267 INFO L225 Difference]: With dead ends: 35863 [2019-12-07 19:02:24,267 INFO L226 Difference]: Without dead ends: 35863 [2019-12-07 19:02:24,268 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:02:24,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35863 states. [2019-12-07 19:02:24,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35863 to 29294. [2019-12-07 19:02:24,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29294 states. [2019-12-07 19:02:24,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29294 states to 29294 states and 86935 transitions. [2019-12-07 19:02:24,728 INFO L78 Accepts]: Start accepts. Automaton has 29294 states and 86935 transitions. Word has length 39 [2019-12-07 19:02:24,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:24,728 INFO L462 AbstractCegarLoop]: Abstraction has 29294 states and 86935 transitions. [2019-12-07 19:02:24,729 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:24,729 INFO L276 IsEmpty]: Start isEmpty. Operand 29294 states and 86935 transitions. [2019-12-07 19:02:24,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 19:02:24,754 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:24,754 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:24,754 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:24,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:24,754 INFO L82 PathProgramCache]: Analyzing trace with hash 660555932, now seen corresponding path program 2 times [2019-12-07 19:02:24,755 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:24,755 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607564997] [2019-12-07 19:02:24,755 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:24,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:24,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:24,812 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1607564997] [2019-12-07 19:02:24,812 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:24,812 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:02:24,812 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [224527405] [2019-12-07 19:02:24,812 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:02:24,812 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:24,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:02:24,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:02:24,813 INFO L87 Difference]: Start difference. First operand 29294 states and 86935 transitions. Second operand 6 states. [2019-12-07 19:02:25,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:25,345 INFO L93 Difference]: Finished difference Result 38426 states and 112081 transitions. [2019-12-07 19:02:25,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:02:25,345 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 19:02:25,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:25,387 INFO L225 Difference]: With dead ends: 38426 [2019-12-07 19:02:25,387 INFO L226 Difference]: Without dead ends: 38426 [2019-12-07 19:02:25,387 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:02:25,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38426 states. [2019-12-07 19:02:25,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38426 to 30540. [2019-12-07 19:02:25,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30540 states. [2019-12-07 19:02:25,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30540 states to 30540 states and 90512 transitions. [2019-12-07 19:02:25,856 INFO L78 Accepts]: Start accepts. Automaton has 30540 states and 90512 transitions. Word has length 39 [2019-12-07 19:02:25,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:25,857 INFO L462 AbstractCegarLoop]: Abstraction has 30540 states and 90512 transitions. [2019-12-07 19:02:25,857 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:02:25,857 INFO L276 IsEmpty]: Start isEmpty. Operand 30540 states and 90512 transitions. [2019-12-07 19:02:25,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 19:02:25,882 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:25,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:25,883 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:25,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:25,883 INFO L82 PathProgramCache]: Analyzing trace with hash -1266946498, now seen corresponding path program 3 times [2019-12-07 19:02:25,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:25,883 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893231845] [2019-12-07 19:02:25,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:25,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:25,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:25,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1893231845] [2019-12-07 19:02:25,942 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:25,942 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 19:02:25,942 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414727007] [2019-12-07 19:02:25,942 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:02:25,942 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:25,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:02:25,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:02:25,943 INFO L87 Difference]: Start difference. First operand 30540 states and 90512 transitions. Second operand 7 states. [2019-12-07 19:02:26,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:26,920 INFO L93 Difference]: Finished difference Result 42780 states and 124393 transitions. [2019-12-07 19:02:26,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 19:02:26,920 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 19:02:26,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:26,966 INFO L225 Difference]: With dead ends: 42780 [2019-12-07 19:02:26,966 INFO L226 Difference]: Without dead ends: 42780 [2019-12-07 19:02:26,966 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=64, Invalid=176, Unknown=0, NotChecked=0, Total=240 [2019-12-07 19:02:27,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42780 states. [2019-12-07 19:02:27,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42780 to 29214. [2019-12-07 19:02:27,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29214 states. [2019-12-07 19:02:27,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29214 states to 29214 states and 85753 transitions. [2019-12-07 19:02:27,462 INFO L78 Accepts]: Start accepts. Automaton has 29214 states and 85753 transitions. Word has length 39 [2019-12-07 19:02:27,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:27,462 INFO L462 AbstractCegarLoop]: Abstraction has 29214 states and 85753 transitions. [2019-12-07 19:02:27,462 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:02:27,462 INFO L276 IsEmpty]: Start isEmpty. Operand 29214 states and 85753 transitions. [2019-12-07 19:02:27,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 19:02:27,488 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:27,488 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:27,488 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:27,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:27,489 INFO L82 PathProgramCache]: Analyzing trace with hash 1323155467, now seen corresponding path program 1 times [2019-12-07 19:02:27,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:27,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017730080] [2019-12-07 19:02:27,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:27,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:27,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:27,538 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1017730080] [2019-12-07 19:02:27,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:27,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:02:27,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139602611] [2019-12-07 19:02:27,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:02:27,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:27,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:02:27,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:02:27,539 INFO L87 Difference]: Start difference. First operand 29214 states and 85753 transitions. Second operand 6 states. [2019-12-07 19:02:27,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:27,642 INFO L93 Difference]: Finished difference Result 27738 states and 82416 transitions. [2019-12-07 19:02:27,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:02:27,643 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 19:02:27,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:27,673 INFO L225 Difference]: With dead ends: 27738 [2019-12-07 19:02:27,673 INFO L226 Difference]: Without dead ends: 27515 [2019-12-07 19:02:27,673 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:02:27,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27515 states. [2019-12-07 19:02:28,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27515 to 25122. [2019-12-07 19:02:28,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25122 states. [2019-12-07 19:02:28,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25122 states to 25122 states and 75348 transitions. [2019-12-07 19:02:28,051 INFO L78 Accepts]: Start accepts. Automaton has 25122 states and 75348 transitions. Word has length 40 [2019-12-07 19:02:28,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:28,052 INFO L462 AbstractCegarLoop]: Abstraction has 25122 states and 75348 transitions. [2019-12-07 19:02:28,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:02:28,052 INFO L276 IsEmpty]: Start isEmpty. Operand 25122 states and 75348 transitions. [2019-12-07 19:02:28,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 19:02:28,076 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:28,076 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:28,076 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:28,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:28,077 INFO L82 PathProgramCache]: Analyzing trace with hash 1910310370, now seen corresponding path program 1 times [2019-12-07 19:02:28,077 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:28,077 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382195596] [2019-12-07 19:02:28,077 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:28,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:28,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:28,116 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382195596] [2019-12-07 19:02:28,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:28,116 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:28,116 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712052444] [2019-12-07 19:02:28,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:02:28,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:28,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:02:28,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:28,117 INFO L87 Difference]: Start difference. First operand 25122 states and 75348 transitions. Second operand 3 states. [2019-12-07 19:02:28,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:28,213 INFO L93 Difference]: Finished difference Result 30583 states and 91371 transitions. [2019-12-07 19:02:28,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:02:28,214 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 19:02:28,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:28,249 INFO L225 Difference]: With dead ends: 30583 [2019-12-07 19:02:28,249 INFO L226 Difference]: Without dead ends: 30583 [2019-12-07 19:02:28,249 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:28,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30583 states. [2019-12-07 19:02:28,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30583 to 25162. [2019-12-07 19:02:28,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25162 states. [2019-12-07 19:02:28,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25162 states to 25162 states and 75524 transitions. [2019-12-07 19:02:28,642 INFO L78 Accepts]: Start accepts. Automaton has 25162 states and 75524 transitions. Word has length 64 [2019-12-07 19:02:28,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:28,642 INFO L462 AbstractCegarLoop]: Abstraction has 25162 states and 75524 transitions. [2019-12-07 19:02:28,642 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:02:28,642 INFO L276 IsEmpty]: Start isEmpty. Operand 25162 states and 75524 transitions. [2019-12-07 19:02:28,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:02:28,666 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:28,666 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:28,667 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:28,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:28,667 INFO L82 PathProgramCache]: Analyzing trace with hash 487945428, now seen corresponding path program 1 times [2019-12-07 19:02:28,667 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:28,667 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119314016] [2019-12-07 19:02:28,667 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:28,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:28,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:28,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119314016] [2019-12-07 19:02:28,719 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:28,719 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:02:28,719 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1022396851] [2019-12-07 19:02:28,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:02:28,720 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:28,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:02:28,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:02:28,720 INFO L87 Difference]: Start difference. First operand 25162 states and 75524 transitions. Second operand 6 states. [2019-12-07 19:02:29,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:29,267 INFO L93 Difference]: Finished difference Result 32195 states and 95351 transitions. [2019-12-07 19:02:29,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:02:29,268 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 19:02:29,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:29,303 INFO L225 Difference]: With dead ends: 32195 [2019-12-07 19:02:29,303 INFO L226 Difference]: Without dead ends: 32195 [2019-12-07 19:02:29,304 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:02:29,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32195 states. [2019-12-07 19:02:29,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32195 to 25330. [2019-12-07 19:02:29,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25330 states. [2019-12-07 19:02:29,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25330 states to 25330 states and 76018 transitions. [2019-12-07 19:02:29,709 INFO L78 Accepts]: Start accepts. Automaton has 25330 states and 76018 transitions. Word has length 65 [2019-12-07 19:02:29,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:29,709 INFO L462 AbstractCegarLoop]: Abstraction has 25330 states and 76018 transitions. [2019-12-07 19:02:29,709 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:02:29,709 INFO L276 IsEmpty]: Start isEmpty. Operand 25330 states and 76018 transitions. [2019-12-07 19:02:29,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:02:29,734 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:29,734 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:29,734 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:29,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:29,735 INFO L82 PathProgramCache]: Analyzing trace with hash -2015079482, now seen corresponding path program 2 times [2019-12-07 19:02:29,735 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:29,735 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209889297] [2019-12-07 19:02:29,735 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:29,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:29,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:29,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209889297] [2019-12-07 19:02:29,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:29,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:29,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1276069348] [2019-12-07 19:02:29,774 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:02:29,774 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:29,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:02:29,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:29,775 INFO L87 Difference]: Start difference. First operand 25330 states and 76018 transitions. Second operand 3 states. [2019-12-07 19:02:29,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:29,840 INFO L93 Difference]: Finished difference Result 25329 states and 76016 transitions. [2019-12-07 19:02:29,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:02:29,841 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 19:02:29,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:29,871 INFO L225 Difference]: With dead ends: 25329 [2019-12-07 19:02:29,871 INFO L226 Difference]: Without dead ends: 25329 [2019-12-07 19:02:29,871 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:29,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25329 states. [2019-12-07 19:02:30,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25329 to 18912. [2019-12-07 19:02:30,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18912 states. [2019-12-07 19:02:30,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18912 states to 18912 states and 57521 transitions. [2019-12-07 19:02:30,205 INFO L78 Accepts]: Start accepts. Automaton has 18912 states and 57521 transitions. Word has length 65 [2019-12-07 19:02:30,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:30,205 INFO L462 AbstractCegarLoop]: Abstraction has 18912 states and 57521 transitions. [2019-12-07 19:02:30,205 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:02:30,205 INFO L276 IsEmpty]: Start isEmpty. Operand 18912 states and 57521 transitions. [2019-12-07 19:02:30,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:02:30,220 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:30,220 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:30,220 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:30,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:30,220 INFO L82 PathProgramCache]: Analyzing trace with hash 1925526943, now seen corresponding path program 1 times [2019-12-07 19:02:30,221 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:30,221 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577022532] [2019-12-07 19:02:30,221 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:30,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:30,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:30,288 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577022532] [2019-12-07 19:02:30,288 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:30,288 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:02:30,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518719694] [2019-12-07 19:02:30,289 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 19:02:30,289 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:30,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 19:02:30,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:02:30,289 INFO L87 Difference]: Start difference. First operand 18912 states and 57521 transitions. Second operand 8 states. [2019-12-07 19:02:30,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:30,982 INFO L93 Difference]: Finished difference Result 25573 states and 76410 transitions. [2019-12-07 19:02:30,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 19:02:30,982 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 19:02:30,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:31,010 INFO L225 Difference]: With dead ends: 25573 [2019-12-07 19:02:31,011 INFO L226 Difference]: Without dead ends: 25573 [2019-12-07 19:02:31,011 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2019-12-07 19:02:31,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25573 states. [2019-12-07 19:02:31,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25573 to 18467. [2019-12-07 19:02:31,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18467 states. [2019-12-07 19:02:31,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18467 states to 18467 states and 56175 transitions. [2019-12-07 19:02:31,320 INFO L78 Accepts]: Start accepts. Automaton has 18467 states and 56175 transitions. Word has length 66 [2019-12-07 19:02:31,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:31,320 INFO L462 AbstractCegarLoop]: Abstraction has 18467 states and 56175 transitions. [2019-12-07 19:02:31,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 19:02:31,320 INFO L276 IsEmpty]: Start isEmpty. Operand 18467 states and 56175 transitions. [2019-12-07 19:02:31,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:02:31,335 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:31,335 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:31,335 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:31,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:31,336 INFO L82 PathProgramCache]: Analyzing trace with hash -860464879, now seen corresponding path program 2 times [2019-12-07 19:02:31,336 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:31,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294059062] [2019-12-07 19:02:31,336 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:31,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:31,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:31,406 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294059062] [2019-12-07 19:02:31,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:31,406 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:02:31,406 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818455758] [2019-12-07 19:02:31,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:02:31,406 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:31,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:02:31,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:02:31,407 INFO L87 Difference]: Start difference. First operand 18467 states and 56175 transitions. Second operand 7 states. [2019-12-07 19:02:31,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:31,729 INFO L93 Difference]: Finished difference Result 51599 states and 155539 transitions. [2019-12-07 19:02:31,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:02:31,729 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 19:02:31,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:31,773 INFO L225 Difference]: With dead ends: 51599 [2019-12-07 19:02:31,773 INFO L226 Difference]: Without dead ends: 40195 [2019-12-07 19:02:31,773 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:02:31,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40195 states. [2019-12-07 19:02:32,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40195 to 21568. [2019-12-07 19:02:32,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21568 states. [2019-12-07 19:02:32,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21568 states to 21568 states and 65377 transitions. [2019-12-07 19:02:32,211 INFO L78 Accepts]: Start accepts. Automaton has 21568 states and 65377 transitions. Word has length 66 [2019-12-07 19:02:32,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:32,211 INFO L462 AbstractCegarLoop]: Abstraction has 21568 states and 65377 transitions. [2019-12-07 19:02:32,212 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:02:32,212 INFO L276 IsEmpty]: Start isEmpty. Operand 21568 states and 65377 transitions. [2019-12-07 19:02:32,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:02:32,231 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:32,231 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:32,231 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:32,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:32,231 INFO L82 PathProgramCache]: Analyzing trace with hash -1156901343, now seen corresponding path program 3 times [2019-12-07 19:02:32,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:32,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [909259427] [2019-12-07 19:02:32,231 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:32,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:32,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:32,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [909259427] [2019-12-07 19:02:32,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:32,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 19:02:32,310 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2022104069] [2019-12-07 19:02:32,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 19:02:32,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:32,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 19:02:32,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:02:32,310 INFO L87 Difference]: Start difference. First operand 21568 states and 65377 transitions. Second operand 8 states. [2019-12-07 19:02:33,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:33,111 INFO L93 Difference]: Finished difference Result 74355 states and 221775 transitions. [2019-12-07 19:02:33,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 19:02:33,111 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 19:02:33,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:33,178 INFO L225 Difference]: With dead ends: 74355 [2019-12-07 19:02:33,178 INFO L226 Difference]: Without dead ends: 55181 [2019-12-07 19:02:33,178 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 124 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=145, Invalid=455, Unknown=0, NotChecked=0, Total=600 [2019-12-07 19:02:33,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55181 states. [2019-12-07 19:02:33,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55181 to 25471. [2019-12-07 19:02:33,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25471 states. [2019-12-07 19:02:33,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25471 states to 25471 states and 76892 transitions. [2019-12-07 19:02:33,753 INFO L78 Accepts]: Start accepts. Automaton has 25471 states and 76892 transitions. Word has length 66 [2019-12-07 19:02:33,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:33,753 INFO L462 AbstractCegarLoop]: Abstraction has 25471 states and 76892 transitions. [2019-12-07 19:02:33,753 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 19:02:33,753 INFO L276 IsEmpty]: Start isEmpty. Operand 25471 states and 76892 transitions. [2019-12-07 19:02:33,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:02:33,779 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:33,779 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:33,779 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:33,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:33,779 INFO L82 PathProgramCache]: Analyzing trace with hash -873669215, now seen corresponding path program 4 times [2019-12-07 19:02:33,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:33,780 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712976664] [2019-12-07 19:02:33,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:33,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:33,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:33,822 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712976664] [2019-12-07 19:02:33,822 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:33,822 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:33,822 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1855592205] [2019-12-07 19:02:33,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:02:33,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:33,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:02:33,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:33,823 INFO L87 Difference]: Start difference. First operand 25471 states and 76892 transitions. Second operand 3 states. [2019-12-07 19:02:33,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:33,872 INFO L93 Difference]: Finished difference Result 20660 states and 61892 transitions. [2019-12-07 19:02:33,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:02:33,873 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 19:02:33,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:33,894 INFO L225 Difference]: With dead ends: 20660 [2019-12-07 19:02:33,894 INFO L226 Difference]: Without dead ends: 20660 [2019-12-07 19:02:33,895 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:33,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20660 states. [2019-12-07 19:02:34,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20660 to 19129. [2019-12-07 19:02:34,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19129 states. [2019-12-07 19:02:34,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19129 states to 19129 states and 57334 transitions. [2019-12-07 19:02:34,149 INFO L78 Accepts]: Start accepts. Automaton has 19129 states and 57334 transitions. Word has length 66 [2019-12-07 19:02:34,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:34,149 INFO L462 AbstractCegarLoop]: Abstraction has 19129 states and 57334 transitions. [2019-12-07 19:02:34,150 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:02:34,150 INFO L276 IsEmpty]: Start isEmpty. Operand 19129 states and 57334 transitions. [2019-12-07 19:02:34,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:02:34,165 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:34,165 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:34,165 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:34,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:34,165 INFO L82 PathProgramCache]: Analyzing trace with hash 817808390, now seen corresponding path program 1 times [2019-12-07 19:02:34,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:34,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [387735443] [2019-12-07 19:02:34,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:34,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:02:34,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:02:34,236 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 19:02:34,236 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:02:34,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 |v_ULTIMATE.start_main_~#t415~0.offset_30|) (= v_~z$r_buff1_thd1~0_114 0) (= v_~main$tmp_guard1~0_44 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~z$r_buff0_thd3~0_325) (= v_~z$mem_tmp~0_16 0) (= 0 v_~z$r_buff1_thd3~0_218) (= |v_#NULL.offset_3| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t415~0.base_44| 1) |v_#valid_71|) (= v_~z$read_delayed~0_8 0) (= 0 v_~weak$$choice0~0_15) (= v_~z$w_buff1~0_167 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t415~0.base_44| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t415~0.base_44|) |v_ULTIMATE.start_main_~#t415~0.offset_30| 0)) |v_#memory_int_21|) (= v_~z$r_buff0_thd0~0_136 0) (= v_~x~0_84 0) (= v_~z$r_buff0_thd1~0_185 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$read_delayed_var~0.base_6 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t415~0.base_44|) (= 0 v_~__unbuffered_p2_EAX~0_46) (= 0 v_~weak$$choice2~0_93) (= 0 v_~__unbuffered_p1_EAX~0_60) (= v_~z$w_buff0~0_229 0) (= 0 v_~__unbuffered_p0_EAX~0_95) (= 0 v_~__unbuffered_cnt~0_63) (= v_~z$r_buff0_thd2~0_132 0) (= v_~z~0_167 0) (= v_~main$tmp_guard0~0_44 0) (= v_~y~0_39 0) (= v_~z$w_buff1_used~0_386 0) (= v_~__unbuffered_p2_EBX~0_54 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t415~0.base_44|)) (= v_~z$r_buff1_thd0~0_148 0) (= 0 |v_#NULL.base_3|) (= v_~z$w_buff0_used~0_680 0) (= v_~z$r_buff1_thd2~0_108 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t415~0.base_44| 4) |v_#length_23|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t415~0.offset=|v_ULTIMATE.start_main_~#t415~0.offset_30|, ULTIMATE.start_main_~#t417~0.base=|v_ULTIMATE.start_main_~#t417~0.base_24|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_108, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_86|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_44|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_140|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_82|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_136, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_95, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_60, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_386, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ULTIMATE.start_main_~#t416~0.base=|v_ULTIMATE.start_main_~#t416~0.base_44|, ULTIMATE.start_main_~#t416~0.offset=|v_ULTIMATE.start_main_~#t416~0.offset_30|, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_114, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_325, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ULTIMATE.start_main_~#t415~0.base=|v_ULTIMATE.start_main_~#t415~0.base_44|, ~x~0=v_~x~0_84, ULTIMATE.start_main_~#t417~0.offset=|v_ULTIMATE.start_main_~#t417~0.offset_19|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ~z$w_buff1~0=v_~z$w_buff1~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_103|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_148, ~y~0=v_~y~0_39, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_132, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_680, ~z$w_buff0~0=v_~z$w_buff0~0_229, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_218, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_44, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_167, ~weak$$choice2~0=v_~weak$$choice2~0_93, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_185} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t415~0.offset, ULTIMATE.start_main_~#t417~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t416~0.base, ULTIMATE.start_main_~#t416~0.offset, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t415~0.base, ~x~0, ULTIMATE.start_main_~#t417~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:02:34,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L748: Formula: (and (= ~z$r_buff1_thd2~0_Out1660019355 ~z$r_buff0_thd2~0_In1660019355) (= ~z$r_buff0_thd1~0_In1660019355 ~z$r_buff1_thd1~0_Out1660019355) (= ~z$r_buff0_thd0~0_In1660019355 ~z$r_buff1_thd0~0_Out1660019355) (= ~z$r_buff1_thd3~0_Out1660019355 ~z$r_buff0_thd3~0_In1660019355) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1660019355 0)) (= 1 ~z$r_buff0_thd1~0_Out1660019355) (= ~x~0_In1660019355 ~__unbuffered_p0_EAX~0_Out1660019355)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1660019355, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1660019355, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1660019355, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1660019355, ~x~0=~x~0_In1660019355, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1660019355} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out1660019355, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1660019355, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out1660019355, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out1660019355, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out1660019355, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out1660019355, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1660019355, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1660019355, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1660019355, ~x~0=~x~0_In1660019355, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1660019355} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:02:34,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L827-1-->L829: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t416~0.base_13|) 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t416~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t416~0.base_13|) |v_ULTIMATE.start_main_~#t416~0.offset_11| 1)) |v_#memory_int_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t416~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t416~0.offset_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t416~0.base_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t416~0.base_13| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t416~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t416~0.base=|v_ULTIMATE.start_main_~#t416~0.base_13|, ULTIMATE.start_main_~#t416~0.offset=|v_ULTIMATE.start_main_~#t416~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t416~0.base, ULTIMATE.start_main_~#t416~0.offset] because there is no mapped edge [2019-12-07 19:02:34,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-2-->L768-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out21236130| |P1Thread1of1ForFork2_#t~ite10_Out21236130|)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In21236130 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In21236130 256)))) (or (and .cse0 (= ~z$w_buff1~0_In21236130 |P1Thread1of1ForFork2_#t~ite9_Out21236130|) (not .cse1) (not .cse2)) (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out21236130| ~z~0_In21236130) (or .cse2 .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In21236130, ~z$w_buff1_used~0=~z$w_buff1_used~0_In21236130, ~z$w_buff1~0=~z$w_buff1~0_In21236130, ~z~0=~z~0_In21236130} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out21236130|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In21236130, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out21236130|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In21236130, ~z$w_buff1~0=~z$w_buff1~0_In21236130, ~z~0=~z~0_In21236130} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:02:34,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-913321069 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-913321069 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-913321069| ~z$w_buff0_used~0_In-913321069)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-913321069| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-913321069, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-913321069} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-913321069, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-913321069|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-913321069} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:02:34,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1372692094 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1372692094 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1372692094 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1372692094 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1372692094|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1372692094 |P1Thread1of1ForFork2_#t~ite12_Out1372692094|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1372692094, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1372692094, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1372692094, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1372692094} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1372692094, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1372692094, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1372692094, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1372692094|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1372692094} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:02:34,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L829-1-->L831: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t417~0.base_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t417~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t417~0.base_10|) |v_ULTIMATE.start_main_~#t417~0.offset_9| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t417~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t417~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t417~0.offset_9| 0) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t417~0.base_10| 1)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t417~0.base_10| 4) |v_#length_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t417~0.base=|v_ULTIMATE.start_main_~#t417~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t417~0.offset=|v_ULTIMATE.start_main_~#t417~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t417~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t417~0.offset] because there is no mapped edge [2019-12-07 19:02:34,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L793-->L793-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In951771507 256) 0))) (or (and (= ~z$w_buff0~0_In951771507 |P2Thread1of1ForFork0_#t~ite21_Out951771507|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In951771507| |P2Thread1of1ForFork0_#t~ite20_Out951771507|)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In951771507 256) 0))) (or (and .cse1 (= (mod ~z$w_buff1_used~0_In951771507 256) 0)) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In951771507 256))) (= (mod ~z$w_buff0_used~0_In951771507 256) 0))) (= |P2Thread1of1ForFork0_#t~ite21_Out951771507| |P2Thread1of1ForFork0_#t~ite20_Out951771507|) (= ~z$w_buff0~0_In951771507 |P2Thread1of1ForFork0_#t~ite20_Out951771507|) .cse0))) InVars {~z$w_buff0~0=~z$w_buff0~0_In951771507, ~z$w_buff0_used~0=~z$w_buff0_used~0_In951771507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In951771507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In951771507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In951771507, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In951771507|, ~weak$$choice2~0=~weak$$choice2~0_In951771507} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out951771507|, ~z$w_buff0~0=~z$w_buff0~0_In951771507, ~z$w_buff0_used~0=~z$w_buff0_used~0_In951771507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In951771507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In951771507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In951771507, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out951771507|, ~weak$$choice2~0=~weak$$choice2~0_In951771507} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 19:02:34,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L794-->L794-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1091333495 256)))) (or (and (= ~z$w_buff1~0_In1091333495 |P2Thread1of1ForFork0_#t~ite24_Out1091333495|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In1091333495| |P2Thread1of1ForFork0_#t~ite23_Out1091333495|)) (and (= |P2Thread1of1ForFork0_#t~ite23_Out1091333495| |P2Thread1of1ForFork0_#t~ite24_Out1091333495|) (= ~z$w_buff1~0_In1091333495 |P2Thread1of1ForFork0_#t~ite23_Out1091333495|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1091333495 256) 0))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1091333495 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1091333495 256))) (= 0 (mod ~z$w_buff0_used~0_In1091333495 256))))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1091333495, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1091333495, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1091333495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1091333495, ~z$w_buff1~0=~z$w_buff1~0_In1091333495, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1091333495, ~weak$$choice2~0=~weak$$choice2~0_In1091333495} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1091333495, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1091333495|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1091333495, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1091333495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1091333495, ~z$w_buff1~0=~z$w_buff1~0_In1091333495, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1091333495, ~weak$$choice2~0=~weak$$choice2~0_In1091333495} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 19:02:34,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L797-->L798: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_160 v_~z$r_buff0_thd3~0_161)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_161, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_6|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_160, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:02:34,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L800-->L804: Formula: (and (= v_~z~0_54 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 19:02:34,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L804-2-->L804-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1613471065 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In1613471065 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1613471065| ~z~0_In1613471065) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1613471065| ~z$w_buff1~0_In1613471065) (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1613471065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1613471065, ~z$w_buff1~0=~z$w_buff1~0_In1613471065, ~z~0=~z~0_In1613471065} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1613471065|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1613471065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1613471065, ~z$w_buff1~0=~z$w_buff1~0_In1613471065, ~z~0=~z~0_In1613471065} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:02:34,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L804-4-->L805: Formula: (= v_~z~0_30 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|, ~z~0=v_~z~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 19:02:34,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L805-->L805-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In763159009 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In763159009 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out763159009| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out763159009| ~z$w_buff0_used~0_In763159009)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In763159009, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In763159009} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In763159009, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out763159009|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In763159009} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:02:34,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L771-->L771-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1865552284 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1865552284 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-1865552284| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-1865552284 |P1Thread1of1ForFork2_#t~ite13_Out-1865552284|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1865552284, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1865552284} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1865552284, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1865552284|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1865552284} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:02:34,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L749-->L749-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1903582197 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1903582197 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1903582197 |P0Thread1of1ForFork1_#t~ite5_Out1903582197|)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1903582197|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903582197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1903582197} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1903582197|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1903582197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1903582197} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:02:34,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1101784427 256))) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-1101784427 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1101784427 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1101784427 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1101784427|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1101784427 |P0Thread1of1ForFork1_#t~ite6_Out-1101784427|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1101784427} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1101784427|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1101784427} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:02:34,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L751-->L752: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1802801382 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1802801382 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In1802801382 ~z$r_buff0_thd1~0_Out1802801382))) (or (and (not .cse0) (not .cse1) (= 0 ~z$r_buff0_thd1~0_Out1802801382)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1802801382, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1802801382} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1802801382, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1802801382|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1802801382} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:02:34,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L752-->L752-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In589317413 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In589317413 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In589317413 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In589317413 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd1~0_In589317413 |P0Thread1of1ForFork1_#t~ite8_Out589317413|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out589317413|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In589317413, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In589317413, ~z$w_buff1_used~0=~z$w_buff1_used~0_In589317413, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In589317413} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out589317413|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In589317413, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In589317413, ~z$w_buff1_used~0=~z$w_buff1_used~0_In589317413, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In589317413} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:02:34,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd1~0_77 |v_P0Thread1of1ForFork1_#t~ite8_22|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_21|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_77, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:02:34,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L806-->L806-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd3~0_In1102816513 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1102816513 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1102816513 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1102816513 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out1102816513| 0)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out1102816513| ~z$w_buff1_used~0_In1102816513) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1102816513, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1102816513, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1102816513, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1102816513} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1102816513, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1102816513, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1102816513, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1102816513, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1102816513|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:02:34,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L807-->L807-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1566783785 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1566783785 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1566783785| ~z$r_buff0_thd3~0_In1566783785) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1566783785| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1566783785, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1566783785} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1566783785, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1566783785, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1566783785|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:02:34,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L808-->L808-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd3~0_In1515198035 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1515198035 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1515198035 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1515198035 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In1515198035 |P2Thread1of1ForFork0_#t~ite43_Out1515198035|)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out1515198035| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1515198035, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1515198035, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1515198035, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1515198035} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1515198035|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1515198035, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1515198035, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1515198035, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1515198035} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:02:34,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L808-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_131 |v_P2Thread1of1ForFork0_#t~ite43_24|) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_23|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_131, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:02:34,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L772-->L772-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-902533001 256))) (.cse0 (= (mod ~z$r_buff1_thd2~0_In-902533001 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-902533001 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-902533001 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-902533001| ~z$r_buff1_thd2~0_In-902533001)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-902533001|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-902533001, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-902533001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-902533001, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-902533001} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-902533001, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-902533001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-902533001, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-902533001|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-902533001} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:02:34,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_24| v_~z$r_buff1_thd2~0_56) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_24|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_23|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:02:34,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L835-->L837-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd0~0_51 256)) (= 0 (mod v_~z$w_buff0_used~0_293 256))) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 19:02:34,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L837-2-->L837-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-221023180 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-221023180 256) 0))) (or (and (= ~z~0_In-221023180 |ULTIMATE.start_main_#t~ite47_Out-221023180|) (or .cse0 .cse1)) (and (= ~z$w_buff1~0_In-221023180 |ULTIMATE.start_main_#t~ite47_Out-221023180|) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-221023180, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-221023180, ~z$w_buff1~0=~z$w_buff1~0_In-221023180, ~z~0=~z~0_In-221023180} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-221023180, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-221023180|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-221023180, ~z$w_buff1~0=~z$w_buff1~0_In-221023180, ~z~0=~z~0_In-221023180} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:02:34,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L837-4-->L838: Formula: (= v_~z~0_20 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_14|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 19:02:34,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L838-->L838-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In945169287 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In945169287 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out945169287| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In945169287 |ULTIMATE.start_main_#t~ite49_Out945169287|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In945169287, ~z$w_buff0_used~0=~z$w_buff0_used~0_In945169287} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In945169287, ~z$w_buff0_used~0=~z$w_buff0_used~0_In945169287, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out945169287|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:02:34,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L839-->L839-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-647140950 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-647140950 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-647140950 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-647140950 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-647140950|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-647140950 |ULTIMATE.start_main_#t~ite50_Out-647140950|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-647140950, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-647140950|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-647140950, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:02:34,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L840-->L840-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In1862333176 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1862333176 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1862333176|)) (and (= ~z$r_buff0_thd0~0_In1862333176 |ULTIMATE.start_main_#t~ite51_Out1862333176|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1862333176, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1862333176} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1862333176, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1862333176|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1862333176} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:02:34,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In876211489 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In876211489 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In876211489 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In876211489 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out876211489| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In876211489 |ULTIMATE.start_main_#t~ite52_Out876211489|) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In876211489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In876211489, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In876211489, ~z$w_buff1_used~0=~z$w_buff1_used~0_In876211489} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out876211489|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In876211489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In876211489, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In876211489, ~z$w_buff1_used~0=~z$w_buff1_used~0_In876211489} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:02:34,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] L841-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_23 256)) (= v_~z$r_buff1_thd0~0_123 |v_ULTIMATE.start_main_#t~ite52_43|) (= v_~main$tmp_guard1~0_23 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_72) (= v_~__unbuffered_p2_EBX~0_32 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:02:34,318 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:02:34 BasicIcfg [2019-12-07 19:02:34,319 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:02:34,319 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:02:34,319 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:02:34,319 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:02:34,320 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:32" (3/4) ... [2019-12-07 19:02:34,321 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:02:34,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 |v_ULTIMATE.start_main_~#t415~0.offset_30|) (= v_~z$r_buff1_thd1~0_114 0) (= v_~main$tmp_guard1~0_44 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~z$r_buff0_thd3~0_325) (= v_~z$mem_tmp~0_16 0) (= 0 v_~z$r_buff1_thd3~0_218) (= |v_#NULL.offset_3| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t415~0.base_44| 1) |v_#valid_71|) (= v_~z$read_delayed~0_8 0) (= 0 v_~weak$$choice0~0_15) (= v_~z$w_buff1~0_167 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t415~0.base_44| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t415~0.base_44|) |v_ULTIMATE.start_main_~#t415~0.offset_30| 0)) |v_#memory_int_21|) (= v_~z$r_buff0_thd0~0_136 0) (= v_~x~0_84 0) (= v_~z$r_buff0_thd1~0_185 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$read_delayed_var~0.base_6 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t415~0.base_44|) (= 0 v_~__unbuffered_p2_EAX~0_46) (= 0 v_~weak$$choice2~0_93) (= 0 v_~__unbuffered_p1_EAX~0_60) (= v_~z$w_buff0~0_229 0) (= 0 v_~__unbuffered_p0_EAX~0_95) (= 0 v_~__unbuffered_cnt~0_63) (= v_~z$r_buff0_thd2~0_132 0) (= v_~z~0_167 0) (= v_~main$tmp_guard0~0_44 0) (= v_~y~0_39 0) (= v_~z$w_buff1_used~0_386 0) (= v_~__unbuffered_p2_EBX~0_54 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t415~0.base_44|)) (= v_~z$r_buff1_thd0~0_148 0) (= 0 |v_#NULL.base_3|) (= v_~z$w_buff0_used~0_680 0) (= v_~z$r_buff1_thd2~0_108 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t415~0.base_44| 4) |v_#length_23|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t415~0.offset=|v_ULTIMATE.start_main_~#t415~0.offset_30|, ULTIMATE.start_main_~#t417~0.base=|v_ULTIMATE.start_main_~#t417~0.base_24|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_108, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_86|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_44|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_140|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_82|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_136, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_95, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_60, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_386, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ULTIMATE.start_main_~#t416~0.base=|v_ULTIMATE.start_main_~#t416~0.base_44|, ULTIMATE.start_main_~#t416~0.offset=|v_ULTIMATE.start_main_~#t416~0.offset_30|, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_114, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_325, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ULTIMATE.start_main_~#t415~0.base=|v_ULTIMATE.start_main_~#t415~0.base_44|, ~x~0=v_~x~0_84, ULTIMATE.start_main_~#t417~0.offset=|v_ULTIMATE.start_main_~#t417~0.offset_19|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ~z$w_buff1~0=v_~z$w_buff1~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_103|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_148, ~y~0=v_~y~0_39, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_132, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_680, ~z$w_buff0~0=v_~z$w_buff0~0_229, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_218, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_44, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_167, ~weak$$choice2~0=v_~weak$$choice2~0_93, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_185} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t415~0.offset, ULTIMATE.start_main_~#t417~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t416~0.base, ULTIMATE.start_main_~#t416~0.offset, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t415~0.base, ~x~0, ULTIMATE.start_main_~#t417~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:02:34,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L748: Formula: (and (= ~z$r_buff1_thd2~0_Out1660019355 ~z$r_buff0_thd2~0_In1660019355) (= ~z$r_buff0_thd1~0_In1660019355 ~z$r_buff1_thd1~0_Out1660019355) (= ~z$r_buff0_thd0~0_In1660019355 ~z$r_buff1_thd0~0_Out1660019355) (= ~z$r_buff1_thd3~0_Out1660019355 ~z$r_buff0_thd3~0_In1660019355) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1660019355 0)) (= 1 ~z$r_buff0_thd1~0_Out1660019355) (= ~x~0_In1660019355 ~__unbuffered_p0_EAX~0_Out1660019355)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1660019355, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1660019355, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1660019355, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1660019355, ~x~0=~x~0_In1660019355, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1660019355} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out1660019355, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1660019355, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out1660019355, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out1660019355, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out1660019355, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out1660019355, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1660019355, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1660019355, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1660019355, ~x~0=~x~0_In1660019355, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1660019355} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:02:34,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L827-1-->L829: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t416~0.base_13|) 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t416~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t416~0.base_13|) |v_ULTIMATE.start_main_~#t416~0.offset_11| 1)) |v_#memory_int_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t416~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t416~0.offset_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t416~0.base_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t416~0.base_13| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t416~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t416~0.base=|v_ULTIMATE.start_main_~#t416~0.base_13|, ULTIMATE.start_main_~#t416~0.offset=|v_ULTIMATE.start_main_~#t416~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t416~0.base, ULTIMATE.start_main_~#t416~0.offset] because there is no mapped edge [2019-12-07 19:02:34,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-2-->L768-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out21236130| |P1Thread1of1ForFork2_#t~ite10_Out21236130|)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In21236130 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In21236130 256)))) (or (and .cse0 (= ~z$w_buff1~0_In21236130 |P1Thread1of1ForFork2_#t~ite9_Out21236130|) (not .cse1) (not .cse2)) (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out21236130| ~z~0_In21236130) (or .cse2 .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In21236130, ~z$w_buff1_used~0=~z$w_buff1_used~0_In21236130, ~z$w_buff1~0=~z$w_buff1~0_In21236130, ~z~0=~z~0_In21236130} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out21236130|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In21236130, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out21236130|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In21236130, ~z$w_buff1~0=~z$w_buff1~0_In21236130, ~z~0=~z~0_In21236130} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:02:34,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-913321069 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-913321069 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-913321069| ~z$w_buff0_used~0_In-913321069)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-913321069| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-913321069, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-913321069} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-913321069, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-913321069|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-913321069} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:02:34,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1372692094 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1372692094 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1372692094 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1372692094 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1372692094|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1372692094 |P1Thread1of1ForFork2_#t~ite12_Out1372692094|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1372692094, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1372692094, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1372692094, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1372692094} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1372692094, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1372692094, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1372692094, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1372692094|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1372692094} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:02:34,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L829-1-->L831: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t417~0.base_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t417~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t417~0.base_10|) |v_ULTIMATE.start_main_~#t417~0.offset_9| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t417~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t417~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t417~0.offset_9| 0) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t417~0.base_10| 1)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t417~0.base_10| 4) |v_#length_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t417~0.base=|v_ULTIMATE.start_main_~#t417~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t417~0.offset=|v_ULTIMATE.start_main_~#t417~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t417~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t417~0.offset] because there is no mapped edge [2019-12-07 19:02:34,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L793-->L793-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In951771507 256) 0))) (or (and (= ~z$w_buff0~0_In951771507 |P2Thread1of1ForFork0_#t~ite21_Out951771507|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In951771507| |P2Thread1of1ForFork0_#t~ite20_Out951771507|)) (and (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In951771507 256) 0))) (or (and .cse1 (= (mod ~z$w_buff1_used~0_In951771507 256) 0)) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In951771507 256))) (= (mod ~z$w_buff0_used~0_In951771507 256) 0))) (= |P2Thread1of1ForFork0_#t~ite21_Out951771507| |P2Thread1of1ForFork0_#t~ite20_Out951771507|) (= ~z$w_buff0~0_In951771507 |P2Thread1of1ForFork0_#t~ite20_Out951771507|) .cse0))) InVars {~z$w_buff0~0=~z$w_buff0~0_In951771507, ~z$w_buff0_used~0=~z$w_buff0_used~0_In951771507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In951771507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In951771507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In951771507, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In951771507|, ~weak$$choice2~0=~weak$$choice2~0_In951771507} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out951771507|, ~z$w_buff0~0=~z$w_buff0~0_In951771507, ~z$w_buff0_used~0=~z$w_buff0_used~0_In951771507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In951771507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In951771507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In951771507, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out951771507|, ~weak$$choice2~0=~weak$$choice2~0_In951771507} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 19:02:34,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L794-->L794-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1091333495 256)))) (or (and (= ~z$w_buff1~0_In1091333495 |P2Thread1of1ForFork0_#t~ite24_Out1091333495|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In1091333495| |P2Thread1of1ForFork0_#t~ite23_Out1091333495|)) (and (= |P2Thread1of1ForFork0_#t~ite23_Out1091333495| |P2Thread1of1ForFork0_#t~ite24_Out1091333495|) (= ~z$w_buff1~0_In1091333495 |P2Thread1of1ForFork0_#t~ite23_Out1091333495|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1091333495 256) 0))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1091333495 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1091333495 256))) (= 0 (mod ~z$w_buff0_used~0_In1091333495 256))))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1091333495, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1091333495, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1091333495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1091333495, ~z$w_buff1~0=~z$w_buff1~0_In1091333495, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1091333495, ~weak$$choice2~0=~weak$$choice2~0_In1091333495} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1091333495, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1091333495|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1091333495, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1091333495|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1091333495, ~z$w_buff1~0=~z$w_buff1~0_In1091333495, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1091333495, ~weak$$choice2~0=~weak$$choice2~0_In1091333495} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 19:02:34,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L797-->L798: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_160 v_~z$r_buff0_thd3~0_161)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_161, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_6|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_160, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:02:34,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L800-->L804: Formula: (and (= v_~z~0_54 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 19:02:34,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L804-2-->L804-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1613471065 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In1613471065 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out1613471065| ~z~0_In1613471065) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1613471065| ~z$w_buff1~0_In1613471065) (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1613471065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1613471065, ~z$w_buff1~0=~z$w_buff1~0_In1613471065, ~z~0=~z~0_In1613471065} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1613471065|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1613471065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1613471065, ~z$w_buff1~0=~z$w_buff1~0_In1613471065, ~z~0=~z~0_In1613471065} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:02:34,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L804-4-->L805: Formula: (= v_~z~0_30 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|, ~z~0=v_~z~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 19:02:34,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L805-->L805-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In763159009 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In763159009 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out763159009| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out763159009| ~z$w_buff0_used~0_In763159009)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In763159009, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In763159009} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In763159009, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out763159009|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In763159009} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:02:34,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L771-->L771-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1865552284 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1865552284 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out-1865552284| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-1865552284 |P1Thread1of1ForFork2_#t~ite13_Out-1865552284|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1865552284, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1865552284} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1865552284, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1865552284|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1865552284} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:02:34,330 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L749-->L749-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1903582197 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1903582197 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1903582197 |P0Thread1of1ForFork1_#t~ite5_Out1903582197|)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1903582197|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903582197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1903582197} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1903582197|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1903582197, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1903582197} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:02:34,330 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1101784427 256))) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-1101784427 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1101784427 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1101784427 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1101784427|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1101784427 |P0Thread1of1ForFork1_#t~ite6_Out-1101784427|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1101784427} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1101784427|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1101784427} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:02:34,331 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L751-->L752: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1802801382 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1802801382 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In1802801382 ~z$r_buff0_thd1~0_Out1802801382))) (or (and (not .cse0) (not .cse1) (= 0 ~z$r_buff0_thd1~0_Out1802801382)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1802801382, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1802801382} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1802801382, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1802801382|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1802801382} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:02:34,331 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L752-->L752-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In589317413 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In589317413 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In589317413 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In589317413 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd1~0_In589317413 |P0Thread1of1ForFork1_#t~ite8_Out589317413|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out589317413|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In589317413, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In589317413, ~z$w_buff1_used~0=~z$w_buff1_used~0_In589317413, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In589317413} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out589317413|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In589317413, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In589317413, ~z$w_buff1_used~0=~z$w_buff1_used~0_In589317413, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In589317413} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:02:34,331 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd1~0_77 |v_P0Thread1of1ForFork1_#t~ite8_22|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_21|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_77, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:02:34,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L806-->L806-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd3~0_In1102816513 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1102816513 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1102816513 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1102816513 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out1102816513| 0)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out1102816513| ~z$w_buff1_used~0_In1102816513) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1102816513, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1102816513, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1102816513, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1102816513} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1102816513, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1102816513, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1102816513, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1102816513, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1102816513|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:02:34,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L807-->L807-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1566783785 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1566783785 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1566783785| ~z$r_buff0_thd3~0_In1566783785) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1566783785| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1566783785, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1566783785} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1566783785, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1566783785, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1566783785|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:02:34,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L808-->L808-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd3~0_In1515198035 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1515198035 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1515198035 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1515198035 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In1515198035 |P2Thread1of1ForFork0_#t~ite43_Out1515198035|)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out1515198035| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1515198035, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1515198035, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1515198035, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1515198035} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1515198035|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1515198035, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1515198035, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1515198035, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1515198035} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:02:34,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L808-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_131 |v_P2Thread1of1ForFork0_#t~ite43_24|) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_23|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_131, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:02:34,333 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L772-->L772-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-902533001 256))) (.cse0 (= (mod ~z$r_buff1_thd2~0_In-902533001 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-902533001 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-902533001 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-902533001| ~z$r_buff1_thd2~0_In-902533001)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-902533001|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-902533001, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-902533001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-902533001, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-902533001} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-902533001, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-902533001, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-902533001, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-902533001|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-902533001} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:02:34,333 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_24| v_~z$r_buff1_thd2~0_56) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_24|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_23|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:02:34,333 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L835-->L837-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd0~0_51 256)) (= 0 (mod v_~z$w_buff0_used~0_293 256))) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 19:02:34,333 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L837-2-->L837-4: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-221023180 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-221023180 256) 0))) (or (and (= ~z~0_In-221023180 |ULTIMATE.start_main_#t~ite47_Out-221023180|) (or .cse0 .cse1)) (and (= ~z$w_buff1~0_In-221023180 |ULTIMATE.start_main_#t~ite47_Out-221023180|) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-221023180, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-221023180, ~z$w_buff1~0=~z$w_buff1~0_In-221023180, ~z~0=~z~0_In-221023180} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-221023180, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-221023180|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-221023180, ~z$w_buff1~0=~z$w_buff1~0_In-221023180, ~z~0=~z~0_In-221023180} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:02:34,333 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L837-4-->L838: Formula: (= v_~z~0_20 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_14|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 19:02:34,333 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L838-->L838-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In945169287 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In945169287 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out945169287| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In945169287 |ULTIMATE.start_main_#t~ite49_Out945169287|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In945169287, ~z$w_buff0_used~0=~z$w_buff0_used~0_In945169287} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In945169287, ~z$w_buff0_used~0=~z$w_buff0_used~0_In945169287, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out945169287|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:02:34,334 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L839-->L839-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-647140950 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-647140950 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-647140950 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-647140950 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-647140950|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-647140950 |ULTIMATE.start_main_#t~ite50_Out-647140950|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-647140950, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-647140950|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-647140950, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:02:34,334 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L840-->L840-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In1862333176 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1862333176 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1862333176|)) (and (= ~z$r_buff0_thd0~0_In1862333176 |ULTIMATE.start_main_#t~ite51_Out1862333176|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1862333176, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1862333176} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1862333176, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1862333176|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1862333176} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:02:34,335 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L841-->L841-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In876211489 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In876211489 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In876211489 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In876211489 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out876211489| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In876211489 |ULTIMATE.start_main_#t~ite52_Out876211489|) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In876211489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In876211489, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In876211489, ~z$w_buff1_used~0=~z$w_buff1_used~0_In876211489} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out876211489|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In876211489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In876211489, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In876211489, ~z$w_buff1_used~0=~z$w_buff1_used~0_In876211489} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:02:34,335 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] L841-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_23 256)) (= v_~z$r_buff1_thd0~0_123 |v_ULTIMATE.start_main_#t~ite52_43|) (= v_~main$tmp_guard1~0_23 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_72) (= v_~__unbuffered_p2_EBX~0_32 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:02:34,398 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_95371b55-a97e-4016-9e02-6e540e30e6f3/bin/uautomizer/witness.graphml [2019-12-07 19:02:34,398 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:02:34,399 INFO L168 Benchmark]: Toolchain (without parser) took 63033.07 ms. Allocated memory was 1.0 GB in the beginning and 5.8 GB in the end (delta: 4.7 GB). Free memory was 934.5 MB in the beginning and 2.8 GB in the end (delta: -1.9 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2019-12-07 19:02:34,400 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 956.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:02:34,400 INFO L168 Benchmark]: CACSL2BoogieTranslator took 390.81 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.6 MB). Free memory was 934.5 MB in the beginning and 1.1 GB in the end (delta: -133.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:02:34,400 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.67 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:02:34,400 INFO L168 Benchmark]: Boogie Preprocessor took 25.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:02:34,401 INFO L168 Benchmark]: RCFGBuilder took 415.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 19:02:34,401 INFO L168 Benchmark]: TraceAbstraction took 62077.66 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.6 GB). Free memory was 1.0 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2019-12-07 19:02:34,401 INFO L168 Benchmark]: Witness Printer took 79.60 ms. Allocated memory is still 5.8 GB. Free memory was 2.9 GB in the beginning and 2.8 GB in the end (delta: 81.1 MB). Peak memory consumption was 81.1 MB. Max. memory is 11.5 GB. [2019-12-07 19:02:34,402 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 956.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 390.81 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.6 MB). Free memory was 934.5 MB in the beginning and 1.1 GB in the end (delta: -133.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.67 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 415.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 62077.66 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.6 GB). Free memory was 1.0 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. * Witness Printer took 79.60 ms. Allocated memory is still 5.8 GB. Free memory was 2.9 GB in the beginning and 2.8 GB in the end (delta: 81.1 MB). Peak memory consumption was 81.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 101 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 51 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 32 ChoiceCompositions, 7082 VarBasedMoverChecksPositive, 219 VarBasedMoverChecksNegative, 19 SemBasedMoverChecksPositive, 262 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 89688 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L827] FCALL, FORK 0 pthread_create(&t415, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 1 z$w_buff1 = z$w_buff0 [L734] 1 z$w_buff0 = 1 [L735] 1 z$w_buff1_used = z$w_buff0_used [L736] 1 z$w_buff0_used = (_Bool)1 [L829] FCALL, FORK 0 pthread_create(&t416, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L762] 2 x = 1 [L765] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L769] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L831] FCALL, FORK 0 pthread_create(&t417, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L782] 3 y = 1 [L785] 3 __unbuffered_p2_EAX = y [L788] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L789] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L790] 3 z$flush_delayed = weak$$choice2 [L791] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L792] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L792] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L793] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L794] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L795] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L798] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L799] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L804] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L770] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L771] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L748] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L748] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L749] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L750] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L806] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L807] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L833] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L838] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L839] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L840] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 61.8s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 14.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6081 SDtfs, 6759 SDslu, 13599 SDs, 0 SdLazy, 8511 SolverSat, 278 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 277 GetRequests, 73 SyntacticMatches, 22 SemanticMatches, 182 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 316 ImplicationChecksByTransitivity, 1.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=143879occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 28.8s AutomataMinimizationTime, 28 MinimizatonAttempts, 264362 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 1073 NumberOfCodeBlocks, 1073 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 978 ConstructedInterpolants, 0 QuantifiedInterpolants, 203378 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...