./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix016_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix016_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bf20c345c36ec06b443bd96a4c96f453b9e252aa ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:12:53,557 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:12:53,559 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:12:53,566 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:12:53,567 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:12:53,567 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:12:53,568 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:12:53,569 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:12:53,571 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:12:53,571 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:12:53,572 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:12:53,573 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:12:53,573 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:12:53,574 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:12:53,574 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:12:53,575 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:12:53,575 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:12:53,576 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:12:53,578 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:12:53,579 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:12:53,580 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:12:53,581 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:12:53,582 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:12:53,582 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:12:53,584 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:12:53,584 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:12:53,584 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:12:53,585 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:12:53,585 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:12:53,586 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:12:53,586 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:12:53,586 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:12:53,586 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:12:53,587 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:12:53,588 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:12:53,588 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:12:53,588 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:12:53,588 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:12:53,588 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:12:53,589 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:12:53,589 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:12:53,590 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 11:12:53,599 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:12:53,599 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:12:53,600 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 11:12:53,600 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 11:12:53,600 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 11:12:53,600 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:12:53,600 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:12:53,600 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:12:53,600 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:12:53,600 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:12:53,600 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:12:53,600 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:12:53,601 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:12:53,601 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:12:53,601 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:12:53,601 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:12:53,601 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:12:53,601 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:12:53,601 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 11:12:53,601 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:12:53,601 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:12:53,602 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:12:53,602 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:12:53,602 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:12:53,602 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:12:53,602 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 11:12:53,602 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:12:53,602 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:12:53,602 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:12:53,602 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bf20c345c36ec06b443bd96a4c96f453b9e252aa [2019-12-07 11:12:53,702 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:12:53,709 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:12:53,711 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:12:53,712 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:12:53,713 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:12:53,713 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix016_rmo.opt.i [2019-12-07 11:12:53,750 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/data/049f2c2fd/dee4e85bb52644dd892d8166f5c1fa7d/FLAG05c3ddef3 [2019-12-07 11:12:54,214 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:12:54,215 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/sv-benchmarks/c/pthread-wmm/mix016_rmo.opt.i [2019-12-07 11:12:54,225 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/data/049f2c2fd/dee4e85bb52644dd892d8166f5c1fa7d/FLAG05c3ddef3 [2019-12-07 11:12:54,235 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/data/049f2c2fd/dee4e85bb52644dd892d8166f5c1fa7d [2019-12-07 11:12:54,236 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:12:54,237 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:12:54,238 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:12:54,238 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:12:54,240 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:12:54,241 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,242 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75544c05 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54, skipping insertion in model container [2019-12-07 11:12:54,242 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,247 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:12:54,277 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:12:54,550 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:12:54,558 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:12:54,596 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:12:54,640 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:12:54,641 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54 WrapperNode [2019-12-07 11:12:54,641 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:12:54,641 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:12:54,641 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:12:54,641 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:12:54,647 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,659 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,678 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:12:54,678 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:12:54,678 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:12:54,678 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:12:54,684 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,685 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,688 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,688 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,695 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,697 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,700 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... [2019-12-07 11:12:54,702 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:12:54,703 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:12:54,703 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:12:54,703 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:12:54,704 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:12:54,743 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:12:54,744 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:12:54,744 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:12:54,744 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:12:54,744 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:12:54,744 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:12:54,744 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:12:54,744 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:12:54,744 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:12:54,744 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:12:54,744 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:12:54,744 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:12:54,745 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:12:54,746 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:12:55,101 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:12:55,101 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:12:55,102 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:12:55 BoogieIcfgContainer [2019-12-07 11:12:55,102 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:12:55,102 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:12:55,102 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:12:55,104 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:12:55,104 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:12:54" (1/3) ... [2019-12-07 11:12:55,105 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@65714be1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:12:55, skipping insertion in model container [2019-12-07 11:12:55,105 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:12:54" (2/3) ... [2019-12-07 11:12:55,105 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@65714be1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:12:55, skipping insertion in model container [2019-12-07 11:12:55,105 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:12:55" (3/3) ... [2019-12-07 11:12:55,106 INFO L109 eAbstractionObserver]: Analyzing ICFG mix016_rmo.opt.i [2019-12-07 11:12:55,112 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:12:55,113 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:12:55,117 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:12:55,118 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:12:55,142 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,142 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,142 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,142 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,143 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,143 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,145 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,146 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,149 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,149 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,149 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,149 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,149 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,150 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,151 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,151 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,151 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,151 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,151 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,152 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,153 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,154 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,155 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,156 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,157 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,158 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,159 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,160 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,160 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,160 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,160 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,160 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,160 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,161 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,161 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,161 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,161 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,161 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,161 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,162 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,163 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,164 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,165 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,165 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,165 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,165 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,165 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,166 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,166 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,166 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,166 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,166 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,166 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,167 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,168 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,169 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:12:55,179 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:12:55,192 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:12:55,192 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:12:55,192 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:12:55,192 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:12:55,192 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:12:55,193 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:12:55,193 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:12:55,193 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:12:55,203 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 165 places, 196 transitions [2019-12-07 11:12:55,205 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 11:12:55,256 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 11:12:55,257 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:12:55,267 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 712 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 11:12:55,282 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 165 places, 196 transitions [2019-12-07 11:12:55,309 INFO L134 PetriNetUnfolder]: 41/193 cut-off events. [2019-12-07 11:12:55,309 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:12:55,313 INFO L76 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 193 events. 41/193 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 712 event pairs. 9/159 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 11:12:55,330 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 11:12:55,331 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:12:58,327 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-12-07 11:12:58,500 WARN L192 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 11:12:58,589 INFO L206 etLargeBlockEncoding]: Checked pairs total: 75392 [2019-12-07 11:12:58,589 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 11:12:58,591 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 91 transitions [2019-12-07 11:13:07,502 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86190 states. [2019-12-07 11:13:07,504 INFO L276 IsEmpty]: Start isEmpty. Operand 86190 states. [2019-12-07 11:13:07,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 11:13:07,508 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:13:07,508 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 11:13:07,508 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:13:07,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:13:07,512 INFO L82 PathProgramCache]: Analyzing trace with hash 802149997, now seen corresponding path program 1 times [2019-12-07 11:13:07,518 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:13:07,518 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901627067] [2019-12-07 11:13:07,518 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:13:07,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:13:07,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:13:07,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901627067] [2019-12-07 11:13:07,672 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:13:07,672 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:13:07,672 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329796137] [2019-12-07 11:13:07,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:13:07,675 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:13:07,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:13:07,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:13:07,686 INFO L87 Difference]: Start difference. First operand 86190 states. Second operand 3 states. [2019-12-07 11:13:08,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:13:08,267 INFO L93 Difference]: Finished difference Result 85100 states and 365324 transitions. [2019-12-07 11:13:08,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:13:08,268 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 11:13:08,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:13:08,640 INFO L225 Difference]: With dead ends: 85100 [2019-12-07 11:13:08,640 INFO L226 Difference]: Without dead ends: 79822 [2019-12-07 11:13:08,641 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:13:11,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79822 states. [2019-12-07 11:13:12,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79822 to 79822. [2019-12-07 11:13:12,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79822 states. [2019-12-07 11:13:13,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79822 states to 79822 states and 342168 transitions. [2019-12-07 11:13:13,144 INFO L78 Accepts]: Start accepts. Automaton has 79822 states and 342168 transitions. Word has length 5 [2019-12-07 11:13:13,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:13:13,145 INFO L462 AbstractCegarLoop]: Abstraction has 79822 states and 342168 transitions. [2019-12-07 11:13:13,145 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:13:13,145 INFO L276 IsEmpty]: Start isEmpty. Operand 79822 states and 342168 transitions. [2019-12-07 11:13:13,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:13:13,152 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:13:13,152 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:13:13,152 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:13:13,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:13:13,152 INFO L82 PathProgramCache]: Analyzing trace with hash 1460490103, now seen corresponding path program 1 times [2019-12-07 11:13:13,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:13:13,153 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190300471] [2019-12-07 11:13:13,153 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:13:13,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:13:13,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:13:13,213 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [190300471] [2019-12-07 11:13:13,214 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:13:13,214 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:13:13,214 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445716020] [2019-12-07 11:13:13,215 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:13:13,215 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:13:13,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:13:13,215 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:13:13,215 INFO L87 Difference]: Start difference. First operand 79822 states and 342168 transitions. Second operand 4 states. [2019-12-07 11:13:15,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:13:15,576 INFO L93 Difference]: Finished difference Result 125836 states and 518761 transitions. [2019-12-07 11:13:15,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:13:15,576 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:13:15,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:13:15,889 INFO L225 Difference]: With dead ends: 125836 [2019-12-07 11:13:15,889 INFO L226 Difference]: Without dead ends: 125752 [2019-12-07 11:13:15,890 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:13:19,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125752 states. [2019-12-07 11:13:21,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125752 to 112336. [2019-12-07 11:13:21,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112336 states. [2019-12-07 11:13:21,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112336 states to 112336 states and 468776 transitions. [2019-12-07 11:13:21,387 INFO L78 Accepts]: Start accepts. Automaton has 112336 states and 468776 transitions. Word has length 13 [2019-12-07 11:13:21,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:13:21,388 INFO L462 AbstractCegarLoop]: Abstraction has 112336 states and 468776 transitions. [2019-12-07 11:13:21,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:13:21,388 INFO L276 IsEmpty]: Start isEmpty. Operand 112336 states and 468776 transitions. [2019-12-07 11:13:21,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:13:21,390 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:13:21,390 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:13:21,390 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:13:21,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:13:21,391 INFO L82 PathProgramCache]: Analyzing trace with hash -1843446667, now seen corresponding path program 1 times [2019-12-07 11:13:21,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:13:21,391 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414212096] [2019-12-07 11:13:21,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:13:21,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:13:21,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:13:21,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414212096] [2019-12-07 11:13:21,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:13:21,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:13:21,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1438045617] [2019-12-07 11:13:21,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:13:21,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:13:21,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:13:21,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:13:21,435 INFO L87 Difference]: Start difference. First operand 112336 states and 468776 transitions. Second operand 4 states. [2019-12-07 11:13:22,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:13:22,210 INFO L93 Difference]: Finished difference Result 156868 states and 641868 transitions. [2019-12-07 11:13:22,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:13:22,211 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:13:22,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:13:22,583 INFO L225 Difference]: With dead ends: 156868 [2019-12-07 11:13:22,583 INFO L226 Difference]: Without dead ends: 156772 [2019-12-07 11:13:22,583 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:13:26,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156772 states. [2019-12-07 11:13:30,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156772 to 131047. [2019-12-07 11:13:30,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131047 states. [2019-12-07 11:13:30,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131047 states to 131047 states and 544807 transitions. [2019-12-07 11:13:30,455 INFO L78 Accepts]: Start accepts. Automaton has 131047 states and 544807 transitions. Word has length 13 [2019-12-07 11:13:30,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:13:30,455 INFO L462 AbstractCegarLoop]: Abstraction has 131047 states and 544807 transitions. [2019-12-07 11:13:30,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:13:30,456 INFO L276 IsEmpty]: Start isEmpty. Operand 131047 states and 544807 transitions. [2019-12-07 11:13:30,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 11:13:30,458 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:13:30,458 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:13:30,459 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:13:30,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:13:30,459 INFO L82 PathProgramCache]: Analyzing trace with hash 890356816, now seen corresponding path program 1 times [2019-12-07 11:13:30,459 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:13:30,459 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562522684] [2019-12-07 11:13:30,459 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:13:30,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:13:30,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:13:30,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [562522684] [2019-12-07 11:13:30,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:13:30,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:13:30,504 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1381968637] [2019-12-07 11:13:30,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:13:30,505 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:13:30,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:13:30,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:13:30,505 INFO L87 Difference]: Start difference. First operand 131047 states and 544807 transitions. Second operand 5 states. [2019-12-07 11:13:31,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:13:31,639 INFO L93 Difference]: Finished difference Result 177820 states and 726114 transitions. [2019-12-07 11:13:31,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:13:31,640 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2019-12-07 11:13:31,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:13:32,063 INFO L225 Difference]: With dead ends: 177820 [2019-12-07 11:13:32,063 INFO L226 Difference]: Without dead ends: 177684 [2019-12-07 11:13:32,063 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:13:36,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177684 states. [2019-12-07 11:13:38,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177684 to 146241. [2019-12-07 11:13:38,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146241 states. [2019-12-07 11:13:38,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146241 states to 146241 states and 605983 transitions. [2019-12-07 11:13:38,977 INFO L78 Accepts]: Start accepts. Automaton has 146241 states and 605983 transitions. Word has length 14 [2019-12-07 11:13:38,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:13:38,977 INFO L462 AbstractCegarLoop]: Abstraction has 146241 states and 605983 transitions. [2019-12-07 11:13:38,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:13:38,977 INFO L276 IsEmpty]: Start isEmpty. Operand 146241 states and 605983 transitions. [2019-12-07 11:13:38,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:13:38,995 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:13:38,995 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:13:38,995 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:13:38,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:13:38,995 INFO L82 PathProgramCache]: Analyzing trace with hash 1219681260, now seen corresponding path program 1 times [2019-12-07 11:13:38,995 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:13:38,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561896957] [2019-12-07 11:13:38,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:13:39,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:13:39,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:13:39,041 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561896957] [2019-12-07 11:13:39,041 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:13:39,041 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:13:39,041 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539684403] [2019-12-07 11:13:39,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:13:39,042 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:13:39,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:13:39,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:13:39,042 INFO L87 Difference]: Start difference. First operand 146241 states and 605983 transitions. Second operand 3 states. [2019-12-07 11:13:39,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:13:39,641 INFO L93 Difference]: Finished difference Result 145372 states and 602347 transitions. [2019-12-07 11:13:39,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:13:39,642 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:13:39,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:13:39,996 INFO L225 Difference]: With dead ends: 145372 [2019-12-07 11:13:39,996 INFO L226 Difference]: Without dead ends: 145372 [2019-12-07 11:13:39,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:13:45,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145372 states. [2019-12-07 11:13:47,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145372 to 145372. [2019-12-07 11:13:47,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145372 states. [2019-12-07 11:13:47,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145372 states to 145372 states and 602347 transitions. [2019-12-07 11:13:47,863 INFO L78 Accepts]: Start accepts. Automaton has 145372 states and 602347 transitions. Word has length 18 [2019-12-07 11:13:47,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:13:47,864 INFO L462 AbstractCegarLoop]: Abstraction has 145372 states and 602347 transitions. [2019-12-07 11:13:47,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:13:47,864 INFO L276 IsEmpty]: Start isEmpty. Operand 145372 states and 602347 transitions. [2019-12-07 11:13:47,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:13:47,879 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:13:47,880 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:13:47,880 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:13:47,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:13:47,880 INFO L82 PathProgramCache]: Analyzing trace with hash -995947574, now seen corresponding path program 1 times [2019-12-07 11:13:47,880 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:13:47,880 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423810451] [2019-12-07 11:13:47,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:13:47,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:13:47,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:13:47,915 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [423810451] [2019-12-07 11:13:47,915 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:13:47,916 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:13:47,916 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [268235331] [2019-12-07 11:13:47,916 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:13:47,916 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:13:47,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:13:47,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:13:47,917 INFO L87 Difference]: Start difference. First operand 145372 states and 602347 transitions. Second operand 3 states. [2019-12-07 11:13:48,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:13:48,769 INFO L93 Difference]: Finished difference Result 145372 states and 596329 transitions. [2019-12-07 11:13:48,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:13:48,770 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:13:48,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:13:49,121 INFO L225 Difference]: With dead ends: 145372 [2019-12-07 11:13:49,122 INFO L226 Difference]: Without dead ends: 145372 [2019-12-07 11:13:49,122 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:13:52,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145372 states. [2019-12-07 11:13:54,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145372 to 142094. [2019-12-07 11:13:54,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142094 states. [2019-12-07 11:13:55,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142094 states to 142094 states and 583493 transitions. [2019-12-07 11:13:55,268 INFO L78 Accepts]: Start accepts. Automaton has 142094 states and 583493 transitions. Word has length 19 [2019-12-07 11:13:55,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:13:55,268 INFO L462 AbstractCegarLoop]: Abstraction has 142094 states and 583493 transitions. [2019-12-07 11:13:55,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:13:55,268 INFO L276 IsEmpty]: Start isEmpty. Operand 142094 states and 583493 transitions. [2019-12-07 11:13:55,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:13:55,282 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:13:55,282 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:13:55,282 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:13:55,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:13:55,282 INFO L82 PathProgramCache]: Analyzing trace with hash 934208247, now seen corresponding path program 1 times [2019-12-07 11:13:55,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:13:55,283 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [17188347] [2019-12-07 11:13:55,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:13:55,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:13:55,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:13:55,333 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [17188347] [2019-12-07 11:13:55,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:13:55,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:13:55,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1556685002] [2019-12-07 11:13:55,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:13:55,334 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:13:55,334 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:13:55,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:13:55,334 INFO L87 Difference]: Start difference. First operand 142094 states and 583493 transitions. Second operand 5 states. [2019-12-07 11:13:56,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:13:56,347 INFO L93 Difference]: Finished difference Result 193509 states and 781465 transitions. [2019-12-07 11:13:56,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:13:56,348 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:13:56,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:13:56,805 INFO L225 Difference]: With dead ends: 193509 [2019-12-07 11:13:56,805 INFO L226 Difference]: Without dead ends: 193339 [2019-12-07 11:13:56,805 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:14:01,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193339 states. [2019-12-07 11:14:05,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193339 to 145317. [2019-12-07 11:14:05,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145317 states. [2019-12-07 11:14:05,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145317 states to 145317 states and 595641 transitions. [2019-12-07 11:14:05,899 INFO L78 Accepts]: Start accepts. Automaton has 145317 states and 595641 transitions. Word has length 19 [2019-12-07 11:14:05,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:05,899 INFO L462 AbstractCegarLoop]: Abstraction has 145317 states and 595641 transitions. [2019-12-07 11:14:05,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:14:05,899 INFO L276 IsEmpty]: Start isEmpty. Operand 145317 states and 595641 transitions. [2019-12-07 11:14:05,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:14:05,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:05,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:05,914 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:05,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:05,914 INFO L82 PathProgramCache]: Analyzing trace with hash 447386609, now seen corresponding path program 1 times [2019-12-07 11:14:05,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:05,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047403537] [2019-12-07 11:14:05,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:05,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:05,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:05,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047403537] [2019-12-07 11:14:05,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:05,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:14:05,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044193694] [2019-12-07 11:14:05,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:14:05,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:05,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:14:05,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:14:05,938 INFO L87 Difference]: Start difference. First operand 145317 states and 595641 transitions. Second operand 3 states. [2019-12-07 11:14:06,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:06,039 INFO L93 Difference]: Finished difference Result 32834 states and 108346 transitions. [2019-12-07 11:14:06,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:14:06,039 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:14:06,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:06,085 INFO L225 Difference]: With dead ends: 32834 [2019-12-07 11:14:06,085 INFO L226 Difference]: Without dead ends: 32834 [2019-12-07 11:14:06,086 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:14:06,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32834 states. [2019-12-07 11:14:06,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32834 to 32834. [2019-12-07 11:14:06,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32834 states. [2019-12-07 11:14:06,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32834 states to 32834 states and 108346 transitions. [2019-12-07 11:14:06,611 INFO L78 Accepts]: Start accepts. Automaton has 32834 states and 108346 transitions. Word has length 19 [2019-12-07 11:14:06,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:06,611 INFO L462 AbstractCegarLoop]: Abstraction has 32834 states and 108346 transitions. [2019-12-07 11:14:06,611 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:14:06,611 INFO L276 IsEmpty]: Start isEmpty. Operand 32834 states and 108346 transitions. [2019-12-07 11:14:06,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:14:06,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:06,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:06,617 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:06,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:06,617 INFO L82 PathProgramCache]: Analyzing trace with hash 454702152, now seen corresponding path program 1 times [2019-12-07 11:14:06,617 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:06,617 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919210398] [2019-12-07 11:14:06,617 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:06,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:06,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:06,665 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919210398] [2019-12-07 11:14:06,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:06,665 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:14:06,665 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1700788249] [2019-12-07 11:14:06,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:14:06,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:06,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:14:06,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:14:06,666 INFO L87 Difference]: Start difference. First operand 32834 states and 108346 transitions. Second operand 6 states. [2019-12-07 11:14:07,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:07,484 INFO L93 Difference]: Finished difference Result 50744 states and 164871 transitions. [2019-12-07 11:14:07,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:14:07,485 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 11:14:07,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:07,560 INFO L225 Difference]: With dead ends: 50744 [2019-12-07 11:14:07,561 INFO L226 Difference]: Without dead ends: 50715 [2019-12-07 11:14:07,561 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:14:07,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50715 states. [2019-12-07 11:14:08,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50715 to 35328. [2019-12-07 11:14:08,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35328 states. [2019-12-07 11:14:08,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35328 states to 35328 states and 115486 transitions. [2019-12-07 11:14:08,220 INFO L78 Accepts]: Start accepts. Automaton has 35328 states and 115486 transitions. Word has length 22 [2019-12-07 11:14:08,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:08,221 INFO L462 AbstractCegarLoop]: Abstraction has 35328 states and 115486 transitions. [2019-12-07 11:14:08,221 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:14:08,221 INFO L276 IsEmpty]: Start isEmpty. Operand 35328 states and 115486 transitions. [2019-12-07 11:14:08,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:14:08,234 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:08,234 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:08,234 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:08,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:08,234 INFO L82 PathProgramCache]: Analyzing trace with hash 191244626, now seen corresponding path program 1 times [2019-12-07 11:14:08,234 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:08,234 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104196301] [2019-12-07 11:14:08,235 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:08,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:08,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:08,278 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104196301] [2019-12-07 11:14:08,278 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:08,278 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:14:08,278 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624795493] [2019-12-07 11:14:08,278 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:14:08,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:08,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:14:08,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:14:08,279 INFO L87 Difference]: Start difference. First operand 35328 states and 115486 transitions. Second operand 6 states. [2019-12-07 11:14:08,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:08,676 INFO L93 Difference]: Finished difference Result 53273 states and 173420 transitions. [2019-12-07 11:14:08,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 11:14:08,677 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 11:14:08,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:08,759 INFO L225 Difference]: With dead ends: 53273 [2019-12-07 11:14:08,759 INFO L226 Difference]: Without dead ends: 53229 [2019-12-07 11:14:08,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:14:08,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53229 states. [2019-12-07 11:14:09,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53229 to 37008. [2019-12-07 11:14:09,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37008 states. [2019-12-07 11:14:09,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37008 states to 37008 states and 120929 transitions. [2019-12-07 11:14:09,463 INFO L78 Accepts]: Start accepts. Automaton has 37008 states and 120929 transitions. Word has length 27 [2019-12-07 11:14:09,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:09,463 INFO L462 AbstractCegarLoop]: Abstraction has 37008 states and 120929 transitions. [2019-12-07 11:14:09,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:14:09,464 INFO L276 IsEmpty]: Start isEmpty. Operand 37008 states and 120929 transitions. [2019-12-07 11:14:09,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 11:14:09,484 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:09,484 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:09,484 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:09,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:09,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1967543379, now seen corresponding path program 1 times [2019-12-07 11:14:09,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:09,484 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299749831] [2019-12-07 11:14:09,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:09,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:09,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:09,514 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299749831] [2019-12-07 11:14:09,514 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:09,514 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:14:09,514 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [745871706] [2019-12-07 11:14:09,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:14:09,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:09,515 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:14:09,515 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:14:09,515 INFO L87 Difference]: Start difference. First operand 37008 states and 120929 transitions. Second operand 4 states. [2019-12-07 11:14:09,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:09,571 INFO L93 Difference]: Finished difference Result 13541 states and 41604 transitions. [2019-12-07 11:14:09,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:14:09,572 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 11:14:09,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:09,587 INFO L225 Difference]: With dead ends: 13541 [2019-12-07 11:14:09,588 INFO L226 Difference]: Without dead ends: 13541 [2019-12-07 11:14:09,588 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:14:09,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13541 states. [2019-12-07 11:14:09,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13541 to 13072. [2019-12-07 11:14:09,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13072 states. [2019-12-07 11:14:09,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13072 states to 13072 states and 40173 transitions. [2019-12-07 11:14:09,777 INFO L78 Accepts]: Start accepts. Automaton has 13072 states and 40173 transitions. Word has length 30 [2019-12-07 11:14:09,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:09,777 INFO L462 AbstractCegarLoop]: Abstraction has 13072 states and 40173 transitions. [2019-12-07 11:14:09,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:14:09,777 INFO L276 IsEmpty]: Start isEmpty. Operand 13072 states and 40173 transitions. [2019-12-07 11:14:09,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 11:14:09,788 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:09,789 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:09,789 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:09,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:09,789 INFO L82 PathProgramCache]: Analyzing trace with hash 1155983199, now seen corresponding path program 1 times [2019-12-07 11:14:09,789 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:09,789 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [503614207] [2019-12-07 11:14:09,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:09,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:09,853 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:09,853 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [503614207] [2019-12-07 11:14:09,853 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:09,853 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:14:09,853 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [9243238] [2019-12-07 11:14:09,853 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:14:09,853 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:09,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:14:09,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:14:09,854 INFO L87 Difference]: Start difference. First operand 13072 states and 40173 transitions. Second operand 7 states. [2019-12-07 11:14:10,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:10,514 INFO L93 Difference]: Finished difference Result 17406 states and 51903 transitions. [2019-12-07 11:14:10,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 11:14:10,514 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 11:14:10,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:10,532 INFO L225 Difference]: With dead ends: 17406 [2019-12-07 11:14:10,532 INFO L226 Difference]: Without dead ends: 17402 [2019-12-07 11:14:10,533 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=102, Invalid=278, Unknown=0, NotChecked=0, Total=380 [2019-12-07 11:14:10,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17402 states. [2019-12-07 11:14:10,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17402 to 12193. [2019-12-07 11:14:10,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12193 states. [2019-12-07 11:14:10,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12193 states to 12193 states and 37496 transitions. [2019-12-07 11:14:10,917 INFO L78 Accepts]: Start accepts. Automaton has 12193 states and 37496 transitions. Word has length 39 [2019-12-07 11:14:10,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:10,917 INFO L462 AbstractCegarLoop]: Abstraction has 12193 states and 37496 transitions. [2019-12-07 11:14:10,917 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:14:10,917 INFO L276 IsEmpty]: Start isEmpty. Operand 12193 states and 37496 transitions. [2019-12-07 11:14:10,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:14:10,927 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:10,927 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:10,927 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:10,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:10,928 INFO L82 PathProgramCache]: Analyzing trace with hash -1022330281, now seen corresponding path program 1 times [2019-12-07 11:14:10,928 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:10,928 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689174159] [2019-12-07 11:14:10,928 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:10,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:10,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:10,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689174159] [2019-12-07 11:14:10,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:10,965 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:14:10,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434851292] [2019-12-07 11:14:10,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:14:10,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:10,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:14:10,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:14:10,966 INFO L87 Difference]: Start difference. First operand 12193 states and 37496 transitions. Second operand 5 states. [2019-12-07 11:14:11,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:11,014 INFO L93 Difference]: Finished difference Result 10798 states and 34133 transitions. [2019-12-07 11:14:11,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:14:11,015 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 11:14:11,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:11,026 INFO L225 Difference]: With dead ends: 10798 [2019-12-07 11:14:11,027 INFO L226 Difference]: Without dead ends: 10756 [2019-12-07 11:14:11,027 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:14:11,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10756 states. [2019-12-07 11:14:11,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10756 to 10588. [2019-12-07 11:14:11,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10588 states. [2019-12-07 11:14:11,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10588 states to 10588 states and 33568 transitions. [2019-12-07 11:14:11,174 INFO L78 Accepts]: Start accepts. Automaton has 10588 states and 33568 transitions. Word has length 40 [2019-12-07 11:14:11,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:11,174 INFO L462 AbstractCegarLoop]: Abstraction has 10588 states and 33568 transitions. [2019-12-07 11:14:11,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:14:11,175 INFO L276 IsEmpty]: Start isEmpty. Operand 10588 states and 33568 transitions. [2019-12-07 11:14:11,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:14:11,184 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:11,184 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:11,184 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:11,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:11,184 INFO L82 PathProgramCache]: Analyzing trace with hash -646862803, now seen corresponding path program 1 times [2019-12-07 11:14:11,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:11,184 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313414585] [2019-12-07 11:14:11,185 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:11,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:11,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:11,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313414585] [2019-12-07 11:14:11,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:11,223 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:14:11,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077273361] [2019-12-07 11:14:11,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:14:11,224 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:11,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:14:11,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:14:11,225 INFO L87 Difference]: Start difference. First operand 10588 states and 33568 transitions. Second operand 3 states. [2019-12-07 11:14:11,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:11,299 INFO L93 Difference]: Finished difference Result 14476 states and 45029 transitions. [2019-12-07 11:14:11,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:14:11,300 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 11:14:11,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:11,317 INFO L225 Difference]: With dead ends: 14476 [2019-12-07 11:14:11,317 INFO L226 Difference]: Without dead ends: 13968 [2019-12-07 11:14:11,318 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:14:11,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13968 states. [2019-12-07 11:14:11,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13968 to 11116. [2019-12-07 11:14:11,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11116 states. [2019-12-07 11:14:11,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11116 states to 11116 states and 35374 transitions. [2019-12-07 11:14:11,489 INFO L78 Accepts]: Start accepts. Automaton has 11116 states and 35374 transitions. Word has length 54 [2019-12-07 11:14:11,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:11,489 INFO L462 AbstractCegarLoop]: Abstraction has 11116 states and 35374 transitions. [2019-12-07 11:14:11,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:14:11,490 INFO L276 IsEmpty]: Start isEmpty. Operand 11116 states and 35374 transitions. [2019-12-07 11:14:11,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:14:11,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:11,500 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:11,500 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:11,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:11,500 INFO L82 PathProgramCache]: Analyzing trace with hash 667416220, now seen corresponding path program 1 times [2019-12-07 11:14:11,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:11,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579068221] [2019-12-07 11:14:11,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:11,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:11,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:11,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579068221] [2019-12-07 11:14:11,540 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:11,540 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:14:11,540 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926907256] [2019-12-07 11:14:11,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:14:11,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:11,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:14:11,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:14:11,541 INFO L87 Difference]: Start difference. First operand 11116 states and 35374 transitions. Second operand 4 states. [2019-12-07 11:14:11,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:11,598 INFO L93 Difference]: Finished difference Result 19814 states and 63171 transitions. [2019-12-07 11:14:11,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:14:11,598 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2019-12-07 11:14:11,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:11,609 INFO L225 Difference]: With dead ends: 19814 [2019-12-07 11:14:11,609 INFO L226 Difference]: Without dead ends: 9031 [2019-12-07 11:14:11,609 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:14:11,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9031 states. [2019-12-07 11:14:11,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9031 to 9031. [2019-12-07 11:14:11,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9031 states. [2019-12-07 11:14:11,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9031 states to 9031 states and 28722 transitions. [2019-12-07 11:14:11,741 INFO L78 Accepts]: Start accepts. Automaton has 9031 states and 28722 transitions. Word has length 54 [2019-12-07 11:14:11,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:11,741 INFO L462 AbstractCegarLoop]: Abstraction has 9031 states and 28722 transitions. [2019-12-07 11:14:11,741 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:14:11,741 INFO L276 IsEmpty]: Start isEmpty. Operand 9031 states and 28722 transitions. [2019-12-07 11:14:11,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:14:11,749 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:11,750 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:11,750 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:11,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:11,750 INFO L82 PathProgramCache]: Analyzing trace with hash -1444273636, now seen corresponding path program 2 times [2019-12-07 11:14:11,750 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:11,750 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [710055949] [2019-12-07 11:14:11,750 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:11,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:11,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:11,969 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [710055949] [2019-12-07 11:14:11,969 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:11,969 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:14:11,969 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1977815895] [2019-12-07 11:14:11,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 11:14:11,970 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:11,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 11:14:11,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:14:11,970 INFO L87 Difference]: Start difference. First operand 9031 states and 28722 transitions. Second operand 14 states. [2019-12-07 11:14:13,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:13,602 INFO L93 Difference]: Finished difference Result 29052 states and 89408 transitions. [2019-12-07 11:14:13,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 11:14:13,602 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-07 11:14:13,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:13,625 INFO L225 Difference]: With dead ends: 29052 [2019-12-07 11:14:13,625 INFO L226 Difference]: Without dead ends: 20705 [2019-12-07 11:14:13,626 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 301 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=269, Invalid=1137, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 11:14:13,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20705 states. [2019-12-07 11:14:13,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20705 to 9977. [2019-12-07 11:14:13,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9977 states. [2019-12-07 11:14:13,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9977 states to 9977 states and 32108 transitions. [2019-12-07 11:14:13,833 INFO L78 Accepts]: Start accepts. Automaton has 9977 states and 32108 transitions. Word has length 54 [2019-12-07 11:14:13,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:13,834 INFO L462 AbstractCegarLoop]: Abstraction has 9977 states and 32108 transitions. [2019-12-07 11:14:13,834 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 11:14:13,834 INFO L276 IsEmpty]: Start isEmpty. Operand 9977 states and 32108 transitions. [2019-12-07 11:14:13,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:14:13,842 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:13,842 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:13,842 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:13,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:13,843 INFO L82 PathProgramCache]: Analyzing trace with hash -232865060, now seen corresponding path program 3 times [2019-12-07 11:14:13,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:13,843 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555564646] [2019-12-07 11:14:13,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:13,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:14,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:14,077 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555564646] [2019-12-07 11:14:14,077 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:14,077 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:14:14,077 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157271051] [2019-12-07 11:14:14,078 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 11:14:14,078 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:14,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 11:14:14,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:14:14,078 INFO L87 Difference]: Start difference. First operand 9977 states and 32108 transitions. Second operand 14 states. [2019-12-07 11:14:15,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:15,595 INFO L93 Difference]: Finished difference Result 24194 states and 75326 transitions. [2019-12-07 11:14:15,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 11:14:15,595 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-07 11:14:15,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:15,618 INFO L225 Difference]: With dead ends: 24194 [2019-12-07 11:14:15,618 INFO L226 Difference]: Without dead ends: 20719 [2019-12-07 11:14:15,619 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=759, Unknown=0, NotChecked=0, Total=930 [2019-12-07 11:14:15,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20719 states. [2019-12-07 11:14:15,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20719 to 9979. [2019-12-07 11:14:15,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9979 states. [2019-12-07 11:14:15,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9979 states to 9979 states and 32104 transitions. [2019-12-07 11:14:15,841 INFO L78 Accepts]: Start accepts. Automaton has 9979 states and 32104 transitions. Word has length 54 [2019-12-07 11:14:15,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:15,841 INFO L462 AbstractCegarLoop]: Abstraction has 9979 states and 32104 transitions. [2019-12-07 11:14:15,841 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 11:14:15,841 INFO L276 IsEmpty]: Start isEmpty. Operand 9979 states and 32104 transitions. [2019-12-07 11:14:15,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:14:15,849 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:15,849 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:15,849 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:15,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:15,850 INFO L82 PathProgramCache]: Analyzing trace with hash -84060940, now seen corresponding path program 4 times [2019-12-07 11:14:15,850 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:15,850 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209124897] [2019-12-07 11:14:15,850 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:15,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:15,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:15,932 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209124897] [2019-12-07 11:14:15,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:15,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:14:15,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473656904] [2019-12-07 11:14:15,933 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:14:15,933 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:15,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:14:15,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:14:15,933 INFO L87 Difference]: Start difference. First operand 9979 states and 32104 transitions. Second operand 7 states. [2019-12-07 11:14:16,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:16,179 INFO L93 Difference]: Finished difference Result 25156 states and 79247 transitions. [2019-12-07 11:14:16,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:14:16,179 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 11:14:16,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:16,201 INFO L225 Difference]: With dead ends: 25156 [2019-12-07 11:14:16,201 INFO L226 Difference]: Without dead ends: 19940 [2019-12-07 11:14:16,202 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:14:16,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19940 states. [2019-12-07 11:14:16,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19940 to 12414. [2019-12-07 11:14:16,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12414 states. [2019-12-07 11:14:16,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12414 states to 12414 states and 39939 transitions. [2019-12-07 11:14:16,429 INFO L78 Accepts]: Start accepts. Automaton has 12414 states and 39939 transitions. Word has length 54 [2019-12-07 11:14:16,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:16,429 INFO L462 AbstractCegarLoop]: Abstraction has 12414 states and 39939 transitions. [2019-12-07 11:14:16,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:14:16,429 INFO L276 IsEmpty]: Start isEmpty. Operand 12414 states and 39939 transitions. [2019-12-07 11:14:16,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:14:16,441 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:16,441 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:16,441 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:16,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:16,442 INFO L82 PathProgramCache]: Analyzing trace with hash -535645294, now seen corresponding path program 5 times [2019-12-07 11:14:16,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:16,442 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [755978756] [2019-12-07 11:14:16,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:16,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:16,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:16,470 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [755978756] [2019-12-07 11:14:16,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:16,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:14:16,470 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157494392] [2019-12-07 11:14:16,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:14:16,471 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:16,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:14:16,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:14:16,471 INFO L87 Difference]: Start difference. First operand 12414 states and 39939 transitions. Second operand 3 states. [2019-12-07 11:14:16,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:16,500 INFO L93 Difference]: Finished difference Result 9359 states and 29418 transitions. [2019-12-07 11:14:16,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:14:16,501 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 11:14:16,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:16,512 INFO L225 Difference]: With dead ends: 9359 [2019-12-07 11:14:16,512 INFO L226 Difference]: Without dead ends: 9359 [2019-12-07 11:14:16,512 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:14:16,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9359 states. [2019-12-07 11:14:16,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9359 to 8943. [2019-12-07 11:14:16,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8943 states. [2019-12-07 11:14:16,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8943 states to 8943 states and 28113 transitions. [2019-12-07 11:14:16,640 INFO L78 Accepts]: Start accepts. Automaton has 8943 states and 28113 transitions. Word has length 54 [2019-12-07 11:14:16,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:16,640 INFO L462 AbstractCegarLoop]: Abstraction has 8943 states and 28113 transitions. [2019-12-07 11:14:16,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:14:16,640 INFO L276 IsEmpty]: Start isEmpty. Operand 8943 states and 28113 transitions. [2019-12-07 11:14:16,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:16,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:16,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:16,648 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:16,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:16,648 INFO L82 PathProgramCache]: Analyzing trace with hash 915079797, now seen corresponding path program 1 times [2019-12-07 11:14:16,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:16,648 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509423221] [2019-12-07 11:14:16,648 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:16,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:16,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:16,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1509423221] [2019-12-07 11:14:16,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:16,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 11:14:16,834 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002595817] [2019-12-07 11:14:16,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 11:14:16,834 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:16,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 11:14:16,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:14:16,835 INFO L87 Difference]: Start difference. First operand 8943 states and 28113 transitions. Second operand 13 states. [2019-12-07 11:14:19,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:19,175 INFO L93 Difference]: Finished difference Result 31788 states and 96353 transitions. [2019-12-07 11:14:19,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 11:14:19,175 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2019-12-07 11:14:19,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:19,198 INFO L225 Difference]: With dead ends: 31788 [2019-12-07 11:14:19,199 INFO L226 Difference]: Without dead ends: 19816 [2019-12-07 11:14:19,199 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 460 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=340, Invalid=1552, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 11:14:19,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19816 states. [2019-12-07 11:14:19,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19816 to 10918. [2019-12-07 11:14:19,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10918 states. [2019-12-07 11:14:19,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10918 states to 10918 states and 34017 transitions. [2019-12-07 11:14:19,400 INFO L78 Accepts]: Start accepts. Automaton has 10918 states and 34017 transitions. Word has length 55 [2019-12-07 11:14:19,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:19,400 INFO L462 AbstractCegarLoop]: Abstraction has 10918 states and 34017 transitions. [2019-12-07 11:14:19,400 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 11:14:19,400 INFO L276 IsEmpty]: Start isEmpty. Operand 10918 states and 34017 transitions. [2019-12-07 11:14:19,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:19,410 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:19,410 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:19,410 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:19,410 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:19,410 INFO L82 PathProgramCache]: Analyzing trace with hash -1003034569, now seen corresponding path program 2 times [2019-12-07 11:14:19,410 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:19,410 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [428953823] [2019-12-07 11:14:19,410 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:19,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:19,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:19,681 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [428953823] [2019-12-07 11:14:19,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:19,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:14:19,681 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936336188] [2019-12-07 11:14:19,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:14:19,681 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:19,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:14:19,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:14:19,682 INFO L87 Difference]: Start difference. First operand 10918 states and 34017 transitions. Second operand 15 states. [2019-12-07 11:14:23,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:23,770 INFO L93 Difference]: Finished difference Result 22384 states and 68466 transitions. [2019-12-07 11:14:23,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 11:14:23,771 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 55 [2019-12-07 11:14:23,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:23,800 INFO L225 Difference]: With dead ends: 22384 [2019-12-07 11:14:23,800 INFO L226 Difference]: Without dead ends: 16488 [2019-12-07 11:14:23,801 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 645 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=368, Invalid=1984, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 11:14:23,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16488 states. [2019-12-07 11:14:23,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16488 to 12389. [2019-12-07 11:14:23,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12389 states. [2019-12-07 11:14:24,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12389 states to 12389 states and 38135 transitions. [2019-12-07 11:14:24,010 INFO L78 Accepts]: Start accepts. Automaton has 12389 states and 38135 transitions. Word has length 55 [2019-12-07 11:14:24,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:24,010 INFO L462 AbstractCegarLoop]: Abstraction has 12389 states and 38135 transitions. [2019-12-07 11:14:24,010 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:14:24,010 INFO L276 IsEmpty]: Start isEmpty. Operand 12389 states and 38135 transitions. [2019-12-07 11:14:24,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:24,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:24,022 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:24,022 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:24,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:24,022 INFO L82 PathProgramCache]: Analyzing trace with hash -367516305, now seen corresponding path program 3 times [2019-12-07 11:14:24,022 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:24,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411111411] [2019-12-07 11:14:24,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:24,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:24,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:24,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411111411] [2019-12-07 11:14:24,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:24,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:14:24,294 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602362677] [2019-12-07 11:14:24,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:14:24,294 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:24,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:14:24,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:14:24,295 INFO L87 Difference]: Start difference. First operand 12389 states and 38135 transitions. Second operand 16 states. [2019-12-07 11:14:26,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:26,376 INFO L93 Difference]: Finished difference Result 18645 states and 56467 transitions. [2019-12-07 11:14:26,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 11:14:26,377 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 55 [2019-12-07 11:14:26,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:26,393 INFO L225 Difference]: With dead ends: 18645 [2019-12-07 11:14:26,394 INFO L226 Difference]: Without dead ends: 15950 [2019-12-07 11:14:26,394 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 423 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=259, Invalid=1463, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 11:14:26,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15950 states. [2019-12-07 11:14:26,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15950 to 12387. [2019-12-07 11:14:26,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12387 states. [2019-12-07 11:14:26,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12387 states to 12387 states and 38074 transitions. [2019-12-07 11:14:26,585 INFO L78 Accepts]: Start accepts. Automaton has 12387 states and 38074 transitions. Word has length 55 [2019-12-07 11:14:26,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:26,585 INFO L462 AbstractCegarLoop]: Abstraction has 12387 states and 38074 transitions. [2019-12-07 11:14:26,585 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:14:26,585 INFO L276 IsEmpty]: Start isEmpty. Operand 12387 states and 38074 transitions. [2019-12-07 11:14:26,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:26,596 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:26,596 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:26,596 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:26,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:26,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1545411663, now seen corresponding path program 4 times [2019-12-07 11:14:26,597 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:26,597 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411886830] [2019-12-07 11:14:26,597 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:26,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:26,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:26,746 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411886830] [2019-12-07 11:14:26,746 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:26,746 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:14:26,746 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182622660] [2019-12-07 11:14:26,746 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:14:26,746 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:26,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:14:26,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:14:26,747 INFO L87 Difference]: Start difference. First operand 12387 states and 38074 transitions. Second operand 11 states. [2019-12-07 11:14:27,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:27,297 INFO L93 Difference]: Finished difference Result 17126 states and 52528 transitions. [2019-12-07 11:14:27,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 11:14:27,297 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 55 [2019-12-07 11:14:27,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:27,316 INFO L225 Difference]: With dead ends: 17126 [2019-12-07 11:14:27,316 INFO L226 Difference]: Without dead ends: 16816 [2019-12-07 11:14:27,316 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=95, Invalid=411, Unknown=0, NotChecked=0, Total=506 [2019-12-07 11:14:27,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16816 states. [2019-12-07 11:14:27,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16816 to 15070. [2019-12-07 11:14:27,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15070 states. [2019-12-07 11:14:27,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15070 states to 15070 states and 46271 transitions. [2019-12-07 11:14:27,535 INFO L78 Accepts]: Start accepts. Automaton has 15070 states and 46271 transitions. Word has length 55 [2019-12-07 11:14:27,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:27,535 INFO L462 AbstractCegarLoop]: Abstraction has 15070 states and 46271 transitions. [2019-12-07 11:14:27,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:14:27,535 INFO L276 IsEmpty]: Start isEmpty. Operand 15070 states and 46271 transitions. [2019-12-07 11:14:27,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:27,548 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:27,548 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:27,549 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:27,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:27,549 INFO L82 PathProgramCache]: Analyzing trace with hash 1540693839, now seen corresponding path program 5 times [2019-12-07 11:14:27,549 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:27,549 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822048827] [2019-12-07 11:14:27,549 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:27,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:27,647 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:27,647 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822048827] [2019-12-07 11:14:27,648 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:27,648 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:14:27,648 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1684835346] [2019-12-07 11:14:27,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:14:27,648 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:27,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:14:27,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:14:27,648 INFO L87 Difference]: Start difference. First operand 15070 states and 46271 transitions. Second operand 10 states. [2019-12-07 11:14:28,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:28,366 INFO L93 Difference]: Finished difference Result 28127 states and 85879 transitions. [2019-12-07 11:14:28,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 11:14:28,366 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 55 [2019-12-07 11:14:28,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:28,386 INFO L225 Difference]: With dead ends: 28127 [2019-12-07 11:14:28,386 INFO L226 Difference]: Without dead ends: 19108 [2019-12-07 11:14:28,387 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 262 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=236, Invalid=886, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 11:14:28,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19108 states. [2019-12-07 11:14:28,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19108 to 12258. [2019-12-07 11:14:28,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12258 states. [2019-12-07 11:14:28,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12258 states to 12258 states and 37508 transitions. [2019-12-07 11:14:28,595 INFO L78 Accepts]: Start accepts. Automaton has 12258 states and 37508 transitions. Word has length 55 [2019-12-07 11:14:28,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:28,595 INFO L462 AbstractCegarLoop]: Abstraction has 12258 states and 37508 transitions. [2019-12-07 11:14:28,595 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:14:28,596 INFO L276 IsEmpty]: Start isEmpty. Operand 12258 states and 37508 transitions. [2019-12-07 11:14:28,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:28,605 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:28,606 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:28,606 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:28,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:28,606 INFO L82 PathProgramCache]: Analyzing trace with hash 1318747633, now seen corresponding path program 6 times [2019-12-07 11:14:28,606 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:28,606 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489166505] [2019-12-07 11:14:28,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:28,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:28,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:28,916 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489166505] [2019-12-07 11:14:28,916 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:28,916 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 11:14:28,917 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667220350] [2019-12-07 11:14:28,917 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 11:14:28,917 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:28,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 11:14:28,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2019-12-07 11:14:28,917 INFO L87 Difference]: Start difference. First operand 12258 states and 37508 transitions. Second operand 17 states. [2019-12-07 11:14:33,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:33,540 INFO L93 Difference]: Finished difference Result 22716 states and 68735 transitions. [2019-12-07 11:14:33,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 11:14:33,541 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 55 [2019-12-07 11:14:33,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:33,564 INFO L225 Difference]: With dead ends: 22716 [2019-12-07 11:14:33,564 INFO L226 Difference]: Without dead ends: 22478 [2019-12-07 11:14:33,565 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 753 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=423, Invalid=2547, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 11:14:33,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22478 states. [2019-12-07 11:14:33,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22478 to 13962. [2019-12-07 11:14:33,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13962 states. [2019-12-07 11:14:33,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13962 states to 13962 states and 42579 transitions. [2019-12-07 11:14:33,822 INFO L78 Accepts]: Start accepts. Automaton has 13962 states and 42579 transitions. Word has length 55 [2019-12-07 11:14:33,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:33,822 INFO L462 AbstractCegarLoop]: Abstraction has 13962 states and 42579 transitions. [2019-12-07 11:14:33,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 11:14:33,823 INFO L276 IsEmpty]: Start isEmpty. Operand 13962 states and 42579 transitions. [2019-12-07 11:14:33,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:33,835 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:33,835 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:33,836 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:33,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:33,836 INFO L82 PathProgramCache]: Analyzing trace with hash 1314029809, now seen corresponding path program 7 times [2019-12-07 11:14:33,836 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:33,836 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301754262] [2019-12-07 11:14:33,836 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:33,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:33,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:33,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301754262] [2019-12-07 11:14:33,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:33,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:14:33,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [348195923] [2019-12-07 11:14:33,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:14:33,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:33,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:14:33,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:14:33,958 INFO L87 Difference]: Start difference. First operand 13962 states and 42579 transitions. Second operand 11 states. [2019-12-07 11:14:34,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:34,793 INFO L93 Difference]: Finished difference Result 23099 states and 70234 transitions. [2019-12-07 11:14:34,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 11:14:34,793 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 55 [2019-12-07 11:14:34,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:34,812 INFO L225 Difference]: With dead ends: 23099 [2019-12-07 11:14:34,812 INFO L226 Difference]: Without dead ends: 18107 [2019-12-07 11:14:34,813 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=148, Invalid=664, Unknown=0, NotChecked=0, Total=812 [2019-12-07 11:14:34,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18107 states. [2019-12-07 11:14:34,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18107 to 11948. [2019-12-07 11:14:34,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11948 states. [2019-12-07 11:14:35,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11948 states to 11948 states and 36539 transitions. [2019-12-07 11:14:35,012 INFO L78 Accepts]: Start accepts. Automaton has 11948 states and 36539 transitions. Word has length 55 [2019-12-07 11:14:35,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:35,012 INFO L462 AbstractCegarLoop]: Abstraction has 11948 states and 36539 transitions. [2019-12-07 11:14:35,013 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:14:35,013 INFO L276 IsEmpty]: Start isEmpty. Operand 11948 states and 36539 transitions. [2019-12-07 11:14:35,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:35,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:35,023 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:35,023 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:35,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:35,023 INFO L82 PathProgramCache]: Analyzing trace with hash -767893923, now seen corresponding path program 8 times [2019-12-07 11:14:35,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:35,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847400560] [2019-12-07 11:14:35,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:35,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:14:35,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:14:35,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847400560] [2019-12-07 11:14:35,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:14:35,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:14:35,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423674914] [2019-12-07 11:14:35,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:14:35,124 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:14:35,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:14:35,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:14:35,125 INFO L87 Difference]: Start difference. First operand 11948 states and 36539 transitions. Second operand 12 states. [2019-12-07 11:14:35,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:14:35,902 INFO L93 Difference]: Finished difference Result 18409 states and 55758 transitions. [2019-12-07 11:14:35,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 11:14:35,902 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 55 [2019-12-07 11:14:35,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:14:35,933 INFO L225 Difference]: With dead ends: 18409 [2019-12-07 11:14:35,933 INFO L226 Difference]: Without dead ends: 18019 [2019-12-07 11:14:35,933 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 11:14:35,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18019 states. [2019-12-07 11:14:36,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18019 to 11716. [2019-12-07 11:14:36,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11716 states. [2019-12-07 11:14:36,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11716 states to 11716 states and 35887 transitions. [2019-12-07 11:14:36,132 INFO L78 Accepts]: Start accepts. Automaton has 11716 states and 35887 transitions. Word has length 55 [2019-12-07 11:14:36,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:14:36,132 INFO L462 AbstractCegarLoop]: Abstraction has 11716 states and 35887 transitions. [2019-12-07 11:14:36,132 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:14:36,132 INFO L276 IsEmpty]: Start isEmpty. Operand 11716 states and 35887 transitions. [2019-12-07 11:14:36,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:14:36,142 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:14:36,142 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:14:36,142 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:14:36,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:14:36,142 INFO L82 PathProgramCache]: Analyzing trace with hash -238462213, now seen corresponding path program 9 times [2019-12-07 11:14:36,143 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:14:36,143 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030444630] [2019-12-07 11:14:36,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:14:36,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:14:36,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:14:36,203 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:14:36,203 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:14:36,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] ULTIMATE.startENTRY-->L823: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t424~0.base_40| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t424~0.base_40|) |v_ULTIMATE.start_main_~#t424~0.offset_28| 0)) |v_#memory_int_17|) (= 0 v_~__unbuffered_p2_EAX~0_40) (= 0 v_~__unbuffered_p0_EAX~0_50) (= 0 v_~x$w_buff0~0_407) (= 0 v_~weak$$choice0~0_14) (= v_~__unbuffered_cnt~0_133 0) (= 0 v_~x$w_buff0_used~0_981) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~x$r_buff1_thd1~0_402 0) (= 0 v_~x$w_buff1~0_314) (= v_~x$flush_delayed~0_48 0) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x~0_233) (= 0 v_~x$r_buff0_thd2~0_329) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x$r_buff0_thd3~0_134) (= v_~__unbuffered_p1_EAX~0_219 0) (= 0 v_~x$w_buff1_used~0_593) (= v_~z~0_23 0) (= 0 |v_#NULL.base_4|) (= v_~x$r_buff0_thd1~0_388 0) (= v_~main$tmp_guard1~0_38 0) (= 0 v_~x$read_delayed_var~0.offset_8) (= 0 v_~x$read_delayed~0_7) (= v_~x$mem_tmp~0_17 0) (= v_~main$tmp_guard0~0_20 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t424~0.base_40|)) (= v_~x$r_buff0_thd0~0_141 0) (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t424~0.base_40| 1)) (= 0 |v_ULTIMATE.start_main_~#t424~0.offset_28|) (= |v_#NULL.offset_4| 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t424~0.base_40|) (= v_~weak$$choice2~0_186 0) (= v_~y~0_68 0) (= 0 v_~x$r_buff1_thd3~0_275) (= v_~__unbuffered_p2_EBX~0_40 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t424~0.base_40| 4) |v_#length_21|) (= v_~x$r_buff1_thd0~0_274 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_407, ULTIMATE.start_main_~#t425~0.offset=|v_ULTIMATE.start_main_~#t425~0.offset_23|, ~x$flush_delayed~0=v_~x$flush_delayed~0_48, ULTIMATE.start_main_~#t426~0.base=|v_ULTIMATE.start_main_~#t426~0.base_19|, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_402, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_134, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_43|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_50, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_219, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_40, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_141, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ~x$w_buff1~0=v_~x$w_buff1~0_314, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_593, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ULTIMATE.start_main_~#t426~0.offset=|v_ULTIMATE.start_main_~#t426~0.offset_16|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_133, ~x~0=v_~x~0_233, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_388, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_73|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_275, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ~x$mem_tmp~0=v_~x$mem_tmp~0_17, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_127|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_49|, ULTIMATE.start_main_~#t424~0.offset=|v_ULTIMATE.start_main_~#t424~0.offset_28|, ULTIMATE.start_main_~#t425~0.base=|v_ULTIMATE.start_main_~#t425~0.base_32|, ~y~0=v_~y~0_68, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_19|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_20, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_274, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_329, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_981, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_77|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_10|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_186, ULTIMATE.start_main_~#t424~0.base=|v_ULTIMATE.start_main_~#t424~0.base_40|, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_~#t425~0.offset, ~x$flush_delayed~0, ULTIMATE.start_main_~#t426~0.base, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_~#t426~0.offset, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t424~0.offset, ULTIMATE.start_main_~#t425~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t424~0.base, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:14:36,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L823-1-->L825: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t425~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t425~0.base_11|) |v_ULTIMATE.start_main_~#t425~0.offset_10| 1)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t425~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t425~0.offset_10|) (= (select |v_#valid_38| |v_ULTIMATE.start_main_~#t425~0.base_11|) 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t425~0.base_11| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t425~0.base_11|)) (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t425~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t425~0.offset=|v_ULTIMATE.start_main_~#t425~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t425~0.base=|v_ULTIMATE.start_main_~#t425~0.base_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t425~0.offset, ULTIMATE.start_main_~#t425~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 11:14:36,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P1ENTRY-->L5-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9)) (= v_~x$w_buff1_used~0_59 v_~x$w_buff0_used~0_123) (= (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_122 256))) (not (= 0 (mod v_~x$w_buff1_used~0_59 256))))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|) (= 1 v_~x$w_buff0~0_27) (= v_P1Thread1of1ForFork0_~arg.offset_7 |v_P1Thread1of1ForFork0_#in~arg.offset_9|) (= 1 v_~x$w_buff0_used~0_122) (= v_~x$w_buff0~0_28 v_~x$w_buff1~0_20) (= v_P1Thread1of1ForFork0_~arg.base_7 |v_P1Thread1of1ForFork0_#in~arg.base_9|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_28, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_9|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_9|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_123} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_27, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_7, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_7, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_9|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|, ~x$w_buff1~0=v_~x$w_buff1~0_20, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_9|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_59, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_122} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:14:36,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L825-1-->L827: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t426~0.offset_10|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t426~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t426~0.base_11|)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t426~0.base_11| 1)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t426~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t426~0.base_11|) |v_ULTIMATE.start_main_~#t426~0.offset_10| 2))) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t426~0.base_11| 4)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t426~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t426~0.base=|v_ULTIMATE.start_main_~#t426~0.base_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t426~0.offset=|v_ULTIMATE.start_main_~#t426~0.offset_10|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t426~0.base, #length, ULTIMATE.start_main_~#t426~0.offset, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 11:14:36,208 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L800-2-->L800-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-674348962 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-674348962 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite32_Out-674348962| ~x~0_In-674348962) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork1_#t~ite32_Out-674348962| ~x$w_buff1~0_In-674348962)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-674348962, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-674348962, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-674348962, ~x~0=~x~0_In-674348962} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-674348962|, ~x$w_buff1~0=~x$w_buff1~0_In-674348962, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-674348962, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-674348962, ~x~0=~x~0_In-674348962} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 11:14:36,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In-1324402219 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1324402219 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite28_Out-1324402219| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite28_Out-1324402219| ~x$w_buff0_used~0_In-1324402219)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1324402219, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1324402219} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1324402219, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-1324402219|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1324402219} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 11:14:36,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-1771177456 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1771177456 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-1771177456 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-1771177456 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1771177456 |P1Thread1of1ForFork0_#t~ite29_Out-1771177456|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork0_#t~ite29_Out-1771177456|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1771177456, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1771177456, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1771177456, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1771177456} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1771177456, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1771177456, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1771177456, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-1771177456|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1771177456} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:14:36,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L780-->L781: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1022741975 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1022741975 256))) (.cse2 (= ~x$r_buff0_thd2~0_In-1022741975 ~x$r_buff0_thd2~0_Out-1022741975))) (or (and (not .cse0) (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out-1022741975)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1022741975, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1022741975} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-1022741975|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1022741975, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1022741975} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:14:36,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L781-->L781-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In1088328367 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1088328367 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In1088328367 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1088328367 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite31_Out1088328367| 0)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out1088328367| ~x$r_buff1_thd2~0_In1088328367) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1088328367, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1088328367, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1088328367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1088328367} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out1088328367|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1088328367, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1088328367, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1088328367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1088328367} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:14:36,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L781-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_51 |v_P1Thread1of1ForFork0_#t~ite31_32|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_31|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_51, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 11:14:36,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L744-->L744-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2006538822 256)))) (or (and (not .cse0) (= ~x$w_buff0_used~0_In-2006538822 |P0Thread1of1ForFork2_#t~ite15_Out-2006538822|) (= |P0Thread1of1ForFork2_#t~ite14_In-2006538822| |P0Thread1of1ForFork2_#t~ite14_Out-2006538822|)) (and (= ~x$w_buff0_used~0_In-2006538822 |P0Thread1of1ForFork2_#t~ite14_Out-2006538822|) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-2006538822 256) 0))) (or (and (= (mod ~x$r_buff1_thd1~0_In-2006538822 256) 0) .cse1) (and (= (mod ~x$w_buff1_used~0_In-2006538822 256) 0) .cse1) (= (mod ~x$w_buff0_used~0_In-2006538822 256) 0))) (= |P0Thread1of1ForFork2_#t~ite15_Out-2006538822| |P0Thread1of1ForFork2_#t~ite14_Out-2006538822|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2006538822, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2006538822, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2006538822, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_In-2006538822|, ~weak$$choice2~0=~weak$$choice2~0_In-2006538822, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2006538822} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2006538822, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2006538822, P0Thread1of1ForFork2_#t~ite15=|P0Thread1of1ForFork2_#t~ite15_Out-2006538822|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2006538822, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_Out-2006538822|, ~weak$$choice2~0=~weak$$choice2~0_In-2006538822, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2006538822} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite15, P0Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:14:36,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L745-->L745-8: Formula: (let ((.cse4 (= 0 (mod ~x$r_buff1_thd1~0_In1037036659 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1037036659 256))) (.cse0 (= |P0Thread1of1ForFork2_#t~ite17_Out1037036659| |P0Thread1of1ForFork2_#t~ite18_Out1037036659|)) (.cse3 (= (mod ~x$w_buff0_used~0_In1037036659 256) 0)) (.cse5 (= 0 (mod ~weak$$choice2~0_In1037036659 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In1037036659 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite16_In1037036659| |P0Thread1of1ForFork2_#t~ite16_Out1037036659|) (or (and .cse0 (or (and .cse1 .cse2) .cse3 (and .cse1 .cse4)) (= ~x$w_buff1_used~0_In1037036659 |P0Thread1of1ForFork2_#t~ite17_Out1037036659|) .cse5) (and (not .cse5) (= |P0Thread1of1ForFork2_#t~ite17_In1037036659| |P0Thread1of1ForFork2_#t~ite17_Out1037036659|) (= ~x$w_buff1_used~0_In1037036659 |P0Thread1of1ForFork2_#t~ite18_Out1037036659|)))) (let ((.cse6 (not .cse1))) (and (or .cse6 (not .cse4)) (or .cse6 (not .cse2)) .cse0 (not .cse3) (= |P0Thread1of1ForFork2_#t~ite17_Out1037036659| |P0Thread1of1ForFork2_#t~ite16_Out1037036659|) (= 0 |P0Thread1of1ForFork2_#t~ite16_Out1037036659|) .cse5)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1037036659, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In1037036659|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1037036659, P0Thread1of1ForFork2_#t~ite16=|P0Thread1of1ForFork2_#t~ite16_In1037036659|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1037036659, ~weak$$choice2~0=~weak$$choice2~0_In1037036659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1037036659} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1037036659, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out1037036659|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out1037036659|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1037036659, P0Thread1of1ForFork2_#t~ite16=|P0Thread1of1ForFork2_#t~ite16_Out1037036659|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1037036659, ~weak$$choice2~0=~weak$$choice2~0_In1037036659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1037036659} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17, P0Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 11:14:36,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L745-8-->L747: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite18_53| v_~x$w_buff1_used~0_577) (not (= 0 (mod v_~weak$$choice2~0_176 256))) (= v_~x$r_buff0_thd1~0_373 v_~x$r_buff0_thd1~0_372)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_373, P0Thread1of1ForFork2_#t~ite18=|v_P0Thread1of1ForFork2_#t~ite18_53|, ~weak$$choice2~0=v_~weak$$choice2~0_176} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_37|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_372, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_25|, P0Thread1of1ForFork2_#t~ite18=|v_P0Thread1of1ForFork2_#t~ite18_52|, P0Thread1of1ForFork2_#t~ite17=|v_P0Thread1of1ForFork2_#t~ite17_46|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_577, P0Thread1of1ForFork2_#t~ite16=|v_P0Thread1of1ForFork2_#t~ite16_42|, ~weak$$choice2~0=v_~weak$$choice2~0_176, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_13|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite16, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 11:14:36,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L800-4-->L801: Formula: (= v_~x~0_36 |v_P2Thread1of1ForFork1_#t~ite32_12|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_12|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_11|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_19|, ~x~0=v_~x~0_36} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 11:14:36,213 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L749-->L757: Formula: (and (= v_~x$flush_delayed~0_13 0) (not (= (mod v_~x$flush_delayed~0_14 256) 0)) (= v_~x$mem_tmp~0_5 v_~x~0_56) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_14, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~x$mem_tmp~0=v_~x$mem_tmp~0_5} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~x$mem_tmp~0=v_~x$mem_tmp~0_5, ~x~0=v_~x~0_56} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 11:14:36,213 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L801-->L801-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In384433831 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In384433831 256) 0))) (or (and (= ~x$w_buff0_used~0_In384433831 |P2Thread1of1ForFork1_#t~ite34_Out384433831|) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite34_Out384433831| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In384433831, ~x$w_buff0_used~0=~x$w_buff0_used~0_In384433831} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out384433831|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In384433831, ~x$w_buff0_used~0=~x$w_buff0_used~0_In384433831} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 11:14:36,213 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L802-->L802-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-1078624355 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-1078624355 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In-1078624355 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1078624355 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite35_Out-1078624355| 0)) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite35_Out-1078624355| ~x$w_buff1_used~0_In-1078624355) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1078624355, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1078624355, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1078624355, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1078624355} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-1078624355|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1078624355, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1078624355, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1078624355, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1078624355} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 11:14:36,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In-1663647431 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1663647431 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out-1663647431| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1663647431| ~x$r_buff0_thd3~0_In-1663647431) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1663647431, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1663647431} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-1663647431|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1663647431, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1663647431} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 11:14:36,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L804-->L804-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In1167892617 256))) (.cse2 (= (mod ~x$r_buff1_thd3~0_In1167892617 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In1167892617 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1167892617 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite37_Out1167892617| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite37_Out1167892617| ~x$r_buff1_thd3~0_In1167892617)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1167892617, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1167892617, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1167892617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1167892617} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1167892617|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1167892617, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1167892617, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1167892617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1167892617} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 11:14:36,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L804-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82) (= |v_P2Thread1of1ForFork1_#t~ite37_40| v_~x$r_buff1_thd3~0_144)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_40|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_39|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_144, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 11:14:36,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L827-1-->L833: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:14:36,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L833-2-->L833-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite42_Out1256588522| |ULTIMATE.start_main_#t~ite41_Out1256588522|)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1256588522 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1256588522 256) 0))) (or (and (not .cse0) .cse1 (= ~x$w_buff1~0_In1256588522 |ULTIMATE.start_main_#t~ite41_Out1256588522|) (not .cse2)) (and .cse1 (or .cse2 .cse0) (= |ULTIMATE.start_main_#t~ite41_Out1256588522| ~x~0_In1256588522)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1256588522, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1256588522, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1256588522, ~x~0=~x~0_In1256588522} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1256588522|, ~x$w_buff1~0=~x$w_buff1~0_In1256588522, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1256588522, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1256588522, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out1256588522|, ~x~0=~x~0_In1256588522} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 11:14:36,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L834-->L834-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-693345954 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-693345954 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out-693345954| ~x$w_buff0_used~0_In-693345954) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite43_Out-693345954| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-693345954, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-693345954} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-693345954, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-693345954|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-693345954} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 11:14:36,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L835-->L835-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In729132376 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In729132376 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In729132376 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In729132376 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite44_Out729132376| ~x$w_buff1_used~0_In729132376)) (and (= 0 |ULTIMATE.start_main_#t~ite44_Out729132376|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In729132376, ~x$w_buff1_used~0=~x$w_buff1_used~0_In729132376, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In729132376, ~x$w_buff0_used~0=~x$w_buff0_used~0_In729132376} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In729132376, ~x$w_buff1_used~0=~x$w_buff1_used~0_In729132376, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In729132376, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out729132376|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In729132376} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 11:14:36,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L836-->L836-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-2075959599 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-2075959599 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite45_Out-2075959599|)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-2075959599 |ULTIMATE.start_main_#t~ite45_Out-2075959599|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2075959599, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2075959599} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2075959599, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-2075959599|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2075959599} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 11:14:36,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In423573194 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In423573194 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In423573194 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In423573194 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out423573194|)) (and (or .cse1 .cse0) (= ~x$r_buff1_thd0~0_In423573194 |ULTIMATE.start_main_#t~ite46_Out423573194|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In423573194, ~x$w_buff1_used~0=~x$w_buff1_used~0_In423573194, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In423573194, ~x$w_buff0_used~0=~x$w_buff0_used~0_In423573194} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In423573194, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out423573194|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In423573194, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In423573194, ~x$w_buff0_used~0=~x$w_buff0_used~0_In423573194} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 11:14:36,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L837-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_22 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p1_EAX~0_205 0) (= v_~__unbuffered_p2_EBX~0_21 0) (= 0 v_~__unbuffered_p0_EAX~0_34))) 1 0)) 0 1) v_~main$tmp_guard1~0_22) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~x$r_buff1_thd0~0_258 |v_ULTIMATE.start_main_#t~ite46_45|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_205, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_45|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_205, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_44|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_258, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:14:36,267 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:14:36 BasicIcfg [2019-12-07 11:14:36,267 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:14:36,268 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:14:36,268 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:14:36,268 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:14:36,268 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:12:55" (3/4) ... [2019-12-07 11:14:36,270 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:14:36,270 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] ULTIMATE.startENTRY-->L823: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t424~0.base_40| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t424~0.base_40|) |v_ULTIMATE.start_main_~#t424~0.offset_28| 0)) |v_#memory_int_17|) (= 0 v_~__unbuffered_p2_EAX~0_40) (= 0 v_~__unbuffered_p0_EAX~0_50) (= 0 v_~x$w_buff0~0_407) (= 0 v_~weak$$choice0~0_14) (= v_~__unbuffered_cnt~0_133 0) (= 0 v_~x$w_buff0_used~0_981) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~x$r_buff1_thd1~0_402 0) (= 0 v_~x$w_buff1~0_314) (= v_~x$flush_delayed~0_48 0) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x~0_233) (= 0 v_~x$r_buff0_thd2~0_329) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x$r_buff0_thd3~0_134) (= v_~__unbuffered_p1_EAX~0_219 0) (= 0 v_~x$w_buff1_used~0_593) (= v_~z~0_23 0) (= 0 |v_#NULL.base_4|) (= v_~x$r_buff0_thd1~0_388 0) (= v_~main$tmp_guard1~0_38 0) (= 0 v_~x$read_delayed_var~0.offset_8) (= 0 v_~x$read_delayed~0_7) (= v_~x$mem_tmp~0_17 0) (= v_~main$tmp_guard0~0_20 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t424~0.base_40|)) (= v_~x$r_buff0_thd0~0_141 0) (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t424~0.base_40| 1)) (= 0 |v_ULTIMATE.start_main_~#t424~0.offset_28|) (= |v_#NULL.offset_4| 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t424~0.base_40|) (= v_~weak$$choice2~0_186 0) (= v_~y~0_68 0) (= 0 v_~x$r_buff1_thd3~0_275) (= v_~__unbuffered_p2_EBX~0_40 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t424~0.base_40| 4) |v_#length_21|) (= v_~x$r_buff1_thd0~0_274 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_407, ULTIMATE.start_main_~#t425~0.offset=|v_ULTIMATE.start_main_~#t425~0.offset_23|, ~x$flush_delayed~0=v_~x$flush_delayed~0_48, ULTIMATE.start_main_~#t426~0.base=|v_ULTIMATE.start_main_~#t426~0.base_19|, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_402, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_134, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_43|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_50, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_219, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_40, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_141, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ~x$w_buff1~0=v_~x$w_buff1~0_314, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_593, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ULTIMATE.start_main_~#t426~0.offset=|v_ULTIMATE.start_main_~#t426~0.offset_16|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_133, ~x~0=v_~x~0_233, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_388, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_73|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_275, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ~x$mem_tmp~0=v_~x$mem_tmp~0_17, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_127|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_49|, ULTIMATE.start_main_~#t424~0.offset=|v_ULTIMATE.start_main_~#t424~0.offset_28|, ULTIMATE.start_main_~#t425~0.base=|v_ULTIMATE.start_main_~#t425~0.base_32|, ~y~0=v_~y~0_68, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_19|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_20, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_274, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_329, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_981, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_77|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_10|, ~z~0=v_~z~0_23, ~weak$$choice2~0=v_~weak$$choice2~0_186, ULTIMATE.start_main_~#t424~0.base=|v_ULTIMATE.start_main_~#t424~0.base_40|, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_~#t425~0.offset, ~x$flush_delayed~0, ULTIMATE.start_main_~#t426~0.base, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_~#t426~0.offset, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t424~0.offset, ULTIMATE.start_main_~#t425~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t424~0.base, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:14:36,270 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L823-1-->L825: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t425~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t425~0.base_11|) |v_ULTIMATE.start_main_~#t425~0.offset_10| 1)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t425~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t425~0.offset_10|) (= (select |v_#valid_38| |v_ULTIMATE.start_main_~#t425~0.base_11|) 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t425~0.base_11| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t425~0.base_11|)) (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t425~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t425~0.offset=|v_ULTIMATE.start_main_~#t425~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t425~0.base=|v_ULTIMATE.start_main_~#t425~0.base_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t425~0.offset, ULTIMATE.start_main_~#t425~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 11:14:36,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P1ENTRY-->L5-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9)) (= v_~x$w_buff1_used~0_59 v_~x$w_buff0_used~0_123) (= (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_122 256))) (not (= 0 (mod v_~x$w_buff1_used~0_59 256))))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|) (= 1 v_~x$w_buff0~0_27) (= v_P1Thread1of1ForFork0_~arg.offset_7 |v_P1Thread1of1ForFork0_#in~arg.offset_9|) (= 1 v_~x$w_buff0_used~0_122) (= v_~x$w_buff0~0_28 v_~x$w_buff1~0_20) (= v_P1Thread1of1ForFork0_~arg.base_7 |v_P1Thread1of1ForFork0_#in~arg.base_9|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_28, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_9|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_9|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_123} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_27, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_9, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_7, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_7, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_9|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_7|, ~x$w_buff1~0=v_~x$w_buff1~0_20, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_9|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_59, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_122} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:14:36,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L825-1-->L827: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t426~0.offset_10|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t426~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t426~0.base_11|)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t426~0.base_11| 1)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t426~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t426~0.base_11|) |v_ULTIMATE.start_main_~#t426~0.offset_10| 2))) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t426~0.base_11| 4)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t426~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t426~0.base=|v_ULTIMATE.start_main_~#t426~0.base_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t426~0.offset=|v_ULTIMATE.start_main_~#t426~0.offset_10|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t426~0.base, #length, ULTIMATE.start_main_~#t426~0.offset, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 11:14:36,272 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L800-2-->L800-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-674348962 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-674348962 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite32_Out-674348962| ~x~0_In-674348962) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork1_#t~ite32_Out-674348962| ~x$w_buff1~0_In-674348962)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-674348962, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-674348962, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-674348962, ~x~0=~x~0_In-674348962} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-674348962|, ~x$w_buff1~0=~x$w_buff1~0_In-674348962, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-674348962, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-674348962, ~x~0=~x~0_In-674348962} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 11:14:36,273 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In-1324402219 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1324402219 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite28_Out-1324402219| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite28_Out-1324402219| ~x$w_buff0_used~0_In-1324402219)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1324402219, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1324402219} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1324402219, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-1324402219|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1324402219} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 11:14:36,273 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-1771177456 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1771177456 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-1771177456 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-1771177456 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1771177456 |P1Thread1of1ForFork0_#t~ite29_Out-1771177456|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork0_#t~ite29_Out-1771177456|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1771177456, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1771177456, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1771177456, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1771177456} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1771177456, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1771177456, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1771177456, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-1771177456|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1771177456} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:14:36,274 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L780-->L781: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1022741975 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1022741975 256))) (.cse2 (= ~x$r_buff0_thd2~0_In-1022741975 ~x$r_buff0_thd2~0_Out-1022741975))) (or (and (not .cse0) (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out-1022741975)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1022741975, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1022741975} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-1022741975|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1022741975, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1022741975} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:14:36,274 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L781-->L781-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In1088328367 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1088328367 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In1088328367 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1088328367 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite31_Out1088328367| 0)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out1088328367| ~x$r_buff1_thd2~0_In1088328367) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1088328367, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1088328367, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1088328367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1088328367} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out1088328367|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1088328367, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1088328367, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1088328367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1088328367} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:14:36,274 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L781-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_51 |v_P1Thread1of1ForFork0_#t~ite31_32|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_31|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_51, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 11:14:36,275 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L744-->L744-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2006538822 256)))) (or (and (not .cse0) (= ~x$w_buff0_used~0_In-2006538822 |P0Thread1of1ForFork2_#t~ite15_Out-2006538822|) (= |P0Thread1of1ForFork2_#t~ite14_In-2006538822| |P0Thread1of1ForFork2_#t~ite14_Out-2006538822|)) (and (= ~x$w_buff0_used~0_In-2006538822 |P0Thread1of1ForFork2_#t~ite14_Out-2006538822|) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-2006538822 256) 0))) (or (and (= (mod ~x$r_buff1_thd1~0_In-2006538822 256) 0) .cse1) (and (= (mod ~x$w_buff1_used~0_In-2006538822 256) 0) .cse1) (= (mod ~x$w_buff0_used~0_In-2006538822 256) 0))) (= |P0Thread1of1ForFork2_#t~ite15_Out-2006538822| |P0Thread1of1ForFork2_#t~ite14_Out-2006538822|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2006538822, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2006538822, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2006538822, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_In-2006538822|, ~weak$$choice2~0=~weak$$choice2~0_In-2006538822, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2006538822} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2006538822, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2006538822, P0Thread1of1ForFork2_#t~ite15=|P0Thread1of1ForFork2_#t~ite15_Out-2006538822|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2006538822, P0Thread1of1ForFork2_#t~ite14=|P0Thread1of1ForFork2_#t~ite14_Out-2006538822|, ~weak$$choice2~0=~weak$$choice2~0_In-2006538822, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2006538822} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite15, P0Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:14:36,276 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L745-->L745-8: Formula: (let ((.cse4 (= 0 (mod ~x$r_buff1_thd1~0_In1037036659 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1037036659 256))) (.cse0 (= |P0Thread1of1ForFork2_#t~ite17_Out1037036659| |P0Thread1of1ForFork2_#t~ite18_Out1037036659|)) (.cse3 (= (mod ~x$w_buff0_used~0_In1037036659 256) 0)) (.cse5 (= 0 (mod ~weak$$choice2~0_In1037036659 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In1037036659 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite16_In1037036659| |P0Thread1of1ForFork2_#t~ite16_Out1037036659|) (or (and .cse0 (or (and .cse1 .cse2) .cse3 (and .cse1 .cse4)) (= ~x$w_buff1_used~0_In1037036659 |P0Thread1of1ForFork2_#t~ite17_Out1037036659|) .cse5) (and (not .cse5) (= |P0Thread1of1ForFork2_#t~ite17_In1037036659| |P0Thread1of1ForFork2_#t~ite17_Out1037036659|) (= ~x$w_buff1_used~0_In1037036659 |P0Thread1of1ForFork2_#t~ite18_Out1037036659|)))) (let ((.cse6 (not .cse1))) (and (or .cse6 (not .cse4)) (or .cse6 (not .cse2)) .cse0 (not .cse3) (= |P0Thread1of1ForFork2_#t~ite17_Out1037036659| |P0Thread1of1ForFork2_#t~ite16_Out1037036659|) (= 0 |P0Thread1of1ForFork2_#t~ite16_Out1037036659|) .cse5)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1037036659, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In1037036659|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1037036659, P0Thread1of1ForFork2_#t~ite16=|P0Thread1of1ForFork2_#t~ite16_In1037036659|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1037036659, ~weak$$choice2~0=~weak$$choice2~0_In1037036659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1037036659} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1037036659, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out1037036659|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out1037036659|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1037036659, P0Thread1of1ForFork2_#t~ite16=|P0Thread1of1ForFork2_#t~ite16_Out1037036659|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1037036659, ~weak$$choice2~0=~weak$$choice2~0_In1037036659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1037036659} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17, P0Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 11:14:36,276 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L745-8-->L747: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite18_53| v_~x$w_buff1_used~0_577) (not (= 0 (mod v_~weak$$choice2~0_176 256))) (= v_~x$r_buff0_thd1~0_373 v_~x$r_buff0_thd1~0_372)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_373, P0Thread1of1ForFork2_#t~ite18=|v_P0Thread1of1ForFork2_#t~ite18_53|, ~weak$$choice2~0=v_~weak$$choice2~0_176} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_37|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_372, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_25|, P0Thread1of1ForFork2_#t~ite18=|v_P0Thread1of1ForFork2_#t~ite18_52|, P0Thread1of1ForFork2_#t~ite17=|v_P0Thread1of1ForFork2_#t~ite17_46|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_577, P0Thread1of1ForFork2_#t~ite16=|v_P0Thread1of1ForFork2_#t~ite16_42|, ~weak$$choice2~0=v_~weak$$choice2~0_176, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_13|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17, ~x$w_buff1_used~0, P0Thread1of1ForFork2_#t~ite16, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 11:14:36,276 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L800-4-->L801: Formula: (= v_~x~0_36 |v_P2Thread1of1ForFork1_#t~ite32_12|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_12|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_11|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_19|, ~x~0=v_~x~0_36} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 11:14:36,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L749-->L757: Formula: (and (= v_~x$flush_delayed~0_13 0) (not (= (mod v_~x$flush_delayed~0_14 256) 0)) (= v_~x$mem_tmp~0_5 v_~x~0_56) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_14, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~x$mem_tmp~0=v_~x$mem_tmp~0_5} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~x$mem_tmp~0=v_~x$mem_tmp~0_5, ~x~0=v_~x~0_56} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 11:14:36,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L801-->L801-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In384433831 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In384433831 256) 0))) (or (and (= ~x$w_buff0_used~0_In384433831 |P2Thread1of1ForFork1_#t~ite34_Out384433831|) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite34_Out384433831| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In384433831, ~x$w_buff0_used~0=~x$w_buff0_used~0_In384433831} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out384433831|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In384433831, ~x$w_buff0_used~0=~x$w_buff0_used~0_In384433831} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 11:14:36,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L802-->L802-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-1078624355 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-1078624355 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In-1078624355 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1078624355 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite35_Out-1078624355| 0)) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite35_Out-1078624355| ~x$w_buff1_used~0_In-1078624355) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1078624355, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1078624355, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1078624355, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1078624355} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-1078624355|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1078624355, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1078624355, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1078624355, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1078624355} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 11:14:36,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In-1663647431 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1663647431 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out-1663647431| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1663647431| ~x$r_buff0_thd3~0_In-1663647431) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1663647431, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1663647431} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-1663647431|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1663647431, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1663647431} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 11:14:36,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L804-->L804-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In1167892617 256))) (.cse2 (= (mod ~x$r_buff1_thd3~0_In1167892617 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In1167892617 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1167892617 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite37_Out1167892617| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite37_Out1167892617| ~x$r_buff1_thd3~0_In1167892617)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1167892617, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1167892617, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1167892617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1167892617} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1167892617|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1167892617, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1167892617, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1167892617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1167892617} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 11:14:36,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L804-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82) (= |v_P2Thread1of1ForFork1_#t~ite37_40| v_~x$r_buff1_thd3~0_144)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_40|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_39|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_144, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 11:14:36,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L827-1-->L833: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:14:36,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L833-2-->L833-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite42_Out1256588522| |ULTIMATE.start_main_#t~ite41_Out1256588522|)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1256588522 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1256588522 256) 0))) (or (and (not .cse0) .cse1 (= ~x$w_buff1~0_In1256588522 |ULTIMATE.start_main_#t~ite41_Out1256588522|) (not .cse2)) (and .cse1 (or .cse2 .cse0) (= |ULTIMATE.start_main_#t~ite41_Out1256588522| ~x~0_In1256588522)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1256588522, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1256588522, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1256588522, ~x~0=~x~0_In1256588522} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1256588522|, ~x$w_buff1~0=~x$w_buff1~0_In1256588522, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1256588522, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1256588522, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out1256588522|, ~x~0=~x~0_In1256588522} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 11:14:36,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L834-->L834-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-693345954 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-693345954 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out-693345954| ~x$w_buff0_used~0_In-693345954) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite43_Out-693345954| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-693345954, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-693345954} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-693345954, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-693345954|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-693345954} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 11:14:36,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L835-->L835-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In729132376 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In729132376 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In729132376 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In729132376 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite44_Out729132376| ~x$w_buff1_used~0_In729132376)) (and (= 0 |ULTIMATE.start_main_#t~ite44_Out729132376|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In729132376, ~x$w_buff1_used~0=~x$w_buff1_used~0_In729132376, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In729132376, ~x$w_buff0_used~0=~x$w_buff0_used~0_In729132376} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In729132376, ~x$w_buff1_used~0=~x$w_buff1_used~0_In729132376, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In729132376, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out729132376|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In729132376} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 11:14:36,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L836-->L836-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-2075959599 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-2075959599 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite45_Out-2075959599|)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-2075959599 |ULTIMATE.start_main_#t~ite45_Out-2075959599|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2075959599, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2075959599} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2075959599, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-2075959599|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2075959599} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 11:14:36,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In423573194 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In423573194 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In423573194 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In423573194 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out423573194|)) (and (or .cse1 .cse0) (= ~x$r_buff1_thd0~0_In423573194 |ULTIMATE.start_main_#t~ite46_Out423573194|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In423573194, ~x$w_buff1_used~0=~x$w_buff1_used~0_In423573194, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In423573194, ~x$w_buff0_used~0=~x$w_buff0_used~0_In423573194} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In423573194, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out423573194|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In423573194, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In423573194, ~x$w_buff0_used~0=~x$w_buff0_used~0_In423573194} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 11:14:36,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L837-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9| (mod v_~main$tmp_guard1~0_22 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p1_EAX~0_205 0) (= v_~__unbuffered_p2_EBX~0_21 0) (= 0 v_~__unbuffered_p0_EAX~0_34))) 1 0)) 0 1) v_~main$tmp_guard1~0_22) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~x$r_buff1_thd0~0_258 |v_ULTIMATE.start_main_#t~ite46_45|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_205, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_45|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_205, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_44|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_258, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:14:36,331 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_da278d68-929d-455d-b0d5-c694880af94d/bin/uautomizer/witness.graphml [2019-12-07 11:14:36,331 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:14:36,332 INFO L168 Benchmark]: Toolchain (without parser) took 102094.65 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 6.0 GB). Free memory was 938.2 MB in the beginning and 3.5 GB in the end (delta: -2.6 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 11:14:36,332 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:14:36,332 INFO L168 Benchmark]: CACSL2BoogieTranslator took 403.18 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -129.7 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:14:36,333 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:14:36,333 INFO L168 Benchmark]: Boogie Preprocessor took 24.76 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:14:36,333 INFO L168 Benchmark]: RCFGBuilder took 398.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:14:36,333 INFO L168 Benchmark]: TraceAbstraction took 101165.06 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-12-07 11:14:36,333 INFO L168 Benchmark]: Witness Printer took 63.23 ms. Allocated memory is still 7.0 GB. Free memory was 3.6 GB in the beginning and 3.5 GB in the end (delta: 50.5 MB). Peak memory consumption was 50.5 MB. Max. memory is 11.5 GB. [2019-12-07 11:14:36,335 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 403.18 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.5 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -129.7 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.76 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 398.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 101165.06 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 1.0 GB in the beginning and 3.6 GB in the end (delta: -2.6 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. * Witness Printer took 63.23 ms. Allocated memory is still 7.0 GB. Free memory was 3.6 GB in the beginning and 3.5 GB in the end (delta: 50.5 MB). Peak memory consumption was 50.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 165 ProgramPointsBefore, 83 ProgramPointsAfterwards, 196 TransitionsBefore, 91 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 27 ChoiceCompositions, 6986 VarBasedMoverChecksPositive, 284 VarBasedMoverChecksNegative, 112 SemBasedMoverChecksPositive, 261 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 75392 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L823] FCALL, FORK 0 pthread_create(&t424, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L825] FCALL, FORK 0 pthread_create(&t425, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L767] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L768] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L769] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L770] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L771] 2 x$r_buff0_thd2 = (_Bool)1 [L774] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L777] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L827] FCALL, FORK 0 pthread_create(&t426, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L791] 3 y = 1 [L794] 3 __unbuffered_p2_EAX = y [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L800] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L777] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L778] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L734] 1 z = 1 [L737] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L738] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L739] 1 x$flush_delayed = weak$$choice2 [L740] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L741] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L779] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L741] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L742] EXPR 1 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0))=1, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L742] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L743] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L743] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L744] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L747] EXPR 1 weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=0, y=1, z=1] [L747] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L748] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L801] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L802] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L803] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L833] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, x$flush_delayed=0, x$mem_tmp=1, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L833] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L834] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L835] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L836] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 156 locations, 2 error locations. Result: UNSAFE, OverallTime: 101.0s, OverallIterations: 28, TraceHistogramMax: 1, AutomataDifference: 32.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6511 SDtfs, 9302 SDslu, 28506 SDs, 0 SdLazy, 22066 SolverSat, 479 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 14.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 479 GetRequests, 24 SyntacticMatches, 22 SemanticMatches, 433 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3477 ImplicationChecksByTransitivity, 5.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=146241occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 53.2s AutomataMinimizationTime, 27 MinimizatonAttempts, 237734 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 1097 NumberOfCodeBlocks, 1097 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1015 ConstructedInterpolants, 0 QuantifiedInterpolants, 346193 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 27 InterpolantComputations, 27 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...