./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix016_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix016_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bc977c308f61d736ff825b37fa1993a794f74dd6 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:57:41,218 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:57:41,219 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:57:41,227 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:57:41,227 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:57:41,228 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:57:41,229 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:57:41,230 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:57:41,231 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:57:41,232 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:57:41,232 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:57:41,233 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:57:41,233 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:57:41,234 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:57:41,235 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:57:41,235 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:57:41,236 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:57:41,237 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:57:41,238 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:57:41,239 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:57:41,241 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:57:41,241 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:57:41,242 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:57:41,242 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:57:41,244 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:57:41,244 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:57:41,244 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:57:41,245 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:57:41,245 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:57:41,246 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:57:41,246 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:57:41,246 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:57:41,247 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:57:41,247 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:57:41,248 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:57:41,248 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:57:41,248 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:57:41,248 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:57:41,248 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:57:41,249 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:57:41,249 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:57:41,250 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:57:41,259 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:57:41,259 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:57:41,260 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:57:41,260 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:57:41,260 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:57:41,260 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:57:41,260 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:57:41,260 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:57:41,260 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:57:41,260 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:57:41,261 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:57:41,261 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:57:41,262 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:57:41,262 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:57:41,262 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:57:41,262 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:57:41,262 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:57:41,262 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:57:41,262 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:57:41,262 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:57:41,262 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:57:41,263 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bc977c308f61d736ff825b37fa1993a794f74dd6 [2019-12-07 15:57:41,365 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:57:41,375 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:57:41,377 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:57:41,378 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:57:41,378 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:57:41,379 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix016_tso.oepc.i [2019-12-07 15:57:41,422 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/data/92b6545d9/24aaf2e862784d04afd18aa30a3377d0/FLAG66a950f2e [2019-12-07 15:57:41,822 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:57:41,822 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/sv-benchmarks/c/pthread-wmm/mix016_tso.oepc.i [2019-12-07 15:57:41,833 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/data/92b6545d9/24aaf2e862784d04afd18aa30a3377d0/FLAG66a950f2e [2019-12-07 15:57:41,842 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/data/92b6545d9/24aaf2e862784d04afd18aa30a3377d0 [2019-12-07 15:57:41,844 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:57:41,845 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:57:41,846 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:57:41,846 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:57:41,848 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:57:41,849 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:57:41" (1/1) ... [2019-12-07 15:57:41,850 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@232ca86d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:41, skipping insertion in model container [2019-12-07 15:57:41,850 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:57:41" (1/1) ... [2019-12-07 15:57:41,855 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:57:41,886 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:57:42,128 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:57:42,139 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:57:42,187 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:57:42,245 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:57:42,245 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42 WrapperNode [2019-12-07 15:57:42,246 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:57:42,246 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:57:42,246 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:57:42,246 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:57:42,252 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,270 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,293 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:57:42,294 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:57:42,294 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:57:42,294 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:57:42,301 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,301 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,305 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,306 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,313 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,316 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,319 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... [2019-12-07 15:57:42,322 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:57:42,323 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:57:42,323 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:57:42,323 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:57:42,324 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:57:42,368 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:57:42,368 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:57:42,368 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:57:42,369 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:57:42,369 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:57:42,369 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:57:42,369 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:57:42,369 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:57:42,369 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:57:42,369 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:57:42,369 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:57:42,369 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:57:42,369 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:57:42,370 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:57:42,729 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:57:42,729 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:57:42,730 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:57:42 BoogieIcfgContainer [2019-12-07 15:57:42,730 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:57:42,730 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:57:42,731 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:57:42,732 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:57:42,733 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:57:41" (1/3) ... [2019-12-07 15:57:42,733 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bc3a20b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:57:42, skipping insertion in model container [2019-12-07 15:57:42,733 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:57:42" (2/3) ... [2019-12-07 15:57:42,734 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bc3a20b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:57:42, skipping insertion in model container [2019-12-07 15:57:42,734 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:57:42" (3/3) ... [2019-12-07 15:57:42,735 INFO L109 eAbstractionObserver]: Analyzing ICFG mix016_tso.oepc.i [2019-12-07 15:57:42,741 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:57:42,741 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:57:42,746 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:57:42,747 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:57:42,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,772 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,772 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,772 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,773 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,773 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,776 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,776 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,776 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,777 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,777 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,777 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,777 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,777 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,777 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,777 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,777 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,778 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,779 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,789 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,790 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,791 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,792 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:57:42,806 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:57:42,820 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:57:42,820 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:57:42,820 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:57:42,820 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:57:42,820 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:57:42,820 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:57:42,820 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:57:42,820 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:57:42,831 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 15:57:42,832 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 15:57:42,889 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 15:57:42,889 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:57:42,900 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 704 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:57:42,916 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 15:57:42,947 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 15:57:42,948 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:57:42,953 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 704 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:57:42,968 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 15:57:42,969 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:57:45,740 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 84 [2019-12-07 15:57:45,965 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-12-07 15:57:46,153 INFO L206 etLargeBlockEncoding]: Checked pairs total: 89688 [2019-12-07 15:57:46,154 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 15:57:46,157 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 101 transitions [2019-12-07 15:57:58,481 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 106864 states. [2019-12-07 15:57:58,482 INFO L276 IsEmpty]: Start isEmpty. Operand 106864 states. [2019-12-07 15:57:58,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:57:58,486 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:57:58,486 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:57:58,486 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:57:58,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:57:58,490 INFO L82 PathProgramCache]: Analyzing trace with hash 921701, now seen corresponding path program 1 times [2019-12-07 15:57:58,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:57:58,496 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644989270] [2019-12-07 15:57:58,496 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:57:58,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:57:58,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:57:58,627 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644989270] [2019-12-07 15:57:58,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:57:58,628 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:57:58,629 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526417765] [2019-12-07 15:57:58,631 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:57:58,632 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:57:58,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:57:58,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:57:58,642 INFO L87 Difference]: Start difference. First operand 106864 states. Second operand 3 states. [2019-12-07 15:57:59,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:57:59,457 INFO L93 Difference]: Finished difference Result 106034 states and 453004 transitions. [2019-12-07 15:57:59,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:57:59,458 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:57:59,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:57:59,902 INFO L225 Difference]: With dead ends: 106034 [2019-12-07 15:57:59,902 INFO L226 Difference]: Without dead ends: 99950 [2019-12-07 15:57:59,903 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:58:03,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99950 states. [2019-12-07 15:58:05,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99950 to 99950. [2019-12-07 15:58:05,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99950 states. [2019-12-07 15:58:05,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99950 states to 99950 states and 426445 transitions. [2019-12-07 15:58:05,433 INFO L78 Accepts]: Start accepts. Automaton has 99950 states and 426445 transitions. Word has length 3 [2019-12-07 15:58:05,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:05,434 INFO L462 AbstractCegarLoop]: Abstraction has 99950 states and 426445 transitions. [2019-12-07 15:58:05,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:58:05,434 INFO L276 IsEmpty]: Start isEmpty. Operand 99950 states and 426445 transitions. [2019-12-07 15:58:05,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:58:05,437 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:05,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:05,438 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:05,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:05,438 INFO L82 PathProgramCache]: Analyzing trace with hash 1680645281, now seen corresponding path program 1 times [2019-12-07 15:58:05,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:58:05,438 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599570160] [2019-12-07 15:58:05,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:05,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:05,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:05,512 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599570160] [2019-12-07 15:58:05,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:05,513 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:58:05,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [556208324] [2019-12-07 15:58:05,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:58:05,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:58:05,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:58:05,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:58:05,514 INFO L87 Difference]: Start difference. First operand 99950 states and 426445 transitions. Second operand 4 states. [2019-12-07 15:58:06,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:06,379 INFO L93 Difference]: Finished difference Result 159384 states and 652094 transitions. [2019-12-07 15:58:06,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:58:06,379 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:58:06,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:06,830 INFO L225 Difference]: With dead ends: 159384 [2019-12-07 15:58:06,830 INFO L226 Difference]: Without dead ends: 159335 [2019-12-07 15:58:06,831 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:58:13,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159335 states. [2019-12-07 15:58:15,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159335 to 143879. [2019-12-07 15:58:15,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143879 states. [2019-12-07 15:58:15,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143879 states to 143879 states and 597281 transitions. [2019-12-07 15:58:15,771 INFO L78 Accepts]: Start accepts. Automaton has 143879 states and 597281 transitions. Word has length 11 [2019-12-07 15:58:15,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:15,771 INFO L462 AbstractCegarLoop]: Abstraction has 143879 states and 597281 transitions. [2019-12-07 15:58:15,772 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:58:15,772 INFO L276 IsEmpty]: Start isEmpty. Operand 143879 states and 597281 transitions. [2019-12-07 15:58:15,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:58:15,776 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:15,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:15,776 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:15,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:15,776 INFO L82 PathProgramCache]: Analyzing trace with hash -1535099311, now seen corresponding path program 1 times [2019-12-07 15:58:15,777 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:58:15,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277146483] [2019-12-07 15:58:15,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:15,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:15,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:15,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277146483] [2019-12-07 15:58:15,843 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:15,843 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:58:15,843 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [386465880] [2019-12-07 15:58:15,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:58:15,844 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:58:15,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:58:15,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:58:15,844 INFO L87 Difference]: Start difference. First operand 143879 states and 597281 transitions. Second operand 4 states. [2019-12-07 15:58:16,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:16,917 INFO L93 Difference]: Finished difference Result 202801 states and 822791 transitions. [2019-12-07 15:58:16,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:58:16,918 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:58:16,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:17,444 INFO L225 Difference]: With dead ends: 202801 [2019-12-07 15:58:17,444 INFO L226 Difference]: Without dead ends: 202745 [2019-12-07 15:58:17,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:58:22,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202745 states. [2019-12-07 15:58:27,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202745 to 170256. [2019-12-07 15:58:27,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170256 states. [2019-12-07 15:58:27,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170256 states to 170256 states and 703222 transitions. [2019-12-07 15:58:27,566 INFO L78 Accepts]: Start accepts. Automaton has 170256 states and 703222 transitions. Word has length 13 [2019-12-07 15:58:27,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:27,567 INFO L462 AbstractCegarLoop]: Abstraction has 170256 states and 703222 transitions. [2019-12-07 15:58:27,567 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:58:27,567 INFO L276 IsEmpty]: Start isEmpty. Operand 170256 states and 703222 transitions. [2019-12-07 15:58:27,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:58:27,573 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:27,573 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:27,573 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:27,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:27,573 INFO L82 PathProgramCache]: Analyzing trace with hash 1228744872, now seen corresponding path program 1 times [2019-12-07 15:58:27,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:58:27,574 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712455298] [2019-12-07 15:58:27,574 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:27,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:27,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:27,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712455298] [2019-12-07 15:58:27,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:27,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:58:27,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493874465] [2019-12-07 15:58:27,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:58:27,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:58:27,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:58:27,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:58:27,623 INFO L87 Difference]: Start difference. First operand 170256 states and 703222 transitions. Second operand 4 states. [2019-12-07 15:58:28,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:28,736 INFO L93 Difference]: Finished difference Result 214467 states and 881100 transitions. [2019-12-07 15:58:28,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:58:28,737 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 15:58:28,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:29,311 INFO L225 Difference]: With dead ends: 214467 [2019-12-07 15:58:29,311 INFO L226 Difference]: Without dead ends: 214467 [2019-12-07 15:58:29,312 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:58:34,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214467 states. [2019-12-07 15:58:39,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214467 to 183252. [2019-12-07 15:58:39,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183252 states. [2019-12-07 15:58:39,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183252 states to 183252 states and 757164 transitions. [2019-12-07 15:58:39,799 INFO L78 Accepts]: Start accepts. Automaton has 183252 states and 757164 transitions. Word has length 16 [2019-12-07 15:58:39,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:39,800 INFO L462 AbstractCegarLoop]: Abstraction has 183252 states and 757164 transitions. [2019-12-07 15:58:39,800 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:58:39,800 INFO L276 IsEmpty]: Start isEmpty. Operand 183252 states and 757164 transitions. [2019-12-07 15:58:39,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:58:39,806 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:39,806 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:39,807 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:39,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:39,807 INFO L82 PathProgramCache]: Analyzing trace with hash 1228651655, now seen corresponding path program 1 times [2019-12-07 15:58:39,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:58:39,807 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811792578] [2019-12-07 15:58:39,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:39,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:39,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:39,847 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811792578] [2019-12-07 15:58:39,847 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:39,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:58:39,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1373737397] [2019-12-07 15:58:39,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:58:39,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:58:39,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:58:39,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:58:39,848 INFO L87 Difference]: Start difference. First operand 183252 states and 757164 transitions. Second operand 4 states. [2019-12-07 15:58:41,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:41,302 INFO L93 Difference]: Finished difference Result 223450 states and 919042 transitions. [2019-12-07 15:58:41,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:58:41,303 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 15:58:41,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:41,898 INFO L225 Difference]: With dead ends: 223450 [2019-12-07 15:58:41,899 INFO L226 Difference]: Without dead ends: 223450 [2019-12-07 15:58:41,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:58:47,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223450 states. [2019-12-07 15:58:52,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223450 to 182620. [2019-12-07 15:58:52,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182620 states. [2019-12-07 15:58:52,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182620 states to 182620 states and 754482 transitions. [2019-12-07 15:58:52,736 INFO L78 Accepts]: Start accepts. Automaton has 182620 states and 754482 transitions. Word has length 16 [2019-12-07 15:58:52,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:58:52,736 INFO L462 AbstractCegarLoop]: Abstraction has 182620 states and 754482 transitions. [2019-12-07 15:58:52,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:58:52,737 INFO L276 IsEmpty]: Start isEmpty. Operand 182620 states and 754482 transitions. [2019-12-07 15:58:52,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:58:52,746 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:58:52,746 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:58:52,746 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:58:52,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:58:52,746 INFO L82 PathProgramCache]: Analyzing trace with hash -1477868963, now seen corresponding path program 1 times [2019-12-07 15:58:52,746 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:58:52,746 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867793415] [2019-12-07 15:58:52,746 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:58:52,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:58:52,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:58:52,785 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867793415] [2019-12-07 15:58:52,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:58:52,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:58:52,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1384606604] [2019-12-07 15:58:52,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:58:52,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:58:52,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:58:52,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:58:52,786 INFO L87 Difference]: Start difference. First operand 182620 states and 754482 transitions. Second operand 3 states. [2019-12-07 15:58:53,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:58:53,805 INFO L93 Difference]: Finished difference Result 172048 states and 702793 transitions. [2019-12-07 15:58:53,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:58:53,806 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:58:53,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:58:54,214 INFO L225 Difference]: With dead ends: 172048 [2019-12-07 15:58:54,215 INFO L226 Difference]: Without dead ends: 172048 [2019-12-07 15:58:54,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:58:58,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172048 states. [2019-12-07 15:59:00,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172048 to 168916. [2019-12-07 15:59:00,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168916 states. [2019-12-07 15:59:01,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168916 states to 168916 states and 691209 transitions. [2019-12-07 15:59:01,192 INFO L78 Accepts]: Start accepts. Automaton has 168916 states and 691209 transitions. Word has length 18 [2019-12-07 15:59:01,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:01,192 INFO L462 AbstractCegarLoop]: Abstraction has 168916 states and 691209 transitions. [2019-12-07 15:59:01,192 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:59:01,192 INFO L276 IsEmpty]: Start isEmpty. Operand 168916 states and 691209 transitions. [2019-12-07 15:59:01,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:59:01,200 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:01,200 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:01,200 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:01,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:01,200 INFO L82 PathProgramCache]: Analyzing trace with hash 1555984850, now seen corresponding path program 1 times [2019-12-07 15:59:01,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:01,201 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992915200] [2019-12-07 15:59:01,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:01,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:01,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:01,257 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1992915200] [2019-12-07 15:59:01,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:01,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:59:01,257 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142672238] [2019-12-07 15:59:01,258 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:59:01,258 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:01,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:59:01,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:01,258 INFO L87 Difference]: Start difference. First operand 168916 states and 691209 transitions. Second operand 3 states. [2019-12-07 15:59:02,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:02,297 INFO L93 Difference]: Finished difference Result 170314 states and 694707 transitions. [2019-12-07 15:59:02,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:59:02,297 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:59:02,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:02,697 INFO L225 Difference]: With dead ends: 170314 [2019-12-07 15:59:02,697 INFO L226 Difference]: Without dead ends: 170314 [2019-12-07 15:59:02,698 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:08,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170314 states. [2019-12-07 15:59:10,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170314 to 168913. [2019-12-07 15:59:10,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168913 states. [2019-12-07 15:59:11,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168913 states to 168913 states and 691197 transitions. [2019-12-07 15:59:11,324 INFO L78 Accepts]: Start accepts. Automaton has 168913 states and 691197 transitions. Word has length 18 [2019-12-07 15:59:11,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:11,324 INFO L462 AbstractCegarLoop]: Abstraction has 168913 states and 691197 transitions. [2019-12-07 15:59:11,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:59:11,324 INFO L276 IsEmpty]: Start isEmpty. Operand 168913 states and 691197 transitions. [2019-12-07 15:59:11,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:59:11,334 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:11,334 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:11,334 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:11,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:11,334 INFO L82 PathProgramCache]: Analyzing trace with hash 2011667091, now seen corresponding path program 1 times [2019-12-07 15:59:11,334 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:11,335 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [334750363] [2019-12-07 15:59:11,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:11,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:11,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:11,378 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [334750363] [2019-12-07 15:59:11,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:11,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:59:11,379 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443442873] [2019-12-07 15:59:11,379 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:59:11,379 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:11,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:59:11,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:59:11,379 INFO L87 Difference]: Start difference. First operand 168913 states and 691197 transitions. Second operand 4 states. [2019-12-07 15:59:11,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:11,544 INFO L93 Difference]: Finished difference Result 43449 states and 149047 transitions. [2019-12-07 15:59:11,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:59:11,544 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 15:59:11,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:11,593 INFO L225 Difference]: With dead ends: 43449 [2019-12-07 15:59:11,594 INFO L226 Difference]: Without dead ends: 33318 [2019-12-07 15:59:11,594 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:59:11,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33318 states. [2019-12-07 15:59:12,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33318 to 33318. [2019-12-07 15:59:12,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33318 states. [2019-12-07 15:59:12,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33318 states to 33318 states and 107638 transitions. [2019-12-07 15:59:12,412 INFO L78 Accepts]: Start accepts. Automaton has 33318 states and 107638 transitions. Word has length 19 [2019-12-07 15:59:12,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:12,412 INFO L462 AbstractCegarLoop]: Abstraction has 33318 states and 107638 transitions. [2019-12-07 15:59:12,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:59:12,412 INFO L276 IsEmpty]: Start isEmpty. Operand 33318 states and 107638 transitions. [2019-12-07 15:59:12,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:59:12,417 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:12,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:12,417 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:12,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:12,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1838789338, now seen corresponding path program 1 times [2019-12-07 15:59:12,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:12,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931732175] [2019-12-07 15:59:12,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:12,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:12,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:12,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [931732175] [2019-12-07 15:59:12,469 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:12,469 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:59:12,469 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621378881] [2019-12-07 15:59:12,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:59:12,470 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:12,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:59:12,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:59:12,470 INFO L87 Difference]: Start difference. First operand 33318 states and 107638 transitions. Second operand 5 states. [2019-12-07 15:59:12,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:12,899 INFO L93 Difference]: Finished difference Result 51147 states and 162582 transitions. [2019-12-07 15:59:12,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:59:12,900 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 15:59:12,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:12,976 INFO L225 Difference]: With dead ends: 51147 [2019-12-07 15:59:12,976 INFO L226 Difference]: Without dead ends: 51091 [2019-12-07 15:59:12,977 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:59:13,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51091 states. [2019-12-07 15:59:13,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51091 to 35008. [2019-12-07 15:59:13,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35008 states. [2019-12-07 15:59:13,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35008 states to 35008 states and 113155 transitions. [2019-12-07 15:59:13,652 INFO L78 Accepts]: Start accepts. Automaton has 35008 states and 113155 transitions. Word has length 22 [2019-12-07 15:59:13,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:13,652 INFO L462 AbstractCegarLoop]: Abstraction has 35008 states and 113155 transitions. [2019-12-07 15:59:13,652 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:59:13,652 INFO L276 IsEmpty]: Start isEmpty. Operand 35008 states and 113155 transitions. [2019-12-07 15:59:13,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:59:13,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:13,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:13,658 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:13,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:13,658 INFO L82 PathProgramCache]: Analyzing trace with hash -1838882555, now seen corresponding path program 1 times [2019-12-07 15:59:13,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:13,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019292847] [2019-12-07 15:59:13,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:13,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:13,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:13,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019292847] [2019-12-07 15:59:13,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:13,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:59:13,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134570738] [2019-12-07 15:59:13,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:59:13,713 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:13,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:59:13,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:59:13,713 INFO L87 Difference]: Start difference. First operand 35008 states and 113155 transitions. Second operand 5 states. [2019-12-07 15:59:14,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:14,106 INFO L93 Difference]: Finished difference Result 52062 states and 165199 transitions. [2019-12-07 15:59:14,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:59:14,107 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 15:59:14,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:14,184 INFO L225 Difference]: With dead ends: 52062 [2019-12-07 15:59:14,184 INFO L226 Difference]: Without dead ends: 52006 [2019-12-07 15:59:14,184 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:59:14,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52006 states. [2019-12-07 15:59:15,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52006 to 32765. [2019-12-07 15:59:15,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32765 states. [2019-12-07 15:59:15,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32765 states to 32765 states and 105635 transitions. [2019-12-07 15:59:15,125 INFO L78 Accepts]: Start accepts. Automaton has 32765 states and 105635 transitions. Word has length 22 [2019-12-07 15:59:15,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:15,125 INFO L462 AbstractCegarLoop]: Abstraction has 32765 states and 105635 transitions. [2019-12-07 15:59:15,125 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:59:15,125 INFO L276 IsEmpty]: Start isEmpty. Operand 32765 states and 105635 transitions. [2019-12-07 15:59:15,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 15:59:15,132 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:15,132 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:15,132 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:15,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:15,132 INFO L82 PathProgramCache]: Analyzing trace with hash 320469370, now seen corresponding path program 1 times [2019-12-07 15:59:15,132 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:15,132 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1795737603] [2019-12-07 15:59:15,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:15,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:15,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:15,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1795737603] [2019-12-07 15:59:15,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:15,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:59:15,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [383551262] [2019-12-07 15:59:15,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:59:15,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:15,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:59:15,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:59:15,207 INFO L87 Difference]: Start difference. First operand 32765 states and 105635 transitions. Second operand 6 states. [2019-12-07 15:59:15,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:15,739 INFO L93 Difference]: Finished difference Result 48516 states and 152827 transitions. [2019-12-07 15:59:15,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:59:15,739 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 15:59:15,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:15,803 INFO L225 Difference]: With dead ends: 48516 [2019-12-07 15:59:15,803 INFO L226 Difference]: Without dead ends: 48503 [2019-12-07 15:59:15,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:59:16,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48503 states. [2019-12-07 15:59:16,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48503 to 38734. [2019-12-07 15:59:16,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38734 states. [2019-12-07 15:59:16,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38734 states to 38734 states and 124522 transitions. [2019-12-07 15:59:16,490 INFO L78 Accepts]: Start accepts. Automaton has 38734 states and 124522 transitions. Word has length 25 [2019-12-07 15:59:16,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:16,490 INFO L462 AbstractCegarLoop]: Abstraction has 38734 states and 124522 transitions. [2019-12-07 15:59:16,490 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:59:16,490 INFO L276 IsEmpty]: Start isEmpty. Operand 38734 states and 124522 transitions. [2019-12-07 15:59:16,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:59:16,500 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:16,500 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:16,500 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:16,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:16,501 INFO L82 PathProgramCache]: Analyzing trace with hash 270212897, now seen corresponding path program 1 times [2019-12-07 15:59:16,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:16,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508551647] [2019-12-07 15:59:16,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:16,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:16,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:16,523 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1508551647] [2019-12-07 15:59:16,523 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:16,523 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:59:16,524 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559882704] [2019-12-07 15:59:16,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:59:16,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:16,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:59:16,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:16,524 INFO L87 Difference]: Start difference. First operand 38734 states and 124522 transitions. Second operand 3 states. [2019-12-07 15:59:16,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:16,700 INFO L93 Difference]: Finished difference Result 59172 states and 189189 transitions. [2019-12-07 15:59:16,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:59:16,700 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 15:59:16,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:16,781 INFO L225 Difference]: With dead ends: 59172 [2019-12-07 15:59:16,781 INFO L226 Difference]: Without dead ends: 59172 [2019-12-07 15:59:16,782 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:17,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59172 states. [2019-12-07 15:59:17,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59172 to 45762. [2019-12-07 15:59:17,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45762 states. [2019-12-07 15:59:17,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45762 states to 45762 states and 147373 transitions. [2019-12-07 15:59:17,640 INFO L78 Accepts]: Start accepts. Automaton has 45762 states and 147373 transitions. Word has length 27 [2019-12-07 15:59:17,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:17,640 INFO L462 AbstractCegarLoop]: Abstraction has 45762 states and 147373 transitions. [2019-12-07 15:59:17,641 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:59:17,641 INFO L276 IsEmpty]: Start isEmpty. Operand 45762 states and 147373 transitions. [2019-12-07 15:59:17,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:59:17,652 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:17,652 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:17,652 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:17,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:17,653 INFO L82 PathProgramCache]: Analyzing trace with hash 2064759266, now seen corresponding path program 1 times [2019-12-07 15:59:17,653 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:17,653 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612775145] [2019-12-07 15:59:17,653 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:17,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:17,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:17,673 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612775145] [2019-12-07 15:59:17,673 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:17,673 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:59:17,673 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [4105369] [2019-12-07 15:59:17,674 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:59:17,674 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:17,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:59:17,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:17,674 INFO L87 Difference]: Start difference. First operand 45762 states and 147373 transitions. Second operand 3 states. [2019-12-07 15:59:17,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:17,849 INFO L93 Difference]: Finished difference Result 59172 states and 184469 transitions. [2019-12-07 15:59:17,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:59:17,850 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 15:59:17,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:17,933 INFO L225 Difference]: With dead ends: 59172 [2019-12-07 15:59:17,933 INFO L226 Difference]: Without dead ends: 59172 [2019-12-07 15:59:17,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:18,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59172 states. [2019-12-07 15:59:18,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59172 to 45762. [2019-12-07 15:59:18,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45762 states. [2019-12-07 15:59:18,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45762 states to 45762 states and 142653 transitions. [2019-12-07 15:59:18,739 INFO L78 Accepts]: Start accepts. Automaton has 45762 states and 142653 transitions. Word has length 27 [2019-12-07 15:59:18,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:18,739 INFO L462 AbstractCegarLoop]: Abstraction has 45762 states and 142653 transitions. [2019-12-07 15:59:18,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:59:18,739 INFO L276 IsEmpty]: Start isEmpty. Operand 45762 states and 142653 transitions. [2019-12-07 15:59:18,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:59:18,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:18,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:18,751 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:18,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:18,751 INFO L82 PathProgramCache]: Analyzing trace with hash 2010439622, now seen corresponding path program 1 times [2019-12-07 15:59:18,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:18,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085390096] [2019-12-07 15:59:18,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:18,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:18,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:18,802 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1085390096] [2019-12-07 15:59:18,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:18,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:59:18,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [940091833] [2019-12-07 15:59:18,803 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:59:18,803 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:18,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:59:18,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:59:18,804 INFO L87 Difference]: Start difference. First operand 45762 states and 142653 transitions. Second operand 5 states. [2019-12-07 15:59:19,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:19,128 INFO L93 Difference]: Finished difference Result 56423 states and 173987 transitions. [2019-12-07 15:59:19,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:59:19,128 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 15:59:19,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:19,206 INFO L225 Difference]: With dead ends: 56423 [2019-12-07 15:59:19,206 INFO L226 Difference]: Without dead ends: 56247 [2019-12-07 15:59:19,206 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:59:19,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56247 states. [2019-12-07 15:59:19,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56247 to 47955. [2019-12-07 15:59:19,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47955 states. [2019-12-07 15:59:20,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47955 states to 47955 states and 149334 transitions. [2019-12-07 15:59:20,039 INFO L78 Accepts]: Start accepts. Automaton has 47955 states and 149334 transitions. Word has length 27 [2019-12-07 15:59:20,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:20,039 INFO L462 AbstractCegarLoop]: Abstraction has 47955 states and 149334 transitions. [2019-12-07 15:59:20,039 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:59:20,039 INFO L276 IsEmpty]: Start isEmpty. Operand 47955 states and 149334 transitions. [2019-12-07 15:59:20,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 15:59:20,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:20,052 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:20,052 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:20,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:20,053 INFO L82 PathProgramCache]: Analyzing trace with hash 773295241, now seen corresponding path program 1 times [2019-12-07 15:59:20,053 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:20,053 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229443350] [2019-12-07 15:59:20,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:20,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:20,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:20,103 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [229443350] [2019-12-07 15:59:20,103 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:20,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:59:20,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038588481] [2019-12-07 15:59:20,103 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:59:20,103 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:20,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:59:20,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:59:20,104 INFO L87 Difference]: Start difference. First operand 47955 states and 149334 transitions. Second operand 6 states. [2019-12-07 15:59:20,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:20,293 INFO L93 Difference]: Finished difference Result 60971 states and 188599 transitions. [2019-12-07 15:59:20,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:59:20,293 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 15:59:20,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:20,382 INFO L225 Difference]: With dead ends: 60971 [2019-12-07 15:59:20,383 INFO L226 Difference]: Without dead ends: 60971 [2019-12-07 15:59:20,383 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:59:20,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60971 states. [2019-12-07 15:59:21,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60971 to 49110. [2019-12-07 15:59:21,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49110 states. [2019-12-07 15:59:21,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49110 states to 49110 states and 152696 transitions. [2019-12-07 15:59:21,258 INFO L78 Accepts]: Start accepts. Automaton has 49110 states and 152696 transitions. Word has length 28 [2019-12-07 15:59:21,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:21,258 INFO L462 AbstractCegarLoop]: Abstraction has 49110 states and 152696 transitions. [2019-12-07 15:59:21,258 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:59:21,258 INFO L276 IsEmpty]: Start isEmpty. Operand 49110 states and 152696 transitions. [2019-12-07 15:59:21,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:59:21,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:21,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:21,269 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:21,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:21,269 INFO L82 PathProgramCache]: Analyzing trace with hash 1004344681, now seen corresponding path program 1 times [2019-12-07 15:59:21,270 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:21,270 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114036244] [2019-12-07 15:59:21,270 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:21,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:21,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:21,307 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114036244] [2019-12-07 15:59:21,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:21,307 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:59:21,307 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [433365752] [2019-12-07 15:59:21,307 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:59:21,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:21,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:59:21,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:59:21,308 INFO L87 Difference]: Start difference. First operand 49110 states and 152696 transitions. Second operand 5 states. [2019-12-07 15:59:21,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:21,387 INFO L93 Difference]: Finished difference Result 21976 states and 65683 transitions. [2019-12-07 15:59:21,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:59:21,387 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 15:59:21,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:21,408 INFO L225 Difference]: With dead ends: 21976 [2019-12-07 15:59:21,408 INFO L226 Difference]: Without dead ends: 19302 [2019-12-07 15:59:21,408 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:59:21,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19302 states. [2019-12-07 15:59:21,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19302 to 18158. [2019-12-07 15:59:21,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18158 states. [2019-12-07 15:59:21,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18158 states to 18158 states and 54085 transitions. [2019-12-07 15:59:21,661 INFO L78 Accepts]: Start accepts. Automaton has 18158 states and 54085 transitions. Word has length 29 [2019-12-07 15:59:21,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:21,662 INFO L462 AbstractCegarLoop]: Abstraction has 18158 states and 54085 transitions. [2019-12-07 15:59:21,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:59:21,662 INFO L276 IsEmpty]: Start isEmpty. Operand 18158 states and 54085 transitions. [2019-12-07 15:59:21,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:59:21,670 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:21,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:21,671 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:21,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:21,671 INFO L82 PathProgramCache]: Analyzing trace with hash -1192824778, now seen corresponding path program 1 times [2019-12-07 15:59:21,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:21,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150808098] [2019-12-07 15:59:21,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:21,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:21,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:21,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [150808098] [2019-12-07 15:59:21,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:21,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:59:21,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980302087] [2019-12-07 15:59:21,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:59:21,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:21,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:59:21,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:59:21,723 INFO L87 Difference]: Start difference. First operand 18158 states and 54085 transitions. Second operand 5 states. [2019-12-07 15:59:21,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:21,953 INFO L93 Difference]: Finished difference Result 21586 states and 63209 transitions. [2019-12-07 15:59:21,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:59:21,953 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 15:59:21,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:21,974 INFO L225 Difference]: With dead ends: 21586 [2019-12-07 15:59:21,975 INFO L226 Difference]: Without dead ends: 21424 [2019-12-07 15:59:21,975 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:59:22,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21424 states. [2019-12-07 15:59:22,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21424 to 17857. [2019-12-07 15:59:22,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17857 states. [2019-12-07 15:59:22,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17857 states to 17857 states and 53104 transitions. [2019-12-07 15:59:22,252 INFO L78 Accepts]: Start accepts. Automaton has 17857 states and 53104 transitions. Word has length 29 [2019-12-07 15:59:22,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:22,252 INFO L462 AbstractCegarLoop]: Abstraction has 17857 states and 53104 transitions. [2019-12-07 15:59:22,252 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:59:22,253 INFO L276 IsEmpty]: Start isEmpty. Operand 17857 states and 53104 transitions. [2019-12-07 15:59:22,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:59:22,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:22,264 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:22,264 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:22,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:22,264 INFO L82 PathProgramCache]: Analyzing trace with hash -809721720, now seen corresponding path program 1 times [2019-12-07 15:59:22,265 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:22,265 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032213367] [2019-12-07 15:59:22,265 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:22,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:22,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:22,333 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032213367] [2019-12-07 15:59:22,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:22,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:59:22,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254765142] [2019-12-07 15:59:22,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:59:22,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:22,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:59:22,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:59:22,334 INFO L87 Difference]: Start difference. First operand 17857 states and 53104 transitions. Second operand 6 states. [2019-12-07 15:59:22,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:22,793 INFO L93 Difference]: Finished difference Result 22309 states and 65299 transitions. [2019-12-07 15:59:22,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 15:59:22,795 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 15:59:22,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:22,826 INFO L225 Difference]: With dead ends: 22309 [2019-12-07 15:59:22,826 INFO L226 Difference]: Without dead ends: 21988 [2019-12-07 15:59:22,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:59:22,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21988 states. [2019-12-07 15:59:23,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21988 to 17878. [2019-12-07 15:59:23,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17878 states. [2019-12-07 15:59:23,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17878 states to 17878 states and 53119 transitions. [2019-12-07 15:59:23,103 INFO L78 Accepts]: Start accepts. Automaton has 17878 states and 53119 transitions. Word has length 33 [2019-12-07 15:59:23,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:23,104 INFO L462 AbstractCegarLoop]: Abstraction has 17878 states and 53119 transitions. [2019-12-07 15:59:23,104 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:59:23,104 INFO L276 IsEmpty]: Start isEmpty. Operand 17878 states and 53119 transitions. [2019-12-07 15:59:23,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 15:59:23,117 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:23,117 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:23,118 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:23,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:23,118 INFO L82 PathProgramCache]: Analyzing trace with hash -1243510664, now seen corresponding path program 1 times [2019-12-07 15:59:23,118 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:23,118 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1127023078] [2019-12-07 15:59:23,118 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:23,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:23,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:23,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1127023078] [2019-12-07 15:59:23,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:23,178 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:59:23,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247115729] [2019-12-07 15:59:23,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:59:23,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:23,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:59:23,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:59:23,179 INFO L87 Difference]: Start difference. First operand 17878 states and 53119 transitions. Second operand 6 states. [2019-12-07 15:59:23,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:23,594 INFO L93 Difference]: Finished difference Result 21466 states and 62840 transitions. [2019-12-07 15:59:23,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 15:59:23,595 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2019-12-07 15:59:23,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:23,615 INFO L225 Difference]: With dead ends: 21466 [2019-12-07 15:59:23,615 INFO L226 Difference]: Without dead ends: 21091 [2019-12-07 15:59:23,616 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:59:23,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21091 states. [2019-12-07 15:59:23,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21091 to 16771. [2019-12-07 15:59:23,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16771 states. [2019-12-07 15:59:23,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16771 states to 16771 states and 49889 transitions. [2019-12-07 15:59:23,875 INFO L78 Accepts]: Start accepts. Automaton has 16771 states and 49889 transitions. Word has length 35 [2019-12-07 15:59:23,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:23,875 INFO L462 AbstractCegarLoop]: Abstraction has 16771 states and 49889 transitions. [2019-12-07 15:59:23,875 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:59:23,875 INFO L276 IsEmpty]: Start isEmpty. Operand 16771 states and 49889 transitions. [2019-12-07 15:59:23,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:59:23,889 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:23,889 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:23,890 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:23,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:23,890 INFO L82 PathProgramCache]: Analyzing trace with hash 57427623, now seen corresponding path program 1 times [2019-12-07 15:59:23,890 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:23,890 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [757113284] [2019-12-07 15:59:23,890 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:23,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:23,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:23,930 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [757113284] [2019-12-07 15:59:23,931 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:23,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:59:23,931 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1200257199] [2019-12-07 15:59:23,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:59:23,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:23,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:59:23,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:59:23,932 INFO L87 Difference]: Start difference. First operand 16771 states and 49889 transitions. Second operand 5 states. [2019-12-07 15:59:24,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:24,311 INFO L93 Difference]: Finished difference Result 24966 states and 73533 transitions. [2019-12-07 15:59:24,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:59:24,311 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 15:59:24,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:24,339 INFO L225 Difference]: With dead ends: 24966 [2019-12-07 15:59:24,339 INFO L226 Difference]: Without dead ends: 24966 [2019-12-07 15:59:24,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:59:24,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24966 states. [2019-12-07 15:59:24,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24966 to 19912. [2019-12-07 15:59:24,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19912 states. [2019-12-07 15:59:24,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19912 states to 19912 states and 59389 transitions. [2019-12-07 15:59:24,641 INFO L78 Accepts]: Start accepts. Automaton has 19912 states and 59389 transitions. Word has length 40 [2019-12-07 15:59:24,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:24,641 INFO L462 AbstractCegarLoop]: Abstraction has 19912 states and 59389 transitions. [2019-12-07 15:59:24,641 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:59:24,641 INFO L276 IsEmpty]: Start isEmpty. Operand 19912 states and 59389 transitions. [2019-12-07 15:59:24,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:59:24,656 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:24,656 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:24,657 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:24,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:24,657 INFO L82 PathProgramCache]: Analyzing trace with hash 1323155467, now seen corresponding path program 2 times [2019-12-07 15:59:24,657 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:24,657 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156604379] [2019-12-07 15:59:24,657 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:24,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:24,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:24,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156604379] [2019-12-07 15:59:24,843 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:24,843 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:59:24,843 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1662230688] [2019-12-07 15:59:24,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:59:24,844 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:24,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:59:24,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:59:24,844 INFO L87 Difference]: Start difference. First operand 19912 states and 59389 transitions. Second operand 10 states. [2019-12-07 15:59:25,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:25,229 INFO L93 Difference]: Finished difference Result 20358 states and 60498 transitions. [2019-12-07 15:59:25,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 15:59:25,229 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 40 [2019-12-07 15:59:25,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:25,250 INFO L225 Difference]: With dead ends: 20358 [2019-12-07 15:59:25,250 INFO L226 Difference]: Without dead ends: 20358 [2019-12-07 15:59:25,250 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=170, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:59:25,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20358 states. [2019-12-07 15:59:25,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20358 to 19884. [2019-12-07 15:59:25,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19884 states. [2019-12-07 15:59:25,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19884 states to 19884 states and 59256 transitions. [2019-12-07 15:59:25,567 INFO L78 Accepts]: Start accepts. Automaton has 19884 states and 59256 transitions. Word has length 40 [2019-12-07 15:59:25,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:25,567 INFO L462 AbstractCegarLoop]: Abstraction has 19884 states and 59256 transitions. [2019-12-07 15:59:25,567 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:59:25,567 INFO L276 IsEmpty]: Start isEmpty. Operand 19884 states and 59256 transitions. [2019-12-07 15:59:25,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:59:25,581 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:25,581 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:25,581 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:25,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:25,582 INFO L82 PathProgramCache]: Analyzing trace with hash 1472692188, now seen corresponding path program 1 times [2019-12-07 15:59:25,582 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:25,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [396498139] [2019-12-07 15:59:25,582 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:25,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:25,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:25,618 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [396498139] [2019-12-07 15:59:25,618 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:25,618 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:59:25,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018347292] [2019-12-07 15:59:25,619 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:59:25,619 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:25,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:59:25,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:25,619 INFO L87 Difference]: Start difference. First operand 19884 states and 59256 transitions. Second operand 3 states. [2019-12-07 15:59:25,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:25,662 INFO L93 Difference]: Finished difference Result 16788 states and 49279 transitions. [2019-12-07 15:59:25,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:59:25,663 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 15:59:25,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:25,679 INFO L225 Difference]: With dead ends: 16788 [2019-12-07 15:59:25,679 INFO L226 Difference]: Without dead ends: 16788 [2019-12-07 15:59:25,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:25,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16788 states. [2019-12-07 15:59:25,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16788 to 16538. [2019-12-07 15:59:25,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16538 states. [2019-12-07 15:59:25,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16538 states to 16538 states and 48581 transitions. [2019-12-07 15:59:25,898 INFO L78 Accepts]: Start accepts. Automaton has 16538 states and 48581 transitions. Word has length 41 [2019-12-07 15:59:25,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:25,898 INFO L462 AbstractCegarLoop]: Abstraction has 16538 states and 48581 transitions. [2019-12-07 15:59:25,898 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:59:25,898 INFO L276 IsEmpty]: Start isEmpty. Operand 16538 states and 48581 transitions. [2019-12-07 15:59:25,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 15:59:25,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:25,911 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:25,911 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:25,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:25,911 INFO L82 PathProgramCache]: Analyzing trace with hash -1875088873, now seen corresponding path program 1 times [2019-12-07 15:59:25,911 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:25,911 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524174274] [2019-12-07 15:59:25,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:25,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:25,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:25,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524174274] [2019-12-07 15:59:25,955 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:25,955 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:59:25,955 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313852725] [2019-12-07 15:59:25,955 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:59:25,955 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:25,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:59:25,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:59:25,956 INFO L87 Difference]: Start difference. First operand 16538 states and 48581 transitions. Second operand 6 states. [2019-12-07 15:59:26,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:26,026 INFO L93 Difference]: Finished difference Result 15240 states and 45798 transitions. [2019-12-07 15:59:26,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:59:26,027 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 15:59:26,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:26,042 INFO L225 Difference]: With dead ends: 15240 [2019-12-07 15:59:26,042 INFO L226 Difference]: Without dead ends: 15108 [2019-12-07 15:59:26,042 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:59:26,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15108 states. [2019-12-07 15:59:26,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15108 to 13621. [2019-12-07 15:59:26,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13621 states. [2019-12-07 15:59:26,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13621 states to 13621 states and 41279 transitions. [2019-12-07 15:59:26,241 INFO L78 Accepts]: Start accepts. Automaton has 13621 states and 41279 transitions. Word has length 42 [2019-12-07 15:59:26,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:26,241 INFO L462 AbstractCegarLoop]: Abstraction has 13621 states and 41279 transitions. [2019-12-07 15:59:26,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:59:26,241 INFO L276 IsEmpty]: Start isEmpty. Operand 13621 states and 41279 transitions. [2019-12-07 15:59:26,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:59:26,253 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:26,253 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:26,253 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:26,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:26,253 INFO L82 PathProgramCache]: Analyzing trace with hash 208708978, now seen corresponding path program 1 times [2019-12-07 15:59:26,253 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:26,253 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497260871] [2019-12-07 15:59:26,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:26,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:59:26,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:59:26,303 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497260871] [2019-12-07 15:59:26,303 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:59:26,303 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:59:26,303 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1453801881] [2019-12-07 15:59:26,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:59:26,304 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:59:26,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:59:26,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:26,304 INFO L87 Difference]: Start difference. First operand 13621 states and 41279 transitions. Second operand 3 states. [2019-12-07 15:59:26,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:59:26,375 INFO L93 Difference]: Finished difference Result 15953 states and 48095 transitions. [2019-12-07 15:59:26,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:59:26,375 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:59:26,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:59:26,391 INFO L225 Difference]: With dead ends: 15953 [2019-12-07 15:59:26,391 INFO L226 Difference]: Without dead ends: 15953 [2019-12-07 15:59:26,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:59:26,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15953 states. [2019-12-07 15:59:26,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15953 to 12813. [2019-12-07 15:59:26,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12813 states. [2019-12-07 15:59:26,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12813 states to 12813 states and 38890 transitions. [2019-12-07 15:59:26,597 INFO L78 Accepts]: Start accepts. Automaton has 12813 states and 38890 transitions. Word has length 66 [2019-12-07 15:59:26,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:59:26,597 INFO L462 AbstractCegarLoop]: Abstraction has 12813 states and 38890 transitions. [2019-12-07 15:59:26,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:59:26,598 INFO L276 IsEmpty]: Start isEmpty. Operand 12813 states and 38890 transitions. [2019-12-07 15:59:26,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:59:26,608 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:59:26,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:59:26,609 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:59:26,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:59:26,609 INFO L82 PathProgramCache]: Analyzing trace with hash 817808390, now seen corresponding path program 1 times [2019-12-07 15:59:26,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:59:26,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [503306340] [2019-12-07 15:59:26,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:59:26,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:59:26,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:59:26,722 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:59:26,723 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:59:26,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= v_~z$r_buff1_thd1~0_114 0) (= 0 |v_ULTIMATE.start_main_~#t427~0.offset_30|) (= v_~main$tmp_guard1~0_44 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~z$r_buff0_thd3~0_325) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t427~0.base_44| 4) |v_#length_23|) (= v_~z$mem_tmp~0_16 0) (= 0 v_~z$r_buff1_thd3~0_218) (= |v_#NULL.offset_3| 0) (= v_~z$read_delayed~0_8 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t427~0.base_44|)) (= (store .cse0 |v_ULTIMATE.start_main_~#t427~0.base_44| 1) |v_#valid_71|) (= 0 v_~weak$$choice0~0_15) (= v_~z$w_buff1~0_167 0) (= v_~z$r_buff0_thd0~0_136 0) (= v_~x~0_84 0) (= v_~z$r_buff0_thd1~0_185 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~__unbuffered_p2_EAX~0_46) (= 0 v_~weak$$choice2~0_93) (= 0 v_~__unbuffered_p1_EAX~0_60) (= v_~z$w_buff0~0_229 0) (= 0 v_~__unbuffered_p0_EAX~0_95) (= 0 v_~__unbuffered_cnt~0_63) (= v_~z$r_buff0_thd2~0_132 0) (= v_~z~0_167 0) (= v_~main$tmp_guard0~0_44 0) (= v_~y~0_39 0) (= v_~z$w_buff1_used~0_386 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t427~0.base_44|) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~z$r_buff1_thd0~0_148 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t427~0.base_44| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t427~0.base_44|) |v_ULTIMATE.start_main_~#t427~0.offset_30| 0)) |v_#memory_int_21|) (= 0 |v_#NULL.base_3|) (= v_~z$w_buff0_used~0_680 0) (= v_~z$r_buff1_thd2~0_108 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_108, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_86|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_44|, ULTIMATE.start_main_~#t428~0.offset=|v_ULTIMATE.start_main_~#t428~0.offset_30|, ULTIMATE.start_main_~#t429~0.base=|v_ULTIMATE.start_main_~#t429~0.base_24|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_140|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_82|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_136, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_95, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_60, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_~#t427~0.base=|v_ULTIMATE.start_main_~#t427~0.base_44|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_386, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_114, ULTIMATE.start_main_~#t427~0.offset=|v_ULTIMATE.start_main_~#t427~0.offset_30|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_325, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~x~0=v_~x~0_84, ~z$read_delayed~0=v_~z$read_delayed~0_8, ~z$w_buff1~0=v_~z$w_buff1~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_103|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ULTIMATE.start_main_~#t429~0.offset=|v_ULTIMATE.start_main_~#t429~0.offset_19|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_148, ULTIMATE.start_main_~#t428~0.base=|v_ULTIMATE.start_main_~#t428~0.base_44|, ~y~0=v_~y~0_39, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_132, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_680, ~z$w_buff0~0=v_~z$w_buff0~0_229, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_218, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_44, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_167, ~weak$$choice2~0=v_~weak$$choice2~0_93, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_185} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t428~0.offset, ULTIMATE.start_main_~#t429~0.base, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t427~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ULTIMATE.start_main_~#t427~0.offset, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t429~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t428~0.base, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:59:26,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L748: Formula: (and (= ~z$r_buff1_thd0~0_Out-604784583 ~z$r_buff0_thd0~0_In-604784583) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-604784583)) (= ~z$r_buff0_thd1~0_In-604784583 ~z$r_buff1_thd1~0_Out-604784583) (= ~z$r_buff0_thd1~0_Out-604784583 1) (= ~z$r_buff1_thd2~0_Out-604784583 ~z$r_buff0_thd2~0_In-604784583) (= ~x~0_In-604784583 ~__unbuffered_p0_EAX~0_Out-604784583) (= ~z$r_buff1_thd3~0_Out-604784583 ~z$r_buff0_thd3~0_In-604784583)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-604784583, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-604784583, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-604784583, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-604784583, ~x~0=~x~0_In-604784583, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-604784583} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-604784583, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-604784583, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-604784583, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-604784583, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-604784583, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-604784583, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-604784583, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-604784583, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-604784583, ~x~0=~x~0_In-604784583, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-604784583} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:59:26,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L827-1-->L829: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t428~0.base_13|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t428~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t428~0.base_13|) |v_ULTIMATE.start_main_~#t428~0.offset_11| 1)) |v_#memory_int_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t428~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t428~0.offset_11|) (not (= 0 |v_ULTIMATE.start_main_~#t428~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t428~0.base_13| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t428~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t428~0.offset=|v_ULTIMATE.start_main_~#t428~0.offset_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t428~0.base=|v_ULTIMATE.start_main_~#t428~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t428~0.offset, #length, ULTIMATE.start_main_~#t428~0.base] because there is no mapped edge [2019-12-07 15:59:26,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-2-->L768-5: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd2~0_In-769911111 256) 0)) (.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-769911111| |P1Thread1of1ForFork2_#t~ite10_Out-769911111|)) (.cse1 (= (mod ~z$w_buff1_used~0_In-769911111 256) 0))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-769911111| ~z~0_In-769911111) (or .cse1 .cse2)) (and (not .cse2) .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-769911111| ~z$w_buff1~0_In-769911111) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-769911111, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-769911111, ~z$w_buff1~0=~z$w_buff1~0_In-769911111, ~z~0=~z~0_In-769911111} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-769911111|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-769911111, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-769911111|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-769911111, ~z$w_buff1~0=~z$w_buff1~0_In-769911111, ~z~0=~z~0_In-769911111} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:59:26,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In277747192 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In277747192 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out277747192| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out277747192| ~z$w_buff0_used~0_In277747192)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In277747192, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In277747192} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In277747192, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out277747192|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In277747192} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:59:26,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1693139219 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In1693139219 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1693139219 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In1693139219 256) 0))) (or (and (= ~z$w_buff1_used~0_In1693139219 |P1Thread1of1ForFork2_#t~ite12_Out1693139219|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1693139219|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1693139219, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1693139219, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1693139219, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1693139219} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1693139219, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1693139219, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1693139219, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1693139219|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1693139219} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:59:26,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L829-1-->L831: Formula: (and (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t429~0.base_10| 1) |v_#valid_32|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t429~0.base_10|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t429~0.base_10|) (= |v_ULTIMATE.start_main_~#t429~0.offset_9| 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t429~0.base_10| 4) |v_#length_13|) (not (= |v_ULTIMATE.start_main_~#t429~0.base_10| 0)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t429~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t429~0.base_10|) |v_ULTIMATE.start_main_~#t429~0.offset_9| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t429~0.offset=|v_ULTIMATE.start_main_~#t429~0.offset_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t429~0.base=|v_ULTIMATE.start_main_~#t429~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t429~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t429~0.base] because there is no mapped edge [2019-12-07 15:59:26,729 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L793-->L793-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-801012316 256)))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-801012316 256)))) (or (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-801012316 256))) (= 0 (mod ~z$w_buff0_used~0_In-801012316 256)) (and (= (mod ~z$w_buff1_used~0_In-801012316 256) 0) .cse0))) (= |P2Thread1of1ForFork0_#t~ite20_Out-801012316| |P2Thread1of1ForFork0_#t~ite21_Out-801012316|) .cse1 (= |P2Thread1of1ForFork0_#t~ite20_Out-801012316| ~z$w_buff0~0_In-801012316)) (and (not .cse1) (= ~z$w_buff0~0_In-801012316 |P2Thread1of1ForFork0_#t~ite21_Out-801012316|) (= |P2Thread1of1ForFork0_#t~ite20_In-801012316| |P2Thread1of1ForFork0_#t~ite20_Out-801012316|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-801012316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-801012316, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-801012316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-801012316, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-801012316, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-801012316|, ~weak$$choice2~0=~weak$$choice2~0_In-801012316} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-801012316|, ~z$w_buff0~0=~z$w_buff0~0_In-801012316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-801012316, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-801012316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-801012316, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-801012316, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-801012316|, ~weak$$choice2~0=~weak$$choice2~0_In-801012316} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:59:26,730 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L794-->L794-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1226406709 256)))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1226406709 256)))) (or (and .cse0 (= (mod ~z$w_buff1_used~0_In-1226406709 256) 0)) (and (= 0 (mod ~z$r_buff1_thd3~0_In-1226406709 256)) .cse0) (= (mod ~z$w_buff0_used~0_In-1226406709 256) 0))) (= ~z$w_buff1~0_In-1226406709 |P2Thread1of1ForFork0_#t~ite23_Out-1226406709|) .cse1 (= |P2Thread1of1ForFork0_#t~ite24_Out-1226406709| |P2Thread1of1ForFork0_#t~ite23_Out-1226406709|)) (and (= |P2Thread1of1ForFork0_#t~ite23_In-1226406709| |P2Thread1of1ForFork0_#t~ite23_Out-1226406709|) (= ~z$w_buff1~0_In-1226406709 |P2Thread1of1ForFork0_#t~ite24_Out-1226406709|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1226406709, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1226406709, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-1226406709|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1226406709, ~z$w_buff1~0=~z$w_buff1~0_In-1226406709, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1226406709, ~weak$$choice2~0=~weak$$choice2~0_In-1226406709} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1226406709, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-1226406709|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1226406709, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-1226406709|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1226406709, ~z$w_buff1~0=~z$w_buff1~0_In-1226406709, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1226406709, ~weak$$choice2~0=~weak$$choice2~0_In-1226406709} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 15:59:26,731 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L797-->L798: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_160 v_~z$r_buff0_thd3~0_161)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_161, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_6|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_160, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:59:26,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L800-->L804: Formula: (and (= v_~z~0_54 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:59:26,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L804-2-->L804-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1871856126 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1871856126 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1871856126| ~z$w_buff1~0_In1871856126) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1871856126| ~z~0_In1871856126)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1871856126, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1871856126, ~z$w_buff1~0=~z$w_buff1~0_In1871856126, ~z~0=~z~0_In1871856126} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1871856126|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1871856126, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1871856126, ~z$w_buff1~0=~z$w_buff1~0_In1871856126, ~z~0=~z~0_In1871856126} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:59:26,733 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L804-4-->L805: Formula: (= v_~z~0_30 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|, ~z~0=v_~z~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 15:59:26,733 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L805-->L805-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1005499176 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1005499176 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1005499176| ~z$w_buff0_used~0_In1005499176)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out1005499176| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1005499176, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1005499176} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1005499176, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1005499176|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1005499176} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:59:26,733 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1960205529 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1960205529 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1960205529|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd2~0_In1960205529 |P1Thread1of1ForFork2_#t~ite13_Out1960205529|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1960205529, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1960205529} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1960205529, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1960205529|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1960205529} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:59:26,734 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1361308899 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1361308899 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1361308899 |P0Thread1of1ForFork1_#t~ite5_Out-1361308899|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-1361308899|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1361308899, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1361308899} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1361308899|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1361308899, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1361308899} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:59:26,734 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In961715750 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In961715750 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In961715750 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd1~0_In961715750 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite6_Out961715750| ~z$w_buff1_used~0_In961715750) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out961715750| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In961715750, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In961715750, ~z$w_buff1_used~0=~z$w_buff1_used~0_In961715750, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In961715750} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In961715750, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out961715750|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In961715750, ~z$w_buff1_used~0=~z$w_buff1_used~0_In961715750, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In961715750} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:59:26,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L751-->L752: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In983923576 256))) (.cse0 (= ~z$r_buff0_thd1~0_In983923576 ~z$r_buff0_thd1~0_Out983923576)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In983923576 256)))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= ~z$r_buff0_thd1~0_Out983923576 0)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In983923576, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In983923576} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In983923576, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out983923576|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out983923576} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:59:26,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In2068592031 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In2068592031 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In2068592031 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In2068592031 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd1~0_In2068592031 |P0Thread1of1ForFork1_#t~ite8_Out2068592031|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out2068592031|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2068592031, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2068592031, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2068592031, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2068592031} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out2068592031|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2068592031, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2068592031, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2068592031, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2068592031} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:59:26,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd1~0_77 |v_P0Thread1of1ForFork1_#t~ite8_22|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_21|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_77, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:59:26,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-141992929 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-141992929 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-141992929 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-141992929 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-141992929 |P2Thread1of1ForFork0_#t~ite41_Out-141992929|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-141992929|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-141992929, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-141992929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-141992929, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-141992929} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-141992929, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-141992929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-141992929, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-141992929, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-141992929|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:59:26,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L807-->L807-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In2130624202 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In2130624202 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out2130624202| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out2130624202| ~z$r_buff0_thd3~0_In2130624202) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2130624202, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2130624202} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2130624202, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2130624202, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2130624202|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:59:26,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L808-->L808-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In623406035 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In623406035 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In623406035 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In623406035 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out623406035| ~z$r_buff1_thd3~0_In623406035) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out623406035|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In623406035, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In623406035, ~z$w_buff1_used~0=~z$w_buff1_used~0_In623406035, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In623406035} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out623406035|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In623406035, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In623406035, ~z$w_buff1_used~0=~z$w_buff1_used~0_In623406035, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In623406035} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:59:26,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L808-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_131 |v_P2Thread1of1ForFork0_#t~ite43_24|) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_23|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_131, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:59:26,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L772-->L772-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In444945840 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In444945840 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In444945840 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In444945840 256) 0))) (or (and (= ~z$r_buff1_thd2~0_In444945840 |P1Thread1of1ForFork2_#t~ite14_Out444945840|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out444945840| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In444945840, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In444945840, ~z$w_buff1_used~0=~z$w_buff1_used~0_In444945840, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In444945840} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In444945840, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In444945840, ~z$w_buff1_used~0=~z$w_buff1_used~0_In444945840, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out444945840|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In444945840} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:59:26,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_24| v_~z$r_buff1_thd2~0_56) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_24|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_23|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:59:26,737 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L835-->L837-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd0~0_51 256)) (= 0 (mod v_~z$w_buff0_used~0_293 256))) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 15:59:26,737 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L837-2-->L837-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In980662089 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In980662089 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out980662089| ~z~0_In980662089)) (and (= |ULTIMATE.start_main_#t~ite47_Out980662089| ~z$w_buff1~0_In980662089) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In980662089, ~z$w_buff1_used~0=~z$w_buff1_used~0_In980662089, ~z$w_buff1~0=~z$w_buff1~0_In980662089, ~z~0=~z~0_In980662089} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In980662089, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out980662089|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In980662089, ~z$w_buff1~0=~z$w_buff1~0_In980662089, ~z~0=~z~0_In980662089} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 15:59:26,737 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L837-4-->L838: Formula: (= v_~z~0_20 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_14|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 15:59:26,737 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L838-->L838-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-2120991976 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-2120991976 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-2120991976|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-2120991976 |ULTIMATE.start_main_#t~ite49_Out-2120991976|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2120991976, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2120991976} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2120991976, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2120991976, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2120991976|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:59:26,737 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L839-->L839-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1734007433 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1734007433 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1734007433 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1734007433 256) 0))) (or (and (= ~z$w_buff1_used~0_In-1734007433 |ULTIMATE.start_main_#t~ite50_Out-1734007433|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-1734007433|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1734007433, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1734007433, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1734007433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1734007433} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1734007433|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1734007433, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1734007433, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1734007433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1734007433} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:59:26,738 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L840-->L840-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-2094270003 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-2094270003 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-2094270003|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-2094270003 |ULTIMATE.start_main_#t~ite51_Out-2094270003|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2094270003, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2094270003} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2094270003, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-2094270003|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2094270003} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:59:26,738 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L841-->L841-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In2147095293 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In2147095293 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In2147095293 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In2147095293 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out2147095293| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out2147095293| ~z$r_buff1_thd0~0_In2147095293)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2147095293, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2147095293, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2147095293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2147095293} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out2147095293|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2147095293, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2147095293, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2147095293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2147095293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:59:26,738 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] L841-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_23 256)) (= v_~z$r_buff1_thd0~0_123 |v_ULTIMATE.start_main_#t~ite52_43|) (= v_~main$tmp_guard1~0_23 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_72) (= v_~__unbuffered_p2_EBX~0_32 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:59:26,797 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:59:26 BasicIcfg [2019-12-07 15:59:26,798 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:59:26,798 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:59:26,798 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:59:26,798 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:59:26,799 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:57:42" (3/4) ... [2019-12-07 15:59:26,801 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:59:26,801 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= v_~z$r_buff1_thd1~0_114 0) (= 0 |v_ULTIMATE.start_main_~#t427~0.offset_30|) (= v_~main$tmp_guard1~0_44 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~z$r_buff0_thd3~0_325) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t427~0.base_44| 4) |v_#length_23|) (= v_~z$mem_tmp~0_16 0) (= 0 v_~z$r_buff1_thd3~0_218) (= |v_#NULL.offset_3| 0) (= v_~z$read_delayed~0_8 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t427~0.base_44|)) (= (store .cse0 |v_ULTIMATE.start_main_~#t427~0.base_44| 1) |v_#valid_71|) (= 0 v_~weak$$choice0~0_15) (= v_~z$w_buff1~0_167 0) (= v_~z$r_buff0_thd0~0_136 0) (= v_~x~0_84 0) (= v_~z$r_buff0_thd1~0_185 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~__unbuffered_p2_EAX~0_46) (= 0 v_~weak$$choice2~0_93) (= 0 v_~__unbuffered_p1_EAX~0_60) (= v_~z$w_buff0~0_229 0) (= 0 v_~__unbuffered_p0_EAX~0_95) (= 0 v_~__unbuffered_cnt~0_63) (= v_~z$r_buff0_thd2~0_132 0) (= v_~z~0_167 0) (= v_~main$tmp_guard0~0_44 0) (= v_~y~0_39 0) (= v_~z$w_buff1_used~0_386 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t427~0.base_44|) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~z$r_buff1_thd0~0_148 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t427~0.base_44| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t427~0.base_44|) |v_ULTIMATE.start_main_~#t427~0.offset_30| 0)) |v_#memory_int_21|) (= 0 |v_#NULL.base_3|) (= v_~z$w_buff0_used~0_680 0) (= v_~z$r_buff1_thd2~0_108 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_108, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_86|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_44|, ULTIMATE.start_main_~#t428~0.offset=|v_ULTIMATE.start_main_~#t428~0.offset_30|, ULTIMATE.start_main_~#t429~0.base=|v_ULTIMATE.start_main_~#t429~0.base_24|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_140|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_82|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_136, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_95, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_60, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_~#t427~0.base=|v_ULTIMATE.start_main_~#t427~0.base_44|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_386, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_114, ULTIMATE.start_main_~#t427~0.offset=|v_ULTIMATE.start_main_~#t427~0.offset_30|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_325, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~x~0=v_~x~0_84, ~z$read_delayed~0=v_~z$read_delayed~0_8, ~z$w_buff1~0=v_~z$w_buff1~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_103|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ULTIMATE.start_main_~#t429~0.offset=|v_ULTIMATE.start_main_~#t429~0.offset_19|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_148, ULTIMATE.start_main_~#t428~0.base=|v_ULTIMATE.start_main_~#t428~0.base_44|, ~y~0=v_~y~0_39, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_132, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_680, ~z$w_buff0~0=v_~z$w_buff0~0_229, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_218, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_44, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_167, ~weak$$choice2~0=v_~weak$$choice2~0_93, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_185} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t428~0.offset, ULTIMATE.start_main_~#t429~0.base, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t427~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ULTIMATE.start_main_~#t427~0.offset, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t429~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t428~0.base, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:59:26,802 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L748: Formula: (and (= ~z$r_buff1_thd0~0_Out-604784583 ~z$r_buff0_thd0~0_In-604784583) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-604784583)) (= ~z$r_buff0_thd1~0_In-604784583 ~z$r_buff1_thd1~0_Out-604784583) (= ~z$r_buff0_thd1~0_Out-604784583 1) (= ~z$r_buff1_thd2~0_Out-604784583 ~z$r_buff0_thd2~0_In-604784583) (= ~x~0_In-604784583 ~__unbuffered_p0_EAX~0_Out-604784583) (= ~z$r_buff1_thd3~0_Out-604784583 ~z$r_buff0_thd3~0_In-604784583)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-604784583, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-604784583, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-604784583, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-604784583, ~x~0=~x~0_In-604784583, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-604784583} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-604784583, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-604784583, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-604784583, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-604784583, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-604784583, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-604784583, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-604784583, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-604784583, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-604784583, ~x~0=~x~0_In-604784583, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-604784583} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:59:26,802 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L827-1-->L829: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t428~0.base_13|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t428~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t428~0.base_13|) |v_ULTIMATE.start_main_~#t428~0.offset_11| 1)) |v_#memory_int_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t428~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t428~0.offset_11|) (not (= 0 |v_ULTIMATE.start_main_~#t428~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t428~0.base_13| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t428~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t428~0.offset=|v_ULTIMATE.start_main_~#t428~0.offset_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t428~0.base=|v_ULTIMATE.start_main_~#t428~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t428~0.offset, #length, ULTIMATE.start_main_~#t428~0.base] because there is no mapped edge [2019-12-07 15:59:26,803 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-2-->L768-5: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd2~0_In-769911111 256) 0)) (.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-769911111| |P1Thread1of1ForFork2_#t~ite10_Out-769911111|)) (.cse1 (= (mod ~z$w_buff1_used~0_In-769911111 256) 0))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-769911111| ~z~0_In-769911111) (or .cse1 .cse2)) (and (not .cse2) .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-769911111| ~z$w_buff1~0_In-769911111) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-769911111, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-769911111, ~z$w_buff1~0=~z$w_buff1~0_In-769911111, ~z~0=~z~0_In-769911111} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-769911111|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-769911111, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-769911111|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-769911111, ~z$w_buff1~0=~z$w_buff1~0_In-769911111, ~z~0=~z~0_In-769911111} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:59:26,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In277747192 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In277747192 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out277747192| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out277747192| ~z$w_buff0_used~0_In277747192)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In277747192, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In277747192} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In277747192, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out277747192|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In277747192} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:59:26,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1693139219 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In1693139219 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1693139219 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In1693139219 256) 0))) (or (and (= ~z$w_buff1_used~0_In1693139219 |P1Thread1of1ForFork2_#t~ite12_Out1693139219|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1693139219|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1693139219, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1693139219, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1693139219, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1693139219} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1693139219, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1693139219, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1693139219, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1693139219|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1693139219} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:59:26,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L829-1-->L831: Formula: (and (= (store |v_#valid_33| |v_ULTIMATE.start_main_~#t429~0.base_10| 1) |v_#valid_32|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t429~0.base_10|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t429~0.base_10|) (= |v_ULTIMATE.start_main_~#t429~0.offset_9| 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t429~0.base_10| 4) |v_#length_13|) (not (= |v_ULTIMATE.start_main_~#t429~0.base_10| 0)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t429~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t429~0.base_10|) |v_ULTIMATE.start_main_~#t429~0.offset_9| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t429~0.offset=|v_ULTIMATE.start_main_~#t429~0.offset_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t429~0.base=|v_ULTIMATE.start_main_~#t429~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t429~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t429~0.base] because there is no mapped edge [2019-12-07 15:59:26,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L793-->L793-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-801012316 256)))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-801012316 256)))) (or (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-801012316 256))) (= 0 (mod ~z$w_buff0_used~0_In-801012316 256)) (and (= (mod ~z$w_buff1_used~0_In-801012316 256) 0) .cse0))) (= |P2Thread1of1ForFork0_#t~ite20_Out-801012316| |P2Thread1of1ForFork0_#t~ite21_Out-801012316|) .cse1 (= |P2Thread1of1ForFork0_#t~ite20_Out-801012316| ~z$w_buff0~0_In-801012316)) (and (not .cse1) (= ~z$w_buff0~0_In-801012316 |P2Thread1of1ForFork0_#t~ite21_Out-801012316|) (= |P2Thread1of1ForFork0_#t~ite20_In-801012316| |P2Thread1of1ForFork0_#t~ite20_Out-801012316|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-801012316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-801012316, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-801012316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-801012316, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-801012316, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-801012316|, ~weak$$choice2~0=~weak$$choice2~0_In-801012316} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-801012316|, ~z$w_buff0~0=~z$w_buff0~0_In-801012316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-801012316, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-801012316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-801012316, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-801012316, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-801012316|, ~weak$$choice2~0=~weak$$choice2~0_In-801012316} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:59:26,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L794-->L794-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-1226406709 256)))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1226406709 256)))) (or (and .cse0 (= (mod ~z$w_buff1_used~0_In-1226406709 256) 0)) (and (= 0 (mod ~z$r_buff1_thd3~0_In-1226406709 256)) .cse0) (= (mod ~z$w_buff0_used~0_In-1226406709 256) 0))) (= ~z$w_buff1~0_In-1226406709 |P2Thread1of1ForFork0_#t~ite23_Out-1226406709|) .cse1 (= |P2Thread1of1ForFork0_#t~ite24_Out-1226406709| |P2Thread1of1ForFork0_#t~ite23_Out-1226406709|)) (and (= |P2Thread1of1ForFork0_#t~ite23_In-1226406709| |P2Thread1of1ForFork0_#t~ite23_Out-1226406709|) (= ~z$w_buff1~0_In-1226406709 |P2Thread1of1ForFork0_#t~ite24_Out-1226406709|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1226406709, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1226406709, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-1226406709|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1226406709, ~z$w_buff1~0=~z$w_buff1~0_In-1226406709, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1226406709, ~weak$$choice2~0=~weak$$choice2~0_In-1226406709} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1226406709, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-1226406709|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1226406709, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-1226406709|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1226406709, ~z$w_buff1~0=~z$w_buff1~0_In-1226406709, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1226406709, ~weak$$choice2~0=~weak$$choice2~0_In-1226406709} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 15:59:26,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L797-->L798: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_160 v_~z$r_buff0_thd3~0_161)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_161, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_6|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_160, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:59:26,812 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L800-->L804: Formula: (and (= v_~z~0_54 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:59:26,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L804-2-->L804-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1871856126 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1871856126 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1871856126| ~z$w_buff1~0_In1871856126) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1871856126| ~z~0_In1871856126)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1871856126, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1871856126, ~z$w_buff1~0=~z$w_buff1~0_In1871856126, ~z~0=~z~0_In1871856126} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1871856126|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1871856126, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1871856126, ~z$w_buff1~0=~z$w_buff1~0_In1871856126, ~z~0=~z~0_In1871856126} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:59:26,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L804-4-->L805: Formula: (= v_~z~0_30 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|, ~z~0=v_~z~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 15:59:26,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L805-->L805-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1005499176 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1005499176 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1005499176| ~z$w_buff0_used~0_In1005499176)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out1005499176| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1005499176, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1005499176} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1005499176, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1005499176|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1005499176} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:59:26,814 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1960205529 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1960205529 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1960205529|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd2~0_In1960205529 |P1Thread1of1ForFork2_#t~ite13_Out1960205529|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1960205529, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1960205529} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1960205529, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1960205529|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1960205529} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:59:26,815 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1361308899 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1361308899 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1361308899 |P0Thread1of1ForFork1_#t~ite5_Out-1361308899|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-1361308899|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1361308899, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1361308899} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1361308899|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1361308899, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1361308899} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:59:26,816 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In961715750 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In961715750 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In961715750 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd1~0_In961715750 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite6_Out961715750| ~z$w_buff1_used~0_In961715750) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out961715750| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In961715750, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In961715750, ~z$w_buff1_used~0=~z$w_buff1_used~0_In961715750, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In961715750} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In961715750, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out961715750|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In961715750, ~z$w_buff1_used~0=~z$w_buff1_used~0_In961715750, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In961715750} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:59:26,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L751-->L752: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In983923576 256))) (.cse0 (= ~z$r_buff0_thd1~0_In983923576 ~z$r_buff0_thd1~0_Out983923576)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In983923576 256)))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= ~z$r_buff0_thd1~0_Out983923576 0)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In983923576, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In983923576} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In983923576, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out983923576|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out983923576} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:59:26,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L752-->L752-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In2068592031 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In2068592031 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In2068592031 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In2068592031 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd1~0_In2068592031 |P0Thread1of1ForFork1_#t~ite8_Out2068592031|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out2068592031|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2068592031, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2068592031, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2068592031, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2068592031} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out2068592031|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2068592031, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2068592031, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2068592031, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2068592031} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:59:26,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd1~0_77 |v_P0Thread1of1ForFork1_#t~ite8_22|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_21|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_77, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:59:26,818 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-141992929 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-141992929 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-141992929 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-141992929 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-141992929 |P2Thread1of1ForFork0_#t~ite41_Out-141992929|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-141992929|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-141992929, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-141992929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-141992929, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-141992929} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-141992929, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-141992929, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-141992929, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-141992929, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-141992929|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:59:26,818 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L807-->L807-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In2130624202 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In2130624202 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out2130624202| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out2130624202| ~z$r_buff0_thd3~0_In2130624202) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2130624202, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2130624202} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2130624202, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2130624202, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2130624202|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:59:26,819 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L808-->L808-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In623406035 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In623406035 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In623406035 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In623406035 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out623406035| ~z$r_buff1_thd3~0_In623406035) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out623406035|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In623406035, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In623406035, ~z$w_buff1_used~0=~z$w_buff1_used~0_In623406035, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In623406035} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out623406035|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In623406035, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In623406035, ~z$w_buff1_used~0=~z$w_buff1_used~0_In623406035, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In623406035} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:59:26,819 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L808-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_131 |v_P2Thread1of1ForFork0_#t~ite43_24|) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_23|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_131, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:59:26,819 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L772-->L772-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In444945840 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In444945840 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In444945840 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In444945840 256) 0))) (or (and (= ~z$r_buff1_thd2~0_In444945840 |P1Thread1of1ForFork2_#t~ite14_Out444945840|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out444945840| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In444945840, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In444945840, ~z$w_buff1_used~0=~z$w_buff1_used~0_In444945840, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In444945840} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In444945840, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In444945840, ~z$w_buff1_used~0=~z$w_buff1_used~0_In444945840, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out444945840|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In444945840} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:59:26,819 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_24| v_~z$r_buff1_thd2~0_56) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_24|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_23|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:59:26,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L835-->L837-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd0~0_51 256)) (= 0 (mod v_~z$w_buff0_used~0_293 256))) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 15:59:26,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L837-2-->L837-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In980662089 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In980662089 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out980662089| ~z~0_In980662089)) (and (= |ULTIMATE.start_main_#t~ite47_Out980662089| ~z$w_buff1~0_In980662089) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In980662089, ~z$w_buff1_used~0=~z$w_buff1_used~0_In980662089, ~z$w_buff1~0=~z$w_buff1~0_In980662089, ~z~0=~z~0_In980662089} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In980662089, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out980662089|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In980662089, ~z$w_buff1~0=~z$w_buff1~0_In980662089, ~z~0=~z~0_In980662089} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 15:59:26,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L837-4-->L838: Formula: (= v_~z~0_20 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_14|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 15:59:26,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L838-->L838-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-2120991976 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-2120991976 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-2120991976|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-2120991976 |ULTIMATE.start_main_#t~ite49_Out-2120991976|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2120991976, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2120991976} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2120991976, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2120991976, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-2120991976|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:59:26,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L839-->L839-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1734007433 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1734007433 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1734007433 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1734007433 256) 0))) (or (and (= ~z$w_buff1_used~0_In-1734007433 |ULTIMATE.start_main_#t~ite50_Out-1734007433|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-1734007433|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1734007433, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1734007433, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1734007433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1734007433} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1734007433|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1734007433, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1734007433, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1734007433, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1734007433} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:59:26,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L840-->L840-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-2094270003 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-2094270003 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-2094270003|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-2094270003 |ULTIMATE.start_main_#t~ite51_Out-2094270003|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2094270003, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2094270003} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2094270003, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-2094270003|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2094270003} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:59:26,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L841-->L841-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In2147095293 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In2147095293 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In2147095293 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In2147095293 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out2147095293| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out2147095293| ~z$r_buff1_thd0~0_In2147095293)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2147095293, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2147095293, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2147095293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2147095293} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out2147095293|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2147095293, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2147095293, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2147095293, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2147095293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:59:26,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] L841-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_23 256)) (= v_~z$r_buff1_thd0~0_123 |v_ULTIMATE.start_main_#t~ite52_43|) (= v_~main$tmp_guard1~0_23 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_72) (= v_~__unbuffered_p2_EBX~0_32 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:59:26,887 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_10e71288-a43c-485c-888c-b3bd81b7b42e/bin/uautomizer/witness.graphml [2019-12-07 15:59:26,887 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:59:26,889 INFO L168 Benchmark]: Toolchain (without parser) took 105043.84 ms. Allocated memory was 1.0 GB in the beginning and 7.6 GB in the end (delta: 6.6 GB). Free memory was 942.4 MB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 15:59:26,889 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 962.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:59:26,890 INFO L168 Benchmark]: CACSL2BoogieTranslator took 400.25 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -166.3 MB). Peak memory consumption was 22.7 MB. Max. memory is 11.5 GB. [2019-12-07 15:59:26,890 INFO L168 Benchmark]: Boogie Procedure Inliner took 47.34 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:59:26,890 INFO L168 Benchmark]: Boogie Preprocessor took 28.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.2 MB). Peak memory consumption was 2.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:59:26,891 INFO L168 Benchmark]: RCFGBuilder took 407.23 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 59.7 MB). Peak memory consumption was 59.7 MB. Max. memory is 11.5 GB. [2019-12-07 15:59:26,891 INFO L168 Benchmark]: TraceAbstraction took 104067.20 ms. Allocated memory was 1.2 GB in the beginning and 7.6 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 15:59:26,891 INFO L168 Benchmark]: Witness Printer took 89.68 ms. Allocated memory is still 7.6 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 42.1 MB). Peak memory consumption was 42.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:59:26,893 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 962.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 400.25 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.0 MB). Free memory was 942.4 MB in the beginning and 1.1 GB in the end (delta: -166.3 MB). Peak memory consumption was 22.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 47.34 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.83 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.2 MB). Peak memory consumption was 2.2 MB. Max. memory is 11.5 GB. * RCFGBuilder took 407.23 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 59.7 MB). Peak memory consumption was 59.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 104067.20 ms. Allocated memory was 1.2 GB in the beginning and 7.6 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 89.68 ms. Allocated memory is still 7.6 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 42.1 MB). Peak memory consumption was 42.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 101 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 51 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 32 ChoiceCompositions, 7082 VarBasedMoverChecksPositive, 219 VarBasedMoverChecksNegative, 19 SemBasedMoverChecksPositive, 262 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 89688 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L827] FCALL, FORK 0 pthread_create(&t427, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 1 z$w_buff1 = z$w_buff0 [L734] 1 z$w_buff0 = 1 [L735] 1 z$w_buff1_used = z$w_buff0_used [L736] 1 z$w_buff0_used = (_Bool)1 [L829] FCALL, FORK 0 pthread_create(&t428, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L762] 2 x = 1 [L765] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L769] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L831] FCALL, FORK 0 pthread_create(&t429, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L782] 3 y = 1 [L785] 3 __unbuffered_p2_EAX = y [L788] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L789] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L790] 3 z$flush_delayed = weak$$choice2 [L791] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L792] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L792] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L793] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L794] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L795] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L798] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L799] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L804] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L770] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L771] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L748] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L748] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L749] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L750] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L806] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L807] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L833] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L838] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L839] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L840] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 103.9s, OverallIterations: 25, TraceHistogramMax: 1, AutomataDifference: 16.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4007 SDtfs, 4648 SDslu, 7018 SDs, 0 SdLazy, 4288 SolverSat, 192 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 157 GetRequests, 31 SyntacticMatches, 15 SemanticMatches, 111 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=183252occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 70.3s AutomataMinimizationTime, 24 MinimizatonAttempts, 240135 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 714 NumberOfCodeBlocks, 714 NumberOfCodeBlocksAsserted, 25 NumberOfCheckSat, 623 ConstructedInterpolants, 0 QuantifiedInterpolants, 102774 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 24 InterpolantComputations, 24 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...