./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix017_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix017_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 11c50d08e8481b350dfcaad1c8d1e849db14914e .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:58:02,624 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:58:02,625 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:58:02,633 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:58:02,633 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:58:02,634 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:58:02,635 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:58:02,636 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:58:02,637 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:58:02,638 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:58:02,638 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:58:02,639 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:58:02,640 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:58:02,640 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:58:02,641 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:58:02,642 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:58:02,642 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:58:02,643 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:58:02,645 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:58:02,646 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:58:02,647 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:58:02,648 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:58:02,649 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:58:02,649 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:58:02,651 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:58:02,652 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:58:02,652 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:58:02,652 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:58:02,653 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:58:02,653 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:58:02,653 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:58:02,654 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:58:02,654 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:58:02,655 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:58:02,655 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:58:02,655 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:58:02,656 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:58:02,656 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:58:02,656 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:58:02,657 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:58:02,657 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:58:02,657 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:58:02,667 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:58:02,667 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:58:02,668 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:58:02,668 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:58:02,668 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:58:02,668 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:58:02,668 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:58:02,668 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:58:02,668 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:58:02,669 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:58:02,669 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:58:02,669 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:58:02,669 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:58:02,669 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:58:02,669 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:58:02,669 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:58:02,669 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:58:02,670 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:58:02,670 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:58:02,670 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:58:02,670 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:58:02,670 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:58:02,670 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:58:02,670 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:58:02,671 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:58:02,671 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:58:02,671 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:58:02,671 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:58:02,671 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:58:02,671 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 11c50d08e8481b350dfcaad1c8d1e849db14914e [2019-12-07 12:58:02,775 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:58:02,783 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:58:02,785 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:58:02,786 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:58:02,786 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:58:02,787 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix017_power.opt.i [2019-12-07 12:58:02,824 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/data/86a33ee57/294ce73ea8214e50b918261c345e48ca/FLAG2922566e1 [2019-12-07 12:58:03,273 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:58:03,273 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/sv-benchmarks/c/pthread-wmm/mix017_power.opt.i [2019-12-07 12:58:03,283 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/data/86a33ee57/294ce73ea8214e50b918261c345e48ca/FLAG2922566e1 [2019-12-07 12:58:03,291 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/data/86a33ee57/294ce73ea8214e50b918261c345e48ca [2019-12-07 12:58:03,293 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:58:03,294 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:58:03,294 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:58:03,294 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:58:03,297 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:58:03,297 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,299 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03, skipping insertion in model container [2019-12-07 12:58:03,299 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,303 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:58:03,331 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:58:03,583 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:58:03,591 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:58:03,635 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:58:03,683 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:58:03,683 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03 WrapperNode [2019-12-07 12:58:03,683 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:58:03,684 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:58:03,684 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:58:03,684 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:58:03,690 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,703 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,723 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:58:03,724 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:58:03,724 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:58:03,724 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:58:03,731 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,731 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,734 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,735 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,742 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,744 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,747 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... [2019-12-07 12:58:03,750 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:58:03,750 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:58:03,750 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:58:03,751 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:58:03,751 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:58:03,791 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:58:03,791 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:58:03,791 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:58:03,791 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:58:03,791 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:58:03,791 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:58:03,792 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:58:03,792 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:58:03,792 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:58:03,792 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:58:03,792 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 12:58:03,792 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 12:58:03,792 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:58:03,792 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:58:03,792 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:58:03,793 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:58:04,165 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:58:04,165 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:58:04,166 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:58:04 BoogieIcfgContainer [2019-12-07 12:58:04,166 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:58:04,167 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:58:04,167 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:58:04,169 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:58:04,169 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:58:03" (1/3) ... [2019-12-07 12:58:04,170 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c09a417 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:58:04, skipping insertion in model container [2019-12-07 12:58:04,170 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:58:03" (2/3) ... [2019-12-07 12:58:04,170 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c09a417 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:58:04, skipping insertion in model container [2019-12-07 12:58:04,170 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:58:04" (3/3) ... [2019-12-07 12:58:04,171 INFO L109 eAbstractionObserver]: Analyzing ICFG mix017_power.opt.i [2019-12-07 12:58:04,178 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:58:04,178 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:58:04,183 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:58:04,184 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:58:04,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,214 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,214 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,214 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,215 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,215 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,216 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,216 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,216 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,216 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,216 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,216 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,216 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,216 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,217 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,218 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,218 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,218 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,218 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,218 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,218 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,218 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,219 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,220 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,221 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,222 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,223 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,224 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,231 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,231 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,231 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,231 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,231 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,235 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,235 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,235 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,235 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,235 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,235 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,236 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,236 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,236 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,236 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,236 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,236 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,236 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,236 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,237 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,237 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,237 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,237 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,237 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,237 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,238 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,238 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,238 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,238 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,238 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,238 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,238 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,238 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,239 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,239 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:58:04,254 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 12:58:04,268 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:58:04,268 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:58:04,268 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:58:04,268 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:58:04,268 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:58:04,268 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:58:04,268 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:58:04,268 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:58:04,280 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 182 places, 210 transitions [2019-12-07 12:58:04,281 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 12:58:04,342 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 12:58:04,342 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:58:04,352 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 715 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 12:58:04,369 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 12:58:04,397 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 12:58:04,397 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:58:04,402 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 715 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 12:58:04,418 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18126 [2019-12-07 12:58:04,419 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:58:07,686 WARN L192 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 49 [2019-12-07 12:58:07,953 WARN L192 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 99 [2019-12-07 12:58:08,052 INFO L206 etLargeBlockEncoding]: Checked pairs total: 72619 [2019-12-07 12:58:08,052 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 12:58:08,055 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 88 places, 92 transitions [2019-12-07 12:58:33,950 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 160086 states. [2019-12-07 12:58:33,952 INFO L276 IsEmpty]: Start isEmpty. Operand 160086 states. [2019-12-07 12:58:33,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 12:58:33,956 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:58:33,957 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:58:33,957 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:58:33,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:58:33,961 INFO L82 PathProgramCache]: Analyzing trace with hash 1489169700, now seen corresponding path program 1 times [2019-12-07 12:58:33,966 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:58:33,966 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111748049] [2019-12-07 12:58:33,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:58:34,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:58:34,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:58:34,112 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111748049] [2019-12-07 12:58:34,112 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:58:34,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:58:34,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671388934] [2019-12-07 12:58:34,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:58:34,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:58:34,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:58:34,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:58:34,126 INFO L87 Difference]: Start difference. First operand 160086 states. Second operand 3 states. [2019-12-07 12:58:35,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:58:35,237 INFO L93 Difference]: Finished difference Result 158106 states and 752394 transitions. [2019-12-07 12:58:35,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:58:35,238 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 12:58:35,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:58:35,924 INFO L225 Difference]: With dead ends: 158106 [2019-12-07 12:58:35,924 INFO L226 Difference]: Without dead ends: 149058 [2019-12-07 12:58:35,925 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:58:43,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149058 states. [2019-12-07 12:58:45,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149058 to 149058. [2019-12-07 12:58:45,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149058 states. [2019-12-07 12:58:46,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149058 states to 149058 states and 708428 transitions. [2019-12-07 12:58:46,006 INFO L78 Accepts]: Start accepts. Automaton has 149058 states and 708428 transitions. Word has length 7 [2019-12-07 12:58:46,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:58:46,007 INFO L462 AbstractCegarLoop]: Abstraction has 149058 states and 708428 transitions. [2019-12-07 12:58:46,007 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:58:46,007 INFO L276 IsEmpty]: Start isEmpty. Operand 149058 states and 708428 transitions. [2019-12-07 12:58:46,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 12:58:46,017 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:58:46,018 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:58:46,018 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:58:46,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:58:46,018 INFO L82 PathProgramCache]: Analyzing trace with hash 1593754123, now seen corresponding path program 1 times [2019-12-07 12:58:46,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:58:46,018 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670921924] [2019-12-07 12:58:46,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:58:46,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:58:46,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:58:46,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670921924] [2019-12-07 12:58:46,081 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:58:46,082 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:58:46,082 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2018855684] [2019-12-07 12:58:46,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:58:46,083 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:58:46,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:58:46,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:58:46,083 INFO L87 Difference]: Start difference. First operand 149058 states and 708428 transitions. Second operand 4 states. [2019-12-07 12:58:47,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:58:47,725 INFO L93 Difference]: Finished difference Result 235386 states and 1077036 transitions. [2019-12-07 12:58:47,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:58:47,726 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 12:58:47,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:58:48,396 INFO L225 Difference]: With dead ends: 235386 [2019-12-07 12:58:48,397 INFO L226 Difference]: Without dead ends: 235190 [2019-12-07 12:58:48,397 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:58:57,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235190 states. [2019-12-07 12:59:00,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235190 to 218838. [2019-12-07 12:59:00,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218838 states. [2019-12-07 12:59:01,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218838 states to 218838 states and 1009170 transitions. [2019-12-07 12:59:01,393 INFO L78 Accepts]: Start accepts. Automaton has 218838 states and 1009170 transitions. Word has length 15 [2019-12-07 12:59:01,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:59:01,394 INFO L462 AbstractCegarLoop]: Abstraction has 218838 states and 1009170 transitions. [2019-12-07 12:59:01,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:59:01,394 INFO L276 IsEmpty]: Start isEmpty. Operand 218838 states and 1009170 transitions. [2019-12-07 12:59:01,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 12:59:01,397 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:59:01,398 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:59:01,398 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:59:01,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:59:01,398 INFO L82 PathProgramCache]: Analyzing trace with hash -314430534, now seen corresponding path program 1 times [2019-12-07 12:59:01,398 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:59:01,398 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813550355] [2019-12-07 12:59:01,398 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:59:01,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:59:01,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:59:01,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813550355] [2019-12-07 12:59:01,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:59:01,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:59:01,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [374719190] [2019-12-07 12:59:01,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:59:01,463 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:59:01,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:59:01,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:59:01,464 INFO L87 Difference]: Start difference. First operand 218838 states and 1009170 transitions. Second operand 4 states. [2019-12-07 12:59:06,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:59:06,501 INFO L93 Difference]: Finished difference Result 303492 states and 1373977 transitions. [2019-12-07 12:59:06,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:59:06,502 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 12:59:06,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:59:07,372 INFO L225 Difference]: With dead ends: 303492 [2019-12-07 12:59:07,372 INFO L226 Difference]: Without dead ends: 303268 [2019-12-07 12:59:07,372 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:59:15,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303268 states. [2019-12-07 12:59:18,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303268 to 258620. [2019-12-07 12:59:18,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258620 states. [2019-12-07 12:59:20,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258620 states to 258620 states and 1186875 transitions. [2019-12-07 12:59:20,199 INFO L78 Accepts]: Start accepts. Automaton has 258620 states and 1186875 transitions. Word has length 15 [2019-12-07 12:59:20,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:59:20,199 INFO L462 AbstractCegarLoop]: Abstraction has 258620 states and 1186875 transitions. [2019-12-07 12:59:20,199 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:59:20,199 INFO L276 IsEmpty]: Start isEmpty. Operand 258620 states and 1186875 transitions. [2019-12-07 12:59:20,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 12:59:20,205 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:59:20,205 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:59:20,205 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:59:20,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:59:20,205 INFO L82 PathProgramCache]: Analyzing trace with hash 24118251, now seen corresponding path program 1 times [2019-12-07 12:59:20,205 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:59:20,206 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612647087] [2019-12-07 12:59:20,206 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:59:20,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:59:20,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:59:20,258 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612647087] [2019-12-07 12:59:20,258 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:59:20,258 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:59:20,258 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [504245990] [2019-12-07 12:59:20,259 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:59:20,259 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:59:20,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:59:20,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:59:20,259 INFO L87 Difference]: Start difference. First operand 258620 states and 1186875 transitions. Second operand 4 states. [2019-12-07 12:59:22,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:59:22,526 INFO L93 Difference]: Finished difference Result 318782 states and 1453762 transitions. [2019-12-07 12:59:22,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:59:22,527 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 12:59:22,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:59:23,436 INFO L225 Difference]: With dead ends: 318782 [2019-12-07 12:59:23,436 INFO L226 Difference]: Without dead ends: 318590 [2019-12-07 12:59:23,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:59:31,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318590 states. [2019-12-07 12:59:38,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318590 to 272736. [2019-12-07 12:59:38,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272736 states. [2019-12-07 12:59:40,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272736 states to 272736 states and 1251733 transitions. [2019-12-07 12:59:40,151 INFO L78 Accepts]: Start accepts. Automaton has 272736 states and 1251733 transitions. Word has length 16 [2019-12-07 12:59:40,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:59:40,151 INFO L462 AbstractCegarLoop]: Abstraction has 272736 states and 1251733 transitions. [2019-12-07 12:59:40,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:59:40,151 INFO L276 IsEmpty]: Start isEmpty. Operand 272736 states and 1251733 transitions. [2019-12-07 12:59:40,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 12:59:40,169 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:59:40,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:59:40,170 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:59:40,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:59:40,170 INFO L82 PathProgramCache]: Analyzing trace with hash 481033317, now seen corresponding path program 1 times [2019-12-07 12:59:40,170 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:59:40,170 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243164893] [2019-12-07 12:59:40,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:59:40,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:59:40,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:59:40,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [243164893] [2019-12-07 12:59:40,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:59:40,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:59:40,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [344195630] [2019-12-07 12:59:40,220 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:59:40,220 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:59:40,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:59:40,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:59:40,221 INFO L87 Difference]: Start difference. First operand 272736 states and 1251733 transitions. Second operand 3 states. [2019-12-07 12:59:41,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:59:41,918 INFO L93 Difference]: Finished difference Result 257256 states and 1169111 transitions. [2019-12-07 12:59:41,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:59:41,918 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 12:59:41,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:59:42,636 INFO L225 Difference]: With dead ends: 257256 [2019-12-07 12:59:42,636 INFO L226 Difference]: Without dead ends: 257256 [2019-12-07 12:59:42,637 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:59:52,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257256 states. [2019-12-07 12:59:55,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257256 to 253496. [2019-12-07 12:59:55,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253496 states. [2019-12-07 12:59:56,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253496 states to 253496 states and 1152927 transitions. [2019-12-07 12:59:56,866 INFO L78 Accepts]: Start accepts. Automaton has 253496 states and 1152927 transitions. Word has length 20 [2019-12-07 12:59:56,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:59:56,866 INFO L462 AbstractCegarLoop]: Abstraction has 253496 states and 1152927 transitions. [2019-12-07 12:59:56,866 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:59:56,866 INFO L276 IsEmpty]: Start isEmpty. Operand 253496 states and 1152927 transitions. [2019-12-07 12:59:56,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 12:59:56,881 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:59:56,881 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:59:56,881 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:59:56,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:59:56,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1780429858, now seen corresponding path program 1 times [2019-12-07 12:59:56,881 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:59:56,881 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961301586] [2019-12-07 12:59:56,881 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:59:56,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:59:56,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:59:56,936 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961301586] [2019-12-07 12:59:56,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:59:56,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:59:56,937 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451114796] [2019-12-07 12:59:56,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:59:56,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:59:56,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:59:56,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:59:56,937 INFO L87 Difference]: Start difference. First operand 253496 states and 1152927 transitions. Second operand 3 states. [2019-12-07 12:59:58,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:59:58,115 INFO L93 Difference]: Finished difference Result 254994 states and 1157206 transitions. [2019-12-07 12:59:58,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:59:58,116 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 12:59:58,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:59:59,360 INFO L225 Difference]: With dead ends: 254994 [2019-12-07 12:59:59,361 INFO L226 Difference]: Without dead ends: 254994 [2019-12-07 12:59:59,361 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:00:05,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254994 states. [2019-12-07 13:00:09,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254994 to 253407. [2019-12-07 13:00:09,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253407 states. [2019-12-07 13:00:10,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253407 states to 253407 states and 1152462 transitions. [2019-12-07 13:00:10,192 INFO L78 Accepts]: Start accepts. Automaton has 253407 states and 1152462 transitions. Word has length 20 [2019-12-07 13:00:10,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:10,192 INFO L462 AbstractCegarLoop]: Abstraction has 253407 states and 1152462 transitions. [2019-12-07 13:00:10,192 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:00:10,192 INFO L276 IsEmpty]: Start isEmpty. Operand 253407 states and 1152462 transitions. [2019-12-07 13:00:10,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 13:00:10,209 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:10,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:10,209 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:10,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:10,210 INFO L82 PathProgramCache]: Analyzing trace with hash -1351598936, now seen corresponding path program 1 times [2019-12-07 13:00:10,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:10,210 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131585498] [2019-12-07 13:00:10,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:10,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:10,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:10,242 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131585498] [2019-12-07 13:00:10,242 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:10,242 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:00:10,242 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438320885] [2019-12-07 13:00:10,243 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:00:10,243 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:10,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:00:10,243 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:00:10,243 INFO L87 Difference]: Start difference. First operand 253407 states and 1152462 transitions. Second operand 4 states. [2019-12-07 13:00:12,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:12,683 INFO L93 Difference]: Finished difference Result 37832 states and 132271 transitions. [2019-12-07 13:00:12,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:00:12,684 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 13:00:12,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:12,740 INFO L225 Difference]: With dead ends: 37832 [2019-12-07 13:00:12,740 INFO L226 Difference]: Without dead ends: 37832 [2019-12-07 13:00:12,740 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:00:12,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37832 states. [2019-12-07 13:00:13,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37832 to 37832. [2019-12-07 13:00:13,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37832 states. [2019-12-07 13:00:13,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37832 states to 37832 states and 132271 transitions. [2019-12-07 13:00:13,369 INFO L78 Accepts]: Start accepts. Automaton has 37832 states and 132271 transitions. Word has length 21 [2019-12-07 13:00:13,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:13,369 INFO L462 AbstractCegarLoop]: Abstraction has 37832 states and 132271 transitions. [2019-12-07 13:00:13,369 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:00:13,369 INFO L276 IsEmpty]: Start isEmpty. Operand 37832 states and 132271 transitions. [2019-12-07 13:00:13,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 13:00:13,379 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:13,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:13,379 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:13,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:13,379 INFO L82 PathProgramCache]: Analyzing trace with hash -116240952, now seen corresponding path program 1 times [2019-12-07 13:00:13,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:13,379 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297825883] [2019-12-07 13:00:13,379 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:13,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:13,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:13,426 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297825883] [2019-12-07 13:00:13,426 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:13,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:00:13,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067310261] [2019-12-07 13:00:13,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:00:13,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:13,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:00:13,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:00:13,428 INFO L87 Difference]: Start difference. First operand 37832 states and 132271 transitions. Second operand 5 states. [2019-12-07 13:00:13,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:13,797 INFO L93 Difference]: Finished difference Result 48863 states and 168620 transitions. [2019-12-07 13:00:13,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:00:13,797 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2019-12-07 13:00:13,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:13,871 INFO L225 Difference]: With dead ends: 48863 [2019-12-07 13:00:13,871 INFO L226 Difference]: Without dead ends: 48840 [2019-12-07 13:00:13,872 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:00:14,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48840 states. [2019-12-07 13:00:14,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48840 to 37383. [2019-12-07 13:00:14,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37383 states. [2019-12-07 13:00:14,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37383 states to 37383 states and 130512 transitions. [2019-12-07 13:00:14,579 INFO L78 Accepts]: Start accepts. Automaton has 37383 states and 130512 transitions. Word has length 24 [2019-12-07 13:00:14,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:14,580 INFO L462 AbstractCegarLoop]: Abstraction has 37383 states and 130512 transitions. [2019-12-07 13:00:14,580 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:00:14,580 INFO L276 IsEmpty]: Start isEmpty. Operand 37383 states and 130512 transitions. [2019-12-07 13:00:14,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:00:14,595 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:14,595 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:14,595 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:14,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:14,596 INFO L82 PathProgramCache]: Analyzing trace with hash 2109697444, now seen corresponding path program 1 times [2019-12-07 13:00:14,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:14,596 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025173395] [2019-12-07 13:00:14,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:14,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:14,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:14,627 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025173395] [2019-12-07 13:00:14,627 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:14,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:00:14,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1398374434] [2019-12-07 13:00:14,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:00:14,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:14,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:00:14,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:00:14,629 INFO L87 Difference]: Start difference. First operand 37383 states and 130512 transitions. Second operand 5 states. [2019-12-07 13:00:14,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:14,713 INFO L93 Difference]: Finished difference Result 19052 states and 68215 transitions. [2019-12-07 13:00:14,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:00:14,713 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 13:00:14,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:14,743 INFO L225 Difference]: With dead ends: 19052 [2019-12-07 13:00:14,743 INFO L226 Difference]: Without dead ends: 19052 [2019-12-07 13:00:14,743 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:00:14,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19052 states. [2019-12-07 13:00:15,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19052 to 19052. [2019-12-07 13:00:15,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19052 states. [2019-12-07 13:00:15,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19052 states to 19052 states and 68215 transitions. [2019-12-07 13:00:15,113 INFO L78 Accepts]: Start accepts. Automaton has 19052 states and 68215 transitions. Word has length 28 [2019-12-07 13:00:15,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:15,113 INFO L462 AbstractCegarLoop]: Abstraction has 19052 states and 68215 transitions. [2019-12-07 13:00:15,113 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:00:15,113 INFO L276 IsEmpty]: Start isEmpty. Operand 19052 states and 68215 transitions. [2019-12-07 13:00:15,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 13:00:15,141 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:15,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:15,141 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:15,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:15,141 INFO L82 PathProgramCache]: Analyzing trace with hash 328211609, now seen corresponding path program 1 times [2019-12-07 13:00:15,141 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:15,141 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589852506] [2019-12-07 13:00:15,141 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:15,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:15,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:15,189 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589852506] [2019-12-07 13:00:15,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:15,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:00:15,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1579549171] [2019-12-07 13:00:15,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:00:15,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:15,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:00:15,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:00:15,190 INFO L87 Difference]: Start difference. First operand 19052 states and 68215 transitions. Second operand 3 states. [2019-12-07 13:00:15,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:15,249 INFO L93 Difference]: Finished difference Result 19052 states and 67471 transitions. [2019-12-07 13:00:15,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:00:15,250 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 13:00:15,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:15,278 INFO L225 Difference]: With dead ends: 19052 [2019-12-07 13:00:15,278 INFO L226 Difference]: Without dead ends: 19052 [2019-12-07 13:00:15,279 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:00:15,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19052 states. [2019-12-07 13:00:15,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19052 to 18632. [2019-12-07 13:00:15,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18632 states. [2019-12-07 13:00:15,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18632 states to 18632 states and 66057 transitions. [2019-12-07 13:00:15,570 INFO L78 Accepts]: Start accepts. Automaton has 18632 states and 66057 transitions. Word has length 43 [2019-12-07 13:00:15,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:15,570 INFO L462 AbstractCegarLoop]: Abstraction has 18632 states and 66057 transitions. [2019-12-07 13:00:15,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:00:15,570 INFO L276 IsEmpty]: Start isEmpty. Operand 18632 states and 66057 transitions. [2019-12-07 13:00:15,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 13:00:15,589 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:15,590 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:15,590 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:15,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:15,590 INFO L82 PathProgramCache]: Analyzing trace with hash -233422742, now seen corresponding path program 1 times [2019-12-07 13:00:15,590 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:15,590 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414459832] [2019-12-07 13:00:15,590 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:15,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:15,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:15,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414459832] [2019-12-07 13:00:15,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:15,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:00:15,703 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175706969] [2019-12-07 13:00:15,703 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:00:15,703 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:15,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:00:15,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:00:15,704 INFO L87 Difference]: Start difference. First operand 18632 states and 66057 transitions. Second operand 9 states. [2019-12-07 13:00:16,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:16,755 INFO L93 Difference]: Finished difference Result 48257 states and 169625 transitions. [2019-12-07 13:00:16,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 13:00:16,756 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 43 [2019-12-07 13:00:16,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:16,829 INFO L225 Difference]: With dead ends: 48257 [2019-12-07 13:00:16,829 INFO L226 Difference]: Without dead ends: 48253 [2019-12-07 13:00:16,830 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=164, Invalid=486, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:00:16,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48253 states. [2019-12-07 13:00:17,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48253 to 26216. [2019-12-07 13:00:17,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26216 states. [2019-12-07 13:00:17,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26216 states to 26216 states and 94012 transitions. [2019-12-07 13:00:17,422 INFO L78 Accepts]: Start accepts. Automaton has 26216 states and 94012 transitions. Word has length 43 [2019-12-07 13:00:17,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:17,423 INFO L462 AbstractCegarLoop]: Abstraction has 26216 states and 94012 transitions. [2019-12-07 13:00:17,423 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:00:17,423 INFO L276 IsEmpty]: Start isEmpty. Operand 26216 states and 94012 transitions. [2019-12-07 13:00:17,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 13:00:17,456 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:17,456 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:17,456 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:17,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:17,456 INFO L82 PathProgramCache]: Analyzing trace with hash -1178806544, now seen corresponding path program 2 times [2019-12-07 13:00:17,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:17,457 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089617663] [2019-12-07 13:00:17,457 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:17,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:17,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:17,658 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089617663] [2019-12-07 13:00:17,658 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:17,658 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:00:17,658 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [460180503] [2019-12-07 13:00:17,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:00:17,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:17,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:00:17,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:00:17,659 INFO L87 Difference]: Start difference. First operand 26216 states and 94012 transitions. Second operand 10 states. [2019-12-07 13:00:19,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:19,872 INFO L93 Difference]: Finished difference Result 84236 states and 287772 transitions. [2019-12-07 13:00:19,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 13:00:19,873 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2019-12-07 13:00:19,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:20,013 INFO L225 Difference]: With dead ends: 84236 [2019-12-07 13:00:20,014 INFO L226 Difference]: Without dead ends: 84230 [2019-12-07 13:00:20,014 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 662 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=505, Invalid=1751, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 13:00:20,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84230 states. [2019-12-07 13:00:20,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84230 to 27534. [2019-12-07 13:00:20,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27534 states. [2019-12-07 13:00:20,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27534 states to 27534 states and 99289 transitions. [2019-12-07 13:00:20,877 INFO L78 Accepts]: Start accepts. Automaton has 27534 states and 99289 transitions. Word has length 43 [2019-12-07 13:00:20,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:20,878 INFO L462 AbstractCegarLoop]: Abstraction has 27534 states and 99289 transitions. [2019-12-07 13:00:20,878 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:00:20,878 INFO L276 IsEmpty]: Start isEmpty. Operand 27534 states and 99289 transitions. [2019-12-07 13:00:20,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 13:00:20,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:20,911 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:20,911 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:20,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:20,911 INFO L82 PathProgramCache]: Analyzing trace with hash -2006691270, now seen corresponding path program 3 times [2019-12-07 13:00:20,911 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:20,911 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787580132] [2019-12-07 13:00:20,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:20,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:21,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:21,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787580132] [2019-12-07 13:00:21,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:21,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:00:21,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812379733] [2019-12-07 13:00:21,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:00:21,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:21,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:00:21,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:00:21,068 INFO L87 Difference]: Start difference. First operand 27534 states and 99289 transitions. Second operand 10 states. [2019-12-07 13:00:22,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:22,723 INFO L93 Difference]: Finished difference Result 74144 states and 255163 transitions. [2019-12-07 13:00:22,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 13:00:22,723 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2019-12-07 13:00:22,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:22,845 INFO L225 Difference]: With dead ends: 74144 [2019-12-07 13:00:22,845 INFO L226 Difference]: Without dead ends: 74140 [2019-12-07 13:00:22,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 358 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=329, Invalid=1003, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 13:00:23,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74140 states. [2019-12-07 13:00:23,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74140 to 26594. [2019-12-07 13:00:23,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26594 states. [2019-12-07 13:00:23,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26594 states to 26594 states and 95461 transitions. [2019-12-07 13:00:23,613 INFO L78 Accepts]: Start accepts. Automaton has 26594 states and 95461 transitions. Word has length 43 [2019-12-07 13:00:23,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:23,613 INFO L462 AbstractCegarLoop]: Abstraction has 26594 states and 95461 transitions. [2019-12-07 13:00:23,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:00:23,614 INFO L276 IsEmpty]: Start isEmpty. Operand 26594 states and 95461 transitions. [2019-12-07 13:00:23,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 13:00:23,645 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:23,645 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:23,646 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:23,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:23,646 INFO L82 PathProgramCache]: Analyzing trace with hash 397368666, now seen corresponding path program 1 times [2019-12-07 13:00:23,646 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:23,646 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716569940] [2019-12-07 13:00:23,646 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:23,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:23,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:23,693 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716569940] [2019-12-07 13:00:23,693 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:23,693 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:00:23,694 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [20840040] [2019-12-07 13:00:23,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:00:23,694 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:23,694 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:00:23,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:00:23,694 INFO L87 Difference]: Start difference. First operand 26594 states and 95461 transitions. Second operand 4 states. [2019-12-07 13:00:23,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:23,819 INFO L93 Difference]: Finished difference Result 38551 states and 132010 transitions. [2019-12-07 13:00:23,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:00:23,820 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2019-12-07 13:00:23,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:23,861 INFO L225 Difference]: With dead ends: 38551 [2019-12-07 13:00:23,862 INFO L226 Difference]: Without dead ends: 26884 [2019-12-07 13:00:23,862 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:00:23,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26884 states. [2019-12-07 13:00:24,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26884 to 26700. [2019-12-07 13:00:24,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26700 states. [2019-12-07 13:00:24,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26700 states to 26700 states and 94883 transitions. [2019-12-07 13:00:24,285 INFO L78 Accepts]: Start accepts. Automaton has 26700 states and 94883 transitions. Word has length 44 [2019-12-07 13:00:24,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:24,285 INFO L462 AbstractCegarLoop]: Abstraction has 26700 states and 94883 transitions. [2019-12-07 13:00:24,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:00:24,285 INFO L276 IsEmpty]: Start isEmpty. Operand 26700 states and 94883 transitions. [2019-12-07 13:00:24,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 13:00:24,315 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:24,315 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:24,315 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:24,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:24,316 INFO L82 PathProgramCache]: Analyzing trace with hash -730573373, now seen corresponding path program 1 times [2019-12-07 13:00:24,316 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:24,316 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158556340] [2019-12-07 13:00:24,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:24,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:24,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:24,491 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158556340] [2019-12-07 13:00:24,491 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:24,491 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:00:24,492 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879005307] [2019-12-07 13:00:24,492 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:00:24,492 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:24,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:00:24,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:00:24,492 INFO L87 Difference]: Start difference. First operand 26700 states and 94883 transitions. Second operand 9 states. [2019-12-07 13:00:25,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:25,486 INFO L93 Difference]: Finished difference Result 48530 states and 167815 transitions. [2019-12-07 13:00:25,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 13:00:25,486 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 44 [2019-12-07 13:00:25,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:25,560 INFO L225 Difference]: With dead ends: 48530 [2019-12-07 13:00:25,560 INFO L226 Difference]: Without dead ends: 48319 [2019-12-07 13:00:25,560 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=164, Invalid=486, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:00:25,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48319 states. [2019-12-07 13:00:26,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48319 to 26019. [2019-12-07 13:00:26,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26019 states. [2019-12-07 13:00:26,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26019 states to 26019 states and 92820 transitions. [2019-12-07 13:00:26,163 INFO L78 Accepts]: Start accepts. Automaton has 26019 states and 92820 transitions. Word has length 44 [2019-12-07 13:00:26,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:26,163 INFO L462 AbstractCegarLoop]: Abstraction has 26019 states and 92820 transitions. [2019-12-07 13:00:26,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:00:26,163 INFO L276 IsEmpty]: Start isEmpty. Operand 26019 states and 92820 transitions. [2019-12-07 13:00:26,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 13:00:26,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:26,194 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:26,194 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:26,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:26,195 INFO L82 PathProgramCache]: Analyzing trace with hash 91981555, now seen corresponding path program 2 times [2019-12-07 13:00:26,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:26,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866907109] [2019-12-07 13:00:26,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:26,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:26,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:26,395 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866907109] [2019-12-07 13:00:26,395 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:26,395 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:00:26,395 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923893401] [2019-12-07 13:00:26,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:00:26,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:26,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:00:26,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:00:26,396 INFO L87 Difference]: Start difference. First operand 26019 states and 92820 transitions. Second operand 10 states. [2019-12-07 13:00:27,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:27,857 INFO L93 Difference]: Finished difference Result 62858 states and 214703 transitions. [2019-12-07 13:00:27,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 13:00:27,857 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 44 [2019-12-07 13:00:27,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:27,958 INFO L225 Difference]: With dead ends: 62858 [2019-12-07 13:00:27,959 INFO L226 Difference]: Without dead ends: 62750 [2019-12-07 13:00:27,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=329, Invalid=1003, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 13:00:28,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62750 states. [2019-12-07 13:00:28,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62750 to 25844. [2019-12-07 13:00:28,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25844 states. [2019-12-07 13:00:28,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25844 states to 25844 states and 92146 transitions. [2019-12-07 13:00:28,666 INFO L78 Accepts]: Start accepts. Automaton has 25844 states and 92146 transitions. Word has length 44 [2019-12-07 13:00:28,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:28,666 INFO L462 AbstractCegarLoop]: Abstraction has 25844 states and 92146 transitions. [2019-12-07 13:00:28,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:00:28,666 INFO L276 IsEmpty]: Start isEmpty. Operand 25844 states and 92146 transitions. [2019-12-07 13:00:28,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 13:00:28,695 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:28,696 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:28,696 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:28,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:28,696 INFO L82 PathProgramCache]: Analyzing trace with hash 825359925, now seen corresponding path program 3 times [2019-12-07 13:00:28,696 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:28,697 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260935071] [2019-12-07 13:00:28,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:28,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:28,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:28,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1260935071] [2019-12-07 13:00:28,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:28,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:00:28,873 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696720045] [2019-12-07 13:00:28,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:00:28,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:28,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:00:28,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:00:28,873 INFO L87 Difference]: Start difference. First operand 25844 states and 92146 transitions. Second operand 10 states. [2019-12-07 13:00:30,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:30,806 INFO L93 Difference]: Finished difference Result 61720 states and 209688 transitions. [2019-12-07 13:00:30,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 13:00:30,806 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 44 [2019-12-07 13:00:30,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:30,906 INFO L225 Difference]: With dead ends: 61720 [2019-12-07 13:00:30,906 INFO L226 Difference]: Without dead ends: 61597 [2019-12-07 13:00:30,907 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 617 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=452, Invalid=1618, Unknown=0, NotChecked=0, Total=2070 [2019-12-07 13:00:31,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61597 states. [2019-12-07 13:00:31,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61597 to 24519. [2019-12-07 13:00:31,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24519 states. [2019-12-07 13:00:31,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24519 states to 24519 states and 87794 transitions. [2019-12-07 13:00:31,547 INFO L78 Accepts]: Start accepts. Automaton has 24519 states and 87794 transitions. Word has length 44 [2019-12-07 13:00:31,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:31,547 INFO L462 AbstractCegarLoop]: Abstraction has 24519 states and 87794 transitions. [2019-12-07 13:00:31,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:00:31,548 INFO L276 IsEmpty]: Start isEmpty. Operand 24519 states and 87794 transitions. [2019-12-07 13:00:31,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 13:00:31,571 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:31,571 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:31,572 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:31,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:31,572 INFO L82 PathProgramCache]: Analyzing trace with hash -1676146018, now seen corresponding path program 2 times [2019-12-07 13:00:31,572 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:31,572 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288637438] [2019-12-07 13:00:31,572 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:31,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:31,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:31,611 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [288637438] [2019-12-07 13:00:31,612 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:31,612 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:00:31,612 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [348625250] [2019-12-07 13:00:31,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:00:31,612 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:31,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:00:31,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:00:31,612 INFO L87 Difference]: Start difference. First operand 24519 states and 87794 transitions. Second operand 6 states. [2019-12-07 13:00:31,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:31,705 INFO L93 Difference]: Finished difference Result 23176 states and 84593 transitions. [2019-12-07 13:00:31,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:00:31,705 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-07 13:00:31,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:31,782 INFO L225 Difference]: With dead ends: 23176 [2019-12-07 13:00:31,782 INFO L226 Difference]: Without dead ends: 21688 [2019-12-07 13:00:31,782 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:00:31,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21688 states. [2019-12-07 13:00:32,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21688 to 16878. [2019-12-07 13:00:32,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16878 states. [2019-12-07 13:00:32,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16878 states to 16878 states and 60778 transitions. [2019-12-07 13:00:32,070 INFO L78 Accepts]: Start accepts. Automaton has 16878 states and 60778 transitions. Word has length 44 [2019-12-07 13:00:32,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:32,070 INFO L462 AbstractCegarLoop]: Abstraction has 16878 states and 60778 transitions. [2019-12-07 13:00:32,070 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:00:32,071 INFO L276 IsEmpty]: Start isEmpty. Operand 16878 states and 60778 transitions. [2019-12-07 13:00:32,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:32,087 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:32,087 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:32,087 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:32,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:32,088 INFO L82 PathProgramCache]: Analyzing trace with hash -185251466, now seen corresponding path program 1 times [2019-12-07 13:00:32,088 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:32,088 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540380099] [2019-12-07 13:00:32,088 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:32,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:32,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:32,153 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540380099] [2019-12-07 13:00:32,153 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:32,153 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:00:32,153 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641897147] [2019-12-07 13:00:32,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:00:32,153 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:32,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:00:32,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:00:32,154 INFO L87 Difference]: Start difference. First operand 16878 states and 60778 transitions. Second operand 7 states. [2019-12-07 13:00:32,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:32,470 INFO L93 Difference]: Finished difference Result 49656 states and 176300 transitions. [2019-12-07 13:00:32,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:00:32,471 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 59 [2019-12-07 13:00:32,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:32,541 INFO L225 Difference]: With dead ends: 49656 [2019-12-07 13:00:32,541 INFO L226 Difference]: Without dead ends: 43148 [2019-12-07 13:00:32,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:00:32,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43148 states. [2019-12-07 13:00:33,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43148 to 25188. [2019-12-07 13:00:33,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25188 states. [2019-12-07 13:00:33,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25188 states to 25188 states and 89121 transitions. [2019-12-07 13:00:33,084 INFO L78 Accepts]: Start accepts. Automaton has 25188 states and 89121 transitions. Word has length 59 [2019-12-07 13:00:33,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:33,084 INFO L462 AbstractCegarLoop]: Abstraction has 25188 states and 89121 transitions. [2019-12-07 13:00:33,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:00:33,085 INFO L276 IsEmpty]: Start isEmpty. Operand 25188 states and 89121 transitions. [2019-12-07 13:00:33,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:33,113 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:33,113 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:33,114 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:33,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:33,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1404648360, now seen corresponding path program 2 times [2019-12-07 13:00:33,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:33,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2057047403] [2019-12-07 13:00:33,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:33,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:33,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:33,234 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2057047403] [2019-12-07 13:00:33,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:33,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:00:33,234 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531039377] [2019-12-07 13:00:33,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:00:33,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:33,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:00:33,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:00:33,234 INFO L87 Difference]: Start difference. First operand 25188 states and 89121 transitions. Second operand 10 states. [2019-12-07 13:00:34,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:34,043 INFO L93 Difference]: Finished difference Result 42011 states and 147375 transitions. [2019-12-07 13:00:34,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 13:00:34,043 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 59 [2019-12-07 13:00:34,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:34,102 INFO L225 Difference]: With dead ends: 42011 [2019-12-07 13:00:34,102 INFO L226 Difference]: Without dead ends: 38891 [2019-12-07 13:00:34,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:00:34,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38891 states. [2019-12-07 13:00:34,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38891 to 26403. [2019-12-07 13:00:34,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26403 states. [2019-12-07 13:00:34,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26403 states to 26403 states and 93149 transitions. [2019-12-07 13:00:34,668 INFO L78 Accepts]: Start accepts. Automaton has 26403 states and 93149 transitions. Word has length 59 [2019-12-07 13:00:34,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:34,668 INFO L462 AbstractCegarLoop]: Abstraction has 26403 states and 93149 transitions. [2019-12-07 13:00:34,668 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:00:34,669 INFO L276 IsEmpty]: Start isEmpty. Operand 26403 states and 93149 transitions. [2019-12-07 13:00:34,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:34,698 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:34,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:34,699 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:34,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:34,699 INFO L82 PathProgramCache]: Analyzing trace with hash 657223288, now seen corresponding path program 3 times [2019-12-07 13:00:34,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:34,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131674977] [2019-12-07 13:00:34,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:34,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:34,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:34,899 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131674977] [2019-12-07 13:00:34,899 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:34,899 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:00:34,899 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [858603548] [2019-12-07 13:00:34,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:00:34,899 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:34,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:00:34,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:00:34,900 INFO L87 Difference]: Start difference. First operand 26403 states and 93149 transitions. Second operand 11 states. [2019-12-07 13:00:35,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:35,766 INFO L93 Difference]: Finished difference Result 35773 states and 122411 transitions. [2019-12-07 13:00:35,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 13:00:35,767 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 13:00:35,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:35,813 INFO L225 Difference]: With dead ends: 35773 [2019-12-07 13:00:35,813 INFO L226 Difference]: Without dead ends: 30523 [2019-12-07 13:00:35,813 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=115, Invalid=437, Unknown=0, NotChecked=0, Total=552 [2019-12-07 13:00:35,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30523 states. [2019-12-07 13:00:36,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30523 to 26963. [2019-12-07 13:00:36,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26963 states. [2019-12-07 13:00:36,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26963 states to 26963 states and 94911 transitions. [2019-12-07 13:00:36,264 INFO L78 Accepts]: Start accepts. Automaton has 26963 states and 94911 transitions. Word has length 59 [2019-12-07 13:00:36,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:36,264 INFO L462 AbstractCegarLoop]: Abstraction has 26963 states and 94911 transitions. [2019-12-07 13:00:36,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:00:36,264 INFO L276 IsEmpty]: Start isEmpty. Operand 26963 states and 94911 transitions. [2019-12-07 13:00:36,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:36,295 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:36,295 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:36,295 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:36,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:36,295 INFO L82 PathProgramCache]: Analyzing trace with hash -1124809764, now seen corresponding path program 4 times [2019-12-07 13:00:36,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:36,295 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227806755] [2019-12-07 13:00:36,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:36,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:36,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:36,339 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227806755] [2019-12-07 13:00:36,339 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:36,339 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:00:36,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [489074292] [2019-12-07 13:00:36,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:00:36,340 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:36,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:00:36,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:00:36,340 INFO L87 Difference]: Start difference. First operand 26963 states and 94911 transitions. Second operand 4 states. [2019-12-07 13:00:36,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:36,458 INFO L93 Difference]: Finished difference Result 36764 states and 125465 transitions. [2019-12-07 13:00:36,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:00:36,458 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2019-12-07 13:00:36,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:36,473 INFO L225 Difference]: With dead ends: 36764 [2019-12-07 13:00:36,473 INFO L226 Difference]: Without dead ends: 10691 [2019-12-07 13:00:36,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:00:36,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10691 states. [2019-12-07 13:00:36,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10691 to 10671. [2019-12-07 13:00:36,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10671 states. [2019-12-07 13:00:36,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10671 states to 10671 states and 32952 transitions. [2019-12-07 13:00:36,617 INFO L78 Accepts]: Start accepts. Automaton has 10671 states and 32952 transitions. Word has length 59 [2019-12-07 13:00:36,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:36,618 INFO L462 AbstractCegarLoop]: Abstraction has 10671 states and 32952 transitions. [2019-12-07 13:00:36,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:00:36,618 INFO L276 IsEmpty]: Start isEmpty. Operand 10671 states and 32952 transitions. [2019-12-07 13:00:36,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:36,627 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:36,627 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:36,627 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:36,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:36,628 INFO L82 PathProgramCache]: Analyzing trace with hash 530809076, now seen corresponding path program 5 times [2019-12-07 13:00:36,628 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:36,628 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1705573267] [2019-12-07 13:00:36,628 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:36,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:36,780 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:36,780 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1705573267] [2019-12-07 13:00:36,780 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:36,780 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:00:36,780 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1800379664] [2019-12-07 13:00:36,781 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:00:36,781 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:36,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:00:36,781 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:00:36,781 INFO L87 Difference]: Start difference. First operand 10671 states and 32952 transitions. Second operand 11 states. [2019-12-07 13:00:37,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:37,472 INFO L93 Difference]: Finished difference Result 15211 states and 46732 transitions. [2019-12-07 13:00:37,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:00:37,472 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 13:00:37,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:37,488 INFO L225 Difference]: With dead ends: 15211 [2019-12-07 13:00:37,488 INFO L226 Difference]: Without dead ends: 12927 [2019-12-07 13:00:37,489 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=347, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:00:37,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12927 states. [2019-12-07 13:00:37,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12927 to 10757. [2019-12-07 13:00:37,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10757 states. [2019-12-07 13:00:37,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10757 states to 10757 states and 33176 transitions. [2019-12-07 13:00:37,642 INFO L78 Accepts]: Start accepts. Automaton has 10757 states and 33176 transitions. Word has length 59 [2019-12-07 13:00:37,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:37,642 INFO L462 AbstractCegarLoop]: Abstraction has 10757 states and 33176 transitions. [2019-12-07 13:00:37,642 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:00:37,642 INFO L276 IsEmpty]: Start isEmpty. Operand 10757 states and 33176 transitions. [2019-12-07 13:00:37,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:37,650 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:37,650 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:37,650 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:37,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:37,651 INFO L82 PathProgramCache]: Analyzing trace with hash -71911370, now seen corresponding path program 6 times [2019-12-07 13:00:37,651 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:37,651 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406660021] [2019-12-07 13:00:37,651 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:37,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:37,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:37,757 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406660021] [2019-12-07 13:00:37,757 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:37,758 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:00:37,758 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048027361] [2019-12-07 13:00:37,758 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:00:37,758 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:37,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:00:37,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:00:37,758 INFO L87 Difference]: Start difference. First operand 10757 states and 33176 transitions. Second operand 11 states. [2019-12-07 13:00:38,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:38,378 INFO L93 Difference]: Finished difference Result 15005 states and 45879 transitions. [2019-12-07 13:00:38,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:00:38,378 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 13:00:38,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:38,391 INFO L225 Difference]: With dead ends: 15005 [2019-12-07 13:00:38,391 INFO L226 Difference]: Without dead ends: 13087 [2019-12-07 13:00:38,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 13:00:38,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13087 states. [2019-12-07 13:00:38,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13087 to 10583. [2019-12-07 13:00:38,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10583 states. [2019-12-07 13:00:38,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10583 states to 10583 states and 32664 transitions. [2019-12-07 13:00:38,542 INFO L78 Accepts]: Start accepts. Automaton has 10583 states and 32664 transitions. Word has length 59 [2019-12-07 13:00:38,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:38,542 INFO L462 AbstractCegarLoop]: Abstraction has 10583 states and 32664 transitions. [2019-12-07 13:00:38,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:00:38,542 INFO L276 IsEmpty]: Start isEmpty. Operand 10583 states and 32664 transitions. [2019-12-07 13:00:38,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:38,550 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:38,551 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:38,551 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:38,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:38,551 INFO L82 PathProgramCache]: Analyzing trace with hash -1658578216, now seen corresponding path program 7 times [2019-12-07 13:00:38,551 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:38,551 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [668386056] [2019-12-07 13:00:38,551 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:38,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:38,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:38,970 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [668386056] [2019-12-07 13:00:38,970 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:38,970 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:00:38,970 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1635334440] [2019-12-07 13:00:38,971 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:00:38,971 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:38,971 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:00:38,971 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:00:38,971 INFO L87 Difference]: Start difference. First operand 10583 states and 32664 transitions. Second operand 15 states. [2019-12-07 13:00:41,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:41,170 INFO L93 Difference]: Finished difference Result 23067 states and 70115 transitions. [2019-12-07 13:00:41,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 13:00:41,171 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 59 [2019-12-07 13:00:41,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:41,191 INFO L225 Difference]: With dead ends: 23067 [2019-12-07 13:00:41,192 INFO L226 Difference]: Without dead ends: 19898 [2019-12-07 13:00:41,192 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 351 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=277, Invalid=1445, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 13:00:41,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19898 states. [2019-12-07 13:00:41,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19898 to 13773. [2019-12-07 13:00:41,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13773 states. [2019-12-07 13:00:41,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13773 states to 13773 states and 42461 transitions. [2019-12-07 13:00:41,427 INFO L78 Accepts]: Start accepts. Automaton has 13773 states and 42461 transitions. Word has length 59 [2019-12-07 13:00:41,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:41,427 INFO L462 AbstractCegarLoop]: Abstraction has 13773 states and 42461 transitions. [2019-12-07 13:00:41,427 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:00:41,427 INFO L276 IsEmpty]: Start isEmpty. Operand 13773 states and 42461 transitions. [2019-12-07 13:00:41,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:41,440 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:41,440 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:41,440 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:41,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:41,440 INFO L82 PathProgramCache]: Analyzing trace with hash -178564856, now seen corresponding path program 8 times [2019-12-07 13:00:41,440 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:41,440 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1219487157] [2019-12-07 13:00:41,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:41,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:41,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:41,576 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1219487157] [2019-12-07 13:00:41,576 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:41,577 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:00:41,577 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102569454] [2019-12-07 13:00:41,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:00:41,577 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:41,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:00:41,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:00:41,577 INFO L87 Difference]: Start difference. First operand 13773 states and 42461 transitions. Second operand 10 states. [2019-12-07 13:00:42,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:42,245 INFO L93 Difference]: Finished difference Result 26113 states and 79967 transitions. [2019-12-07 13:00:42,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 13:00:42,246 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 59 [2019-12-07 13:00:42,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:42,268 INFO L225 Difference]: With dead ends: 26113 [2019-12-07 13:00:42,268 INFO L226 Difference]: Without dead ends: 20177 [2019-12-07 13:00:42,269 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=182, Invalid=748, Unknown=0, NotChecked=0, Total=930 [2019-12-07 13:00:42,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20177 states. [2019-12-07 13:00:42,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20177 to 13507. [2019-12-07 13:00:42,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13507 states. [2019-12-07 13:00:42,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13507 states to 13507 states and 41528 transitions. [2019-12-07 13:00:42,497 INFO L78 Accepts]: Start accepts. Automaton has 13507 states and 41528 transitions. Word has length 59 [2019-12-07 13:00:42,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:42,497 INFO L462 AbstractCegarLoop]: Abstraction has 13507 states and 41528 transitions. [2019-12-07 13:00:42,497 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:00:42,497 INFO L276 IsEmpty]: Start isEmpty. Operand 13507 states and 41528 transitions. [2019-12-07 13:00:42,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:42,510 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:42,510 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:42,510 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:42,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:42,510 INFO L82 PathProgramCache]: Analyzing trace with hash -1816631088, now seen corresponding path program 9 times [2019-12-07 13:00:42,510 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:42,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081279924] [2019-12-07 13:00:42,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:42,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:42,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:42,611 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2081279924] [2019-12-07 13:00:42,611 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:42,612 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:00:42,612 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926975757] [2019-12-07 13:00:42,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:00:42,612 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:42,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:00:42,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:00:42,612 INFO L87 Difference]: Start difference. First operand 13507 states and 41528 transitions. Second operand 11 states. [2019-12-07 13:00:43,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:43,333 INFO L93 Difference]: Finished difference Result 17282 states and 52790 transitions. [2019-12-07 13:00:43,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 13:00:43,334 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 13:00:43,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:43,350 INFO L225 Difference]: With dead ends: 17282 [2019-12-07 13:00:43,350 INFO L226 Difference]: Without dead ends: 15892 [2019-12-07 13:00:43,351 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:00:43,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15892 states. [2019-12-07 13:00:43,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15892 to 13685. [2019-12-07 13:00:43,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13685 states. [2019-12-07 13:00:43,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13685 states to 13685 states and 42005 transitions. [2019-12-07 13:00:43,546 INFO L78 Accepts]: Start accepts. Automaton has 13685 states and 42005 transitions. Word has length 59 [2019-12-07 13:00:43,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:43,546 INFO L462 AbstractCegarLoop]: Abstraction has 13685 states and 42005 transitions. [2019-12-07 13:00:43,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:00:43,546 INFO L276 IsEmpty]: Start isEmpty. Operand 13685 states and 42005 transitions. [2019-12-07 13:00:43,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:43,558 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:43,558 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:43,559 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:43,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:43,559 INFO L82 PathProgramCache]: Analyzing trace with hash 1561759326, now seen corresponding path program 10 times [2019-12-07 13:00:43,559 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:43,559 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346211366] [2019-12-07 13:00:43,559 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:43,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:43,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:43,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346211366] [2019-12-07 13:00:43,848 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:43,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 13:00:43,848 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1682411554] [2019-12-07 13:00:43,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 13:00:43,848 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:43,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 13:00:43,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:00:43,849 INFO L87 Difference]: Start difference. First operand 13685 states and 42005 transitions. Second operand 18 states. [2019-12-07 13:00:49,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:49,173 INFO L93 Difference]: Finished difference Result 30098 states and 89835 transitions. [2019-12-07 13:00:49,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2019-12-07 13:00:49,173 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2019-12-07 13:00:49,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:49,204 INFO L225 Difference]: With dead ends: 30098 [2019-12-07 13:00:49,204 INFO L226 Difference]: Without dead ends: 27426 [2019-12-07 13:00:49,205 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1013 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=532, Invalid=3500, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 13:00:49,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27426 states. [2019-12-07 13:00:49,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27426 to 14652. [2019-12-07 13:00:49,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14652 states. [2019-12-07 13:00:49,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14652 states to 14652 states and 44983 transitions. [2019-12-07 13:00:49,502 INFO L78 Accepts]: Start accepts. Automaton has 14652 states and 44983 transitions. Word has length 59 [2019-12-07 13:00:49,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:49,502 INFO L462 AbstractCegarLoop]: Abstraction has 14652 states and 44983 transitions. [2019-12-07 13:00:49,502 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 13:00:49,503 INFO L276 IsEmpty]: Start isEmpty. Operand 14652 states and 44983 transitions. [2019-12-07 13:00:49,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:49,516 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:49,516 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:49,516 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:49,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:49,516 INFO L82 PathProgramCache]: Analyzing trace with hash -1526877492, now seen corresponding path program 11 times [2019-12-07 13:00:49,517 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:49,517 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076719048] [2019-12-07 13:00:49,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:49,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:49,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:49,632 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076719048] [2019-12-07 13:00:49,632 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:49,632 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:00:49,632 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [311906018] [2019-12-07 13:00:49,632 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:00:49,633 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:49,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:00:49,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:00:49,633 INFO L87 Difference]: Start difference. First operand 14652 states and 44983 transitions. Second operand 12 states. [2019-12-07 13:00:50,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:50,407 INFO L93 Difference]: Finished difference Result 18131 states and 55226 transitions. [2019-12-07 13:00:50,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:00:50,408 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 13:00:50,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:50,426 INFO L225 Difference]: With dead ends: 18131 [2019-12-07 13:00:50,426 INFO L226 Difference]: Without dead ends: 17385 [2019-12-07 13:00:50,426 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:00:50,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17385 states. [2019-12-07 13:00:50,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17385 to 14474. [2019-12-07 13:00:50,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14474 states. [2019-12-07 13:00:50,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14474 states to 14474 states and 44480 transitions. [2019-12-07 13:00:50,653 INFO L78 Accepts]: Start accepts. Automaton has 14474 states and 44480 transitions. Word has length 59 [2019-12-07 13:00:50,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:50,653 INFO L462 AbstractCegarLoop]: Abstraction has 14474 states and 44480 transitions. [2019-12-07 13:00:50,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:00:50,653 INFO L276 IsEmpty]: Start isEmpty. Operand 14474 states and 44480 transitions. [2019-12-07 13:00:50,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:50,665 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:50,666 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:50,666 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:50,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:50,666 INFO L82 PathProgramCache]: Analyzing trace with hash 720693238, now seen corresponding path program 12 times [2019-12-07 13:00:50,666 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:50,666 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052889408] [2019-12-07 13:00:50,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:50,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:50,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:50,819 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052889408] [2019-12-07 13:00:50,819 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:50,819 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:00:50,819 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1298727430] [2019-12-07 13:00:50,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:00:50,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:50,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:00:50,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:00:50,820 INFO L87 Difference]: Start difference. First operand 14474 states and 44480 transitions. Second operand 11 states. [2019-12-07 13:00:51,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:51,445 INFO L93 Difference]: Finished difference Result 23968 states and 73100 transitions. [2019-12-07 13:00:51,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 13:00:51,446 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 13:00:51,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:51,468 INFO L225 Difference]: With dead ends: 23968 [2019-12-07 13:00:51,468 INFO L226 Difference]: Without dead ends: 21134 [2019-12-07 13:00:51,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=152, Invalid=660, Unknown=0, NotChecked=0, Total=812 [2019-12-07 13:00:51,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21134 states. [2019-12-07 13:00:51,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21134 to 14220. [2019-12-07 13:00:51,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14220 states. [2019-12-07 13:00:51,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14220 states to 14220 states and 43751 transitions. [2019-12-07 13:00:51,713 INFO L78 Accepts]: Start accepts. Automaton has 14220 states and 43751 transitions. Word has length 59 [2019-12-07 13:00:51,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:51,713 INFO L462 AbstractCegarLoop]: Abstraction has 14220 states and 43751 transitions. [2019-12-07 13:00:51,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:00:51,713 INFO L276 IsEmpty]: Start isEmpty. Operand 14220 states and 43751 transitions. [2019-12-07 13:00:51,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:51,725 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:51,726 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:51,726 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:51,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:51,726 INFO L82 PathProgramCache]: Analyzing trace with hash -152494338, now seen corresponding path program 13 times [2019-12-07 13:00:51,726 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:51,726 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375478601] [2019-12-07 13:00:51,726 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:51,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:52,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:52,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375478601] [2019-12-07 13:00:52,229 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:52,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 13:00:52,229 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [64450256] [2019-12-07 13:00:52,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 13:00:52,229 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:52,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 13:00:52,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:00:52,230 INFO L87 Difference]: Start difference. First operand 14220 states and 43751 transitions. Second operand 18 states. [2019-12-07 13:00:55,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:00:55,911 INFO L93 Difference]: Finished difference Result 24852 states and 74999 transitions. [2019-12-07 13:00:55,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 13:00:55,912 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2019-12-07 13:00:55,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:00:55,936 INFO L225 Difference]: With dead ends: 24852 [2019-12-07 13:00:55,936 INFO L226 Difference]: Without dead ends: 22927 [2019-12-07 13:00:55,937 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 382 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=321, Invalid=1749, Unknown=0, NotChecked=0, Total=2070 [2019-12-07 13:00:56,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22927 states. [2019-12-07 13:00:56,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22927 to 14613. [2019-12-07 13:00:56,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14613 states. [2019-12-07 13:00:56,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14613 states to 14613 states and 44966 transitions. [2019-12-07 13:00:56,201 INFO L78 Accepts]: Start accepts. Automaton has 14613 states and 44966 transitions. Word has length 59 [2019-12-07 13:00:56,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:00:56,201 INFO L462 AbstractCegarLoop]: Abstraction has 14613 states and 44966 transitions. [2019-12-07 13:00:56,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 13:00:56,201 INFO L276 IsEmpty]: Start isEmpty. Operand 14613 states and 44966 transitions. [2019-12-07 13:00:56,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:00:56,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:00:56,215 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:00:56,215 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:00:56,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:00:56,215 INFO L82 PathProgramCache]: Analyzing trace with hash 2063586264, now seen corresponding path program 14 times [2019-12-07 13:00:56,216 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:00:56,216 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659612634] [2019-12-07 13:00:56,216 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:00:56,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:00:56,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:00:56,773 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659612634] [2019-12-07 13:00:56,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:00:56,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 13:00:56,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119732510] [2019-12-07 13:00:56,774 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 13:00:56,774 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:00:56,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 13:00:56,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:00:56,774 INFO L87 Difference]: Start difference. First operand 14613 states and 44966 transitions. Second operand 18 states. [2019-12-07 13:00:58,373 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 35 [2019-12-07 13:01:00,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:01:00,296 INFO L93 Difference]: Finished difference Result 28738 states and 87105 transitions. [2019-12-07 13:01:00,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 13:01:00,296 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2019-12-07 13:01:00,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:01:00,326 INFO L225 Difference]: With dead ends: 28738 [2019-12-07 13:01:00,326 INFO L226 Difference]: Without dead ends: 25049 [2019-12-07 13:01:00,327 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 588 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=395, Invalid=2257, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 13:01:00,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25049 states. [2019-12-07 13:01:00,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25049 to 14550. [2019-12-07 13:01:00,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14550 states. [2019-12-07 13:01:00,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14550 states to 14550 states and 44895 transitions. [2019-12-07 13:01:00,602 INFO L78 Accepts]: Start accepts. Automaton has 14550 states and 44895 transitions. Word has length 59 [2019-12-07 13:01:00,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:01:00,602 INFO L462 AbstractCegarLoop]: Abstraction has 14550 states and 44895 transitions. [2019-12-07 13:01:00,602 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 13:01:00,602 INFO L276 IsEmpty]: Start isEmpty. Operand 14550 states and 44895 transitions. [2019-12-07 13:01:00,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:01:00,616 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:01:00,616 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:01:00,616 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:01:00,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:01:00,616 INFO L82 PathProgramCache]: Analyzing trace with hash 1435143134, now seen corresponding path program 15 times [2019-12-07 13:01:00,616 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:01:00,616 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311254843] [2019-12-07 13:01:00,616 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:01:00,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:01:00,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:01:00,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311254843] [2019-12-07 13:01:00,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:01:00,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:01:00,733 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902624026] [2019-12-07 13:01:00,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:01:00,733 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:01:00,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:01:00,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:01:00,734 INFO L87 Difference]: Start difference. First operand 14550 states and 44895 transitions. Second operand 12 states. [2019-12-07 13:01:01,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:01:01,493 INFO L93 Difference]: Finished difference Result 17913 states and 54746 transitions. [2019-12-07 13:01:01,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 13:01:01,493 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 13:01:01,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:01:01,513 INFO L225 Difference]: With dead ends: 17913 [2019-12-07 13:01:01,513 INFO L226 Difference]: Without dead ends: 17679 [2019-12-07 13:01:01,514 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:01:01,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17679 states. [2019-12-07 13:01:01,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17679 to 14310. [2019-12-07 13:01:01,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14310 states. [2019-12-07 13:01:01,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14310 states to 14310 states and 44241 transitions. [2019-12-07 13:01:01,731 INFO L78 Accepts]: Start accepts. Automaton has 14310 states and 44241 transitions. Word has length 59 [2019-12-07 13:01:01,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:01:01,731 INFO L462 AbstractCegarLoop]: Abstraction has 14310 states and 44241 transitions. [2019-12-07 13:01:01,731 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:01:01,731 INFO L276 IsEmpty]: Start isEmpty. Operand 14310 states and 44241 transitions. [2019-12-07 13:01:01,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:01:01,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:01:01,744 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:01:01,744 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:01:01,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:01:01,744 INFO L82 PathProgramCache]: Analyzing trace with hash -300648998, now seen corresponding path program 16 times [2019-12-07 13:01:01,744 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:01:01,744 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019565258] [2019-12-07 13:01:01,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:01:01,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:01:01,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:01:01,829 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:01:01,829 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:01:01,831 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] ULTIMATE.startENTRY-->L845: Formula: (let ((.cse0 (store |v_#valid_101| 0 0))) (and (= 0 v_~y$r_buff0_thd3~0_200) (= v_~weak$$choice2~0_146 0) (= v_~z~0_79 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff0_used~0_906 0) (= |v_ULTIMATE.start_main_~#t437~0.offset_27| 0) (= v_~__unbuffered_cnt~0_174 0) (= v_~main$tmp_guard1~0_51 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t437~0.base_42| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t437~0.base_42|) |v_ULTIMATE.start_main_~#t437~0.offset_27| 0)) |v_#memory_int_21|) (= |v_#valid_99| (store .cse0 |v_ULTIMATE.start_main_~#t437~0.base_42| 1)) (= 0 v_~__unbuffered_p3_EAX~0_50) (= 0 v_~__unbuffered_p2_EAX~0_106) (= 0 v_~y$r_buff0_thd2~0_339) (= v_~y$mem_tmp~0_18 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= 0 v_~y$r_buff1_thd4~0_165) (= 0 v_~y$w_buff0~0_533) (= 0 v_~y$r_buff1_thd2~0_235) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t437~0.base_42|)) (= 0 v_~__unbuffered_p3_EBX~0_50) (= 0 |v_#NULL.base_6|) (= v_~y$w_buff1~0_348 0) (= 0 v_~y$r_buff0_thd4~0_151) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_64) (< 0 |v_#StackHeapBarrier_20|) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_35 0) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~y$flush_delayed~0_42) (= v_~x~0_39 0) (= v_~y$r_buff0_thd1~0_73 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t437~0.base_42|) (= 0 v_~y$r_buff1_thd1~0_74) (= v_~y~0_158 0) (= v_~y$r_buff1_thd0~0_169 0) (= v_~y$r_buff0_thd0~0_171 0) (= v_~y$w_buff1_used~0_540 0) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t437~0.base_42| 4)) (= 0 v_~y$r_buff1_thd3~0_136))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_101|, #memory_int=|v_#memory_int_22|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t438~0.offset=|v_ULTIMATE.start_main_~#t438~0.offset_19|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_110|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_43|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_35, ~y$mem_tmp~0=v_~y$mem_tmp~0_18, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_64, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_136, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, ULTIMATE.start_main_~#t440~0.offset=|v_ULTIMATE.start_main_~#t440~0.offset_19|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_73, ~y$flush_delayed~0=v_~y$flush_delayed~0_42, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_50, #length=|v_#length_31|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_106, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_21|, ULTIMATE.start_main_~#t439~0.base=|v_ULTIMATE.start_main_~#t439~0.base_24|, ULTIMATE.start_main_~#t438~0.base=|v_ULTIMATE.start_main_~#t438~0.base_34|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_165, ~y$w_buff1~0=v_~y$w_buff1~0_348, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t437~0.offset=|v_ULTIMATE.start_main_~#t437~0.offset_27|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_339, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_174, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_169, ~x~0=v_~x~0_39, ULTIMATE.start_main_~#t440~0.base=|v_ULTIMATE.start_main_~#t440~0.base_25|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_906, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_41|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_239|, ULTIMATE.start_main_~#t439~0.offset=|v_ULTIMATE.start_main_~#t439~0.offset_18|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_74, ~y$w_buff0~0=v_~y$w_buff0~0_533, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_200, ~y~0=v_~y~0_158, ULTIMATE.start_main_~#t437~0.base=|v_ULTIMATE.start_main_~#t437~0.base_42|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_50, #NULL.base=|v_#NULL.base_6|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_235, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_151, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_171, #valid=|v_#valid_99|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ~z~0=v_~z~0_79, ~weak$$choice2~0=v_~weak$$choice2~0_146, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_540} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t438~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t440~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t439~0.base, ULTIMATE.start_main_~#t438~0.base, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t437~0.offset, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t440~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t439~0.offset, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t437~0.base, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 13:01:01,832 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L845-1-->L847: Formula: (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t438~0.base_11| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t438~0.base_11|) |v_ULTIMATE.start_main_~#t438~0.offset_10| 1)) |v_#memory_int_17|) (= 0 (select |v_#valid_44| |v_ULTIMATE.start_main_~#t438~0.base_11|)) (= (store |v_#valid_44| |v_ULTIMATE.start_main_~#t438~0.base_11| 1) |v_#valid_43|) (not (= 0 |v_ULTIMATE.start_main_~#t438~0.base_11|)) (= |v_ULTIMATE.start_main_~#t438~0.offset_10| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t438~0.base_11| 4)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t438~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t438~0.base=|v_ULTIMATE.start_main_~#t438~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t438~0.offset=|v_ULTIMATE.start_main_~#t438~0.offset_10|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t438~0.base, ULTIMATE.start_main_~#t438~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 13:01:01,832 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L847-1-->L849: Formula: (and (not (= |v_ULTIMATE.start_main_~#t439~0.base_10| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t439~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t439~0.base_10|) |v_ULTIMATE.start_main_~#t439~0.offset_9| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t439~0.base_10|)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t439~0.base_10| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t439~0.base_10|) (= |v_ULTIMATE.start_main_~#t439~0.offset_9| 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t439~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t439~0.offset=|v_ULTIMATE.start_main_~#t439~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t439~0.base=|v_ULTIMATE.start_main_~#t439~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t439~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t439~0.base] because there is no mapped edge [2019-12-07 13:01:01,833 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] P2ENTRY-->L4-3: Formula: (and (= ~y$w_buff1~0_Out-1595864320 ~y$w_buff0~0_In-1595864320) (= 1 ~y$w_buff0~0_Out-1595864320) (= P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-1595864320 |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-1595864320|) (= ~y$w_buff0_used~0_Out-1595864320 1) (= (ite (not (and (not (= (mod ~y$w_buff1_used~0_Out-1595864320 256) 0)) (not (= 0 (mod ~y$w_buff0_used~0_Out-1595864320 256))))) 1 0) |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-1595864320|) (= |P2Thread1of1ForFork3_#in~arg.base_In-1595864320| P2Thread1of1ForFork3_~arg.base_Out-1595864320) (= P2Thread1of1ForFork3_~arg.offset_Out-1595864320 |P2Thread1of1ForFork3_#in~arg.offset_In-1595864320|) (not (= 0 P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-1595864320)) (= ~y$w_buff1_used~0_Out-1595864320 ~y$w_buff0_used~0_In-1595864320)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$w_buff0~0=~y$w_buff0~0_In-1595864320, P2Thread1of1ForFork3_#in~arg.base=|P2Thread1of1ForFork3_#in~arg.base_In-1595864320|, P2Thread1of1ForFork3_#in~arg.offset=|P2Thread1of1ForFork3_#in~arg.offset_In-1595864320|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_Out-1595864320, ~y$w_buff1~0=~y$w_buff1~0_Out-1595864320, P2Thread1of1ForFork3___VERIFIER_assert_#in~expression=|P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-1595864320|, ~y$w_buff0~0=~y$w_buff0~0_Out-1595864320, P2Thread1of1ForFork3_~arg.base=P2Thread1of1ForFork3_~arg.base_Out-1595864320, P2Thread1of1ForFork3___VERIFIER_assert_~expression=P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-1595864320, P2Thread1of1ForFork3_#in~arg.base=|P2Thread1of1ForFork3_#in~arg.base_In-1595864320|, P2Thread1of1ForFork3_~arg.offset=P2Thread1of1ForFork3_~arg.offset_Out-1595864320, P2Thread1of1ForFork3_#in~arg.offset=|P2Thread1of1ForFork3_#in~arg.offset_In-1595864320|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-1595864320} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, P2Thread1of1ForFork3___VERIFIER_assert_#in~expression, ~y$w_buff0~0, P2Thread1of1ForFork3_~arg.base, P2Thread1of1ForFork3___VERIFIER_assert_~expression, P2Thread1of1ForFork3_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 13:01:01,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L849-1-->L851: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t440~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t440~0.base_13|) |v_ULTIMATE.start_main_~#t440~0.offset_11| 3)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t440~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t440~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t440~0.base_13| 0)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t440~0.base_13| 4) |v_#length_21|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t440~0.base_13| 1)) (= 0 (select |v_#valid_42| |v_ULTIMATE.start_main_~#t440~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t440~0.base=|v_ULTIMATE.start_main_~#t440~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_6|, ULTIMATE.start_main_~#t440~0.offset=|v_ULTIMATE.start_main_~#t440~0.offset_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t440~0.base, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t440~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 13:01:01,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_23 v_~__unbuffered_p0_EAX~0_23) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~a~0_19 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_23} OutVars{~a~0=v_~a~0_19, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_23, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_23, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 13:01:01,835 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L822-2-->L822-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-593102411 256))) (.cse1 (= (mod ~y$r_buff1_thd4~0_In-593102411 256) 0)) (.cse2 (= |P3Thread1of1ForFork0_#t~ite32_Out-593102411| |P3Thread1of1ForFork0_#t~ite33_Out-593102411|))) (or (and (not .cse0) (= |P3Thread1of1ForFork0_#t~ite32_Out-593102411| ~y$w_buff1~0_In-593102411) (not .cse1) .cse2) (and (= |P3Thread1of1ForFork0_#t~ite32_Out-593102411| ~y~0_In-593102411) (or .cse0 .cse1) .cse2))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-593102411, ~y$w_buff1~0=~y$w_buff1~0_In-593102411, ~y~0=~y~0_In-593102411, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-593102411} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-593102411, ~y$w_buff1~0=~y$w_buff1~0_In-593102411, ~y~0=~y~0_In-593102411, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out-593102411|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-593102411|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-593102411} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 13:01:01,835 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-584037940 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-584037940 256) 0))) (or (and (= |P2Thread1of1ForFork3_#t~ite28_Out-584037940| ~y$w_buff0_used~0_In-584037940) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork3_#t~ite28_Out-584037940| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-584037940, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-584037940} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-584037940, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-584037940, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out-584037940|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 13:01:01,836 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-321007102 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-321007102 256) 0))) (or (and (not .cse0) (= |P3Thread1of1ForFork0_#t~ite34_Out-321007102| 0) (not .cse1)) (and (= |P3Thread1of1ForFork0_#t~ite34_Out-321007102| ~y$w_buff0_used~0_In-321007102) (or .cse0 .cse1)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-321007102, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-321007102} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-321007102, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-321007102, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-321007102|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 13:01:01,837 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L801-->L801-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd3~0_In1387668736 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1387668736 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1387668736 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In1387668736 256)))) (or (and (= ~y$w_buff1_used~0_In1387668736 |P2Thread1of1ForFork3_#t~ite29_Out1387668736|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out1387668736|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1387668736, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1387668736, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1387668736, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1387668736} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1387668736, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1387668736, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1387668736, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out1387668736|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1387668736} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 13:01:01,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L763-->L763-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-246507355 256)))) (or (and (= ~y$w_buff0~0_In-246507355 |P1Thread1of1ForFork2_#t~ite8_Out-246507355|) .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-246507355| |P1Thread1of1ForFork2_#t~ite8_Out-246507355|) (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-246507355 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-246507355 256) 0) (and (= 0 (mod ~y$w_buff1_used~0_In-246507355 256)) .cse1) (and (= (mod ~y$r_buff1_thd2~0_In-246507355 256) 0) .cse1)))) (and (= |P1Thread1of1ForFork2_#t~ite8_In-246507355| |P1Thread1of1ForFork2_#t~ite8_Out-246507355|) (= |P1Thread1of1ForFork2_#t~ite9_Out-246507355| ~y$w_buff0~0_In-246507355) (not .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-246507355, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-246507355, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In-246507355|, ~y$w_buff0~0=~y$w_buff0~0_In-246507355, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-246507355, ~weak$$choice2~0=~weak$$choice2~0_In-246507355, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-246507355} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-246507355, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-246507355|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-246507355, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-246507355|, ~y$w_buff0~0=~y$w_buff0~0_In-246507355, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-246507355, ~weak$$choice2~0=~weak$$choice2~0_In-246507355, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-246507355} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:01:01,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L802-->L803: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1826154553 256))) (.cse0 (= ~y$r_buff0_thd3~0_In-1826154553 ~y$r_buff0_thd3~0_Out-1826154553)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1826154553 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~y$r_buff0_thd3~0_Out-1826154553) (not .cse1)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1826154553, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1826154553} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out-1826154553|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1826154553, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1826154553} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 13:01:01,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1271292775 256))) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1271292775 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In-1271292775 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-1271292775 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork3_#t~ite31_Out-1271292775| ~y$r_buff1_thd3~0_In-1271292775) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork3_#t~ite31_Out-1271292775|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1271292775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1271292775, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1271292775, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1271292775} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1271292775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1271292775, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1271292775, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out-1271292775|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1271292775} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 13:01:01,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork3_#t~ite31_38| v_~y$r_buff1_thd3~0_57) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_57, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 13:01:01,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In923640753 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In923640753 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In923640753 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd4~0_In923640753 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite35_Out923640753| 0)) (and (= |P3Thread1of1ForFork0_#t~ite35_Out923640753| ~y$w_buff1_used~0_In923640753) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In923640753, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In923640753, ~y$w_buff0_used~0=~y$w_buff0_used~0_In923640753, ~y$w_buff1_used~0=~y$w_buff1_used~0_In923640753} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In923640753, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In923640753, ~y$w_buff0_used~0=~y$w_buff0_used~0_In923640753, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out923640753|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In923640753} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 13:01:01,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd4~0_In1500663182 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1500663182 256) 0))) (or (and (= |P3Thread1of1ForFork0_#t~ite36_Out1500663182| 0) (not .cse0) (not .cse1)) (and (= |P3Thread1of1ForFork0_#t~ite36_Out1500663182| ~y$r_buff0_thd4~0_In1500663182) (or .cse0 .cse1)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1500663182, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1500663182} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1500663182, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1500663182, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out1500663182|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 13:01:01,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L826-->L826-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In571886810 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In571886810 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In571886810 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd4~0_In571886810 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite37_Out571886810| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~y$r_buff1_thd4~0_In571886810 |P3Thread1of1ForFork0_#t~ite37_Out571886810|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In571886810, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In571886810, ~y$w_buff0_used~0=~y$w_buff0_used~0_In571886810, ~y$w_buff1_used~0=~y$w_buff1_used~0_In571886810} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In571886810, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In571886810, ~y$w_buff0_used~0=~y$w_buff0_used~0_In571886810, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out571886810|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In571886810} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 13:01:01,840 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L826-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork0_#t~ite37_34| v_~y$r_buff1_thd4~0_55) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_55, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_33|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:01:01,840 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L764-->L764-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1344652306 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-1344652306 256) 0))) (or (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In-1344652306 256))) (= (mod ~y$w_buff0_used~0_In-1344652306 256) 0) (and (= 0 (mod ~y$r_buff1_thd2~0_In-1344652306 256)) .cse0))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1344652306| |P1Thread1of1ForFork2_#t~ite11_Out-1344652306|) (= |P1Thread1of1ForFork2_#t~ite11_Out-1344652306| ~y$w_buff1~0_In-1344652306) .cse1) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_In-1344652306| |P1Thread1of1ForFork2_#t~ite11_Out-1344652306|) (= |P1Thread1of1ForFork2_#t~ite12_Out-1344652306| ~y$w_buff1~0_In-1344652306)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1344652306, ~y$w_buff1~0=~y$w_buff1~0_In-1344652306, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1344652306, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1344652306, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In-1344652306|, ~weak$$choice2~0=~weak$$choice2~0_In-1344652306, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1344652306} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1344652306, ~y$w_buff1~0=~y$w_buff1~0_In-1344652306, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1344652306, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1344652306, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1344652306|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1344652306|, ~weak$$choice2~0=~weak$$choice2~0_In-1344652306, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1344652306} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:01:01,840 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L765-->L765-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In878161127 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_In878161127| |P1Thread1of1ForFork2_#t~ite14_Out878161127|) (not .cse0) (= ~y$w_buff0_used~0_In878161127 |P1Thread1of1ForFork2_#t~ite15_Out878161127|)) (and .cse0 (= |P1Thread1of1ForFork2_#t~ite15_Out878161127| |P1Thread1of1ForFork2_#t~ite14_Out878161127|) (= ~y$w_buff0_used~0_In878161127 |P1Thread1of1ForFork2_#t~ite14_Out878161127|) (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In878161127 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In878161127 256)) (and (= 0 (mod ~y$w_buff1_used~0_In878161127 256)) .cse1) (and (= 0 (mod ~y$r_buff1_thd2~0_In878161127 256)) .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In878161127, ~y$w_buff0_used~0=~y$w_buff0_used~0_In878161127, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In878161127, ~weak$$choice2~0=~weak$$choice2~0_In878161127, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In878161127|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In878161127} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In878161127, ~y$w_buff0_used~0=~y$w_buff0_used~0_In878161127, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In878161127, ~weak$$choice2~0=~weak$$choice2~0_In878161127, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out878161127|, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out878161127|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In878161127} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 13:01:01,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L767-->L768: Formula: (and (= v_~y$r_buff0_thd2~0_109 v_~y$r_buff0_thd2~0_108) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_6|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_7|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 13:01:01,841 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L768-->L768-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In892162267 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite23_In892162267| |P1Thread1of1ForFork2_#t~ite23_Out892162267|) (not .cse0) (= ~y$r_buff1_thd2~0_In892162267 |P1Thread1of1ForFork2_#t~ite24_Out892162267|)) (and (= |P1Thread1of1ForFork2_#t~ite24_Out892162267| |P1Thread1of1ForFork2_#t~ite23_Out892162267|) .cse0 (= ~y$r_buff1_thd2~0_In892162267 |P1Thread1of1ForFork2_#t~ite23_Out892162267|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In892162267 256)))) (or (= (mod ~y$w_buff0_used~0_In892162267 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In892162267 256))) (and (= (mod ~y$w_buff1_used~0_In892162267 256) 0) .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In892162267, ~y$w_buff0_used~0=~y$w_buff0_used~0_In892162267, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In892162267, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In892162267|, ~weak$$choice2~0=~weak$$choice2~0_In892162267, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In892162267, ~y$w_buff0_used~0=~y$w_buff0_used~0_In892162267, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In892162267, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out892162267|, ~weak$$choice2~0=~weak$$choice2~0_In892162267, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out892162267|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 13:01:01,842 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L770-->L778: Formula: (and (= (+ v_~__unbuffered_cnt~0_22 1) v_~__unbuffered_cnt~0_21) (= v_~y~0_29 v_~y$mem_tmp~0_6) (= 0 v_~y$flush_delayed~0_8) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_6, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_22} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_6, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21, ~y~0=v_~y~0_29, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 13:01:01,842 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L851-1-->L857: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 4 v_~__unbuffered_cnt~0_20) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:01:01,842 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L857-2-->L857-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-348157237 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-348157237 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite42_Out-348157237| ~y~0_In-348157237)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite42_Out-348157237| ~y$w_buff1~0_In-348157237) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-348157237, ~y~0=~y~0_In-348157237, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-348157237, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-348157237} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-348157237, ~y~0=~y~0_In-348157237, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-348157237|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-348157237, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-348157237} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:01:01,842 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L857-4-->L858: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite42_14|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_13|, ~y~0=v_~y~0_46, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:01:01,843 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L858-->L858-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1617963135 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1617963135 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-1617963135| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite44_Out-1617963135| ~y$w_buff0_used~0_In-1617963135)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1617963135, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1617963135} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1617963135, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1617963135, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1617963135|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 13:01:01,843 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L859-->L859-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In1180315853 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In1180315853 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1180315853 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1180315853 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In1180315853 |ULTIMATE.start_main_#t~ite45_Out1180315853|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite45_Out1180315853|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1180315853, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1180315853, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1180315853} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1180315853, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1180315853, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1180315853|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1180315853} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 13:01:01,843 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L860-->L860-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1510826899 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1510826899 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite46_Out1510826899|)) (and (= ~y$r_buff0_thd0~0_In1510826899 |ULTIMATE.start_main_#t~ite46_Out1510826899|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1510826899, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1510826899} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1510826899, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1510826899, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1510826899|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 13:01:01,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L861-->L861-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In2122701319 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In2122701319 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In2122701319 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In2122701319 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite47_Out2122701319| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite47_Out2122701319| ~y$r_buff1_thd0~0_In2122701319)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2122701319, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2122701319, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2122701319, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2122701319} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2122701319, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2122701319, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out2122701319|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2122701319, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2122701319} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:01:01,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L861-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~y$r_buff1_thd0~0_133 |v_ULTIMATE.start_main_#t~ite47_73|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_78) (= 0 v_~__unbuffered_p1_EAX~0_32) (= 0 v_~__unbuffered_p3_EBX~0_31) (= 0 v_~__unbuffered_p0_EAX~0_46) (= 1 v_~__unbuffered_p3_EAX~0_31))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_29) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_32, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_73|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_78, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_32, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_72|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_78, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_31, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:01:01,894 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:01:01 BasicIcfg [2019-12-07 13:01:01,894 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:01:01,894 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:01:01,895 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:01:01,895 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:01:01,895 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:58:04" (3/4) ... [2019-12-07 13:01:01,896 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:01:01,897 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] ULTIMATE.startENTRY-->L845: Formula: (let ((.cse0 (store |v_#valid_101| 0 0))) (and (= 0 v_~y$r_buff0_thd3~0_200) (= v_~weak$$choice2~0_146 0) (= v_~z~0_79 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff0_used~0_906 0) (= |v_ULTIMATE.start_main_~#t437~0.offset_27| 0) (= v_~__unbuffered_cnt~0_174 0) (= v_~main$tmp_guard1~0_51 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t437~0.base_42| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t437~0.base_42|) |v_ULTIMATE.start_main_~#t437~0.offset_27| 0)) |v_#memory_int_21|) (= |v_#valid_99| (store .cse0 |v_ULTIMATE.start_main_~#t437~0.base_42| 1)) (= 0 v_~__unbuffered_p3_EAX~0_50) (= 0 v_~__unbuffered_p2_EAX~0_106) (= 0 v_~y$r_buff0_thd2~0_339) (= v_~y$mem_tmp~0_18 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= 0 v_~y$r_buff1_thd4~0_165) (= 0 v_~y$w_buff0~0_533) (= 0 v_~y$r_buff1_thd2~0_235) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t437~0.base_42|)) (= 0 v_~__unbuffered_p3_EBX~0_50) (= 0 |v_#NULL.base_6|) (= v_~y$w_buff1~0_348 0) (= 0 v_~y$r_buff0_thd4~0_151) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_64) (< 0 |v_#StackHeapBarrier_20|) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_35 0) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~y$flush_delayed~0_42) (= v_~x~0_39 0) (= v_~y$r_buff0_thd1~0_73 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t437~0.base_42|) (= 0 v_~y$r_buff1_thd1~0_74) (= v_~y~0_158 0) (= v_~y$r_buff1_thd0~0_169 0) (= v_~y$r_buff0_thd0~0_171 0) (= v_~y$w_buff1_used~0_540 0) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t437~0.base_42| 4)) (= 0 v_~y$r_buff1_thd3~0_136))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_101|, #memory_int=|v_#memory_int_22|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t438~0.offset=|v_ULTIMATE.start_main_~#t438~0.offset_19|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_110|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_43|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_35, ~y$mem_tmp~0=v_~y$mem_tmp~0_18, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_64, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_136, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, ULTIMATE.start_main_~#t440~0.offset=|v_ULTIMATE.start_main_~#t440~0.offset_19|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_73, ~y$flush_delayed~0=v_~y$flush_delayed~0_42, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_50, #length=|v_#length_31|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_106, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_21|, ULTIMATE.start_main_~#t439~0.base=|v_ULTIMATE.start_main_~#t439~0.base_24|, ULTIMATE.start_main_~#t438~0.base=|v_ULTIMATE.start_main_~#t438~0.base_34|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_165, ~y$w_buff1~0=v_~y$w_buff1~0_348, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t437~0.offset=|v_ULTIMATE.start_main_~#t437~0.offset_27|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_339, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_174, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_169, ~x~0=v_~x~0_39, ULTIMATE.start_main_~#t440~0.base=|v_ULTIMATE.start_main_~#t440~0.base_25|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_906, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_41|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_239|, ULTIMATE.start_main_~#t439~0.offset=|v_ULTIMATE.start_main_~#t439~0.offset_18|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_74, ~y$w_buff0~0=v_~y$w_buff0~0_533, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_200, ~y~0=v_~y~0_158, ULTIMATE.start_main_~#t437~0.base=|v_ULTIMATE.start_main_~#t437~0.base_42|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_50, #NULL.base=|v_#NULL.base_6|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_235, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_151, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_171, #valid=|v_#valid_99|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ~z~0=v_~z~0_79, ~weak$$choice2~0=v_~weak$$choice2~0_146, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_540} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t438~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t440~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t439~0.base, ULTIMATE.start_main_~#t438~0.base, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t437~0.offset, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t440~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t439~0.offset, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t437~0.base, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 13:01:01,897 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L845-1-->L847: Formula: (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t438~0.base_11| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t438~0.base_11|) |v_ULTIMATE.start_main_~#t438~0.offset_10| 1)) |v_#memory_int_17|) (= 0 (select |v_#valid_44| |v_ULTIMATE.start_main_~#t438~0.base_11|)) (= (store |v_#valid_44| |v_ULTIMATE.start_main_~#t438~0.base_11| 1) |v_#valid_43|) (not (= 0 |v_ULTIMATE.start_main_~#t438~0.base_11|)) (= |v_ULTIMATE.start_main_~#t438~0.offset_10| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t438~0.base_11| 4)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t438~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t438~0.base=|v_ULTIMATE.start_main_~#t438~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t438~0.offset=|v_ULTIMATE.start_main_~#t438~0.offset_10|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t438~0.base, ULTIMATE.start_main_~#t438~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 13:01:01,897 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L847-1-->L849: Formula: (and (not (= |v_ULTIMATE.start_main_~#t439~0.base_10| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t439~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t439~0.base_10|) |v_ULTIMATE.start_main_~#t439~0.offset_9| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t439~0.base_10|)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t439~0.base_10| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t439~0.base_10|) (= |v_ULTIMATE.start_main_~#t439~0.offset_9| 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t439~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t439~0.offset=|v_ULTIMATE.start_main_~#t439~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t439~0.base=|v_ULTIMATE.start_main_~#t439~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t439~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t439~0.base] because there is no mapped edge [2019-12-07 13:01:01,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] P2ENTRY-->L4-3: Formula: (and (= ~y$w_buff1~0_Out-1595864320 ~y$w_buff0~0_In-1595864320) (= 1 ~y$w_buff0~0_Out-1595864320) (= P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-1595864320 |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-1595864320|) (= ~y$w_buff0_used~0_Out-1595864320 1) (= (ite (not (and (not (= (mod ~y$w_buff1_used~0_Out-1595864320 256) 0)) (not (= 0 (mod ~y$w_buff0_used~0_Out-1595864320 256))))) 1 0) |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-1595864320|) (= |P2Thread1of1ForFork3_#in~arg.base_In-1595864320| P2Thread1of1ForFork3_~arg.base_Out-1595864320) (= P2Thread1of1ForFork3_~arg.offset_Out-1595864320 |P2Thread1of1ForFork3_#in~arg.offset_In-1595864320|) (not (= 0 P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-1595864320)) (= ~y$w_buff1_used~0_Out-1595864320 ~y$w_buff0_used~0_In-1595864320)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$w_buff0~0=~y$w_buff0~0_In-1595864320, P2Thread1of1ForFork3_#in~arg.base=|P2Thread1of1ForFork3_#in~arg.base_In-1595864320|, P2Thread1of1ForFork3_#in~arg.offset=|P2Thread1of1ForFork3_#in~arg.offset_In-1595864320|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_Out-1595864320, ~y$w_buff1~0=~y$w_buff1~0_Out-1595864320, P2Thread1of1ForFork3___VERIFIER_assert_#in~expression=|P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-1595864320|, ~y$w_buff0~0=~y$w_buff0~0_Out-1595864320, P2Thread1of1ForFork3_~arg.base=P2Thread1of1ForFork3_~arg.base_Out-1595864320, P2Thread1of1ForFork3___VERIFIER_assert_~expression=P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-1595864320, P2Thread1of1ForFork3_#in~arg.base=|P2Thread1of1ForFork3_#in~arg.base_In-1595864320|, P2Thread1of1ForFork3_~arg.offset=P2Thread1of1ForFork3_~arg.offset_Out-1595864320, P2Thread1of1ForFork3_#in~arg.offset=|P2Thread1of1ForFork3_#in~arg.offset_In-1595864320|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-1595864320} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, P2Thread1of1ForFork3___VERIFIER_assert_#in~expression, ~y$w_buff0~0, P2Thread1of1ForFork3_~arg.base, P2Thread1of1ForFork3___VERIFIER_assert_~expression, P2Thread1of1ForFork3_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 13:01:01,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L849-1-->L851: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t440~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t440~0.base_13|) |v_ULTIMATE.start_main_~#t440~0.offset_11| 3)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t440~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t440~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t440~0.base_13| 0)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t440~0.base_13| 4) |v_#length_21|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t440~0.base_13| 1)) (= 0 (select |v_#valid_42| |v_ULTIMATE.start_main_~#t440~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t440~0.base=|v_ULTIMATE.start_main_~#t440~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_6|, ULTIMATE.start_main_~#t440~0.offset=|v_ULTIMATE.start_main_~#t440~0.offset_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t440~0.base, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t440~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 13:01:01,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_23 v_~__unbuffered_p0_EAX~0_23) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~a~0_19 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_23} OutVars{~a~0=v_~a~0_19, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_23, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_23, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 13:01:01,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L822-2-->L822-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-593102411 256))) (.cse1 (= (mod ~y$r_buff1_thd4~0_In-593102411 256) 0)) (.cse2 (= |P3Thread1of1ForFork0_#t~ite32_Out-593102411| |P3Thread1of1ForFork0_#t~ite33_Out-593102411|))) (or (and (not .cse0) (= |P3Thread1of1ForFork0_#t~ite32_Out-593102411| ~y$w_buff1~0_In-593102411) (not .cse1) .cse2) (and (= |P3Thread1of1ForFork0_#t~ite32_Out-593102411| ~y~0_In-593102411) (or .cse0 .cse1) .cse2))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-593102411, ~y$w_buff1~0=~y$w_buff1~0_In-593102411, ~y~0=~y~0_In-593102411, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-593102411} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-593102411, ~y$w_buff1~0=~y$w_buff1~0_In-593102411, ~y~0=~y~0_In-593102411, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out-593102411|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-593102411|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-593102411} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 13:01:01,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-584037940 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-584037940 256) 0))) (or (and (= |P2Thread1of1ForFork3_#t~ite28_Out-584037940| ~y$w_buff0_used~0_In-584037940) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork3_#t~ite28_Out-584037940| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-584037940, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-584037940} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-584037940, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-584037940, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out-584037940|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 13:01:01,901 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-321007102 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-321007102 256) 0))) (or (and (not .cse0) (= |P3Thread1of1ForFork0_#t~ite34_Out-321007102| 0) (not .cse1)) (and (= |P3Thread1of1ForFork0_#t~ite34_Out-321007102| ~y$w_buff0_used~0_In-321007102) (or .cse0 .cse1)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-321007102, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-321007102} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-321007102, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-321007102, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-321007102|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 13:01:01,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L801-->L801-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd3~0_In1387668736 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1387668736 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1387668736 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In1387668736 256)))) (or (and (= ~y$w_buff1_used~0_In1387668736 |P2Thread1of1ForFork3_#t~ite29_Out1387668736|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out1387668736|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1387668736, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1387668736, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1387668736, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1387668736} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1387668736, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1387668736, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1387668736, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out1387668736|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1387668736} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 13:01:01,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L763-->L763-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-246507355 256)))) (or (and (= ~y$w_buff0~0_In-246507355 |P1Thread1of1ForFork2_#t~ite8_Out-246507355|) .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-246507355| |P1Thread1of1ForFork2_#t~ite8_Out-246507355|) (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-246507355 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-246507355 256) 0) (and (= 0 (mod ~y$w_buff1_used~0_In-246507355 256)) .cse1) (and (= (mod ~y$r_buff1_thd2~0_In-246507355 256) 0) .cse1)))) (and (= |P1Thread1of1ForFork2_#t~ite8_In-246507355| |P1Thread1of1ForFork2_#t~ite8_Out-246507355|) (= |P1Thread1of1ForFork2_#t~ite9_Out-246507355| ~y$w_buff0~0_In-246507355) (not .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-246507355, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-246507355, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In-246507355|, ~y$w_buff0~0=~y$w_buff0~0_In-246507355, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-246507355, ~weak$$choice2~0=~weak$$choice2~0_In-246507355, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-246507355} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-246507355, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-246507355|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-246507355, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-246507355|, ~y$w_buff0~0=~y$w_buff0~0_In-246507355, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-246507355, ~weak$$choice2~0=~weak$$choice2~0_In-246507355, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-246507355} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:01:01,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L802-->L803: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1826154553 256))) (.cse0 (= ~y$r_buff0_thd3~0_In-1826154553 ~y$r_buff0_thd3~0_Out-1826154553)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1826154553 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~y$r_buff0_thd3~0_Out-1826154553) (not .cse1)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1826154553, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1826154553} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out-1826154553|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1826154553, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1826154553} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 13:01:01,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1271292775 256))) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1271292775 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In-1271292775 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-1271292775 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork3_#t~ite31_Out-1271292775| ~y$r_buff1_thd3~0_In-1271292775) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork3_#t~ite31_Out-1271292775|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1271292775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1271292775, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1271292775, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1271292775} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1271292775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1271292775, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1271292775, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out-1271292775|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1271292775} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 13:01:01,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork3_#t~ite31_38| v_~y$r_buff1_thd3~0_57) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_57, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 13:01:01,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In923640753 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In923640753 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In923640753 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd4~0_In923640753 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite35_Out923640753| 0)) (and (= |P3Thread1of1ForFork0_#t~ite35_Out923640753| ~y$w_buff1_used~0_In923640753) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In923640753, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In923640753, ~y$w_buff0_used~0=~y$w_buff0_used~0_In923640753, ~y$w_buff1_used~0=~y$w_buff1_used~0_In923640753} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In923640753, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In923640753, ~y$w_buff0_used~0=~y$w_buff0_used~0_In923640753, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out923640753|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In923640753} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 13:01:01,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd4~0_In1500663182 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1500663182 256) 0))) (or (and (= |P3Thread1of1ForFork0_#t~ite36_Out1500663182| 0) (not .cse0) (not .cse1)) (and (= |P3Thread1of1ForFork0_#t~ite36_Out1500663182| ~y$r_buff0_thd4~0_In1500663182) (or .cse0 .cse1)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1500663182, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1500663182} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1500663182, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1500663182, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out1500663182|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 13:01:01,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L826-->L826-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In571886810 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In571886810 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In571886810 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd4~0_In571886810 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite37_Out571886810| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~y$r_buff1_thd4~0_In571886810 |P3Thread1of1ForFork0_#t~ite37_Out571886810|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In571886810, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In571886810, ~y$w_buff0_used~0=~y$w_buff0_used~0_In571886810, ~y$w_buff1_used~0=~y$w_buff1_used~0_In571886810} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In571886810, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In571886810, ~y$w_buff0_used~0=~y$w_buff0_used~0_In571886810, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out571886810|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In571886810} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 13:01:01,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L826-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork0_#t~ite37_34| v_~y$r_buff1_thd4~0_55) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_55, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_33|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:01:01,904 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L764-->L764-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1344652306 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-1344652306 256) 0))) (or (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In-1344652306 256))) (= (mod ~y$w_buff0_used~0_In-1344652306 256) 0) (and (= 0 (mod ~y$r_buff1_thd2~0_In-1344652306 256)) .cse0))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1344652306| |P1Thread1of1ForFork2_#t~ite11_Out-1344652306|) (= |P1Thread1of1ForFork2_#t~ite11_Out-1344652306| ~y$w_buff1~0_In-1344652306) .cse1) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_In-1344652306| |P1Thread1of1ForFork2_#t~ite11_Out-1344652306|) (= |P1Thread1of1ForFork2_#t~ite12_Out-1344652306| ~y$w_buff1~0_In-1344652306)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1344652306, ~y$w_buff1~0=~y$w_buff1~0_In-1344652306, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1344652306, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1344652306, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In-1344652306|, ~weak$$choice2~0=~weak$$choice2~0_In-1344652306, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1344652306} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1344652306, ~y$w_buff1~0=~y$w_buff1~0_In-1344652306, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1344652306, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1344652306, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1344652306|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1344652306|, ~weak$$choice2~0=~weak$$choice2~0_In-1344652306, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1344652306} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:01:01,905 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L765-->L765-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In878161127 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_In878161127| |P1Thread1of1ForFork2_#t~ite14_Out878161127|) (not .cse0) (= ~y$w_buff0_used~0_In878161127 |P1Thread1of1ForFork2_#t~ite15_Out878161127|)) (and .cse0 (= |P1Thread1of1ForFork2_#t~ite15_Out878161127| |P1Thread1of1ForFork2_#t~ite14_Out878161127|) (= ~y$w_buff0_used~0_In878161127 |P1Thread1of1ForFork2_#t~ite14_Out878161127|) (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In878161127 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In878161127 256)) (and (= 0 (mod ~y$w_buff1_used~0_In878161127 256)) .cse1) (and (= 0 (mod ~y$r_buff1_thd2~0_In878161127 256)) .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In878161127, ~y$w_buff0_used~0=~y$w_buff0_used~0_In878161127, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In878161127, ~weak$$choice2~0=~weak$$choice2~0_In878161127, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In878161127|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In878161127} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In878161127, ~y$w_buff0_used~0=~y$w_buff0_used~0_In878161127, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In878161127, ~weak$$choice2~0=~weak$$choice2~0_In878161127, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out878161127|, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out878161127|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In878161127} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 13:01:01,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L767-->L768: Formula: (and (= v_~y$r_buff0_thd2~0_109 v_~y$r_buff0_thd2~0_108) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_6|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_7|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 13:01:01,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L768-->L768-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In892162267 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite23_In892162267| |P1Thread1of1ForFork2_#t~ite23_Out892162267|) (not .cse0) (= ~y$r_buff1_thd2~0_In892162267 |P1Thread1of1ForFork2_#t~ite24_Out892162267|)) (and (= |P1Thread1of1ForFork2_#t~ite24_Out892162267| |P1Thread1of1ForFork2_#t~ite23_Out892162267|) .cse0 (= ~y$r_buff1_thd2~0_In892162267 |P1Thread1of1ForFork2_#t~ite23_Out892162267|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In892162267 256)))) (or (= (mod ~y$w_buff0_used~0_In892162267 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In892162267 256))) (and (= (mod ~y$w_buff1_used~0_In892162267 256) 0) .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In892162267, ~y$w_buff0_used~0=~y$w_buff0_used~0_In892162267, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In892162267, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In892162267|, ~weak$$choice2~0=~weak$$choice2~0_In892162267, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In892162267, ~y$w_buff0_used~0=~y$w_buff0_used~0_In892162267, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In892162267, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out892162267|, ~weak$$choice2~0=~weak$$choice2~0_In892162267, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out892162267|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 13:01:01,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L770-->L778: Formula: (and (= (+ v_~__unbuffered_cnt~0_22 1) v_~__unbuffered_cnt~0_21) (= v_~y~0_29 v_~y$mem_tmp~0_6) (= 0 v_~y$flush_delayed~0_8) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_6, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_22} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_6, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21, ~y~0=v_~y~0_29, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 13:01:01,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L851-1-->L857: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 4 v_~__unbuffered_cnt~0_20) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:01:01,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L857-2-->L857-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-348157237 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-348157237 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite42_Out-348157237| ~y~0_In-348157237)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite42_Out-348157237| ~y$w_buff1~0_In-348157237) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-348157237, ~y~0=~y~0_In-348157237, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-348157237, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-348157237} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-348157237, ~y~0=~y~0_In-348157237, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-348157237|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-348157237, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-348157237} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:01:01,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L857-4-->L858: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite42_14|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_13|, ~y~0=v_~y~0_46, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:01:01,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L858-->L858-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1617963135 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1617963135 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-1617963135| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite44_Out-1617963135| ~y$w_buff0_used~0_In-1617963135)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1617963135, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1617963135} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1617963135, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1617963135, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1617963135|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 13:01:01,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L859-->L859-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In1180315853 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In1180315853 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1180315853 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1180315853 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In1180315853 |ULTIMATE.start_main_#t~ite45_Out1180315853|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite45_Out1180315853|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1180315853, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1180315853, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1180315853} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1180315853, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1180315853, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1180315853|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1180315853} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 13:01:01,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L860-->L860-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1510826899 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1510826899 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite46_Out1510826899|)) (and (= ~y$r_buff0_thd0~0_In1510826899 |ULTIMATE.start_main_#t~ite46_Out1510826899|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1510826899, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1510826899} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1510826899, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1510826899, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1510826899|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 13:01:01,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L861-->L861-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In2122701319 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In2122701319 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In2122701319 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In2122701319 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite47_Out2122701319| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite47_Out2122701319| ~y$r_buff1_thd0~0_In2122701319)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2122701319, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2122701319, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2122701319, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2122701319} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2122701319, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2122701319, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out2122701319|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2122701319, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2122701319} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:01:01,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L861-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~y$r_buff1_thd0~0_133 |v_ULTIMATE.start_main_#t~ite47_73|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_78) (= 0 v_~__unbuffered_p1_EAX~0_32) (= 0 v_~__unbuffered_p3_EBX~0_31) (= 0 v_~__unbuffered_p0_EAX~0_46) (= 1 v_~__unbuffered_p3_EAX~0_31))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_29) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_32, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_73|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_78, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_32, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_72|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_78, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_31, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:01:01,960 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_537ddba2-de71-4e9a-858e-eec89f6dfd37/bin/uautomizer/witness.graphml [2019-12-07 13:01:01,960 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:01:01,962 INFO L168 Benchmark]: Toolchain (without parser) took 178667.87 ms. Allocated memory was 1.0 GB in the beginning and 7.9 GB in the end (delta: 6.9 GB). Free memory was 940.8 MB in the beginning and 4.7 GB in the end (delta: -3.8 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 13:01:01,962 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 966.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:01:01,962 INFO L168 Benchmark]: CACSL2BoogieTranslator took 389.31 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 115.3 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -142.2 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2019-12-07 13:01:01,962 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:01:01,962 INFO L168 Benchmark]: Boogie Preprocessor took 26.44 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:01:01,963 INFO L168 Benchmark]: RCFGBuilder took 415.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. [2019-12-07 13:01:01,963 INFO L168 Benchmark]: TraceAbstraction took 177727.35 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.7 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 13:01:01,963 INFO L168 Benchmark]: Witness Printer took 66.11 ms. Allocated memory is still 7.9 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 10.8 MB). Peak memory consumption was 10.8 MB. Max. memory is 11.5 GB. [2019-12-07 13:01:01,965 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 966.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 389.31 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 115.3 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -142.2 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.44 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 415.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 177727.35 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.7 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 66.11 ms. Allocated memory is still 7.9 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 10.8 MB). Peak memory consumption was 10.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.7s, 182 ProgramPointsBefore, 88 ProgramPointsAfterwards, 210 TransitionsBefore, 92 TransitionsAfterwards, 18126 CoEnabledTransitionPairs, 8 FixpointIterations, 38 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 29 ChoiceCompositions, 7271 VarBasedMoverChecksPositive, 240 VarBasedMoverChecksNegative, 64 SemBasedMoverChecksPositive, 256 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 72619 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L845] FCALL, FORK 0 pthread_create(&t437, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L847] FCALL, FORK 0 pthread_create(&t438, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L849] FCALL, FORK 0 pthread_create(&t439, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L788] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L789] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L790] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L791] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L792] 3 y$r_buff1_thd4 = y$r_buff0_thd4 [L793] 3 y$r_buff0_thd3 = (_Bool)1 [L796] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L799] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L851] FCALL, FORK 0 pthread_create(&t440, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] 4 z = 1 [L816] 4 __unbuffered_p3_EAX = z [L819] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L822] EXPR 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L822] 4 y = y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L755] 2 x = 1 [L758] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L759] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L760] 2 y$flush_delayed = weak$$choice2 [L761] 2 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L762] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L762] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L763] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L823] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L824] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L825] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L764] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L765] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L766] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L766] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L768] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L769] 2 __unbuffered_p1_EAX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L857] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L858] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L859] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L860] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 177.5s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 53.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6888 SDtfs, 14066 SDslu, 32772 SDs, 0 SdLazy, 27037 SolverSat, 902 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 16.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 709 GetRequests, 48 SyntacticMatches, 19 SemanticMatches, 642 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5294 ImplicationChecksByTransitivity, 12.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=272736occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 88.7s AutomataMinimizationTime, 33 MinimizatonAttempts, 450120 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 4.1s InterpolantComputationTime, 1502 NumberOfCodeBlocks, 1502 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 1410 ConstructedInterpolants, 0 QuantifiedInterpolants, 626719 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...