./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix019_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix019_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4e836d0db5a965c1245e6f7af36974202ceef14c .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:51:45,213 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:51:45,215 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:51:45,222 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:51:45,222 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:51:45,223 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:51:45,224 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:51:45,226 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:51:45,227 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:51:45,228 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:51:45,228 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:51:45,229 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:51:45,229 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:51:45,230 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:51:45,231 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:51:45,231 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:51:45,232 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:51:45,233 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:51:45,234 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:51:45,236 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:51:45,237 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:51:45,238 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:51:45,238 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:51:45,239 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:51:45,240 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:51:45,241 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:51:45,241 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:51:45,241 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:51:45,242 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:51:45,242 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:51:45,242 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:51:45,243 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:51:45,243 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:51:45,244 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:51:45,244 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:51:45,244 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:51:45,245 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:51:45,245 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:51:45,245 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:51:45,246 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:51:45,246 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:51:45,247 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:51:45,256 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:51:45,256 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:51:45,257 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:51:45,257 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:51:45,257 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:51:45,258 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:51:45,258 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:51:45,258 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:51:45,258 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:51:45,258 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:51:45,258 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:51:45,258 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:51:45,259 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:51:45,259 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:51:45,259 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:51:45,259 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:51:45,259 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:51:45,259 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:51:45,259 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:51:45,260 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:51:45,260 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:51:45,260 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:51:45,260 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:51:45,260 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:51:45,260 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:51:45,260 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:51:45,260 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:51:45,261 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:51:45,261 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:51:45,261 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4e836d0db5a965c1245e6f7af36974202ceef14c [2019-12-07 10:51:45,358 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:51:45,368 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:51:45,371 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:51:45,372 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:51:45,373 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:51:45,373 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix019_pso.oepc.i [2019-12-07 10:51:45,413 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/data/0f0830dc1/a0b0bb4a60c843d3925ec038021a1e49/FLAGd636c6481 [2019-12-07 10:51:45,917 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:51:45,918 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/sv-benchmarks/c/pthread-wmm/mix019_pso.oepc.i [2019-12-07 10:51:45,930 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/data/0f0830dc1/a0b0bb4a60c843d3925ec038021a1e49/FLAGd636c6481 [2019-12-07 10:51:46,453 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/data/0f0830dc1/a0b0bb4a60c843d3925ec038021a1e49 [2019-12-07 10:51:46,459 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:51:46,461 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:51:46,463 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:51:46,463 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:51:46,468 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:51:46,469 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,473 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@73480b01 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46, skipping insertion in model container [2019-12-07 10:51:46,473 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,480 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:51:46,515 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:51:46,757 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:51:46,764 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:51:46,806 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:51:46,852 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:51:46,852 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46 WrapperNode [2019-12-07 10:51:46,852 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:51:46,853 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:51:46,853 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:51:46,853 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:51:46,858 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,872 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,890 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:51:46,890 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:51:46,890 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:51:46,890 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:51:46,896 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,896 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,900 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,900 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,907 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,910 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,912 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... [2019-12-07 10:51:46,916 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:51:46,916 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:51:46,916 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:51:46,916 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:51:46,917 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:51:46,956 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:51:46,956 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:51:46,956 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:51:46,956 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:51:46,956 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:51:46,956 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:51:46,956 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:51:46,956 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:51:46,956 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:51:46,956 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:51:46,957 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:51:46,957 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:51:46,957 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:51:46,958 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:51:47,321 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:51:47,322 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:51:47,322 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:51:47 BoogieIcfgContainer [2019-12-07 10:51:47,322 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:51:47,323 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:51:47,323 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:51:47,325 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:51:47,325 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:51:46" (1/3) ... [2019-12-07 10:51:47,326 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ca4e130 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:51:47, skipping insertion in model container [2019-12-07 10:51:47,326 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:51:46" (2/3) ... [2019-12-07 10:51:47,326 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ca4e130 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:51:47, skipping insertion in model container [2019-12-07 10:51:47,326 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:51:47" (3/3) ... [2019-12-07 10:51:47,327 INFO L109 eAbstractionObserver]: Analyzing ICFG mix019_pso.oepc.i [2019-12-07 10:51:47,334 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:51:47,334 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:51:47,339 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:51:47,340 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:51:47,365 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,365 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,365 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,365 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,365 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,365 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,366 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,366 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,366 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,366 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,366 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,366 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,367 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,367 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,367 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,367 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,367 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,367 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,367 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,368 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,368 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,368 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,368 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,368 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,368 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,368 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,368 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,369 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,369 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,369 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,369 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,369 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,369 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,369 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,370 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,370 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,370 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,370 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,370 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,370 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,371 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,371 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,371 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,371 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,371 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,371 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,371 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,372 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,372 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,372 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,372 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,372 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,372 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,372 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,372 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,373 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,373 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,373 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,373 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,373 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,373 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,373 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,374 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,374 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,374 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,374 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,375 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,375 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,375 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,375 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,375 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,375 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,375 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,375 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,376 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,377 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,377 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,377 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,377 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,377 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,377 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,377 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,377 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,378 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,378 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,378 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,378 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,378 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,378 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,378 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,378 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,379 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,380 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,381 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,382 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,383 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:51:47,400 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:51:47,414 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:51:47,414 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:51:47,414 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:51:47,414 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:51:47,414 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:51:47,414 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:51:47,414 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:51:47,414 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:51:47,425 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 10:51:47,426 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 10:51:47,488 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 10:51:47,489 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:51:47,499 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:51:47,516 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 10:51:47,546 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 10:51:47,546 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:51:47,551 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:51:47,567 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 10:51:47,568 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:51:50,384 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 10:51:50,623 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130103 [2019-12-07 10:51:50,623 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 10:51:50,626 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 105 transitions [2019-12-07 10:52:07,781 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 122102 states. [2019-12-07 10:52:07,783 INFO L276 IsEmpty]: Start isEmpty. Operand 122102 states. [2019-12-07 10:52:07,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 10:52:07,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:52:07,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 10:52:07,788 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:52:07,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:52:07,792 INFO L82 PathProgramCache]: Analyzing trace with hash 913940, now seen corresponding path program 1 times [2019-12-07 10:52:07,797 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:52:07,798 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862058326] [2019-12-07 10:52:07,798 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:52:07,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:52:07,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:52:07,938 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862058326] [2019-12-07 10:52:07,939 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:52:07,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:52:07,939 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1246060738] [2019-12-07 10:52:07,942 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:52:07,942 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:52:07,951 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:52:07,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:52:07,952 INFO L87 Difference]: Start difference. First operand 122102 states. Second operand 3 states. [2019-12-07 10:52:08,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:52:08,828 INFO L93 Difference]: Finished difference Result 121140 states and 517588 transitions. [2019-12-07 10:52:08,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:52:08,830 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 10:52:08,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:52:09,290 INFO L225 Difference]: With dead ends: 121140 [2019-12-07 10:52:09,290 INFO L226 Difference]: Without dead ends: 107958 [2019-12-07 10:52:09,291 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:52:13,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107958 states. [2019-12-07 10:52:15,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107958 to 107958. [2019-12-07 10:52:15,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107958 states. [2019-12-07 10:52:16,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107958 states to 107958 states and 460128 transitions. [2019-12-07 10:52:16,205 INFO L78 Accepts]: Start accepts. Automaton has 107958 states and 460128 transitions. Word has length 3 [2019-12-07 10:52:16,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:52:16,205 INFO L462 AbstractCegarLoop]: Abstraction has 107958 states and 460128 transitions. [2019-12-07 10:52:16,205 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:52:16,205 INFO L276 IsEmpty]: Start isEmpty. Operand 107958 states and 460128 transitions. [2019-12-07 10:52:16,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 10:52:16,209 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:52:16,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:52:16,209 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:52:16,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:52:16,209 INFO L82 PathProgramCache]: Analyzing trace with hash 2082409598, now seen corresponding path program 1 times [2019-12-07 10:52:16,209 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:52:16,209 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488824155] [2019-12-07 10:52:16,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:52:16,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:52:16,269 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:52:16,269 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488824155] [2019-12-07 10:52:16,269 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:52:16,269 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:52:16,270 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2103816784] [2019-12-07 10:52:16,270 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:52:16,271 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:52:16,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:52:16,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:52:16,271 INFO L87 Difference]: Start difference. First operand 107958 states and 460128 transitions. Second operand 4 states. [2019-12-07 10:52:17,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:52:17,595 INFO L93 Difference]: Finished difference Result 172022 states and 703369 transitions. [2019-12-07 10:52:17,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:52:17,596 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 10:52:17,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:52:18,028 INFO L225 Difference]: With dead ends: 172022 [2019-12-07 10:52:18,028 INFO L226 Difference]: Without dead ends: 171924 [2019-12-07 10:52:18,028 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:52:22,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171924 states. [2019-12-07 10:52:27,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171924 to 156115. [2019-12-07 10:52:27,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156115 states. [2019-12-07 10:52:27,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156115 states to 156115 states and 647087 transitions. [2019-12-07 10:52:27,525 INFO L78 Accepts]: Start accepts. Automaton has 156115 states and 647087 transitions. Word has length 11 [2019-12-07 10:52:27,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:52:27,526 INFO L462 AbstractCegarLoop]: Abstraction has 156115 states and 647087 transitions. [2019-12-07 10:52:27,526 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:52:27,526 INFO L276 IsEmpty]: Start isEmpty. Operand 156115 states and 647087 transitions. [2019-12-07 10:52:27,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:52:27,530 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:52:27,530 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:52:27,530 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:52:27,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:52:27,531 INFO L82 PathProgramCache]: Analyzing trace with hash 594088235, now seen corresponding path program 1 times [2019-12-07 10:52:27,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:52:27,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496897520] [2019-12-07 10:52:27,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:52:27,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:52:27,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:52:27,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496897520] [2019-12-07 10:52:27,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:52:27,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:52:27,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243452506] [2019-12-07 10:52:27,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:52:27,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:52:27,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:52:27,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:52:27,585 INFO L87 Difference]: Start difference. First operand 156115 states and 647087 transitions. Second operand 4 states. [2019-12-07 10:52:28,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:52:28,727 INFO L93 Difference]: Finished difference Result 219290 states and 888852 transitions. [2019-12-07 10:52:28,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:52:28,727 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:52:28,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:52:29,301 INFO L225 Difference]: With dead ends: 219290 [2019-12-07 10:52:29,301 INFO L226 Difference]: Without dead ends: 219178 [2019-12-07 10:52:29,301 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:52:34,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219178 states. [2019-12-07 10:52:37,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219178 to 184451. [2019-12-07 10:52:37,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184451 states. [2019-12-07 10:52:38,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184451 states to 184451 states and 760798 transitions. [2019-12-07 10:52:38,122 INFO L78 Accepts]: Start accepts. Automaton has 184451 states and 760798 transitions. Word has length 13 [2019-12-07 10:52:38,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:52:38,122 INFO L462 AbstractCegarLoop]: Abstraction has 184451 states and 760798 transitions. [2019-12-07 10:52:38,122 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:52:38,123 INFO L276 IsEmpty]: Start isEmpty. Operand 184451 states and 760798 transitions. [2019-12-07 10:52:38,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:52:38,130 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:52:38,131 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:52:38,131 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:52:38,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:52:38,131 INFO L82 PathProgramCache]: Analyzing trace with hash -805978823, now seen corresponding path program 1 times [2019-12-07 10:52:38,131 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:52:38,131 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220207572] [2019-12-07 10:52:38,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:52:38,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:52:38,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:52:38,171 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220207572] [2019-12-07 10:52:38,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:52:38,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:52:38,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40077388] [2019-12-07 10:52:38,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:52:38,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:52:38,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:52:38,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:52:38,172 INFO L87 Difference]: Start difference. First operand 184451 states and 760798 transitions. Second operand 3 states. [2019-12-07 10:52:41,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:52:41,454 INFO L93 Difference]: Finished difference Result 284614 states and 1168466 transitions. [2019-12-07 10:52:41,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:52:41,455 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 10:52:41,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:52:42,178 INFO L225 Difference]: With dead ends: 284614 [2019-12-07 10:52:42,178 INFO L226 Difference]: Without dead ends: 284614 [2019-12-07 10:52:42,178 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:52:47,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284614 states. [2019-12-07 10:52:51,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284614 to 221232. [2019-12-07 10:52:51,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221232 states. [2019-12-07 10:52:52,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221232 states to 221232 states and 911865 transitions. [2019-12-07 10:52:52,051 INFO L78 Accepts]: Start accepts. Automaton has 221232 states and 911865 transitions. Word has length 16 [2019-12-07 10:52:52,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:52:52,051 INFO L462 AbstractCegarLoop]: Abstraction has 221232 states and 911865 transitions. [2019-12-07 10:52:52,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:52:52,051 INFO L276 IsEmpty]: Start isEmpty. Operand 221232 states and 911865 transitions. [2019-12-07 10:52:52,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:52:52,059 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:52:52,059 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:52:52,059 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:52:52,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:52:52,059 INFO L82 PathProgramCache]: Analyzing trace with hash -805853304, now seen corresponding path program 1 times [2019-12-07 10:52:52,060 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:52:52,060 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [645477284] [2019-12-07 10:52:52,060 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:52:52,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:52:52,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:52:52,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [645477284] [2019-12-07 10:52:52,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:52:52,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:52:52,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [50720068] [2019-12-07 10:52:52,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:52:52,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:52:52,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:52:52,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:52:52,106 INFO L87 Difference]: Start difference. First operand 221232 states and 911865 transitions. Second operand 4 states. [2019-12-07 10:52:53,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:52:53,456 INFO L93 Difference]: Finished difference Result 262568 states and 1070974 transitions. [2019-12-07 10:52:53,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:52:53,457 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:52:53,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:52:54,831 INFO L225 Difference]: With dead ends: 262568 [2019-12-07 10:52:54,831 INFO L226 Difference]: Without dead ends: 262568 [2019-12-07 10:52:54,832 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:53:00,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262568 states. [2019-12-07 10:53:07,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262568 to 233184. [2019-12-07 10:53:07,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233184 states. [2019-12-07 10:53:08,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233184 states to 233184 states and 959818 transitions. [2019-12-07 10:53:08,487 INFO L78 Accepts]: Start accepts. Automaton has 233184 states and 959818 transitions. Word has length 16 [2019-12-07 10:53:08,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:53:08,488 INFO L462 AbstractCegarLoop]: Abstraction has 233184 states and 959818 transitions. [2019-12-07 10:53:08,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:53:08,488 INFO L276 IsEmpty]: Start isEmpty. Operand 233184 states and 959818 transitions. [2019-12-07 10:53:08,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:53:08,494 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:53:08,494 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:53:08,494 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:53:08,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:53:08,494 INFO L82 PathProgramCache]: Analyzing trace with hash -1222928522, now seen corresponding path program 1 times [2019-12-07 10:53:08,494 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:53:08,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [893097940] [2019-12-07 10:53:08,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:53:08,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:53:08,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:53:08,528 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [893097940] [2019-12-07 10:53:08,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:53:08,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:53:08,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1481610947] [2019-12-07 10:53:08,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:53:08,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:53:08,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:53:08,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:53:08,529 INFO L87 Difference]: Start difference. First operand 233184 states and 959818 transitions. Second operand 4 states. [2019-12-07 10:53:10,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:53:10,000 INFO L93 Difference]: Finished difference Result 277148 states and 1134062 transitions. [2019-12-07 10:53:10,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:53:10,001 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:53:10,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:53:10,746 INFO L225 Difference]: With dead ends: 277148 [2019-12-07 10:53:10,746 INFO L226 Difference]: Without dead ends: 277148 [2019-12-07 10:53:10,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:53:17,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277148 states. [2019-12-07 10:53:20,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277148 to 236057. [2019-12-07 10:53:20,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236057 states. [2019-12-07 10:53:21,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236057 states to 236057 states and 972653 transitions. [2019-12-07 10:53:21,528 INFO L78 Accepts]: Start accepts. Automaton has 236057 states and 972653 transitions. Word has length 16 [2019-12-07 10:53:21,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:53:21,529 INFO L462 AbstractCegarLoop]: Abstraction has 236057 states and 972653 transitions. [2019-12-07 10:53:21,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:53:21,529 INFO L276 IsEmpty]: Start isEmpty. Operand 236057 states and 972653 transitions. [2019-12-07 10:53:21,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 10:53:21,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:53:21,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:53:21,541 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:53:21,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:53:21,541 INFO L82 PathProgramCache]: Analyzing trace with hash -2141168645, now seen corresponding path program 1 times [2019-12-07 10:53:21,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:53:21,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140180286] [2019-12-07 10:53:21,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:53:21,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:53:21,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:53:21,587 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140180286] [2019-12-07 10:53:21,587 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:53:21,587 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:53:21,588 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2003359634] [2019-12-07 10:53:21,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:53:21,588 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:53:21,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:53:21,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:53:21,588 INFO L87 Difference]: Start difference. First operand 236057 states and 972653 transitions. Second operand 3 states. [2019-12-07 10:53:26,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:53:26,089 INFO L93 Difference]: Finished difference Result 426567 states and 1746949 transitions. [2019-12-07 10:53:26,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:53:26,090 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 10:53:26,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:53:27,073 INFO L225 Difference]: With dead ends: 426567 [2019-12-07 10:53:27,074 INFO L226 Difference]: Without dead ends: 388856 [2019-12-07 10:53:27,074 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:53:34,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388856 states. [2019-12-07 10:53:39,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388856 to 372573. [2019-12-07 10:53:39,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372573 states. [2019-12-07 10:53:41,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372573 states to 372573 states and 1538118 transitions. [2019-12-07 10:53:41,513 INFO L78 Accepts]: Start accepts. Automaton has 372573 states and 1538118 transitions. Word has length 18 [2019-12-07 10:53:41,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:53:41,513 INFO L462 AbstractCegarLoop]: Abstraction has 372573 states and 1538118 transitions. [2019-12-07 10:53:41,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:53:41,513 INFO L276 IsEmpty]: Start isEmpty. Operand 372573 states and 1538118 transitions. [2019-12-07 10:53:41,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:53:41,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:53:41,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:53:41,541 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:53:41,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:53:41,542 INFO L82 PathProgramCache]: Analyzing trace with hash -1595183089, now seen corresponding path program 1 times [2019-12-07 10:53:41,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:53:41,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499159941] [2019-12-07 10:53:41,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:53:41,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:53:41,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:53:41,578 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499159941] [2019-12-07 10:53:41,578 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:53:41,578 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:53:41,578 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983178940] [2019-12-07 10:53:41,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:53:41,579 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:53:41,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:53:41,579 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:53:41,579 INFO L87 Difference]: Start difference. First operand 372573 states and 1538118 transitions. Second operand 3 states. [2019-12-07 10:53:43,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:53:43,760 INFO L93 Difference]: Finished difference Result 350272 states and 1429504 transitions. [2019-12-07 10:53:43,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:53:43,761 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 10:53:43,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:53:44,669 INFO L225 Difference]: With dead ends: 350272 [2019-12-07 10:53:44,670 INFO L226 Difference]: Without dead ends: 350272 [2019-12-07 10:53:44,670 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:53:55,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350272 states. [2019-12-07 10:53:59,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350272 to 346358. [2019-12-07 10:53:59,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346358 states. [2019-12-07 10:54:01,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346358 states to 346358 states and 1415142 transitions. [2019-12-07 10:54:01,486 INFO L78 Accepts]: Start accepts. Automaton has 346358 states and 1415142 transitions. Word has length 19 [2019-12-07 10:54:01,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:01,486 INFO L462 AbstractCegarLoop]: Abstraction has 346358 states and 1415142 transitions. [2019-12-07 10:54:01,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:54:01,487 INFO L276 IsEmpty]: Start isEmpty. Operand 346358 states and 1415142 transitions. [2019-12-07 10:54:01,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:54:01,510 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:01,510 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:01,511 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:01,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:01,511 INFO L82 PathProgramCache]: Analyzing trace with hash -116744345, now seen corresponding path program 1 times [2019-12-07 10:54:01,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:01,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272939076] [2019-12-07 10:54:01,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:01,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:01,545 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:01,545 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272939076] [2019-12-07 10:54:01,545 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:01,545 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:54:01,546 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248945534] [2019-12-07 10:54:01,546 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:54:01,546 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:01,546 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:54:01,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:01,546 INFO L87 Difference]: Start difference. First operand 346358 states and 1415142 transitions. Second operand 5 states. [2019-12-07 10:54:04,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:04,679 INFO L93 Difference]: Finished difference Result 490668 states and 1965479 transitions. [2019-12-07 10:54:04,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:54:04,680 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 10:54:04,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:05,946 INFO L225 Difference]: With dead ends: 490668 [2019-12-07 10:54:05,946 INFO L226 Difference]: Without dead ends: 490486 [2019-12-07 10:54:05,946 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:54:17,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490486 states. [2019-12-07 10:54:23,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490486 to 369933. [2019-12-07 10:54:23,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 369933 states. [2019-12-07 10:54:25,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 369933 states to 369933 states and 1507140 transitions. [2019-12-07 10:54:25,561 INFO L78 Accepts]: Start accepts. Automaton has 369933 states and 1507140 transitions. Word has length 19 [2019-12-07 10:54:25,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:25,561 INFO L462 AbstractCegarLoop]: Abstraction has 369933 states and 1507140 transitions. [2019-12-07 10:54:25,561 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:54:25,561 INFO L276 IsEmpty]: Start isEmpty. Operand 369933 states and 1507140 transitions. [2019-12-07 10:54:25,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:54:25,585 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:25,585 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:25,585 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:25,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:25,586 INFO L82 PathProgramCache]: Analyzing trace with hash -1366425393, now seen corresponding path program 1 times [2019-12-07 10:54:25,586 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:25,586 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1990373298] [2019-12-07 10:54:25,586 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:25,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:25,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:25,608 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1990373298] [2019-12-07 10:54:25,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:25,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:54:25,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [612818112] [2019-12-07 10:54:25,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:54:25,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:25,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:54:25,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:25,609 INFO L87 Difference]: Start difference. First operand 369933 states and 1507140 transitions. Second operand 3 states. [2019-12-07 10:54:25,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:25,860 INFO L93 Difference]: Finished difference Result 73764 states and 237015 transitions. [2019-12-07 10:54:25,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:54:25,860 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 10:54:25,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:25,971 INFO L225 Difference]: With dead ends: 73764 [2019-12-07 10:54:25,971 INFO L226 Difference]: Without dead ends: 73764 [2019-12-07 10:54:25,971 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:26,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73764 states. [2019-12-07 10:54:26,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73764 to 73764. [2019-12-07 10:54:26,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73764 states. [2019-12-07 10:54:27,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73764 states to 73764 states and 237015 transitions. [2019-12-07 10:54:27,598 INFO L78 Accepts]: Start accepts. Automaton has 73764 states and 237015 transitions. Word has length 19 [2019-12-07 10:54:27,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:27,599 INFO L462 AbstractCegarLoop]: Abstraction has 73764 states and 237015 transitions. [2019-12-07 10:54:27,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:54:27,599 INFO L276 IsEmpty]: Start isEmpty. Operand 73764 states and 237015 transitions. [2019-12-07 10:54:27,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:54:27,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:27,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:27,609 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:27,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:27,609 INFO L82 PathProgramCache]: Analyzing trace with hash -655013944, now seen corresponding path program 1 times [2019-12-07 10:54:27,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:27,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078719429] [2019-12-07 10:54:27,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:27,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:27,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:27,641 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078719429] [2019-12-07 10:54:27,641 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:27,641 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:54:27,642 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1550389054] [2019-12-07 10:54:27,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:54:27,642 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:27,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:54:27,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:27,642 INFO L87 Difference]: Start difference. First operand 73764 states and 237015 transitions. Second operand 5 states. [2019-12-07 10:54:28,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:28,210 INFO L93 Difference]: Finished difference Result 95764 states and 301089 transitions. [2019-12-07 10:54:28,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:54:28,210 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:54:28,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:28,351 INFO L225 Difference]: With dead ends: 95764 [2019-12-07 10:54:28,351 INFO L226 Difference]: Without dead ends: 95750 [2019-12-07 10:54:28,351 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:54:28,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95750 states. [2019-12-07 10:54:29,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95750 to 78222. [2019-12-07 10:54:29,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78222 states. [2019-12-07 10:54:29,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78222 states to 78222 states and 250251 transitions. [2019-12-07 10:54:29,785 INFO L78 Accepts]: Start accepts. Automaton has 78222 states and 250251 transitions. Word has length 22 [2019-12-07 10:54:29,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:29,785 INFO L462 AbstractCegarLoop]: Abstraction has 78222 states and 250251 transitions. [2019-12-07 10:54:29,785 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:54:29,785 INFO L276 IsEmpty]: Start isEmpty. Operand 78222 states and 250251 transitions. [2019-12-07 10:54:29,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:54:29,796 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:29,796 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:29,796 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:29,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:29,796 INFO L82 PathProgramCache]: Analyzing trace with hash -2032339914, now seen corresponding path program 1 times [2019-12-07 10:54:29,797 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:29,797 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145826632] [2019-12-07 10:54:29,797 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:29,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:29,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:29,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [145826632] [2019-12-07 10:54:29,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:29,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:54:29,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [304694517] [2019-12-07 10:54:29,831 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:54:29,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:29,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:54:29,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:29,831 INFO L87 Difference]: Start difference. First operand 78222 states and 250251 transitions. Second operand 5 states. [2019-12-07 10:54:30,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:30,587 INFO L93 Difference]: Finished difference Result 98940 states and 312215 transitions. [2019-12-07 10:54:30,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:54:30,587 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:54:30,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:30,749 INFO L225 Difference]: With dead ends: 98940 [2019-12-07 10:54:30,749 INFO L226 Difference]: Without dead ends: 98926 [2019-12-07 10:54:30,750 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:54:31,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98926 states. [2019-12-07 10:54:32,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98926 to 76737. [2019-12-07 10:54:32,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76737 states. [2019-12-07 10:54:32,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76737 states to 76737 states and 245807 transitions. [2019-12-07 10:54:32,164 INFO L78 Accepts]: Start accepts. Automaton has 76737 states and 245807 transitions. Word has length 22 [2019-12-07 10:54:32,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:32,164 INFO L462 AbstractCegarLoop]: Abstraction has 76737 states and 245807 transitions. [2019-12-07 10:54:32,164 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:54:32,164 INFO L276 IsEmpty]: Start isEmpty. Operand 76737 states and 245807 transitions. [2019-12-07 10:54:32,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 10:54:32,181 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:32,181 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:32,181 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:32,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:32,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1083173402, now seen corresponding path program 1 times [2019-12-07 10:54:32,182 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:32,182 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393740159] [2019-12-07 10:54:32,182 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:32,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:32,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:32,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393740159] [2019-12-07 10:54:32,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:32,219 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:54:32,219 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [567202745] [2019-12-07 10:54:32,219 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:54:32,220 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:32,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:54:32,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:32,220 INFO L87 Difference]: Start difference. First operand 76737 states and 245807 transitions. Second operand 5 states. [2019-12-07 10:54:32,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:32,754 INFO L93 Difference]: Finished difference Result 92901 states and 294023 transitions. [2019-12-07 10:54:32,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:54:32,755 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 10:54:32,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:32,884 INFO L225 Difference]: With dead ends: 92901 [2019-12-07 10:54:32,884 INFO L226 Difference]: Without dead ends: 92853 [2019-12-07 10:54:32,884 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:54:33,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92853 states. [2019-12-07 10:54:34,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92853 to 79774. [2019-12-07 10:54:34,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79774 states. [2019-12-07 10:54:34,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79774 states to 79774 states and 254917 transitions. [2019-12-07 10:54:34,277 INFO L78 Accepts]: Start accepts. Automaton has 79774 states and 254917 transitions. Word has length 26 [2019-12-07 10:54:34,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:34,277 INFO L462 AbstractCegarLoop]: Abstraction has 79774 states and 254917 transitions. [2019-12-07 10:54:34,277 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:54:34,277 INFO L276 IsEmpty]: Start isEmpty. Operand 79774 states and 254917 transitions. [2019-12-07 10:54:34,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 10:54:34,300 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:34,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:34,300 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:34,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:34,300 INFO L82 PathProgramCache]: Analyzing trace with hash -799804073, now seen corresponding path program 1 times [2019-12-07 10:54:34,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:34,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1386949129] [2019-12-07 10:54:34,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:34,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:34,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:34,343 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1386949129] [2019-12-07 10:54:34,343 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:34,343 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:54:34,343 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1103896999] [2019-12-07 10:54:34,344 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:54:34,344 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:34,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:54:34,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:34,344 INFO L87 Difference]: Start difference. First operand 79774 states and 254917 transitions. Second operand 5 states. [2019-12-07 10:54:34,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:34,777 INFO L93 Difference]: Finished difference Result 93597 states and 294900 transitions. [2019-12-07 10:54:34,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:54:34,777 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 10:54:34,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:34,908 INFO L225 Difference]: With dead ends: 93597 [2019-12-07 10:54:34,908 INFO L226 Difference]: Without dead ends: 93553 [2019-12-07 10:54:34,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:54:35,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93553 states. [2019-12-07 10:54:36,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93553 to 78970. [2019-12-07 10:54:36,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78970 states. [2019-12-07 10:54:36,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78970 states to 78970 states and 252452 transitions. [2019-12-07 10:54:36,343 INFO L78 Accepts]: Start accepts. Automaton has 78970 states and 252452 transitions. Word has length 28 [2019-12-07 10:54:36,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:36,343 INFO L462 AbstractCegarLoop]: Abstraction has 78970 states and 252452 transitions. [2019-12-07 10:54:36,343 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:54:36,344 INFO L276 IsEmpty]: Start isEmpty. Operand 78970 states and 252452 transitions. [2019-12-07 10:54:36,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 10:54:36,373 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:36,374 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:36,374 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:36,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:36,374 INFO L82 PathProgramCache]: Analyzing trace with hash 370474695, now seen corresponding path program 1 times [2019-12-07 10:54:36,374 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:36,375 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572276886] [2019-12-07 10:54:36,375 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:36,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:36,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:36,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572276886] [2019-12-07 10:54:36,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:36,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:54:36,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249411723] [2019-12-07 10:54:36,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:54:36,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:36,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:54:36,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:36,412 INFO L87 Difference]: Start difference. First operand 78970 states and 252452 transitions. Second operand 3 states. [2019-12-07 10:54:36,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:36,640 INFO L93 Difference]: Finished difference Result 78939 states and 252363 transitions. [2019-12-07 10:54:36,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:54:36,641 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 10:54:36,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:36,759 INFO L225 Difference]: With dead ends: 78939 [2019-12-07 10:54:36,759 INFO L226 Difference]: Without dead ends: 78939 [2019-12-07 10:54:36,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:37,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78939 states. [2019-12-07 10:54:37,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78939 to 78254. [2019-12-07 10:54:37,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78254 states. [2019-12-07 10:54:38,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78254 states to 78254 states and 250297 transitions. [2019-12-07 10:54:38,058 INFO L78 Accepts]: Start accepts. Automaton has 78254 states and 250297 transitions. Word has length 30 [2019-12-07 10:54:38,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:38,058 INFO L462 AbstractCegarLoop]: Abstraction has 78254 states and 250297 transitions. [2019-12-07 10:54:38,059 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:54:38,059 INFO L276 IsEmpty]: Start isEmpty. Operand 78254 states and 250297 transitions. [2019-12-07 10:54:38,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 10:54:38,093 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:38,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:38,094 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:38,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:38,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1469523336, now seen corresponding path program 1 times [2019-12-07 10:54:38,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:38,094 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471138118] [2019-12-07 10:54:38,094 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:38,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:38,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:38,125 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1471138118] [2019-12-07 10:54:38,125 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:38,125 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:54:38,125 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960300038] [2019-12-07 10:54:38,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:54:38,126 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:38,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:54:38,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:54:38,126 INFO L87 Difference]: Start difference. First operand 78254 states and 250297 transitions. Second operand 4 states. [2019-12-07 10:54:38,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:38,218 INFO L93 Difference]: Finished difference Result 29980 states and 92119 transitions. [2019-12-07 10:54:38,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:54:38,218 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 10:54:38,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:38,257 INFO L225 Difference]: With dead ends: 29980 [2019-12-07 10:54:38,257 INFO L226 Difference]: Without dead ends: 29980 [2019-12-07 10:54:38,257 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:54:38,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29980 states. [2019-12-07 10:54:38,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29980 to 27890. [2019-12-07 10:54:38,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27890 states. [2019-12-07 10:54:38,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27890 states to 27890 states and 85818 transitions. [2019-12-07 10:54:38,684 INFO L78 Accepts]: Start accepts. Automaton has 27890 states and 85818 transitions. Word has length 30 [2019-12-07 10:54:38,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:38,685 INFO L462 AbstractCegarLoop]: Abstraction has 27890 states and 85818 transitions. [2019-12-07 10:54:38,685 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:54:38,685 INFO L276 IsEmpty]: Start isEmpty. Operand 27890 states and 85818 transitions. [2019-12-07 10:54:38,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 10:54:38,704 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:38,704 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:38,704 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:38,704 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:38,704 INFO L82 PathProgramCache]: Analyzing trace with hash -145847770, now seen corresponding path program 1 times [2019-12-07 10:54:38,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:38,705 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798536499] [2019-12-07 10:54:38,705 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:38,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:38,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:38,746 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1798536499] [2019-12-07 10:54:38,746 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:38,746 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:54:38,746 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1253741483] [2019-12-07 10:54:38,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:54:38,747 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:38,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:54:38,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:54:38,747 INFO L87 Difference]: Start difference. First operand 27890 states and 85818 transitions. Second operand 6 states. [2019-12-07 10:54:39,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:39,166 INFO L93 Difference]: Finished difference Result 34486 states and 104079 transitions. [2019-12-07 10:54:39,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:54:39,167 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 10:54:39,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:39,207 INFO L225 Difference]: With dead ends: 34486 [2019-12-07 10:54:39,207 INFO L226 Difference]: Without dead ends: 34486 [2019-12-07 10:54:39,208 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:54:39,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34486 states. [2019-12-07 10:54:39,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34486 to 28067. [2019-12-07 10:54:39,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28067 states. [2019-12-07 10:54:39,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28067 states to 28067 states and 86329 transitions. [2019-12-07 10:54:39,725 INFO L78 Accepts]: Start accepts. Automaton has 28067 states and 86329 transitions. Word has length 32 [2019-12-07 10:54:39,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:39,725 INFO L462 AbstractCegarLoop]: Abstraction has 28067 states and 86329 transitions. [2019-12-07 10:54:39,725 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:54:39,725 INFO L276 IsEmpty]: Start isEmpty. Operand 28067 states and 86329 transitions. [2019-12-07 10:54:39,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 10:54:39,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:39,744 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:39,744 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:39,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:39,745 INFO L82 PathProgramCache]: Analyzing trace with hash -1380765993, now seen corresponding path program 1 times [2019-12-07 10:54:39,745 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:39,745 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923922595] [2019-12-07 10:54:39,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:39,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:39,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:39,785 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1923922595] [2019-12-07 10:54:39,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:39,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:54:39,786 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [570535998] [2019-12-07 10:54:39,786 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:54:39,786 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:39,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:54:39,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:54:39,787 INFO L87 Difference]: Start difference. First operand 28067 states and 86329 transitions. Second operand 6 states. [2019-12-07 10:54:40,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:40,216 INFO L93 Difference]: Finished difference Result 34223 states and 103468 transitions. [2019-12-07 10:54:40,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:54:40,216 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 10:54:40,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:40,255 INFO L225 Difference]: With dead ends: 34223 [2019-12-07 10:54:40,255 INFO L226 Difference]: Without dead ends: 34223 [2019-12-07 10:54:40,255 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:54:40,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34223 states. [2019-12-07 10:54:40,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34223 to 27334. [2019-12-07 10:54:40,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27334 states. [2019-12-07 10:54:40,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27334 states to 27334 states and 84166 transitions. [2019-12-07 10:54:40,711 INFO L78 Accepts]: Start accepts. Automaton has 27334 states and 84166 transitions. Word has length 34 [2019-12-07 10:54:40,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:40,711 INFO L462 AbstractCegarLoop]: Abstraction has 27334 states and 84166 transitions. [2019-12-07 10:54:40,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:54:40,711 INFO L276 IsEmpty]: Start isEmpty. Operand 27334 states and 84166 transitions. [2019-12-07 10:54:40,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 10:54:40,737 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:40,737 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:40,737 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:40,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:40,738 INFO L82 PathProgramCache]: Analyzing trace with hash 1174419869, now seen corresponding path program 1 times [2019-12-07 10:54:40,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:40,738 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532120246] [2019-12-07 10:54:40,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:40,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:40,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:40,783 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532120246] [2019-12-07 10:54:40,783 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:40,783 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:54:40,784 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1106393525] [2019-12-07 10:54:40,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:54:40,784 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:40,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:54:40,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:40,784 INFO L87 Difference]: Start difference. First operand 27334 states and 84166 transitions. Second operand 5 states. [2019-12-07 10:54:41,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:41,205 INFO L93 Difference]: Finished difference Result 39480 states and 120369 transitions. [2019-12-07 10:54:41,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:54:41,206 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 10:54:41,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:41,253 INFO L225 Difference]: With dead ends: 39480 [2019-12-07 10:54:41,253 INFO L226 Difference]: Without dead ends: 39480 [2019-12-07 10:54:41,253 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:54:41,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39480 states. [2019-12-07 10:54:41,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39480 to 34806. [2019-12-07 10:54:41,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34806 states. [2019-12-07 10:54:41,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34806 states to 34806 states and 107138 transitions. [2019-12-07 10:54:41,814 INFO L78 Accepts]: Start accepts. Automaton has 34806 states and 107138 transitions. Word has length 41 [2019-12-07 10:54:41,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:41,814 INFO L462 AbstractCegarLoop]: Abstraction has 34806 states and 107138 transitions. [2019-12-07 10:54:41,814 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:54:41,814 INFO L276 IsEmpty]: Start isEmpty. Operand 34806 states and 107138 transitions. [2019-12-07 10:54:41,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 10:54:41,847 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:41,847 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:41,847 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:41,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:41,848 INFO L82 PathProgramCache]: Analyzing trace with hash 1274395705, now seen corresponding path program 2 times [2019-12-07 10:54:41,848 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:41,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864910220] [2019-12-07 10:54:41,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:41,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:41,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:41,882 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1864910220] [2019-12-07 10:54:41,882 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:41,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:54:41,883 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896386265] [2019-12-07 10:54:41,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:54:41,883 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:41,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:54:41,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:41,883 INFO L87 Difference]: Start difference. First operand 34806 states and 107138 transitions. Second operand 3 states. [2019-12-07 10:54:41,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:41,976 INFO L93 Difference]: Finished difference Result 34806 states and 105861 transitions. [2019-12-07 10:54:41,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:54:41,977 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 10:54:41,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:42,019 INFO L225 Difference]: With dead ends: 34806 [2019-12-07 10:54:42,019 INFO L226 Difference]: Without dead ends: 34806 [2019-12-07 10:54:42,019 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:42,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34806 states. [2019-12-07 10:54:42,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34806 to 34120. [2019-12-07 10:54:42,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34120 states. [2019-12-07 10:54:42,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34120 states to 34120 states and 103933 transitions. [2019-12-07 10:54:42,504 INFO L78 Accepts]: Start accepts. Automaton has 34120 states and 103933 transitions. Word has length 41 [2019-12-07 10:54:42,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:42,504 INFO L462 AbstractCegarLoop]: Abstraction has 34120 states and 103933 transitions. [2019-12-07 10:54:42,504 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:54:42,504 INFO L276 IsEmpty]: Start isEmpty. Operand 34120 states and 103933 transitions. [2019-12-07 10:54:42,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 10:54:42,534 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:42,534 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:42,534 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:42,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:42,534 INFO L82 PathProgramCache]: Analyzing trace with hash 1961497157, now seen corresponding path program 1 times [2019-12-07 10:54:42,534 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:42,534 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007044892] [2019-12-07 10:54:42,534 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:42,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:42,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:42,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1007044892] [2019-12-07 10:54:42,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:42,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:54:42,565 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [145566885] [2019-12-07 10:54:42,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:54:42,566 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:42,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:54:42,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:42,566 INFO L87 Difference]: Start difference. First operand 34120 states and 103933 transitions. Second operand 5 states. [2019-12-07 10:54:42,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:42,663 INFO L93 Difference]: Finished difference Result 31763 states and 98677 transitions. [2019-12-07 10:54:42,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:54:42,664 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 10:54:42,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:42,703 INFO L225 Difference]: With dead ends: 31763 [2019-12-07 10:54:42,703 INFO L226 Difference]: Without dead ends: 31256 [2019-12-07 10:54:42,703 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:42,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31256 states. [2019-12-07 10:54:43,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31256 to 17654. [2019-12-07 10:54:43,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17654 states. [2019-12-07 10:54:43,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17654 states to 17654 states and 54877 transitions. [2019-12-07 10:54:43,046 INFO L78 Accepts]: Start accepts. Automaton has 17654 states and 54877 transitions. Word has length 42 [2019-12-07 10:54:43,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:43,046 INFO L462 AbstractCegarLoop]: Abstraction has 17654 states and 54877 transitions. [2019-12-07 10:54:43,046 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:54:43,046 INFO L276 IsEmpty]: Start isEmpty. Operand 17654 states and 54877 transitions. [2019-12-07 10:54:43,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:54:43,060 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:43,060 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:43,060 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:43,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:43,061 INFO L82 PathProgramCache]: Analyzing trace with hash -668679299, now seen corresponding path program 1 times [2019-12-07 10:54:43,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:43,061 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1538690234] [2019-12-07 10:54:43,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:43,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:43,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:43,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1538690234] [2019-12-07 10:54:43,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:43,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:54:43,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275333433] [2019-12-07 10:54:43,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:54:43,124 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:43,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:54:43,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:54:43,125 INFO L87 Difference]: Start difference. First operand 17654 states and 54877 transitions. Second operand 6 states. [2019-12-07 10:54:43,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:43,601 INFO L93 Difference]: Finished difference Result 23901 states and 73230 transitions. [2019-12-07 10:54:43,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 10:54:43,601 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 10:54:43,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:43,627 INFO L225 Difference]: With dead ends: 23901 [2019-12-07 10:54:43,627 INFO L226 Difference]: Without dead ends: 23901 [2019-12-07 10:54:43,628 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:54:43,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23901 states. [2019-12-07 10:54:43,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23901 to 18478. [2019-12-07 10:54:43,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18478 states. [2019-12-07 10:54:43,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18478 states to 18478 states and 57409 transitions. [2019-12-07 10:54:43,926 INFO L78 Accepts]: Start accepts. Automaton has 18478 states and 57409 transitions. Word has length 65 [2019-12-07 10:54:43,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:43,927 INFO L462 AbstractCegarLoop]: Abstraction has 18478 states and 57409 transitions. [2019-12-07 10:54:43,927 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:54:43,927 INFO L276 IsEmpty]: Start isEmpty. Operand 18478 states and 57409 transitions. [2019-12-07 10:54:43,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:54:43,942 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:43,942 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:43,942 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:43,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:43,942 INFO L82 PathProgramCache]: Analyzing trace with hash 339295601, now seen corresponding path program 2 times [2019-12-07 10:54:43,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:43,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917205017] [2019-12-07 10:54:43,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:43,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:43,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:43,979 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [917205017] [2019-12-07 10:54:43,979 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:43,979 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:54:43,980 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1030933885] [2019-12-07 10:54:43,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:54:43,980 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:43,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:54:43,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:43,980 INFO L87 Difference]: Start difference. First operand 18478 states and 57409 transitions. Second operand 3 states. [2019-12-07 10:54:44,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:44,061 INFO L93 Difference]: Finished difference Result 22140 states and 68415 transitions. [2019-12-07 10:54:44,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:54:44,061 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 10:54:44,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:44,085 INFO L225 Difference]: With dead ends: 22140 [2019-12-07 10:54:44,085 INFO L226 Difference]: Without dead ends: 22140 [2019-12-07 10:54:44,086 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:44,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22140 states. [2019-12-07 10:54:44,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22140 to 18558. [2019-12-07 10:54:44,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18558 states. [2019-12-07 10:54:44,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18558 states to 18558 states and 57741 transitions. [2019-12-07 10:54:44,376 INFO L78 Accepts]: Start accepts. Automaton has 18558 states and 57741 transitions. Word has length 65 [2019-12-07 10:54:44,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:44,377 INFO L462 AbstractCegarLoop]: Abstraction has 18558 states and 57741 transitions. [2019-12-07 10:54:44,377 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:54:44,377 INFO L276 IsEmpty]: Start isEmpty. Operand 18558 states and 57741 transitions. [2019-12-07 10:54:44,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:54:44,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:44,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:44,393 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:44,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:44,393 INFO L82 PathProgramCache]: Analyzing trace with hash -1524862519, now seen corresponding path program 1 times [2019-12-07 10:54:44,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:44,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515863789] [2019-12-07 10:54:44,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:44,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:44,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:44,521 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [515863789] [2019-12-07 10:54:44,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:44,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:54:44,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108587503] [2019-12-07 10:54:44,522 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:54:44,522 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:44,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:54:44,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:54:44,522 INFO L87 Difference]: Start difference. First operand 18558 states and 57741 transitions. Second operand 11 states. [2019-12-07 10:54:45,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:45,385 INFO L93 Difference]: Finished difference Result 53791 states and 168083 transitions. [2019-12-07 10:54:45,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 10:54:45,386 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 10:54:45,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:45,444 INFO L225 Difference]: With dead ends: 53791 [2019-12-07 10:54:45,445 INFO L226 Difference]: Without dead ends: 47128 [2019-12-07 10:54:45,445 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 348 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=271, Invalid=1135, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 10:54:45,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47128 states. [2019-12-07 10:54:45,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47128 to 27655. [2019-12-07 10:54:45,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27655 states. [2019-12-07 10:54:46,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27655 states to 27655 states and 86243 transitions. [2019-12-07 10:54:46,008 INFO L78 Accepts]: Start accepts. Automaton has 27655 states and 86243 transitions. Word has length 66 [2019-12-07 10:54:46,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:46,008 INFO L462 AbstractCegarLoop]: Abstraction has 27655 states and 86243 transitions. [2019-12-07 10:54:46,008 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:54:46,008 INFO L276 IsEmpty]: Start isEmpty. Operand 27655 states and 86243 transitions. [2019-12-07 10:54:46,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:54:46,036 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:46,036 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:46,036 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:46,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:46,037 INFO L82 PathProgramCache]: Analyzing trace with hash -1239159877, now seen corresponding path program 2 times [2019-12-07 10:54:46,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:46,037 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323086089] [2019-12-07 10:54:46,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:46,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:46,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:46,456 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1323086089] [2019-12-07 10:54:46,456 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:46,456 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 10:54:46,456 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074289177] [2019-12-07 10:54:46,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 10:54:46,457 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:46,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 10:54:46,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:54:46,457 INFO L87 Difference]: Start difference. First operand 27655 states and 86243 transitions. Second operand 17 states. [2019-12-07 10:54:50,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:50,757 INFO L93 Difference]: Finished difference Result 75080 states and 231914 transitions. [2019-12-07 10:54:50,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 10:54:50,757 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 66 [2019-12-07 10:54:50,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:50,866 INFO L225 Difference]: With dead ends: 75080 [2019-12-07 10:54:50,867 INFO L226 Difference]: Without dead ends: 74853 [2019-12-07 10:54:50,868 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 1 SyntacticMatches, 6 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 589 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=340, Invalid=2210, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 10:54:51,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74853 states. [2019-12-07 10:54:51,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74853 to 30455. [2019-12-07 10:54:51,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30455 states. [2019-12-07 10:54:51,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30455 states to 30455 states and 93977 transitions. [2019-12-07 10:54:51,718 INFO L78 Accepts]: Start accepts. Automaton has 30455 states and 93977 transitions. Word has length 66 [2019-12-07 10:54:51,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:51,719 INFO L462 AbstractCegarLoop]: Abstraction has 30455 states and 93977 transitions. [2019-12-07 10:54:51,719 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 10:54:51,719 INFO L276 IsEmpty]: Start isEmpty. Operand 30455 states and 93977 transitions. [2019-12-07 10:54:51,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:54:51,746 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:51,746 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:51,746 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:51,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:51,747 INFO L82 PathProgramCache]: Analyzing trace with hash 1626008201, now seen corresponding path program 3 times [2019-12-07 10:54:51,747 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:51,747 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156053835] [2019-12-07 10:54:51,747 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:51,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:52,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:52,057 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156053835] [2019-12-07 10:54:52,057 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:52,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 10:54:52,058 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [847244362] [2019-12-07 10:54:52,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 10:54:52,058 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:52,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 10:54:52,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:54:52,058 INFO L87 Difference]: Start difference. First operand 30455 states and 93977 transitions. Second operand 18 states. [2019-12-07 10:54:54,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:54,019 INFO L93 Difference]: Finished difference Result 38263 states and 116302 transitions. [2019-12-07 10:54:54,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 10:54:54,019 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 66 [2019-12-07 10:54:54,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:54,062 INFO L225 Difference]: With dead ends: 38263 [2019-12-07 10:54:54,062 INFO L226 Difference]: Without dead ends: 34352 [2019-12-07 10:54:54,062 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 318 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=269, Invalid=1537, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 10:54:54,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34352 states. [2019-12-07 10:54:54,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34352 to 30241. [2019-12-07 10:54:54,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30241 states. [2019-12-07 10:54:54,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30241 states to 30241 states and 93187 transitions. [2019-12-07 10:54:54,523 INFO L78 Accepts]: Start accepts. Automaton has 30241 states and 93187 transitions. Word has length 66 [2019-12-07 10:54:54,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:54,523 INFO L462 AbstractCegarLoop]: Abstraction has 30241 states and 93187 transitions. [2019-12-07 10:54:54,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 10:54:54,523 INFO L276 IsEmpty]: Start isEmpty. Operand 30241 states and 93187 transitions. [2019-12-07 10:54:54,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:54:54,553 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:54,553 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:54,553 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:54,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:54,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1746168581, now seen corresponding path program 4 times [2019-12-07 10:54:54,554 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:54:54,554 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953105053] [2019-12-07 10:54:54,554 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:54,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:54,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:54,908 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953105053] [2019-12-07 10:54:54,909 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:54,909 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 10:54:54,909 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199986312] [2019-12-07 10:54:54,909 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 10:54:54,909 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:54:54,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 10:54:54,909 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=219, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:54:54,909 INFO L87 Difference]: Start difference. First operand 30241 states and 93187 transitions. Second operand 17 states. [2019-12-07 10:54:59,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:59,511 INFO L93 Difference]: Finished difference Result 101868 states and 308185 transitions. [2019-12-07 10:54:59,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2019-12-07 10:54:59,512 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 66 [2019-12-07 10:54:59,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:59,620 INFO L225 Difference]: With dead ends: 101868 [2019-12-07 10:54:59,620 INFO L226 Difference]: Without dead ends: 78745 [2019-12-07 10:54:59,622 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2395 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1238, Invalid=5734, Unknown=0, NotChecked=0, Total=6972 [2019-12-07 10:54:59,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78745 states. [2019-12-07 10:55:00,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78745 to 31610. [2019-12-07 10:55:00,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31610 states. [2019-12-07 10:55:00,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31610 states to 31610 states and 96939 transitions. [2019-12-07 10:55:00,390 INFO L78 Accepts]: Start accepts. Automaton has 31610 states and 96939 transitions. Word has length 66 [2019-12-07 10:55:00,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:00,390 INFO L462 AbstractCegarLoop]: Abstraction has 31610 states and 96939 transitions. [2019-12-07 10:55:00,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 10:55:00,390 INFO L276 IsEmpty]: Start isEmpty. Operand 31610 states and 96939 transitions. [2019-12-07 10:55:00,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:55:00,421 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:00,421 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:00,422 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:00,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:00,422 INFO L82 PathProgramCache]: Analyzing trace with hash 834584547, now seen corresponding path program 5 times [2019-12-07 10:55:00,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:55:00,422 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400816936] [2019-12-07 10:55:00,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:00,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:00,503 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:00,503 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400816936] [2019-12-07 10:55:00,503 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:00,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:55:00,504 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960605445] [2019-12-07 10:55:00,504 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:55:00,504 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:55:00,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:55:00,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:55:00,505 INFO L87 Difference]: Start difference. First operand 31610 states and 96939 transitions. Second operand 7 states. [2019-12-07 10:55:01,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:01,065 INFO L93 Difference]: Finished difference Result 101332 states and 308748 transitions. [2019-12-07 10:55:01,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 10:55:01,065 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 10:55:01,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:01,181 INFO L225 Difference]: With dead ends: 101332 [2019-12-07 10:55:01,181 INFO L226 Difference]: Without dead ends: 79376 [2019-12-07 10:55:01,181 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:55:01,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79376 states. [2019-12-07 10:55:01,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79376 to 29163. [2019-12-07 10:55:01,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29163 states. [2019-12-07 10:55:02,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29163 states to 29163 states and 88709 transitions. [2019-12-07 10:55:02,045 INFO L78 Accepts]: Start accepts. Automaton has 29163 states and 88709 transitions. Word has length 66 [2019-12-07 10:55:02,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:02,045 INFO L462 AbstractCegarLoop]: Abstraction has 29163 states and 88709 transitions. [2019-12-07 10:55:02,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:55:02,045 INFO L276 IsEmpty]: Start isEmpty. Operand 29163 states and 88709 transitions. [2019-12-07 10:55:02,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:55:02,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:02,072 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:02,073 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:02,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:02,073 INFO L82 PathProgramCache]: Analyzing trace with hash -46547309, now seen corresponding path program 6 times [2019-12-07 10:55:02,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:55:02,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1902237642] [2019-12-07 10:55:02,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:02,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:02,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:02,225 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1902237642] [2019-12-07 10:55:02,225 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:02,225 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:55:02,225 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1221023837] [2019-12-07 10:55:02,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:55:02,225 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:55:02,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:55:02,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:55:02,226 INFO L87 Difference]: Start difference. First operand 29163 states and 88709 transitions. Second operand 12 states. [2019-12-07 10:55:03,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:03,542 INFO L93 Difference]: Finished difference Result 63686 states and 192489 transitions. [2019-12-07 10:55:03,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 10:55:03,542 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 10:55:03,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:03,609 INFO L225 Difference]: With dead ends: 63686 [2019-12-07 10:55:03,609 INFO L226 Difference]: Without dead ends: 50574 [2019-12-07 10:55:03,610 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 492 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=359, Invalid=1533, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 10:55:03,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50574 states. [2019-12-07 10:55:04,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50574 to 26104. [2019-12-07 10:55:04,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26104 states. [2019-12-07 10:55:04,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26104 states to 26104 states and 79484 transitions. [2019-12-07 10:55:04,139 INFO L78 Accepts]: Start accepts. Automaton has 26104 states and 79484 transitions. Word has length 66 [2019-12-07 10:55:04,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:04,139 INFO L462 AbstractCegarLoop]: Abstraction has 26104 states and 79484 transitions. [2019-12-07 10:55:04,139 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:55:04,139 INFO L276 IsEmpty]: Start isEmpty. Operand 26104 states and 79484 transitions. [2019-12-07 10:55:04,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:55:04,166 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:04,166 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:04,166 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:04,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:04,166 INFO L82 PathProgramCache]: Analyzing trace with hash -952881413, now seen corresponding path program 7 times [2019-12-07 10:55:04,167 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:55:04,167 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996997549] [2019-12-07 10:55:04,167 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:04,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:04,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:04,295 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996997549] [2019-12-07 10:55:04,295 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:04,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:55:04,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1485833432] [2019-12-07 10:55:04,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:55:04,295 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:55:04,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:55:04,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:55:04,295 INFO L87 Difference]: Start difference. First operand 26104 states and 79484 transitions. Second operand 12 states. [2019-12-07 10:55:05,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:05,434 INFO L93 Difference]: Finished difference Result 37736 states and 113143 transitions. [2019-12-07 10:55:05,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 10:55:05,434 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 10:55:05,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:05,470 INFO L225 Difference]: With dead ends: 37736 [2019-12-07 10:55:05,470 INFO L226 Difference]: Without dead ends: 30910 [2019-12-07 10:55:05,471 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=169, Invalid=761, Unknown=0, NotChecked=0, Total=930 [2019-12-07 10:55:05,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30910 states. [2019-12-07 10:55:05,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30910 to 23957. [2019-12-07 10:55:05,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23957 states. [2019-12-07 10:55:05,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23957 states to 23957 states and 72823 transitions. [2019-12-07 10:55:05,850 INFO L78 Accepts]: Start accepts. Automaton has 23957 states and 72823 transitions. Word has length 66 [2019-12-07 10:55:05,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:05,851 INFO L462 AbstractCegarLoop]: Abstraction has 23957 states and 72823 transitions. [2019-12-07 10:55:05,851 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:55:05,851 INFO L276 IsEmpty]: Start isEmpty. Operand 23957 states and 72823 transitions. [2019-12-07 10:55:05,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:55:05,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:05,871 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:05,871 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:05,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:05,871 INFO L82 PathProgramCache]: Analyzing trace with hash 620198601, now seen corresponding path program 8 times [2019-12-07 10:55:05,871 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:55:05,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020381549] [2019-12-07 10:55:05,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:05,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:55:05,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:55:05,934 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:55:05,934 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:55:05,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t503~0.base_22|)) (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= 0 v_~z$r_buff0_thd3~0_377) (= v_~__unbuffered_cnt~0_128 0) (= v_~z$r_buff0_thd1~0_378 0) (= v_~z$mem_tmp~0_24 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t503~0.base_22| 4)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t503~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t503~0.base_22|) |v_ULTIMATE.start_main_~#t503~0.offset_16| 0)) |v_#memory_int_19|) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff0_thd0~0_195 0) (= v_~y~0_28 0) (= v_~z$w_buff1_used~0_500 0) (= 0 |v_#NULL.base_6|) (= v_~main$tmp_guard1~0_38 0) (= 0 v_~z$flush_delayed~0_43) (= v_~z$read_delayed~0_7 0) (= |v_ULTIMATE.start_main_~#t503~0.offset_16| 0) (= v_~z$r_buff0_thd2~0_182 0) (= 0 v_~z$r_buff1_thd3~0_396) (= 0 v_~x~0_245) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_35) (= v_~z$r_buff1_thd0~0_294 0) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~__unbuffered_p1_EAX~0_41) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t503~0.base_22|) (= v_~z$r_buff1_thd2~0_280 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t503~0.base_22| 1)) (= v_~z$w_buff1~0_199 0) (= v_~z~0_182 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_72|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_195, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_41, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ULTIMATE.start_main_~#t503~0.base=|v_ULTIMATE.start_main_~#t503~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t505~0.base=|v_ULTIMATE.start_main_~#t505~0.base_17|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t504~0.base=|v_ULTIMATE.start_main_~#t504~0.base_19|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_377, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_245, ULTIMATE.start_main_~#t505~0.offset=|v_ULTIMATE.start_main_~#t505~0.offset_14|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_294, ~y~0=v_~y~0_28, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_182, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ULTIMATE.start_main_~#t503~0.offset=|v_ULTIMATE.start_main_~#t503~0.offset_16|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, ULTIMATE.start_main_~#t504~0.offset=|v_ULTIMATE.start_main_~#t504~0.offset_14|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_378} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t503~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t505~0.base, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t504~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t505~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t503~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t504~0.offset, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:55:05,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~x~0_11 1) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_11, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 10:55:05,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (= |v_ULTIMATE.start_main_~#t504~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t504~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t504~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t504~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t504~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t504~0.base_11|) |v_ULTIMATE.start_main_~#t504~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t504~0.base_11| 1) |v_#valid_31|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t504~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t504~0.base=|v_ULTIMATE.start_main_~#t504~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t504~0.offset=|v_ULTIMATE.start_main_~#t504~0.offset_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t504~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t504~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:55:05,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t505~0.base_12|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t505~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t505~0.base_12|) |v_ULTIMATE.start_main_~#t505~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t505~0.base_12| 1)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t505~0.base_12|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t505~0.base_12| 4) |v_#length_13|) (= |v_ULTIMATE.start_main_~#t505~0.offset_10| 0) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t505~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t505~0.offset=|v_ULTIMATE.start_main_~#t505~0.offset_10|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t505~0.base=|v_ULTIMATE.start_main_~#t505~0.base_12|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t505~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t505~0.base, #length] because there is no mapped edge [2019-12-07 10:55:05,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite10_Out-370388684| |P1Thread1of1ForFork2_#t~ite9_Out-370388684|)) (.cse2 (= (mod ~z$w_buff1_used~0_In-370388684 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-370388684 256)))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-370388684| ~z$w_buff1~0_In-370388684) (not .cse1) (not .cse2)) (and .cse0 (= ~z~0_In-370388684 |P1Thread1of1ForFork2_#t~ite9_Out-370388684|) (or .cse2 .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-370388684, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-370388684, ~z$w_buff1~0=~z$w_buff1~0_In-370388684, ~z~0=~z~0_In-370388684} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-370388684|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-370388684, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-370388684|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-370388684, ~z$w_buff1~0=~z$w_buff1~0_In-370388684, ~z~0=~z~0_In-370388684} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 10:55:05,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1808454344 256) 0))) (or (and (= ~z$w_buff1~0_In1808454344 |P2Thread1of1ForFork0_#t~ite24_Out1808454344|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In1808454344| |P2Thread1of1ForFork0_#t~ite23_Out1808454344|)) (and (= |P2Thread1of1ForFork0_#t~ite23_Out1808454344| |P2Thread1of1ForFork0_#t~ite24_Out1808454344|) (= ~z$w_buff1~0_In1808454344 |P2Thread1of1ForFork0_#t~ite23_Out1808454344|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1808454344 256) 0))) (or (= (mod ~z$w_buff0_used~0_In1808454344 256) 0) (and (= (mod ~z$w_buff1_used~0_In1808454344 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In1808454344 256) 0) .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1808454344, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1808454344, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1808454344|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1808454344, ~z$w_buff1~0=~z$w_buff1~0_In1808454344, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1808454344, ~weak$$choice2~0=~weak$$choice2~0_In1808454344} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1808454344, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1808454344|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1808454344, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1808454344|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1808454344, ~z$w_buff1~0=~z$w_buff1~0_In1808454344, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1808454344, ~weak$$choice2~0=~weak$$choice2~0_In1808454344} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 10:55:05,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse3 (= |P2Thread1of1ForFork0_#t~ite30_Out-290376717| |P2Thread1of1ForFork0_#t~ite29_Out-290376717|)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-290376717 256))) (.cse6 (= 0 (mod ~z$r_buff0_thd3~0_In-290376717 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-290376717 256) 0)) (.cse4 (= 0 (mod ~z$w_buff0_used~0_In-290376717 256))) (.cse5 (= (mod ~weak$$choice2~0_In-290376717 256) 0))) (or (let ((.cse1 (not .cse6))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse1) .cse3 (= |P2Thread1of1ForFork0_#t~ite28_Out-290376717| 0) (not .cse4) (= |P2Thread1of1ForFork0_#t~ite28_Out-290376717| |P2Thread1of1ForFork0_#t~ite29_Out-290376717|) .cse5)) (and (or (and (= |P2Thread1of1ForFork0_#t~ite29_Out-290376717| ~z$w_buff1_used~0_In-290376717) .cse3 (or (and .cse0 .cse6) (and .cse6 .cse2) .cse4) .cse5) (and (= |P2Thread1of1ForFork0_#t~ite29_In-290376717| |P2Thread1of1ForFork0_#t~ite29_Out-290376717|) (not .cse5) (= |P2Thread1of1ForFork0_#t~ite30_Out-290376717| ~z$w_buff1_used~0_In-290376717))) (= |P2Thread1of1ForFork0_#t~ite28_In-290376717| |P2Thread1of1ForFork0_#t~ite28_Out-290376717|)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In-290376717|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-290376717, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-290376717, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-290376717, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-290376717, ~weak$$choice2~0=~weak$$choice2~0_In-290376717, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-290376717|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out-290376717|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-290376717, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-290376717, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-290376717, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-290376717, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-290376717|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-290376717|, ~weak$$choice2~0=~weak$$choice2~0_In-290376717} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 10:55:05,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (= v_~z$r_buff0_thd3~0_371 v_~z$r_buff0_thd3~0_370) (not (= (mod v_~weak$$choice2~0_130 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_370, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 10:55:05,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:55:05,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out296396639| |P2Thread1of1ForFork0_#t~ite38_Out296396639|)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In296396639 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In296396639 256)))) (or (and (= ~z~0_In296396639 |P2Thread1of1ForFork0_#t~ite38_Out296396639|) (or .cse0 .cse1) .cse2) (and (= ~z$w_buff1~0_In296396639 |P2Thread1of1ForFork0_#t~ite38_Out296396639|) .cse2 (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In296396639, ~z$w_buff1_used~0=~z$w_buff1_used~0_In296396639, ~z$w_buff1~0=~z$w_buff1~0_In296396639, ~z~0=~z~0_In296396639} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out296396639|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out296396639|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In296396639, ~z$w_buff1_used~0=~z$w_buff1_used~0_In296396639, ~z$w_buff1~0=~z$w_buff1~0_In296396639, ~z~0=~z~0_In296396639} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 10:55:05,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1329937383 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1329937383 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1329937383 |P2Thread1of1ForFork0_#t~ite40_Out1329937383|)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1329937383| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1329937383, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1329937383} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1329937383, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1329937383|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1329937383} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 10:55:05,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In2127092447 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In2127092447 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In2127092447 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In2127092447 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out2127092447| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out2127092447| ~z$w_buff1_used~0_In2127092447)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2127092447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2127092447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2127092447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2127092447} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2127092447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2127092447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2127092447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2127092447, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out2127092447|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 10:55:05,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In2145785351 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In2145785351 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out2145785351|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In2145785351 |P2Thread1of1ForFork0_#t~ite42_Out2145785351|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2145785351, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2145785351} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2145785351, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2145785351, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2145785351|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 10:55:05,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In-1185217817 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1185217817 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1185217817 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1185217817 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In-1185217817 |P2Thread1of1ForFork0_#t~ite43_Out-1185217817|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1185217817|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1185217817, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1185217817, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1185217817, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1185217817} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1185217817|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1185217817, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1185217817, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1185217817, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1185217817} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 10:55:05,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_308 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:55:05,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In717061057 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In717061057 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out717061057| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In717061057 |P0Thread1of1ForFork1_#t~ite5_Out717061057|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In717061057, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In717061057} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out717061057|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In717061057, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In717061057} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:55:05,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In-1313503764 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1313503764 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1313503764 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1313503764 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1313503764|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-1313503764 |P0Thread1of1ForFork1_#t~ite6_Out-1313503764|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1313503764, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1313503764, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1313503764, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1313503764} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1313503764, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1313503764|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1313503764, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1313503764, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1313503764} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:55:05,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-895933816 256))) (.cse2 (= ~z$r_buff0_thd1~0_Out-895933816 ~z$r_buff0_thd1~0_In-895933816)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-895933816 256) 0))) (or (and (= ~z$r_buff0_thd1~0_Out-895933816 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-895933816, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-895933816} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-895933816, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-895933816|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-895933816} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:55:05,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd1~0_In2042487987 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In2042487987 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In2042487987 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2042487987 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd1~0_In2042487987 |P0Thread1of1ForFork1_#t~ite8_Out2042487987|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out2042487987|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2042487987, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2042487987, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2042487987, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2042487987} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out2042487987|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2042487987, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2042487987, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2042487987, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2042487987} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:55:05,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:55:05,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In278390689 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In278390689 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out278390689| ~z$w_buff0_used~0_In278390689)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out278390689|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In278390689, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In278390689} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In278390689, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out278390689|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In278390689} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:55:05,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1930345795 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1930345795 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1930345795 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1930345795 256)))) (or (and (= ~z$w_buff1_used~0_In1930345795 |P1Thread1of1ForFork2_#t~ite12_Out1930345795|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out1930345795| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1930345795, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1930345795, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1930345795, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1930345795} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1930345795, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1930345795, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1930345795, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1930345795|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1930345795} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:55:05,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1050392274 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1050392274 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1050392274| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In1050392274 |P1Thread1of1ForFork2_#t~ite13_Out1050392274|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1050392274, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1050392274} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1050392274, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1050392274|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1050392274} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:55:05,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In1760855970 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1760855970 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1760855970 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1760855970 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1760855970| ~z$r_buff1_thd2~0_In1760855970) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out1760855970| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1760855970, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1760855970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1760855970, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1760855970} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1760855970, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1760855970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1760855970, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1760855970|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1760855970} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:55:05,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93) (= v_~z$r_buff1_thd2~0_188 |v_P1Thread1of1ForFork2_#t~ite14_48|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:55:05,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:55:05,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1731598809 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1731598809 256) 0))) (or (and (= ~z~0_In-1731598809 |ULTIMATE.start_main_#t~ite47_Out-1731598809|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-1731598809 |ULTIMATE.start_main_#t~ite47_Out-1731598809|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1731598809, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1731598809, ~z$w_buff1~0=~z$w_buff1~0_In-1731598809, ~z~0=~z~0_In-1731598809} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1731598809, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1731598809|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1731598809, ~z$w_buff1~0=~z$w_buff1~0_In-1731598809, ~z~0=~z~0_In-1731598809} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 10:55:05,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 10:55:05,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In436459803 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In436459803 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out436459803| ~z$w_buff0_used~0_In436459803) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out436459803| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In436459803, ~z$w_buff0_used~0=~z$w_buff0_used~0_In436459803} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In436459803, ~z$w_buff0_used~0=~z$w_buff0_used~0_In436459803, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out436459803|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:55:05,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-1431236884 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1431236884 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1431236884 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-1431236884 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1431236884 |ULTIMATE.start_main_#t~ite50_Out-1431236884|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite50_Out-1431236884| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1431236884, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1431236884, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1431236884, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1431236884} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1431236884|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1431236884, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1431236884, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1431236884, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1431236884} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:55:05,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-464179455 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-464179455 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-464179455| 0) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-464179455 |ULTIMATE.start_main_#t~ite51_Out-464179455|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-464179455, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-464179455} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-464179455, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-464179455|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-464179455} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:55:05,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In1810170789 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In1810170789 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1810170789 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1810170789 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1810170789|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In1810170789 |ULTIMATE.start_main_#t~ite52_Out1810170789|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1810170789, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1810170789, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1810170789, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1810170789} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1810170789|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1810170789, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1810170789, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1810170789, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1810170789} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:55:05,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~z$r_buff1_thd0~0_221 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_22) (= 1 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 2 v_~x~0_186))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_186} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_221, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_186, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:55:05,998 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:55:05 BasicIcfg [2019-12-07 10:55:05,998 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:55:05,999 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:55:05,999 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:55:05,999 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:55:05,999 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:51:47" (3/4) ... [2019-12-07 10:55:06,001 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:55:06,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t503~0.base_22|)) (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= 0 v_~z$r_buff0_thd3~0_377) (= v_~__unbuffered_cnt~0_128 0) (= v_~z$r_buff0_thd1~0_378 0) (= v_~z$mem_tmp~0_24 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t503~0.base_22| 4)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t503~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t503~0.base_22|) |v_ULTIMATE.start_main_~#t503~0.offset_16| 0)) |v_#memory_int_19|) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff0_thd0~0_195 0) (= v_~y~0_28 0) (= v_~z$w_buff1_used~0_500 0) (= 0 |v_#NULL.base_6|) (= v_~main$tmp_guard1~0_38 0) (= 0 v_~z$flush_delayed~0_43) (= v_~z$read_delayed~0_7 0) (= |v_ULTIMATE.start_main_~#t503~0.offset_16| 0) (= v_~z$r_buff0_thd2~0_182 0) (= 0 v_~z$r_buff1_thd3~0_396) (= 0 v_~x~0_245) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_35) (= v_~z$r_buff1_thd0~0_294 0) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~__unbuffered_p1_EAX~0_41) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t503~0.base_22|) (= v_~z$r_buff1_thd2~0_280 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t503~0.base_22| 1)) (= v_~z$w_buff1~0_199 0) (= v_~z~0_182 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_72|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_195, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_41, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ULTIMATE.start_main_~#t503~0.base=|v_ULTIMATE.start_main_~#t503~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t505~0.base=|v_ULTIMATE.start_main_~#t505~0.base_17|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t504~0.base=|v_ULTIMATE.start_main_~#t504~0.base_19|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_377, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_245, ULTIMATE.start_main_~#t505~0.offset=|v_ULTIMATE.start_main_~#t505~0.offset_14|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_294, ~y~0=v_~y~0_28, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_182, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ULTIMATE.start_main_~#t503~0.offset=|v_ULTIMATE.start_main_~#t503~0.offset_16|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, ULTIMATE.start_main_~#t504~0.offset=|v_ULTIMATE.start_main_~#t504~0.offset_14|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_378} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t503~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t505~0.base, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t504~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t505~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t503~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t504~0.offset, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:55:06,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~x~0_11 1) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_11, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 10:55:06,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (= |v_ULTIMATE.start_main_~#t504~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t504~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t504~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t504~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t504~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t504~0.base_11|) |v_ULTIMATE.start_main_~#t504~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t504~0.base_11| 1) |v_#valid_31|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t504~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t504~0.base=|v_ULTIMATE.start_main_~#t504~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t504~0.offset=|v_ULTIMATE.start_main_~#t504~0.offset_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t504~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t504~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:55:06,003 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t505~0.base_12|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t505~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t505~0.base_12|) |v_ULTIMATE.start_main_~#t505~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t505~0.base_12| 1)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t505~0.base_12|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t505~0.base_12| 4) |v_#length_13|) (= |v_ULTIMATE.start_main_~#t505~0.offset_10| 0) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t505~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t505~0.offset=|v_ULTIMATE.start_main_~#t505~0.offset_10|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t505~0.base=|v_ULTIMATE.start_main_~#t505~0.base_12|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t505~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t505~0.base, #length] because there is no mapped edge [2019-12-07 10:55:06,004 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite10_Out-370388684| |P1Thread1of1ForFork2_#t~ite9_Out-370388684|)) (.cse2 (= (mod ~z$w_buff1_used~0_In-370388684 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-370388684 256)))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out-370388684| ~z$w_buff1~0_In-370388684) (not .cse1) (not .cse2)) (and .cse0 (= ~z~0_In-370388684 |P1Thread1of1ForFork2_#t~ite9_Out-370388684|) (or .cse2 .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-370388684, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-370388684, ~z$w_buff1~0=~z$w_buff1~0_In-370388684, ~z~0=~z~0_In-370388684} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-370388684|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-370388684, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-370388684|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-370388684, ~z$w_buff1~0=~z$w_buff1~0_In-370388684, ~z~0=~z~0_In-370388684} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 10:55:06,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1808454344 256) 0))) (or (and (= ~z$w_buff1~0_In1808454344 |P2Thread1of1ForFork0_#t~ite24_Out1808454344|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In1808454344| |P2Thread1of1ForFork0_#t~ite23_Out1808454344|)) (and (= |P2Thread1of1ForFork0_#t~ite23_Out1808454344| |P2Thread1of1ForFork0_#t~ite24_Out1808454344|) (= ~z$w_buff1~0_In1808454344 |P2Thread1of1ForFork0_#t~ite23_Out1808454344|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1808454344 256) 0))) (or (= (mod ~z$w_buff0_used~0_In1808454344 256) 0) (and (= (mod ~z$w_buff1_used~0_In1808454344 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In1808454344 256) 0) .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1808454344, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1808454344, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1808454344|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1808454344, ~z$w_buff1~0=~z$w_buff1~0_In1808454344, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1808454344, ~weak$$choice2~0=~weak$$choice2~0_In1808454344} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1808454344, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1808454344|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1808454344, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1808454344|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1808454344, ~z$w_buff1~0=~z$w_buff1~0_In1808454344, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1808454344, ~weak$$choice2~0=~weak$$choice2~0_In1808454344} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 10:55:06,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse3 (= |P2Thread1of1ForFork0_#t~ite30_Out-290376717| |P2Thread1of1ForFork0_#t~ite29_Out-290376717|)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-290376717 256))) (.cse6 (= 0 (mod ~z$r_buff0_thd3~0_In-290376717 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-290376717 256) 0)) (.cse4 (= 0 (mod ~z$w_buff0_used~0_In-290376717 256))) (.cse5 (= (mod ~weak$$choice2~0_In-290376717 256) 0))) (or (let ((.cse1 (not .cse6))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse1) .cse3 (= |P2Thread1of1ForFork0_#t~ite28_Out-290376717| 0) (not .cse4) (= |P2Thread1of1ForFork0_#t~ite28_Out-290376717| |P2Thread1of1ForFork0_#t~ite29_Out-290376717|) .cse5)) (and (or (and (= |P2Thread1of1ForFork0_#t~ite29_Out-290376717| ~z$w_buff1_used~0_In-290376717) .cse3 (or (and .cse0 .cse6) (and .cse6 .cse2) .cse4) .cse5) (and (= |P2Thread1of1ForFork0_#t~ite29_In-290376717| |P2Thread1of1ForFork0_#t~ite29_Out-290376717|) (not .cse5) (= |P2Thread1of1ForFork0_#t~ite30_Out-290376717| ~z$w_buff1_used~0_In-290376717))) (= |P2Thread1of1ForFork0_#t~ite28_In-290376717| |P2Thread1of1ForFork0_#t~ite28_Out-290376717|)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In-290376717|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-290376717, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-290376717, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-290376717, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-290376717, ~weak$$choice2~0=~weak$$choice2~0_In-290376717, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-290376717|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out-290376717|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-290376717, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-290376717, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-290376717, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-290376717, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-290376717|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-290376717|, ~weak$$choice2~0=~weak$$choice2~0_In-290376717} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 10:55:06,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (= v_~z$r_buff0_thd3~0_371 v_~z$r_buff0_thd3~0_370) (not (= (mod v_~weak$$choice2~0_130 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_370, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 10:55:06,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:55:06,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out296396639| |P2Thread1of1ForFork0_#t~ite38_Out296396639|)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In296396639 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In296396639 256)))) (or (and (= ~z~0_In296396639 |P2Thread1of1ForFork0_#t~ite38_Out296396639|) (or .cse0 .cse1) .cse2) (and (= ~z$w_buff1~0_In296396639 |P2Thread1of1ForFork0_#t~ite38_Out296396639|) .cse2 (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In296396639, ~z$w_buff1_used~0=~z$w_buff1_used~0_In296396639, ~z$w_buff1~0=~z$w_buff1~0_In296396639, ~z~0=~z~0_In296396639} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out296396639|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out296396639|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In296396639, ~z$w_buff1_used~0=~z$w_buff1_used~0_In296396639, ~z$w_buff1~0=~z$w_buff1~0_In296396639, ~z~0=~z~0_In296396639} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 10:55:06,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1329937383 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1329937383 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1329937383 |P2Thread1of1ForFork0_#t~ite40_Out1329937383|)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1329937383| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1329937383, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1329937383} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1329937383, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1329937383|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1329937383} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 10:55:06,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In2127092447 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In2127092447 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In2127092447 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In2127092447 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out2127092447| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out2127092447| ~z$w_buff1_used~0_In2127092447)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2127092447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2127092447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2127092447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2127092447} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2127092447, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2127092447, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2127092447, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2127092447, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out2127092447|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 10:55:06,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In2145785351 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In2145785351 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out2145785351|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In2145785351 |P2Thread1of1ForFork0_#t~ite42_Out2145785351|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2145785351, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2145785351} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2145785351, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2145785351, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2145785351|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 10:55:06,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In-1185217817 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1185217817 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1185217817 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1185217817 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In-1185217817 |P2Thread1of1ForFork0_#t~ite43_Out-1185217817|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1185217817|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1185217817, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1185217817, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1185217817, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1185217817} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1185217817|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1185217817, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1185217817, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1185217817, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1185217817} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 10:55:06,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_308 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:55:06,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In717061057 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In717061057 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out717061057| 0) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In717061057 |P0Thread1of1ForFork1_#t~ite5_Out717061057|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In717061057, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In717061057} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out717061057|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In717061057, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In717061057} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:55:06,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In-1313503764 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1313503764 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1313503764 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1313503764 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1313503764|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-1313503764 |P0Thread1of1ForFork1_#t~ite6_Out-1313503764|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1313503764, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1313503764, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1313503764, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1313503764} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1313503764, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1313503764|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1313503764, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1313503764, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1313503764} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:55:06,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-895933816 256))) (.cse2 (= ~z$r_buff0_thd1~0_Out-895933816 ~z$r_buff0_thd1~0_In-895933816)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-895933816 256) 0))) (or (and (= ~z$r_buff0_thd1~0_Out-895933816 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-895933816, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-895933816} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-895933816, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-895933816|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-895933816} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:55:06,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd1~0_In2042487987 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In2042487987 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In2042487987 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2042487987 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd1~0_In2042487987 |P0Thread1of1ForFork1_#t~ite8_Out2042487987|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out2042487987|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2042487987, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2042487987, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2042487987, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2042487987} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out2042487987|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2042487987, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In2042487987, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2042487987, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2042487987} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:55:06,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:55:06,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In278390689 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In278390689 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out278390689| ~z$w_buff0_used~0_In278390689)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out278390689|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In278390689, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In278390689} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In278390689, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out278390689|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In278390689} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:55:06,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1930345795 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1930345795 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1930345795 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1930345795 256)))) (or (and (= ~z$w_buff1_used~0_In1930345795 |P1Thread1of1ForFork2_#t~ite12_Out1930345795|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out1930345795| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1930345795, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1930345795, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1930345795, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1930345795} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1930345795, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1930345795, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1930345795, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1930345795|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1930345795} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:55:06,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1050392274 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1050392274 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1050392274| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In1050392274 |P1Thread1of1ForFork2_#t~ite13_Out1050392274|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1050392274, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1050392274} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1050392274, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1050392274|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1050392274} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:55:06,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In1760855970 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1760855970 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1760855970 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1760855970 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1760855970| ~z$r_buff1_thd2~0_In1760855970) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork2_#t~ite14_Out1760855970| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1760855970, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1760855970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1760855970, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1760855970} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1760855970, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1760855970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1760855970, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1760855970|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1760855970} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:55:06,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93) (= v_~z$r_buff1_thd2~0_188 |v_P1Thread1of1ForFork2_#t~ite14_48|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:55:06,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:55:06,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1731598809 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1731598809 256) 0))) (or (and (= ~z~0_In-1731598809 |ULTIMATE.start_main_#t~ite47_Out-1731598809|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-1731598809 |ULTIMATE.start_main_#t~ite47_Out-1731598809|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1731598809, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1731598809, ~z$w_buff1~0=~z$w_buff1~0_In-1731598809, ~z~0=~z~0_In-1731598809} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1731598809, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1731598809|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1731598809, ~z$w_buff1~0=~z$w_buff1~0_In-1731598809, ~z~0=~z~0_In-1731598809} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 10:55:06,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 10:55:06,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In436459803 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In436459803 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out436459803| ~z$w_buff0_used~0_In436459803) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out436459803| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In436459803, ~z$w_buff0_used~0=~z$w_buff0_used~0_In436459803} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In436459803, ~z$w_buff0_used~0=~z$w_buff0_used~0_In436459803, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out436459803|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:55:06,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-1431236884 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1431236884 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1431236884 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-1431236884 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1431236884 |ULTIMATE.start_main_#t~ite50_Out-1431236884|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite50_Out-1431236884| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1431236884, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1431236884, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1431236884, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1431236884} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1431236884|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1431236884, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1431236884, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1431236884, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1431236884} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:55:06,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-464179455 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-464179455 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-464179455| 0) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-464179455 |ULTIMATE.start_main_#t~ite51_Out-464179455|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-464179455, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-464179455} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-464179455, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-464179455|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-464179455} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:55:06,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In1810170789 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In1810170789 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1810170789 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1810170789 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1810170789|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In1810170789 |ULTIMATE.start_main_#t~ite52_Out1810170789|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1810170789, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1810170789, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1810170789, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1810170789} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1810170789|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1810170789, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1810170789, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1810170789, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1810170789} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:55:06,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~z$r_buff1_thd0~0_221 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_22) (= 1 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 2 v_~x~0_186))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_186} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_221, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_186, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:55:06,062 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c5c00086-a924-4a88-8997-c7ff33899eaa/bin/uautomizer/witness.graphml [2019-12-07 10:55:06,063 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:55:06,064 INFO L168 Benchmark]: Toolchain (without parser) took 199603.87 ms. Allocated memory was 1.0 GB in the beginning and 9.6 GB in the end (delta: 8.6 GB). Free memory was 934.0 MB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 6.3 GB. Max. memory is 11.5 GB. [2019-12-07 10:55:06,064 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 954.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:55:06,064 INFO L168 Benchmark]: CACSL2BoogieTranslator took 389.81 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -156.1 MB). Peak memory consumption was 23.0 MB. Max. memory is 11.5 GB. [2019-12-07 10:55:06,064 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:55:06,065 INFO L168 Benchmark]: Boogie Preprocessor took 25.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:55:06,065 INFO L168 Benchmark]: RCFGBuilder took 406.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.3 MB). Peak memory consumption was 54.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:55:06,065 INFO L168 Benchmark]: TraceAbstraction took 198675.32 ms. Allocated memory was 1.2 GB in the beginning and 9.6 GB in the end (delta: 8.5 GB). Free memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 6.3 GB. Max. memory is 11.5 GB. [2019-12-07 10:55:06,065 INFO L168 Benchmark]: Witness Printer took 64.05 ms. Allocated memory is still 9.6 GB. Free memory was 3.2 GB in the beginning and 3.2 GB in the end (delta: 47.7 MB). Peak memory consumption was 47.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:55:06,067 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 954.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 389.81 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 123.7 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -156.1 MB). Peak memory consumption was 23.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.95 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 406.59 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.3 MB). Peak memory consumption was 54.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 198675.32 ms. Allocated memory was 1.2 GB in the beginning and 9.6 GB in the end (delta: 8.5 GB). Free memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: -2.2 GB). Peak memory consumption was 6.3 GB. Max. memory is 11.5 GB. * Witness Printer took 64.05 ms. Allocated memory is still 9.6 GB. Free memory was 3.2 GB in the beginning and 3.2 GB in the end (delta: 47.7 MB). Peak memory consumption was 47.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 7044 VarBasedMoverChecksPositive, 336 VarBasedMoverChecksNegative, 168 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 130103 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t503, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t504, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 2 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L829] FCALL, FORK 0 pthread_create(&t505, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 __unbuffered_p2_EAX = y [L786] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L787] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L788] 3 z$flush_delayed = weak$$choice2 [L789] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L766] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L791] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L792] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L793] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L803] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L804] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L835] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L837] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L838] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 198.5s, OverallIterations: 31, TraceHistogramMax: 1, AutomataDifference: 48.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7214 SDtfs, 8514 SDslu, 25197 SDs, 0 SdLazy, 19889 SolverSat, 404 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 452 GetRequests, 43 SyntacticMatches, 22 SemanticMatches, 387 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4420 ImplicationChecksByTransitivity, 4.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=372573occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 126.7s AutomataMinimizationTime, 30 MinimizatonAttempts, 633325 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 1156 NumberOfCodeBlocks, 1156 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 1060 ConstructedInterpolants, 0 QuantifiedInterpolants, 373051 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 30 InterpolantComputations, 30 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...