./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix023_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix023_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4eb58f162f02bda560046d30df2982136d6015da ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:30:52,804 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:30:52,805 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:30:52,813 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:30:52,813 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:30:52,813 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:30:52,814 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:30:52,816 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:30:52,817 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:30:52,818 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:30:52,819 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:30:52,820 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:30:52,820 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:30:52,820 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:30:52,821 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:30:52,822 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:30:52,822 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:30:52,823 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:30:52,824 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:30:52,826 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:30:52,827 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:30:52,827 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:30:52,828 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:30:52,828 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:30:52,830 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:30:52,830 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:30:52,830 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:30:52,831 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:30:52,831 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:30:52,832 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:30:52,832 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:30:52,832 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:30:52,833 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:30:52,833 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:30:52,834 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:30:52,834 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:30:52,835 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:30:52,835 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:30:52,835 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:30:52,836 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:30:52,837 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:30:52,837 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:30:52,850 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:30:52,850 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:30:52,851 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:30:52,851 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:30:52,851 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:30:52,851 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:30:52,852 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:30:52,852 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:30:52,852 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:30:52,852 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:30:52,852 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:30:52,853 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:30:52,853 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:30:52,853 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:30:52,853 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:30:52,853 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:30:52,853 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:30:52,854 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:30:52,854 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:30:52,854 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:30:52,854 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:30:52,854 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:30:52,855 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:30:52,855 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:30:52,855 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:30:52,855 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:30:52,855 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:30:52,855 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:30:52,856 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:30:52,856 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4eb58f162f02bda560046d30df2982136d6015da [2019-12-07 18:30:52,960 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:30:52,970 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:30:52,973 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:30:52,974 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:30:52,975 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:30:52,975 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix023_power.opt.i [2019-12-07 18:30:53,018 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/data/5fb427fbf/80e1ede99492468d822b874ef168ea05/FLAG42cfbb2cc [2019-12-07 18:30:53,482 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:30:53,483 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/sv-benchmarks/c/pthread-wmm/mix023_power.opt.i [2019-12-07 18:30:53,496 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/data/5fb427fbf/80e1ede99492468d822b874ef168ea05/FLAG42cfbb2cc [2019-12-07 18:30:53,507 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/data/5fb427fbf/80e1ede99492468d822b874ef168ea05 [2019-12-07 18:30:53,510 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:30:53,511 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:30:53,511 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:30:53,512 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:30:53,514 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:30:53,515 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,516 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53, skipping insertion in model container [2019-12-07 18:30:53,516 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,521 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:30:53,558 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:30:53,831 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:30:53,838 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:30:53,879 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:30:53,925 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:30:53,925 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53 WrapperNode [2019-12-07 18:30:53,925 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:30:53,925 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:30:53,926 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:30:53,926 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:30:53,931 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,944 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,962 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:30:53,963 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:30:53,963 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:30:53,963 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:30:53,969 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,969 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,973 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,973 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,980 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,983 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,985 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... [2019-12-07 18:30:53,988 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:30:53,989 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:30:53,989 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:30:53,989 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:30:53,989 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:30:54,031 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:30:54,031 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:30:54,031 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:30:54,031 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:30:54,031 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:30:54,031 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:30:54,031 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:30:54,032 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:30:54,032 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:30:54,032 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:30:54,032 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 18:30:54,032 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 18:30:54,032 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:30:54,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:30:54,032 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:30:54,034 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:30:54,400 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:30:54,400 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:30:54,401 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:30:54 BoogieIcfgContainer [2019-12-07 18:30:54,401 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:30:54,402 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:30:54,402 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:30:54,404 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:30:54,404 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:30:53" (1/3) ... [2019-12-07 18:30:54,404 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@131815a0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:30:54, skipping insertion in model container [2019-12-07 18:30:54,404 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:30:53" (2/3) ... [2019-12-07 18:30:54,405 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@131815a0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:30:54, skipping insertion in model container [2019-12-07 18:30:54,405 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:30:54" (3/3) ... [2019-12-07 18:30:54,406 INFO L109 eAbstractionObserver]: Analyzing ICFG mix023_power.opt.i [2019-12-07 18:30:54,412 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:30:54,412 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:30:54,417 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:30:54,418 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:30:54,442 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,443 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,443 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,443 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,443 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,443 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,444 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,444 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,444 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,444 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,444 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,444 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,444 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,444 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,445 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,445 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,445 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,445 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,445 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,445 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,445 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,445 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,446 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,447 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,448 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,449 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,450 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,451 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,452 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,453 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,454 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,454 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,454 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,454 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,454 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,454 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,454 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,455 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,455 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,455 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,455 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,455 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,455 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,456 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,457 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,458 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,458 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,458 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,458 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,458 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,458 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,458 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,458 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,459 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,460 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,461 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:30:54,476 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 18:30:54,493 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:30:54,493 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:30:54,493 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:30:54,493 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:30:54,493 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:30:54,494 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:30:54,494 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:30:54,494 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:30:54,505 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 18:30:54,507 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 18:30:54,566 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 18:30:54,567 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:30:54,577 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 707 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:30:54,594 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 18:30:54,625 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 18:30:54,625 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:30:54,630 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 707 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:30:54,646 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18126 [2019-12-07 18:30:54,647 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:30:57,730 WARN L192 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 18:30:58,047 WARN L192 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 54 [2019-12-07 18:30:58,069 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66461 [2019-12-07 18:30:58,069 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 18:30:58,071 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 88 places, 95 transitions [2019-12-07 18:31:27,564 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 160898 states. [2019-12-07 18:31:27,566 INFO L276 IsEmpty]: Start isEmpty. Operand 160898 states. [2019-12-07 18:31:27,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 18:31:27,571 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:27,571 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:27,572 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:27,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:27,576 INFO L82 PathProgramCache]: Analyzing trace with hash 406431864, now seen corresponding path program 1 times [2019-12-07 18:31:27,581 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:27,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2061689979] [2019-12-07 18:31:27,582 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:27,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:27,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:27,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2061689979] [2019-12-07 18:31:27,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:27,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:31:27,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211088417] [2019-12-07 18:31:27,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:31:27,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:27,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:31:27,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:31:27,749 INFO L87 Difference]: Start difference. First operand 160898 states. Second operand 3 states. [2019-12-07 18:31:28,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:28,928 INFO L93 Difference]: Finished difference Result 158998 states and 767616 transitions. [2019-12-07 18:31:28,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:31:28,930 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 18:31:28,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:31:29,696 INFO L225 Difference]: With dead ends: 158998 [2019-12-07 18:31:29,696 INFO L226 Difference]: Without dead ends: 149254 [2019-12-07 18:31:29,697 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:31:36,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149254 states. [2019-12-07 18:31:39,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149254 to 149254. [2019-12-07 18:31:39,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149254 states. [2019-12-07 18:31:39,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149254 states to 149254 states and 719596 transitions. [2019-12-07 18:31:39,673 INFO L78 Accepts]: Start accepts. Automaton has 149254 states and 719596 transitions. Word has length 7 [2019-12-07 18:31:39,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:31:39,674 INFO L462 AbstractCegarLoop]: Abstraction has 149254 states and 719596 transitions. [2019-12-07 18:31:39,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:31:39,674 INFO L276 IsEmpty]: Start isEmpty. Operand 149254 states and 719596 transitions. [2019-12-07 18:31:39,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:31:39,685 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:39,685 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:39,685 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:39,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:39,685 INFO L82 PathProgramCache]: Analyzing trace with hash 1843730986, now seen corresponding path program 1 times [2019-12-07 18:31:39,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:39,686 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144321379] [2019-12-07 18:31:39,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:39,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:39,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:39,754 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144321379] [2019-12-07 18:31:39,754 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:39,754 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:31:39,755 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2088680008] [2019-12-07 18:31:39,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:31:39,756 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:39,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:31:39,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:31:39,756 INFO L87 Difference]: Start difference. First operand 149254 states and 719596 transitions. Second operand 4 states. [2019-12-07 18:31:43,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:43,589 INFO L93 Difference]: Finished difference Result 235642 states and 1091274 transitions. [2019-12-07 18:31:43,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:31:43,590 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:31:43,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:31:44,369 INFO L225 Difference]: With dead ends: 235642 [2019-12-07 18:31:44,370 INFO L226 Difference]: Without dead ends: 235446 [2019-12-07 18:31:44,370 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:31:50,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235446 states. [2019-12-07 18:31:53,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235446 to 217254. [2019-12-07 18:31:53,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217254 states. [2019-12-07 18:31:55,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217254 states to 217254 states and 1015894 transitions. [2019-12-07 18:31:55,157 INFO L78 Accepts]: Start accepts. Automaton has 217254 states and 1015894 transitions. Word has length 15 [2019-12-07 18:31:55,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:31:55,158 INFO L462 AbstractCegarLoop]: Abstraction has 217254 states and 1015894 transitions. [2019-12-07 18:31:55,158 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:31:55,158 INFO L276 IsEmpty]: Start isEmpty. Operand 217254 states and 1015894 transitions. [2019-12-07 18:31:55,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:31:55,161 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:31:55,162 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:31:55,162 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:31:55,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:31:55,162 INFO L82 PathProgramCache]: Analyzing trace with hash -425966823, now seen corresponding path program 1 times [2019-12-07 18:31:55,162 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:31:55,162 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648013803] [2019-12-07 18:31:55,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:31:55,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:31:55,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:31:55,213 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648013803] [2019-12-07 18:31:55,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:31:55,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:31:55,213 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1876748354] [2019-12-07 18:31:55,214 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:31:55,214 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:31:55,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:31:55,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:31:55,214 INFO L87 Difference]: Start difference. First operand 217254 states and 1015894 transitions. Second operand 4 states. [2019-12-07 18:31:56,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:31:56,984 INFO L93 Difference]: Finished difference Result 302250 states and 1385570 transitions. [2019-12-07 18:31:56,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:31:56,985 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:31:56,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:01,472 INFO L225 Difference]: With dead ends: 302250 [2019-12-07 18:32:01,472 INFO L226 Difference]: Without dead ends: 302026 [2019-12-07 18:32:01,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:08,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302026 states. [2019-12-07 18:32:12,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 302026 to 256602. [2019-12-07 18:32:12,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256602 states. [2019-12-07 18:32:13,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256602 states to 256602 states and 1193810 transitions. [2019-12-07 18:32:13,904 INFO L78 Accepts]: Start accepts. Automaton has 256602 states and 1193810 transitions. Word has length 15 [2019-12-07 18:32:13,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:13,904 INFO L462 AbstractCegarLoop]: Abstraction has 256602 states and 1193810 transitions. [2019-12-07 18:32:13,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:32:13,904 INFO L276 IsEmpty]: Start isEmpty. Operand 256602 states and 1193810 transitions. [2019-12-07 18:32:13,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:32:13,910 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:13,910 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:13,910 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:13,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:13,910 INFO L82 PathProgramCache]: Analyzing trace with hash 1700714978, now seen corresponding path program 1 times [2019-12-07 18:32:13,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:13,911 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861818414] [2019-12-07 18:32:13,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:13,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:13,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:13,968 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861818414] [2019-12-07 18:32:13,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:13,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:32:13,968 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168473204] [2019-12-07 18:32:13,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:32:13,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:13,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:32:13,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:32:13,969 INFO L87 Difference]: Start difference. First operand 256602 states and 1193810 transitions. Second operand 5 states. [2019-12-07 18:32:16,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:16,664 INFO L93 Difference]: Finished difference Result 353982 states and 1618512 transitions. [2019-12-07 18:32:16,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:32:16,664 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:32:16,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:17,757 INFO L225 Difference]: With dead ends: 353982 [2019-12-07 18:32:17,757 INFO L226 Difference]: Without dead ends: 353678 [2019-12-07 18:32:17,757 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:32:29,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353678 states. [2019-12-07 18:32:33,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353678 to 284780. [2019-12-07 18:32:33,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284780 states. [2019-12-07 18:32:35,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284780 states to 284780 states and 1322007 transitions. [2019-12-07 18:32:35,434 INFO L78 Accepts]: Start accepts. Automaton has 284780 states and 1322007 transitions. Word has length 16 [2019-12-07 18:32:35,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:35,434 INFO L462 AbstractCegarLoop]: Abstraction has 284780 states and 1322007 transitions. [2019-12-07 18:32:35,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:32:35,434 INFO L276 IsEmpty]: Start isEmpty. Operand 284780 states and 1322007 transitions. [2019-12-07 18:32:35,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:32:35,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:35,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:35,455 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:35,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:35,455 INFO L82 PathProgramCache]: Analyzing trace with hash 464670534, now seen corresponding path program 1 times [2019-12-07 18:32:35,455 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:35,455 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141794856] [2019-12-07 18:32:35,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:35,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:35,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:35,495 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141794856] [2019-12-07 18:32:35,495 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:35,496 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:35,496 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281052335] [2019-12-07 18:32:35,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:35,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:35,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:35,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:35,496 INFO L87 Difference]: Start difference. First operand 284780 states and 1322007 transitions. Second operand 3 states. [2019-12-07 18:32:37,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:37,637 INFO L93 Difference]: Finished difference Result 284780 states and 1310815 transitions. [2019-12-07 18:32:37,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:37,638 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 18:32:37,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:38,467 INFO L225 Difference]: With dead ends: 284780 [2019-12-07 18:32:38,467 INFO L226 Difference]: Without dead ends: 284780 [2019-12-07 18:32:38,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:48,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284780 states. [2019-12-07 18:32:52,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284780 to 280540. [2019-12-07 18:32:52,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280540 states. [2019-12-07 18:32:54,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280540 states to 280540 states and 1292559 transitions. [2019-12-07 18:32:54,391 INFO L78 Accepts]: Start accepts. Automaton has 280540 states and 1292559 transitions. Word has length 20 [2019-12-07 18:32:54,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:32:54,392 INFO L462 AbstractCegarLoop]: Abstraction has 280540 states and 1292559 transitions. [2019-12-07 18:32:54,392 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:32:54,392 INFO L276 IsEmpty]: Start isEmpty. Operand 280540 states and 1292559 transitions. [2019-12-07 18:32:54,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:32:54,409 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:32:54,409 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:32:54,409 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:32:54,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:32:54,409 INFO L82 PathProgramCache]: Analyzing trace with hash -9773484, now seen corresponding path program 1 times [2019-12-07 18:32:54,409 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:32:54,409 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067483223] [2019-12-07 18:32:54,410 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:32:54,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:32:54,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:32:54,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1067483223] [2019-12-07 18:32:54,435 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:32:54,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:32:54,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1450391059] [2019-12-07 18:32:54,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:32:54,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:32:54,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:32:54,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:54,435 INFO L87 Difference]: Start difference. First operand 280540 states and 1292559 transitions. Second operand 3 states. [2019-12-07 18:32:55,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:32:55,234 INFO L93 Difference]: Finished difference Result 169924 states and 704402 transitions. [2019-12-07 18:32:55,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:32:55,235 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 18:32:55,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:32:55,670 INFO L225 Difference]: With dead ends: 169924 [2019-12-07 18:32:55,670 INFO L226 Difference]: Without dead ends: 169924 [2019-12-07 18:32:55,670 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:32:59,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169924 states. [2019-12-07 18:33:02,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169924 to 169924. [2019-12-07 18:33:02,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169924 states. [2019-12-07 18:33:02,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169924 states to 169924 states and 704402 transitions. [2019-12-07 18:33:02,928 INFO L78 Accepts]: Start accepts. Automaton has 169924 states and 704402 transitions. Word has length 20 [2019-12-07 18:33:02,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:33:02,928 INFO L462 AbstractCegarLoop]: Abstraction has 169924 states and 704402 transitions. [2019-12-07 18:33:02,928 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:33:02,928 INFO L276 IsEmpty]: Start isEmpty. Operand 169924 states and 704402 transitions. [2019-12-07 18:33:02,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:33:02,941 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:33:02,941 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:33:02,941 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:33:02,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:33:02,941 INFO L82 PathProgramCache]: Analyzing trace with hash 892065624, now seen corresponding path program 1 times [2019-12-07 18:33:02,941 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:33:02,941 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183229197] [2019-12-07 18:33:02,941 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:33:02,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:33:03,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:33:03,005 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [183229197] [2019-12-07 18:33:03,005 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:33:03,005 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:33:03,005 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411619215] [2019-12-07 18:33:03,006 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:33:03,006 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:33:03,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:33:03,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:33:03,006 INFO L87 Difference]: Start difference. First operand 169924 states and 704402 transitions. Second operand 4 states. [2019-12-07 18:33:07,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:33:07,204 INFO L93 Difference]: Finished difference Result 325305 states and 1340029 transitions. [2019-12-07 18:33:07,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:33:07,205 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 18:33:07,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:33:07,997 INFO L225 Difference]: With dead ends: 325305 [2019-12-07 18:33:07,997 INFO L226 Difference]: Without dead ends: 311121 [2019-12-07 18:33:07,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:33:12,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311121 states. [2019-12-07 18:33:17,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311121 to 301055. [2019-12-07 18:33:17,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301055 states. [2019-12-07 18:33:18,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301055 states to 301055 states and 1242207 transitions. [2019-12-07 18:33:18,814 INFO L78 Accepts]: Start accepts. Automaton has 301055 states and 1242207 transitions. Word has length 21 [2019-12-07 18:33:18,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:33:18,815 INFO L462 AbstractCegarLoop]: Abstraction has 301055 states and 1242207 transitions. [2019-12-07 18:33:18,815 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:33:18,815 INFO L276 IsEmpty]: Start isEmpty. Operand 301055 states and 1242207 transitions. [2019-12-07 18:33:18,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:33:18,845 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:33:18,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:33:18,845 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:33:18,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:33:18,845 INFO L82 PathProgramCache]: Analyzing trace with hash 1999707185, now seen corresponding path program 1 times [2019-12-07 18:33:18,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:33:18,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515977843] [2019-12-07 18:33:18,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:33:18,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:33:18,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:33:18,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [515977843] [2019-12-07 18:33:18,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:33:18,898 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:33:18,898 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [918309856] [2019-12-07 18:33:18,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:33:18,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:33:18,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:33:18,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:33:18,898 INFO L87 Difference]: Start difference. First operand 301055 states and 1242207 transitions. Second operand 5 states. [2019-12-07 18:33:21,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:33:21,782 INFO L93 Difference]: Finished difference Result 399230 states and 1617457 transitions. [2019-12-07 18:33:21,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:33:21,783 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:33:21,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:33:22,836 INFO L225 Difference]: With dead ends: 399230 [2019-12-07 18:33:22,836 INFO L226 Difference]: Without dead ends: 398679 [2019-12-07 18:33:22,836 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:33:28,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398679 states. [2019-12-07 18:33:37,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398679 to 316586. [2019-12-07 18:33:37,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 316586 states. [2019-12-07 18:33:38,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316586 states to 316586 states and 1303163 transitions. [2019-12-07 18:33:38,735 INFO L78 Accepts]: Start accepts. Automaton has 316586 states and 1303163 transitions. Word has length 22 [2019-12-07 18:33:38,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:33:38,735 INFO L462 AbstractCegarLoop]: Abstraction has 316586 states and 1303163 transitions. [2019-12-07 18:33:38,735 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:33:38,735 INFO L276 IsEmpty]: Start isEmpty. Operand 316586 states and 1303163 transitions. [2019-12-07 18:33:38,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:33:38,765 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:33:38,765 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:33:38,765 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:33:38,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:33:38,765 INFO L82 PathProgramCache]: Analyzing trace with hash -706870391, now seen corresponding path program 1 times [2019-12-07 18:33:38,765 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:33:38,765 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612306548] [2019-12-07 18:33:38,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:33:38,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:33:38,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:33:38,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612306548] [2019-12-07 18:33:38,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:33:38,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:33:38,828 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [482993909] [2019-12-07 18:33:38,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:33:38,828 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:33:38,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:33:38,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:33:38,828 INFO L87 Difference]: Start difference. First operand 316586 states and 1303163 transitions. Second operand 4 states. [2019-12-07 18:33:40,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:33:40,821 INFO L93 Difference]: Finished difference Result 326823 states and 1336324 transitions. [2019-12-07 18:33:40,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:33:40,822 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 18:33:40,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:33:41,680 INFO L225 Difference]: With dead ends: 326823 [2019-12-07 18:33:41,681 INFO L226 Difference]: Without dead ends: 326823 [2019-12-07 18:33:41,681 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:33:47,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326823 states. [2019-12-07 18:33:52,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326823 to 312533. [2019-12-07 18:33:52,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 312533 states. [2019-12-07 18:33:53,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312533 states to 312533 states and 1287488 transitions. [2019-12-07 18:33:53,206 INFO L78 Accepts]: Start accepts. Automaton has 312533 states and 1287488 transitions. Word has length 22 [2019-12-07 18:33:53,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:33:53,206 INFO L462 AbstractCegarLoop]: Abstraction has 312533 states and 1287488 transitions. [2019-12-07 18:33:53,206 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:33:53,207 INFO L276 IsEmpty]: Start isEmpty. Operand 312533 states and 1287488 transitions. [2019-12-07 18:33:53,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 18:33:53,240 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:33:53,240 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:33:53,240 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:33:53,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:33:53,241 INFO L82 PathProgramCache]: Analyzing trace with hash 1920659990, now seen corresponding path program 1 times [2019-12-07 18:33:53,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:33:53,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405936076] [2019-12-07 18:33:53,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:33:53,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:33:53,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:33:53,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1405936076] [2019-12-07 18:33:53,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:33:53,296 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:33:53,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [369925802] [2019-12-07 18:33:53,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:33:53,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:33:53,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:33:53,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:33:53,297 INFO L87 Difference]: Start difference. First operand 312533 states and 1287488 transitions. Second operand 4 states. [2019-12-07 18:33:58,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:33:58,082 INFO L93 Difference]: Finished difference Result 414603 states and 1699785 transitions. [2019-12-07 18:33:58,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:33:58,083 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 18:33:58,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:33:59,469 INFO L225 Difference]: With dead ends: 414603 [2019-12-07 18:33:59,469 INFO L226 Difference]: Without dead ends: 403531 [2019-12-07 18:33:59,470 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:34:05,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403531 states. [2019-12-07 18:34:10,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403531 to 297856. [2019-12-07 18:34:10,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297856 states. [2019-12-07 18:34:11,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297856 states to 297856 states and 1225388 transitions. [2019-12-07 18:34:11,457 INFO L78 Accepts]: Start accepts. Automaton has 297856 states and 1225388 transitions. Word has length 23 [2019-12-07 18:34:11,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:11,457 INFO L462 AbstractCegarLoop]: Abstraction has 297856 states and 1225388 transitions. [2019-12-07 18:34:11,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:34:11,457 INFO L276 IsEmpty]: Start isEmpty. Operand 297856 states and 1225388 transitions. [2019-12-07 18:34:11,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 18:34:11,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:11,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:11,487 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:11,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:11,487 INFO L82 PathProgramCache]: Analyzing trace with hash -918478820, now seen corresponding path program 2 times [2019-12-07 18:34:11,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:11,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429636879] [2019-12-07 18:34:11,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:11,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:11,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:11,552 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429636879] [2019-12-07 18:34:11,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:11,552 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:34:11,552 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2001781218] [2019-12-07 18:34:11,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:34:11,553 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:11,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:34:11,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:34:11,553 INFO L87 Difference]: Start difference. First operand 297856 states and 1225388 transitions. Second operand 5 states. [2019-12-07 18:34:14,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:14,677 INFO L93 Difference]: Finished difference Result 533451 states and 2180126 transitions. [2019-12-07 18:34:14,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:34:14,678 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2019-12-07 18:34:14,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:15,504 INFO L225 Difference]: With dead ends: 533451 [2019-12-07 18:34:15,505 INFO L226 Difference]: Without dead ends: 328900 [2019-12-07 18:34:15,505 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:34:20,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328900 states. [2019-12-07 18:34:30,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328900 to 302783. [2019-12-07 18:34:30,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302783 states. [2019-12-07 18:34:31,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302783 states to 302783 states and 1230609 transitions. [2019-12-07 18:34:31,054 INFO L78 Accepts]: Start accepts. Automaton has 302783 states and 1230609 transitions. Word has length 23 [2019-12-07 18:34:31,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:31,054 INFO L462 AbstractCegarLoop]: Abstraction has 302783 states and 1230609 transitions. [2019-12-07 18:34:31,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:34:31,054 INFO L276 IsEmpty]: Start isEmpty. Operand 302783 states and 1230609 transitions. [2019-12-07 18:34:31,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 18:34:31,090 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:31,090 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:31,090 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:31,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:31,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1356444054, now seen corresponding path program 3 times [2019-12-07 18:34:31,091 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:31,091 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296633925] [2019-12-07 18:34:31,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:31,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:31,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:31,119 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296633925] [2019-12-07 18:34:31,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:31,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:34:31,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [468868194] [2019-12-07 18:34:31,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:34:31,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:31,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:34:31,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:34:31,120 INFO L87 Difference]: Start difference. First operand 302783 states and 1230609 transitions. Second operand 4 states. [2019-12-07 18:34:31,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:31,847 INFO L93 Difference]: Finished difference Result 73356 states and 253507 transitions. [2019-12-07 18:34:31,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:34:31,848 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 18:34:31,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:31,982 INFO L225 Difference]: With dead ends: 73356 [2019-12-07 18:34:31,983 INFO L226 Difference]: Without dead ends: 73356 [2019-12-07 18:34:31,983 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:34:32,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73356 states. [2019-12-07 18:34:33,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73356 to 72564. [2019-12-07 18:34:33,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72564 states. [2019-12-07 18:34:33,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72564 states to 72564 states and 250009 transitions. [2019-12-07 18:34:33,253 INFO L78 Accepts]: Start accepts. Automaton has 72564 states and 250009 transitions. Word has length 23 [2019-12-07 18:34:33,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:33,253 INFO L462 AbstractCegarLoop]: Abstraction has 72564 states and 250009 transitions. [2019-12-07 18:34:33,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:34:33,253 INFO L276 IsEmpty]: Start isEmpty. Operand 72564 states and 250009 transitions. [2019-12-07 18:34:33,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 18:34:33,272 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:33,272 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:33,272 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:33,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:33,272 INFO L82 PathProgramCache]: Analyzing trace with hash -1135187325, now seen corresponding path program 1 times [2019-12-07 18:34:33,272 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:33,273 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083430400] [2019-12-07 18:34:33,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:33,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:33,313 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:33,313 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2083430400] [2019-12-07 18:34:33,314 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:33,314 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:34:33,314 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979890479] [2019-12-07 18:34:33,314 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:34:33,314 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:33,314 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:34:33,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:34:33,314 INFO L87 Difference]: Start difference. First operand 72564 states and 250009 transitions. Second operand 6 states. [2019-12-07 18:34:34,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:34,117 INFO L93 Difference]: Finished difference Result 105708 states and 353380 transitions. [2019-12-07 18:34:34,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:34:34,118 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2019-12-07 18:34:34,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:34,827 INFO L225 Difference]: With dead ends: 105708 [2019-12-07 18:34:34,827 INFO L226 Difference]: Without dead ends: 105470 [2019-12-07 18:34:34,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:34:35,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105470 states. [2019-12-07 18:34:36,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105470 to 79165. [2019-12-07 18:34:36,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79165 states. [2019-12-07 18:34:36,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79165 states to 79165 states and 270919 transitions. [2019-12-07 18:34:36,368 INFO L78 Accepts]: Start accepts. Automaton has 79165 states and 270919 transitions. Word has length 24 [2019-12-07 18:34:36,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:36,369 INFO L462 AbstractCegarLoop]: Abstraction has 79165 states and 270919 transitions. [2019-12-07 18:34:36,369 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:34:36,369 INFO L276 IsEmpty]: Start isEmpty. Operand 79165 states and 270919 transitions. [2019-12-07 18:34:36,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:34:36,407 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:36,407 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:36,407 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:36,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:36,407 INFO L82 PathProgramCache]: Analyzing trace with hash -1952630071, now seen corresponding path program 1 times [2019-12-07 18:34:36,408 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:36,408 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1746051525] [2019-12-07 18:34:36,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:36,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:36,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:36,452 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1746051525] [2019-12-07 18:34:36,452 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:36,452 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:34:36,452 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1648231947] [2019-12-07 18:34:36,453 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:34:36,453 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:36,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:34:36,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:34:36,453 INFO L87 Difference]: Start difference. First operand 79165 states and 270919 transitions. Second operand 6 states. [2019-12-07 18:34:37,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:37,264 INFO L93 Difference]: Finished difference Result 104812 states and 350551 transitions. [2019-12-07 18:34:37,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:34:37,265 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 18:34:37,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:37,459 INFO L225 Difference]: With dead ends: 104812 [2019-12-07 18:34:37,459 INFO L226 Difference]: Without dead ends: 104061 [2019-12-07 18:34:37,459 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:34:37,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104061 states. [2019-12-07 18:34:38,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104061 to 81869. [2019-12-07 18:34:38,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81869 states. [2019-12-07 18:34:39,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81869 states to 81869 states and 279799 transitions. [2019-12-07 18:34:39,049 INFO L78 Accepts]: Start accepts. Automaton has 81869 states and 279799 transitions. Word has length 31 [2019-12-07 18:34:39,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:39,049 INFO L462 AbstractCegarLoop]: Abstraction has 81869 states and 279799 transitions. [2019-12-07 18:34:39,049 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:34:39,049 INFO L276 IsEmpty]: Start isEmpty. Operand 81869 states and 279799 transitions. [2019-12-07 18:34:39,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:34:39,096 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:39,097 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:39,097 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:39,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:39,097 INFO L82 PathProgramCache]: Analyzing trace with hash -880573690, now seen corresponding path program 1 times [2019-12-07 18:34:39,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:39,097 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2054217854] [2019-12-07 18:34:39,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:39,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:39,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:39,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2054217854] [2019-12-07 18:34:39,158 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:39,158 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:34:39,158 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207017105] [2019-12-07 18:34:39,158 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:34:39,159 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:39,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:34:39,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:34:39,159 INFO L87 Difference]: Start difference. First operand 81869 states and 279799 transitions. Second operand 4 states. [2019-12-07 18:34:39,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:39,453 INFO L93 Difference]: Finished difference Result 83277 states and 283356 transitions. [2019-12-07 18:34:39,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:34:39,454 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-12-07 18:34:39,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:39,730 INFO L225 Difference]: With dead ends: 83277 [2019-12-07 18:34:39,730 INFO L226 Difference]: Without dead ends: 79824 [2019-12-07 18:34:39,731 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:34:40,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79824 states. [2019-12-07 18:34:40,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79824 to 78126. [2019-12-07 18:34:40,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78126 states. [2019-12-07 18:34:41,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78126 states to 78126 states and 267990 transitions. [2019-12-07 18:34:41,094 INFO L78 Accepts]: Start accepts. Automaton has 78126 states and 267990 transitions. Word has length 33 [2019-12-07 18:34:41,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:41,095 INFO L462 AbstractCegarLoop]: Abstraction has 78126 states and 267990 transitions. [2019-12-07 18:34:41,095 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:34:41,095 INFO L276 IsEmpty]: Start isEmpty. Operand 78126 states and 267990 transitions. [2019-12-07 18:34:41,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:34:41,146 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:41,146 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:41,146 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:41,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:41,146 INFO L82 PathProgramCache]: Analyzing trace with hash 774582413, now seen corresponding path program 1 times [2019-12-07 18:34:41,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:41,147 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626330915] [2019-12-07 18:34:41,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:41,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:41,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:41,180 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626330915] [2019-12-07 18:34:41,180 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:41,180 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:34:41,180 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [344156624] [2019-12-07 18:34:41,180 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:34:41,180 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:41,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:34:41,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:34:41,180 INFO L87 Difference]: Start difference. First operand 78126 states and 267990 transitions. Second operand 5 states. [2019-12-07 18:34:41,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:41,339 INFO L93 Difference]: Finished difference Result 39891 states and 141051 transitions. [2019-12-07 18:34:41,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:34:41,339 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-12-07 18:34:41,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:41,401 INFO L225 Difference]: With dead ends: 39891 [2019-12-07 18:34:41,401 INFO L226 Difference]: Without dead ends: 39771 [2019-12-07 18:34:41,402 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:34:41,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39771 states. [2019-12-07 18:34:42,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39771 to 29546. [2019-12-07 18:34:42,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29546 states. [2019-12-07 18:34:42,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29546 states to 29546 states and 100211 transitions. [2019-12-07 18:34:42,093 INFO L78 Accepts]: Start accepts. Automaton has 29546 states and 100211 transitions. Word has length 34 [2019-12-07 18:34:42,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:42,094 INFO L462 AbstractCegarLoop]: Abstraction has 29546 states and 100211 transitions. [2019-12-07 18:34:42,094 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:34:42,094 INFO L276 IsEmpty]: Start isEmpty. Operand 29546 states and 100211 transitions. [2019-12-07 18:34:42,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:34:42,128 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:42,128 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:42,128 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:42,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:42,128 INFO L82 PathProgramCache]: Analyzing trace with hash 9371836, now seen corresponding path program 1 times [2019-12-07 18:34:42,128 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:42,128 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058768376] [2019-12-07 18:34:42,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:42,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:42,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:42,274 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058768376] [2019-12-07 18:34:42,274 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:42,274 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:34:42,274 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712428655] [2019-12-07 18:34:42,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:34:42,274 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:42,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:34:42,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:34:42,275 INFO L87 Difference]: Start difference. First operand 29546 states and 100211 transitions. Second operand 9 states. [2019-12-07 18:34:43,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:43,024 INFO L93 Difference]: Finished difference Result 38527 states and 127526 transitions. [2019-12-07 18:34:43,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 18:34:43,024 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 43 [2019-12-07 18:34:43,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:43,080 INFO L225 Difference]: With dead ends: 38527 [2019-12-07 18:34:43,081 INFO L226 Difference]: Without dead ends: 38096 [2019-12-07 18:34:43,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=121, Invalid=299, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:34:43,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38096 states. [2019-12-07 18:34:43,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38096 to 28329. [2019-12-07 18:34:43,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28329 states. [2019-12-07 18:34:43,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28329 states to 28329 states and 96011 transitions. [2019-12-07 18:34:43,643 INFO L78 Accepts]: Start accepts. Automaton has 28329 states and 96011 transitions. Word has length 43 [2019-12-07 18:34:43,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:43,643 INFO L462 AbstractCegarLoop]: Abstraction has 28329 states and 96011 transitions. [2019-12-07 18:34:43,643 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:34:43,643 INFO L276 IsEmpty]: Start isEmpty. Operand 28329 states and 96011 transitions. [2019-12-07 18:34:43,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:34:43,676 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:43,676 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:43,676 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:43,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:43,676 INFO L82 PathProgramCache]: Analyzing trace with hash 166645302, now seen corresponding path program 2 times [2019-12-07 18:34:43,677 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:43,677 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374552136] [2019-12-07 18:34:43,677 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:43,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:43,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:43,754 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374552136] [2019-12-07 18:34:43,754 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:43,755 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:34:43,755 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222247131] [2019-12-07 18:34:43,755 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:34:43,755 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:43,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:34:43,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:34:43,755 INFO L87 Difference]: Start difference. First operand 28329 states and 96011 transitions. Second operand 8 states. [2019-12-07 18:34:44,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:44,395 INFO L93 Difference]: Finished difference Result 38190 states and 125712 transitions. [2019-12-07 18:34:44,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:34:44,395 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 43 [2019-12-07 18:34:44,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:44,450 INFO L225 Difference]: With dead ends: 38190 [2019-12-07 18:34:44,451 INFO L226 Difference]: Without dead ends: 38086 [2019-12-07 18:34:44,451 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=170, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:34:44,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38086 states. [2019-12-07 18:34:44,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38086 to 29378. [2019-12-07 18:34:44,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29378 states. [2019-12-07 18:34:44,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29378 states to 29378 states and 99442 transitions. [2019-12-07 18:34:44,994 INFO L78 Accepts]: Start accepts. Automaton has 29378 states and 99442 transitions. Word has length 43 [2019-12-07 18:34:44,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:44,994 INFO L462 AbstractCegarLoop]: Abstraction has 29378 states and 99442 transitions. [2019-12-07 18:34:44,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:34:44,995 INFO L276 IsEmpty]: Start isEmpty. Operand 29378 states and 99442 transitions. [2019-12-07 18:34:45,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:34:45,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:45,028 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:45,028 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:45,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:45,029 INFO L82 PathProgramCache]: Analyzing trace with hash 1513454384, now seen corresponding path program 1 times [2019-12-07 18:34:45,029 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:45,029 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635972799] [2019-12-07 18:34:45,029 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:45,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:45,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:45,130 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635972799] [2019-12-07 18:34:45,130 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:45,130 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:34:45,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68570475] [2019-12-07 18:34:45,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:34:45,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:45,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:34:45,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:34:45,131 INFO L87 Difference]: Start difference. First operand 29378 states and 99442 transitions. Second operand 3 states. [2019-12-07 18:34:45,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:45,272 INFO L93 Difference]: Finished difference Result 40118 states and 134824 transitions. [2019-12-07 18:34:45,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:34:45,272 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 18:34:45,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:45,335 INFO L225 Difference]: With dead ends: 40118 [2019-12-07 18:34:45,336 INFO L226 Difference]: Without dead ends: 40118 [2019-12-07 18:34:45,336 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:34:45,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40118 states. [2019-12-07 18:34:45,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40118 to 35518. [2019-12-07 18:34:45,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35518 states. [2019-12-07 18:34:45,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35518 states to 35518 states and 120799 transitions. [2019-12-07 18:34:45,977 INFO L78 Accepts]: Start accepts. Automaton has 35518 states and 120799 transitions. Word has length 43 [2019-12-07 18:34:45,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:45,978 INFO L462 AbstractCegarLoop]: Abstraction has 35518 states and 120799 transitions. [2019-12-07 18:34:45,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:34:45,978 INFO L276 IsEmpty]: Start isEmpty. Operand 35518 states and 120799 transitions. [2019-12-07 18:34:46,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 18:34:46,017 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:46,018 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:46,018 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:46,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:46,018 INFO L82 PathProgramCache]: Analyzing trace with hash 15041504, now seen corresponding path program 3 times [2019-12-07 18:34:46,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:46,018 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762470973] [2019-12-07 18:34:46,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:46,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:46,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:46,148 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762470973] [2019-12-07 18:34:46,148 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:46,149 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:34:46,149 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400815620] [2019-12-07 18:34:46,149 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:34:46,149 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:46,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:34:46,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:34:46,149 INFO L87 Difference]: Start difference. First operand 35518 states and 120799 transitions. Second operand 10 states. [2019-12-07 18:34:47,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:47,070 INFO L93 Difference]: Finished difference Result 42731 states and 140487 transitions. [2019-12-07 18:34:47,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:34:47,070 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2019-12-07 18:34:47,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:47,132 INFO L225 Difference]: With dead ends: 42731 [2019-12-07 18:34:47,133 INFO L226 Difference]: Without dead ends: 42434 [2019-12-07 18:34:47,133 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=176, Invalid=636, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:34:47,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42434 states. [2019-12-07 18:34:47,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42434 to 30475. [2019-12-07 18:34:47,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30475 states. [2019-12-07 18:34:47,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30475 states to 30475 states and 104572 transitions. [2019-12-07 18:34:47,758 INFO L78 Accepts]: Start accepts. Automaton has 30475 states and 104572 transitions. Word has length 43 [2019-12-07 18:34:47,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:47,758 INFO L462 AbstractCegarLoop]: Abstraction has 30475 states and 104572 transitions. [2019-12-07 18:34:47,758 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:34:47,758 INFO L276 IsEmpty]: Start isEmpty. Operand 30475 states and 104572 transitions. [2019-12-07 18:34:47,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 18:34:47,794 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:47,794 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:47,794 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:47,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:47,794 INFO L82 PathProgramCache]: Analyzing trace with hash 1368008840, now seen corresponding path program 1 times [2019-12-07 18:34:47,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:47,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700831092] [2019-12-07 18:34:47,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:47,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:47,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:47,840 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700831092] [2019-12-07 18:34:47,840 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:47,840 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:34:47,840 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813558573] [2019-12-07 18:34:47,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:34:47,841 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:47,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:34:47,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:34:47,841 INFO L87 Difference]: Start difference. First operand 30475 states and 104572 transitions. Second operand 5 states. [2019-12-07 18:34:48,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:48,336 INFO L93 Difference]: Finished difference Result 47029 states and 159274 transitions. [2019-12-07 18:34:48,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:34:48,336 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-07 18:34:48,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:48,403 INFO L225 Difference]: With dead ends: 47029 [2019-12-07 18:34:48,403 INFO L226 Difference]: Without dead ends: 47029 [2019-12-07 18:34:48,403 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:34:48,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47029 states. [2019-12-07 18:34:49,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47029 to 42261. [2019-12-07 18:34:49,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42261 states. [2019-12-07 18:34:49,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42261 states to 42261 states and 144417 transitions. [2019-12-07 18:34:49,159 INFO L78 Accepts]: Start accepts. Automaton has 42261 states and 144417 transitions. Word has length 44 [2019-12-07 18:34:49,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:49,160 INFO L462 AbstractCegarLoop]: Abstraction has 42261 states and 144417 transitions. [2019-12-07 18:34:49,160 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:34:49,160 INFO L276 IsEmpty]: Start isEmpty. Operand 42261 states and 144417 transitions. [2019-12-07 18:34:49,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 18:34:49,209 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:49,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:49,209 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:49,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:49,210 INFO L82 PathProgramCache]: Analyzing trace with hash -172653214, now seen corresponding path program 2 times [2019-12-07 18:34:49,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:49,210 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557266067] [2019-12-07 18:34:49,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:49,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:49,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:49,257 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557266067] [2019-12-07 18:34:49,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:49,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:34:49,257 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007159853] [2019-12-07 18:34:49,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:34:49,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:49,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:34:49,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:34:49,258 INFO L87 Difference]: Start difference. First operand 42261 states and 144417 transitions. Second operand 3 states. [2019-12-07 18:34:49,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:49,385 INFO L93 Difference]: Finished difference Result 40369 states and 136064 transitions. [2019-12-07 18:34:49,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:34:49,386 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-12-07 18:34:49,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:49,446 INFO L225 Difference]: With dead ends: 40369 [2019-12-07 18:34:49,446 INFO L226 Difference]: Without dead ends: 40369 [2019-12-07 18:34:49,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:34:49,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40369 states. [2019-12-07 18:34:50,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40369 to 39724. [2019-12-07 18:34:50,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39724 states. [2019-12-07 18:34:50,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39724 states to 39724 states and 134156 transitions. [2019-12-07 18:34:50,110 INFO L78 Accepts]: Start accepts. Automaton has 39724 states and 134156 transitions. Word has length 44 [2019-12-07 18:34:50,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:50,110 INFO L462 AbstractCegarLoop]: Abstraction has 39724 states and 134156 transitions. [2019-12-07 18:34:50,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:34:50,111 INFO L276 IsEmpty]: Start isEmpty. Operand 39724 states and 134156 transitions. [2019-12-07 18:34:50,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 18:34:50,155 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:50,155 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:50,155 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:50,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:50,155 INFO L82 PathProgramCache]: Analyzing trace with hash -1759842661, now seen corresponding path program 1 times [2019-12-07 18:34:50,155 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:50,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765172301] [2019-12-07 18:34:50,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:50,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:50,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:50,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1765172301] [2019-12-07 18:34:50,199 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:50,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:34:50,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908802607] [2019-12-07 18:34:50,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:34:50,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:50,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:34:50,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:34:50,199 INFO L87 Difference]: Start difference. First operand 39724 states and 134156 transitions. Second operand 6 states. [2019-12-07 18:34:50,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:50,350 INFO L93 Difference]: Finished difference Result 37373 states and 128690 transitions. [2019-12-07 18:34:50,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:34:50,350 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2019-12-07 18:34:50,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:50,408 INFO L225 Difference]: With dead ends: 37373 [2019-12-07 18:34:50,408 INFO L226 Difference]: Without dead ends: 36457 [2019-12-07 18:34:50,408 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:34:50,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36457 states. [2019-12-07 18:34:50,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36457 to 25717. [2019-12-07 18:34:50,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25717 states. [2019-12-07 18:34:50,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25717 states to 25717 states and 91902 transitions. [2019-12-07 18:34:50,996 INFO L78 Accepts]: Start accepts. Automaton has 25717 states and 91902 transitions. Word has length 45 [2019-12-07 18:34:50,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:50,996 INFO L462 AbstractCegarLoop]: Abstraction has 25717 states and 91902 transitions. [2019-12-07 18:34:50,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:34:50,996 INFO L276 IsEmpty]: Start isEmpty. Operand 25717 states and 91902 transitions. [2019-12-07 18:34:51,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:34:51,029 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:51,029 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:51,029 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:51,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:51,029 INFO L82 PathProgramCache]: Analyzing trace with hash 674110746, now seen corresponding path program 1 times [2019-12-07 18:34:51,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:51,030 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202083167] [2019-12-07 18:34:51,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:51,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:51,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:51,052 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202083167] [2019-12-07 18:34:51,053 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:51,053 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:34:51,053 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1207647054] [2019-12-07 18:34:51,053 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:34:51,053 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:51,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:34:51,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:34:51,053 INFO L87 Difference]: Start difference. First operand 25717 states and 91902 transitions. Second operand 3 states. [2019-12-07 18:34:51,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:51,163 INFO L93 Difference]: Finished difference Result 27524 states and 94630 transitions. [2019-12-07 18:34:51,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:34:51,164 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 18:34:51,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:51,210 INFO L225 Difference]: With dead ends: 27524 [2019-12-07 18:34:51,211 INFO L226 Difference]: Without dead ends: 27524 [2019-12-07 18:34:51,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:34:51,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27524 states. [2019-12-07 18:34:51,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27524 to 22451. [2019-12-07 18:34:51,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22451 states. [2019-12-07 18:34:51,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22451 states to 22451 states and 78467 transitions. [2019-12-07 18:34:51,652 INFO L78 Accepts]: Start accepts. Automaton has 22451 states and 78467 transitions. Word has length 59 [2019-12-07 18:34:51,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:51,653 INFO L462 AbstractCegarLoop]: Abstraction has 22451 states and 78467 transitions. [2019-12-07 18:34:51,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:34:51,653 INFO L276 IsEmpty]: Start isEmpty. Operand 22451 states and 78467 transitions. [2019-12-07 18:34:51,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:34:51,680 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:51,680 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:51,680 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:51,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:51,680 INFO L82 PathProgramCache]: Analyzing trace with hash -2006067837, now seen corresponding path program 1 times [2019-12-07 18:34:51,680 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:51,680 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713820932] [2019-12-07 18:34:51,680 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:51,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:51,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:51,742 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713820932] [2019-12-07 18:34:51,742 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:51,742 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:34:51,742 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1634033141] [2019-12-07 18:34:51,743 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:34:51,743 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:51,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:34:51,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:34:51,743 INFO L87 Difference]: Start difference. First operand 22451 states and 78467 transitions. Second operand 4 states. [2019-12-07 18:34:51,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:51,907 INFO L93 Difference]: Finished difference Result 50978 states and 174931 transitions. [2019-12-07 18:34:51,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:34:51,907 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2019-12-07 18:34:51,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:51,931 INFO L225 Difference]: With dead ends: 50978 [2019-12-07 18:34:51,931 INFO L226 Difference]: Without dead ends: 19277 [2019-12-07 18:34:51,932 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:34:52,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19277 states. [2019-12-07 18:34:52,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19277 to 10932. [2019-12-07 18:34:52,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10932 states. [2019-12-07 18:34:52,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10932 states to 10932 states and 33270 transitions. [2019-12-07 18:34:52,148 INFO L78 Accepts]: Start accepts. Automaton has 10932 states and 33270 transitions. Word has length 59 [2019-12-07 18:34:52,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:52,148 INFO L462 AbstractCegarLoop]: Abstraction has 10932 states and 33270 transitions. [2019-12-07 18:34:52,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:34:52,148 INFO L276 IsEmpty]: Start isEmpty. Operand 10932 states and 33270 transitions. [2019-12-07 18:34:52,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:34:52,158 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:52,158 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:52,159 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:52,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:52,159 INFO L82 PathProgramCache]: Analyzing trace with hash -286713595, now seen corresponding path program 2 times [2019-12-07 18:34:52,159 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:52,159 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256513862] [2019-12-07 18:34:52,159 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:52,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:52,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:52,315 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256513862] [2019-12-07 18:34:52,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:52,315 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:34:52,315 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [508136593] [2019-12-07 18:34:52,315 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:34:52,315 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:52,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:34:52,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:34:52,316 INFO L87 Difference]: Start difference. First operand 10932 states and 33270 transitions. Second operand 12 states. [2019-12-07 18:34:56,663 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 32 [2019-12-07 18:34:57,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:34:57,279 INFO L93 Difference]: Finished difference Result 36549 states and 109829 transitions. [2019-12-07 18:34:57,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 18:34:57,279 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 18:34:57,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:34:57,310 INFO L225 Difference]: With dead ends: 36549 [2019-12-07 18:34:57,310 INFO L226 Difference]: Without dead ends: 25193 [2019-12-07 18:34:57,311 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 732 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=490, Invalid=2060, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 18:34:57,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25193 states. [2019-12-07 18:34:57,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25193 to 12628. [2019-12-07 18:34:57,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12628 states. [2019-12-07 18:34:57,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12628 states to 12628 states and 37813 transitions. [2019-12-07 18:34:57,604 INFO L78 Accepts]: Start accepts. Automaton has 12628 states and 37813 transitions. Word has length 59 [2019-12-07 18:34:57,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:34:57,604 INFO L462 AbstractCegarLoop]: Abstraction has 12628 states and 37813 transitions. [2019-12-07 18:34:57,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:34:57,604 INFO L276 IsEmpty]: Start isEmpty. Operand 12628 states and 37813 transitions. [2019-12-07 18:34:57,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:34:57,616 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:34:57,616 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:34:57,617 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:34:57,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:34:57,617 INFO L82 PathProgramCache]: Analyzing trace with hash 1241689377, now seen corresponding path program 3 times [2019-12-07 18:34:57,617 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:34:57,617 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70485974] [2019-12-07 18:34:57,617 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:34:57,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:34:57,808 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:34:57,808 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70485974] [2019-12-07 18:34:57,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:34:57,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:34:57,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385149724] [2019-12-07 18:34:57,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:34:57,808 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:34:57,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:34:57,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:34:57,809 INFO L87 Difference]: Start difference. First operand 12628 states and 37813 transitions. Second operand 12 states. [2019-12-07 18:35:03,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:35:03,110 INFO L93 Difference]: Finished difference Result 44468 states and 132984 transitions. [2019-12-07 18:35:03,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 18:35:03,111 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 18:35:03,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:35:03,154 INFO L225 Difference]: With dead ends: 44468 [2019-12-07 18:35:03,154 INFO L226 Difference]: Without dead ends: 31074 [2019-12-07 18:35:03,156 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 725 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=489, Invalid=2061, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 18:35:03,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31074 states. [2019-12-07 18:35:03,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31074 to 13332. [2019-12-07 18:35:03,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13332 states. [2019-12-07 18:35:03,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13332 states to 13332 states and 39899 transitions. [2019-12-07 18:35:03,486 INFO L78 Accepts]: Start accepts. Automaton has 13332 states and 39899 transitions. Word has length 59 [2019-12-07 18:35:03,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:35:03,486 INFO L462 AbstractCegarLoop]: Abstraction has 13332 states and 39899 transitions. [2019-12-07 18:35:03,486 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:35:03,487 INFO L276 IsEmpty]: Start isEmpty. Operand 13332 states and 39899 transitions. [2019-12-07 18:35:03,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:35:03,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:35:03,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:35:03,500 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:35:03,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:35:03,500 INFO L82 PathProgramCache]: Analyzing trace with hash 235346217, now seen corresponding path program 4 times [2019-12-07 18:35:03,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:35:03,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223711425] [2019-12-07 18:35:03,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:35:03,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:35:03,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:35:03,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223711425] [2019-12-07 18:35:03,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:35:03,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:35:03,694 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1931568631] [2019-12-07 18:35:03,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:35:03,694 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:35:03,694 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:35:03,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:35:03,695 INFO L87 Difference]: Start difference. First operand 13332 states and 39899 transitions. Second operand 11 states. [2019-12-07 18:35:04,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:35:04,426 INFO L93 Difference]: Finished difference Result 29282 states and 88504 transitions. [2019-12-07 18:35:04,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 18:35:04,426 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 18:35:04,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:35:04,462 INFO L225 Difference]: With dead ends: 29282 [2019-12-07 18:35:04,462 INFO L226 Difference]: Without dead ends: 27948 [2019-12-07 18:35:04,463 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 346 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=271, Invalid=1135, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 18:35:04,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27948 states. [2019-12-07 18:35:04,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27948 to 17844. [2019-12-07 18:35:04,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17844 states. [2019-12-07 18:35:04,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17844 states to 17844 states and 53948 transitions. [2019-12-07 18:35:04,814 INFO L78 Accepts]: Start accepts. Automaton has 17844 states and 53948 transitions. Word has length 59 [2019-12-07 18:35:04,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:35:04,814 INFO L462 AbstractCegarLoop]: Abstraction has 17844 states and 53948 transitions. [2019-12-07 18:35:04,814 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:35:04,814 INFO L276 IsEmpty]: Start isEmpty. Operand 17844 states and 53948 transitions. [2019-12-07 18:35:04,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:35:04,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:35:04,832 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:35:04,832 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:35:04,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:35:04,832 INFO L82 PathProgramCache]: Analyzing trace with hash -1674144661, now seen corresponding path program 5 times [2019-12-07 18:35:04,832 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:35:04,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439319298] [2019-12-07 18:35:04,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:35:04,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:35:05,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:35:05,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439319298] [2019-12-07 18:35:05,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:35:05,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:35:05,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067186542] [2019-12-07 18:35:05,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:35:05,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:35:05,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:35:05,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:35:05,043 INFO L87 Difference]: Start difference. First operand 17844 states and 53948 transitions. Second operand 11 states. [2019-12-07 18:35:05,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:35:05,654 INFO L93 Difference]: Finished difference Result 27891 states and 83617 transitions. [2019-12-07 18:35:05,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:35:05,654 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 18:35:05,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:35:05,679 INFO L225 Difference]: With dead ends: 27891 [2019-12-07 18:35:05,679 INFO L226 Difference]: Without dead ends: 21164 [2019-12-07 18:35:05,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-12-07 18:35:05,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21164 states. [2019-12-07 18:35:05,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21164 to 13554. [2019-12-07 18:35:05,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13554 states. [2019-12-07 18:35:05,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13554 states to 13554 states and 40603 transitions. [2019-12-07 18:35:05,929 INFO L78 Accepts]: Start accepts. Automaton has 13554 states and 40603 transitions. Word has length 59 [2019-12-07 18:35:05,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:35:05,929 INFO L462 AbstractCegarLoop]: Abstraction has 13554 states and 40603 transitions. [2019-12-07 18:35:05,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:35:05,929 INFO L276 IsEmpty]: Start isEmpty. Operand 13554 states and 40603 transitions. [2019-12-07 18:35:05,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:35:05,942 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:35:05,942 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:35:05,942 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:35:05,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:35:05,943 INFO L82 PathProgramCache]: Analyzing trace with hash 875407311, now seen corresponding path program 6 times [2019-12-07 18:35:05,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:35:05,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476637249] [2019-12-07 18:35:05,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:35:05,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:35:05,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:35:05,996 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [476637249] [2019-12-07 18:35:05,996 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:35:05,996 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:35:05,997 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1270775859] [2019-12-07 18:35:05,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:35:05,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:35:05,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:35:05,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:35:05,997 INFO L87 Difference]: Start difference. First operand 13554 states and 40603 transitions. Second operand 7 states. [2019-12-07 18:35:06,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:35:06,192 INFO L93 Difference]: Finished difference Result 23678 states and 69310 transitions. [2019-12-07 18:35:06,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:35:06,192 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 59 [2019-12-07 18:35:06,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:35:06,214 INFO L225 Difference]: With dead ends: 23678 [2019-12-07 18:35:06,214 INFO L226 Difference]: Without dead ends: 20934 [2019-12-07 18:35:06,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:35:06,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20934 states. [2019-12-07 18:35:06,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20934 to 13419. [2019-12-07 18:35:06,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13419 states. [2019-12-07 18:35:06,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13419 states to 13419 states and 40151 transitions. [2019-12-07 18:35:06,460 INFO L78 Accepts]: Start accepts. Automaton has 13419 states and 40151 transitions. Word has length 59 [2019-12-07 18:35:06,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:35:06,461 INFO L462 AbstractCegarLoop]: Abstraction has 13419 states and 40151 transitions. [2019-12-07 18:35:06,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:35:06,461 INFO L276 IsEmpty]: Start isEmpty. Operand 13419 states and 40151 transitions. [2019-12-07 18:35:06,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:35:06,474 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:35:06,474 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:35:06,474 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:35:06,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:35:06,474 INFO L82 PathProgramCache]: Analyzing trace with hash 1304528589, now seen corresponding path program 7 times [2019-12-07 18:35:06,474 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:35:06,474 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459319199] [2019-12-07 18:35:06,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:35:06,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:35:06,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:35:06,645 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1459319199] [2019-12-07 18:35:06,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:35:06,646 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:35:06,646 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1263901837] [2019-12-07 18:35:06,646 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:35:06,646 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:35:06,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:35:06,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:35:06,646 INFO L87 Difference]: Start difference. First operand 13419 states and 40151 transitions. Second operand 12 states. [2019-12-07 18:35:07,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:35:07,128 INFO L93 Difference]: Finished difference Result 20842 states and 62019 transitions. [2019-12-07 18:35:07,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:35:07,129 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 18:35:07,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:35:07,150 INFO L225 Difference]: With dead ends: 20842 [2019-12-07 18:35:07,150 INFO L226 Difference]: Without dead ends: 20193 [2019-12-07 18:35:07,151 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:35:07,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20193 states. [2019-12-07 18:35:07,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20193 to 12965. [2019-12-07 18:35:07,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12965 states. [2019-12-07 18:35:07,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12965 states to 12965 states and 38909 transitions. [2019-12-07 18:35:07,387 INFO L78 Accepts]: Start accepts. Automaton has 12965 states and 38909 transitions. Word has length 59 [2019-12-07 18:35:07,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:35:07,387 INFO L462 AbstractCegarLoop]: Abstraction has 12965 states and 38909 transitions. [2019-12-07 18:35:07,387 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:35:07,387 INFO L276 IsEmpty]: Start isEmpty. Operand 12965 states and 38909 transitions. [2019-12-07 18:35:07,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 18:35:07,400 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:35:07,400 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:35:07,400 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:35:07,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:35:07,400 INFO L82 PathProgramCache]: Analyzing trace with hash -1779176519, now seen corresponding path program 8 times [2019-12-07 18:35:07,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:35:07,400 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305225242] [2019-12-07 18:35:07,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:35:07,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:35:07,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:35:07,467 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:35:07,467 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:35:07,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] ULTIMATE.startENTRY-->L846: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= v_~__unbuffered_p1_EBX~0_48 0) (= v_~x~0_72 0) (= v_~y$w_buff1_used~0_529 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff1_thd1~0_122 0) (= 0 v_~y$w_buff0~0_386) (= 0 v_~y$r_buff0_thd2~0_330) (= v_~__unbuffered_cnt~0_187 0) (= v_~main$tmp_guard1~0_42 0) (< 0 |v_#StackHeapBarrier_22|) (= v_~y~0_163 0) (= v_~y$read_delayed~0_7 0) (= 0 v_~y$r_buff1_thd3~0_189) (= 0 v_~__unbuffered_p3_EBX~0_48) (= v_~y$w_buff1~0_278 0) (= 0 v_~y$flush_delayed~0_49) (= 0 v_~y$read_delayed_var~0.base_5) (= v_~y$r_buff0_thd1~0_36 0) (= v_~y$w_buff0_used~0_832 0) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t605~0.base_29|) (= (store |v_#length_32| |v_ULTIMATE.start_main_~#t605~0.base_29| 4) |v_#length_31|) (= (select .cse0 |v_ULTIMATE.start_main_~#t605~0.base_29|) 0) (= 0 v_~y$read_delayed_var~0.offset_5) (= 0 v_~y$r_buff1_thd4~0_202) (= v_~a~0_49 0) (= (store |v_#memory_int_30| |v_ULTIMATE.start_main_~#t605~0.base_29| (store (select |v_#memory_int_30| |v_ULTIMATE.start_main_~#t605~0.base_29|) |v_ULTIMATE.start_main_~#t605~0.offset_21| 0)) |v_#memory_int_29|) (= 0 v_~y$r_buff1_thd2~0_315) (= v_~y$r_buff0_thd0~0_117 0) (= 0 |v_#NULL.base_4|) (= (store .cse0 |v_ULTIMATE.start_main_~#t605~0.base_29| 1) |v_#valid_72|) (= 0 v_~weak$$choice0~0_22) (= v_~y$mem_tmp~0_24 0) (= 0 v_~y$r_buff0_thd3~0_225) (= 0 v_~__unbuffered_p1_EAX~0_47) (= 0 v_~__unbuffered_p3_EAX~0_48) (= |v_#NULL.offset_4| 0) (= 0 v_~y$r_buff0_thd4~0_120) (= v_~weak$$choice2~0_186 0) (= v_~y$r_buff1_thd0~0_220 0) (= 0 |v_ULTIMATE.start_main_~#t605~0.offset_21|) (= v_~z~0_163 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_30|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t607~0.base=|v_ULTIMATE.start_main_~#t607~0.base_29|, ULTIMATE.start_main_~#t605~0.offset=|v_ULTIMATE.start_main_~#t605~0.offset_21|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_82|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_49, ~y$mem_tmp~0=v_~y$mem_tmp~0_24, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_189, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_36, ~y$flush_delayed~0=v_~y$flush_delayed~0_49, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_48, #length=|v_#length_31|, ULTIMATE.start_main_~#t607~0.offset=|v_ULTIMATE.start_main_~#t607~0.offset_21|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_29|, ~weak$$choice0~0=v_~weak$$choice0~0_22, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_202, ULTIMATE.start_main_~#t608~0.offset=|v_ULTIMATE.start_main_~#t608~0.offset_16|, ~y$w_buff1~0=v_~y$w_buff1~0_278, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_330, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_187, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_220, ~x~0=v_~x~0_72, ULTIMATE.start_main_~#t605~0.base=|v_ULTIMATE.start_main_~#t605~0.base_29|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_832, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_41|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ULTIMATE.start_main_~#t606~0.offset=|v_ULTIMATE.start_main_~#t606~0.offset_21|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_122, ~y$w_buff0~0=v_~y$w_buff0~0_386, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_225, ULTIMATE.start_main_~#t606~0.base=|v_ULTIMATE.start_main_~#t606~0.base_29|, ~y~0=v_~y~0_163, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_9|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_48, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_48, #NULL.base=|v_#NULL.base_4|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_315, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_120, ULTIMATE.start_main_~#t608~0.base=|v_ULTIMATE.start_main_~#t608~0.base_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_117, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_29|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ~z~0=v_~z~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_186, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_529} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t607~0.base, ULTIMATE.start_main_~#t605~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t607~0.offset, ULTIMATE.start_main_#t~nondet41, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ULTIMATE.start_main_~#t608~0.offset, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t605~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t606~0.offset, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t606~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p1_EBX~0, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_~#t608~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:35:07,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L846-1-->L848: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t606~0.offset_10|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t606~0.base_12|) 0) (not (= |v_ULTIMATE.start_main_~#t606~0.base_12| 0)) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t606~0.base_12| 4) |v_#length_19|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t606~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t606~0.base_12|) |v_ULTIMATE.start_main_~#t606~0.offset_10| 1)) |v_#memory_int_17|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t606~0.base_12| 1)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t606~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t606~0.offset=|v_ULTIMATE.start_main_~#t606~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t606~0.base=|v_ULTIMATE.start_main_~#t606~0.base_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_19|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t606~0.offset, ULTIMATE.start_main_~#t606~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 18:35:07,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-1-->L850: Formula: (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t607~0.base_13| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t607~0.base_13|) |v_ULTIMATE.start_main_~#t607~0.offset_11| 2)) |v_#memory_int_21|) (not (= 0 |v_ULTIMATE.start_main_~#t607~0.base_13|)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t607~0.base_13|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t607~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t607~0.offset_11|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t607~0.base_13|)) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t607~0.base_13| 4) |v_#length_23|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t607~0.base=|v_ULTIMATE.start_main_~#t607~0.base_13|, ULTIMATE.start_main_~#t607~0.offset=|v_ULTIMATE.start_main_~#t607~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_21|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t607~0.base, ULTIMATE.start_main_~#t607~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 18:35:07,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L4-->L800: Formula: (and (= v_~y$r_buff0_thd4~0_25 v_~y$r_buff1_thd4~0_25) (= v_~y$r_buff0_thd3~0_17 1) (= v_~y$r_buff0_thd3~0_18 v_~y$r_buff1_thd3~0_11) (= v_~y$r_buff1_thd1~0_4 v_~y$r_buff0_thd1~0_4) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22 0)) (= v_~y$r_buff0_thd2~0_68 v_~y$r_buff1_thd2~0_32) (= v_~z~0_10 1) (= v_~y$r_buff0_thd0~0_19 v_~y$r_buff1_thd0~0_17)) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_25, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_68, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_4, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_32, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_25, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_25, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_11, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_68, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_4, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22, ~z~0=v_~z~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 18:35:07,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L850-1-->L852: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t608~0.base_10| 4) |v_#length_17|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t608~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t608~0.base_10|) |v_ULTIMATE.start_main_~#t608~0.offset_10| 3)) |v_#memory_int_15|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t608~0.base_10|)) (= |v_ULTIMATE.start_main_~#t608~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t608~0.base_10|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t608~0.base_10|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t608~0.base_10| 1) |v_#valid_38|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_4|, ULTIMATE.start_main_~#t608~0.offset=|v_ULTIMATE.start_main_~#t608~0.offset_10|, ULTIMATE.start_main_~#t608~0.base=|v_ULTIMATE.start_main_~#t608~0.base_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t608~0.offset, ULTIMATE.start_main_~#t608~0.base, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:35:07,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] P0ENTRY-->P0EXIT: Formula: (and (= v_~a~0_23 1) (= v_~x~0_36 1) (= v_~__unbuffered_cnt~0_101 (+ v_~__unbuffered_cnt~0_102 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= v_P0Thread1of1ForFork1_~arg.offset_17 |v_P0Thread1of1ForFork1_#in~arg.offset_19|) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_19| v_P0Thread1of1ForFork1_~arg.base_17)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|} OutVars{~a~0=v_~a~0_23, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|, ~x~0=v_~x~0_36, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_17} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:35:07,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L823-2-->L823-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1082972240 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-1082972240 256)))) (or (and (= |P3Thread1of1ForFork0_#t~ite32_Out-1082972240| ~y~0_In-1082972240) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-1082972240 |P3Thread1of1ForFork0_#t~ite32_Out-1082972240|) (not .cse1) (not .cse0)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1082972240, ~y$w_buff1~0=~y$w_buff1~0_In-1082972240, ~y~0=~y~0_In-1082972240, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1082972240} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1082972240, ~y$w_buff1~0=~y$w_buff1~0_In-1082972240, ~y~0=~y~0_In-1082972240, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-1082972240|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1082972240} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 18:35:07,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L823-4-->L824: Formula: (= v_~y~0_43 |v_P3Thread1of1ForFork0_#t~ite32_12|) InVars {P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_12|} OutVars{~y~0=v_~y~0_43, P3Thread1of1ForFork0_#t~ite33=|v_P3Thread1of1ForFork0_#t~ite33_13|, P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_11|} AuxVars[] AssignedVars[~y~0, P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 18:35:07,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1108669482 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1108669482 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1108669482 |P3Thread1of1ForFork0_#t~ite34_Out-1108669482|)) (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out-1108669482|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1108669482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1108669482} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1108669482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1108669482, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-1108669482|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 18:35:07,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In985980656 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In985980656 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In985980656 |P2Thread1of1ForFork3_#t~ite28_Out985980656|)) (and (= 0 |P2Thread1of1ForFork3_#t~ite28_Out985980656|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In985980656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In985980656} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In985980656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In985980656, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out985980656|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 18:35:07,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L802-->L802-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-288516922 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-288516922 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-288516922 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-288516922 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out-288516922|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork3_#t~ite29_Out-288516922| ~y$w_buff1_used~0_In-288516922)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-288516922, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-288516922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-288516922, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-288516922} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-288516922, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-288516922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-288516922, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out-288516922|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-288516922} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 18:35:07,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L803-->L804: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-575443488 256) 0)) (.cse0 (= ~y$r_buff0_thd3~0_Out-575443488 ~y$r_buff0_thd3~0_In-575443488)) (.cse2 (= (mod ~y$w_buff0_used~0_In-575443488 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (= ~y$r_buff0_thd3~0_Out-575443488 0) (not .cse2)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-575443488, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-575443488} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out-575443488|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-575443488, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-575443488} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:35:07,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L804-->L804-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-991978019 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-991978019 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-991978019 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-991978019 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd3~0_In-991978019 |P2Thread1of1ForFork3_#t~ite31_Out-991978019|)) (and (= 0 |P2Thread1of1ForFork3_#t~ite31_Out-991978019|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-991978019, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-991978019, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991978019, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-991978019} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-991978019, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-991978019, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991978019, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out-991978019|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-991978019} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 18:35:07,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L804-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork3_#t~ite31_38| v_~y$r_buff1_thd3~0_125) (= v_~__unbuffered_cnt~0_126 (+ v_~__unbuffered_cnt~0_127 1)) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:35:07,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1423016518 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In1423016518 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1423016518 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd4~0_In1423016518 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1423016518 |P3Thread1of1ForFork0_#t~ite35_Out1423016518|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P3Thread1of1ForFork0_#t~ite35_Out1423016518|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1423016518, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1423016518, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1423016518, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1423016518} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1423016518, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1423016518, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1423016518, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out1423016518|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1423016518} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 18:35:07,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L826-->L826-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In-696570084 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-696570084 256) 0))) (or (and (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out-696570084|) (not .cse1)) (and (= ~y$r_buff0_thd4~0_In-696570084 |P3Thread1of1ForFork0_#t~ite36_Out-696570084|) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-696570084, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-696570084} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-696570084, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-696570084, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-696570084|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 18:35:07,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L827-->L827-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In6878931 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In6878931 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In6878931 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd4~0_In6878931 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork0_#t~ite37_Out6878931|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd4~0_In6878931 |P3Thread1of1ForFork0_#t~ite37_Out6878931|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In6878931, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In6878931, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6878931, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6878931} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In6878931, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In6878931, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6878931, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out6878931|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6878931} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 18:35:07,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L827-2-->P3EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_96 1) v_~__unbuffered_cnt~0_95) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= |v_P3Thread1of1ForFork0_#t~ite37_46| v_~y$r_buff1_thd4~0_61) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_61, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_45|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:35:07,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L764-->L764-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1546547710 256)))) (or (and (= ~y$w_buff0~0_In1546547710 |P1Thread1of1ForFork2_#t~ite8_Out1546547710|) (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1546547710 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In1546547710 256)) (and .cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1546547710 256))) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In1546547710 256))))) (= |P1Thread1of1ForFork2_#t~ite8_Out1546547710| |P1Thread1of1ForFork2_#t~ite9_Out1546547710|) .cse1) (and (= ~y$w_buff0~0_In1546547710 |P1Thread1of1ForFork2_#t~ite9_Out1546547710|) (= |P1Thread1of1ForFork2_#t~ite8_In1546547710| |P1Thread1of1ForFork2_#t~ite8_Out1546547710|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1546547710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1546547710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In1546547710|, ~y$w_buff0~0=~y$w_buff0~0_In1546547710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1546547710, ~weak$$choice2~0=~weak$$choice2~0_In1546547710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1546547710} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1546547710, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1546547710|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1546547710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out1546547710|, ~y$w_buff0~0=~y$w_buff0~0_In1546547710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1546547710, ~weak$$choice2~0=~weak$$choice2~0_In1546547710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1546547710} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:35:07,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-->L766-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1448315462 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1448315462 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In1448315462 256)) .cse0) (and (= (mod ~y$r_buff1_thd2~0_In1448315462 256) 0) .cse0) (= 0 (mod ~y$w_buff0_used~0_In1448315462 256)))) (= |P1Thread1of1ForFork2_#t~ite14_Out1448315462| |P1Thread1of1ForFork2_#t~ite15_Out1448315462|) .cse1 (= ~y$w_buff0_used~0_In1448315462 |P1Thread1of1ForFork2_#t~ite14_Out1448315462|)) (and (= ~y$w_buff0_used~0_In1448315462 |P1Thread1of1ForFork2_#t~ite15_Out1448315462|) (= |P1Thread1of1ForFork2_#t~ite14_In1448315462| |P1Thread1of1ForFork2_#t~ite14_Out1448315462|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1448315462, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1448315462, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1448315462, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In1448315462|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1448315462} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1448315462, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1448315462, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1448315462, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1448315462|, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out1448315462|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1448315462} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:35:07,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L768-->L769: Formula: (and (= v_~y$r_buff0_thd2~0_109 v_~y$r_buff0_thd2~0_108) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_13|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_8|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_5|, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 18:35:07,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L769-->L769-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-302493939 256)))) (or (and .cse0 (= ~y$r_buff1_thd2~0_In-302493939 |P1Thread1of1ForFork2_#t~ite23_Out-302493939|) (= |P1Thread1of1ForFork2_#t~ite23_Out-302493939| |P1Thread1of1ForFork2_#t~ite24_Out-302493939|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-302493939 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-302493939 256)) (and (= (mod ~y$r_buff1_thd2~0_In-302493939 256) 0) .cse1) (and (= (mod ~y$w_buff1_used~0_In-302493939 256) 0) .cse1)))) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite23_In-302493939| |P1Thread1of1ForFork2_#t~ite23_Out-302493939|) (= ~y$r_buff1_thd2~0_In-302493939 |P1Thread1of1ForFork2_#t~ite24_Out-302493939|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-302493939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-302493939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-302493939, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-302493939|, ~weak$$choice2~0=~weak$$choice2~0_In-302493939, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-302493939} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-302493939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-302493939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-302493939, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-302493939|, ~weak$$choice2~0=~weak$$choice2~0_In-302493939, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-302493939|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-302493939} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 18:35:07,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L771-->L779: Formula: (and (= 0 v_~y$flush_delayed~0_8) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_~y~0_19 v_~y$mem_tmp~0_4) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_4, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_4, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~y~0=v_~y~0_19, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_9|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 18:35:07,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L852-1-->L858: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:35:07,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L858-2-->L858-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite42_Out-613356867| |ULTIMATE.start_main_#t~ite43_Out-613356867|)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-613356867 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-613356867 256)))) (or (and (= ~y~0_In-613356867 |ULTIMATE.start_main_#t~ite42_Out-613356867|) .cse0 (or .cse1 .cse2)) (and (= |ULTIMATE.start_main_#t~ite42_Out-613356867| ~y$w_buff1~0_In-613356867) .cse0 (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-613356867, ~y~0=~y~0_In-613356867, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-613356867, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613356867} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-613356867, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-613356867|, ~y~0=~y~0_In-613356867, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-613356867|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-613356867, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613356867} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:35:07,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L859-->L859-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1982293883 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1982293883 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out1982293883| ~y$w_buff0_used~0_In1982293883)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out1982293883| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1982293883, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1982293883} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1982293883, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1982293883, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1982293883|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:35:07,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L860-->L860-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1115873471 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1115873471 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1115873471 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1115873471 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite45_Out1115873471|)) (and (or .cse1 .cse0) (= ~y$w_buff1_used~0_In1115873471 |ULTIMATE.start_main_#t~ite45_Out1115873471|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1115873471, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1115873471, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1115873471, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1115873471} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1115873471, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1115873471, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1115873471, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1115873471|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1115873471} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:35:07,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L861-->L861-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-343173316 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-343173316 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-343173316| 0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-343173316 |ULTIMATE.start_main_#t~ite46_Out-343173316|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-343173316, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-343173316} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-343173316, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-343173316, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-343173316|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:35:07,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L862-->L862-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1984533797 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1984533797 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In1984533797 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1984533797 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite47_Out1984533797|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In1984533797 |ULTIMATE.start_main_#t~ite47_Out1984533797|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1984533797, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1984533797, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1984533797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1984533797} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1984533797, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1984533797, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1984533797|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1984533797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1984533797} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:35:07,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L862-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 2 v_~__unbuffered_p1_EAX~0_26) (= 2 v_~__unbuffered_p3_EAX~0_24) (= v_~__unbuffered_p1_EBX~0_25 0) (= 0 v_~__unbuffered_p3_EBX~0_24) (= v_~x~0_45 2) (= v_~z~0_103 2))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~y$r_buff1_thd0~0_153 |v_ULTIMATE.start_main_#t~ite47_41|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_25, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_26, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_24, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_41|, ~z~0=v_~z~0_103, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_24, ~x~0=v_~x~0_45} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_25, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_26, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_24, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_40|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~z~0=v_~z~0_103, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_24, ~x~0=v_~x~0_45, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:35:07,538 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:35:07 BasicIcfg [2019-12-07 18:35:07,538 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:35:07,539 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:35:07,539 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:35:07,539 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:35:07,539 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:30:54" (3/4) ... [2019-12-07 18:35:07,541 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:35:07,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] ULTIMATE.startENTRY-->L846: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= v_~__unbuffered_p1_EBX~0_48 0) (= v_~x~0_72 0) (= v_~y$w_buff1_used~0_529 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff1_thd1~0_122 0) (= 0 v_~y$w_buff0~0_386) (= 0 v_~y$r_buff0_thd2~0_330) (= v_~__unbuffered_cnt~0_187 0) (= v_~main$tmp_guard1~0_42 0) (< 0 |v_#StackHeapBarrier_22|) (= v_~y~0_163 0) (= v_~y$read_delayed~0_7 0) (= 0 v_~y$r_buff1_thd3~0_189) (= 0 v_~__unbuffered_p3_EBX~0_48) (= v_~y$w_buff1~0_278 0) (= 0 v_~y$flush_delayed~0_49) (= 0 v_~y$read_delayed_var~0.base_5) (= v_~y$r_buff0_thd1~0_36 0) (= v_~y$w_buff0_used~0_832 0) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t605~0.base_29|) (= (store |v_#length_32| |v_ULTIMATE.start_main_~#t605~0.base_29| 4) |v_#length_31|) (= (select .cse0 |v_ULTIMATE.start_main_~#t605~0.base_29|) 0) (= 0 v_~y$read_delayed_var~0.offset_5) (= 0 v_~y$r_buff1_thd4~0_202) (= v_~a~0_49 0) (= (store |v_#memory_int_30| |v_ULTIMATE.start_main_~#t605~0.base_29| (store (select |v_#memory_int_30| |v_ULTIMATE.start_main_~#t605~0.base_29|) |v_ULTIMATE.start_main_~#t605~0.offset_21| 0)) |v_#memory_int_29|) (= 0 v_~y$r_buff1_thd2~0_315) (= v_~y$r_buff0_thd0~0_117 0) (= 0 |v_#NULL.base_4|) (= (store .cse0 |v_ULTIMATE.start_main_~#t605~0.base_29| 1) |v_#valid_72|) (= 0 v_~weak$$choice0~0_22) (= v_~y$mem_tmp~0_24 0) (= 0 v_~y$r_buff0_thd3~0_225) (= 0 v_~__unbuffered_p1_EAX~0_47) (= 0 v_~__unbuffered_p3_EAX~0_48) (= |v_#NULL.offset_4| 0) (= 0 v_~y$r_buff0_thd4~0_120) (= v_~weak$$choice2~0_186 0) (= v_~y$r_buff1_thd0~0_220 0) (= 0 |v_ULTIMATE.start_main_~#t605~0.offset_21|) (= v_~z~0_163 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_30|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t607~0.base=|v_ULTIMATE.start_main_~#t607~0.base_29|, ULTIMATE.start_main_~#t605~0.offset=|v_ULTIMATE.start_main_~#t605~0.offset_21|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_82|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_49, ~y$mem_tmp~0=v_~y$mem_tmp~0_24, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_189, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_36, ~y$flush_delayed~0=v_~y$flush_delayed~0_49, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_48, #length=|v_#length_31|, ULTIMATE.start_main_~#t607~0.offset=|v_ULTIMATE.start_main_~#t607~0.offset_21|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_29|, ~weak$$choice0~0=v_~weak$$choice0~0_22, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_202, ULTIMATE.start_main_~#t608~0.offset=|v_ULTIMATE.start_main_~#t608~0.offset_16|, ~y$w_buff1~0=v_~y$w_buff1~0_278, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_330, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_187, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_220, ~x~0=v_~x~0_72, ULTIMATE.start_main_~#t605~0.base=|v_ULTIMATE.start_main_~#t605~0.base_29|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_832, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_41|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ULTIMATE.start_main_~#t606~0.offset=|v_ULTIMATE.start_main_~#t606~0.offset_21|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_122, ~y$w_buff0~0=v_~y$w_buff0~0_386, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_225, ULTIMATE.start_main_~#t606~0.base=|v_ULTIMATE.start_main_~#t606~0.base_29|, ~y~0=v_~y~0_163, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_9|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_48, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_48, #NULL.base=|v_#NULL.base_4|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_315, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_120, ULTIMATE.start_main_~#t608~0.base=|v_ULTIMATE.start_main_~#t608~0.base_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_117, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_29|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ~z~0=v_~z~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_186, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_529} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t607~0.base, ULTIMATE.start_main_~#t605~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t607~0.offset, ULTIMATE.start_main_#t~nondet41, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ULTIMATE.start_main_~#t608~0.offset, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t605~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t606~0.offset, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t606~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p1_EBX~0, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_~#t608~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:35:07,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L846-1-->L848: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t606~0.offset_10|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t606~0.base_12|) 0) (not (= |v_ULTIMATE.start_main_~#t606~0.base_12| 0)) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t606~0.base_12| 4) |v_#length_19|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t606~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t606~0.base_12|) |v_ULTIMATE.start_main_~#t606~0.offset_10| 1)) |v_#memory_int_17|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t606~0.base_12| 1)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t606~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t606~0.offset=|v_ULTIMATE.start_main_~#t606~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t606~0.base=|v_ULTIMATE.start_main_~#t606~0.base_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_19|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t606~0.offset, ULTIMATE.start_main_~#t606~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 18:35:07,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-1-->L850: Formula: (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t607~0.base_13| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t607~0.base_13|) |v_ULTIMATE.start_main_~#t607~0.offset_11| 2)) |v_#memory_int_21|) (not (= 0 |v_ULTIMATE.start_main_~#t607~0.base_13|)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t607~0.base_13|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t607~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t607~0.offset_11|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t607~0.base_13|)) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t607~0.base_13| 4) |v_#length_23|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t607~0.base=|v_ULTIMATE.start_main_~#t607~0.base_13|, ULTIMATE.start_main_~#t607~0.offset=|v_ULTIMATE.start_main_~#t607~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_21|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t607~0.base, ULTIMATE.start_main_~#t607~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 18:35:07,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L4-->L800: Formula: (and (= v_~y$r_buff0_thd4~0_25 v_~y$r_buff1_thd4~0_25) (= v_~y$r_buff0_thd3~0_17 1) (= v_~y$r_buff0_thd3~0_18 v_~y$r_buff1_thd3~0_11) (= v_~y$r_buff1_thd1~0_4 v_~y$r_buff0_thd1~0_4) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22 0)) (= v_~y$r_buff0_thd2~0_68 v_~y$r_buff1_thd2~0_32) (= v_~z~0_10 1) (= v_~y$r_buff0_thd0~0_19 v_~y$r_buff1_thd0~0_17)) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_25, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_68, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_4, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_32, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_25, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_25, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_11, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_68, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_4, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22, ~z~0=v_~z~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 18:35:07,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L850-1-->L852: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t608~0.base_10| 4) |v_#length_17|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t608~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t608~0.base_10|) |v_ULTIMATE.start_main_~#t608~0.offset_10| 3)) |v_#memory_int_15|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t608~0.base_10|)) (= |v_ULTIMATE.start_main_~#t608~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t608~0.base_10|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t608~0.base_10|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t608~0.base_10| 1) |v_#valid_38|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_4|, ULTIMATE.start_main_~#t608~0.offset=|v_ULTIMATE.start_main_~#t608~0.offset_10|, ULTIMATE.start_main_~#t608~0.base=|v_ULTIMATE.start_main_~#t608~0.base_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t608~0.offset, ULTIMATE.start_main_~#t608~0.base, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:35:07,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] P0ENTRY-->P0EXIT: Formula: (and (= v_~a~0_23 1) (= v_~x~0_36 1) (= v_~__unbuffered_cnt~0_101 (+ v_~__unbuffered_cnt~0_102 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= v_P0Thread1of1ForFork1_~arg.offset_17 |v_P0Thread1of1ForFork1_#in~arg.offset_19|) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_19| v_P0Thread1of1ForFork1_~arg.base_17)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|} OutVars{~a~0=v_~a~0_23, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|, ~x~0=v_~x~0_36, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_17} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:35:07,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L823-2-->L823-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1082972240 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-1082972240 256)))) (or (and (= |P3Thread1of1ForFork0_#t~ite32_Out-1082972240| ~y~0_In-1082972240) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-1082972240 |P3Thread1of1ForFork0_#t~ite32_Out-1082972240|) (not .cse1) (not .cse0)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1082972240, ~y$w_buff1~0=~y$w_buff1~0_In-1082972240, ~y~0=~y~0_In-1082972240, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1082972240} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1082972240, ~y$w_buff1~0=~y$w_buff1~0_In-1082972240, ~y~0=~y~0_In-1082972240, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-1082972240|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1082972240} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 18:35:07,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L823-4-->L824: Formula: (= v_~y~0_43 |v_P3Thread1of1ForFork0_#t~ite32_12|) InVars {P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_12|} OutVars{~y~0=v_~y~0_43, P3Thread1of1ForFork0_#t~ite33=|v_P3Thread1of1ForFork0_#t~ite33_13|, P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_11|} AuxVars[] AssignedVars[~y~0, P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 18:35:07,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1108669482 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1108669482 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1108669482 |P3Thread1of1ForFork0_#t~ite34_Out-1108669482|)) (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out-1108669482|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1108669482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1108669482} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1108669482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1108669482, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-1108669482|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 18:35:07,546 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In985980656 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In985980656 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In985980656 |P2Thread1of1ForFork3_#t~ite28_Out985980656|)) (and (= 0 |P2Thread1of1ForFork3_#t~ite28_Out985980656|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In985980656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In985980656} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In985980656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In985980656, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out985980656|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 18:35:07,546 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L802-->L802-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-288516922 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-288516922 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-288516922 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-288516922 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out-288516922|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork3_#t~ite29_Out-288516922| ~y$w_buff1_used~0_In-288516922)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-288516922, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-288516922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-288516922, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-288516922} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-288516922, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-288516922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-288516922, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out-288516922|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-288516922} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 18:35:07,546 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L803-->L804: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-575443488 256) 0)) (.cse0 (= ~y$r_buff0_thd3~0_Out-575443488 ~y$r_buff0_thd3~0_In-575443488)) (.cse2 (= (mod ~y$w_buff0_used~0_In-575443488 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (= ~y$r_buff0_thd3~0_Out-575443488 0) (not .cse2)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-575443488, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-575443488} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out-575443488|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-575443488, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-575443488} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:35:07,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L804-->L804-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-991978019 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-991978019 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-991978019 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-991978019 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd3~0_In-991978019 |P2Thread1of1ForFork3_#t~ite31_Out-991978019|)) (and (= 0 |P2Thread1of1ForFork3_#t~ite31_Out-991978019|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-991978019, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-991978019, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991978019, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-991978019} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-991978019, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-991978019, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991978019, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out-991978019|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-991978019} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 18:35:07,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L804-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork3_#t~ite31_38| v_~y$r_buff1_thd3~0_125) (= v_~__unbuffered_cnt~0_126 (+ v_~__unbuffered_cnt~0_127 1)) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 18:35:07,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1423016518 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In1423016518 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1423016518 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd4~0_In1423016518 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1423016518 |P3Thread1of1ForFork0_#t~ite35_Out1423016518|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P3Thread1of1ForFork0_#t~ite35_Out1423016518|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1423016518, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1423016518, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1423016518, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1423016518} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1423016518, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1423016518, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1423016518, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out1423016518|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1423016518} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 18:35:07,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L826-->L826-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In-696570084 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-696570084 256) 0))) (or (and (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out-696570084|) (not .cse1)) (and (= ~y$r_buff0_thd4~0_In-696570084 |P3Thread1of1ForFork0_#t~ite36_Out-696570084|) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-696570084, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-696570084} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-696570084, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-696570084, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-696570084|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 18:35:07,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L827-->L827-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In6878931 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In6878931 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In6878931 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd4~0_In6878931 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork0_#t~ite37_Out6878931|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd4~0_In6878931 |P3Thread1of1ForFork0_#t~ite37_Out6878931|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In6878931, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In6878931, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6878931, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6878931} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In6878931, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In6878931, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6878931, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out6878931|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6878931} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 18:35:07,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L827-2-->P3EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_96 1) v_~__unbuffered_cnt~0_95) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= |v_P3Thread1of1ForFork0_#t~ite37_46| v_~y$r_buff1_thd4~0_61) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_61, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_45|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:35:07,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L764-->L764-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1546547710 256)))) (or (and (= ~y$w_buff0~0_In1546547710 |P1Thread1of1ForFork2_#t~ite8_Out1546547710|) (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1546547710 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In1546547710 256)) (and .cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1546547710 256))) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In1546547710 256))))) (= |P1Thread1of1ForFork2_#t~ite8_Out1546547710| |P1Thread1of1ForFork2_#t~ite9_Out1546547710|) .cse1) (and (= ~y$w_buff0~0_In1546547710 |P1Thread1of1ForFork2_#t~ite9_Out1546547710|) (= |P1Thread1of1ForFork2_#t~ite8_In1546547710| |P1Thread1of1ForFork2_#t~ite8_Out1546547710|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1546547710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1546547710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In1546547710|, ~y$w_buff0~0=~y$w_buff0~0_In1546547710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1546547710, ~weak$$choice2~0=~weak$$choice2~0_In1546547710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1546547710} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1546547710, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1546547710|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1546547710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out1546547710|, ~y$w_buff0~0=~y$w_buff0~0_In1546547710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1546547710, ~weak$$choice2~0=~weak$$choice2~0_In1546547710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1546547710} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:35:07,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-->L766-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1448315462 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1448315462 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In1448315462 256)) .cse0) (and (= (mod ~y$r_buff1_thd2~0_In1448315462 256) 0) .cse0) (= 0 (mod ~y$w_buff0_used~0_In1448315462 256)))) (= |P1Thread1of1ForFork2_#t~ite14_Out1448315462| |P1Thread1of1ForFork2_#t~ite15_Out1448315462|) .cse1 (= ~y$w_buff0_used~0_In1448315462 |P1Thread1of1ForFork2_#t~ite14_Out1448315462|)) (and (= ~y$w_buff0_used~0_In1448315462 |P1Thread1of1ForFork2_#t~ite15_Out1448315462|) (= |P1Thread1of1ForFork2_#t~ite14_In1448315462| |P1Thread1of1ForFork2_#t~ite14_Out1448315462|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1448315462, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1448315462, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1448315462, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In1448315462|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1448315462} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1448315462, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1448315462, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1448315462, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1448315462|, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out1448315462|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1448315462} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:35:07,550 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L768-->L769: Formula: (and (= v_~y$r_buff0_thd2~0_109 v_~y$r_buff0_thd2~0_108) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_13|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_8|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_5|, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 18:35:07,550 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L769-->L769-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-302493939 256)))) (or (and .cse0 (= ~y$r_buff1_thd2~0_In-302493939 |P1Thread1of1ForFork2_#t~ite23_Out-302493939|) (= |P1Thread1of1ForFork2_#t~ite23_Out-302493939| |P1Thread1of1ForFork2_#t~ite24_Out-302493939|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-302493939 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-302493939 256)) (and (= (mod ~y$r_buff1_thd2~0_In-302493939 256) 0) .cse1) (and (= (mod ~y$w_buff1_used~0_In-302493939 256) 0) .cse1)))) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite23_In-302493939| |P1Thread1of1ForFork2_#t~ite23_Out-302493939|) (= ~y$r_buff1_thd2~0_In-302493939 |P1Thread1of1ForFork2_#t~ite24_Out-302493939|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-302493939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-302493939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-302493939, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-302493939|, ~weak$$choice2~0=~weak$$choice2~0_In-302493939, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-302493939} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-302493939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-302493939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-302493939, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-302493939|, ~weak$$choice2~0=~weak$$choice2~0_In-302493939, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-302493939|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-302493939} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 18:35:07,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L771-->L779: Formula: (and (= 0 v_~y$flush_delayed~0_8) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_~y~0_19 v_~y$mem_tmp~0_4) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_4, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_4, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~y~0=v_~y~0_19, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_9|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 18:35:07,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L852-1-->L858: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:35:07,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L858-2-->L858-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite42_Out-613356867| |ULTIMATE.start_main_#t~ite43_Out-613356867|)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-613356867 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-613356867 256)))) (or (and (= ~y~0_In-613356867 |ULTIMATE.start_main_#t~ite42_Out-613356867|) .cse0 (or .cse1 .cse2)) (and (= |ULTIMATE.start_main_#t~ite42_Out-613356867| ~y$w_buff1~0_In-613356867) .cse0 (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-613356867, ~y~0=~y~0_In-613356867, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-613356867, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613356867} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-613356867, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-613356867|, ~y~0=~y~0_In-613356867, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-613356867|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-613356867, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613356867} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:35:07,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L859-->L859-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1982293883 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1982293883 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out1982293883| ~y$w_buff0_used~0_In1982293883)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out1982293883| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1982293883, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1982293883} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1982293883, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1982293883, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1982293883|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:35:07,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L860-->L860-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1115873471 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1115873471 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1115873471 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1115873471 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite45_Out1115873471|)) (and (or .cse1 .cse0) (= ~y$w_buff1_used~0_In1115873471 |ULTIMATE.start_main_#t~ite45_Out1115873471|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1115873471, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1115873471, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1115873471, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1115873471} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1115873471, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1115873471, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1115873471, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1115873471|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1115873471} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:35:07,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L861-->L861-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-343173316 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-343173316 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-343173316| 0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-343173316 |ULTIMATE.start_main_#t~ite46_Out-343173316|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-343173316, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-343173316} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-343173316, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-343173316, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-343173316|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:35:07,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L862-->L862-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1984533797 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1984533797 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In1984533797 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1984533797 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite47_Out1984533797|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In1984533797 |ULTIMATE.start_main_#t~ite47_Out1984533797|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1984533797, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1984533797, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1984533797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1984533797} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1984533797, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1984533797, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1984533797|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1984533797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1984533797} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:35:07,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L862-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 2 v_~__unbuffered_p1_EAX~0_26) (= 2 v_~__unbuffered_p3_EAX~0_24) (= v_~__unbuffered_p1_EBX~0_25 0) (= 0 v_~__unbuffered_p3_EBX~0_24) (= v_~x~0_45 2) (= v_~z~0_103 2))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~y$r_buff1_thd0~0_153 |v_ULTIMATE.start_main_#t~ite47_41|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_25, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_26, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_24, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_41|, ~z~0=v_~z~0_103, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_24, ~x~0=v_~x~0_45} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_25, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_26, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_24, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_40|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~z~0=v_~z~0_103, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_24, ~x~0=v_~x~0_45, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:35:07,607 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4772f5af-7aa3-4204-88b4-8c1fcf9fb842/bin/uautomizer/witness.graphml [2019-12-07 18:35:07,607 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:35:07,608 INFO L168 Benchmark]: Toolchain (without parser) took 254097.50 ms. Allocated memory was 1.0 GB in the beginning and 10.3 GB in the end (delta: 9.3 GB). Free memory was 938.3 MB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 5.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:35:07,608 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:35:07,608 INFO L168 Benchmark]: CACSL2BoogieTranslator took 413.80 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 107.5 MB). Free memory was 938.3 MB in the beginning and 1.1 GB in the end (delta: -131.5 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:35:07,608 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.94 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:35:07,609 INFO L168 Benchmark]: Boogie Preprocessor took 25.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:35:07,609 INFO L168 Benchmark]: RCFGBuilder took 412.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:35:07,609 INFO L168 Benchmark]: TraceAbstraction took 253136.70 ms. Allocated memory was 1.1 GB in the beginning and 10.3 GB in the end (delta: 9.2 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 5.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:35:07,609 INFO L168 Benchmark]: Witness Printer took 68.16 ms. Allocated memory is still 10.3 GB. Free memory was 5.0 GB in the beginning and 5.0 GB in the end (delta: 11.4 MB). Peak memory consumption was 11.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:35:07,611 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 413.80 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 107.5 MB). Free memory was 938.3 MB in the beginning and 1.1 GB in the end (delta: -131.5 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.94 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 412.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 253136.70 ms. Allocated memory was 1.1 GB in the beginning and 10.3 GB in the end (delta: 9.2 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 5.3 GB. Max. memory is 11.5 GB. * Witness Printer took 68.16 ms. Allocated memory is still 10.3 GB. Free memory was 5.0 GB in the beginning and 5.0 GB in the end (delta: 11.4 MB). Peak memory consumption was 11.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 181 ProgramPointsBefore, 88 ProgramPointsAfterwards, 209 TransitionsBefore, 95 TransitionsAfterwards, 18126 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 26 ChoiceCompositions, 7917 VarBasedMoverChecksPositive, 267 VarBasedMoverChecksNegative, 87 SemBasedMoverChecksPositive, 235 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 66461 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L846] FCALL, FORK 0 pthread_create(&t605, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L848] FCALL, FORK 0 pthread_create(&t606, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L850] FCALL, FORK 0 pthread_create(&t607, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 3 y$w_buff1 = y$w_buff0 [L785] 3 y$w_buff0 = 1 [L786] 3 y$w_buff1_used = y$w_buff0_used [L787] 3 y$w_buff0_used = (_Bool)1 [L800] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L852] FCALL, FORK 0 pthread_create(&t608, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] 4 z = 2 [L817] 4 __unbuffered_p3_EAX = z [L820] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L823] 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 2 x = 2 [L756] 2 __unbuffered_p1_EAX = x [L759] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L760] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L761] 2 y$flush_delayed = weak$$choice2 [L762] 2 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L763] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L763] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L801] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L802] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L824] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L825] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L826] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L764] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L765] EXPR 2 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L765] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L766] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L767] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L767] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L769] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L770] 2 __unbuffered_p1_EBX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L858] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L858] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L859] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L860] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L861] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 252.9s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 63.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6605 SDtfs, 8224 SDslu, 22417 SDs, 0 SdLazy, 13936 SolverSat, 450 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 382 GetRequests, 41 SyntacticMatches, 12 SemanticMatches, 329 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2388 ImplicationChecksByTransitivity, 4.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=316586occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 153.0s AutomataMinimizationTime, 31 MinimizatonAttempts, 563576 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1185 NumberOfCodeBlocks, 1185 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 1095 ConstructedInterpolants, 0 QuantifiedInterpolants, 313869 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...