./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix023_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix023_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8d64b9f51ebf43b029655496866150654538a02b ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:58:18,397 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:58:18,399 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:58:18,406 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:58:18,406 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:58:18,407 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:58:18,408 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:58:18,409 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:58:18,410 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:58:18,411 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:58:18,412 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:58:18,412 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:58:18,413 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:58:18,413 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:58:18,414 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:58:18,415 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:58:18,415 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:58:18,416 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:58:18,417 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:58:18,418 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:58:18,419 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:58:18,420 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:58:18,421 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:58:18,421 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:58:18,423 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:58:18,423 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:58:18,423 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:58:18,424 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:58:18,424 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:58:18,425 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:58:18,425 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:58:18,425 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:58:18,426 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:58:18,426 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:58:18,427 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:58:18,427 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:58:18,427 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:58:18,427 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:58:18,427 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:58:18,428 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:58:18,428 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:58:18,429 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:58:18,438 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:58:18,438 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:58:18,438 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:58:18,439 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:58:18,439 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:58:18,439 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:58:18,439 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:58:18,439 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:58:18,439 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:58:18,439 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:58:18,439 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:58:18,440 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:58:18,440 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:58:18,441 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:58:18,441 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:58:18,441 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:58:18,441 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:58:18,441 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:58:18,441 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:58:18,441 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:58:18,441 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:58:18,441 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8d64b9f51ebf43b029655496866150654538a02b [2019-12-07 18:58:18,540 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:58:18,550 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:58:18,552 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:58:18,553 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:58:18,554 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:58:18,554 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix023_rmo.opt.i [2019-12-07 18:58:18,597 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/data/a8f4afba5/c7881e5572564b839b3cf2db0e6ac727/FLAGd7e5ba9ba [2019-12-07 18:58:19,056 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:58:19,056 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/sv-benchmarks/c/pthread-wmm/mix023_rmo.opt.i [2019-12-07 18:58:19,066 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/data/a8f4afba5/c7881e5572564b839b3cf2db0e6ac727/FLAGd7e5ba9ba [2019-12-07 18:58:19,076 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/data/a8f4afba5/c7881e5572564b839b3cf2db0e6ac727 [2019-12-07 18:58:19,077 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:58:19,078 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:58:19,079 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:58:19,079 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:58:19,081 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:58:19,082 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,084 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19, skipping insertion in model container [2019-12-07 18:58:19,084 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,088 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:58:19,118 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:58:19,362 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:58:19,370 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:58:19,427 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:58:19,479 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:58:19,479 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19 WrapperNode [2019-12-07 18:58:19,480 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:58:19,480 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:58:19,480 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:58:19,480 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:58:19,486 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,504 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,529 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:58:19,529 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:58:19,529 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:58:19,529 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:58:19,536 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,536 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,539 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,539 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,546 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,549 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,552 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... [2019-12-07 18:58:19,555 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:58:19,555 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:58:19,555 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:58:19,555 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:58:19,556 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:58:19,600 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:58:19,600 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:58:19,600 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:58:19,601 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:58:19,601 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:58:19,601 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:58:19,601 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:58:19,601 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:58:19,601 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:58:19,601 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:58:19,601 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 18:58:19,601 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 18:58:19,602 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:58:19,602 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:58:19,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:58:19,603 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:58:19,964 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:58:19,965 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:58:19,965 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:58:19 BoogieIcfgContainer [2019-12-07 18:58:19,966 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:58:19,966 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:58:19,967 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:58:19,968 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:58:19,969 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:58:19" (1/3) ... [2019-12-07 18:58:19,969 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@131815a0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:58:19, skipping insertion in model container [2019-12-07 18:58:19,969 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:58:19" (2/3) ... [2019-12-07 18:58:19,969 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@131815a0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:58:19, skipping insertion in model container [2019-12-07 18:58:19,970 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:58:19" (3/3) ... [2019-12-07 18:58:19,971 INFO L109 eAbstractionObserver]: Analyzing ICFG mix023_rmo.opt.i [2019-12-07 18:58:19,978 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:58:19,978 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:58:19,983 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:58:19,984 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:58:20,013 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,013 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,013 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,013 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,014 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,014 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,014 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,015 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,015 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,021 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,021 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,021 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,021 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,021 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,021 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,021 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,021 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,022 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,027 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,027 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,027 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,027 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,027 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,027 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,028 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,028 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,029 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,029 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,029 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,029 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,029 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,033 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,033 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,033 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,033 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,033 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,033 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,033 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,034 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,035 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,036 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,036 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,036 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,036 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:58:20,048 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 18:58:20,061 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:58:20,061 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:58:20,061 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:58:20,061 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:58:20,061 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:58:20,061 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:58:20,061 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:58:20,061 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:58:20,074 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 18:58:20,075 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 18:58:20,141 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 18:58:20,141 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:58:20,151 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 707 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:58:20,166 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 18:58:20,206 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 18:58:20,206 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:58:20,212 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 707 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 18:58:20,227 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18126 [2019-12-07 18:58:20,228 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:58:23,305 WARN L192 SmtUtils]: Spent 178.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 18:58:23,619 WARN L192 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 54 [2019-12-07 18:58:23,641 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66461 [2019-12-07 18:58:23,641 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 18:58:23,643 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 88 places, 95 transitions [2019-12-07 18:58:50,342 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 160898 states. [2019-12-07 18:58:50,343 INFO L276 IsEmpty]: Start isEmpty. Operand 160898 states. [2019-12-07 18:58:50,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 18:58:50,348 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:58:50,348 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:58:50,348 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:58:50,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:58:50,352 INFO L82 PathProgramCache]: Analyzing trace with hash 406431864, now seen corresponding path program 1 times [2019-12-07 18:58:50,357 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:58:50,357 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2061689979] [2019-12-07 18:58:50,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:58:50,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:58:50,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:58:50,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2061689979] [2019-12-07 18:58:50,516 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:58:50,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:58:50,517 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211088417] [2019-12-07 18:58:50,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:58:50,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:58:50,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:58:50,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:58:50,530 INFO L87 Difference]: Start difference. First operand 160898 states. Second operand 3 states. [2019-12-07 18:58:51,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:58:51,689 INFO L93 Difference]: Finished difference Result 158998 states and 767616 transitions. [2019-12-07 18:58:51,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:58:51,691 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 18:58:51,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:58:52,375 INFO L225 Difference]: With dead ends: 158998 [2019-12-07 18:58:52,375 INFO L226 Difference]: Without dead ends: 149254 [2019-12-07 18:58:52,376 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:58:58,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149254 states. [2019-12-07 18:59:00,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149254 to 149254. [2019-12-07 18:59:00,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149254 states. [2019-12-07 18:59:01,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149254 states to 149254 states and 719596 transitions. [2019-12-07 18:59:01,488 INFO L78 Accepts]: Start accepts. Automaton has 149254 states and 719596 transitions. Word has length 7 [2019-12-07 18:59:01,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:01,489 INFO L462 AbstractCegarLoop]: Abstraction has 149254 states and 719596 transitions. [2019-12-07 18:59:01,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:59:01,489 INFO L276 IsEmpty]: Start isEmpty. Operand 149254 states and 719596 transitions. [2019-12-07 18:59:01,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:59:01,497 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:01,497 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:01,497 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:01,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:01,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1843730986, now seen corresponding path program 1 times [2019-12-07 18:59:01,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:01,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144321379] [2019-12-07 18:59:01,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:01,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:01,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:01,559 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144321379] [2019-12-07 18:59:01,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:01,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:59:01,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2088680008] [2019-12-07 18:59:01,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:59:01,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:01,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:59:01,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:59:01,561 INFO L87 Difference]: Start difference. First operand 149254 states and 719596 transitions. Second operand 4 states. [2019-12-07 18:59:05,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:05,180 INFO L93 Difference]: Finished difference Result 235642 states and 1091274 transitions. [2019-12-07 18:59:05,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:59:05,181 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:59:05,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:05,886 INFO L225 Difference]: With dead ends: 235642 [2019-12-07 18:59:05,886 INFO L226 Difference]: Without dead ends: 235446 [2019-12-07 18:59:05,887 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:59:11,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235446 states. [2019-12-07 18:59:15,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235446 to 217254. [2019-12-07 18:59:15,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217254 states. [2019-12-07 18:59:16,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217254 states to 217254 states and 1015894 transitions. [2019-12-07 18:59:16,306 INFO L78 Accepts]: Start accepts. Automaton has 217254 states and 1015894 transitions. Word has length 15 [2019-12-07 18:59:16,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:16,306 INFO L462 AbstractCegarLoop]: Abstraction has 217254 states and 1015894 transitions. [2019-12-07 18:59:16,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:59:16,307 INFO L276 IsEmpty]: Start isEmpty. Operand 217254 states and 1015894 transitions. [2019-12-07 18:59:16,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 18:59:16,310 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:16,310 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:16,310 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:16,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:16,310 INFO L82 PathProgramCache]: Analyzing trace with hash -425966823, now seen corresponding path program 1 times [2019-12-07 18:59:16,311 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:16,311 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648013803] [2019-12-07 18:59:16,311 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:16,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:16,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:16,358 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648013803] [2019-12-07 18:59:16,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:16,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:59:16,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1876748354] [2019-12-07 18:59:16,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:59:16,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:16,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:59:16,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:59:16,359 INFO L87 Difference]: Start difference. First operand 217254 states and 1015894 transitions. Second operand 4 states. [2019-12-07 18:59:18,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:18,036 INFO L93 Difference]: Finished difference Result 302250 states and 1385570 transitions. [2019-12-07 18:59:18,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:59:18,037 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 18:59:18,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:22,402 INFO L225 Difference]: With dead ends: 302250 [2019-12-07 18:59:22,402 INFO L226 Difference]: Without dead ends: 302026 [2019-12-07 18:59:22,402 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:59:29,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302026 states. [2019-12-07 18:59:33,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 302026 to 256602. [2019-12-07 18:59:33,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256602 states. [2019-12-07 18:59:34,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256602 states to 256602 states and 1193810 transitions. [2019-12-07 18:59:34,625 INFO L78 Accepts]: Start accepts. Automaton has 256602 states and 1193810 transitions. Word has length 15 [2019-12-07 18:59:34,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:34,625 INFO L462 AbstractCegarLoop]: Abstraction has 256602 states and 1193810 transitions. [2019-12-07 18:59:34,625 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:59:34,625 INFO L276 IsEmpty]: Start isEmpty. Operand 256602 states and 1193810 transitions. [2019-12-07 18:59:34,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:59:34,630 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:34,630 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:34,630 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:34,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:34,630 INFO L82 PathProgramCache]: Analyzing trace with hash 1700714978, now seen corresponding path program 1 times [2019-12-07 18:59:34,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:34,631 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861818414] [2019-12-07 18:59:34,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:34,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:34,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:34,678 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861818414] [2019-12-07 18:59:34,678 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:34,678 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:59:34,678 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168473204] [2019-12-07 18:59:34,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:59:34,679 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:34,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:59:34,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:59:34,679 INFO L87 Difference]: Start difference. First operand 256602 states and 1193810 transitions. Second operand 5 states. [2019-12-07 18:59:37,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:37,143 INFO L93 Difference]: Finished difference Result 353982 states and 1618512 transitions. [2019-12-07 18:59:37,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:59:37,144 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:59:37,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:38,180 INFO L225 Difference]: With dead ends: 353982 [2019-12-07 18:59:38,180 INFO L226 Difference]: Without dead ends: 353678 [2019-12-07 18:59:38,181 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:59:49,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353678 states. [2019-12-07 18:59:54,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353678 to 284780. [2019-12-07 18:59:54,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284780 states. [2019-12-07 18:59:55,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284780 states to 284780 states and 1322007 transitions. [2019-12-07 18:59:55,766 INFO L78 Accepts]: Start accepts. Automaton has 284780 states and 1322007 transitions. Word has length 16 [2019-12-07 18:59:55,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:59:55,767 INFO L462 AbstractCegarLoop]: Abstraction has 284780 states and 1322007 transitions. [2019-12-07 18:59:55,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:59:55,767 INFO L276 IsEmpty]: Start isEmpty. Operand 284780 states and 1322007 transitions. [2019-12-07 18:59:55,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:59:55,786 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:59:55,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:59:55,786 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:59:55,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:59:55,787 INFO L82 PathProgramCache]: Analyzing trace with hash 464670534, now seen corresponding path program 1 times [2019-12-07 18:59:55,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:59:55,787 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141794856] [2019-12-07 18:59:55,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:59:55,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:59:55,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:59:55,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141794856] [2019-12-07 18:59:55,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:59:55,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:59:55,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281052335] [2019-12-07 18:59:55,837 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:59:55,837 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:59:55,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:59:55,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:59:55,838 INFO L87 Difference]: Start difference. First operand 284780 states and 1322007 transitions. Second operand 3 states. [2019-12-07 18:59:57,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:59:57,822 INFO L93 Difference]: Finished difference Result 284780 states and 1310815 transitions. [2019-12-07 18:59:57,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:59:57,823 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 18:59:57,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:59:58,620 INFO L225 Difference]: With dead ends: 284780 [2019-12-07 18:59:58,620 INFO L226 Difference]: Without dead ends: 284780 [2019-12-07 18:59:58,621 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:00:08,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284780 states. [2019-12-07 19:00:12,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284780 to 280540. [2019-12-07 19:00:12,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280540 states. [2019-12-07 19:00:14,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280540 states to 280540 states and 1292559 transitions. [2019-12-07 19:00:14,049 INFO L78 Accepts]: Start accepts. Automaton has 280540 states and 1292559 transitions. Word has length 20 [2019-12-07 19:00:14,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:14,050 INFO L462 AbstractCegarLoop]: Abstraction has 280540 states and 1292559 transitions. [2019-12-07 19:00:14,050 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:00:14,050 INFO L276 IsEmpty]: Start isEmpty. Operand 280540 states and 1292559 transitions. [2019-12-07 19:00:14,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 19:00:14,065 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:14,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:14,066 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:14,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:14,066 INFO L82 PathProgramCache]: Analyzing trace with hash -9773484, now seen corresponding path program 1 times [2019-12-07 19:00:14,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:14,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067483223] [2019-12-07 19:00:14,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:14,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:14,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:14,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1067483223] [2019-12-07 19:00:14,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:14,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:00:14,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1876371922] [2019-12-07 19:00:14,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:00:14,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:14,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:00:14,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:00:14,129 INFO L87 Difference]: Start difference. First operand 280540 states and 1292559 transitions. Second operand 3 states. [2019-12-07 19:00:17,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:17,254 INFO L93 Difference]: Finished difference Result 529642 states and 2410098 transitions. [2019-12-07 19:00:17,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:00:17,254 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 19:00:17,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:19,224 INFO L225 Difference]: With dead ends: 529642 [2019-12-07 19:00:19,224 INFO L226 Difference]: Without dead ends: 511618 [2019-12-07 19:00:19,224 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:00:32,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 511618 states. [2019-12-07 19:00:40,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 511618 to 490088. [2019-12-07 19:00:40,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 490088 states. [2019-12-07 19:00:43,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490088 states to 490088 states and 2241089 transitions. [2019-12-07 19:00:43,051 INFO L78 Accepts]: Start accepts. Automaton has 490088 states and 2241089 transitions. Word has length 20 [2019-12-07 19:00:43,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:00:43,051 INFO L462 AbstractCegarLoop]: Abstraction has 490088 states and 2241089 transitions. [2019-12-07 19:00:43,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:00:43,051 INFO L276 IsEmpty]: Start isEmpty. Operand 490088 states and 2241089 transitions. [2019-12-07 19:00:43,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 19:00:43,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:00:43,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:00:43,093 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:00:43,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:00:43,093 INFO L82 PathProgramCache]: Analyzing trace with hash 1422015407, now seen corresponding path program 1 times [2019-12-07 19:00:43,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:00:43,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424446539] [2019-12-07 19:00:43,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:00:43,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:00:43,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:00:43,157 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1424446539] [2019-12-07 19:00:43,157 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:00:43,158 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:00:43,158 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1898169277] [2019-12-07 19:00:43,158 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:00:43,158 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:00:43,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:00:43,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:00:43,158 INFO L87 Difference]: Start difference. First operand 490088 states and 2241089 transitions. Second operand 4 states. [2019-12-07 19:00:46,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:00:46,266 INFO L93 Difference]: Finished difference Result 509893 states and 2311278 transitions. [2019-12-07 19:00:51,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:00:51,964 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 19:00:51,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:00:53,418 INFO L225 Difference]: With dead ends: 509893 [2019-12-07 19:00:53,418 INFO L226 Difference]: Without dead ends: 509893 [2019-12-07 19:00:53,418 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:01:02,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 509893 states. [2019-12-07 19:01:10,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 509893 to 488464. [2019-12-07 19:01:10,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 488464 states. [2019-12-07 19:01:13,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 488464 states to 488464 states and 2234436 transitions. [2019-12-07 19:01:13,256 INFO L78 Accepts]: Start accepts. Automaton has 488464 states and 2234436 transitions. Word has length 21 [2019-12-07 19:01:13,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:01:13,256 INFO L462 AbstractCegarLoop]: Abstraction has 488464 states and 2234436 transitions. [2019-12-07 19:01:13,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:01:13,257 INFO L276 IsEmpty]: Start isEmpty. Operand 488464 states and 2234436 transitions. [2019-12-07 19:01:13,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 19:01:13,299 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:13,299 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:01:13,300 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:13,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:13,300 INFO L82 PathProgramCache]: Analyzing trace with hash -187501387, now seen corresponding path program 1 times [2019-12-07 19:01:13,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:13,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933882094] [2019-12-07 19:01:13,300 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:13,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:13,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:13,344 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1933882094] [2019-12-07 19:01:13,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:13,345 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:01:13,345 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082957634] [2019-12-07 19:01:13,345 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:01:13,345 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:13,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:01:13,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:01:13,346 INFO L87 Difference]: Start difference. First operand 488464 states and 2234436 transitions. Second operand 5 states. [2019-12-07 19:01:22,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:22,785 INFO L93 Difference]: Finished difference Result 652659 states and 2934412 transitions. [2019-12-07 19:01:22,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:01:22,786 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 19:01:22,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:24,666 INFO L225 Difference]: With dead ends: 652659 [2019-12-07 19:01:24,666 INFO L226 Difference]: Without dead ends: 651783 [2019-12-07 19:01:24,667 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:01:35,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651783 states. [2019-12-07 19:01:44,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651783 to 508969. [2019-12-07 19:01:44,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 508969 states. [2019-12-07 19:01:47,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 508969 states to 508969 states and 2323922 transitions. [2019-12-07 19:01:47,279 INFO L78 Accepts]: Start accepts. Automaton has 508969 states and 2323922 transitions. Word has length 21 [2019-12-07 19:01:47,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:01:47,279 INFO L462 AbstractCegarLoop]: Abstraction has 508969 states and 2323922 transitions. [2019-12-07 19:01:47,279 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:01:47,279 INFO L276 IsEmpty]: Start isEmpty. Operand 508969 states and 2323922 transitions. [2019-12-07 19:01:47,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 19:01:47,316 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:47,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:01:47,317 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:47,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:47,317 INFO L82 PathProgramCache]: Analyzing trace with hash 1400888333, now seen corresponding path program 1 times [2019-12-07 19:01:47,317 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:47,317 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922847049] [2019-12-07 19:01:47,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:47,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:47,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:47,372 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922847049] [2019-12-07 19:01:47,372 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:47,372 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:01:47,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [20269153] [2019-12-07 19:01:47,373 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:01:47,373 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:47,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:01:47,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:01:47,374 INFO L87 Difference]: Start difference. First operand 508969 states and 2323922 transitions. Second operand 4 states. [2019-12-07 19:01:50,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:50,803 INFO L93 Difference]: Finished difference Result 529908 states and 2398741 transitions. [2019-12-07 19:01:50,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:01:50,804 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 19:01:50,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:58,106 INFO L225 Difference]: With dead ends: 529908 [2019-12-07 19:01:58,106 INFO L226 Difference]: Without dead ends: 529908 [2019-12-07 19:01:58,106 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:07,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529908 states. [2019-12-07 19:02:15,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529908 to 505802. [2019-12-07 19:02:15,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 505802 states. [2019-12-07 19:02:18,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 505802 states to 505802 states and 2308578 transitions. [2019-12-07 19:02:18,029 INFO L78 Accepts]: Start accepts. Automaton has 505802 states and 2308578 transitions. Word has length 21 [2019-12-07 19:02:18,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:18,029 INFO L462 AbstractCegarLoop]: Abstraction has 505802 states and 2308578 transitions. [2019-12-07 19:02:18,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:18,029 INFO L276 IsEmpty]: Start isEmpty. Operand 505802 states and 2308578 transitions. [2019-12-07 19:02:18,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:02:18,067 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:18,068 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:18,068 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:18,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:18,068 INFO L82 PathProgramCache]: Analyzing trace with hash -706870391, now seen corresponding path program 1 times [2019-12-07 19:02:18,068 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:18,068 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456772473] [2019-12-07 19:02:18,068 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:18,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:18,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:18,116 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456772473] [2019-12-07 19:02:18,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:18,116 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:18,116 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1654065933] [2019-12-07 19:02:18,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:02:18,117 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:18,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:02:18,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:18,117 INFO L87 Difference]: Start difference. First operand 505802 states and 2308578 transitions. Second operand 4 states. [2019-12-07 19:02:21,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:21,814 INFO L93 Difference]: Finished difference Result 526468 states and 2382958 transitions. [2019-12-07 19:02:21,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:02:21,815 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 19:02:21,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:23,330 INFO L225 Difference]: With dead ends: 526468 [2019-12-07 19:02:23,330 INFO L226 Difference]: Without dead ends: 526468 [2019-12-07 19:02:23,330 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:37,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 526468 states. [2019-12-07 19:02:46,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 526468 to 502176. [2019-12-07 19:02:46,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 502176 states. [2019-12-07 19:02:48,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 502176 states to 502176 states and 2294618 transitions. [2019-12-07 19:02:48,613 INFO L78 Accepts]: Start accepts. Automaton has 502176 states and 2294618 transitions. Word has length 22 [2019-12-07 19:02:48,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:48,613 INFO L462 AbstractCegarLoop]: Abstraction has 502176 states and 2294618 transitions. [2019-12-07 19:02:48,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:48,613 INFO L276 IsEmpty]: Start isEmpty. Operand 502176 states and 2294618 transitions. [2019-12-07 19:02:48,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:02:48,656 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:48,656 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:48,656 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:48,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:48,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1458296302, now seen corresponding path program 1 times [2019-12-07 19:02:48,657 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:48,657 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1348593495] [2019-12-07 19:02:48,657 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:48,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:48,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:48,687 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1348593495] [2019-12-07 19:02:48,688 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:48,688 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:48,688 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2096641223] [2019-12-07 19:02:48,688 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:02:48,688 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:48,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:02:48,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:48,688 INFO L87 Difference]: Start difference. First operand 502176 states and 2294618 transitions. Second operand 3 states. [2019-12-07 19:02:50,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:50,601 INFO L93 Difference]: Finished difference Result 312533 states and 1287488 transitions. [2019-12-07 19:02:50,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:02:50,602 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2019-12-07 19:02:50,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:51,401 INFO L225 Difference]: With dead ends: 312533 [2019-12-07 19:02:51,402 INFO L226 Difference]: Without dead ends: 312533 [2019-12-07 19:02:51,402 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:56,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312533 states. [2019-12-07 19:03:05,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312533 to 312533. [2019-12-07 19:03:05,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 312533 states. [2019-12-07 19:03:06,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312533 states to 312533 states and 1287488 transitions. [2019-12-07 19:03:06,488 INFO L78 Accepts]: Start accepts. Automaton has 312533 states and 1287488 transitions. Word has length 22 [2019-12-07 19:03:06,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:06,488 INFO L462 AbstractCegarLoop]: Abstraction has 312533 states and 1287488 transitions. [2019-12-07 19:03:06,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:03:06,488 INFO L276 IsEmpty]: Start isEmpty. Operand 312533 states and 1287488 transitions. [2019-12-07 19:03:06,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 19:03:06,516 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:06,516 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:06,516 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:06,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:06,516 INFO L82 PathProgramCache]: Analyzing trace with hash 1920659990, now seen corresponding path program 1 times [2019-12-07 19:03:06,517 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:06,517 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526941511] [2019-12-07 19:03:06,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:06,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:06,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:06,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526941511] [2019-12-07 19:03:06,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:06,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:03:06,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925057162] [2019-12-07 19:03:06,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:03:06,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:06,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:03:06,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:06,563 INFO L87 Difference]: Start difference. First operand 312533 states and 1287488 transitions. Second operand 4 states. [2019-12-07 19:03:08,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:08,967 INFO L93 Difference]: Finished difference Result 414603 states and 1699785 transitions. [2019-12-07 19:03:08,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:03:08,967 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 19:03:08,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:10,033 INFO L225 Difference]: With dead ends: 414603 [2019-12-07 19:03:10,033 INFO L226 Difference]: Without dead ends: 403531 [2019-12-07 19:03:10,033 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:03:16,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403531 states. [2019-12-07 19:03:21,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403531 to 297856. [2019-12-07 19:03:21,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297856 states. [2019-12-07 19:03:21,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297856 states to 297856 states and 1225388 transitions. [2019-12-07 19:03:21,940 INFO L78 Accepts]: Start accepts. Automaton has 297856 states and 1225388 transitions. Word has length 23 [2019-12-07 19:03:21,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:21,940 INFO L462 AbstractCegarLoop]: Abstraction has 297856 states and 1225388 transitions. [2019-12-07 19:03:21,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:03:21,941 INFO L276 IsEmpty]: Start isEmpty. Operand 297856 states and 1225388 transitions. [2019-12-07 19:03:21,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 19:03:21,967 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:21,967 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:21,967 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:21,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:21,967 INFO L82 PathProgramCache]: Analyzing trace with hash -918478820, now seen corresponding path program 2 times [2019-12-07 19:03:21,967 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:21,968 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638275750] [2019-12-07 19:03:21,968 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:21,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:22,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:22,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638275750] [2019-12-07 19:03:22,022 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:22,022 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:03:22,022 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1146108879] [2019-12-07 19:03:22,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:03:22,022 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:22,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:03:22,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:03:22,023 INFO L87 Difference]: Start difference. First operand 297856 states and 1225388 transitions. Second operand 5 states. [2019-12-07 19:03:28,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:28,578 INFO L93 Difference]: Finished difference Result 533451 states and 2180126 transitions. [2019-12-07 19:03:28,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:03:28,579 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2019-12-07 19:03:28,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:29,428 INFO L225 Difference]: With dead ends: 533451 [2019-12-07 19:03:29,428 INFO L226 Difference]: Without dead ends: 328900 [2019-12-07 19:03:29,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:03:34,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328900 states. [2019-12-07 19:03:39,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328900 to 302783. [2019-12-07 19:03:39,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302783 states. [2019-12-07 19:03:40,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302783 states to 302783 states and 1230609 transitions. [2019-12-07 19:03:40,463 INFO L78 Accepts]: Start accepts. Automaton has 302783 states and 1230609 transitions. Word has length 23 [2019-12-07 19:03:40,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:40,463 INFO L462 AbstractCegarLoop]: Abstraction has 302783 states and 1230609 transitions. [2019-12-07 19:03:40,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:03:40,463 INFO L276 IsEmpty]: Start isEmpty. Operand 302783 states and 1230609 transitions. [2019-12-07 19:03:40,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 19:03:40,493 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:40,494 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:40,494 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:40,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:40,494 INFO L82 PathProgramCache]: Analyzing trace with hash -1356444054, now seen corresponding path program 3 times [2019-12-07 19:03:40,494 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:40,494 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247459140] [2019-12-07 19:03:40,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:40,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:40,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:40,524 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247459140] [2019-12-07 19:03:40,524 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:40,524 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:03:40,525 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1741400001] [2019-12-07 19:03:40,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:03:40,525 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:40,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:03:40,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:40,525 INFO L87 Difference]: Start difference. First operand 302783 states and 1230609 transitions. Second operand 4 states. [2019-12-07 19:03:40,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:40,768 INFO L93 Difference]: Finished difference Result 73356 states and 253507 transitions. [2019-12-07 19:03:40,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:03:40,768 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 19:03:40,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:40,880 INFO L225 Difference]: With dead ends: 73356 [2019-12-07 19:03:40,880 INFO L226 Difference]: Without dead ends: 73356 [2019-12-07 19:03:40,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:41,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73356 states. [2019-12-07 19:03:42,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73356 to 72564. [2019-12-07 19:03:42,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72564 states. [2019-12-07 19:03:42,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72564 states to 72564 states and 250009 transitions. [2019-12-07 19:03:42,489 INFO L78 Accepts]: Start accepts. Automaton has 72564 states and 250009 transitions. Word has length 23 [2019-12-07 19:03:42,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:42,489 INFO L462 AbstractCegarLoop]: Abstraction has 72564 states and 250009 transitions. [2019-12-07 19:03:42,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:03:42,489 INFO L276 IsEmpty]: Start isEmpty. Operand 72564 states and 250009 transitions. [2019-12-07 19:03:42,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 19:03:42,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:42,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:42,501 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:42,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:42,501 INFO L82 PathProgramCache]: Analyzing trace with hash -1135187325, now seen corresponding path program 1 times [2019-12-07 19:03:42,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:42,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465921976] [2019-12-07 19:03:42,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:42,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:42,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:42,542 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1465921976] [2019-12-07 19:03:42,542 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:42,542 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:03:42,543 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142418291] [2019-12-07 19:03:42,543 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:03:42,543 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:42,543 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:03:42,543 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:03:42,543 INFO L87 Difference]: Start difference. First operand 72564 states and 250009 transitions. Second operand 6 states. [2019-12-07 19:03:43,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:43,233 INFO L93 Difference]: Finished difference Result 105708 states and 353380 transitions. [2019-12-07 19:03:43,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:03:43,234 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2019-12-07 19:03:43,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:43,418 INFO L225 Difference]: With dead ends: 105708 [2019-12-07 19:03:43,418 INFO L226 Difference]: Without dead ends: 105470 [2019-12-07 19:03:43,418 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:03:43,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105470 states. [2019-12-07 19:03:45,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105470 to 79165. [2019-12-07 19:03:45,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79165 states. [2019-12-07 19:03:45,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79165 states to 79165 states and 270919 transitions. [2019-12-07 19:03:45,364 INFO L78 Accepts]: Start accepts. Automaton has 79165 states and 270919 transitions. Word has length 24 [2019-12-07 19:03:45,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:45,364 INFO L462 AbstractCegarLoop]: Abstraction has 79165 states and 270919 transitions. [2019-12-07 19:03:45,365 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:03:45,365 INFO L276 IsEmpty]: Start isEmpty. Operand 79165 states and 270919 transitions. [2019-12-07 19:03:45,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 19:03:45,400 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:45,401 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:45,401 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:45,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:45,401 INFO L82 PathProgramCache]: Analyzing trace with hash -1952630071, now seen corresponding path program 1 times [2019-12-07 19:03:45,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:45,401 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240399203] [2019-12-07 19:03:45,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:45,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:45,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:45,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240399203] [2019-12-07 19:03:45,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:45,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:03:45,439 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569757770] [2019-12-07 19:03:45,440 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:03:45,440 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:45,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:03:45,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:03:45,440 INFO L87 Difference]: Start difference. First operand 79165 states and 270919 transitions. Second operand 6 states. [2019-12-07 19:03:46,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:46,036 INFO L93 Difference]: Finished difference Result 104812 states and 350551 transitions. [2019-12-07 19:03:46,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 19:03:46,037 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 19:03:46,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:46,228 INFO L225 Difference]: With dead ends: 104812 [2019-12-07 19:03:46,228 INFO L226 Difference]: Without dead ends: 104061 [2019-12-07 19:03:46,228 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:03:46,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104061 states. [2019-12-07 19:03:47,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104061 to 81869. [2019-12-07 19:03:47,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81869 states. [2019-12-07 19:03:47,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81869 states to 81869 states and 279799 transitions. [2019-12-07 19:03:47,818 INFO L78 Accepts]: Start accepts. Automaton has 81869 states and 279799 transitions. Word has length 31 [2019-12-07 19:03:47,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:47,818 INFO L462 AbstractCegarLoop]: Abstraction has 81869 states and 279799 transitions. [2019-12-07 19:03:47,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:03:47,818 INFO L276 IsEmpty]: Start isEmpty. Operand 81869 states and 279799 transitions. [2019-12-07 19:03:47,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 19:03:47,863 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:47,863 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:47,863 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:47,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:47,863 INFO L82 PathProgramCache]: Analyzing trace with hash -880573690, now seen corresponding path program 1 times [2019-12-07 19:03:47,863 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:47,863 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843302] [2019-12-07 19:03:47,863 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:47,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:47,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:47,927 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843302] [2019-12-07 19:03:47,927 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:47,927 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:03:47,928 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1724889472] [2019-12-07 19:03:47,928 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:03:47,928 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:47,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:03:47,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:47,928 INFO L87 Difference]: Start difference. First operand 81869 states and 279799 transitions. Second operand 4 states. [2019-12-07 19:03:48,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:48,212 INFO L93 Difference]: Finished difference Result 83277 states and 283356 transitions. [2019-12-07 19:03:48,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:03:48,213 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2019-12-07 19:03:48,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:48,347 INFO L225 Difference]: With dead ends: 83277 [2019-12-07 19:03:48,347 INFO L226 Difference]: Without dead ends: 79824 [2019-12-07 19:03:48,347 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:48,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79824 states. [2019-12-07 19:03:49,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79824 to 78126. [2019-12-07 19:03:49,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78126 states. [2019-12-07 19:03:49,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78126 states to 78126 states and 267990 transitions. [2019-12-07 19:03:49,791 INFO L78 Accepts]: Start accepts. Automaton has 78126 states and 267990 transitions. Word has length 33 [2019-12-07 19:03:49,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:49,791 INFO L462 AbstractCegarLoop]: Abstraction has 78126 states and 267990 transitions. [2019-12-07 19:03:49,791 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:03:49,791 INFO L276 IsEmpty]: Start isEmpty. Operand 78126 states and 267990 transitions. [2019-12-07 19:03:49,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 19:03:49,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:49,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:49,839 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:49,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:49,839 INFO L82 PathProgramCache]: Analyzing trace with hash 774582413, now seen corresponding path program 1 times [2019-12-07 19:03:49,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:49,839 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243729318] [2019-12-07 19:03:49,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:49,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:49,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:49,879 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243729318] [2019-12-07 19:03:49,879 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:49,879 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:03:49,879 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1177930910] [2019-12-07 19:03:49,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:03:49,879 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:49,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:03:49,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:03:49,880 INFO L87 Difference]: Start difference. First operand 78126 states and 267990 transitions. Second operand 5 states. [2019-12-07 19:03:50,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:50,028 INFO L93 Difference]: Finished difference Result 39891 states and 141051 transitions. [2019-12-07 19:03:50,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:03:50,028 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-12-07 19:03:50,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:50,093 INFO L225 Difference]: With dead ends: 39891 [2019-12-07 19:03:50,093 INFO L226 Difference]: Without dead ends: 39771 [2019-12-07 19:03:50,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:03:50,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39771 states. [2019-12-07 19:03:50,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39771 to 29546. [2019-12-07 19:03:50,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29546 states. [2019-12-07 19:03:50,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29546 states to 29546 states and 100211 transitions. [2019-12-07 19:03:50,659 INFO L78 Accepts]: Start accepts. Automaton has 29546 states and 100211 transitions. Word has length 34 [2019-12-07 19:03:50,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:50,659 INFO L462 AbstractCegarLoop]: Abstraction has 29546 states and 100211 transitions. [2019-12-07 19:03:50,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:03:50,660 INFO L276 IsEmpty]: Start isEmpty. Operand 29546 states and 100211 transitions. [2019-12-07 19:03:50,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 19:03:50,817 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:50,817 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:50,817 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:50,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:50,817 INFO L82 PathProgramCache]: Analyzing trace with hash 9371836, now seen corresponding path program 1 times [2019-12-07 19:03:50,817 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:50,818 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874541127] [2019-12-07 19:03:50,818 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:50,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:50,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:50,948 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874541127] [2019-12-07 19:03:50,948 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:50,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 19:03:50,949 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377576334] [2019-12-07 19:03:50,949 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 19:03:50,949 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:50,949 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 19:03:50,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:03:50,949 INFO L87 Difference]: Start difference. First operand 29546 states and 100211 transitions. Second operand 9 states. [2019-12-07 19:03:51,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:51,683 INFO L93 Difference]: Finished difference Result 38527 states and 127526 transitions. [2019-12-07 19:03:51,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 19:03:51,683 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 43 [2019-12-07 19:03:51,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:51,737 INFO L225 Difference]: With dead ends: 38527 [2019-12-07 19:03:51,737 INFO L226 Difference]: Without dead ends: 38096 [2019-12-07 19:03:51,738 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=121, Invalid=299, Unknown=0, NotChecked=0, Total=420 [2019-12-07 19:03:51,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38096 states. [2019-12-07 19:03:52,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38096 to 28329. [2019-12-07 19:03:52,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28329 states. [2019-12-07 19:03:52,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28329 states to 28329 states and 96011 transitions. [2019-12-07 19:03:52,280 INFO L78 Accepts]: Start accepts. Automaton has 28329 states and 96011 transitions. Word has length 43 [2019-12-07 19:03:52,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:52,280 INFO L462 AbstractCegarLoop]: Abstraction has 28329 states and 96011 transitions. [2019-12-07 19:03:52,280 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 19:03:52,280 INFO L276 IsEmpty]: Start isEmpty. Operand 28329 states and 96011 transitions. [2019-12-07 19:03:52,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 19:03:52,310 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:52,310 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:52,310 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:52,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:52,311 INFO L82 PathProgramCache]: Analyzing trace with hash 166645302, now seen corresponding path program 2 times [2019-12-07 19:03:52,311 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:52,311 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694080192] [2019-12-07 19:03:52,311 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:52,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:52,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:52,392 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694080192] [2019-12-07 19:03:52,392 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:52,392 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:03:52,392 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977677807] [2019-12-07 19:03:52,392 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 19:03:52,392 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:52,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 19:03:52,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:03:52,393 INFO L87 Difference]: Start difference. First operand 28329 states and 96011 transitions. Second operand 8 states. [2019-12-07 19:03:52,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:52,967 INFO L93 Difference]: Finished difference Result 38190 states and 125712 transitions. [2019-12-07 19:03:52,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 19:03:52,968 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 43 [2019-12-07 19:03:52,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:53,020 INFO L225 Difference]: With dead ends: 38190 [2019-12-07 19:03:53,020 INFO L226 Difference]: Without dead ends: 38086 [2019-12-07 19:03:53,020 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=70, Invalid=170, Unknown=0, NotChecked=0, Total=240 [2019-12-07 19:03:53,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38086 states. [2019-12-07 19:03:53,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38086 to 29378. [2019-12-07 19:03:53,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29378 states. [2019-12-07 19:03:53,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29378 states to 29378 states and 99442 transitions. [2019-12-07 19:03:53,548 INFO L78 Accepts]: Start accepts. Automaton has 29378 states and 99442 transitions. Word has length 43 [2019-12-07 19:03:53,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:53,548 INFO L462 AbstractCegarLoop]: Abstraction has 29378 states and 99442 transitions. [2019-12-07 19:03:53,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 19:03:53,548 INFO L276 IsEmpty]: Start isEmpty. Operand 29378 states and 99442 transitions. [2019-12-07 19:03:53,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 19:03:53,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:53,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:53,579 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:53,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:53,579 INFO L82 PathProgramCache]: Analyzing trace with hash 1513454384, now seen corresponding path program 1 times [2019-12-07 19:03:53,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:53,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976511003] [2019-12-07 19:03:53,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:53,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:53,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:53,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976511003] [2019-12-07 19:03:53,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:53,603 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:03:53,603 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396357596] [2019-12-07 19:03:53,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:03:53,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:53,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:03:53,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:53,603 INFO L87 Difference]: Start difference. First operand 29378 states and 99442 transitions. Second operand 3 states. [2019-12-07 19:03:53,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:53,733 INFO L93 Difference]: Finished difference Result 40118 states and 134824 transitions. [2019-12-07 19:03:53,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:03:53,734 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 19:03:53,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:53,852 INFO L225 Difference]: With dead ends: 40118 [2019-12-07 19:03:53,852 INFO L226 Difference]: Without dead ends: 40118 [2019-12-07 19:03:53,852 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:53,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40118 states. [2019-12-07 19:03:54,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40118 to 35518. [2019-12-07 19:03:54,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35518 states. [2019-12-07 19:03:54,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35518 states to 35518 states and 120799 transitions. [2019-12-07 19:03:54,429 INFO L78 Accepts]: Start accepts. Automaton has 35518 states and 120799 transitions. Word has length 43 [2019-12-07 19:03:54,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:54,429 INFO L462 AbstractCegarLoop]: Abstraction has 35518 states and 120799 transitions. [2019-12-07 19:03:54,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:03:54,429 INFO L276 IsEmpty]: Start isEmpty. Operand 35518 states and 120799 transitions. [2019-12-07 19:03:54,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 19:03:54,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:54,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:54,466 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:54,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:54,466 INFO L82 PathProgramCache]: Analyzing trace with hash 15041504, now seen corresponding path program 3 times [2019-12-07 19:03:54,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:54,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215123439] [2019-12-07 19:03:54,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:54,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:54,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:54,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215123439] [2019-12-07 19:03:54,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:54,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:03:54,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587253781] [2019-12-07 19:03:54,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 19:03:54,590 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:54,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 19:03:54,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:03:54,590 INFO L87 Difference]: Start difference. First operand 35518 states and 120799 transitions. Second operand 10 states. [2019-12-07 19:03:55,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:55,988 INFO L93 Difference]: Finished difference Result 42731 states and 140487 transitions. [2019-12-07 19:03:55,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 19:03:55,989 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2019-12-07 19:03:55,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:56,059 INFO L225 Difference]: With dead ends: 42731 [2019-12-07 19:03:56,060 INFO L226 Difference]: Without dead ends: 42434 [2019-12-07 19:03:56,060 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=176, Invalid=636, Unknown=0, NotChecked=0, Total=812 [2019-12-07 19:03:56,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42434 states. [2019-12-07 19:03:56,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42434 to 30475. [2019-12-07 19:03:56,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30475 states. [2019-12-07 19:03:56,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30475 states to 30475 states and 104572 transitions. [2019-12-07 19:03:56,659 INFO L78 Accepts]: Start accepts. Automaton has 30475 states and 104572 transitions. Word has length 43 [2019-12-07 19:03:56,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:56,659 INFO L462 AbstractCegarLoop]: Abstraction has 30475 states and 104572 transitions. [2019-12-07 19:03:56,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 19:03:56,660 INFO L276 IsEmpty]: Start isEmpty. Operand 30475 states and 104572 transitions. [2019-12-07 19:03:56,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 19:03:56,693 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:56,693 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:56,693 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:56,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:56,693 INFO L82 PathProgramCache]: Analyzing trace with hash 1368008840, now seen corresponding path program 1 times [2019-12-07 19:03:56,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:56,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565574430] [2019-12-07 19:03:56,694 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:56,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:56,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:56,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1565574430] [2019-12-07 19:03:56,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:56,736 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:03:56,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199549864] [2019-12-07 19:03:56,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:03:56,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:56,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:03:56,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:03:56,737 INFO L87 Difference]: Start difference. First operand 30475 states and 104572 transitions. Second operand 5 states. [2019-12-07 19:03:57,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:57,185 INFO L93 Difference]: Finished difference Result 47029 states and 159274 transitions. [2019-12-07 19:03:57,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:03:57,185 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-07 19:03:57,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:57,250 INFO L225 Difference]: With dead ends: 47029 [2019-12-07 19:03:57,250 INFO L226 Difference]: Without dead ends: 47029 [2019-12-07 19:03:57,250 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:03:57,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47029 states. [2019-12-07 19:03:57,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47029 to 42261. [2019-12-07 19:03:57,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42261 states. [2019-12-07 19:03:57,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42261 states to 42261 states and 144417 transitions. [2019-12-07 19:03:57,966 INFO L78 Accepts]: Start accepts. Automaton has 42261 states and 144417 transitions. Word has length 44 [2019-12-07 19:03:57,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:57,966 INFO L462 AbstractCegarLoop]: Abstraction has 42261 states and 144417 transitions. [2019-12-07 19:03:57,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:03:57,966 INFO L276 IsEmpty]: Start isEmpty. Operand 42261 states and 144417 transitions. [2019-12-07 19:03:58,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 19:03:58,011 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:58,011 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:58,011 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:58,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:58,012 INFO L82 PathProgramCache]: Analyzing trace with hash -172653214, now seen corresponding path program 2 times [2019-12-07 19:03:58,012 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:58,012 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453896041] [2019-12-07 19:03:58,012 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:58,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:58,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:58,061 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453896041] [2019-12-07 19:03:58,061 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:58,061 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:03:58,061 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1933050807] [2019-12-07 19:03:58,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:03:58,061 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:58,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:03:58,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:58,062 INFO L87 Difference]: Start difference. First operand 42261 states and 144417 transitions. Second operand 3 states. [2019-12-07 19:03:58,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:58,188 INFO L93 Difference]: Finished difference Result 40369 states and 136064 transitions. [2019-12-07 19:03:58,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:03:58,189 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-12-07 19:03:58,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:58,250 INFO L225 Difference]: With dead ends: 40369 [2019-12-07 19:03:58,250 INFO L226 Difference]: Without dead ends: 40369 [2019-12-07 19:03:58,250 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:58,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40369 states. [2019-12-07 19:03:58,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40369 to 39724. [2019-12-07 19:03:58,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39724 states. [2019-12-07 19:03:58,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39724 states to 39724 states and 134156 transitions. [2019-12-07 19:03:58,892 INFO L78 Accepts]: Start accepts. Automaton has 39724 states and 134156 transitions. Word has length 44 [2019-12-07 19:03:58,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:58,892 INFO L462 AbstractCegarLoop]: Abstraction has 39724 states and 134156 transitions. [2019-12-07 19:03:58,892 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:03:58,892 INFO L276 IsEmpty]: Start isEmpty. Operand 39724 states and 134156 transitions. [2019-12-07 19:03:58,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 19:03:58,934 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:58,934 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:58,934 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:58,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:58,934 INFO L82 PathProgramCache]: Analyzing trace with hash -1759842661, now seen corresponding path program 1 times [2019-12-07 19:03:58,934 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:58,934 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806856638] [2019-12-07 19:03:58,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:58,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:58,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:58,972 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806856638] [2019-12-07 19:03:58,973 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:58,973 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:03:58,973 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766532400] [2019-12-07 19:03:58,973 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:03:58,973 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:58,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:03:58,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:03:58,973 INFO L87 Difference]: Start difference. First operand 39724 states and 134156 transitions. Second operand 6 states. [2019-12-07 19:03:59,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:59,112 INFO L93 Difference]: Finished difference Result 37373 states and 128690 transitions. [2019-12-07 19:03:59,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:03:59,113 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2019-12-07 19:03:59,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:59,165 INFO L225 Difference]: With dead ends: 37373 [2019-12-07 19:03:59,165 INFO L226 Difference]: Without dead ends: 36457 [2019-12-07 19:03:59,165 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:03:59,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36457 states. [2019-12-07 19:03:59,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36457 to 25717. [2019-12-07 19:03:59,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25717 states. [2019-12-07 19:03:59,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25717 states to 25717 states and 91902 transitions. [2019-12-07 19:03:59,739 INFO L78 Accepts]: Start accepts. Automaton has 25717 states and 91902 transitions. Word has length 45 [2019-12-07 19:03:59,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:59,739 INFO L462 AbstractCegarLoop]: Abstraction has 25717 states and 91902 transitions. [2019-12-07 19:03:59,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:03:59,739 INFO L276 IsEmpty]: Start isEmpty. Operand 25717 states and 91902 transitions. [2019-12-07 19:03:59,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:03:59,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:59,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:59,769 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:59,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:59,769 INFO L82 PathProgramCache]: Analyzing trace with hash 674110746, now seen corresponding path program 1 times [2019-12-07 19:03:59,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:59,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638524191] [2019-12-07 19:03:59,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:59,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:59,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:59,793 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638524191] [2019-12-07 19:03:59,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:59,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:03:59,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761983127] [2019-12-07 19:03:59,794 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:03:59,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:59,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:03:59,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:59,794 INFO L87 Difference]: Start difference. First operand 25717 states and 91902 transitions. Second operand 3 states. [2019-12-07 19:03:59,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:59,896 INFO L93 Difference]: Finished difference Result 27524 states and 94630 transitions. [2019-12-07 19:03:59,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:03:59,896 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 19:03:59,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:59,939 INFO L225 Difference]: With dead ends: 27524 [2019-12-07 19:03:59,939 INFO L226 Difference]: Without dead ends: 27524 [2019-12-07 19:03:59,939 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:00,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27524 states. [2019-12-07 19:04:00,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27524 to 22451. [2019-12-07 19:04:00,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22451 states. [2019-12-07 19:04:00,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22451 states to 22451 states and 78467 transitions. [2019-12-07 19:04:00,344 INFO L78 Accepts]: Start accepts. Automaton has 22451 states and 78467 transitions. Word has length 59 [2019-12-07 19:04:00,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:00,344 INFO L462 AbstractCegarLoop]: Abstraction has 22451 states and 78467 transitions. [2019-12-07 19:04:00,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:04:00,344 INFO L276 IsEmpty]: Start isEmpty. Operand 22451 states and 78467 transitions. [2019-12-07 19:04:00,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:04:00,367 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:00,368 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:00,368 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:00,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:00,368 INFO L82 PathProgramCache]: Analyzing trace with hash -2006067837, now seen corresponding path program 1 times [2019-12-07 19:04:00,368 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:00,368 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1720931321] [2019-12-07 19:04:00,368 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:00,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:00,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:00,437 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1720931321] [2019-12-07 19:04:00,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:00,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:00,437 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629145113] [2019-12-07 19:04:00,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:04:00,437 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:00,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:04:00,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:00,437 INFO L87 Difference]: Start difference. First operand 22451 states and 78467 transitions. Second operand 4 states. [2019-12-07 19:04:00,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:00,590 INFO L93 Difference]: Finished difference Result 50978 states and 174931 transitions. [2019-12-07 19:04:00,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:04:00,591 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2019-12-07 19:04:00,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:00,614 INFO L225 Difference]: With dead ends: 50978 [2019-12-07 19:04:00,614 INFO L226 Difference]: Without dead ends: 19277 [2019-12-07 19:04:00,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:00,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19277 states. [2019-12-07 19:04:00,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19277 to 10932. [2019-12-07 19:04:00,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10932 states. [2019-12-07 19:04:00,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10932 states to 10932 states and 33270 transitions. [2019-12-07 19:04:00,822 INFO L78 Accepts]: Start accepts. Automaton has 10932 states and 33270 transitions. Word has length 59 [2019-12-07 19:04:00,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:00,822 INFO L462 AbstractCegarLoop]: Abstraction has 10932 states and 33270 transitions. [2019-12-07 19:04:00,822 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:04:00,822 INFO L276 IsEmpty]: Start isEmpty. Operand 10932 states and 33270 transitions. [2019-12-07 19:04:00,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:04:00,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:00,831 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:00,831 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:00,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:00,832 INFO L82 PathProgramCache]: Analyzing trace with hash -286713595, now seen corresponding path program 2 times [2019-12-07 19:04:00,832 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:00,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47037397] [2019-12-07 19:04:00,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:00,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:01,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:01,091 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47037397] [2019-12-07 19:04:01,091 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:01,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 19:04:01,091 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1140838083] [2019-12-07 19:04:01,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 19:04:01,092 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:01,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 19:04:01,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:04:01,092 INFO L87 Difference]: Start difference. First operand 10932 states and 33270 transitions. Second operand 17 states. [2019-12-07 19:04:03,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:03,173 INFO L93 Difference]: Finished difference Result 19801 states and 58978 transitions. [2019-12-07 19:04:03,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 19:04:03,173 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 59 [2019-12-07 19:04:03,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:03,216 INFO L225 Difference]: With dead ends: 19801 [2019-12-07 19:04:03,216 INFO L226 Difference]: Without dead ends: 17811 [2019-12-07 19:04:03,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 451 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=357, Invalid=1899, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 19:04:03,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17811 states. [2019-12-07 19:04:03,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17811 to 12204. [2019-12-07 19:04:03,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12204 states. [2019-12-07 19:04:03,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12204 states to 12204 states and 36955 transitions. [2019-12-07 19:04:03,405 INFO L78 Accepts]: Start accepts. Automaton has 12204 states and 36955 transitions. Word has length 59 [2019-12-07 19:04:03,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:03,405 INFO L462 AbstractCegarLoop]: Abstraction has 12204 states and 36955 transitions. [2019-12-07 19:04:03,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 19:04:03,405 INFO L276 IsEmpty]: Start isEmpty. Operand 12204 states and 36955 transitions. [2019-12-07 19:04:03,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:04:03,415 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:03,415 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:03,415 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:03,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:03,416 INFO L82 PathProgramCache]: Analyzing trace with hash 490336035, now seen corresponding path program 3 times [2019-12-07 19:04:03,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:03,416 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [348517161] [2019-12-07 19:04:03,416 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:03,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:03,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:03,627 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [348517161] [2019-12-07 19:04:03,627 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:03,627 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:04:03,627 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [612730917] [2019-12-07 19:04:03,627 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:04:03,627 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:03,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:04:03,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:04:03,628 INFO L87 Difference]: Start difference. First operand 12204 states and 36955 transitions. Second operand 11 states. [2019-12-07 19:04:05,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:05,082 INFO L93 Difference]: Finished difference Result 51783 states and 157489 transitions. [2019-12-07 19:04:05,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 19:04:05,083 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 19:04:05,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:05,121 INFO L225 Difference]: With dead ends: 51783 [2019-12-07 19:04:05,122 INFO L226 Difference]: Without dead ends: 32389 [2019-12-07 19:04:05,123 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 804 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=468, Invalid=2082, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 19:04:05,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32389 states. [2019-12-07 19:04:05,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32389 to 13814. [2019-12-07 19:04:05,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13814 states. [2019-12-07 19:04:05,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13814 states to 13814 states and 41305 transitions. [2019-12-07 19:04:05,441 INFO L78 Accepts]: Start accepts. Automaton has 13814 states and 41305 transitions. Word has length 59 [2019-12-07 19:04:05,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:05,441 INFO L462 AbstractCegarLoop]: Abstraction has 13814 states and 41305 transitions. [2019-12-07 19:04:05,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:04:05,441 INFO L276 IsEmpty]: Start isEmpty. Operand 13814 states and 41305 transitions. [2019-12-07 19:04:05,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:04:05,453 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:05,453 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:05,454 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:05,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:05,454 INFO L82 PathProgramCache]: Analyzing trace with hash 875407311, now seen corresponding path program 4 times [2019-12-07 19:04:05,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:05,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [986183927] [2019-12-07 19:04:05,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:05,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:05,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:05,526 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [986183927] [2019-12-07 19:04:05,526 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:05,526 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:04:05,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370022315] [2019-12-07 19:04:05,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:04:05,527 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:05,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:04:05,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:04:05,527 INFO L87 Difference]: Start difference. First operand 13814 states and 41305 transitions. Second operand 7 states. [2019-12-07 19:04:05,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:05,873 INFO L93 Difference]: Finished difference Result 35855 states and 104892 transitions. [2019-12-07 19:04:05,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 19:04:05,874 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 59 [2019-12-07 19:04:05,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:05,909 INFO L225 Difference]: With dead ends: 35855 [2019-12-07 19:04:05,909 INFO L226 Difference]: Without dead ends: 31408 [2019-12-07 19:04:05,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 19:04:06,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31408 states. [2019-12-07 19:04:06,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31408 to 13521. [2019-12-07 19:04:06,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13521 states. [2019-12-07 19:04:06,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13521 states to 13521 states and 40430 transitions. [2019-12-07 19:04:06,212 INFO L78 Accepts]: Start accepts. Automaton has 13521 states and 40430 transitions. Word has length 59 [2019-12-07 19:04:06,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:06,212 INFO L462 AbstractCegarLoop]: Abstraction has 13521 states and 40430 transitions. [2019-12-07 19:04:06,212 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:04:06,212 INFO L276 IsEmpty]: Start isEmpty. Operand 13521 states and 40430 transitions. [2019-12-07 19:04:06,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:04:06,224 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:06,225 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:06,225 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:06,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:06,225 INFO L82 PathProgramCache]: Analyzing trace with hash 1304528589, now seen corresponding path program 5 times [2019-12-07 19:04:06,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:06,225 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998372829] [2019-12-07 19:04:06,225 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:06,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:06,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:06,551 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998372829] [2019-12-07 19:04:06,551 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:06,551 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:04:06,551 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1752875833] [2019-12-07 19:04:06,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 19:04:06,551 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:06,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 19:04:06,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:04:06,552 INFO L87 Difference]: Start difference. First operand 13521 states and 40430 transitions. Second operand 14 states. [2019-12-07 19:04:08,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:08,090 INFO L93 Difference]: Finished difference Result 32698 states and 97393 transitions. [2019-12-07 19:04:08,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 19:04:08,090 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 59 [2019-12-07 19:04:08,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:08,127 INFO L225 Difference]: With dead ends: 32698 [2019-12-07 19:04:08,127 INFO L226 Difference]: Without dead ends: 32558 [2019-12-07 19:04:08,128 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 368 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=232, Invalid=1408, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 19:04:08,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32558 states. [2019-12-07 19:04:08,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32558 to 13670. [2019-12-07 19:04:08,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13670 states. [2019-12-07 19:04:08,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13670 states to 13670 states and 40790 transitions. [2019-12-07 19:04:08,442 INFO L78 Accepts]: Start accepts. Automaton has 13670 states and 40790 transitions. Word has length 59 [2019-12-07 19:04:08,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:08,442 INFO L462 AbstractCegarLoop]: Abstraction has 13670 states and 40790 transitions. [2019-12-07 19:04:08,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 19:04:08,442 INFO L276 IsEmpty]: Start isEmpty. Operand 13670 states and 40790 transitions. [2019-12-07 19:04:08,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:04:08,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:08,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:08,454 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:08,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:08,455 INFO L82 PathProgramCache]: Analyzing trace with hash 1026660081, now seen corresponding path program 6 times [2019-12-07 19:04:08,455 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:08,455 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239411305] [2019-12-07 19:04:08,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:08,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:08,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:08,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239411305] [2019-12-07 19:04:08,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:08,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:04:08,574 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329816863] [2019-12-07 19:04:08,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:04:08,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:08,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:04:08,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:04:08,574 INFO L87 Difference]: Start difference. First operand 13670 states and 40790 transitions. Second operand 12 states. [2019-12-07 19:04:09,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:09,666 INFO L93 Difference]: Finished difference Result 20057 states and 58824 transitions. [2019-12-07 19:04:09,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 19:04:09,667 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 19:04:09,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:09,685 INFO L225 Difference]: With dead ends: 20057 [2019-12-07 19:04:09,685 INFO L226 Difference]: Without dead ends: 18783 [2019-12-07 19:04:09,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=716, Unknown=0, NotChecked=0, Total=870 [2019-12-07 19:04:09,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18783 states. [2019-12-07 19:04:09,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18783 to 12965. [2019-12-07 19:04:09,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12965 states. [2019-12-07 19:04:09,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12965 states to 12965 states and 38909 transitions. [2019-12-07 19:04:09,904 INFO L78 Accepts]: Start accepts. Automaton has 12965 states and 38909 transitions. Word has length 59 [2019-12-07 19:04:09,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:09,904 INFO L462 AbstractCegarLoop]: Abstraction has 12965 states and 38909 transitions. [2019-12-07 19:04:09,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:04:09,904 INFO L276 IsEmpty]: Start isEmpty. Operand 12965 states and 38909 transitions. [2019-12-07 19:04:09,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:04:09,916 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:09,916 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:09,916 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:09,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:09,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1779176519, now seen corresponding path program 7 times [2019-12-07 19:04:09,916 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:09,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [947962176] [2019-12-07 19:04:09,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:09,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:04:09,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:04:09,985 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 19:04:09,986 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:04:09,988 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] ULTIMATE.startENTRY-->L846: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= v_~__unbuffered_p1_EBX~0_48 0) (= v_~x~0_72 0) (= v_~y$w_buff1_used~0_529 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff1_thd1~0_122 0) (= 0 v_~y$w_buff0~0_386) (= 0 v_~y$r_buff0_thd2~0_330) (= (select .cse0 |v_ULTIMATE.start_main_~#t621~0.base_29|) 0) (= v_~__unbuffered_cnt~0_187 0) (= v_~main$tmp_guard1~0_42 0) (< 0 |v_#StackHeapBarrier_22|) (= v_~y~0_163 0) (= v_~y$read_delayed~0_7 0) (= 0 v_~y$r_buff1_thd3~0_189) (= 0 v_~__unbuffered_p3_EBX~0_48) (= v_~y$w_buff1~0_278 0) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t621~0.base_29| 4)) (= 0 v_~y$flush_delayed~0_49) (= 0 v_~y$read_delayed_var~0.base_5) (= v_~y$r_buff0_thd1~0_36 0) (= v_~y$w_buff0_used~0_832 0) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t621~0.base_29|) (= 0 v_~y$read_delayed_var~0.offset_5) (= 0 v_~y$r_buff1_thd4~0_202) (= v_~a~0_49 0) (= 0 v_~y$r_buff1_thd2~0_315) (= v_~y$r_buff0_thd0~0_117 0) (= 0 |v_#NULL.base_4|) (= 0 v_~weak$$choice0~0_22) (= v_~y$mem_tmp~0_24 0) (= 0 v_~y$r_buff0_thd3~0_225) (= (store |v_#memory_int_30| |v_ULTIMATE.start_main_~#t621~0.base_29| (store (select |v_#memory_int_30| |v_ULTIMATE.start_main_~#t621~0.base_29|) |v_ULTIMATE.start_main_~#t621~0.offset_21| 0)) |v_#memory_int_29|) (= 0 v_~__unbuffered_p1_EAX~0_47) (= (store .cse0 |v_ULTIMATE.start_main_~#t621~0.base_29| 1) |v_#valid_72|) (= 0 v_~__unbuffered_p3_EAX~0_48) (= |v_#NULL.offset_4| 0) (= 0 v_~y$r_buff0_thd4~0_120) (= 0 |v_ULTIMATE.start_main_~#t621~0.offset_21|) (= v_~weak$$choice2~0_186 0) (= v_~y$r_buff1_thd0~0_220 0) (= v_~z~0_163 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_30|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_82|, ULTIMATE.start_main_~#t622~0.offset=|v_ULTIMATE.start_main_~#t622~0.offset_21|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_~#t622~0.base=|v_ULTIMATE.start_main_~#t622~0.base_29|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_49, ~y$mem_tmp~0=v_~y$mem_tmp~0_24, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_189, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_36, ~y$flush_delayed~0=v_~y$flush_delayed~0_49, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_48, #length=|v_#length_31|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_29|, ULTIMATE.start_main_~#t623~0.base=|v_ULTIMATE.start_main_~#t623~0.base_29|, ~weak$$choice0~0=v_~weak$$choice0~0_22, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_202, ~y$w_buff1~0=v_~y$w_buff1~0_278, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_330, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_187, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_220, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_832, ULTIMATE.start_main_~#t621~0.base=|v_ULTIMATE.start_main_~#t621~0.base_29|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_41|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_122, ULTIMATE.start_main_~#t621~0.offset=|v_ULTIMATE.start_main_~#t621~0.offset_21|, ~y$w_buff0~0=v_~y$w_buff0~0_386, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_225, ULTIMATE.start_main_~#t624~0.base=|v_ULTIMATE.start_main_~#t624~0.base_17|, ~y~0=v_~y~0_163, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_9|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_48, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_48, #NULL.base=|v_#NULL.base_4|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_315, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_120, ULTIMATE.start_main_~#t624~0.offset=|v_ULTIMATE.start_main_~#t624~0.offset_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_117, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_29|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ULTIMATE.start_main_~#t623~0.offset=|v_ULTIMATE.start_main_~#t623~0.offset_21|, ~z~0=v_~z~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_186, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_529} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t622~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t622~0.base, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t623~0.base, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t621~0.base, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t621~0.offset, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t624~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p1_EBX~0, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_~#t624~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t623~0.offset, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 19:04:09,988 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L846-1-->L848: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t622~0.base_12| 1)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t622~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t622~0.base_12| 0)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t622~0.base_12| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t622~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t622~0.base_12|) |v_ULTIMATE.start_main_~#t622~0.offset_10| 1)) |v_#memory_int_17|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t622~0.base_12|) 0) (= 0 |v_ULTIMATE.start_main_~#t622~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t622~0.offset=|v_ULTIMATE.start_main_~#t622~0.offset_10|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_19|, ULTIMATE.start_main_~#t622~0.base=|v_ULTIMATE.start_main_~#t622~0.base_12|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t622~0.offset, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t622~0.base] because there is no mapped edge [2019-12-07 19:04:09,989 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-1-->L850: Formula: (and (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t623~0.base_13| 4) |v_#length_23|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t623~0.base_13| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t623~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t623~0.offset_11|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t623~0.base_13| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t623~0.base_13|) |v_ULTIMATE.start_main_~#t623~0.offset_11| 2)) |v_#memory_int_21|) (not (= 0 |v_ULTIMATE.start_main_~#t623~0.base_13|)) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t623~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t623~0.base=|v_ULTIMATE.start_main_~#t623~0.base_13|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_21|, #length=|v_#length_23|, ULTIMATE.start_main_~#t623~0.offset=|v_ULTIMATE.start_main_~#t623~0.offset_11|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t623~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t623~0.offset, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 19:04:09,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L4-->L800: Formula: (and (= v_~y$r_buff0_thd4~0_25 v_~y$r_buff1_thd4~0_25) (= v_~y$r_buff0_thd3~0_17 1) (= v_~y$r_buff0_thd3~0_18 v_~y$r_buff1_thd3~0_11) (= v_~y$r_buff1_thd1~0_4 v_~y$r_buff0_thd1~0_4) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22 0)) (= v_~y$r_buff0_thd2~0_68 v_~y$r_buff1_thd2~0_32) (= v_~z~0_10 1) (= v_~y$r_buff0_thd0~0_19 v_~y$r_buff1_thd0~0_17)) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_25, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_68, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_4, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_32, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_25, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_25, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_11, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_68, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_4, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22, ~z~0=v_~z~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 19:04:09,990 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L850-1-->L852: Formula: (and (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t624~0.base_10| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t624~0.base_10| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t624~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t624~0.offset_10|) (not (= |v_ULTIMATE.start_main_~#t624~0.base_10| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t624~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t624~0.base_10|) |v_ULTIMATE.start_main_~#t624~0.offset_10| 3)) |v_#memory_int_15|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t624~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_4|, ULTIMATE.start_main_~#t624~0.offset=|v_ULTIMATE.start_main_~#t624~0.offset_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t624~0.base=|v_ULTIMATE.start_main_~#t624~0.base_10|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t624~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t624~0.base, #length] because there is no mapped edge [2019-12-07 19:04:09,991 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] P0ENTRY-->P0EXIT: Formula: (and (= v_~a~0_23 1) (= v_~x~0_36 1) (= v_~__unbuffered_cnt~0_101 (+ v_~__unbuffered_cnt~0_102 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= v_P0Thread1of1ForFork1_~arg.offset_17 |v_P0Thread1of1ForFork1_#in~arg.offset_19|) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_19| v_P0Thread1of1ForFork1_~arg.base_17)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|} OutVars{~a~0=v_~a~0_23, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|, ~x~0=v_~x~0_36, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_17} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 19:04:09,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L823-2-->L823-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1082972240 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-1082972240 256)))) (or (and (= |P3Thread1of1ForFork0_#t~ite32_Out-1082972240| ~y~0_In-1082972240) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-1082972240 |P3Thread1of1ForFork0_#t~ite32_Out-1082972240|) (not .cse1) (not .cse0)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1082972240, ~y$w_buff1~0=~y$w_buff1~0_In-1082972240, ~y~0=~y~0_In-1082972240, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1082972240} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1082972240, ~y$w_buff1~0=~y$w_buff1~0_In-1082972240, ~y~0=~y~0_In-1082972240, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-1082972240|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1082972240} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 19:04:09,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L823-4-->L824: Formula: (= v_~y~0_43 |v_P3Thread1of1ForFork0_#t~ite32_12|) InVars {P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_12|} OutVars{~y~0=v_~y~0_43, P3Thread1of1ForFork0_#t~ite33=|v_P3Thread1of1ForFork0_#t~ite33_13|, P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_11|} AuxVars[] AssignedVars[~y~0, P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 19:04:09,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1108669482 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1108669482 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1108669482 |P3Thread1of1ForFork0_#t~ite34_Out-1108669482|)) (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out-1108669482|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1108669482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1108669482} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1108669482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1108669482, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-1108669482|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 19:04:09,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In985980656 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In985980656 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In985980656 |P2Thread1of1ForFork3_#t~ite28_Out985980656|)) (and (= 0 |P2Thread1of1ForFork3_#t~ite28_Out985980656|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In985980656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In985980656} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In985980656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In985980656, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out985980656|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 19:04:09,993 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L802-->L802-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-288516922 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-288516922 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-288516922 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-288516922 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out-288516922|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork3_#t~ite29_Out-288516922| ~y$w_buff1_used~0_In-288516922)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-288516922, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-288516922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-288516922, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-288516922} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-288516922, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-288516922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-288516922, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out-288516922|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-288516922} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 19:04:09,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L803-->L804: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-575443488 256) 0)) (.cse0 (= ~y$r_buff0_thd3~0_Out-575443488 ~y$r_buff0_thd3~0_In-575443488)) (.cse2 (= (mod ~y$w_buff0_used~0_In-575443488 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (= ~y$r_buff0_thd3~0_Out-575443488 0) (not .cse2)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-575443488, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-575443488} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out-575443488|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-575443488, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-575443488} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 19:04:09,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L804-->L804-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-991978019 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-991978019 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-991978019 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-991978019 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd3~0_In-991978019 |P2Thread1of1ForFork3_#t~ite31_Out-991978019|)) (and (= 0 |P2Thread1of1ForFork3_#t~ite31_Out-991978019|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-991978019, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-991978019, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991978019, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-991978019} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-991978019, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-991978019, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991978019, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out-991978019|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-991978019} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 19:04:09,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L804-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork3_#t~ite31_38| v_~y$r_buff1_thd3~0_125) (= v_~__unbuffered_cnt~0_126 (+ v_~__unbuffered_cnt~0_127 1)) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 19:04:09,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1423016518 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In1423016518 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1423016518 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd4~0_In1423016518 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1423016518 |P3Thread1of1ForFork0_#t~ite35_Out1423016518|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P3Thread1of1ForFork0_#t~ite35_Out1423016518|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1423016518, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1423016518, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1423016518, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1423016518} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1423016518, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1423016518, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1423016518, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out1423016518|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1423016518} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 19:04:09,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L826-->L826-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In-696570084 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-696570084 256) 0))) (or (and (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out-696570084|) (not .cse1)) (and (= ~y$r_buff0_thd4~0_In-696570084 |P3Thread1of1ForFork0_#t~ite36_Out-696570084|) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-696570084, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-696570084} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-696570084, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-696570084, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-696570084|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 19:04:09,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L827-->L827-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In6878931 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In6878931 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In6878931 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd4~0_In6878931 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork0_#t~ite37_Out6878931|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd4~0_In6878931 |P3Thread1of1ForFork0_#t~ite37_Out6878931|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In6878931, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In6878931, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6878931, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6878931} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In6878931, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In6878931, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6878931, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out6878931|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6878931} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 19:04:09,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L827-2-->P3EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_96 1) v_~__unbuffered_cnt~0_95) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= |v_P3Thread1of1ForFork0_#t~ite37_46| v_~y$r_buff1_thd4~0_61) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_61, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_45|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:04:09,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L764-->L764-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1546547710 256)))) (or (and (= ~y$w_buff0~0_In1546547710 |P1Thread1of1ForFork2_#t~ite8_Out1546547710|) (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1546547710 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In1546547710 256)) (and .cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1546547710 256))) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In1546547710 256))))) (= |P1Thread1of1ForFork2_#t~ite8_Out1546547710| |P1Thread1of1ForFork2_#t~ite9_Out1546547710|) .cse1) (and (= ~y$w_buff0~0_In1546547710 |P1Thread1of1ForFork2_#t~ite9_Out1546547710|) (= |P1Thread1of1ForFork2_#t~ite8_In1546547710| |P1Thread1of1ForFork2_#t~ite8_Out1546547710|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1546547710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1546547710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In1546547710|, ~y$w_buff0~0=~y$w_buff0~0_In1546547710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1546547710, ~weak$$choice2~0=~weak$$choice2~0_In1546547710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1546547710} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1546547710, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1546547710|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1546547710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out1546547710|, ~y$w_buff0~0=~y$w_buff0~0_In1546547710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1546547710, ~weak$$choice2~0=~weak$$choice2~0_In1546547710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1546547710} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 19:04:09,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-->L766-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1448315462 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1448315462 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In1448315462 256)) .cse0) (and (= (mod ~y$r_buff1_thd2~0_In1448315462 256) 0) .cse0) (= 0 (mod ~y$w_buff0_used~0_In1448315462 256)))) (= |P1Thread1of1ForFork2_#t~ite14_Out1448315462| |P1Thread1of1ForFork2_#t~ite15_Out1448315462|) .cse1 (= ~y$w_buff0_used~0_In1448315462 |P1Thread1of1ForFork2_#t~ite14_Out1448315462|)) (and (= ~y$w_buff0_used~0_In1448315462 |P1Thread1of1ForFork2_#t~ite15_Out1448315462|) (= |P1Thread1of1ForFork2_#t~ite14_In1448315462| |P1Thread1of1ForFork2_#t~ite14_Out1448315462|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1448315462, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1448315462, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1448315462, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In1448315462|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1448315462} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1448315462, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1448315462, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1448315462, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1448315462|, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out1448315462|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1448315462} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 19:04:09,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L768-->L769: Formula: (and (= v_~y$r_buff0_thd2~0_109 v_~y$r_buff0_thd2~0_108) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_13|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_8|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_5|, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 19:04:09,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L769-->L769-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-302493939 256)))) (or (and .cse0 (= ~y$r_buff1_thd2~0_In-302493939 |P1Thread1of1ForFork2_#t~ite23_Out-302493939|) (= |P1Thread1of1ForFork2_#t~ite23_Out-302493939| |P1Thread1of1ForFork2_#t~ite24_Out-302493939|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-302493939 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-302493939 256)) (and (= (mod ~y$r_buff1_thd2~0_In-302493939 256) 0) .cse1) (and (= (mod ~y$w_buff1_used~0_In-302493939 256) 0) .cse1)))) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite23_In-302493939| |P1Thread1of1ForFork2_#t~ite23_Out-302493939|) (= ~y$r_buff1_thd2~0_In-302493939 |P1Thread1of1ForFork2_#t~ite24_Out-302493939|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-302493939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-302493939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-302493939, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-302493939|, ~weak$$choice2~0=~weak$$choice2~0_In-302493939, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-302493939} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-302493939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-302493939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-302493939, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-302493939|, ~weak$$choice2~0=~weak$$choice2~0_In-302493939, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-302493939|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-302493939} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 19:04:09,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L771-->L779: Formula: (and (= 0 v_~y$flush_delayed~0_8) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_~y~0_19 v_~y$mem_tmp~0_4) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_4, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_4, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~y~0=v_~y~0_19, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_9|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 19:04:09,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L852-1-->L858: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:04:09,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L858-2-->L858-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite42_Out-613356867| |ULTIMATE.start_main_#t~ite43_Out-613356867|)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-613356867 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-613356867 256)))) (or (and (= ~y~0_In-613356867 |ULTIMATE.start_main_#t~ite42_Out-613356867|) .cse0 (or .cse1 .cse2)) (and (= |ULTIMATE.start_main_#t~ite42_Out-613356867| ~y$w_buff1~0_In-613356867) .cse0 (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-613356867, ~y~0=~y~0_In-613356867, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-613356867, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613356867} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-613356867, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-613356867|, ~y~0=~y~0_In-613356867, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-613356867|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-613356867, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613356867} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 19:04:09,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L859-->L859-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1982293883 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1982293883 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out1982293883| ~y$w_buff0_used~0_In1982293883)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out1982293883| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1982293883, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1982293883} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1982293883, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1982293883, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1982293883|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 19:04:10,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L860-->L860-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1115873471 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1115873471 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1115873471 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1115873471 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite45_Out1115873471|)) (and (or .cse1 .cse0) (= ~y$w_buff1_used~0_In1115873471 |ULTIMATE.start_main_#t~ite45_Out1115873471|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1115873471, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1115873471, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1115873471, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1115873471} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1115873471, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1115873471, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1115873471, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1115873471|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1115873471} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 19:04:10,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L861-->L861-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-343173316 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-343173316 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-343173316| 0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-343173316 |ULTIMATE.start_main_#t~ite46_Out-343173316|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-343173316, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-343173316} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-343173316, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-343173316, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-343173316|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 19:04:10,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L862-->L862-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1984533797 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1984533797 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In1984533797 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1984533797 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite47_Out1984533797|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In1984533797 |ULTIMATE.start_main_#t~ite47_Out1984533797|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1984533797, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1984533797, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1984533797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1984533797} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1984533797, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1984533797, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1984533797|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1984533797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1984533797} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:04:10,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L862-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 2 v_~__unbuffered_p1_EAX~0_26) (= 2 v_~__unbuffered_p3_EAX~0_24) (= v_~__unbuffered_p1_EBX~0_25 0) (= 0 v_~__unbuffered_p3_EBX~0_24) (= v_~x~0_45 2) (= v_~z~0_103 2))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~y$r_buff1_thd0~0_153 |v_ULTIMATE.start_main_#t~ite47_41|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_25, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_26, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_24, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_41|, ~z~0=v_~z~0_103, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_24, ~x~0=v_~x~0_45} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_25, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_26, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_24, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_40|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~z~0=v_~z~0_103, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_24, ~x~0=v_~x~0_45, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:04:10,056 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:04:10 BasicIcfg [2019-12-07 19:04:10,057 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:04:10,057 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:04:10,057 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:04:10,057 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:04:10,057 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:58:19" (3/4) ... [2019-12-07 19:04:10,059 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:04:10,059 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] ULTIMATE.startENTRY-->L846: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= v_~__unbuffered_p1_EBX~0_48 0) (= v_~x~0_72 0) (= v_~y$w_buff1_used~0_529 0) (= v_~main$tmp_guard0~0_30 0) (= v_~y$r_buff1_thd1~0_122 0) (= 0 v_~y$w_buff0~0_386) (= 0 v_~y$r_buff0_thd2~0_330) (= (select .cse0 |v_ULTIMATE.start_main_~#t621~0.base_29|) 0) (= v_~__unbuffered_cnt~0_187 0) (= v_~main$tmp_guard1~0_42 0) (< 0 |v_#StackHeapBarrier_22|) (= v_~y~0_163 0) (= v_~y$read_delayed~0_7 0) (= 0 v_~y$r_buff1_thd3~0_189) (= 0 v_~__unbuffered_p3_EBX~0_48) (= v_~y$w_buff1~0_278 0) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t621~0.base_29| 4)) (= 0 v_~y$flush_delayed~0_49) (= 0 v_~y$read_delayed_var~0.base_5) (= v_~y$r_buff0_thd1~0_36 0) (= v_~y$w_buff0_used~0_832 0) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t621~0.base_29|) (= 0 v_~y$read_delayed_var~0.offset_5) (= 0 v_~y$r_buff1_thd4~0_202) (= v_~a~0_49 0) (= 0 v_~y$r_buff1_thd2~0_315) (= v_~y$r_buff0_thd0~0_117 0) (= 0 |v_#NULL.base_4|) (= 0 v_~weak$$choice0~0_22) (= v_~y$mem_tmp~0_24 0) (= 0 v_~y$r_buff0_thd3~0_225) (= (store |v_#memory_int_30| |v_ULTIMATE.start_main_~#t621~0.base_29| (store (select |v_#memory_int_30| |v_ULTIMATE.start_main_~#t621~0.base_29|) |v_ULTIMATE.start_main_~#t621~0.offset_21| 0)) |v_#memory_int_29|) (= 0 v_~__unbuffered_p1_EAX~0_47) (= (store .cse0 |v_ULTIMATE.start_main_~#t621~0.base_29| 1) |v_#valid_72|) (= 0 v_~__unbuffered_p3_EAX~0_48) (= |v_#NULL.offset_4| 0) (= 0 v_~y$r_buff0_thd4~0_120) (= 0 |v_ULTIMATE.start_main_~#t621~0.offset_21|) (= v_~weak$$choice2~0_186 0) (= v_~y$r_buff1_thd0~0_220 0) (= v_~z~0_163 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_30|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_82|, ULTIMATE.start_main_~#t622~0.offset=|v_ULTIMATE.start_main_~#t622~0.offset_21|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_75|, ULTIMATE.start_main_~#t622~0.base=|v_ULTIMATE.start_main_~#t622~0.base_29|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_49, ~y$mem_tmp~0=v_~y$mem_tmp~0_24, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_189, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_36, ~y$flush_delayed~0=v_~y$flush_delayed~0_49, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_48, #length=|v_#length_31|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_29|, ULTIMATE.start_main_~#t623~0.base=|v_ULTIMATE.start_main_~#t623~0.base_29|, ~weak$$choice0~0=v_~weak$$choice0~0_22, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_202, ~y$w_buff1~0=v_~y$w_buff1~0_278, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_330, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_187, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_220, ~x~0=v_~x~0_72, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_832, ULTIMATE.start_main_~#t621~0.base=|v_ULTIMATE.start_main_~#t621~0.base_29|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_41|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_63|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_122, ULTIMATE.start_main_~#t621~0.offset=|v_ULTIMATE.start_main_~#t621~0.offset_21|, ~y$w_buff0~0=v_~y$w_buff0~0_386, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_225, ULTIMATE.start_main_~#t624~0.base=|v_ULTIMATE.start_main_~#t624~0.base_17|, ~y~0=v_~y~0_163, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_9|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_48, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_48, #NULL.base=|v_#NULL.base_4|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_315, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_120, ULTIMATE.start_main_~#t624~0.offset=|v_ULTIMATE.start_main_~#t624~0.offset_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_117, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_29|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ULTIMATE.start_main_~#t623~0.offset=|v_ULTIMATE.start_main_~#t623~0.offset_21|, ~z~0=v_~z~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_186, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_529} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t622~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_~#t622~0.base, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t623~0.base, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t621~0.base, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t621~0.offset, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t624~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p1_EBX~0, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_~#t624~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t623~0.offset, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 19:04:10,060 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L846-1-->L848: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t622~0.base_12| 1)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t622~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t622~0.base_12| 0)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t622~0.base_12| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t622~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t622~0.base_12|) |v_ULTIMATE.start_main_~#t622~0.offset_10| 1)) |v_#memory_int_17|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t622~0.base_12|) 0) (= 0 |v_ULTIMATE.start_main_~#t622~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t622~0.offset=|v_ULTIMATE.start_main_~#t622~0.offset_10|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_19|, ULTIMATE.start_main_~#t622~0.base=|v_ULTIMATE.start_main_~#t622~0.base_12|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t622~0.offset, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t622~0.base] because there is no mapped edge [2019-12-07 19:04:10,060 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-1-->L850: Formula: (and (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t623~0.base_13| 4) |v_#length_23|) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t623~0.base_13| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t623~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t623~0.offset_11|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t623~0.base_13| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t623~0.base_13|) |v_ULTIMATE.start_main_~#t623~0.offset_11| 2)) |v_#memory_int_21|) (not (= 0 |v_ULTIMATE.start_main_~#t623~0.base_13|)) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t623~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t623~0.base=|v_ULTIMATE.start_main_~#t623~0.base_13|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_21|, #length=|v_#length_23|, ULTIMATE.start_main_~#t623~0.offset=|v_ULTIMATE.start_main_~#t623~0.offset_11|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t623~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t623~0.offset, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 19:04:10,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L4-->L800: Formula: (and (= v_~y$r_buff0_thd4~0_25 v_~y$r_buff1_thd4~0_25) (= v_~y$r_buff0_thd3~0_17 1) (= v_~y$r_buff0_thd3~0_18 v_~y$r_buff1_thd3~0_11) (= v_~y$r_buff1_thd1~0_4 v_~y$r_buff0_thd1~0_4) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22 0)) (= v_~y$r_buff0_thd2~0_68 v_~y$r_buff1_thd2~0_32) (= v_~z~0_10 1) (= v_~y$r_buff0_thd0~0_19 v_~y$r_buff1_thd0~0_17)) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_25, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_18, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_68, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_4, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_32, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_25, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_25, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_11, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_68, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_4, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_22, ~z~0=v_~z~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 19:04:10,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L850-1-->L852: Formula: (and (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t624~0.base_10| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t624~0.base_10| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t624~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t624~0.offset_10|) (not (= |v_ULTIMATE.start_main_~#t624~0.base_10| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t624~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t624~0.base_10|) |v_ULTIMATE.start_main_~#t624~0.offset_10| 3)) |v_#memory_int_15|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t624~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_4|, ULTIMATE.start_main_~#t624~0.offset=|v_ULTIMATE.start_main_~#t624~0.offset_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t624~0.base=|v_ULTIMATE.start_main_~#t624~0.base_10|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t624~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t624~0.base, #length] because there is no mapped edge [2019-12-07 19:04:10,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] P0ENTRY-->P0EXIT: Formula: (and (= v_~a~0_23 1) (= v_~x~0_36 1) (= v_~__unbuffered_cnt~0_101 (+ v_~__unbuffered_cnt~0_102 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= v_P0Thread1of1ForFork1_~arg.offset_17 |v_P0Thread1of1ForFork1_#in~arg.offset_19|) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_19| v_P0Thread1of1ForFork1_~arg.base_17)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|} OutVars{~a~0=v_~a~0_23, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_19|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_19|, ~x~0=v_~x~0_36, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_17} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 19:04:10,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L823-2-->L823-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1082972240 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-1082972240 256)))) (or (and (= |P3Thread1of1ForFork0_#t~ite32_Out-1082972240| ~y~0_In-1082972240) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-1082972240 |P3Thread1of1ForFork0_#t~ite32_Out-1082972240|) (not .cse1) (not .cse0)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1082972240, ~y$w_buff1~0=~y$w_buff1~0_In-1082972240, ~y~0=~y~0_In-1082972240, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1082972240} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1082972240, ~y$w_buff1~0=~y$w_buff1~0_In-1082972240, ~y~0=~y~0_In-1082972240, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-1082972240|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1082972240} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 19:04:10,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L823-4-->L824: Formula: (= v_~y~0_43 |v_P3Thread1of1ForFork0_#t~ite32_12|) InVars {P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_12|} OutVars{~y~0=v_~y~0_43, P3Thread1of1ForFork0_#t~ite33=|v_P3Thread1of1ForFork0_#t~ite33_13|, P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_11|} AuxVars[] AssignedVars[~y~0, P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 19:04:10,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [785] [785] L824-->L824-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1108669482 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1108669482 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1108669482 |P3Thread1of1ForFork0_#t~ite34_Out-1108669482|)) (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out-1108669482|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1108669482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1108669482} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1108669482, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1108669482, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-1108669482|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 19:04:10,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In985980656 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In985980656 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In985980656 |P2Thread1of1ForFork3_#t~ite28_Out985980656|)) (and (= 0 |P2Thread1of1ForFork3_#t~ite28_Out985980656|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In985980656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In985980656} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In985980656, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In985980656, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out985980656|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 19:04:10,064 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L802-->L802-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-288516922 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-288516922 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-288516922 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-288516922 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out-288516922|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork3_#t~ite29_Out-288516922| ~y$w_buff1_used~0_In-288516922)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-288516922, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-288516922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-288516922, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-288516922} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-288516922, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-288516922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-288516922, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out-288516922|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-288516922} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 19:04:10,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L803-->L804: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-575443488 256) 0)) (.cse0 (= ~y$r_buff0_thd3~0_Out-575443488 ~y$r_buff0_thd3~0_In-575443488)) (.cse2 (= (mod ~y$w_buff0_used~0_In-575443488 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (= ~y$r_buff0_thd3~0_Out-575443488 0) (not .cse2)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-575443488, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-575443488} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out-575443488|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-575443488, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-575443488} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 19:04:10,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L804-->L804-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In-991978019 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-991978019 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd3~0_In-991978019 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-991978019 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd3~0_In-991978019 |P2Thread1of1ForFork3_#t~ite31_Out-991978019|)) (and (= 0 |P2Thread1of1ForFork3_#t~ite31_Out-991978019|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-991978019, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-991978019, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991978019, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-991978019} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-991978019, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-991978019, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-991978019, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out-991978019|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-991978019} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 19:04:10,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L804-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork3_#t~ite31_38| v_~y$r_buff1_thd3~0_125) (= v_~__unbuffered_cnt~0_126 (+ v_~__unbuffered_cnt~0_127 1)) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 19:04:10,065 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1423016518 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In1423016518 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1423016518 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd4~0_In1423016518 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1423016518 |P3Thread1of1ForFork0_#t~ite35_Out1423016518|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P3Thread1of1ForFork0_#t~ite35_Out1423016518|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1423016518, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1423016518, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1423016518, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1423016518} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1423016518, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1423016518, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1423016518, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out1423016518|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1423016518} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 19:04:10,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L826-->L826-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In-696570084 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-696570084 256) 0))) (or (and (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out-696570084|) (not .cse1)) (and (= ~y$r_buff0_thd4~0_In-696570084 |P3Thread1of1ForFork0_#t~ite36_Out-696570084|) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-696570084, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-696570084} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-696570084, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-696570084, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-696570084|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 19:04:10,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L827-->L827-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In6878931 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In6878931 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In6878931 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd4~0_In6878931 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork0_#t~ite37_Out6878931|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd4~0_In6878931 |P3Thread1of1ForFork0_#t~ite37_Out6878931|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In6878931, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In6878931, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6878931, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6878931} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In6878931, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In6878931, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6878931, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out6878931|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6878931} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 19:04:10,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L827-2-->P3EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_96 1) v_~__unbuffered_cnt~0_95) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= |v_P3Thread1of1ForFork0_#t~ite37_46| v_~y$r_buff1_thd4~0_61) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_61, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_45|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:04:10,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L764-->L764-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1546547710 256)))) (or (and (= ~y$w_buff0~0_In1546547710 |P1Thread1of1ForFork2_#t~ite8_Out1546547710|) (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1546547710 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In1546547710 256)) (and .cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1546547710 256))) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In1546547710 256))))) (= |P1Thread1of1ForFork2_#t~ite8_Out1546547710| |P1Thread1of1ForFork2_#t~ite9_Out1546547710|) .cse1) (and (= ~y$w_buff0~0_In1546547710 |P1Thread1of1ForFork2_#t~ite9_Out1546547710|) (= |P1Thread1of1ForFork2_#t~ite8_In1546547710| |P1Thread1of1ForFork2_#t~ite8_Out1546547710|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1546547710, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1546547710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In1546547710|, ~y$w_buff0~0=~y$w_buff0~0_In1546547710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1546547710, ~weak$$choice2~0=~weak$$choice2~0_In1546547710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1546547710} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1546547710, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1546547710|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1546547710, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out1546547710|, ~y$w_buff0~0=~y$w_buff0~0_In1546547710, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1546547710, ~weak$$choice2~0=~weak$$choice2~0_In1546547710, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1546547710} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 19:04:10,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L766-->L766-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1448315462 256) 0))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1448315462 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In1448315462 256)) .cse0) (and (= (mod ~y$r_buff1_thd2~0_In1448315462 256) 0) .cse0) (= 0 (mod ~y$w_buff0_used~0_In1448315462 256)))) (= |P1Thread1of1ForFork2_#t~ite14_Out1448315462| |P1Thread1of1ForFork2_#t~ite15_Out1448315462|) .cse1 (= ~y$w_buff0_used~0_In1448315462 |P1Thread1of1ForFork2_#t~ite14_Out1448315462|)) (and (= ~y$w_buff0_used~0_In1448315462 |P1Thread1of1ForFork2_#t~ite15_Out1448315462|) (= |P1Thread1of1ForFork2_#t~ite14_In1448315462| |P1Thread1of1ForFork2_#t~ite14_Out1448315462|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1448315462, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1448315462, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1448315462, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In1448315462|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1448315462} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1448315462, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1448315462, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1448315462, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1448315462|, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out1448315462|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1448315462} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 19:04:10,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L768-->L769: Formula: (and (= v_~y$r_buff0_thd2~0_109 v_~y$r_buff0_thd2~0_108) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_13|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_8|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_5|, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 19:04:10,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L769-->L769-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-302493939 256)))) (or (and .cse0 (= ~y$r_buff1_thd2~0_In-302493939 |P1Thread1of1ForFork2_#t~ite23_Out-302493939|) (= |P1Thread1of1ForFork2_#t~ite23_Out-302493939| |P1Thread1of1ForFork2_#t~ite24_Out-302493939|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-302493939 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-302493939 256)) (and (= (mod ~y$r_buff1_thd2~0_In-302493939 256) 0) .cse1) (and (= (mod ~y$w_buff1_used~0_In-302493939 256) 0) .cse1)))) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite23_In-302493939| |P1Thread1of1ForFork2_#t~ite23_Out-302493939|) (= ~y$r_buff1_thd2~0_In-302493939 |P1Thread1of1ForFork2_#t~ite24_Out-302493939|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-302493939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-302493939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-302493939, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-302493939|, ~weak$$choice2~0=~weak$$choice2~0_In-302493939, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-302493939} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-302493939, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-302493939, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-302493939, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-302493939|, ~weak$$choice2~0=~weak$$choice2~0_In-302493939, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-302493939|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-302493939} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 19:04:10,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L771-->L779: Formula: (and (= 0 v_~y$flush_delayed~0_8) (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= v_~y~0_19 v_~y$mem_tmp~0_4) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_4, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_4, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~y~0=v_~y~0_19, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_9|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 19:04:10,069 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L852-1-->L858: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_15) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:04:10,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L858-2-->L858-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite42_Out-613356867| |ULTIMATE.start_main_#t~ite43_Out-613356867|)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-613356867 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-613356867 256)))) (or (and (= ~y~0_In-613356867 |ULTIMATE.start_main_#t~ite42_Out-613356867|) .cse0 (or .cse1 .cse2)) (and (= |ULTIMATE.start_main_#t~ite42_Out-613356867| ~y$w_buff1~0_In-613356867) .cse0 (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-613356867, ~y~0=~y~0_In-613356867, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-613356867, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613356867} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-613356867, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-613356867|, ~y~0=~y~0_In-613356867, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-613356867|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-613356867, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613356867} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 19:04:10,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L859-->L859-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1982293883 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1982293883 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite44_Out1982293883| ~y$w_buff0_used~0_In1982293883)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out1982293883| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1982293883, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1982293883} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1982293883, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1982293883, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1982293883|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 19:04:10,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L860-->L860-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1115873471 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1115873471 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1115873471 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1115873471 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite45_Out1115873471|)) (and (or .cse1 .cse0) (= ~y$w_buff1_used~0_In1115873471 |ULTIMATE.start_main_#t~ite45_Out1115873471|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1115873471, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1115873471, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1115873471, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1115873471} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1115873471, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1115873471, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1115873471, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1115873471|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1115873471} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 19:04:10,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L861-->L861-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-343173316 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-343173316 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-343173316| 0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-343173316 |ULTIMATE.start_main_#t~ite46_Out-343173316|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-343173316, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-343173316} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-343173316, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-343173316, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-343173316|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 19:04:10,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L862-->L862-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1984533797 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1984533797 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In1984533797 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1984533797 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite47_Out1984533797|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In1984533797 |ULTIMATE.start_main_#t~ite47_Out1984533797|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1984533797, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1984533797, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1984533797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1984533797} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1984533797, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1984533797, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1984533797|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1984533797, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1984533797} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:04:10,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L862-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 2 v_~__unbuffered_p1_EAX~0_26) (= 2 v_~__unbuffered_p3_EAX~0_24) (= v_~__unbuffered_p1_EBX~0_25 0) (= 0 v_~__unbuffered_p3_EBX~0_24) (= v_~x~0_45 2) (= v_~z~0_103 2))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|) (= v_~y$r_buff1_thd0~0_153 |v_ULTIMATE.start_main_#t~ite47_41|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_25, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_26, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_24, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_41|, ~z~0=v_~z~0_103, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_24, ~x~0=v_~x~0_45} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_25, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_26, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_24, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_40|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~z~0=v_~z~0_103, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_24, ~x~0=v_~x~0_45, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:04:10,125 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_604ccb5d-c348-4101-9557-b485ad30db7f/bin/uautomizer/witness.graphml [2019-12-07 19:04:10,125 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:04:10,127 INFO L168 Benchmark]: Toolchain (without parser) took 351048.35 ms. Allocated memory was 1.0 GB in the beginning and 11.4 GB in the end (delta: 10.4 GB). Free memory was 938.2 MB in the beginning and 6.3 GB in the end (delta: -5.4 GB). Peak memory consumption was 5.0 GB. Max. memory is 11.5 GB. [2019-12-07 19:04:10,127 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:04:10,127 INFO L168 Benchmark]: CACSL2BoogieTranslator took 400.94 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -135.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 19:04:10,127 INFO L168 Benchmark]: Boogie Procedure Inliner took 48.77 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:04:10,127 INFO L168 Benchmark]: Boogie Preprocessor took 25.62 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:04:10,128 INFO L168 Benchmark]: RCFGBuilder took 410.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 19:04:10,128 INFO L168 Benchmark]: TraceAbstraction took 350090.10 ms. Allocated memory was 1.1 GB in the beginning and 11.4 GB in the end (delta: 10.3 GB). Free memory was 1.0 GB in the beginning and 6.3 GB in the end (delta: -5.3 GB). Peak memory consumption was 4.9 GB. Max. memory is 11.5 GB. [2019-12-07 19:04:10,128 INFO L168 Benchmark]: Witness Printer took 68.79 ms. Allocated memory is still 11.4 GB. Free memory was 6.3 GB in the beginning and 6.3 GB in the end (delta: 43.6 MB). Peak memory consumption was 43.6 MB. Max. memory is 11.5 GB. [2019-12-07 19:04:10,129 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 400.94 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -135.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 48.77 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.62 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 410.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 350090.10 ms. Allocated memory was 1.1 GB in the beginning and 11.4 GB in the end (delta: 10.3 GB). Free memory was 1.0 GB in the beginning and 6.3 GB in the end (delta: -5.3 GB). Peak memory consumption was 4.9 GB. Max. memory is 11.5 GB. * Witness Printer took 68.79 ms. Allocated memory is still 11.4 GB. Free memory was 6.3 GB in the beginning and 6.3 GB in the end (delta: 43.6 MB). Peak memory consumption was 43.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 181 ProgramPointsBefore, 88 ProgramPointsAfterwards, 209 TransitionsBefore, 95 TransitionsAfterwards, 18126 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 26 ChoiceCompositions, 7917 VarBasedMoverChecksPositive, 267 VarBasedMoverChecksNegative, 87 SemBasedMoverChecksPositive, 235 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 66461 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L846] FCALL, FORK 0 pthread_create(&t621, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L848] FCALL, FORK 0 pthread_create(&t622, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L850] FCALL, FORK 0 pthread_create(&t623, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 3 y$w_buff1 = y$w_buff0 [L785] 3 y$w_buff0 = 1 [L786] 3 y$w_buff1_used = y$w_buff0_used [L787] 3 y$w_buff0_used = (_Bool)1 [L800] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L852] FCALL, FORK 0 pthread_create(&t624, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L814] 4 z = 2 [L817] 4 __unbuffered_p3_EAX = z [L820] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L823] 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 2 x = 2 [L756] 2 __unbuffered_p1_EAX = x [L759] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L760] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L761] 2 y$flush_delayed = weak$$choice2 [L762] 2 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L763] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L763] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L801] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L802] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L824] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L825] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L826] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L764] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L765] EXPR 2 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L765] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L766] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L767] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L767] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L769] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L770] 2 __unbuffered_p1_EBX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L858] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=2, __unbuffered_p1_EBX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L858] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L859] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L860] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L861] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 349.9s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 88.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6329 SDtfs, 8105 SDslu, 19689 SDs, 0 SdLazy, 12418 SolverSat, 502 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 369 GetRequests, 42 SyntacticMatches, 14 SemanticMatches, 313 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2119 ImplicationChecksByTransitivity, 3.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=508969occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 227.5s AutomataMinimizationTime, 32 MinimizatonAttempts, 695309 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1168 NumberOfCodeBlocks, 1168 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 1077 ConstructedInterpolants, 0 QuantifiedInterpolants, 373789 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...