./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 69ee29b23739854aab0ae6f20cab73a3bada3a5d ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:18:05,512 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:18:05,513 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:18:05,521 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:18:05,521 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:18:05,522 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:18:05,523 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:18:05,524 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:18:05,525 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:18:05,526 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:18:05,527 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:18:05,527 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:18:05,528 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:18:05,528 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:18:05,529 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:18:05,530 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:18:05,530 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:18:05,531 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:18:05,532 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:18:05,533 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:18:05,534 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:18:05,535 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:18:05,536 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:18:05,536 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:18:05,538 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:18:05,538 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:18:05,538 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:18:05,539 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:18:05,539 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:18:05,540 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:18:05,540 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:18:05,540 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:18:05,541 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:18:05,541 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:18:05,542 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:18:05,542 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:18:05,542 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:18:05,542 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:18:05,542 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:18:05,543 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:18:05,543 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:18:05,544 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:18:05,553 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:18:05,553 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:18:05,553 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:18:05,554 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:18:05,554 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:18:05,554 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:18:05,554 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:18:05,554 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:18:05,554 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:18:05,554 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:18:05,554 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:18:05,554 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:18:05,555 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:18:05,555 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:18:05,556 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:18:05,556 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:18:05,556 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:18:05,556 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:18:05,556 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:18:05,556 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:18:05,556 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:18:05,556 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 69ee29b23739854aab0ae6f20cab73a3bada3a5d [2019-12-07 12:18:05,656 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:18:05,664 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:18:05,666 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:18:05,667 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:18:05,667 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:18:05,668 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix024_power.opt.i [2019-12-07 12:18:05,705 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/data/d8fa1081e/a1cd51878bfc4fcd8044bdbd1dfb9ba1/FLAGf73d6a869 [2019-12-07 12:18:06,071 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:18:06,072 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/sv-benchmarks/c/pthread-wmm/mix024_power.opt.i [2019-12-07 12:18:06,082 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/data/d8fa1081e/a1cd51878bfc4fcd8044bdbd1dfb9ba1/FLAGf73d6a869 [2019-12-07 12:18:06,090 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/data/d8fa1081e/a1cd51878bfc4fcd8044bdbd1dfb9ba1 [2019-12-07 12:18:06,092 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:18:06,093 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:18:06,094 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:18:06,094 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:18:06,096 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:18:06,097 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,098 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06, skipping insertion in model container [2019-12-07 12:18:06,099 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,103 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:18:06,131 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:18:06,366 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:18:06,374 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:18:06,415 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:18:06,460 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:18:06,461 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06 WrapperNode [2019-12-07 12:18:06,461 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:18:06,461 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:18:06,461 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:18:06,461 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:18:06,467 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,479 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,497 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:18:06,497 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:18:06,497 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:18:06,497 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:18:06,503 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,503 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,506 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,507 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,513 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,516 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,518 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... [2019-12-07 12:18:06,521 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:18:06,521 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:18:06,521 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:18:06,521 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:18:06,522 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:18:06,562 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:18:06,562 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:18:06,562 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:18:06,562 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:18:06,562 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:18:06,562 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:18:06,562 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:18:06,562 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:18:06,563 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:18:06,563 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:18:06,563 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:18:06,563 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:18:06,563 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:18:06,564 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:18:06,922 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:18:06,922 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:18:06,923 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:18:06 BoogieIcfgContainer [2019-12-07 12:18:06,923 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:18:06,924 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:18:06,924 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:18:06,925 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:18:06,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:18:06" (1/3) ... [2019-12-07 12:18:06,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e9f32be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:18:06, skipping insertion in model container [2019-12-07 12:18:06,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:18:06" (2/3) ... [2019-12-07 12:18:06,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e9f32be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:18:06, skipping insertion in model container [2019-12-07 12:18:06,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:18:06" (3/3) ... [2019-12-07 12:18:06,927 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_power.opt.i [2019-12-07 12:18:06,933 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:18:06,934 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:18:06,938 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:18:06,939 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:18:06,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,963 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,963 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,966 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,967 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,968 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,969 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,970 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,971 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,972 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,973 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,973 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,973 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,973 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,973 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,973 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:18:06,994 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:18:07,008 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:18:07,008 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:18:07,009 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:18:07,009 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:18:07,009 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:18:07,009 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:18:07,009 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:18:07,009 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:18:07,020 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 166 places, 197 transitions [2019-12-07 12:18:07,021 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 166 places, 197 transitions [2019-12-07 12:18:07,090 INFO L134 PetriNetUnfolder]: 41/194 cut-off events. [2019-12-07 12:18:07,090 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:18:07,101 INFO L76 FinitePrefix]: Finished finitePrefix Result has 204 conditions, 194 events. 41/194 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 709 event pairs. 9/160 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 12:18:07,115 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 166 places, 197 transitions [2019-12-07 12:18:07,142 INFO L134 PetriNetUnfolder]: 41/194 cut-off events. [2019-12-07 12:18:07,142 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:18:07,147 INFO L76 FinitePrefix]: Finished finitePrefix Result has 204 conditions, 194 events. 41/194 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 709 event pairs. 9/160 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 12:18:07,161 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 12:18:07,162 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:18:10,089 WARN L192 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 48 [2019-12-07 12:18:10,534 WARN L192 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 12:18:10,641 INFO L206 etLargeBlockEncoding]: Checked pairs total: 74173 [2019-12-07 12:18:10,641 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 12:18:10,643 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 90 transitions [2019-12-07 12:18:19,460 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 82802 states. [2019-12-07 12:18:19,461 INFO L276 IsEmpty]: Start isEmpty. Operand 82802 states. [2019-12-07 12:18:19,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 12:18:19,465 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:19,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 12:18:19,466 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:19,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:19,470 INFO L82 PathProgramCache]: Analyzing trace with hash 803939489, now seen corresponding path program 1 times [2019-12-07 12:18:19,475 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:19,475 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236955388] [2019-12-07 12:18:19,475 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:19,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:19,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:19,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1236955388] [2019-12-07 12:18:19,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:19,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:18:19,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [741885563] [2019-12-07 12:18:19,626 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:19,626 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:19,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:19,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:19,636 INFO L87 Difference]: Start difference. First operand 82802 states. Second operand 3 states. [2019-12-07 12:18:20,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:20,201 INFO L93 Difference]: Finished difference Result 81762 states and 350164 transitions. [2019-12-07 12:18:20,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:18:20,202 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 12:18:20,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:20,616 INFO L225 Difference]: With dead ends: 81762 [2019-12-07 12:18:20,616 INFO L226 Difference]: Without dead ends: 77082 [2019-12-07 12:18:20,617 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:23,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77082 states. [2019-12-07 12:18:24,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77082 to 77082. [2019-12-07 12:18:24,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77082 states. [2019-12-07 12:18:24,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77082 states to 77082 states and 329650 transitions. [2019-12-07 12:18:24,997 INFO L78 Accepts]: Start accepts. Automaton has 77082 states and 329650 transitions. Word has length 5 [2019-12-07 12:18:24,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:24,998 INFO L462 AbstractCegarLoop]: Abstraction has 77082 states and 329650 transitions. [2019-12-07 12:18:24,998 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:18:24,998 INFO L276 IsEmpty]: Start isEmpty. Operand 77082 states and 329650 transitions. [2019-12-07 12:18:25,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:18:25,007 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:25,007 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:25,008 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:25,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:25,008 INFO L82 PathProgramCache]: Analyzing trace with hash -1596901179, now seen corresponding path program 1 times [2019-12-07 12:18:25,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:25,009 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [111097346] [2019-12-07 12:18:25,009 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:25,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:25,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:25,078 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [111097346] [2019-12-07 12:18:25,079 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:25,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:25,079 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1876387507] [2019-12-07 12:18:25,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:25,080 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:25,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:25,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:25,081 INFO L87 Difference]: Start difference. First operand 77082 states and 329650 transitions. Second operand 4 states. [2019-12-07 12:18:25,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:25,813 INFO L93 Difference]: Finished difference Result 118758 states and 487540 transitions. [2019-12-07 12:18:25,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:25,814 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:18:25,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:26,183 INFO L225 Difference]: With dead ends: 118758 [2019-12-07 12:18:26,183 INFO L226 Difference]: Without dead ends: 118660 [2019-12-07 12:18:26,184 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:31,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118660 states. [2019-12-07 12:18:32,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118660 to 107371. [2019-12-07 12:18:32,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107371 states. [2019-12-07 12:18:33,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107371 states to 107371 states and 446647 transitions. [2019-12-07 12:18:33,244 INFO L78 Accepts]: Start accepts. Automaton has 107371 states and 446647 transitions. Word has length 13 [2019-12-07 12:18:33,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:33,245 INFO L462 AbstractCegarLoop]: Abstraction has 107371 states and 446647 transitions. [2019-12-07 12:18:33,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:33,245 INFO L276 IsEmpty]: Start isEmpty. Operand 107371 states and 446647 transitions. [2019-12-07 12:18:33,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:18:33,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:33,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:33,248 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:33,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:33,248 INFO L82 PathProgramCache]: Analyzing trace with hash -1662041210, now seen corresponding path program 1 times [2019-12-07 12:18:33,248 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:33,248 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748677110] [2019-12-07 12:18:33,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:33,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:33,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:33,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748677110] [2019-12-07 12:18:33,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:33,296 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:33,296 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [304807922] [2019-12-07 12:18:33,296 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:33,296 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:33,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:33,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:33,297 INFO L87 Difference]: Start difference. First operand 107371 states and 446647 transitions. Second operand 4 states. [2019-12-07 12:18:34,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:34,064 INFO L93 Difference]: Finished difference Result 153469 states and 623983 transitions. [2019-12-07 12:18:34,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:34,065 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:18:34,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:34,458 INFO L225 Difference]: With dead ends: 153469 [2019-12-07 12:18:34,458 INFO L226 Difference]: Without dead ends: 153357 [2019-12-07 12:18:34,458 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:38,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153357 states. [2019-12-07 12:18:41,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153357 to 127765. [2019-12-07 12:18:41,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127765 states. [2019-12-07 12:18:42,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127765 states to 127765 states and 528908 transitions. [2019-12-07 12:18:42,335 INFO L78 Accepts]: Start accepts. Automaton has 127765 states and 528908 transitions. Word has length 13 [2019-12-07 12:18:42,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:42,335 INFO L462 AbstractCegarLoop]: Abstraction has 127765 states and 528908 transitions. [2019-12-07 12:18:42,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:42,335 INFO L276 IsEmpty]: Start isEmpty. Operand 127765 states and 528908 transitions. [2019-12-07 12:18:42,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 12:18:42,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:42,338 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:42,339 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:42,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:42,339 INFO L82 PathProgramCache]: Analyzing trace with hash -1480512145, now seen corresponding path program 1 times [2019-12-07 12:18:42,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:42,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210363757] [2019-12-07 12:18:42,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:42,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:42,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:42,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210363757] [2019-12-07 12:18:42,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:42,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:42,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1160129428] [2019-12-07 12:18:42,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:42,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:42,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:42,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:42,390 INFO L87 Difference]: Start difference. First operand 127765 states and 528908 transitions. Second operand 4 states. [2019-12-07 12:18:43,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:43,173 INFO L93 Difference]: Finished difference Result 160444 states and 657575 transitions. [2019-12-07 12:18:43,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:43,174 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 12:18:43,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:43,573 INFO L225 Difference]: With dead ends: 160444 [2019-12-07 12:18:43,573 INFO L226 Difference]: Without dead ends: 160348 [2019-12-07 12:18:43,573 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:47,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160348 states. [2019-12-07 12:18:49,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160348 to 137301. [2019-12-07 12:18:49,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137301 states. [2019-12-07 12:18:50,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137301 states to 137301 states and 567564 transitions. [2019-12-07 12:18:50,180 INFO L78 Accepts]: Start accepts. Automaton has 137301 states and 567564 transitions. Word has length 14 [2019-12-07 12:18:50,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:50,180 INFO L462 AbstractCegarLoop]: Abstraction has 137301 states and 567564 transitions. [2019-12-07 12:18:50,180 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:50,180 INFO L276 IsEmpty]: Start isEmpty. Operand 137301 states and 567564 transitions. [2019-12-07 12:18:50,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 12:18:50,183 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:50,184 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:50,184 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:50,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:50,184 INFO L82 PathProgramCache]: Analyzing trace with hash -1480362260, now seen corresponding path program 1 times [2019-12-07 12:18:50,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:50,184 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048640955] [2019-12-07 12:18:50,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:50,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:50,216 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:50,216 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048640955] [2019-12-07 12:18:50,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:50,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:18:50,217 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815000159] [2019-12-07 12:18:50,217 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:18:50,217 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:50,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:18:50,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:18:50,218 INFO L87 Difference]: Start difference. First operand 137301 states and 567564 transitions. Second operand 4 states. [2019-12-07 12:18:51,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:18:51,066 INFO L93 Difference]: Finished difference Result 167178 states and 684930 transitions. [2019-12-07 12:18:51,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:18:51,067 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 12:18:51,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:18:51,481 INFO L225 Difference]: With dead ends: 167178 [2019-12-07 12:18:51,481 INFO L226 Difference]: Without dead ends: 167082 [2019-12-07 12:18:51,481 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:18:57,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167082 states. [2019-12-07 12:18:59,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167082 to 137896. [2019-12-07 12:18:59,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137896 states. [2019-12-07 12:18:59,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137896 states to 137896 states and 569623 transitions. [2019-12-07 12:18:59,661 INFO L78 Accepts]: Start accepts. Automaton has 137896 states and 569623 transitions. Word has length 14 [2019-12-07 12:18:59,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:18:59,661 INFO L462 AbstractCegarLoop]: Abstraction has 137896 states and 569623 transitions. [2019-12-07 12:18:59,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:18:59,661 INFO L276 IsEmpty]: Start isEmpty. Operand 137896 states and 569623 transitions. [2019-12-07 12:18:59,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:18:59,675 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:18:59,676 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:18:59,676 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:18:59,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:18:59,676 INFO L82 PathProgramCache]: Analyzing trace with hash 469306307, now seen corresponding path program 1 times [2019-12-07 12:18:59,676 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:18:59,677 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96781810] [2019-12-07 12:18:59,677 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:18:59,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:18:59,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:18:59,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96781810] [2019-12-07 12:18:59,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:18:59,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:18:59,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092274528] [2019-12-07 12:18:59,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:18:59,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:18:59,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:18:59,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:18:59,740 INFO L87 Difference]: Start difference. First operand 137896 states and 569623 transitions. Second operand 3 states. [2019-12-07 12:19:00,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:00,841 INFO L93 Difference]: Finished difference Result 247713 states and 1017233 transitions. [2019-12-07 12:19:00,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:19:00,841 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:19:00,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:01,468 INFO L225 Difference]: With dead ends: 247713 [2019-12-07 12:19:01,468 INFO L226 Difference]: Without dead ends: 238809 [2019-12-07 12:19:01,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:06,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238809 states. [2019-12-07 12:19:10,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238809 to 230373. [2019-12-07 12:19:10,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230373 states. [2019-12-07 12:19:13,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230373 states to 230373 states and 953976 transitions. [2019-12-07 12:19:13,948 INFO L78 Accepts]: Start accepts. Automaton has 230373 states and 953976 transitions. Word has length 18 [2019-12-07 12:19:13,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:13,948 INFO L462 AbstractCegarLoop]: Abstraction has 230373 states and 953976 transitions. [2019-12-07 12:19:13,948 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:19:13,948 INFO L276 IsEmpty]: Start isEmpty. Operand 230373 states and 953976 transitions. [2019-12-07 12:19:13,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:19:13,968 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:13,969 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:13,969 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:13,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:13,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1349290321, now seen corresponding path program 1 times [2019-12-07 12:19:13,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:13,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484774650] [2019-12-07 12:19:13,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:13,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:14,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:14,002 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484774650] [2019-12-07 12:19:14,002 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:14,002 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:19:14,002 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476765702] [2019-12-07 12:19:14,002 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:19:14,003 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:14,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:19:14,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:14,003 INFO L87 Difference]: Start difference. First operand 230373 states and 953976 transitions. Second operand 3 states. [2019-12-07 12:19:14,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:14,164 INFO L93 Difference]: Finished difference Result 49387 states and 164067 transitions. [2019-12-07 12:19:14,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:19:14,165 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 12:19:14,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:14,248 INFO L225 Difference]: With dead ends: 49387 [2019-12-07 12:19:14,248 INFO L226 Difference]: Without dead ends: 49387 [2019-12-07 12:19:14,249 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:14,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49387 states. [2019-12-07 12:19:14,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49387 to 49387. [2019-12-07 12:19:14,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49387 states. [2019-12-07 12:19:15,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49387 states to 49387 states and 164067 transitions. [2019-12-07 12:19:15,095 INFO L78 Accepts]: Start accepts. Automaton has 49387 states and 164067 transitions. Word has length 19 [2019-12-07 12:19:15,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:15,095 INFO L462 AbstractCegarLoop]: Abstraction has 49387 states and 164067 transitions. [2019-12-07 12:19:15,095 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:19:15,095 INFO L276 IsEmpty]: Start isEmpty. Operand 49387 states and 164067 transitions. [2019-12-07 12:19:15,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:19:15,104 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:15,104 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:15,104 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:15,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:15,104 INFO L82 PathProgramCache]: Analyzing trace with hash 2067973460, now seen corresponding path program 1 times [2019-12-07 12:19:15,104 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:15,105 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [734934725] [2019-12-07 12:19:15,105 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:15,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:15,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:15,157 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [734934725] [2019-12-07 12:19:15,157 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:15,157 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:15,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107577417] [2019-12-07 12:19:15,158 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:19:15,158 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:15,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:19:15,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:19:15,158 INFO L87 Difference]: Start difference. First operand 49387 states and 164067 transitions. Second operand 5 states. [2019-12-07 12:19:15,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:15,612 INFO L93 Difference]: Finished difference Result 69542 states and 228033 transitions. [2019-12-07 12:19:15,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:19:15,613 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:19:15,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:15,727 INFO L225 Difference]: With dead ends: 69542 [2019-12-07 12:19:15,727 INFO L226 Difference]: Without dead ends: 69519 [2019-12-07 12:19:15,727 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:19:15,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69519 states. [2019-12-07 12:19:16,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69519 to 51749. [2019-12-07 12:19:16,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51749 states. [2019-12-07 12:19:16,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51749 states to 51749 states and 171816 transitions. [2019-12-07 12:19:16,989 INFO L78 Accepts]: Start accepts. Automaton has 51749 states and 171816 transitions. Word has length 22 [2019-12-07 12:19:16,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:16,989 INFO L462 AbstractCegarLoop]: Abstraction has 51749 states and 171816 transitions. [2019-12-07 12:19:16,989 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:19:16,989 INFO L276 IsEmpty]: Start isEmpty. Operand 51749 states and 171816 transitions. [2019-12-07 12:19:16,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:19:16,999 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:16,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:16,999 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:16,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:16,999 INFO L82 PathProgramCache]: Analyzing trace with hash 2068123345, now seen corresponding path program 1 times [2019-12-07 12:19:17,000 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:17,000 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [428054412] [2019-12-07 12:19:17,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:17,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:17,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:17,054 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [428054412] [2019-12-07 12:19:17,054 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:17,054 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:17,055 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199020518] [2019-12-07 12:19:17,055 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:19:17,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:17,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:19:17,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:19:17,055 INFO L87 Difference]: Start difference. First operand 51749 states and 171816 transitions. Second operand 5 states. [2019-12-07 12:19:17,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:17,529 INFO L93 Difference]: Finished difference Result 71039 states and 232624 transitions. [2019-12-07 12:19:17,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:19:17,529 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:19:17,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:17,645 INFO L225 Difference]: With dead ends: 71039 [2019-12-07 12:19:17,645 INFO L226 Difference]: Without dead ends: 71016 [2019-12-07 12:19:17,645 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:19:17,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71016 states. [2019-12-07 12:19:18,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71016 to 49419. [2019-12-07 12:19:18,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49419 states. [2019-12-07 12:19:18,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49419 states to 49419 states and 163893 transitions. [2019-12-07 12:19:18,664 INFO L78 Accepts]: Start accepts. Automaton has 49419 states and 163893 transitions. Word has length 22 [2019-12-07 12:19:18,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:18,664 INFO L462 AbstractCegarLoop]: Abstraction has 49419 states and 163893 transitions. [2019-12-07 12:19:18,664 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:19:18,664 INFO L276 IsEmpty]: Start isEmpty. Operand 49419 states and 163893 transitions. [2019-12-07 12:19:18,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:19:18,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:18,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:18,682 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:18,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:18,682 INFO L82 PathProgramCache]: Analyzing trace with hash 668919418, now seen corresponding path program 1 times [2019-12-07 12:19:18,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:18,682 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305142271] [2019-12-07 12:19:18,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:18,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:18,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:18,724 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305142271] [2019-12-07 12:19:18,724 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:18,724 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:18,725 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96809898] [2019-12-07 12:19:18,725 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:19:18,725 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:18,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:19:18,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:19:18,725 INFO L87 Difference]: Start difference. First operand 49419 states and 163893 transitions. Second operand 5 states. [2019-12-07 12:19:19,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:19,130 INFO L93 Difference]: Finished difference Result 66306 states and 215743 transitions. [2019-12-07 12:19:19,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:19:19,131 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:19:19,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:19,237 INFO L225 Difference]: With dead ends: 66306 [2019-12-07 12:19:19,237 INFO L226 Difference]: Without dead ends: 66281 [2019-12-07 12:19:19,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:19:19,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66281 states. [2019-12-07 12:19:20,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66281 to 56163. [2019-12-07 12:19:20,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56163 states. [2019-12-07 12:19:20,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56163 states to 56163 states and 184773 transitions. [2019-12-07 12:19:20,477 INFO L78 Accepts]: Start accepts. Automaton has 56163 states and 184773 transitions. Word has length 25 [2019-12-07 12:19:20,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:20,477 INFO L462 AbstractCegarLoop]: Abstraction has 56163 states and 184773 transitions. [2019-12-07 12:19:20,477 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:19:20,478 INFO L276 IsEmpty]: Start isEmpty. Operand 56163 states and 184773 transitions. [2019-12-07 12:19:20,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:19:20,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:20,502 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:20,502 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:20,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:20,502 INFO L82 PathProgramCache]: Analyzing trace with hash 531742436, now seen corresponding path program 1 times [2019-12-07 12:19:20,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:20,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176189954] [2019-12-07 12:19:20,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:20,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:20,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:20,523 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176189954] [2019-12-07 12:19:20,523 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:20,523 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:20,523 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [356659570] [2019-12-07 12:19:20,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:19:20,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:20,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:19:20,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:20,524 INFO L87 Difference]: Start difference. First operand 56163 states and 184773 transitions. Second operand 3 states. [2019-12-07 12:19:20,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:20,746 INFO L93 Difference]: Finished difference Result 71526 states and 234237 transitions. [2019-12-07 12:19:20,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:19:20,747 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:19:20,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:20,863 INFO L225 Difference]: With dead ends: 71526 [2019-12-07 12:19:20,863 INFO L226 Difference]: Without dead ends: 71526 [2019-12-07 12:19:20,863 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:21,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71526 states. [2019-12-07 12:19:21,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71526 to 57514. [2019-12-07 12:19:21,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57514 states. [2019-12-07 12:19:21,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57514 states to 57514 states and 189115 transitions. [2019-12-07 12:19:21,939 INFO L78 Accepts]: Start accepts. Automaton has 57514 states and 189115 transitions. Word has length 27 [2019-12-07 12:19:21,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:21,939 INFO L462 AbstractCegarLoop]: Abstraction has 57514 states and 189115 transitions. [2019-12-07 12:19:21,939 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:19:21,939 INFO L276 IsEmpty]: Start isEmpty. Operand 57514 states and 189115 transitions. [2019-12-07 12:19:21,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:19:21,962 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:21,962 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:21,963 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:21,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:21,963 INFO L82 PathProgramCache]: Analyzing trace with hash 93136807, now seen corresponding path program 1 times [2019-12-07 12:19:21,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:21,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1797667178] [2019-12-07 12:19:21,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:21,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:22,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:22,004 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1797667178] [2019-12-07 12:19:22,004 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:22,004 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:22,004 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065322141] [2019-12-07 12:19:22,004 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:19:22,004 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:22,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:19:22,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:19:22,005 INFO L87 Difference]: Start difference. First operand 57514 states and 189115 transitions. Second operand 5 states. [2019-12-07 12:19:22,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:22,360 INFO L93 Difference]: Finished difference Result 68962 states and 224492 transitions. [2019-12-07 12:19:22,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:19:22,360 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 12:19:22,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:22,470 INFO L225 Difference]: With dead ends: 68962 [2019-12-07 12:19:22,470 INFO L226 Difference]: Without dead ends: 68940 [2019-12-07 12:19:22,471 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:19:22,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68940 states. [2019-12-07 12:19:23,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68940 to 59526. [2019-12-07 12:19:23,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59526 states. [2019-12-07 12:19:23,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59526 states to 59526 states and 195586 transitions. [2019-12-07 12:19:23,721 INFO L78 Accepts]: Start accepts. Automaton has 59526 states and 195586 transitions. Word has length 27 [2019-12-07 12:19:23,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:23,721 INFO L462 AbstractCegarLoop]: Abstraction has 59526 states and 195586 transitions. [2019-12-07 12:19:23,721 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:19:23,721 INFO L276 IsEmpty]: Start isEmpty. Operand 59526 states and 195586 transitions. [2019-12-07 12:19:23,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 12:19:23,740 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:23,740 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:23,740 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:23,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:23,740 INFO L82 PathProgramCache]: Analyzing trace with hash -732588729, now seen corresponding path program 1 times [2019-12-07 12:19:23,741 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:23,741 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344264993] [2019-12-07 12:19:23,741 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:23,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:23,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:23,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344264993] [2019-12-07 12:19:23,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:23,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:23,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1084908916] [2019-12-07 12:19:23,762 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:19:23,762 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:23,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:19:23,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:23,763 INFO L87 Difference]: Start difference. First operand 59526 states and 195586 transitions. Second operand 3 states. [2019-12-07 12:19:23,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:23,994 INFO L93 Difference]: Finished difference Result 73809 states and 238683 transitions. [2019-12-07 12:19:23,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:19:23,995 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 12:19:23,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:24,113 INFO L225 Difference]: With dead ends: 73809 [2019-12-07 12:19:24,113 INFO L226 Difference]: Without dead ends: 73809 [2019-12-07 12:19:24,113 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:24,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73809 states. [2019-12-07 12:19:25,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73809 to 64381. [2019-12-07 12:19:25,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64381 states. [2019-12-07 12:19:25,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64381 states to 64381 states and 207308 transitions. [2019-12-07 12:19:25,245 INFO L78 Accepts]: Start accepts. Automaton has 64381 states and 207308 transitions. Word has length 27 [2019-12-07 12:19:25,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:25,245 INFO L462 AbstractCegarLoop]: Abstraction has 64381 states and 207308 transitions. [2019-12-07 12:19:25,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:19:25,245 INFO L276 IsEmpty]: Start isEmpty. Operand 64381 states and 207308 transitions. [2019-12-07 12:19:25,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:19:25,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:25,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:25,276 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:25,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:25,277 INFO L82 PathProgramCache]: Analyzing trace with hash -1145591812, now seen corresponding path program 1 times [2019-12-07 12:19:25,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:25,277 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493840099] [2019-12-07 12:19:25,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:25,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:25,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:25,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493840099] [2019-12-07 12:19:25,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:25,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:25,325 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2064424136] [2019-12-07 12:19:25,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:19:25,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:25,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:19:25,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:19:25,325 INFO L87 Difference]: Start difference. First operand 64381 states and 207308 transitions. Second operand 5 states. [2019-12-07 12:19:25,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:25,728 INFO L93 Difference]: Finished difference Result 77172 states and 246006 transitions. [2019-12-07 12:19:25,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:19:25,729 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 12:19:25,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:25,846 INFO L225 Difference]: With dead ends: 77172 [2019-12-07 12:19:25,846 INFO L226 Difference]: Without dead ends: 77148 [2019-12-07 12:19:25,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:19:26,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77148 states. [2019-12-07 12:19:27,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77148 to 63975. [2019-12-07 12:19:27,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63975 states. [2019-12-07 12:19:27,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63975 states to 63975 states and 205763 transitions. [2019-12-07 12:19:27,196 INFO L78 Accepts]: Start accepts. Automaton has 63975 states and 205763 transitions. Word has length 29 [2019-12-07 12:19:27,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:27,197 INFO L462 AbstractCegarLoop]: Abstraction has 63975 states and 205763 transitions. [2019-12-07 12:19:27,197 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:19:27,197 INFO L276 IsEmpty]: Start isEmpty. Operand 63975 states and 205763 transitions. [2019-12-07 12:19:27,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 12:19:27,227 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:27,227 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:27,227 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:27,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:27,227 INFO L82 PathProgramCache]: Analyzing trace with hash -1022577234, now seen corresponding path program 1 times [2019-12-07 12:19:27,227 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:27,227 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544003404] [2019-12-07 12:19:27,227 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:27,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:27,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:27,272 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544003404] [2019-12-07 12:19:27,272 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:27,272 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:19:27,272 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937864259] [2019-12-07 12:19:27,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:19:27,272 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:27,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:19:27,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:27,273 INFO L87 Difference]: Start difference. First operand 63975 states and 205763 transitions. Second operand 3 states. [2019-12-07 12:19:27,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:27,448 INFO L93 Difference]: Finished difference Result 61356 states and 195194 transitions. [2019-12-07 12:19:27,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:19:27,449 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 12:19:27,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:27,539 INFO L225 Difference]: With dead ends: 61356 [2019-12-07 12:19:27,539 INFO L226 Difference]: Without dead ends: 61356 [2019-12-07 12:19:27,539 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:27,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61356 states. [2019-12-07 12:19:28,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61356 to 57639. [2019-12-07 12:19:28,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57639 states. [2019-12-07 12:19:28,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57639 states to 57639 states and 183797 transitions. [2019-12-07 12:19:28,483 INFO L78 Accepts]: Start accepts. Automaton has 57639 states and 183797 transitions. Word has length 29 [2019-12-07 12:19:28,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:28,484 INFO L462 AbstractCegarLoop]: Abstraction has 57639 states and 183797 transitions. [2019-12-07 12:19:28,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:19:28,484 INFO L276 IsEmpty]: Start isEmpty. Operand 57639 states and 183797 transitions. [2019-12-07 12:19:28,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 12:19:28,507 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:28,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:28,508 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:28,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:28,508 INFO L82 PathProgramCache]: Analyzing trace with hash 1615636270, now seen corresponding path program 1 times [2019-12-07 12:19:28,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:28,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304250899] [2019-12-07 12:19:28,508 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:28,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:28,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:28,535 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304250899] [2019-12-07 12:19:28,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:28,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:28,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [359733644] [2019-12-07 12:19:28,536 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:19:28,536 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:28,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:19:28,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:19:28,536 INFO L87 Difference]: Start difference. First operand 57639 states and 183797 transitions. Second operand 4 states. [2019-12-07 12:19:28,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:28,605 INFO L93 Difference]: Finished difference Result 21372 states and 64898 transitions. [2019-12-07 12:19:28,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:19:28,606 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 12:19:28,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:28,631 INFO L225 Difference]: With dead ends: 21372 [2019-12-07 12:19:28,631 INFO L226 Difference]: Without dead ends: 21372 [2019-12-07 12:19:28,632 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:19:28,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21372 states. [2019-12-07 12:19:29,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21372 to 20046. [2019-12-07 12:19:29,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20046 states. [2019-12-07 12:19:29,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20046 states to 20046 states and 60695 transitions. [2019-12-07 12:19:29,099 INFO L78 Accepts]: Start accepts. Automaton has 20046 states and 60695 transitions. Word has length 30 [2019-12-07 12:19:29,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:29,100 INFO L462 AbstractCegarLoop]: Abstraction has 20046 states and 60695 transitions. [2019-12-07 12:19:29,100 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:19:29,100 INFO L276 IsEmpty]: Start isEmpty. Operand 20046 states and 60695 transitions. [2019-12-07 12:19:29,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 12:19:29,116 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:29,116 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:29,116 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:29,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:29,117 INFO L82 PathProgramCache]: Analyzing trace with hash 515851026, now seen corresponding path program 1 times [2019-12-07 12:19:29,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:29,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64187116] [2019-12-07 12:19:29,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:29,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:29,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:29,162 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64187116] [2019-12-07 12:19:29,162 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:29,162 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:19:29,162 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300305148] [2019-12-07 12:19:29,163 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:19:29,163 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:29,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:19:29,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:19:29,163 INFO L87 Difference]: Start difference. First operand 20046 states and 60695 transitions. Second operand 6 states. [2019-12-07 12:19:29,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:29,542 INFO L93 Difference]: Finished difference Result 25324 states and 74837 transitions. [2019-12-07 12:19:29,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:19:29,543 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 12:19:29,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:29,573 INFO L225 Difference]: With dead ends: 25324 [2019-12-07 12:19:29,574 INFO L226 Difference]: Without dead ends: 25322 [2019-12-07 12:19:29,574 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:19:29,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25322 states. [2019-12-07 12:19:29,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25322 to 20044. [2019-12-07 12:19:29,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20044 states. [2019-12-07 12:19:29,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20044 states to 20044 states and 60670 transitions. [2019-12-07 12:19:29,911 INFO L78 Accepts]: Start accepts. Automaton has 20044 states and 60670 transitions. Word has length 39 [2019-12-07 12:19:29,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:29,911 INFO L462 AbstractCegarLoop]: Abstraction has 20044 states and 60670 transitions. [2019-12-07 12:19:29,911 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:19:29,911 INFO L276 IsEmpty]: Start isEmpty. Operand 20044 states and 60670 transitions. [2019-12-07 12:19:29,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:19:29,929 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:29,929 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:29,929 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:29,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:29,929 INFO L82 PathProgramCache]: Analyzing trace with hash -196938027, now seen corresponding path program 1 times [2019-12-07 12:19:29,929 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:29,929 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239467174] [2019-12-07 12:19:29,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:29,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:29,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:29,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239467174] [2019-12-07 12:19:29,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:29,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:19:29,960 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1218176813] [2019-12-07 12:19:29,960 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:19:29,960 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:29,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:19:29,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:29,961 INFO L87 Difference]: Start difference. First operand 20044 states and 60670 transitions. Second operand 3 states. [2019-12-07 12:19:30,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:30,023 INFO L93 Difference]: Finished difference Result 20044 states and 59839 transitions. [2019-12-07 12:19:30,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:19:30,024 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 12:19:30,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:30,048 INFO L225 Difference]: With dead ends: 20044 [2019-12-07 12:19:30,048 INFO L226 Difference]: Without dead ends: 20044 [2019-12-07 12:19:30,048 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:30,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20044 states. [2019-12-07 12:19:30,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20044 to 19434. [2019-12-07 12:19:30,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19434 states. [2019-12-07 12:19:30,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19434 states to 19434 states and 58088 transitions. [2019-12-07 12:19:30,313 INFO L78 Accepts]: Start accepts. Automaton has 19434 states and 58088 transitions. Word has length 40 [2019-12-07 12:19:30,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:30,314 INFO L462 AbstractCegarLoop]: Abstraction has 19434 states and 58088 transitions. [2019-12-07 12:19:30,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:19:30,314 INFO L276 IsEmpty]: Start isEmpty. Operand 19434 states and 58088 transitions. [2019-12-07 12:19:30,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:19:30,329 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:30,329 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:30,330 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:30,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:30,330 INFO L82 PathProgramCache]: Analyzing trace with hash 1355846823, now seen corresponding path program 1 times [2019-12-07 12:19:30,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:30,330 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374389266] [2019-12-07 12:19:30,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:30,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:30,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:30,385 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374389266] [2019-12-07 12:19:30,385 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:30,385 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:19:30,385 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833209629] [2019-12-07 12:19:30,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:19:30,385 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:30,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:19:30,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:19:30,386 INFO L87 Difference]: Start difference. First operand 19434 states and 58088 transitions. Second operand 6 states. [2019-12-07 12:19:30,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:30,745 INFO L93 Difference]: Finished difference Result 23553 states and 69035 transitions. [2019-12-07 12:19:30,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:19:30,745 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 12:19:30,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:30,770 INFO L225 Difference]: With dead ends: 23553 [2019-12-07 12:19:30,770 INFO L226 Difference]: Without dead ends: 23551 [2019-12-07 12:19:30,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:19:30,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23551 states. [2019-12-07 12:19:31,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23551 to 18272. [2019-12-07 12:19:31,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18272 states. [2019-12-07 12:19:31,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18272 states to 18272 states and 54809 transitions. [2019-12-07 12:19:31,065 INFO L78 Accepts]: Start accepts. Automaton has 18272 states and 54809 transitions. Word has length 41 [2019-12-07 12:19:31,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:31,065 INFO L462 AbstractCegarLoop]: Abstraction has 18272 states and 54809 transitions. [2019-12-07 12:19:31,065 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:19:31,065 INFO L276 IsEmpty]: Start isEmpty. Operand 18272 states and 54809 transitions. [2019-12-07 12:19:31,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 12:19:31,081 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:31,081 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:31,081 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:31,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:31,081 INFO L82 PathProgramCache]: Analyzing trace with hash -1293363195, now seen corresponding path program 1 times [2019-12-07 12:19:31,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:31,081 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616254663] [2019-12-07 12:19:31,081 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:31,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:31,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:31,248 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616254663] [2019-12-07 12:19:31,248 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:31,249 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:19:31,249 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932216644] [2019-12-07 12:19:31,249 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 12:19:31,249 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:31,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:19:31,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:19:31,249 INFO L87 Difference]: Start difference. First operand 18272 states and 54809 transitions. Second operand 10 states. [2019-12-07 12:19:31,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:31,520 INFO L93 Difference]: Finished difference Result 19664 states and 59127 transitions. [2019-12-07 12:19:31,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 12:19:31,520 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2019-12-07 12:19:31,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:31,542 INFO L225 Difference]: With dead ends: 19664 [2019-12-07 12:19:31,542 INFO L226 Difference]: Without dead ends: 19664 [2019-12-07 12:19:31,543 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=104, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:19:31,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19664 states. [2019-12-07 12:19:31,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19664 to 18128. [2019-12-07 12:19:31,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18128 states. [2019-12-07 12:19:31,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18128 states to 18128 states and 54400 transitions. [2019-12-07 12:19:31,796 INFO L78 Accepts]: Start accepts. Automaton has 18128 states and 54400 transitions. Word has length 41 [2019-12-07 12:19:31,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:31,796 INFO L462 AbstractCegarLoop]: Abstraction has 18128 states and 54400 transitions. [2019-12-07 12:19:31,797 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 12:19:31,797 INFO L276 IsEmpty]: Start isEmpty. Operand 18128 states and 54400 transitions. [2019-12-07 12:19:31,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 12:19:31,812 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:31,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:31,813 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:31,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:31,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1196033353, now seen corresponding path program 1 times [2019-12-07 12:19:31,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:31,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980887640] [2019-12-07 12:19:31,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:31,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:31,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:31,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [980887640] [2019-12-07 12:19:31,843 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:31,843 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:19:31,843 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052535370] [2019-12-07 12:19:31,843 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:19:31,843 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:31,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:19:31,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:19:31,844 INFO L87 Difference]: Start difference. First operand 18128 states and 54400 transitions. Second operand 4 states. [2019-12-07 12:19:31,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:31,920 INFO L93 Difference]: Finished difference Result 32017 states and 96241 transitions. [2019-12-07 12:19:31,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:19:31,921 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2019-12-07 12:19:31,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:31,941 INFO L225 Difference]: With dead ends: 32017 [2019-12-07 12:19:31,941 INFO L226 Difference]: Without dead ends: 17634 [2019-12-07 12:19:31,942 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:19:32,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17634 states. [2019-12-07 12:19:32,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17634 to 17610. [2019-12-07 12:19:32,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17610 states. [2019-12-07 12:19:32,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17610 states to 17610 states and 52345 transitions. [2019-12-07 12:19:32,325 INFO L78 Accepts]: Start accepts. Automaton has 17610 states and 52345 transitions. Word has length 42 [2019-12-07 12:19:32,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:32,326 INFO L462 AbstractCegarLoop]: Abstraction has 17610 states and 52345 transitions. [2019-12-07 12:19:32,326 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:19:32,326 INFO L276 IsEmpty]: Start isEmpty. Operand 17610 states and 52345 transitions. [2019-12-07 12:19:32,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 12:19:32,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:32,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:32,340 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:32,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:32,341 INFO L82 PathProgramCache]: Analyzing trace with hash -651537465, now seen corresponding path program 2 times [2019-12-07 12:19:32,341 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:32,341 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859733230] [2019-12-07 12:19:32,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:32,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:32,373 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:32,374 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [859733230] [2019-12-07 12:19:32,374 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:32,374 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:19:32,374 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075111091] [2019-12-07 12:19:32,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:19:32,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:32,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:19:32,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:19:32,374 INFO L87 Difference]: Start difference. First operand 17610 states and 52345 transitions. Second operand 5 states. [2019-12-07 12:19:32,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:32,434 INFO L93 Difference]: Finished difference Result 15733 states and 48071 transitions. [2019-12-07 12:19:32,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:19:32,434 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 12:19:32,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:32,452 INFO L225 Difference]: With dead ends: 15733 [2019-12-07 12:19:32,452 INFO L226 Difference]: Without dead ends: 14089 [2019-12-07 12:19:32,452 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:19:32,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14089 states. [2019-12-07 12:19:32,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14089 to 8027. [2019-12-07 12:19:32,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8027 states. [2019-12-07 12:19:32,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8027 states to 8027 states and 24592 transitions. [2019-12-07 12:19:32,607 INFO L78 Accepts]: Start accepts. Automaton has 8027 states and 24592 transitions. Word has length 42 [2019-12-07 12:19:32,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:32,607 INFO L462 AbstractCegarLoop]: Abstraction has 8027 states and 24592 transitions. [2019-12-07 12:19:32,608 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:19:32,608 INFO L276 IsEmpty]: Start isEmpty. Operand 8027 states and 24592 transitions. [2019-12-07 12:19:32,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 12:19:32,614 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:32,614 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:32,614 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:32,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:32,615 INFO L82 PathProgramCache]: Analyzing trace with hash 231977, now seen corresponding path program 1 times [2019-12-07 12:19:32,615 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:32,615 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499026644] [2019-12-07 12:19:32,615 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:32,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:32,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:32,687 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499026644] [2019-12-07 12:19:32,687 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:32,687 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:19:32,687 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83462431] [2019-12-07 12:19:32,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:19:32,688 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:32,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:19:32,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:19:32,688 INFO L87 Difference]: Start difference. First operand 8027 states and 24592 transitions. Second operand 7 states. [2019-12-07 12:19:32,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:32,980 INFO L93 Difference]: Finished difference Result 34592 states and 105184 transitions. [2019-12-07 12:19:32,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 12:19:32,981 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 55 [2019-12-07 12:19:32,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:33,011 INFO L225 Difference]: With dead ends: 34592 [2019-12-07 12:19:33,012 INFO L226 Difference]: Without dead ends: 24654 [2019-12-07 12:19:33,012 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 12:19:33,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24654 states. [2019-12-07 12:19:33,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24654 to 10180. [2019-12-07 12:19:33,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10180 states. [2019-12-07 12:19:33,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10180 states to 10180 states and 31099 transitions. [2019-12-07 12:19:33,250 INFO L78 Accepts]: Start accepts. Automaton has 10180 states and 31099 transitions. Word has length 55 [2019-12-07 12:19:33,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:33,250 INFO L462 AbstractCegarLoop]: Abstraction has 10180 states and 31099 transitions. [2019-12-07 12:19:33,250 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:19:33,250 INFO L276 IsEmpty]: Start isEmpty. Operand 10180 states and 31099 transitions. [2019-12-07 12:19:33,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 12:19:33,260 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:33,260 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:33,260 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:33,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:33,260 INFO L82 PathProgramCache]: Analyzing trace with hash 430015837, now seen corresponding path program 2 times [2019-12-07 12:19:33,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:33,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013625617] [2019-12-07 12:19:33,261 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:33,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:33,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:33,303 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013625617] [2019-12-07 12:19:33,303 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:33,303 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:19:33,303 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526371902] [2019-12-07 12:19:33,303 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:19:33,303 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:33,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:19:33,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:33,304 INFO L87 Difference]: Start difference. First operand 10180 states and 31099 transitions. Second operand 3 states. [2019-12-07 12:19:33,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:33,342 INFO L93 Difference]: Finished difference Result 16034 states and 49337 transitions. [2019-12-07 12:19:33,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:19:33,343 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 12:19:33,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:33,350 INFO L225 Difference]: With dead ends: 16034 [2019-12-07 12:19:33,350 INFO L226 Difference]: Without dead ends: 5926 [2019-12-07 12:19:33,350 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:19:33,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5926 states. [2019-12-07 12:19:33,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5926 to 5926. [2019-12-07 12:19:33,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5926 states. [2019-12-07 12:19:33,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5926 states to 5926 states and 18372 transitions. [2019-12-07 12:19:33,439 INFO L78 Accepts]: Start accepts. Automaton has 5926 states and 18372 transitions. Word has length 55 [2019-12-07 12:19:33,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:33,439 INFO L462 AbstractCegarLoop]: Abstraction has 5926 states and 18372 transitions. [2019-12-07 12:19:33,439 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:19:33,439 INFO L276 IsEmpty]: Start isEmpty. Operand 5926 states and 18372 transitions. [2019-12-07 12:19:33,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 12:19:33,444 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:33,444 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:33,444 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:33,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:33,444 INFO L82 PathProgramCache]: Analyzing trace with hash 404282337, now seen corresponding path program 3 times [2019-12-07 12:19:33,444 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:33,444 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963584018] [2019-12-07 12:19:33,444 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:33,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:19:33,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:19:33,569 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963584018] [2019-12-07 12:19:33,569 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:19:33,569 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:19:33,570 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339421665] [2019-12-07 12:19:33,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:19:33,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:19:33,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:19:33,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:19:33,570 INFO L87 Difference]: Start difference. First operand 5926 states and 18372 transitions. Second operand 12 states. [2019-12-07 12:19:34,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:19:34,272 INFO L93 Difference]: Finished difference Result 10870 states and 33211 transitions. [2019-12-07 12:19:34,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 12:19:34,272 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 55 [2019-12-07 12:19:34,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:19:34,279 INFO L225 Difference]: With dead ends: 10870 [2019-12-07 12:19:34,279 INFO L226 Difference]: Without dead ends: 7344 [2019-12-07 12:19:34,280 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 420 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=309, Invalid=1331, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 12:19:34,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7344 states. [2019-12-07 12:19:34,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7344 to 5790. [2019-12-07 12:19:34,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5790 states. [2019-12-07 12:19:34,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5790 states to 5790 states and 17657 transitions. [2019-12-07 12:19:34,372 INFO L78 Accepts]: Start accepts. Automaton has 5790 states and 17657 transitions. Word has length 55 [2019-12-07 12:19:34,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:19:34,372 INFO L462 AbstractCegarLoop]: Abstraction has 5790 states and 17657 transitions. [2019-12-07 12:19:34,372 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:19:34,372 INFO L276 IsEmpty]: Start isEmpty. Operand 5790 states and 17657 transitions. [2019-12-07 12:19:34,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 12:19:34,377 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:19:34,377 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:19:34,377 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:19:34,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:19:34,377 INFO L82 PathProgramCache]: Analyzing trace with hash 406067685, now seen corresponding path program 4 times [2019-12-07 12:19:34,377 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:19:34,377 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495047525] [2019-12-07 12:19:34,377 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:19:34,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:19:34,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:19:34,462 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:19:34,462 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:19:34,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff0_thd1~0_335 0) (= 0 v_~y$r_buff1_thd3~0_125) (= v_~x~0_35 0) (= v_~y$w_buff1~0_269 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t636~0.base_28|) (= 0 v_~y$r_buff1_thd2~0_133) (= v_~a~0_54 0) (= |v_ULTIMATE.start_main_~#t636~0.offset_19| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t636~0.base_28|) 0) (= v_~y$w_buff1_used~0_559 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t636~0.base_28| 4) |v_#length_21|) (= v_~main$tmp_guard1~0_48 0) (= |v_#NULL.offset_3| 0) (= 0 v_~__unbuffered_p2_EAX~0_59) (= 0 v_~y$r_buff0_thd2~0_172) (= v_~y$read_delayed~0_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~y$w_buff0_used~0_854 0) (= 0 v_~__unbuffered_p0_EAX~0_68) (= v_~__unbuffered_p0_EBX~0_53 0) (= v_~z~0_107 0) (= 0 v_~y$r_buff0_thd3~0_136) (= v_~weak$$choice2~0_153 0) (= v_~y$mem_tmp~0_47 0) (= v_~__unbuffered_p2_EBX~0_59 0) (= v_~main$tmp_guard0~0_21 0) (= v_~__unbuffered_cnt~0_162 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t636~0.base_28| 1)) (= 0 v_~y$flush_delayed~0_90) (= 0 |v_#NULL.base_3|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t636~0.base_28| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t636~0.base_28|) |v_ULTIMATE.start_main_~#t636~0.offset_19| 0)) |v_#memory_int_17|) (= v_~y$r_buff0_thd0~0_138 0) (= 0 v_~y$w_buff0~0_440) (= v_~y$r_buff1_thd1~0_236 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~weak$$choice0~0_34) (= v_~y$r_buff1_thd0~0_136 0) (= v_~y~0_214 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_~#t638~0.offset=|v_ULTIMATE.start_main_~#t638~0.offset_17|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_33|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_54, ~y$mem_tmp~0=v_~y$mem_tmp~0_47, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_68, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, ULTIMATE.start_main_~#t638~0.base=|v_ULTIMATE.start_main_~#t638~0.base_23|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_335, ~y$flush_delayed~0=v_~y$flush_delayed~0_90, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_59, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_59, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_53, ULTIMATE.start_main_~#t636~0.offset=|v_ULTIMATE.start_main_~#t636~0.offset_19|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~y$w_buff1~0=v_~y$w_buff1~0_269, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_172, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_7|, ULTIMATE.start_main_~#t637~0.offset=|v_ULTIMATE.start_main_~#t637~0.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_162, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_136, ~x~0=v_~x~0_35, ULTIMATE.start_main_~#t636~0.base=|v_ULTIMATE.start_main_~#t636~0.base_28|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_854, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_95|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_67|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_236, ~y$w_buff0~0=v_~y$w_buff0~0_440, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_136, ~y~0=v_~y~0_214, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_17|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_133, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_53|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_138, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_153, ULTIMATE.start_main_~#t637~0.base=|v_ULTIMATE.start_main_~#t637~0.base_23|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_559} AuxVars[] AssignedVars[#NULL.offset, ULTIMATE.start_main_~#t638~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t638~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_~#t636~0.offset, ~weak$$choice0~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t637~0.offset, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t636~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, #NULL.base, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t637~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 12:19:34,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L831-1-->L833: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t637~0.base_11|) (= |v_ULTIMATE.start_main_~#t637~0.offset_10| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t637~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t637~0.base_11|) |v_ULTIMATE.start_main_~#t637~0.offset_10| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t637~0.base_11| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t637~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t637~0.base_11| 0)) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t637~0.base_11|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, ULTIMATE.start_main_~#t637~0.offset=|v_ULTIMATE.start_main_~#t637~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t637~0.base=|v_ULTIMATE.start_main_~#t637~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t637~0.offset, #length, ULTIMATE.start_main_~#t637~0.base] because there is no mapped edge [2019-12-07 12:19:34,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L833-1-->L835: Formula: (and (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t638~0.base_11|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t638~0.base_11|)) (= |v_ULTIMATE.start_main_~#t638~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t638~0.base_11| 4)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t638~0.base_11| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t638~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t638~0.base_11|) |v_ULTIMATE.start_main_~#t638~0.offset_10| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t638~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t638~0.base=|v_ULTIMATE.start_main_~#t638~0.base_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t638~0.offset=|v_ULTIMATE.start_main_~#t638~0.offset_10|, #length=|v_#length_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t638~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t638~0.offset, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 12:19:34,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] P1ENTRY-->L5-3: Formula: (and (= ~y$w_buff1~0_Out780468151 ~y$w_buff0~0_In780468151) (= |P1Thread1of1ForFork1_#in~arg.offset_In780468151| P1Thread1of1ForFork1_~arg.offset_Out780468151) (= P1Thread1of1ForFork1_~arg.base_Out780468151 |P1Thread1of1ForFork1_#in~arg.base_In780468151|) (= ~y$w_buff0_used~0_Out780468151 1) (= 1 ~y$w_buff0~0_Out780468151) (= (ite (not (and (not (= (mod ~y$w_buff1_used~0_Out780468151 256) 0)) (not (= 0 (mod ~y$w_buff0_used~0_Out780468151 256))))) 1 0) |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out780468151|) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out780468151 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out780468151|) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out780468151)) (= ~y$w_buff1_used~0_Out780468151 ~y$w_buff0_used~0_In780468151)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In780468151, ~y$w_buff0~0=~y$w_buff0~0_In780468151, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In780468151|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In780468151|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out780468151, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out780468151, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out780468151, ~y$w_buff1~0=~y$w_buff1~0_Out780468151, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out780468151|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out780468151, ~y$w_buff0~0=~y$w_buff0~0_Out780468151, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In780468151|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In780468151|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out780468151} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 12:19:34,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L808-2-->L808-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork2_#t~ite32_Out2032751004| |P2Thread1of1ForFork2_#t~ite33_Out2032751004|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In2032751004 256))) (.cse2 (= (mod ~y$r_buff1_thd3~0_In2032751004 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork2_#t~ite32_Out2032751004| ~y$w_buff1~0_In2032751004) (not .cse1) (not .cse2)) (and .cse0 (= |P2Thread1of1ForFork2_#t~ite32_Out2032751004| ~y~0_In2032751004) (or .cse1 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2032751004, ~y$w_buff1~0=~y$w_buff1~0_In2032751004, ~y~0=~y~0_In2032751004, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2032751004} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2032751004, ~y$w_buff1~0=~y$w_buff1~0_In2032751004, P2Thread1of1ForFork2_#t~ite33=|P2Thread1of1ForFork2_#t~ite33_Out2032751004|, P2Thread1of1ForFork2_#t~ite32=|P2Thread1of1ForFork2_#t~ite32_Out2032751004|, ~y~0=~y~0_In2032751004, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2032751004} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32] because there is no mapped edge [2019-12-07 12:19:34,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L786-->L786-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-413041692 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-413041692 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite28_Out-413041692| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-413041692 |P1Thread1of1ForFork1_#t~ite28_Out-413041692|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-413041692, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-413041692} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-413041692, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-413041692, P1Thread1of1ForFork1_#t~ite28=|P1Thread1of1ForFork1_#t~ite28_Out-413041692|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite28] because there is no mapped edge [2019-12-07 12:19:34,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L809-->L809-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1966300307 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1966300307 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite34_Out-1966300307| ~y$w_buff0_used~0_In-1966300307) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite34_Out-1966300307| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1966300307, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1966300307} OutVars{P2Thread1of1ForFork2_#t~ite34=|P2Thread1of1ForFork2_#t~ite34_Out-1966300307|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1966300307, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1966300307} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite34] because there is no mapped edge [2019-12-07 12:19:34,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L810-->L810-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd3~0_In-2071403632 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In-2071403632 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-2071403632 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-2071403632 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite35_Out-2071403632| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-2071403632 |P2Thread1of1ForFork2_#t~ite35_Out-2071403632|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2071403632, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2071403632, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2071403632, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2071403632} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out-2071403632|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2071403632, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2071403632, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2071403632, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2071403632} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35] because there is no mapped edge [2019-12-07 12:19:34,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1980980050 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1980980050 256)))) (or (and (= ~y$r_buff0_thd3~0_In1980980050 |P2Thread1of1ForFork2_#t~ite36_Out1980980050|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite36_Out1980980050|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1980980050, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1980980050} OutVars{P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out1980980050|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1980980050, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1980980050} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 12:19:34,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1987866182 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-1987866182 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1987866182 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In-1987866182 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite37_Out-1987866182| ~y$r_buff1_thd3~0_In-1987866182) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite37_Out-1987866182| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1987866182, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1987866182, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1987866182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1987866182} OutVars{P2Thread1of1ForFork2_#t~ite37=|P2Thread1of1ForFork2_#t~ite37_Out-1987866182|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1987866182, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1987866182, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1987866182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1987866182} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37] because there is no mapped edge [2019-12-07 12:19:34,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L812-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite37_38| v_~y$r_buff1_thd3~0_74) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:19:34,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L787-->L787-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd2~0_In726434033 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In726434033 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In726434033 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In726434033 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite29_Out726434033| 0)) (and (= |P1Thread1of1ForFork1_#t~ite29_Out726434033| ~y$w_buff1_used~0_In726434033) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In726434033, ~y$w_buff0_used~0=~y$w_buff0_used~0_In726434033, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In726434033, ~y$w_buff1_used~0=~y$w_buff1_used~0_In726434033} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In726434033, P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_Out726434033|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In726434033, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In726434033, ~y$w_buff1_used~0=~y$w_buff1_used~0_In726434033} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29] because there is no mapped edge [2019-12-07 12:19:34,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L788-->L789: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1403806524 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In1403806524 256) 0)) (.cse2 (= ~y$r_buff0_thd2~0_Out1403806524 ~y$r_buff0_thd2~0_In1403806524))) (or (and (not .cse0) (= ~y$r_buff0_thd2~0_Out1403806524 0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1403806524, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1403806524} OutVars{P1Thread1of1ForFork1_#t~ite30=|P1Thread1of1ForFork1_#t~ite30_Out1403806524|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1403806524, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out1403806524} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite30, ~y$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:19:34,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L789-->L789-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In1156930179 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In1156930179 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1156930179 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1156930179 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite31_Out1156930179| ~y$r_buff1_thd2~0_In1156930179)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork1_#t~ite31_Out1156930179| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1156930179, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1156930179, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1156930179, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1156930179} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1156930179, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1156930179, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out1156930179|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1156930179, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1156930179} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 12:19:34,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L789-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite31_38| v_~y$r_buff1_thd2~0_54) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_#t~ite31, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:19:34,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L750-->L750-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In988081697 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite9_Out988081697| |P0Thread1of1ForFork0_#t~ite8_Out988081697|) (= |P0Thread1of1ForFork0_#t~ite8_Out988081697| ~y$w_buff0~0_In988081697) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In988081697 256)))) (or (and (= (mod ~y$r_buff1_thd1~0_In988081697 256) 0) .cse0) (= 0 (mod ~y$w_buff0_used~0_In988081697 256)) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In988081697 256))))) .cse1) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite9_Out988081697| ~y$w_buff0~0_In988081697) (= |P0Thread1of1ForFork0_#t~ite8_In988081697| |P0Thread1of1ForFork0_#t~ite8_Out988081697|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In988081697, ~y$w_buff0_used~0=~y$w_buff0_used~0_In988081697, ~y$w_buff0~0=~y$w_buff0~0_In988081697, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In988081697, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_In988081697|, ~weak$$choice2~0=~weak$$choice2~0_In988081697, ~y$w_buff1_used~0=~y$w_buff1_used~0_In988081697} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In988081697, P0Thread1of1ForFork0_#t~ite9=|P0Thread1of1ForFork0_#t~ite9_Out988081697|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In988081697, ~y$w_buff0~0=~y$w_buff0~0_In988081697, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out988081697|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In988081697, ~weak$$choice2~0=~weak$$choice2~0_In988081697, ~y$w_buff1_used~0=~y$w_buff1_used~0_In988081697} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite9, P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:19:34,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L751-->L751-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1447299888 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In1447299888 256)))) (or (and (= 0 (mod ~y$r_buff1_thd1~0_In1447299888 256)) .cse0) (and (= (mod ~y$w_buff1_used~0_In1447299888 256) 0) .cse0) (= 0 (mod ~y$w_buff0_used~0_In1447299888 256)))) .cse1 (= |P0Thread1of1ForFork0_#t~ite11_Out1447299888| |P0Thread1of1ForFork0_#t~ite12_Out1447299888|) (= |P0Thread1of1ForFork0_#t~ite11_Out1447299888| ~y$w_buff1~0_In1447299888)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite11_In1447299888| |P0Thread1of1ForFork0_#t~ite11_Out1447299888|) (= |P0Thread1of1ForFork0_#t~ite12_Out1447299888| ~y$w_buff1~0_In1447299888)))) InVars {P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_In1447299888|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1447299888, ~y$w_buff1~0=~y$w_buff1~0_In1447299888, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1447299888, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1447299888, ~weak$$choice2~0=~weak$$choice2~0_In1447299888, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1447299888} OutVars{P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_Out1447299888|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1447299888, ~y$w_buff1~0=~y$w_buff1~0_In1447299888, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1447299888, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1447299888, ~weak$$choice2~0=~weak$$choice2~0_In1447299888, P0Thread1of1ForFork0_#t~ite12=|P0Thread1of1ForFork0_#t~ite12_Out1447299888|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1447299888} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite11, P0Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 12:19:34,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L754-->L755-8: Formula: (and (= |v_P0Thread1of1ForFork0_#t~ite22_33| |v_P0Thread1of1ForFork0_#t~ite22_32|) (= |v_P0Thread1of1ForFork0_#t~ite23_29| |v_P0Thread1of1ForFork0_#t~ite23_28|) (= v_~y$r_buff1_thd1~0_224 |v_P0Thread1of1ForFork0_#t~ite24_30|) (= v_~y$r_buff0_thd1~0_326 v_~y$r_buff0_thd1~0_325) (not (= 0 (mod v_~weak$$choice2~0_143 256)))) InVars {P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_33|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_326, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_29|} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_32|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_35|, P0Thread1of1ForFork0_#t~ite20=|v_P0Thread1of1ForFork0_#t~ite20_46|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_325, P0Thread1of1ForFork0_#t~ite19=|v_P0Thread1of1ForFork0_#t~ite19_31|, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite24=|v_P0Thread1of1ForFork0_#t~ite24_30|, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_28|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, P0Thread1of1ForFork0_#t~ite20, ~y$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite19, P0Thread1of1ForFork0_#t~ite24, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 12:19:34,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L757-->L765: Formula: (and (not (= (mod v_~y$flush_delayed~0_17 256) 0)) (= v_~y~0_46 v_~y$mem_tmp~0_7) (= 0 v_~y$flush_delayed~0_16) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{P0Thread1of1ForFork0_#t~ite25=|v_P0Thread1of1ForFork0_#t~ite25_19|, ~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite25, ~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0] because there is no mapped edge [2019-12-07 12:19:34,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L835-1-->L841: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_42) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:19:34,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L841-2-->L841-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-493890481 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-493890481 256) 0))) (or (and (= ~y~0_In-493890481 |ULTIMATE.start_main_#t~ite41_Out-493890481|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite41_Out-493890481| ~y$w_buff1~0_In-493890481) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-493890481, ~y~0=~y~0_In-493890481, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-493890481, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-493890481} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-493890481|, ~y$w_buff1~0=~y$w_buff1~0_In-493890481, ~y~0=~y~0_In-493890481, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-493890481, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-493890481} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 12:19:34,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L841-4-->L842: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 12:19:34,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L842-->L842-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1736557495 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1736557495 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite43_Out-1736557495|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-1736557495 |ULTIMATE.start_main_#t~ite43_Out-1736557495|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1736557495, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1736557495} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1736557495, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1736557495, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1736557495|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 12:19:34,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L843-->L843-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In2113904551 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In2113904551 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In2113904551 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In2113904551 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out2113904551| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite44_Out2113904551| ~y$w_buff1_used~0_In2113904551) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2113904551, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2113904551, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2113904551, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2113904551} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2113904551, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2113904551, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2113904551, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out2113904551|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2113904551} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 12:19:34,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1193059473 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1193059473 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In-1193059473 |ULTIMATE.start_main_#t~ite45_Out-1193059473|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out-1193059473|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1193059473, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1193059473} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1193059473, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1193059473, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1193059473|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 12:19:34,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1062078134 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1062078134 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1062078134 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1062078134 256)))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out1062078134| ~y$r_buff1_thd0~0_In1062078134) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite46_Out1062078134| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1062078134, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1062078134, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1062078134, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1062078134} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1062078134, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1062078134, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1062078134|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1062078134, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1062078134} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 12:19:34,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L845-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~main$tmp_guard1~0_17 (ite (= (ite (not (and (= v_~z~0_50 2) (= 1 v_~__unbuffered_p0_EAX~0_34) (= v_~__unbuffered_p0_EBX~0_19 0) (= 2 v_~__unbuffered_p2_EAX~0_22) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start_main_#t~ite46_39| v_~y$r_buff1_thd0~0_74) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_39|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_74, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:19:34,536 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:19:34 BasicIcfg [2019-12-07 12:19:34,536 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:19:34,536 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:19:34,536 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:19:34,536 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:19:34,537 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:18:06" (3/4) ... [2019-12-07 12:19:34,539 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:19:34,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff0_thd1~0_335 0) (= 0 v_~y$r_buff1_thd3~0_125) (= v_~x~0_35 0) (= v_~y$w_buff1~0_269 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t636~0.base_28|) (= 0 v_~y$r_buff1_thd2~0_133) (= v_~a~0_54 0) (= |v_ULTIMATE.start_main_~#t636~0.offset_19| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t636~0.base_28|) 0) (= v_~y$w_buff1_used~0_559 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t636~0.base_28| 4) |v_#length_21|) (= v_~main$tmp_guard1~0_48 0) (= |v_#NULL.offset_3| 0) (= 0 v_~__unbuffered_p2_EAX~0_59) (= 0 v_~y$r_buff0_thd2~0_172) (= v_~y$read_delayed~0_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~y$w_buff0_used~0_854 0) (= 0 v_~__unbuffered_p0_EAX~0_68) (= v_~__unbuffered_p0_EBX~0_53 0) (= v_~z~0_107 0) (= 0 v_~y$r_buff0_thd3~0_136) (= v_~weak$$choice2~0_153 0) (= v_~y$mem_tmp~0_47 0) (= v_~__unbuffered_p2_EBX~0_59 0) (= v_~main$tmp_guard0~0_21 0) (= v_~__unbuffered_cnt~0_162 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t636~0.base_28| 1)) (= 0 v_~y$flush_delayed~0_90) (= 0 |v_#NULL.base_3|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t636~0.base_28| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t636~0.base_28|) |v_ULTIMATE.start_main_~#t636~0.offset_19| 0)) |v_#memory_int_17|) (= v_~y$r_buff0_thd0~0_138 0) (= 0 v_~y$w_buff0~0_440) (= v_~y$r_buff1_thd1~0_236 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~weak$$choice0~0_34) (= v_~y$r_buff1_thd0~0_136 0) (= v_~y~0_214 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_~#t638~0.offset=|v_ULTIMATE.start_main_~#t638~0.offset_17|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_33|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_54, ~y$mem_tmp~0=v_~y$mem_tmp~0_47, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_68, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, ULTIMATE.start_main_~#t638~0.base=|v_ULTIMATE.start_main_~#t638~0.base_23|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_335, ~y$flush_delayed~0=v_~y$flush_delayed~0_90, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_59, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_59, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_53, ULTIMATE.start_main_~#t636~0.offset=|v_ULTIMATE.start_main_~#t636~0.offset_19|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~y$w_buff1~0=v_~y$w_buff1~0_269, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_172, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_7|, ULTIMATE.start_main_~#t637~0.offset=|v_ULTIMATE.start_main_~#t637~0.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_162, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_136, ~x~0=v_~x~0_35, ULTIMATE.start_main_~#t636~0.base=|v_ULTIMATE.start_main_~#t636~0.base_28|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_854, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_95|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_67|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_236, ~y$w_buff0~0=v_~y$w_buff0~0_440, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_136, ~y~0=v_~y~0_214, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_17|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_133, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_53|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_138, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_153, ULTIMATE.start_main_~#t637~0.base=|v_ULTIMATE.start_main_~#t637~0.base_23|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_559} AuxVars[] AssignedVars[#NULL.offset, ULTIMATE.start_main_~#t638~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t638~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_~#t636~0.offset, ~weak$$choice0~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t637~0.offset, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t636~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, #NULL.base, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t637~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 12:19:34,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L831-1-->L833: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t637~0.base_11|) (= |v_ULTIMATE.start_main_~#t637~0.offset_10| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t637~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t637~0.base_11|) |v_ULTIMATE.start_main_~#t637~0.offset_10| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t637~0.base_11| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t637~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t637~0.base_11| 0)) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t637~0.base_11|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, ULTIMATE.start_main_~#t637~0.offset=|v_ULTIMATE.start_main_~#t637~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t637~0.base=|v_ULTIMATE.start_main_~#t637~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t637~0.offset, #length, ULTIMATE.start_main_~#t637~0.base] because there is no mapped edge [2019-12-07 12:19:34,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L833-1-->L835: Formula: (and (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t638~0.base_11|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t638~0.base_11|)) (= |v_ULTIMATE.start_main_~#t638~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t638~0.base_11| 4)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t638~0.base_11| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t638~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t638~0.base_11|) |v_ULTIMATE.start_main_~#t638~0.offset_10| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t638~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t638~0.base=|v_ULTIMATE.start_main_~#t638~0.base_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t638~0.offset=|v_ULTIMATE.start_main_~#t638~0.offset_10|, #length=|v_#length_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t638~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t638~0.offset, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 12:19:34,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] P1ENTRY-->L5-3: Formula: (and (= ~y$w_buff1~0_Out780468151 ~y$w_buff0~0_In780468151) (= |P1Thread1of1ForFork1_#in~arg.offset_In780468151| P1Thread1of1ForFork1_~arg.offset_Out780468151) (= P1Thread1of1ForFork1_~arg.base_Out780468151 |P1Thread1of1ForFork1_#in~arg.base_In780468151|) (= ~y$w_buff0_used~0_Out780468151 1) (= 1 ~y$w_buff0~0_Out780468151) (= (ite (not (and (not (= (mod ~y$w_buff1_used~0_Out780468151 256) 0)) (not (= 0 (mod ~y$w_buff0_used~0_Out780468151 256))))) 1 0) |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out780468151|) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out780468151 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out780468151|) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out780468151)) (= ~y$w_buff1_used~0_Out780468151 ~y$w_buff0_used~0_In780468151)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In780468151, ~y$w_buff0~0=~y$w_buff0~0_In780468151, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In780468151|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In780468151|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out780468151, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out780468151, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out780468151, ~y$w_buff1~0=~y$w_buff1~0_Out780468151, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out780468151|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out780468151, ~y$w_buff0~0=~y$w_buff0~0_Out780468151, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In780468151|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In780468151|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out780468151} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 12:19:34,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L808-2-->L808-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork2_#t~ite32_Out2032751004| |P2Thread1of1ForFork2_#t~ite33_Out2032751004|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In2032751004 256))) (.cse2 (= (mod ~y$r_buff1_thd3~0_In2032751004 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork2_#t~ite32_Out2032751004| ~y$w_buff1~0_In2032751004) (not .cse1) (not .cse2)) (and .cse0 (= |P2Thread1of1ForFork2_#t~ite32_Out2032751004| ~y~0_In2032751004) (or .cse1 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2032751004, ~y$w_buff1~0=~y$w_buff1~0_In2032751004, ~y~0=~y~0_In2032751004, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2032751004} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2032751004, ~y$w_buff1~0=~y$w_buff1~0_In2032751004, P2Thread1of1ForFork2_#t~ite33=|P2Thread1of1ForFork2_#t~ite33_Out2032751004|, P2Thread1of1ForFork2_#t~ite32=|P2Thread1of1ForFork2_#t~ite32_Out2032751004|, ~y~0=~y~0_In2032751004, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2032751004} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32] because there is no mapped edge [2019-12-07 12:19:34,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L786-->L786-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-413041692 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-413041692 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite28_Out-413041692| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-413041692 |P1Thread1of1ForFork1_#t~ite28_Out-413041692|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-413041692, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-413041692} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-413041692, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-413041692, P1Thread1of1ForFork1_#t~ite28=|P1Thread1of1ForFork1_#t~ite28_Out-413041692|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite28] because there is no mapped edge [2019-12-07 12:19:34,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L809-->L809-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1966300307 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1966300307 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite34_Out-1966300307| ~y$w_buff0_used~0_In-1966300307) (or .cse0 .cse1)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite34_Out-1966300307| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1966300307, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1966300307} OutVars{P2Thread1of1ForFork2_#t~ite34=|P2Thread1of1ForFork2_#t~ite34_Out-1966300307|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1966300307, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1966300307} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite34] because there is no mapped edge [2019-12-07 12:19:34,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L810-->L810-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd3~0_In-2071403632 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In-2071403632 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-2071403632 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-2071403632 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite35_Out-2071403632| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-2071403632 |P2Thread1of1ForFork2_#t~ite35_Out-2071403632|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2071403632, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2071403632, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2071403632, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2071403632} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out-2071403632|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2071403632, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2071403632, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2071403632, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2071403632} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35] because there is no mapped edge [2019-12-07 12:19:34,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1980980050 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1980980050 256)))) (or (and (= ~y$r_buff0_thd3~0_In1980980050 |P2Thread1of1ForFork2_#t~ite36_Out1980980050|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite36_Out1980980050|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1980980050, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1980980050} OutVars{P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out1980980050|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1980980050, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1980980050} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 12:19:34,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1987866182 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-1987866182 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1987866182 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In-1987866182 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite37_Out-1987866182| ~y$r_buff1_thd3~0_In-1987866182) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite37_Out-1987866182| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1987866182, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1987866182, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1987866182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1987866182} OutVars{P2Thread1of1ForFork2_#t~ite37=|P2Thread1of1ForFork2_#t~ite37_Out-1987866182|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1987866182, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1987866182, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1987866182, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1987866182} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37] because there is no mapped edge [2019-12-07 12:19:34,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L812-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite37_38| v_~y$r_buff1_thd3~0_74) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:19:34,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L787-->L787-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd2~0_In726434033 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In726434033 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In726434033 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In726434033 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite29_Out726434033| 0)) (and (= |P1Thread1of1ForFork1_#t~ite29_Out726434033| ~y$w_buff1_used~0_In726434033) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In726434033, ~y$w_buff0_used~0=~y$w_buff0_used~0_In726434033, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In726434033, ~y$w_buff1_used~0=~y$w_buff1_used~0_In726434033} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In726434033, P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_Out726434033|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In726434033, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In726434033, ~y$w_buff1_used~0=~y$w_buff1_used~0_In726434033} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29] because there is no mapped edge [2019-12-07 12:19:34,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L788-->L789: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1403806524 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In1403806524 256) 0)) (.cse2 (= ~y$r_buff0_thd2~0_Out1403806524 ~y$r_buff0_thd2~0_In1403806524))) (or (and (not .cse0) (= ~y$r_buff0_thd2~0_Out1403806524 0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1403806524, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1403806524} OutVars{P1Thread1of1ForFork1_#t~ite30=|P1Thread1of1ForFork1_#t~ite30_Out1403806524|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1403806524, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out1403806524} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite30, ~y$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:19:34,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L789-->L789-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In1156930179 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In1156930179 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1156930179 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1156930179 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite31_Out1156930179| ~y$r_buff1_thd2~0_In1156930179)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork1_#t~ite31_Out1156930179| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1156930179, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1156930179, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1156930179, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1156930179} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1156930179, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1156930179, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out1156930179|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1156930179, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1156930179} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 12:19:34,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L789-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite31_38| v_~y$r_buff1_thd2~0_54) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_#t~ite31, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:19:34,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L750-->L750-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In988081697 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite9_Out988081697| |P0Thread1of1ForFork0_#t~ite8_Out988081697|) (= |P0Thread1of1ForFork0_#t~ite8_Out988081697| ~y$w_buff0~0_In988081697) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In988081697 256)))) (or (and (= (mod ~y$r_buff1_thd1~0_In988081697 256) 0) .cse0) (= 0 (mod ~y$w_buff0_used~0_In988081697 256)) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In988081697 256))))) .cse1) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite9_Out988081697| ~y$w_buff0~0_In988081697) (= |P0Thread1of1ForFork0_#t~ite8_In988081697| |P0Thread1of1ForFork0_#t~ite8_Out988081697|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In988081697, ~y$w_buff0_used~0=~y$w_buff0_used~0_In988081697, ~y$w_buff0~0=~y$w_buff0~0_In988081697, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In988081697, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_In988081697|, ~weak$$choice2~0=~weak$$choice2~0_In988081697, ~y$w_buff1_used~0=~y$w_buff1_used~0_In988081697} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In988081697, P0Thread1of1ForFork0_#t~ite9=|P0Thread1of1ForFork0_#t~ite9_Out988081697|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In988081697, ~y$w_buff0~0=~y$w_buff0~0_In988081697, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out988081697|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In988081697, ~weak$$choice2~0=~weak$$choice2~0_In988081697, ~y$w_buff1_used~0=~y$w_buff1_used~0_In988081697} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite9, P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:19:34,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L751-->L751-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1447299888 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In1447299888 256)))) (or (and (= 0 (mod ~y$r_buff1_thd1~0_In1447299888 256)) .cse0) (and (= (mod ~y$w_buff1_used~0_In1447299888 256) 0) .cse0) (= 0 (mod ~y$w_buff0_used~0_In1447299888 256)))) .cse1 (= |P0Thread1of1ForFork0_#t~ite11_Out1447299888| |P0Thread1of1ForFork0_#t~ite12_Out1447299888|) (= |P0Thread1of1ForFork0_#t~ite11_Out1447299888| ~y$w_buff1~0_In1447299888)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite11_In1447299888| |P0Thread1of1ForFork0_#t~ite11_Out1447299888|) (= |P0Thread1of1ForFork0_#t~ite12_Out1447299888| ~y$w_buff1~0_In1447299888)))) InVars {P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_In1447299888|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1447299888, ~y$w_buff1~0=~y$w_buff1~0_In1447299888, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1447299888, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1447299888, ~weak$$choice2~0=~weak$$choice2~0_In1447299888, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1447299888} OutVars{P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_Out1447299888|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1447299888, ~y$w_buff1~0=~y$w_buff1~0_In1447299888, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1447299888, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1447299888, ~weak$$choice2~0=~weak$$choice2~0_In1447299888, P0Thread1of1ForFork0_#t~ite12=|P0Thread1of1ForFork0_#t~ite12_Out1447299888|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1447299888} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite11, P0Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 12:19:34,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L754-->L755-8: Formula: (and (= |v_P0Thread1of1ForFork0_#t~ite22_33| |v_P0Thread1of1ForFork0_#t~ite22_32|) (= |v_P0Thread1of1ForFork0_#t~ite23_29| |v_P0Thread1of1ForFork0_#t~ite23_28|) (= v_~y$r_buff1_thd1~0_224 |v_P0Thread1of1ForFork0_#t~ite24_30|) (= v_~y$r_buff0_thd1~0_326 v_~y$r_buff0_thd1~0_325) (not (= 0 (mod v_~weak$$choice2~0_143 256)))) InVars {P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_33|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_326, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_29|} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_32|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_35|, P0Thread1of1ForFork0_#t~ite20=|v_P0Thread1of1ForFork0_#t~ite20_46|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_325, P0Thread1of1ForFork0_#t~ite19=|v_P0Thread1of1ForFork0_#t~ite19_31|, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite24=|v_P0Thread1of1ForFork0_#t~ite24_30|, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_28|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, P0Thread1of1ForFork0_#t~ite20, ~y$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite19, P0Thread1of1ForFork0_#t~ite24, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 12:19:34,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L757-->L765: Formula: (and (not (= (mod v_~y$flush_delayed~0_17 256) 0)) (= v_~y~0_46 v_~y$mem_tmp~0_7) (= 0 v_~y$flush_delayed~0_16) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{P0Thread1of1ForFork0_#t~ite25=|v_P0Thread1of1ForFork0_#t~ite25_19|, ~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite25, ~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0] because there is no mapped edge [2019-12-07 12:19:34,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L835-1-->L841: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_42) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:19:34,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L841-2-->L841-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-493890481 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-493890481 256) 0))) (or (and (= ~y~0_In-493890481 |ULTIMATE.start_main_#t~ite41_Out-493890481|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite41_Out-493890481| ~y$w_buff1~0_In-493890481) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-493890481, ~y~0=~y~0_In-493890481, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-493890481, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-493890481} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-493890481|, ~y$w_buff1~0=~y$w_buff1~0_In-493890481, ~y~0=~y~0_In-493890481, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-493890481, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-493890481} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 12:19:34,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L841-4-->L842: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 12:19:34,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L842-->L842-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1736557495 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1736557495 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite43_Out-1736557495|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-1736557495 |ULTIMATE.start_main_#t~ite43_Out-1736557495|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1736557495, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1736557495} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1736557495, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1736557495, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1736557495|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 12:19:34,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L843-->L843-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In2113904551 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In2113904551 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In2113904551 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In2113904551 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out2113904551| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite44_Out2113904551| ~y$w_buff1_used~0_In2113904551) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2113904551, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2113904551, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2113904551, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2113904551} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2113904551, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2113904551, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2113904551, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out2113904551|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2113904551} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 12:19:34,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1193059473 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1193059473 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In-1193059473 |ULTIMATE.start_main_#t~ite45_Out-1193059473|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out-1193059473|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1193059473, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1193059473} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1193059473, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1193059473, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1193059473|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 12:19:34,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1062078134 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1062078134 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1062078134 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1062078134 256)))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out1062078134| ~y$r_buff1_thd0~0_In1062078134) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite46_Out1062078134| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1062078134, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1062078134, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1062078134, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1062078134} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1062078134, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1062078134, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1062078134|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1062078134, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1062078134} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 12:19:34,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L845-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~main$tmp_guard1~0_17 (ite (= (ite (not (and (= v_~z~0_50 2) (= 1 v_~__unbuffered_p0_EAX~0_34) (= v_~__unbuffered_p0_EBX~0_19 0) (= 2 v_~__unbuffered_p2_EAX~0_22) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start_main_#t~ite46_39| v_~y$r_buff1_thd0~0_74) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_39|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_74, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:19:34,599 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b00bad8a-20fd-41ce-ac91-233731678f05/bin/uautomizer/witness.graphml [2019-12-07 12:19:34,599 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:19:34,600 INFO L168 Benchmark]: Toolchain (without parser) took 88507.15 ms. Allocated memory was 1.0 GB in the beginning and 7.5 GB in the end (delta: 6.5 GB). Free memory was 939.3 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2019-12-07 12:19:34,600 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:19:34,601 INFO L168 Benchmark]: CACSL2BoogieTranslator took 367.28 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -136.1 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:19:34,601 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:19:34,601 INFO L168 Benchmark]: Boogie Preprocessor took 23.91 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:19:34,601 INFO L168 Benchmark]: RCFGBuilder took 402.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. [2019-12-07 12:19:34,602 INFO L168 Benchmark]: TraceAbstraction took 87612.20 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 12:19:34,602 INFO L168 Benchmark]: Witness Printer took 63.08 ms. Allocated memory is still 7.5 GB. Free memory was 4.0 GB in the beginning and 3.9 GB in the end (delta: 49.1 MB). Peak memory consumption was 49.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:19:34,603 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 367.28 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -136.1 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.91 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 402.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 87612.20 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. * Witness Printer took 63.08 ms. Allocated memory is still 7.5 GB. Free memory was 4.0 GB in the beginning and 3.9 GB in the end (delta: 49.1 MB). Peak memory consumption was 49.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.6s, 166 ProgramPointsBefore, 83 ProgramPointsAfterwards, 197 TransitionsBefore, 90 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 28 ChoiceCompositions, 6616 VarBasedMoverChecksPositive, 243 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 263 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 74173 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L831] FCALL, FORK 0 pthread_create(&t636, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L833] FCALL, FORK 0 pthread_create(&t637, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L835] FCALL, FORK 0 pthread_create(&t638, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L776] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L777] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L778] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L779] 2 y$r_buff0_thd2 = (_Bool)1 [L782] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L785] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] 3 z = 2 [L802] 3 __unbuffered_p2_EAX = z [L805] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L808] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L809] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L810] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L811] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L786] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L787] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L736] 1 a = 1 [L739] 1 x = 1 [L742] 1 __unbuffered_p0_EAX = x [L745] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L746] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L747] 1 y$flush_delayed = weak$$choice2 [L748] 1 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L749] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L749] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L750] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L751] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L752] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L753] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L755] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L756] 1 __unbuffered_p0_EBX = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L841] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L842] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L843] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L844] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 157 locations, 2 error locations. Result: UNSAFE, OverallTime: 87.4s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 13.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4159 SDtfs, 4453 SDslu, 9027 SDs, 0 SdLazy, 4013 SolverSat, 169 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 203 GetRequests, 43 SyntacticMatches, 15 SemanticMatches, 145 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 540 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=230373occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 59.2s AutomataMinimizationTime, 25 MinimizatonAttempts, 232922 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 799 NumberOfCodeBlocks, 799 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 719 ConstructedInterpolants, 0 QuantifiedInterpolants, 136503 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...