./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash acb24daf3d6609d96eb6daf3ee23ca87ce26608c ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:03:06,900 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:03:06,901 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:03:06,910 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:03:06,910 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:03:06,910 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:03:06,911 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:03:06,913 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:03:06,914 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:03:06,915 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:03:06,916 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:03:06,916 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:03:06,917 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:03:06,917 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:03:06,918 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:03:06,919 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:03:06,919 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:03:06,920 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:03:06,922 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:03:06,923 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:03:06,924 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:03:06,925 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:03:06,926 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:03:06,927 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:03:06,929 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:03:06,929 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:03:06,929 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:03:06,929 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:03:06,930 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:03:06,930 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:03:06,930 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:03:06,931 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:03:06,932 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:03:06,932 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:03:06,933 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:03:06,933 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:03:06,934 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:03:06,934 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:03:06,934 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:03:06,935 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:03:06,935 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:03:06,936 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:03:06,949 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:03:06,949 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:03:06,950 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:03:06,950 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:03:06,950 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:03:06,951 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:03:06,951 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:03:06,951 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:03:06,951 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:03:06,951 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:03:06,951 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:03:06,952 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:03:06,952 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:03:06,952 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:03:06,952 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:03:06,952 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:03:06,953 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:03:06,953 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:03:06,953 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:03:06,953 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:03:06,953 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:03:06,953 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:03:06,954 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:03:06,954 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:03:06,954 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:03:06,954 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:03:06,954 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:03:06,954 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:03:06,955 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:03:06,955 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> acb24daf3d6609d96eb6daf3ee23ca87ce26608c [2019-12-07 15:03:07,071 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:03:07,078 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:03:07,080 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:03:07,081 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:03:07,082 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:03:07,082 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix024_pso.oepc.i [2019-12-07 15:03:07,120 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/data/5c657b964/4bbefbfdaf8344d7bd3126edd36d7814/FLAGa1650ddcf [2019-12-07 15:03:07,634 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:03:07,634 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/sv-benchmarks/c/pthread-wmm/mix024_pso.oepc.i [2019-12-07 15:03:07,645 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/data/5c657b964/4bbefbfdaf8344d7bd3126edd36d7814/FLAGa1650ddcf [2019-12-07 15:03:08,101 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/data/5c657b964/4bbefbfdaf8344d7bd3126edd36d7814 [2019-12-07 15:03:08,103 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:03:08,104 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:03:08,105 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:03:08,105 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:03:08,107 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:03:08,107 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,109 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@9dd5335 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08, skipping insertion in model container [2019-12-07 15:03:08,109 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,113 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:03:08,147 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:03:08,402 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:03:08,410 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:03:08,451 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:03:08,496 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:03:08,496 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08 WrapperNode [2019-12-07 15:03:08,496 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:03:08,497 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:03:08,497 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:03:08,497 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:03:08,502 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,515 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,533 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:03:08,533 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:03:08,533 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:03:08,533 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:03:08,540 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,540 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,543 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,543 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,550 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,553 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,555 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... [2019-12-07 15:03:08,558 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:03:08,559 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:03:08,559 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:03:08,559 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:03:08,560 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:03:08,600 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:03:08,600 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:03:08,600 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:03:08,600 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:03:08,600 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:03:08,600 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:03:08,600 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:03:08,600 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:03:08,600 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:03:08,601 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:03:08,601 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:03:08,601 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:03:08,601 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:03:08,602 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:03:08,969 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:03:08,969 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:03:08,970 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:03:08 BoogieIcfgContainer [2019-12-07 15:03:08,970 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:03:08,971 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:03:08,972 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:03:08,974 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:03:08,974 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:03:08" (1/3) ... [2019-12-07 15:03:08,975 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28a5a301 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:03:08, skipping insertion in model container [2019-12-07 15:03:08,975 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:03:08" (2/3) ... [2019-12-07 15:03:08,975 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28a5a301 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:03:08, skipping insertion in model container [2019-12-07 15:03:08,975 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:03:08" (3/3) ... [2019-12-07 15:03:08,977 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_pso.oepc.i [2019-12-07 15:03:08,985 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:03:08,986 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:03:08,992 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:03:08,993 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:03:09,018 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,018 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,019 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,019 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,019 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,019 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,019 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,019 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,020 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,021 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,022 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,022 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,022 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,022 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,022 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,022 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,022 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,022 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,023 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,023 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,023 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,024 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,025 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,026 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,028 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,029 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,030 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,031 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,032 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,033 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,034 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,035 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,036 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,037 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,038 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,039 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:03:09,053 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:03:09,070 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:03:09,070 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:03:09,070 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:03:09,070 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:03:09,070 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:03:09,071 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:03:09,071 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:03:09,071 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:03:09,085 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 15:03:09,086 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 15:03:09,149 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 15:03:09,149 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:03:09,159 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:03:09,175 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 15:03:09,206 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 15:03:09,206 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:03:09,211 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:03:09,228 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 15:03:09,228 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:03:12,207 WARN L192 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 15:03:12,316 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78858 [2019-12-07 15:03:12,317 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 15:03:12,319 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 15:03:27,489 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115112 states. [2019-12-07 15:03:27,490 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states. [2019-12-07 15:03:27,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:03:27,495 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:03:27,495 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:03:27,496 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:03:27,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:03:27,499 INFO L82 PathProgramCache]: Analyzing trace with hash 917918, now seen corresponding path program 1 times [2019-12-07 15:03:27,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:03:27,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983838749] [2019-12-07 15:03:27,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:03:27,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:03:27,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:03:27,636 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983838749] [2019-12-07 15:03:27,636 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:03:27,636 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:03:27,637 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [552848157] [2019-12-07 15:03:27,640 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:03:27,640 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:03:27,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:03:27,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:03:27,650 INFO L87 Difference]: Start difference. First operand 115112 states. Second operand 3 states. [2019-12-07 15:03:28,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:03:28,500 INFO L93 Difference]: Finished difference Result 114110 states and 484570 transitions. [2019-12-07 15:03:28,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:03:28,502 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:03:28,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:03:28,936 INFO L225 Difference]: With dead ends: 114110 [2019-12-07 15:03:28,937 INFO L226 Difference]: Without dead ends: 107012 [2019-12-07 15:03:28,937 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:03:33,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107012 states. [2019-12-07 15:03:35,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107012 to 107012. [2019-12-07 15:03:35,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107012 states. [2019-12-07 15:03:36,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107012 states to 107012 states and 453812 transitions. [2019-12-07 15:03:36,257 INFO L78 Accepts]: Start accepts. Automaton has 107012 states and 453812 transitions. Word has length 3 [2019-12-07 15:03:36,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:03:36,258 INFO L462 AbstractCegarLoop]: Abstraction has 107012 states and 453812 transitions. [2019-12-07 15:03:36,258 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:03:36,258 INFO L276 IsEmpty]: Start isEmpty. Operand 107012 states and 453812 transitions. [2019-12-07 15:03:36,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:03:36,262 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:03:36,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:03:36,263 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:03:36,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:03:36,263 INFO L82 PathProgramCache]: Analyzing trace with hash -1578322365, now seen corresponding path program 1 times [2019-12-07 15:03:36,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:03:36,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549244951] [2019-12-07 15:03:36,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:03:36,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:03:36,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:03:36,332 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1549244951] [2019-12-07 15:03:36,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:03:36,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:03:36,332 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064939744] [2019-12-07 15:03:36,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:03:36,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:03:36,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:03:36,334 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:03:36,334 INFO L87 Difference]: Start difference. First operand 107012 states and 453812 transitions. Second operand 4 states. [2019-12-07 15:03:37,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:03:37,505 INFO L93 Difference]: Finished difference Result 166210 states and 677236 transitions. [2019-12-07 15:03:37,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:03:37,506 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:03:37,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:03:37,923 INFO L225 Difference]: With dead ends: 166210 [2019-12-07 15:03:37,923 INFO L226 Difference]: Without dead ends: 166161 [2019-12-07 15:03:37,924 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:03:43,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166161 states. [2019-12-07 15:03:46,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166161 to 151748. [2019-12-07 15:03:46,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151748 states. [2019-12-07 15:03:47,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151748 states to 151748 states and 626089 transitions. [2019-12-07 15:03:47,331 INFO L78 Accepts]: Start accepts. Automaton has 151748 states and 626089 transitions. Word has length 11 [2019-12-07 15:03:47,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:03:47,331 INFO L462 AbstractCegarLoop]: Abstraction has 151748 states and 626089 transitions. [2019-12-07 15:03:47,331 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:03:47,331 INFO L276 IsEmpty]: Start isEmpty. Operand 151748 states and 626089 transitions. [2019-12-07 15:03:47,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:03:47,335 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:03:47,335 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:03:47,335 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:03:47,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:03:47,336 INFO L82 PathProgramCache]: Analyzing trace with hash 608601994, now seen corresponding path program 1 times [2019-12-07 15:03:47,336 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:03:47,336 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816780646] [2019-12-07 15:03:47,336 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:03:47,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:03:47,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:03:47,384 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1816780646] [2019-12-07 15:03:47,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:03:47,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:03:47,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288271807] [2019-12-07 15:03:47,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:03:47,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:03:47,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:03:47,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:03:47,385 INFO L87 Difference]: Start difference. First operand 151748 states and 626089 transitions. Second operand 4 states. [2019-12-07 15:03:48,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:03:48,495 INFO L93 Difference]: Finished difference Result 218525 states and 880843 transitions. [2019-12-07 15:03:48,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:03:48,495 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:03:48,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:03:49,548 INFO L225 Difference]: With dead ends: 218525 [2019-12-07 15:03:49,548 INFO L226 Difference]: Without dead ends: 218469 [2019-12-07 15:03:49,548 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:03:57,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218469 states. [2019-12-07 15:04:00,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218469 to 182894. [2019-12-07 15:04:00,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182894 states. [2019-12-07 15:04:01,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182894 states to 182894 states and 750285 transitions. [2019-12-07 15:04:01,002 INFO L78 Accepts]: Start accepts. Automaton has 182894 states and 750285 transitions. Word has length 13 [2019-12-07 15:04:01,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:04:01,003 INFO L462 AbstractCegarLoop]: Abstraction has 182894 states and 750285 transitions. [2019-12-07 15:04:01,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:04:01,003 INFO L276 IsEmpty]: Start isEmpty. Operand 182894 states and 750285 transitions. [2019-12-07 15:04:01,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:04:01,011 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:04:01,011 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:04:01,011 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:04:01,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:04:01,012 INFO L82 PathProgramCache]: Analyzing trace with hash -1174763718, now seen corresponding path program 1 times [2019-12-07 15:04:01,012 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:04:01,012 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311222065] [2019-12-07 15:04:01,012 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:04:01,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:04:01,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:04:01,073 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311222065] [2019-12-07 15:04:01,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:04:01,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:04:01,073 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364410252] [2019-12-07 15:04:01,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:04:01,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:04:01,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:04:01,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:04:01,074 INFO L87 Difference]: Start difference. First operand 182894 states and 750285 transitions. Second operand 5 states. [2019-12-07 15:04:02,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:04:02,414 INFO L93 Difference]: Finished difference Result 246966 states and 1003484 transitions. [2019-12-07 15:04:02,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:04:02,415 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 15:04:02,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:04:03,041 INFO L225 Difference]: With dead ends: 246966 [2019-12-07 15:04:03,042 INFO L226 Difference]: Without dead ends: 246966 [2019-12-07 15:04:03,042 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:04:09,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246966 states. [2019-12-07 15:04:12,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246966 to 202377. [2019-12-07 15:04:12,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202377 states. [2019-12-07 15:04:13,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202377 states to 202377 states and 829448 transitions. [2019-12-07 15:04:13,258 INFO L78 Accepts]: Start accepts. Automaton has 202377 states and 829448 transitions. Word has length 16 [2019-12-07 15:04:13,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:04:13,258 INFO L462 AbstractCegarLoop]: Abstraction has 202377 states and 829448 transitions. [2019-12-07 15:04:13,258 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:04:13,258 INFO L276 IsEmpty]: Start isEmpty. Operand 202377 states and 829448 transitions. [2019-12-07 15:04:13,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:04:13,272 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:04:13,272 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:04:13,272 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:04:13,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:04:13,272 INFO L82 PathProgramCache]: Analyzing trace with hash -1130186099, now seen corresponding path program 1 times [2019-12-07 15:04:13,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:04:13,273 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [334637675] [2019-12-07 15:04:13,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:04:13,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:04:13,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:04:13,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [334637675] [2019-12-07 15:04:13,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:04:13,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:04:13,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1229063520] [2019-12-07 15:04:13,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:04:13,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:04:13,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:04:13,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:04:13,325 INFO L87 Difference]: Start difference. First operand 202377 states and 829448 transitions. Second operand 3 states. [2019-12-07 15:04:14,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:04:14,210 INFO L93 Difference]: Finished difference Result 202377 states and 821214 transitions. [2019-12-07 15:04:14,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:04:14,211 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:04:14,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:04:14,727 INFO L225 Difference]: With dead ends: 202377 [2019-12-07 15:04:14,727 INFO L226 Difference]: Without dead ends: 202377 [2019-12-07 15:04:14,728 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:04:20,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202377 states. [2019-12-07 15:04:26,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202377 to 199185. [2019-12-07 15:04:26,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199185 states. [2019-12-07 15:04:27,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199185 states to 199185 states and 809374 transitions. [2019-12-07 15:04:27,079 INFO L78 Accepts]: Start accepts. Automaton has 199185 states and 809374 transitions. Word has length 18 [2019-12-07 15:04:27,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:04:27,079 INFO L462 AbstractCegarLoop]: Abstraction has 199185 states and 809374 transitions. [2019-12-07 15:04:27,079 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:04:27,079 INFO L276 IsEmpty]: Start isEmpty. Operand 199185 states and 809374 transitions. [2019-12-07 15:04:27,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:04:27,091 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:04:27,091 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:04:27,091 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:04:27,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:04:27,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1224828645, now seen corresponding path program 1 times [2019-12-07 15:04:27,091 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:04:27,092 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [338163410] [2019-12-07 15:04:27,092 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:04:27,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:04:27,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:04:27,157 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [338163410] [2019-12-07 15:04:27,157 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:04:27,157 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:04:27,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1656334745] [2019-12-07 15:04:27,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:04:27,158 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:04:27,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:04:27,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:04:27,158 INFO L87 Difference]: Start difference. First operand 199185 states and 809374 transitions. Second operand 3 states. [2019-12-07 15:04:28,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:04:28,957 INFO L93 Difference]: Finished difference Result 356829 states and 1441369 transitions. [2019-12-07 15:04:28,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:04:28,958 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:04:28,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:04:29,740 INFO L225 Difference]: With dead ends: 356829 [2019-12-07 15:04:29,741 INFO L226 Difference]: Without dead ends: 323789 [2019-12-07 15:04:29,741 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:04:36,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323789 states. [2019-12-07 15:04:41,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323789 to 311331. [2019-12-07 15:04:41,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 311331 states. [2019-12-07 15:04:42,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311331 states to 311331 states and 1266679 transitions. [2019-12-07 15:04:42,382 INFO L78 Accepts]: Start accepts. Automaton has 311331 states and 1266679 transitions. Word has length 18 [2019-12-07 15:04:42,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:04:42,382 INFO L462 AbstractCegarLoop]: Abstraction has 311331 states and 1266679 transitions. [2019-12-07 15:04:42,382 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:04:42,382 INFO L276 IsEmpty]: Start isEmpty. Operand 311331 states and 1266679 transitions. [2019-12-07 15:04:42,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:04:42,400 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:04:42,400 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:04:42,400 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:04:42,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:04:42,400 INFO L82 PathProgramCache]: Analyzing trace with hash -1770026118, now seen corresponding path program 1 times [2019-12-07 15:04:42,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:04:42,400 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227105523] [2019-12-07 15:04:42,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:04:42,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:04:42,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:04:42,923 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227105523] [2019-12-07 15:04:42,923 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:04:42,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:04:42,924 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [180942864] [2019-12-07 15:04:42,924 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:04:42,924 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:04:42,924 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:04:42,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:04:42,925 INFO L87 Difference]: Start difference. First operand 311331 states and 1266679 transitions. Second operand 5 states. [2019-12-07 15:04:48,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:04:48,840 INFO L93 Difference]: Finished difference Result 416517 states and 1666224 transitions. [2019-12-07 15:04:48,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:04:48,841 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 15:04:48,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:04:49,879 INFO L225 Difference]: With dead ends: 416517 [2019-12-07 15:04:49,880 INFO L226 Difference]: Without dead ends: 416419 [2019-12-07 15:04:49,880 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:04:57,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416419 states. [2019-12-07 15:05:02,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416419 to 325487. [2019-12-07 15:05:02,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325487 states. [2019-12-07 15:05:04,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325487 states to 325487 states and 1322790 transitions. [2019-12-07 15:05:04,318 INFO L78 Accepts]: Start accepts. Automaton has 325487 states and 1322790 transitions. Word has length 19 [2019-12-07 15:05:04,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:05:04,319 INFO L462 AbstractCegarLoop]: Abstraction has 325487 states and 1322790 transitions. [2019-12-07 15:05:04,319 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:05:04,319 INFO L276 IsEmpty]: Start isEmpty. Operand 325487 states and 1322790 transitions. [2019-12-07 15:05:04,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:05:04,343 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:05:04,343 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:05:04,343 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:05:04,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:05:04,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1476369392, now seen corresponding path program 1 times [2019-12-07 15:05:04,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:05:04,344 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713857609] [2019-12-07 15:05:04,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:05:04,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:05:04,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:05:04,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713857609] [2019-12-07 15:05:04,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:05:04,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:05:04,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [472185140] [2019-12-07 15:05:04,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:05:04,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:05:04,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:05:04,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:05:04,389 INFO L87 Difference]: Start difference. First operand 325487 states and 1322790 transitions. Second operand 4 states. [2019-12-07 15:05:05,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:05:05,821 INFO L93 Difference]: Finished difference Result 334590 states and 1348897 transitions. [2019-12-07 15:05:05,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:05:05,822 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 15:05:05,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:05:07,314 INFO L225 Difference]: With dead ends: 334590 [2019-12-07 15:05:07,314 INFO L226 Difference]: Without dead ends: 334590 [2019-12-07 15:05:07,314 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:05:14,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334590 states. [2019-12-07 15:05:22,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334590 to 297550. [2019-12-07 15:05:22,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297550 states. [2019-12-07 15:05:23,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297550 states to 297550 states and 1208941 transitions. [2019-12-07 15:05:23,596 INFO L78 Accepts]: Start accepts. Automaton has 297550 states and 1208941 transitions. Word has length 19 [2019-12-07 15:05:23,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:05:23,597 INFO L462 AbstractCegarLoop]: Abstraction has 297550 states and 1208941 transitions. [2019-12-07 15:05:23,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:05:23,597 INFO L276 IsEmpty]: Start isEmpty. Operand 297550 states and 1208941 transitions. [2019-12-07 15:05:23,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 15:05:23,622 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:05:23,622 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:05:23,622 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:05:23,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:05:23,623 INFO L82 PathProgramCache]: Analyzing trace with hash 454537609, now seen corresponding path program 1 times [2019-12-07 15:05:23,623 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:05:23,623 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677468775] [2019-12-07 15:05:23,623 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:05:23,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:05:23,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:05:23,674 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677468775] [2019-12-07 15:05:23,674 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:05:23,674 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:05:23,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1756197933] [2019-12-07 15:05:23,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:05:23,675 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:05:23,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:05:23,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:05:23,675 INFO L87 Difference]: Start difference. First operand 297550 states and 1208941 transitions. Second operand 4 states. [2019-12-07 15:05:25,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:05:25,535 INFO L93 Difference]: Finished difference Result 335336 states and 1350580 transitions. [2019-12-07 15:05:25,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:05:25,535 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 15:05:25,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:05:26,338 INFO L225 Difference]: With dead ends: 335336 [2019-12-07 15:05:26,338 INFO L226 Difference]: Without dead ends: 335336 [2019-12-07 15:05:26,338 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:05:33,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335336 states. [2019-12-07 15:05:38,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335336 to 297526. [2019-12-07 15:05:38,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297526 states. [2019-12-07 15:05:39,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297526 states to 297526 states and 1208846 transitions. [2019-12-07 15:05:39,447 INFO L78 Accepts]: Start accepts. Automaton has 297526 states and 1208846 transitions. Word has length 20 [2019-12-07 15:05:39,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:05:39,447 INFO L462 AbstractCegarLoop]: Abstraction has 297526 states and 1208846 transitions. [2019-12-07 15:05:39,447 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:05:39,447 INFO L276 IsEmpty]: Start isEmpty. Operand 297526 states and 1208846 transitions. [2019-12-07 15:05:39,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 15:05:39,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:05:39,479 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:05:39,479 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:05:39,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:05:39,479 INFO L82 PathProgramCache]: Analyzing trace with hash -50907777, now seen corresponding path program 1 times [2019-12-07 15:05:39,480 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:05:39,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641958395] [2019-12-07 15:05:39,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:05:39,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:05:39,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:05:39,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641958395] [2019-12-07 15:05:39,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:05:39,526 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:05:39,526 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475739595] [2019-12-07 15:05:39,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:05:39,526 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:05:39,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:05:39,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:05:39,526 INFO L87 Difference]: Start difference. First operand 297526 states and 1208846 transitions. Second operand 4 states. [2019-12-07 15:05:45,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:05:45,076 INFO L93 Difference]: Finished difference Result 459133 states and 1856451 transitions. [2019-12-07 15:05:45,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:05:45,077 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 15:05:45,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:05:46,141 INFO L225 Difference]: With dead ends: 459133 [2019-12-07 15:05:46,141 INFO L226 Difference]: Without dead ends: 411694 [2019-12-07 15:05:46,142 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:05:54,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411694 states. [2019-12-07 15:05:58,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411694 to 287144. [2019-12-07 15:05:58,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287144 states. [2019-12-07 15:05:59,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287144 states to 287144 states and 1161745 transitions. [2019-12-07 15:05:59,928 INFO L78 Accepts]: Start accepts. Automaton has 287144 states and 1161745 transitions. Word has length 21 [2019-12-07 15:05:59,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:05:59,928 INFO L462 AbstractCegarLoop]: Abstraction has 287144 states and 1161745 transitions. [2019-12-07 15:05:59,928 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:05:59,928 INFO L276 IsEmpty]: Start isEmpty. Operand 287144 states and 1161745 transitions. [2019-12-07 15:05:59,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 15:05:59,957 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:05:59,957 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:05:59,958 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:05:59,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:05:59,958 INFO L82 PathProgramCache]: Analyzing trace with hash -31915662, now seen corresponding path program 1 times [2019-12-07 15:05:59,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:05:59,958 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499008205] [2019-12-07 15:05:59,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:05:59,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:05:59,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:05:59,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499008205] [2019-12-07 15:05:59,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:05:59,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:05:59,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370516793] [2019-12-07 15:05:59,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:05:59,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:05:59,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:05:59,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:05:59,992 INFO L87 Difference]: Start difference. First operand 287144 states and 1161745 transitions. Second operand 3 states. [2019-12-07 15:06:00,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:00,166 INFO L93 Difference]: Finished difference Result 56769 states and 181021 transitions. [2019-12-07 15:06:00,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:06:00,167 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 15:06:00,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:00,255 INFO L225 Difference]: With dead ends: 56769 [2019-12-07 15:06:00,256 INFO L226 Difference]: Without dead ends: 56769 [2019-12-07 15:06:00,256 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:06:00,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56769 states. [2019-12-07 15:06:01,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56769 to 56769. [2019-12-07 15:06:01,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56769 states. [2019-12-07 15:06:01,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56769 states to 56769 states and 181021 transitions. [2019-12-07 15:06:01,181 INFO L78 Accepts]: Start accepts. Automaton has 56769 states and 181021 transitions. Word has length 21 [2019-12-07 15:06:01,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:01,181 INFO L462 AbstractCegarLoop]: Abstraction has 56769 states and 181021 transitions. [2019-12-07 15:06:01,181 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:06:01,181 INFO L276 IsEmpty]: Start isEmpty. Operand 56769 states and 181021 transitions. [2019-12-07 15:06:01,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:06:01,186 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:01,187 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:01,187 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:01,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:01,187 INFO L82 PathProgramCache]: Analyzing trace with hash -219431606, now seen corresponding path program 1 times [2019-12-07 15:06:01,187 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:01,187 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682208763] [2019-12-07 15:06:01,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:01,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:01,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:01,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682208763] [2019-12-07 15:06:01,233 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:01,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:06:01,234 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1620653715] [2019-12-07 15:06:01,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:06:01,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:01,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:06:01,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:06:01,234 INFO L87 Difference]: Start difference. First operand 56769 states and 181021 transitions. Second operand 6 states. [2019-12-07 15:06:01,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:01,828 INFO L93 Difference]: Finished difference Result 82600 states and 257673 transitions. [2019-12-07 15:06:01,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 15:06:01,829 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 15:06:01,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:01,950 INFO L225 Difference]: With dead ends: 82600 [2019-12-07 15:06:01,950 INFO L226 Difference]: Without dead ends: 82551 [2019-12-07 15:06:01,950 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:06:02,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82551 states. [2019-12-07 15:06:03,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82551 to 63907. [2019-12-07 15:06:03,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63907 states. [2019-12-07 15:06:03,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63907 states to 63907 states and 202249 transitions. [2019-12-07 15:06:03,552 INFO L78 Accepts]: Start accepts. Automaton has 63907 states and 202249 transitions. Word has length 22 [2019-12-07 15:06:03,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:03,552 INFO L462 AbstractCegarLoop]: Abstraction has 63907 states and 202249 transitions. [2019-12-07 15:06:03,552 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:06:03,552 INFO L276 IsEmpty]: Start isEmpty. Operand 63907 states and 202249 transitions. [2019-12-07 15:06:03,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:06:03,567 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:03,567 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:03,567 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:03,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:03,568 INFO L82 PathProgramCache]: Analyzing trace with hash 1790545903, now seen corresponding path program 1 times [2019-12-07 15:06:03,568 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:03,568 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1326996538] [2019-12-07 15:06:03,568 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:03,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:03,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:03,611 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1326996538] [2019-12-07 15:06:03,611 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:03,611 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:06:03,611 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1649687772] [2019-12-07 15:06:03,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:06:03,611 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:03,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:06:03,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:06:03,612 INFO L87 Difference]: Start difference. First operand 63907 states and 202249 transitions. Second operand 6 states. [2019-12-07 15:06:04,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:04,092 INFO L93 Difference]: Finished difference Result 82695 states and 256419 transitions. [2019-12-07 15:06:04,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 15:06:04,093 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 15:06:04,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:04,207 INFO L225 Difference]: With dead ends: 82695 [2019-12-07 15:06:04,207 INFO L226 Difference]: Without dead ends: 82466 [2019-12-07 15:06:04,207 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:06:04,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82466 states. [2019-12-07 15:06:05,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82466 to 65158. [2019-12-07 15:06:05,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65158 states. [2019-12-07 15:06:05,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65158 states to 65158 states and 205799 transitions. [2019-12-07 15:06:05,504 INFO L78 Accepts]: Start accepts. Automaton has 65158 states and 205799 transitions. Word has length 27 [2019-12-07 15:06:05,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:05,504 INFO L462 AbstractCegarLoop]: Abstraction has 65158 states and 205799 transitions. [2019-12-07 15:06:05,504 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:06:05,504 INFO L276 IsEmpty]: Start isEmpty. Operand 65158 states and 205799 transitions. [2019-12-07 15:06:05,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 15:06:05,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:05,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:05,526 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:05,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:05,526 INFO L82 PathProgramCache]: Analyzing trace with hash 101231732, now seen corresponding path program 1 times [2019-12-07 15:06:05,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:05,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474543916] [2019-12-07 15:06:05,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:05,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:05,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:05,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [474543916] [2019-12-07 15:06:05,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:05,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:06:05,565 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761177223] [2019-12-07 15:06:05,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:06:05,566 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:05,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:06:05,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:06:05,566 INFO L87 Difference]: Start difference. First operand 65158 states and 205799 transitions. Second operand 4 states. [2019-12-07 15:06:05,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:05,647 INFO L93 Difference]: Finished difference Result 24830 states and 75182 transitions. [2019-12-07 15:06:05,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:06:05,647 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 15:06:05,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:05,679 INFO L225 Difference]: With dead ends: 24830 [2019-12-07 15:06:05,679 INFO L226 Difference]: Without dead ends: 24823 [2019-12-07 15:06:05,679 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:06:05,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24823 states. [2019-12-07 15:06:05,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24823 to 23414. [2019-12-07 15:06:05,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23414 states. [2019-12-07 15:06:06,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23414 states to 23414 states and 71016 transitions. [2019-12-07 15:06:06,028 INFO L78 Accepts]: Start accepts. Automaton has 23414 states and 71016 transitions. Word has length 30 [2019-12-07 15:06:06,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:06,028 INFO L462 AbstractCegarLoop]: Abstraction has 23414 states and 71016 transitions. [2019-12-07 15:06:06,028 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:06:06,028 INFO L276 IsEmpty]: Start isEmpty. Operand 23414 states and 71016 transitions. [2019-12-07 15:06:06,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:06:06,048 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:06,048 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:06,048 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:06,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:06,049 INFO L82 PathProgramCache]: Analyzing trace with hash -718999585, now seen corresponding path program 1 times [2019-12-07 15:06:06,049 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:06,049 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305698402] [2019-12-07 15:06:06,049 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:06,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:06,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:06,103 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305698402] [2019-12-07 15:06:06,103 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:06,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:06:06,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [454600111] [2019-12-07 15:06:06,104 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:06:06,104 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:06,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:06:06,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:06:06,104 INFO L87 Difference]: Start difference. First operand 23414 states and 71016 transitions. Second operand 7 states. [2019-12-07 15:06:06,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:06,714 INFO L93 Difference]: Finished difference Result 29795 states and 87851 transitions. [2019-12-07 15:06:06,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:06:06,714 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 15:06:06,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:06,745 INFO L225 Difference]: With dead ends: 29795 [2019-12-07 15:06:06,745 INFO L226 Difference]: Without dead ends: 29795 [2019-12-07 15:06:06,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:06:06,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29795 states. [2019-12-07 15:06:07,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29795 to 22977. [2019-12-07 15:06:07,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22977 states. [2019-12-07 15:06:07,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22977 states to 22977 states and 69849 transitions. [2019-12-07 15:06:07,125 INFO L78 Accepts]: Start accepts. Automaton has 22977 states and 69849 transitions. Word has length 33 [2019-12-07 15:06:07,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:07,125 INFO L462 AbstractCegarLoop]: Abstraction has 22977 states and 69849 transitions. [2019-12-07 15:06:07,125 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:06:07,125 INFO L276 IsEmpty]: Start isEmpty. Operand 22977 states and 69849 transitions. [2019-12-07 15:06:07,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:06:07,144 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:07,144 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:07,144 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:07,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:07,144 INFO L82 PathProgramCache]: Analyzing trace with hash -1494536628, now seen corresponding path program 1 times [2019-12-07 15:06:07,144 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:07,144 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588796517] [2019-12-07 15:06:07,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:07,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:07,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:07,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588796517] [2019-12-07 15:06:07,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:07,178 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:06:07,178 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540582837] [2019-12-07 15:06:07,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:06:07,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:07,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:06:07,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:06:07,179 INFO L87 Difference]: Start difference. First operand 22977 states and 69849 transitions. Second operand 3 states. [2019-12-07 15:06:07,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:07,230 INFO L93 Difference]: Finished difference Result 21994 states and 65815 transitions. [2019-12-07 15:06:07,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:06:07,230 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 15:06:07,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:07,253 INFO L225 Difference]: With dead ends: 21994 [2019-12-07 15:06:07,254 INFO L226 Difference]: Without dead ends: 21994 [2019-12-07 15:06:07,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:06:07,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21994 states. [2019-12-07 15:06:07,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21994 to 21862. [2019-12-07 15:06:07,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21862 states. [2019-12-07 15:06:07,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21862 states to 21862 states and 65446 transitions. [2019-12-07 15:06:07,607 INFO L78 Accepts]: Start accepts. Automaton has 21862 states and 65446 transitions. Word has length 41 [2019-12-07 15:06:07,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:07,607 INFO L462 AbstractCegarLoop]: Abstraction has 21862 states and 65446 transitions. [2019-12-07 15:06:07,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:06:07,607 INFO L276 IsEmpty]: Start isEmpty. Operand 21862 states and 65446 transitions. [2019-12-07 15:06:07,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 15:06:07,623 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:07,623 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:07,623 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:07,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:07,623 INFO L82 PathProgramCache]: Analyzing trace with hash -2107392736, now seen corresponding path program 1 times [2019-12-07 15:06:07,624 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:07,624 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515676287] [2019-12-07 15:06:07,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:07,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:07,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:07,681 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1515676287] [2019-12-07 15:06:07,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:07,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:06:07,682 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411293924] [2019-12-07 15:06:07,682 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:06:07,682 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:07,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:06:07,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:06:07,683 INFO L87 Difference]: Start difference. First operand 21862 states and 65446 transitions. Second operand 5 states. [2019-12-07 15:06:07,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:07,788 INFO L93 Difference]: Finished difference Result 35529 states and 107586 transitions. [2019-12-07 15:06:07,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:06:07,788 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 15:06:07,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:07,804 INFO L225 Difference]: With dead ends: 35529 [2019-12-07 15:06:07,804 INFO L226 Difference]: Without dead ends: 14442 [2019-12-07 15:06:07,805 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:06:07,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14442 states. [2019-12-07 15:06:07,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14442 to 13970. [2019-12-07 15:06:07,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13970 states. [2019-12-07 15:06:08,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13970 states to 13970 states and 42455 transitions. [2019-12-07 15:06:08,010 INFO L78 Accepts]: Start accepts. Automaton has 13970 states and 42455 transitions. Word has length 42 [2019-12-07 15:06:08,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:08,010 INFO L462 AbstractCegarLoop]: Abstraction has 13970 states and 42455 transitions. [2019-12-07 15:06:08,010 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:06:08,010 INFO L276 IsEmpty]: Start isEmpty. Operand 13970 states and 42455 transitions. [2019-12-07 15:06:08,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 15:06:08,023 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:08,023 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:08,023 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:08,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:08,023 INFO L82 PathProgramCache]: Analyzing trace with hash 1991608764, now seen corresponding path program 2 times [2019-12-07 15:06:08,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:08,024 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239166497] [2019-12-07 15:06:08,024 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:08,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:08,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:08,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239166497] [2019-12-07 15:06:08,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:08,072 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:06:08,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2014927783] [2019-12-07 15:06:08,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:06:08,072 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:08,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:06:08,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:06:08,073 INFO L87 Difference]: Start difference. First operand 13970 states and 42455 transitions. Second operand 5 states. [2019-12-07 15:06:08,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:08,121 INFO L93 Difference]: Finished difference Result 12806 states and 39871 transitions. [2019-12-07 15:06:08,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:06:08,122 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 15:06:08,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:08,135 INFO L225 Difference]: With dead ends: 12806 [2019-12-07 15:06:08,135 INFO L226 Difference]: Without dead ends: 12061 [2019-12-07 15:06:08,135 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:06:08,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12061 states. [2019-12-07 15:06:08,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12061 to 8605. [2019-12-07 15:06:08,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8605 states. [2019-12-07 15:06:08,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8605 states to 8605 states and 26891 transitions. [2019-12-07 15:06:08,286 INFO L78 Accepts]: Start accepts. Automaton has 8605 states and 26891 transitions. Word has length 42 [2019-12-07 15:06:08,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:08,286 INFO L462 AbstractCegarLoop]: Abstraction has 8605 states and 26891 transitions. [2019-12-07 15:06:08,286 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:06:08,286 INFO L276 IsEmpty]: Start isEmpty. Operand 8605 states and 26891 transitions. [2019-12-07 15:06:08,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:06:08,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:08,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:08,294 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:08,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:08,294 INFO L82 PathProgramCache]: Analyzing trace with hash 489675312, now seen corresponding path program 1 times [2019-12-07 15:06:08,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:08,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229278755] [2019-12-07 15:06:08,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:08,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:08,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:08,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229278755] [2019-12-07 15:06:08,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:08,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:06:08,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1620212598] [2019-12-07 15:06:08,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:06:08,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:08,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:06:08,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:06:08,318 INFO L87 Difference]: Start difference. First operand 8605 states and 26891 transitions. Second operand 3 states. [2019-12-07 15:06:08,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:08,367 INFO L93 Difference]: Finished difference Result 12941 states and 39734 transitions. [2019-12-07 15:06:08,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:06:08,368 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:06:08,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:08,381 INFO L225 Difference]: With dead ends: 12941 [2019-12-07 15:06:08,381 INFO L226 Difference]: Without dead ends: 12941 [2019-12-07 15:06:08,381 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:06:08,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12941 states. [2019-12-07 15:06:08,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12941 to 10235. [2019-12-07 15:06:08,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10235 states. [2019-12-07 15:06:08,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10235 states to 10235 states and 31605 transitions. [2019-12-07 15:06:08,544 INFO L78 Accepts]: Start accepts. Automaton has 10235 states and 31605 transitions. Word has length 66 [2019-12-07 15:06:08,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:08,544 INFO L462 AbstractCegarLoop]: Abstraction has 10235 states and 31605 transitions. [2019-12-07 15:06:08,544 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:06:08,544 INFO L276 IsEmpty]: Start isEmpty. Operand 10235 states and 31605 transitions. [2019-12-07 15:06:08,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:06:08,552 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:08,552 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:08,552 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:08,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:08,552 INFO L82 PathProgramCache]: Analyzing trace with hash -926860960, now seen corresponding path program 1 times [2019-12-07 15:06:08,553 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:08,553 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748825306] [2019-12-07 15:06:08,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:08,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:08,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:08,649 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748825306] [2019-12-07 15:06:08,649 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:08,649 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:06:08,649 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1840313279] [2019-12-07 15:06:08,649 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:06:08,650 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:08,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:06:08,650 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:06:08,650 INFO L87 Difference]: Start difference. First operand 10235 states and 31605 transitions. Second operand 8 states. [2019-12-07 15:06:09,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:09,350 INFO L93 Difference]: Finished difference Result 17701 states and 53726 transitions. [2019-12-07 15:06:09,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 15:06:09,351 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 15:06:09,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:09,368 INFO L225 Difference]: With dead ends: 17701 [2019-12-07 15:06:09,368 INFO L226 Difference]: Without dead ends: 17701 [2019-12-07 15:06:09,369 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:06:09,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17701 states. [2019-12-07 15:06:09,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17701 to 12333. [2019-12-07 15:06:09,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12333 states. [2019-12-07 15:06:09,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12333 states to 12333 states and 37904 transitions. [2019-12-07 15:06:09,586 INFO L78 Accepts]: Start accepts. Automaton has 12333 states and 37904 transitions. Word has length 66 [2019-12-07 15:06:09,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:09,586 INFO L462 AbstractCegarLoop]: Abstraction has 12333 states and 37904 transitions. [2019-12-07 15:06:09,586 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:06:09,586 INFO L276 IsEmpty]: Start isEmpty. Operand 12333 states and 37904 transitions. [2019-12-07 15:06:09,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:06:09,597 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:09,598 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:09,598 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:09,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:09,598 INFO L82 PathProgramCache]: Analyzing trace with hash -1192128352, now seen corresponding path program 2 times [2019-12-07 15:06:09,598 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:09,598 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425735507] [2019-12-07 15:06:09,598 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:09,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:09,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:09,667 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1425735507] [2019-12-07 15:06:09,667 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:09,667 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:06:09,667 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526016098] [2019-12-07 15:06:09,668 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:06:09,668 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:09,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:06:09,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:06:09,668 INFO L87 Difference]: Start difference. First operand 12333 states and 37904 transitions. Second operand 4 states. [2019-12-07 15:06:09,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:09,730 INFO L93 Difference]: Finished difference Result 21441 states and 66109 transitions. [2019-12-07 15:06:09,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:06:09,730 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 15:06:09,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:09,740 INFO L225 Difference]: With dead ends: 21441 [2019-12-07 15:06:09,741 INFO L226 Difference]: Without dead ends: 9885 [2019-12-07 15:06:09,741 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:06:09,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9885 states. [2019-12-07 15:06:09,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9885 to 9885. [2019-12-07 15:06:09,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9885 states. [2019-12-07 15:06:09,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9885 states to 9885 states and 30389 transitions. [2019-12-07 15:06:09,885 INFO L78 Accepts]: Start accepts. Automaton has 9885 states and 30389 transitions. Word has length 66 [2019-12-07 15:06:09,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:09,885 INFO L462 AbstractCegarLoop]: Abstraction has 9885 states and 30389 transitions. [2019-12-07 15:06:09,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:06:09,885 INFO L276 IsEmpty]: Start isEmpty. Operand 9885 states and 30389 transitions. [2019-12-07 15:06:09,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:06:09,893 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:09,893 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:09,893 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:09,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:09,894 INFO L82 PathProgramCache]: Analyzing trace with hash 1338482558, now seen corresponding path program 3 times [2019-12-07 15:06:09,894 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:09,894 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1693271350] [2019-12-07 15:06:09,894 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:09,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:09,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:10,000 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1693271350] [2019-12-07 15:06:10,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:10,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:06:10,000 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [768800394] [2019-12-07 15:06:10,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:06:10,000 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:10,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:06:10,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:06:10,001 INFO L87 Difference]: Start difference. First operand 9885 states and 30389 transitions. Second operand 10 states. [2019-12-07 15:06:11,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:11,243 INFO L93 Difference]: Finished difference Result 20839 states and 62908 transitions. [2019-12-07 15:06:11,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:06:11,244 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 15:06:11,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:11,259 INFO L225 Difference]: With dead ends: 20839 [2019-12-07 15:06:11,259 INFO L226 Difference]: Without dead ends: 14077 [2019-12-07 15:06:11,260 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=271, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:06:11,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14077 states. [2019-12-07 15:06:11,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14077 to 11561. [2019-12-07 15:06:11,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11561 states. [2019-12-07 15:06:11,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11561 states to 11561 states and 34959 transitions. [2019-12-07 15:06:11,444 INFO L78 Accepts]: Start accepts. Automaton has 11561 states and 34959 transitions. Word has length 66 [2019-12-07 15:06:11,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:11,444 INFO L462 AbstractCegarLoop]: Abstraction has 11561 states and 34959 transitions. [2019-12-07 15:06:11,444 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:06:11,444 INFO L276 IsEmpty]: Start isEmpty. Operand 11561 states and 34959 transitions. [2019-12-07 15:06:11,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:06:11,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:11,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:11,454 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:11,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:11,454 INFO L82 PathProgramCache]: Analyzing trace with hash -1282024016, now seen corresponding path program 4 times [2019-12-07 15:06:11,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:11,455 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062048689] [2019-12-07 15:06:11,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:11,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:11,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:11,541 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062048689] [2019-12-07 15:06:11,541 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:11,541 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:06:11,541 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [913148068] [2019-12-07 15:06:11,542 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:06:11,542 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:11,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:06:11,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:06:11,542 INFO L87 Difference]: Start difference. First operand 11561 states and 34959 transitions. Second operand 7 states. [2019-12-07 15:06:11,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:11,745 INFO L93 Difference]: Finished difference Result 21369 states and 63740 transitions. [2019-12-07 15:06:11,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 15:06:11,746 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 15:06:11,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:11,761 INFO L225 Difference]: With dead ends: 21369 [2019-12-07 15:06:11,761 INFO L226 Difference]: Without dead ends: 15197 [2019-12-07 15:06:11,762 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:06:11,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15197 states. [2019-12-07 15:06:11,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15197 to 12411. [2019-12-07 15:06:11,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12411 states. [2019-12-07 15:06:11,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12411 states to 12411 states and 37275 transitions. [2019-12-07 15:06:11,963 INFO L78 Accepts]: Start accepts. Automaton has 12411 states and 37275 transitions. Word has length 66 [2019-12-07 15:06:11,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:11,963 INFO L462 AbstractCegarLoop]: Abstraction has 12411 states and 37275 transitions. [2019-12-07 15:06:11,963 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:06:11,963 INFO L276 IsEmpty]: Start isEmpty. Operand 12411 states and 37275 transitions. [2019-12-07 15:06:11,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:06:11,974 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:11,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:11,975 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:11,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:11,975 INFO L82 PathProgramCache]: Analyzing trace with hash -806923488, now seen corresponding path program 5 times [2019-12-07 15:06:11,975 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:11,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690609453] [2019-12-07 15:06:11,975 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:11,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:12,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:12,025 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [690609453] [2019-12-07 15:06:12,025 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:12,025 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:06:12,025 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179591194] [2019-12-07 15:06:12,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:06:12,026 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:12,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:06:12,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:06:12,026 INFO L87 Difference]: Start difference. First operand 12411 states and 37275 transitions. Second operand 3 states. [2019-12-07 15:06:12,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:12,092 INFO L93 Difference]: Finished difference Result 14588 states and 43756 transitions. [2019-12-07 15:06:12,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:06:12,093 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:06:12,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:12,108 INFO L225 Difference]: With dead ends: 14588 [2019-12-07 15:06:12,108 INFO L226 Difference]: Without dead ends: 14588 [2019-12-07 15:06:12,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:06:12,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14588 states. [2019-12-07 15:06:12,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14588 to 12080. [2019-12-07 15:06:12,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12080 states. [2019-12-07 15:06:12,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12080 states to 12080 states and 36513 transitions. [2019-12-07 15:06:12,297 INFO L78 Accepts]: Start accepts. Automaton has 12080 states and 36513 transitions. Word has length 66 [2019-12-07 15:06:12,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:12,297 INFO L462 AbstractCegarLoop]: Abstraction has 12080 states and 36513 transitions. [2019-12-07 15:06:12,297 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:06:12,297 INFO L276 IsEmpty]: Start isEmpty. Operand 12080 states and 36513 transitions. [2019-12-07 15:06:12,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:06:12,307 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:12,307 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:12,307 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:12,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:12,307 INFO L82 PathProgramCache]: Analyzing trace with hash 1425975690, now seen corresponding path program 1 times [2019-12-07 15:06:12,307 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:12,307 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679378671] [2019-12-07 15:06:12,307 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:12,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:12,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:12,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [679378671] [2019-12-07 15:06:12,421 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:12,421 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:06:12,421 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1961617737] [2019-12-07 15:06:12,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:06:12,422 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:12,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:06:12,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:06:12,422 INFO L87 Difference]: Start difference. First operand 12080 states and 36513 transitions. Second operand 11 states. [2019-12-07 15:06:13,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:13,091 INFO L93 Difference]: Finished difference Result 19742 states and 59088 transitions. [2019-12-07 15:06:13,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:06:13,092 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:06:13,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:13,107 INFO L225 Difference]: With dead ends: 19742 [2019-12-07 15:06:13,107 INFO L226 Difference]: Without dead ends: 14646 [2019-12-07 15:06:13,107 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 15:06:13,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14646 states. [2019-12-07 15:06:13,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14646 to 11863. [2019-12-07 15:06:13,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11863 states. [2019-12-07 15:06:13,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11863 states to 11863 states and 35809 transitions. [2019-12-07 15:06:13,295 INFO L78 Accepts]: Start accepts. Automaton has 11863 states and 35809 transitions. Word has length 67 [2019-12-07 15:06:13,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:13,296 INFO L462 AbstractCegarLoop]: Abstraction has 11863 states and 35809 transitions. [2019-12-07 15:06:13,296 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:06:13,296 INFO L276 IsEmpty]: Start isEmpty. Operand 11863 states and 35809 transitions. [2019-12-07 15:06:13,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:06:13,305 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:13,305 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:13,305 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:13,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:13,305 INFO L82 PathProgramCache]: Analyzing trace with hash 1279627604, now seen corresponding path program 2 times [2019-12-07 15:06:13,306 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:13,306 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192067976] [2019-12-07 15:06:13,306 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:13,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:13,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:13,427 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [192067976] [2019-12-07 15:06:13,427 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:13,427 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:06:13,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1576674144] [2019-12-07 15:06:13,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:06:13,428 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:13,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:06:13,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:06:13,428 INFO L87 Difference]: Start difference. First operand 11863 states and 35809 transitions. Second operand 10 states. [2019-12-07 15:06:14,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:14,015 INFO L93 Difference]: Finished difference Result 19607 states and 58425 transitions. [2019-12-07 15:06:14,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 15:06:14,016 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:06:14,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:14,034 INFO L225 Difference]: With dead ends: 19607 [2019-12-07 15:06:14,034 INFO L226 Difference]: Without dead ends: 15325 [2019-12-07 15:06:14,034 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 250 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=219, Invalid=837, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 15:06:14,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15325 states. [2019-12-07 15:06:14,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15325 to 11919. [2019-12-07 15:06:14,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11919 states. [2019-12-07 15:06:14,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11919 states to 11919 states and 35887 transitions. [2019-12-07 15:06:14,252 INFO L78 Accepts]: Start accepts. Automaton has 11919 states and 35887 transitions. Word has length 67 [2019-12-07 15:06:14,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:14,252 INFO L462 AbstractCegarLoop]: Abstraction has 11919 states and 35887 transitions. [2019-12-07 15:06:14,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:06:14,253 INFO L276 IsEmpty]: Start isEmpty. Operand 11919 states and 35887 transitions. [2019-12-07 15:06:14,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:06:14,262 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:14,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:14,262 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:14,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:14,263 INFO L82 PathProgramCache]: Analyzing trace with hash 1642000384, now seen corresponding path program 3 times [2019-12-07 15:06:14,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:14,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776611539] [2019-12-07 15:06:14,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:14,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:14,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:14,398 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776611539] [2019-12-07 15:06:14,398 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:14,398 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 15:06:14,398 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520213841] [2019-12-07 15:06:14,399 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 15:06:14,399 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:14,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 15:06:14,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:06:14,399 INFO L87 Difference]: Start difference. First operand 11919 states and 35887 transitions. Second operand 12 states. [2019-12-07 15:06:14,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:14,847 INFO L93 Difference]: Finished difference Result 18453 states and 54963 transitions. [2019-12-07 15:06:14,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:06:14,847 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 15:06:14,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:14,861 INFO L225 Difference]: With dead ends: 18453 [2019-12-07 15:06:14,861 INFO L226 Difference]: Without dead ends: 14287 [2019-12-07 15:06:14,862 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 144 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=657, Unknown=0, NotChecked=0, Total=812 [2019-12-07 15:06:14,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14287 states. [2019-12-07 15:06:15,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14287 to 11646. [2019-12-07 15:06:15,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11646 states. [2019-12-07 15:06:15,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11646 states to 11646 states and 35042 transitions. [2019-12-07 15:06:15,051 INFO L78 Accepts]: Start accepts. Automaton has 11646 states and 35042 transitions. Word has length 67 [2019-12-07 15:06:15,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:15,052 INFO L462 AbstractCegarLoop]: Abstraction has 11646 states and 35042 transitions. [2019-12-07 15:06:15,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 15:06:15,052 INFO L276 IsEmpty]: Start isEmpty. Operand 11646 states and 35042 transitions. [2019-12-07 15:06:15,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:06:15,062 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:15,062 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:15,062 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:15,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:15,062 INFO L82 PathProgramCache]: Analyzing trace with hash 8609018, now seen corresponding path program 4 times [2019-12-07 15:06:15,062 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:15,063 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10618211] [2019-12-07 15:06:15,063 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:15,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:06:15,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:06:15,200 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10618211] [2019-12-07 15:06:15,200 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:06:15,200 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 15:06:15,200 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063146991] [2019-12-07 15:06:15,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 15:06:15,200 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:06:15,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 15:06:15,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:06:15,201 INFO L87 Difference]: Start difference. First operand 11646 states and 35042 transitions. Second operand 12 states. [2019-12-07 15:06:16,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:06:16,214 INFO L93 Difference]: Finished difference Result 13356 states and 39490 transitions. [2019-12-07 15:06:16,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 15:06:16,215 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 15:06:16,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:06:16,231 INFO L225 Difference]: With dead ends: 13356 [2019-12-07 15:06:16,231 INFO L226 Difference]: Without dead ends: 12893 [2019-12-07 15:06:16,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:06:16,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12893 states. [2019-12-07 15:06:16,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12893 to 11270. [2019-12-07 15:06:16,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11270 states. [2019-12-07 15:06:16,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11270 states to 11270 states and 34052 transitions. [2019-12-07 15:06:16,405 INFO L78 Accepts]: Start accepts. Automaton has 11270 states and 34052 transitions. Word has length 67 [2019-12-07 15:06:16,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:06:16,405 INFO L462 AbstractCegarLoop]: Abstraction has 11270 states and 34052 transitions. [2019-12-07 15:06:16,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 15:06:16,405 INFO L276 IsEmpty]: Start isEmpty. Operand 11270 states and 34052 transitions. [2019-12-07 15:06:16,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:06:16,415 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:06:16,415 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:06:16,415 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:06:16,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:06:16,415 INFO L82 PathProgramCache]: Analyzing trace with hash -919262302, now seen corresponding path program 5 times [2019-12-07 15:06:16,415 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:06:16,415 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836667389] [2019-12-07 15:06:16,415 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:06:16,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:06:16,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:06:16,507 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:06:16,507 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:06:16,509 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t639~0.base_24| 1)) (= |v_ULTIMATE.start_main_~#t639~0.offset_19| 0) (= 0 v_~weak$$choice0~0_14) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t639~0.base_24| 4)) (= |v_#NULL.offset_6| 0) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t639~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t639~0.base_24|) |v_ULTIMATE.start_main_~#t639~0.offset_19| 0)) |v_#memory_int_21|) (< 0 |v_#StackHeapBarrier_17|) (= (select .cse0 |v_ULTIMATE.start_main_~#t639~0.base_24|) 0) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t639~0.base_24|) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ULTIMATE.start_main_~#t640~0.offset=|v_ULTIMATE.start_main_~#t640~0.offset_19|, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ULTIMATE.start_main_~#t640~0.base=|v_ULTIMATE.start_main_~#t640~0.base_26|, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ULTIMATE.start_main_~#t641~0.base=|v_ULTIMATE.start_main_~#t641~0.base_27|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ULTIMATE.start_main_~#t639~0.base=|v_ULTIMATE.start_main_~#t639~0.base_24|, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_~#t639~0.offset=|v_ULTIMATE.start_main_~#t639~0.offset_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ULTIMATE.start_main_~#t641~0.offset=|v_ULTIMATE.start_main_~#t641~0.offset_20|, ~y~0=v_~y~0_39, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ULTIMATE.start_main_~#t640~0.offset, ~a$w_buff0_used~0, ULTIMATE.start_main_~#t640~0.base, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t641~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t639~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_~#t639~0.offset, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t641~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:06:16,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t640~0.base_10| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t640~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t640~0.base_10|) |v_ULTIMATE.start_main_~#t640~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t640~0.base_10| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t640~0.base_10| 1)) (= 0 |v_ULTIMATE.start_main_~#t640~0.offset_9|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t640~0.base_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t640~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t640~0.offset=|v_ULTIMATE.start_main_~#t640~0.offset_9|, ULTIMATE.start_main_~#t640~0.base=|v_ULTIMATE.start_main_~#t640~0.base_10|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t640~0.offset, ULTIMATE.start_main_~#t640~0.base, #length] because there is no mapped edge [2019-12-07 15:06:16,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t641~0.base_13|)) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t641~0.base_13| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t641~0.base_13|) (= |v_ULTIMATE.start_main_~#t641~0.offset_11| 0) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t641~0.base_13|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t641~0.base_13| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t641~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t641~0.base_13|) |v_ULTIMATE.start_main_~#t641~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t641~0.base=|v_ULTIMATE.start_main_~#t641~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t641~0.offset=|v_ULTIMATE.start_main_~#t641~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t641~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t641~0.offset, #length] because there is no mapped edge [2019-12-07 15:06:16,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 15:06:16,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1114997206 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1114997206 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In-1114997206 |P1Thread1of1ForFork2_#t~ite9_Out-1114997206|) (not .cse1)) (and (or .cse1 .cse0) (= ~a~0_In-1114997206 |P1Thread1of1ForFork2_#t~ite9_Out-1114997206|)))) InVars {~a~0=~a~0_In-1114997206, ~a$w_buff1~0=~a$w_buff1~0_In-1114997206, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1114997206, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1114997206} OutVars{~a~0=~a~0_In-1114997206, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1114997206|, ~a$w_buff1~0=~a$w_buff1~0_In-1114997206, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1114997206, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1114997206} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:06:16,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In978008011 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In978008011 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out978008011| ~a$w_buff0_used~0_In978008011) (or .cse0 .cse1)) (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out978008011| 0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In978008011, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In978008011} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out978008011|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In978008011, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In978008011} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:06:16,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-175251220 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In-175251220 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-175251220 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-175251220 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-175251220|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-175251220 |P0Thread1of1ForFork1_#t~ite6_Out-175251220|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-175251220, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-175251220, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-175251220, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-175251220} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-175251220|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-175251220, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-175251220, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-175251220, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-175251220} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:06:16,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In1606116852 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out1606116852 ~a$r_buff0_thd1~0_In1606116852)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1606116852 256)))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out1606116852 0)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1606116852, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1606116852} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1606116852|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1606116852, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1606116852} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:06:16,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1602903176 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1602903176 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In1602903176 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd1~0_In1602903176 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1602903176|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$r_buff1_thd1~0_In1602903176 |P0Thread1of1ForFork1_#t~ite8_Out1602903176|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1602903176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1602903176, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1602903176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1602903176} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1602903176|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1602903176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1602903176, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1602903176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1602903176} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:06:16,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:06:16,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-448481020 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out-448481020| |P2Thread1of1ForFork0_#t~ite21_Out-448481020|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-448481020 256) 0))) (or (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-448481020 256))) (= 0 (mod ~a$w_buff0_used~0_In-448481020 256)) (and (= (mod ~a$r_buff1_thd3~0_In-448481020 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite20_Out-448481020| ~a$w_buff0~0_In-448481020)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In-448481020| |P2Thread1of1ForFork0_#t~ite20_Out-448481020|) (= |P2Thread1of1ForFork0_#t~ite21_Out-448481020| ~a$w_buff0~0_In-448481020)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-448481020, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-448481020, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-448481020, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-448481020, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-448481020, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-448481020|, ~weak$$choice2~0=~weak$$choice2~0_In-448481020} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-448481020|, ~a$w_buff0~0=~a$w_buff0~0_In-448481020, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-448481020, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-448481020, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-448481020, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-448481020|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-448481020, ~weak$$choice2~0=~weak$$choice2~0_In-448481020} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:06:16,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2070810321 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out2070810321| ~a$w_buff0_used~0_In2070810321) .cse0 (= |P2Thread1of1ForFork0_#t~ite26_Out2070810321| |P2Thread1of1ForFork0_#t~ite27_Out2070810321|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In2070810321 256)))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In2070810321 256))) (and (= (mod ~a$w_buff1_used~0_In2070810321 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In2070810321 256) 0)))) (and (= |P2Thread1of1ForFork0_#t~ite27_Out2070810321| ~a$w_buff0_used~0_In2070810321) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In2070810321| |P2Thread1of1ForFork0_#t~ite26_Out2070810321|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In2070810321|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2070810321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2070810321, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2070810321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2070810321, ~weak$$choice2~0=~weak$$choice2~0_In2070810321} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out2070810321|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out2070810321|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2070810321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2070810321, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2070810321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2070810321, ~weak$$choice2~0=~weak$$choice2~0_In2070810321} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:06:16,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1228980386 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1228980386 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In1228980386 256)) .cse0) (= (mod ~a$w_buff0_used~0_In1228980386 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1228980386 256))))) (= |P2Thread1of1ForFork0_#t~ite29_Out1228980386| |P2Thread1of1ForFork0_#t~ite30_Out1228980386|) (= |P2Thread1of1ForFork0_#t~ite29_Out1228980386| ~a$w_buff1_used~0_In1228980386) .cse1) (and (= ~a$w_buff1_used~0_In1228980386 |P2Thread1of1ForFork0_#t~ite30_Out1228980386|) (= |P2Thread1of1ForFork0_#t~ite29_In1228980386| |P2Thread1of1ForFork0_#t~ite29_Out1228980386|) (not .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1228980386, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1228980386, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1228980386, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1228980386, ~weak$$choice2~0=~weak$$choice2~0_In1228980386, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1228980386|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1228980386, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1228980386, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1228980386, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1228980386|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1228980386, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1228980386|, ~weak$$choice2~0=~weak$$choice2~0_In1228980386} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 15:06:16,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:06:16,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:06:16,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1678667074 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1678667074 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out1678667074| ~a$w_buff0_used~0_In1678667074)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1678667074|) (not .cse0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1678667074, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1678667074} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1678667074, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1678667074, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1678667074|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:06:16,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1663788081 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1663788081 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1663788081 256))) (.cse3 (= (mod ~a$r_buff1_thd2~0_In1663788081 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1663788081|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In1663788081 |P1Thread1of1ForFork2_#t~ite12_Out1663788081|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1663788081, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1663788081, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1663788081, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1663788081} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1663788081, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1663788081, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1663788081, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1663788081|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1663788081} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:06:16,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1537017660 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1537017660 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In1537017660 |P1Thread1of1ForFork2_#t~ite13_Out1537017660|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1537017660|) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1537017660, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1537017660} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1537017660, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1537017660, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1537017660|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:06:16,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In-102126103 256))) (.cse3 (= (mod ~a$r_buff1_thd2~0_In-102126103 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-102126103 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-102126103 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-102126103|)) (and (= ~a$r_buff1_thd2~0_In-102126103 |P1Thread1of1ForFork2_#t~ite14_Out-102126103|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-102126103, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-102126103, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-102126103, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-102126103} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-102126103, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-102126103, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-102126103, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-102126103, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-102126103|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:06:16,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:06:16,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:06:16,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In279592666 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In279592666 256) 0)) (.cse1 (= |P2Thread1of1ForFork0_#t~ite39_Out279592666| |P2Thread1of1ForFork0_#t~ite38_Out279592666|))) (or (and (not .cse0) .cse1 (= |P2Thread1of1ForFork0_#t~ite38_Out279592666| ~a$w_buff1~0_In279592666) (not .cse2)) (and (= ~a~0_In279592666 |P2Thread1of1ForFork0_#t~ite38_Out279592666|) (or .cse2 .cse0) .cse1))) InVars {~a~0=~a~0_In279592666, ~a$w_buff1~0=~a$w_buff1~0_In279592666, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In279592666, ~a$w_buff1_used~0=~a$w_buff1_used~0_In279592666} OutVars{~a~0=~a~0_In279592666, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out279592666|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out279592666|, ~a$w_buff1~0=~a$w_buff1~0_In279592666, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In279592666, ~a$w_buff1_used~0=~a$w_buff1_used~0_In279592666} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:06:16,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In719198574 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In719198574 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out719198574| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out719198574| ~a$w_buff0_used~0_In719198574) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In719198574, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In719198574} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out719198574|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In719198574, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In719198574} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:06:16,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1168697704 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-1168697704 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-1168697704 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1168697704 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-1168697704 |P2Thread1of1ForFork0_#t~ite41_Out-1168697704|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1168697704|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1168697704, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1168697704, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1168697704, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1168697704} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1168697704, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1168697704, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1168697704, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1168697704, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1168697704|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:06:16,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-175000297 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-175000297 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-175000297| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-175000297| ~a$r_buff0_thd3~0_In-175000297) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-175000297, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-175000297} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-175000297, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-175000297, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-175000297|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:06:16,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In112185236 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In112185236 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In112185236 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In112185236 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out112185236| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite43_Out112185236| ~a$r_buff1_thd3~0_In112185236) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In112185236, ~a$w_buff0_used~0=~a$w_buff0_used~0_In112185236, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In112185236, ~a$w_buff1_used~0=~a$w_buff1_used~0_In112185236} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out112185236|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In112185236, ~a$w_buff0_used~0=~a$w_buff0_used~0_In112185236, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In112185236, ~a$w_buff1_used~0=~a$w_buff1_used~0_In112185236} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:06:16,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:06:16,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:06:16,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1112432790 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-1112432790 256) 0)) (.cse1 (= |ULTIMATE.start_main_#t~ite48_Out-1112432790| |ULTIMATE.start_main_#t~ite47_Out-1112432790|))) (or (and (not .cse0) (= ~a$w_buff1~0_In-1112432790 |ULTIMATE.start_main_#t~ite47_Out-1112432790|) .cse1 (not .cse2)) (and (or .cse0 .cse2) .cse1 (= ~a~0_In-1112432790 |ULTIMATE.start_main_#t~ite47_Out-1112432790|)))) InVars {~a~0=~a~0_In-1112432790, ~a$w_buff1~0=~a$w_buff1~0_In-1112432790, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1112432790, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1112432790} OutVars{~a~0=~a~0_In-1112432790, ~a$w_buff1~0=~a$w_buff1~0_In-1112432790, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1112432790|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1112432790, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1112432790|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1112432790} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:06:16,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-935810586 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-935810586 256) 0))) (or (and (= ~a$w_buff0_used~0_In-935810586 |ULTIMATE.start_main_#t~ite49_Out-935810586|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-935810586|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-935810586, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-935810586} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-935810586, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-935810586|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-935810586} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:06:16,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd0~0_In1813713796 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1813713796 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1813713796 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1813713796 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1813713796 |ULTIMATE.start_main_#t~ite50_Out1813713796|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1813713796|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1813713796, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1813713796, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1813713796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1813713796} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1813713796|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1813713796, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1813713796, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1813713796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1813713796} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:06:16,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In2128365845 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In2128365845 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out2128365845| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$r_buff0_thd0~0_In2128365845 |ULTIMATE.start_main_#t~ite51_Out2128365845|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2128365845, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2128365845} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out2128365845|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2128365845, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2128365845} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:06:16,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In10806756 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In10806756 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In10806756 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In10806756 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out10806756|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd0~0_In10806756 |ULTIMATE.start_main_#t~ite52_Out10806756|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In10806756, ~a$w_buff0_used~0=~a$w_buff0_used~0_In10806756, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In10806756, ~a$w_buff1_used~0=~a$w_buff1_used~0_In10806756} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out10806756|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In10806756, ~a$w_buff0_used~0=~a$w_buff0_used~0_In10806756, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In10806756, ~a$w_buff1_used~0=~a$w_buff1_used~0_In10806756} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:06:16,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:06:16,585 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:06:16 BasicIcfg [2019-12-07 15:06:16,586 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:06:16,586 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:06:16,586 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:06:16,586 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:06:16,587 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:03:08" (3/4) ... [2019-12-07 15:06:16,588 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:06:16,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t639~0.base_24| 1)) (= |v_ULTIMATE.start_main_~#t639~0.offset_19| 0) (= 0 v_~weak$$choice0~0_14) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t639~0.base_24| 4)) (= |v_#NULL.offset_6| 0) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t639~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t639~0.base_24|) |v_ULTIMATE.start_main_~#t639~0.offset_19| 0)) |v_#memory_int_21|) (< 0 |v_#StackHeapBarrier_17|) (= (select .cse0 |v_ULTIMATE.start_main_~#t639~0.base_24|) 0) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t639~0.base_24|) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ULTIMATE.start_main_~#t640~0.offset=|v_ULTIMATE.start_main_~#t640~0.offset_19|, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ULTIMATE.start_main_~#t640~0.base=|v_ULTIMATE.start_main_~#t640~0.base_26|, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ULTIMATE.start_main_~#t641~0.base=|v_ULTIMATE.start_main_~#t641~0.base_27|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ULTIMATE.start_main_~#t639~0.base=|v_ULTIMATE.start_main_~#t639~0.base_24|, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_~#t639~0.offset=|v_ULTIMATE.start_main_~#t639~0.offset_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ULTIMATE.start_main_~#t641~0.offset=|v_ULTIMATE.start_main_~#t641~0.offset_20|, ~y~0=v_~y~0_39, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ULTIMATE.start_main_~#t640~0.offset, ~a$w_buff0_used~0, ULTIMATE.start_main_~#t640~0.base, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t641~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t639~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_~#t639~0.offset, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t641~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:06:16,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t640~0.base_10| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t640~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t640~0.base_10|) |v_ULTIMATE.start_main_~#t640~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t640~0.base_10| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t640~0.base_10| 1)) (= 0 |v_ULTIMATE.start_main_~#t640~0.offset_9|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t640~0.base_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t640~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t640~0.offset=|v_ULTIMATE.start_main_~#t640~0.offset_9|, ULTIMATE.start_main_~#t640~0.base=|v_ULTIMATE.start_main_~#t640~0.base_10|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t640~0.offset, ULTIMATE.start_main_~#t640~0.base, #length] because there is no mapped edge [2019-12-07 15:06:16,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t641~0.base_13|)) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t641~0.base_13| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t641~0.base_13|) (= |v_ULTIMATE.start_main_~#t641~0.offset_11| 0) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t641~0.base_13|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t641~0.base_13| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t641~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t641~0.base_13|) |v_ULTIMATE.start_main_~#t641~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t641~0.base=|v_ULTIMATE.start_main_~#t641~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t641~0.offset=|v_ULTIMATE.start_main_~#t641~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t641~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t641~0.offset, #length] because there is no mapped edge [2019-12-07 15:06:16,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 15:06:16,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1114997206 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1114997206 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In-1114997206 |P1Thread1of1ForFork2_#t~ite9_Out-1114997206|) (not .cse1)) (and (or .cse1 .cse0) (= ~a~0_In-1114997206 |P1Thread1of1ForFork2_#t~ite9_Out-1114997206|)))) InVars {~a~0=~a~0_In-1114997206, ~a$w_buff1~0=~a$w_buff1~0_In-1114997206, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1114997206, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1114997206} OutVars{~a~0=~a~0_In-1114997206, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1114997206|, ~a$w_buff1~0=~a$w_buff1~0_In-1114997206, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1114997206, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1114997206} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:06:16,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In978008011 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In978008011 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out978008011| ~a$w_buff0_used~0_In978008011) (or .cse0 .cse1)) (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out978008011| 0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In978008011, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In978008011} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out978008011|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In978008011, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In978008011} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:06:16,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-175251220 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In-175251220 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-175251220 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-175251220 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-175251220|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-175251220 |P0Thread1of1ForFork1_#t~ite6_Out-175251220|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-175251220, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-175251220, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-175251220, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-175251220} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-175251220|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-175251220, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-175251220, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-175251220, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-175251220} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:06:16,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In1606116852 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out1606116852 ~a$r_buff0_thd1~0_In1606116852)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1606116852 256)))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out1606116852 0)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1606116852, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1606116852} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1606116852|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1606116852, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1606116852} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:06:16,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1602903176 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1602903176 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In1602903176 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd1~0_In1602903176 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1602903176|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$r_buff1_thd1~0_In1602903176 |P0Thread1of1ForFork1_#t~ite8_Out1602903176|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1602903176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1602903176, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1602903176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1602903176} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1602903176|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1602903176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1602903176, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1602903176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1602903176} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:06:16,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:06:16,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-448481020 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_Out-448481020| |P2Thread1of1ForFork0_#t~ite21_Out-448481020|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-448481020 256) 0))) (or (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-448481020 256))) (= 0 (mod ~a$w_buff0_used~0_In-448481020 256)) (and (= (mod ~a$r_buff1_thd3~0_In-448481020 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite20_Out-448481020| ~a$w_buff0~0_In-448481020)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In-448481020| |P2Thread1of1ForFork0_#t~ite20_Out-448481020|) (= |P2Thread1of1ForFork0_#t~ite21_Out-448481020| ~a$w_buff0~0_In-448481020)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-448481020, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-448481020, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-448481020, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-448481020, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-448481020, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-448481020|, ~weak$$choice2~0=~weak$$choice2~0_In-448481020} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-448481020|, ~a$w_buff0~0=~a$w_buff0~0_In-448481020, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-448481020, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-448481020, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-448481020, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-448481020|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-448481020, ~weak$$choice2~0=~weak$$choice2~0_In-448481020} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 15:06:16,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2070810321 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out2070810321| ~a$w_buff0_used~0_In2070810321) .cse0 (= |P2Thread1of1ForFork0_#t~ite26_Out2070810321| |P2Thread1of1ForFork0_#t~ite27_Out2070810321|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In2070810321 256)))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In2070810321 256))) (and (= (mod ~a$w_buff1_used~0_In2070810321 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In2070810321 256) 0)))) (and (= |P2Thread1of1ForFork0_#t~ite27_Out2070810321| ~a$w_buff0_used~0_In2070810321) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In2070810321| |P2Thread1of1ForFork0_#t~ite26_Out2070810321|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In2070810321|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2070810321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2070810321, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2070810321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2070810321, ~weak$$choice2~0=~weak$$choice2~0_In2070810321} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out2070810321|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out2070810321|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2070810321, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2070810321, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2070810321, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2070810321, ~weak$$choice2~0=~weak$$choice2~0_In2070810321} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:06:16,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1228980386 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In1228980386 256)))) (or (and (= 0 (mod ~a$w_buff1_used~0_In1228980386 256)) .cse0) (= (mod ~a$w_buff0_used~0_In1228980386 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1228980386 256))))) (= |P2Thread1of1ForFork0_#t~ite29_Out1228980386| |P2Thread1of1ForFork0_#t~ite30_Out1228980386|) (= |P2Thread1of1ForFork0_#t~ite29_Out1228980386| ~a$w_buff1_used~0_In1228980386) .cse1) (and (= ~a$w_buff1_used~0_In1228980386 |P2Thread1of1ForFork0_#t~ite30_Out1228980386|) (= |P2Thread1of1ForFork0_#t~ite29_In1228980386| |P2Thread1of1ForFork0_#t~ite29_Out1228980386|) (not .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1228980386, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1228980386, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1228980386, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1228980386, ~weak$$choice2~0=~weak$$choice2~0_In1228980386, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1228980386|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1228980386, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1228980386, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1228980386, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1228980386|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1228980386, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1228980386|, ~weak$$choice2~0=~weak$$choice2~0_In1228980386} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 15:06:16,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:06:16,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 15:06:16,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1678667074 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1678667074 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out1678667074| ~a$w_buff0_used~0_In1678667074)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1678667074|) (not .cse0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1678667074, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1678667074} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1678667074, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1678667074, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1678667074|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:06:16,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1663788081 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1663788081 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1663788081 256))) (.cse3 (= (mod ~a$r_buff1_thd2~0_In1663788081 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1663788081|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In1663788081 |P1Thread1of1ForFork2_#t~ite12_Out1663788081|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1663788081, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1663788081, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1663788081, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1663788081} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1663788081, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1663788081, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1663788081, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1663788081|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1663788081} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:06:16,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1537017660 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1537017660 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In1537017660 |P1Thread1of1ForFork2_#t~ite13_Out1537017660|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1537017660|) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1537017660, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1537017660} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1537017660, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1537017660, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1537017660|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:06:16,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In-102126103 256))) (.cse3 (= (mod ~a$r_buff1_thd2~0_In-102126103 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-102126103 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-102126103 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-102126103|)) (and (= ~a$r_buff1_thd2~0_In-102126103 |P1Thread1of1ForFork2_#t~ite14_Out-102126103|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-102126103, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-102126103, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-102126103, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-102126103} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-102126103, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-102126103, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-102126103, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-102126103, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-102126103|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:06:16,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:06:16,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 15:06:16,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In279592666 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In279592666 256) 0)) (.cse1 (= |P2Thread1of1ForFork0_#t~ite39_Out279592666| |P2Thread1of1ForFork0_#t~ite38_Out279592666|))) (or (and (not .cse0) .cse1 (= |P2Thread1of1ForFork0_#t~ite38_Out279592666| ~a$w_buff1~0_In279592666) (not .cse2)) (and (= ~a~0_In279592666 |P2Thread1of1ForFork0_#t~ite38_Out279592666|) (or .cse2 .cse0) .cse1))) InVars {~a~0=~a~0_In279592666, ~a$w_buff1~0=~a$w_buff1~0_In279592666, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In279592666, ~a$w_buff1_used~0=~a$w_buff1_used~0_In279592666} OutVars{~a~0=~a~0_In279592666, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out279592666|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out279592666|, ~a$w_buff1~0=~a$w_buff1~0_In279592666, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In279592666, ~a$w_buff1_used~0=~a$w_buff1_used~0_In279592666} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:06:16,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In719198574 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In719198574 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out719198574| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out719198574| ~a$w_buff0_used~0_In719198574) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In719198574, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In719198574} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out719198574|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In719198574, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In719198574} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:06:16,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1168697704 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-1168697704 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-1168697704 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1168697704 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-1168697704 |P2Thread1of1ForFork0_#t~ite41_Out-1168697704|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1168697704|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1168697704, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1168697704, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1168697704, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1168697704} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1168697704, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1168697704, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1168697704, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1168697704, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1168697704|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:06:16,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-175000297 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-175000297 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-175000297| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-175000297| ~a$r_buff0_thd3~0_In-175000297) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-175000297, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-175000297} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-175000297, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-175000297, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-175000297|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:06:16,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In112185236 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In112185236 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In112185236 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In112185236 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out112185236| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite43_Out112185236| ~a$r_buff1_thd3~0_In112185236) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In112185236, ~a$w_buff0_used~0=~a$w_buff0_used~0_In112185236, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In112185236, ~a$w_buff1_used~0=~a$w_buff1_used~0_In112185236} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out112185236|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In112185236, ~a$w_buff0_used~0=~a$w_buff0_used~0_In112185236, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In112185236, ~a$w_buff1_used~0=~a$w_buff1_used~0_In112185236} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:06:16,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:06:16,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:06:16,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1112432790 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-1112432790 256) 0)) (.cse1 (= |ULTIMATE.start_main_#t~ite48_Out-1112432790| |ULTIMATE.start_main_#t~ite47_Out-1112432790|))) (or (and (not .cse0) (= ~a$w_buff1~0_In-1112432790 |ULTIMATE.start_main_#t~ite47_Out-1112432790|) .cse1 (not .cse2)) (and (or .cse0 .cse2) .cse1 (= ~a~0_In-1112432790 |ULTIMATE.start_main_#t~ite47_Out-1112432790|)))) InVars {~a~0=~a~0_In-1112432790, ~a$w_buff1~0=~a$w_buff1~0_In-1112432790, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1112432790, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1112432790} OutVars{~a~0=~a~0_In-1112432790, ~a$w_buff1~0=~a$w_buff1~0_In-1112432790, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1112432790|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1112432790, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1112432790|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1112432790} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:06:16,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-935810586 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-935810586 256) 0))) (or (and (= ~a$w_buff0_used~0_In-935810586 |ULTIMATE.start_main_#t~ite49_Out-935810586|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-935810586|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-935810586, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-935810586} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-935810586, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-935810586|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-935810586} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:06:16,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd0~0_In1813713796 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1813713796 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1813713796 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1813713796 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1813713796 |ULTIMATE.start_main_#t~ite50_Out1813713796|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1813713796|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1813713796, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1813713796, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1813713796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1813713796} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1813713796|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1813713796, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1813713796, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1813713796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1813713796} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:06:16,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In2128365845 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In2128365845 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out2128365845| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$r_buff0_thd0~0_In2128365845 |ULTIMATE.start_main_#t~ite51_Out2128365845|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2128365845, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2128365845} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out2128365845|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2128365845, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2128365845} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:06:16,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In10806756 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In10806756 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In10806756 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In10806756 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out10806756|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd0~0_In10806756 |ULTIMATE.start_main_#t~ite52_Out10806756|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In10806756, ~a$w_buff0_used~0=~a$w_buff0_used~0_In10806756, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In10806756, ~a$w_buff1_used~0=~a$w_buff1_used~0_In10806756} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out10806756|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In10806756, ~a$w_buff0_used~0=~a$w_buff0_used~0_In10806756, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In10806756, ~a$w_buff1_used~0=~a$w_buff1_used~0_In10806756} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:06:16,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:06:16,675 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_7ae10271-24ef-4bf6-bc75-9903da237339/bin/uautomizer/witness.graphml [2019-12-07 15:06:16,675 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:06:16,677 INFO L168 Benchmark]: Toolchain (without parser) took 188572.68 ms. Allocated memory was 1.0 GB in the beginning and 8.9 GB in the end (delta: 7.9 GB). Free memory was 932.6 MB in the beginning and 4.1 GB in the end (delta: -3.2 GB). Peak memory consumption was 4.7 GB. Max. memory is 11.5 GB. [2019-12-07 15:06:16,677 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:06:16,678 INFO L168 Benchmark]: CACSL2BoogieTranslator took 391.84 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 81.3 MB). Free memory was 932.6 MB in the beginning and 1.0 GB in the end (delta: -114.9 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:06:16,678 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:06:16,678 INFO L168 Benchmark]: Boogie Preprocessor took 25.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:06:16,678 INFO L168 Benchmark]: RCFGBuilder took 411.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 982.7 MB in the end (delta: 59.5 MB). Peak memory consumption was 59.5 MB. Max. memory is 11.5 GB. [2019-12-07 15:06:16,679 INFO L168 Benchmark]: TraceAbstraction took 187614.26 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 982.7 MB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. [2019-12-07 15:06:16,679 INFO L168 Benchmark]: Witness Printer took 89.64 ms. Allocated memory is still 8.9 GB. Free memory was 4.2 GB in the beginning and 4.1 GB in the end (delta: 40.2 MB). Peak memory consumption was 40.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:06:16,681 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 391.84 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 81.3 MB). Free memory was 932.6 MB in the beginning and 1.0 GB in the end (delta: -114.9 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.38 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 411.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 982.7 MB in the end (delta: 59.5 MB). Peak memory consumption was 59.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 187614.26 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 982.7 MB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. * Witness Printer took 89.64 ms. Allocated memory is still 8.9 GB. Free memory was 4.2 GB in the beginning and 4.1 GB in the end (delta: 40.2 MB). Peak memory consumption was 40.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 178 ProgramPointsBefore, 93 ProgramPointsAfterwards, 215 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7050 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 63 SemBasedMoverChecksPositive, 249 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78858 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t639, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t640, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t641, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L740] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L741] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L742] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L743] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L744] 1 a$r_buff0_thd1 = (_Bool)1 [L747] 1 x = 1 [L750] 1 __unbuffered_p0_EAX = x [L753] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L756] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L770] 2 y = 1 [L773] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L756] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L757] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L790] 3 z = 2 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L758] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=2] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=2] [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L845] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L845] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 187.4s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 37.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5450 SDtfs, 6751 SDslu, 15505 SDs, 0 SdLazy, 8072 SolverSat, 252 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 261 GetRequests, 36 SyntacticMatches, 10 SemanticMatches, 215 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 640 ImplicationChecksByTransitivity, 2.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=325487occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 128.1s AutomataMinimizationTime, 28 MinimizatonAttempts, 475135 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 1147 NumberOfCodeBlocks, 1147 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 1052 ConstructedInterpolants, 0 QuantifiedInterpolants, 303180 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...