./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e454893e30f95360c8946ce59371c28593acc803 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:25:04,528 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:25:04,529 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:25:04,537 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:25:04,537 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:25:04,537 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:25:04,538 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:25:04,540 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:25:04,541 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:25:04,541 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:25:04,542 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:25:04,543 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:25:04,543 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:25:04,544 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:25:04,544 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:25:04,545 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:25:04,545 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:25:04,546 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:25:04,547 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:25:04,549 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:25:04,550 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:25:04,551 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:25:04,551 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:25:04,552 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:25:04,553 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:25:04,554 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:25:04,554 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:25:04,554 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:25:04,554 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:25:04,555 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:25:04,555 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:25:04,556 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:25:04,556 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:25:04,556 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:25:04,557 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:25:04,557 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:25:04,557 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:25:04,558 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:25:04,558 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:25:04,558 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:25:04,559 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:25:04,559 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:25:04,568 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:25:04,568 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:25:04,569 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:25:04,569 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:25:04,569 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:25:04,569 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:25:04,569 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:25:04,569 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:25:04,569 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:25:04,570 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:25:04,570 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:25:04,570 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:25:04,570 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:25:04,570 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:25:04,570 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:25:04,570 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:25:04,570 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:25:04,570 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:25:04,571 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:25:04,571 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:25:04,571 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:25:04,571 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:25:04,571 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:25:04,571 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:25:04,571 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:25:04,571 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:25:04,571 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:25:04,572 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:25:04,572 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:25:04,572 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e454893e30f95360c8946ce59371c28593acc803 [2019-12-07 18:25:04,672 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:25:04,680 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:25:04,682 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:25:04,683 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:25:04,683 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:25:04,683 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix024_pso.opt.i [2019-12-07 18:25:04,720 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/data/226b52af9/eda28b4b57d543809c5db8be427c320d/FLAG55b075ae2 [2019-12-07 18:25:05,085 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:25:05,085 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/sv-benchmarks/c/pthread-wmm/mix024_pso.opt.i [2019-12-07 18:25:05,095 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/data/226b52af9/eda28b4b57d543809c5db8be427c320d/FLAG55b075ae2 [2019-12-07 18:25:05,104 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/data/226b52af9/eda28b4b57d543809c5db8be427c320d [2019-12-07 18:25:05,106 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:25:05,107 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:25:05,108 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:25:05,108 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:25:05,110 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:25:05,111 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,113 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@188b0e99 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05, skipping insertion in model container [2019-12-07 18:25:05,113 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,117 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:25:05,144 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:25:05,399 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:25:05,407 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:25:05,447 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:25:05,492 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:25:05,492 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05 WrapperNode [2019-12-07 18:25:05,493 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:25:05,493 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:25:05,493 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:25:05,493 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:25:05,499 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,512 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,530 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:25:05,530 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:25:05,530 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:25:05,530 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:25:05,536 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,537 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,540 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,540 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,547 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,550 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,552 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... [2019-12-07 18:25:05,555 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:25:05,555 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:25:05,555 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:25:05,555 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:25:05,556 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:25:05,601 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:25:05,601 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:25:05,601 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:25:05,602 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:25:05,602 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:25:05,602 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:25:05,602 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:25:05,602 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:25:05,602 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:25:05,602 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:25:05,603 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:25:05,603 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:25:05,603 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:25:05,604 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:25:05,944 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:25:05,945 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:25:05,945 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:25:05 BoogieIcfgContainer [2019-12-07 18:25:05,945 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:25:05,946 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:25:05,946 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:25:05,948 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:25:05,948 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:25:05" (1/3) ... [2019-12-07 18:25:05,948 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@173df7a0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:25:05, skipping insertion in model container [2019-12-07 18:25:05,948 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:25:05" (2/3) ... [2019-12-07 18:25:05,949 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@173df7a0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:25:05, skipping insertion in model container [2019-12-07 18:25:05,949 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:25:05" (3/3) ... [2019-12-07 18:25:05,950 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_pso.opt.i [2019-12-07 18:25:05,956 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:25:05,956 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:25:05,960 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:25:05,961 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:25:05,984 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,984 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,984 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,985 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,985 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,985 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,985 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,985 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,985 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,986 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,986 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,986 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,986 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,986 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,986 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,986 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,987 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,987 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,987 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,987 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,987 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,987 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,987 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,987 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,988 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,989 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,990 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,991 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,992 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,993 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,994 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,994 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,994 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,994 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,994 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,994 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,994 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,994 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,995 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,995 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,995 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,995 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,995 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,995 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,995 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,995 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,996 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,996 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,996 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,996 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,996 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,997 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,997 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,997 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,997 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,997 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,997 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,997 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,997 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,998 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,998 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,998 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,998 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,998 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,998 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,998 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,999 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,999 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,999 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,999 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,999 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,999 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,999 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:05,999 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,001 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,001 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,001 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,002 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,003 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,004 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:25:06,015 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:25:06,028 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:25:06,028 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:25:06,028 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:25:06,028 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:25:06,028 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:25:06,028 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:25:06,028 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:25:06,029 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:25:06,040 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 166 places, 197 transitions [2019-12-07 18:25:06,041 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 166 places, 197 transitions [2019-12-07 18:25:06,093 INFO L134 PetriNetUnfolder]: 41/194 cut-off events. [2019-12-07 18:25:06,093 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:25:06,103 INFO L76 FinitePrefix]: Finished finitePrefix Result has 204 conditions, 194 events. 41/194 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 709 event pairs. 9/160 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 18:25:06,117 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 166 places, 197 transitions [2019-12-07 18:25:06,144 INFO L134 PetriNetUnfolder]: 41/194 cut-off events. [2019-12-07 18:25:06,144 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:25:06,149 INFO L76 FinitePrefix]: Finished finitePrefix Result has 204 conditions, 194 events. 41/194 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 709 event pairs. 9/160 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 18:25:06,166 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 18:25:06,166 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:25:09,049 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 48 [2019-12-07 18:25:09,433 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 18:25:09,521 INFO L206 etLargeBlockEncoding]: Checked pairs total: 74173 [2019-12-07 18:25:09,521 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 18:25:09,523 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 90 transitions [2019-12-07 18:25:18,010 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 82802 states. [2019-12-07 18:25:18,012 INFO L276 IsEmpty]: Start isEmpty. Operand 82802 states. [2019-12-07 18:25:18,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 18:25:18,016 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:18,016 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 18:25:18,016 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:18,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:18,020 INFO L82 PathProgramCache]: Analyzing trace with hash 803939489, now seen corresponding path program 1 times [2019-12-07 18:25:18,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:18,026 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [37332113] [2019-12-07 18:25:18,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:18,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:18,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:18,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [37332113] [2019-12-07 18:25:18,175 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:18,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:25:18,176 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272054547] [2019-12-07 18:25:18,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:25:18,178 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:18,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:25:18,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:18,189 INFO L87 Difference]: Start difference. First operand 82802 states. Second operand 3 states. [2019-12-07 18:25:18,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:18,762 INFO L93 Difference]: Finished difference Result 81762 states and 350164 transitions. [2019-12-07 18:25:18,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:25:18,764 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 18:25:18,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:19,203 INFO L225 Difference]: With dead ends: 81762 [2019-12-07 18:25:19,203 INFO L226 Difference]: Without dead ends: 77082 [2019-12-07 18:25:19,204 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:22,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77082 states. [2019-12-07 18:25:23,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77082 to 77082. [2019-12-07 18:25:23,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77082 states. [2019-12-07 18:25:23,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77082 states to 77082 states and 329650 transitions. [2019-12-07 18:25:23,576 INFO L78 Accepts]: Start accepts. Automaton has 77082 states and 329650 transitions. Word has length 5 [2019-12-07 18:25:23,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:23,577 INFO L462 AbstractCegarLoop]: Abstraction has 77082 states and 329650 transitions. [2019-12-07 18:25:23,577 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:25:23,577 INFO L276 IsEmpty]: Start isEmpty. Operand 77082 states and 329650 transitions. [2019-12-07 18:25:23,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:25:23,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:23,583 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:23,584 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:23,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:23,584 INFO L82 PathProgramCache]: Analyzing trace with hash -1596901179, now seen corresponding path program 1 times [2019-12-07 18:25:23,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:23,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [948102413] [2019-12-07 18:25:23,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:23,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:23,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:23,646 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [948102413] [2019-12-07 18:25:23,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:23,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:25:23,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [426027824] [2019-12-07 18:25:23,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:25:23,649 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:23,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:25:23,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:25:23,649 INFO L87 Difference]: Start difference. First operand 77082 states and 329650 transitions. Second operand 4 states. [2019-12-07 18:25:24,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:24,424 INFO L93 Difference]: Finished difference Result 118758 states and 487540 transitions. [2019-12-07 18:25:24,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:25:24,425 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:25:24,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:26,325 INFO L225 Difference]: With dead ends: 118758 [2019-12-07 18:25:26,325 INFO L226 Difference]: Without dead ends: 118660 [2019-12-07 18:25:26,326 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:25:29,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118660 states. [2019-12-07 18:25:31,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118660 to 107371. [2019-12-07 18:25:31,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107371 states. [2019-12-07 18:25:31,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107371 states to 107371 states and 446647 transitions. [2019-12-07 18:25:31,598 INFO L78 Accepts]: Start accepts. Automaton has 107371 states and 446647 transitions. Word has length 13 [2019-12-07 18:25:31,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:31,599 INFO L462 AbstractCegarLoop]: Abstraction has 107371 states and 446647 transitions. [2019-12-07 18:25:31,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:25:31,599 INFO L276 IsEmpty]: Start isEmpty. Operand 107371 states and 446647 transitions. [2019-12-07 18:25:31,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:25:31,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:31,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:31,602 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:31,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:31,602 INFO L82 PathProgramCache]: Analyzing trace with hash -1662041210, now seen corresponding path program 1 times [2019-12-07 18:25:31,602 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:31,602 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57930867] [2019-12-07 18:25:31,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:31,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:31,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:31,646 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57930867] [2019-12-07 18:25:31,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:31,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:25:31,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2047657533] [2019-12-07 18:25:31,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:25:31,647 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:31,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:25:31,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:25:31,648 INFO L87 Difference]: Start difference. First operand 107371 states and 446647 transitions. Second operand 4 states. [2019-12-07 18:25:32,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:32,436 INFO L93 Difference]: Finished difference Result 153469 states and 623983 transitions. [2019-12-07 18:25:32,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:25:32,437 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:25:32,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:32,820 INFO L225 Difference]: With dead ends: 153469 [2019-12-07 18:25:32,820 INFO L226 Difference]: Without dead ends: 153357 [2019-12-07 18:25:32,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:25:36,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153357 states. [2019-12-07 18:25:40,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153357 to 127765. [2019-12-07 18:25:40,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127765 states. [2019-12-07 18:25:40,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127765 states to 127765 states and 528908 transitions. [2019-12-07 18:25:40,636 INFO L78 Accepts]: Start accepts. Automaton has 127765 states and 528908 transitions. Word has length 13 [2019-12-07 18:25:40,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:40,636 INFO L462 AbstractCegarLoop]: Abstraction has 127765 states and 528908 transitions. [2019-12-07 18:25:40,636 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:25:40,637 INFO L276 IsEmpty]: Start isEmpty. Operand 127765 states and 528908 transitions. [2019-12-07 18:25:40,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:25:40,640 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:40,640 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:40,640 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:40,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:40,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1480512145, now seen corresponding path program 1 times [2019-12-07 18:25:40,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:40,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1037395637] [2019-12-07 18:25:40,641 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:40,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:40,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:40,678 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1037395637] [2019-12-07 18:25:40,678 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:40,678 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:25:40,679 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1690871061] [2019-12-07 18:25:40,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:25:40,679 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:40,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:25:40,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:25:40,679 INFO L87 Difference]: Start difference. First operand 127765 states and 528908 transitions. Second operand 4 states. [2019-12-07 18:25:41,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:41,729 INFO L93 Difference]: Finished difference Result 160444 states and 657575 transitions. [2019-12-07 18:25:41,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:25:41,730 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 18:25:41,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:42,119 INFO L225 Difference]: With dead ends: 160444 [2019-12-07 18:25:42,119 INFO L226 Difference]: Without dead ends: 160348 [2019-12-07 18:25:42,119 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:25:46,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160348 states. [2019-12-07 18:25:48,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160348 to 137301. [2019-12-07 18:25:48,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137301 states. [2019-12-07 18:25:48,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137301 states to 137301 states and 567564 transitions. [2019-12-07 18:25:48,846 INFO L78 Accepts]: Start accepts. Automaton has 137301 states and 567564 transitions. Word has length 14 [2019-12-07 18:25:48,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:48,846 INFO L462 AbstractCegarLoop]: Abstraction has 137301 states and 567564 transitions. [2019-12-07 18:25:48,846 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:25:48,846 INFO L276 IsEmpty]: Start isEmpty. Operand 137301 states and 567564 transitions. [2019-12-07 18:25:48,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:25:48,849 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:48,849 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:48,849 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:48,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:48,850 INFO L82 PathProgramCache]: Analyzing trace with hash -1480362260, now seen corresponding path program 1 times [2019-12-07 18:25:48,850 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:48,850 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985653158] [2019-12-07 18:25:48,850 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:48,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:48,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:48,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985653158] [2019-12-07 18:25:48,881 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:48,881 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:25:48,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1635172725] [2019-12-07 18:25:48,882 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:25:48,882 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:48,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:25:48,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:25:48,882 INFO L87 Difference]: Start difference. First operand 137301 states and 567564 transitions. Second operand 4 states. [2019-12-07 18:25:49,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:49,743 INFO L93 Difference]: Finished difference Result 167178 states and 684930 transitions. [2019-12-07 18:25:49,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:25:49,744 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 18:25:49,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:50,146 INFO L225 Difference]: With dead ends: 167178 [2019-12-07 18:25:50,146 INFO L226 Difference]: Without dead ends: 167082 [2019-12-07 18:25:50,147 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:25:55,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167082 states. [2019-12-07 18:25:57,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167082 to 137896. [2019-12-07 18:25:57,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137896 states. [2019-12-07 18:25:58,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137896 states to 137896 states and 569623 transitions. [2019-12-07 18:25:58,529 INFO L78 Accepts]: Start accepts. Automaton has 137896 states and 569623 transitions. Word has length 14 [2019-12-07 18:25:58,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:58,529 INFO L462 AbstractCegarLoop]: Abstraction has 137896 states and 569623 transitions. [2019-12-07 18:25:58,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:25:58,529 INFO L276 IsEmpty]: Start isEmpty. Operand 137896 states and 569623 transitions. [2019-12-07 18:25:58,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:25:58,540 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:58,540 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:58,540 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:58,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:58,541 INFO L82 PathProgramCache]: Analyzing trace with hash 469306307, now seen corresponding path program 1 times [2019-12-07 18:25:58,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:58,541 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046783269] [2019-12-07 18:25:58,541 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:58,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:58,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:58,596 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046783269] [2019-12-07 18:25:58,596 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:58,596 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:25:58,596 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375006441] [2019-12-07 18:25:58,597 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:25:58,597 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:58,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:25:58,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:58,597 INFO L87 Difference]: Start difference. First operand 137896 states and 569623 transitions. Second operand 3 states. [2019-12-07 18:25:59,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:59,729 INFO L93 Difference]: Finished difference Result 247713 states and 1017233 transitions. [2019-12-07 18:25:59,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:25:59,729 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:25:59,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:00,338 INFO L225 Difference]: With dead ends: 247713 [2019-12-07 18:26:00,338 INFO L226 Difference]: Without dead ends: 238809 [2019-12-07 18:26:00,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:05,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238809 states. [2019-12-07 18:26:09,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238809 to 230373. [2019-12-07 18:26:09,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230373 states. [2019-12-07 18:26:09,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230373 states to 230373 states and 953976 transitions. [2019-12-07 18:26:09,823 INFO L78 Accepts]: Start accepts. Automaton has 230373 states and 953976 transitions. Word has length 18 [2019-12-07 18:26:09,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:09,823 INFO L462 AbstractCegarLoop]: Abstraction has 230373 states and 953976 transitions. [2019-12-07 18:26:09,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:09,823 INFO L276 IsEmpty]: Start isEmpty. Operand 230373 states and 953976 transitions. [2019-12-07 18:26:09,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:26:09,843 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:09,843 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:09,844 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:09,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:09,844 INFO L82 PathProgramCache]: Analyzing trace with hash 1349290321, now seen corresponding path program 1 times [2019-12-07 18:26:09,844 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:09,844 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659612454] [2019-12-07 18:26:09,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:09,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:09,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:09,873 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659612454] [2019-12-07 18:26:09,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:09,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:26:09,873 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073937527] [2019-12-07 18:26:09,873 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:09,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:09,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:09,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:09,874 INFO L87 Difference]: Start difference. First operand 230373 states and 953976 transitions. Second operand 3 states. [2019-12-07 18:26:10,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:10,939 INFO L93 Difference]: Finished difference Result 229591 states and 950754 transitions. [2019-12-07 18:26:10,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:10,940 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:26:10,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:11,530 INFO L225 Difference]: With dead ends: 229591 [2019-12-07 18:26:11,530 INFO L226 Difference]: Without dead ends: 229591 [2019-12-07 18:26:11,530 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:19,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229591 states. [2019-12-07 18:26:22,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229591 to 222373. [2019-12-07 18:26:22,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222373 states. [2019-12-07 18:26:23,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222373 states to 222373 states and 921271 transitions. [2019-12-07 18:26:23,065 INFO L78 Accepts]: Start accepts. Automaton has 222373 states and 921271 transitions. Word has length 19 [2019-12-07 18:26:23,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:23,066 INFO L462 AbstractCegarLoop]: Abstraction has 222373 states and 921271 transitions. [2019-12-07 18:26:23,066 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:23,066 INFO L276 IsEmpty]: Start isEmpty. Operand 222373 states and 921271 transitions. [2019-12-07 18:26:23,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:26:23,089 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:23,089 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:23,089 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:23,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:23,089 INFO L82 PathProgramCache]: Analyzing trace with hash -1576664430, now seen corresponding path program 1 times [2019-12-07 18:26:23,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:23,089 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274039954] [2019-12-07 18:26:23,089 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:23,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:23,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:23,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274039954] [2019-12-07 18:26:23,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:23,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:23,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392627296] [2019-12-07 18:26:23,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:26:23,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:23,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:26:23,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:23,131 INFO L87 Difference]: Start difference. First operand 222373 states and 921271 transitions. Second operand 5 states. [2019-12-07 18:26:25,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:25,214 INFO L93 Difference]: Finished difference Result 310591 states and 1261374 transitions. [2019-12-07 18:26:25,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:26:25,215 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:26:25,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:26,012 INFO L225 Difference]: With dead ends: 310591 [2019-12-07 18:26:26,013 INFO L226 Difference]: Without dead ends: 310400 [2019-12-07 18:26:26,013 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:26:32,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310400 states. [2019-12-07 18:26:38,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310400 to 233180. [2019-12-07 18:26:38,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233180 states. [2019-12-07 18:26:40,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233180 states to 233180 states and 964888 transitions. [2019-12-07 18:26:40,143 INFO L78 Accepts]: Start accepts. Automaton has 233180 states and 964888 transitions. Word has length 19 [2019-12-07 18:26:40,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:40,144 INFO L462 AbstractCegarLoop]: Abstraction has 233180 states and 964888 transitions. [2019-12-07 18:26:40,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:26:40,144 INFO L276 IsEmpty]: Start isEmpty. Operand 233180 states and 964888 transitions. [2019-12-07 18:26:40,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:26:40,165 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:40,165 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:40,165 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:40,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:40,165 INFO L82 PathProgramCache]: Analyzing trace with hash -2024758987, now seen corresponding path program 1 times [2019-12-07 18:26:40,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:40,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654437894] [2019-12-07 18:26:40,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:40,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:40,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:40,188 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654437894] [2019-12-07 18:26:40,188 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:40,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:26:40,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602907827] [2019-12-07 18:26:40,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:40,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:40,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:40,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:40,189 INFO L87 Difference]: Start difference. First operand 233180 states and 964888 transitions. Second operand 3 states. [2019-12-07 18:26:41,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:41,243 INFO L93 Difference]: Finished difference Result 232856 states and 963623 transitions. [2019-12-07 18:26:41,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:41,243 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:26:41,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:41,848 INFO L225 Difference]: With dead ends: 232856 [2019-12-07 18:26:41,848 INFO L226 Difference]: Without dead ends: 232856 [2019-12-07 18:26:41,848 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:47,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232856 states. [2019-12-07 18:26:50,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232856 to 230114. [2019-12-07 18:26:50,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230114 states. [2019-12-07 18:26:51,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230114 states to 230114 states and 952954 transitions. [2019-12-07 18:26:51,238 INFO L78 Accepts]: Start accepts. Automaton has 230114 states and 952954 transitions. Word has length 19 [2019-12-07 18:26:51,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:51,238 INFO L462 AbstractCegarLoop]: Abstraction has 230114 states and 952954 transitions. [2019-12-07 18:26:51,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:51,238 INFO L276 IsEmpty]: Start isEmpty. Operand 230114 states and 952954 transitions. [2019-12-07 18:26:51,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:26:51,261 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:51,261 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:51,261 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:51,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:51,262 INFO L82 PathProgramCache]: Analyzing trace with hash -515058329, now seen corresponding path program 1 times [2019-12-07 18:26:51,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:51,262 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445285929] [2019-12-07 18:26:51,262 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:51,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:51,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:51,283 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445285929] [2019-12-07 18:26:51,283 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:51,283 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:26:51,283 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143763509] [2019-12-07 18:26:51,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:51,284 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:51,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:51,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:51,284 INFO L87 Difference]: Start difference. First operand 230114 states and 952954 transitions. Second operand 3 states. [2019-12-07 18:26:51,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:51,466 INFO L93 Difference]: Finished difference Result 52266 states and 172711 transitions. [2019-12-07 18:26:51,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:51,467 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 18:26:51,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:51,554 INFO L225 Difference]: With dead ends: 52266 [2019-12-07 18:26:51,554 INFO L226 Difference]: Without dead ends: 52266 [2019-12-07 18:26:51,554 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:51,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52266 states. [2019-12-07 18:26:52,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52266 to 52266. [2019-12-07 18:26:52,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52266 states. [2019-12-07 18:26:52,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52266 states to 52266 states and 172711 transitions. [2019-12-07 18:26:52,803 INFO L78 Accepts]: Start accepts. Automaton has 52266 states and 172711 transitions. Word has length 20 [2019-12-07 18:26:52,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:52,804 INFO L462 AbstractCegarLoop]: Abstraction has 52266 states and 172711 transitions. [2019-12-07 18:26:52,804 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:52,804 INFO L276 IsEmpty]: Start isEmpty. Operand 52266 states and 172711 transitions. [2019-12-07 18:26:52,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:26:52,811 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:52,811 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:52,811 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:52,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:52,811 INFO L82 PathProgramCache]: Analyzing trace with hash 2067973460, now seen corresponding path program 1 times [2019-12-07 18:26:52,811 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:52,812 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280996972] [2019-12-07 18:26:52,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:52,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:52,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:52,859 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280996972] [2019-12-07 18:26:52,860 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:52,860 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:52,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100233646] [2019-12-07 18:26:52,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:26:52,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:52,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:26:52,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:52,860 INFO L87 Difference]: Start difference. First operand 52266 states and 172711 transitions. Second operand 5 states. [2019-12-07 18:26:53,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:53,323 INFO L93 Difference]: Finished difference Result 73559 states and 239979 transitions. [2019-12-07 18:26:53,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:26:53,323 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:26:53,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:53,438 INFO L225 Difference]: With dead ends: 73559 [2019-12-07 18:26:53,439 INFO L226 Difference]: Without dead ends: 73535 [2019-12-07 18:26:53,439 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:26:53,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73535 states. [2019-12-07 18:26:54,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73535 to 56386. [2019-12-07 18:26:54,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56386 states. [2019-12-07 18:26:54,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56386 states to 56386 states and 185653 transitions. [2019-12-07 18:26:54,541 INFO L78 Accepts]: Start accepts. Automaton has 56386 states and 185653 transitions. Word has length 22 [2019-12-07 18:26:54,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:54,541 INFO L462 AbstractCegarLoop]: Abstraction has 56386 states and 185653 transitions. [2019-12-07 18:26:54,541 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:26:54,541 INFO L276 IsEmpty]: Start isEmpty. Operand 56386 states and 185653 transitions. [2019-12-07 18:26:54,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:26:54,549 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:54,549 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:54,549 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:54,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:54,550 INFO L82 PathProgramCache]: Analyzing trace with hash 2068123345, now seen corresponding path program 1 times [2019-12-07 18:26:54,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:54,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479030566] [2019-12-07 18:26:54,550 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:54,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:54,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:54,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479030566] [2019-12-07 18:26:54,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:54,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:54,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1289868911] [2019-12-07 18:26:54,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:26:54,590 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:54,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:26:54,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:54,590 INFO L87 Difference]: Start difference. First operand 56386 states and 185653 transitions. Second operand 5 states. [2019-12-07 18:26:55,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:55,950 INFO L93 Difference]: Finished difference Result 74723 states and 243623 transitions. [2019-12-07 18:26:55,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:26:55,951 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:26:55,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:56,065 INFO L225 Difference]: With dead ends: 74723 [2019-12-07 18:26:56,066 INFO L226 Difference]: Without dead ends: 74699 [2019-12-07 18:26:56,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:26:56,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74699 states. [2019-12-07 18:26:57,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74699 to 54023. [2019-12-07 18:26:57,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54023 states. [2019-12-07 18:26:57,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54023 states to 54023 states and 177666 transitions. [2019-12-07 18:26:57,127 INFO L78 Accepts]: Start accepts. Automaton has 54023 states and 177666 transitions. Word has length 22 [2019-12-07 18:26:57,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:57,127 INFO L462 AbstractCegarLoop]: Abstraction has 54023 states and 177666 transitions. [2019-12-07 18:26:57,127 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:26:57,127 INFO L276 IsEmpty]: Start isEmpty. Operand 54023 states and 177666 transitions. [2019-12-07 18:26:57,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:26:57,144 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:57,144 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:57,144 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:57,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:57,145 INFO L82 PathProgramCache]: Analyzing trace with hash 531742436, now seen corresponding path program 1 times [2019-12-07 18:26:57,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:57,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469068008] [2019-12-07 18:26:57,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:57,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:57,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:57,170 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1469068008] [2019-12-07 18:26:57,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:57,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:57,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [337614249] [2019-12-07 18:26:57,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:26:57,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:57,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:26:57,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:57,171 INFO L87 Difference]: Start difference. First operand 54023 states and 177666 transitions. Second operand 3 states. [2019-12-07 18:26:57,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:57,399 INFO L93 Difference]: Finished difference Result 68684 states and 224803 transitions. [2019-12-07 18:26:57,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:26:57,399 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 18:26:57,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:57,508 INFO L225 Difference]: With dead ends: 68684 [2019-12-07 18:26:57,508 INFO L226 Difference]: Without dead ends: 68684 [2019-12-07 18:26:57,508 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:26:57,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68684 states. [2019-12-07 18:26:58,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68684 to 55282. [2019-12-07 18:26:58,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55282 states. [2019-12-07 18:26:58,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55282 states to 55282 states and 181730 transitions. [2019-12-07 18:26:58,723 INFO L78 Accepts]: Start accepts. Automaton has 55282 states and 181730 transitions. Word has length 27 [2019-12-07 18:26:58,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:26:58,723 INFO L462 AbstractCegarLoop]: Abstraction has 55282 states and 181730 transitions. [2019-12-07 18:26:58,723 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:26:58,723 INFO L276 IsEmpty]: Start isEmpty. Operand 55282 states and 181730 transitions. [2019-12-07 18:26:58,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:26:58,738 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:26:58,738 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:26:58,738 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:26:58,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:26:58,738 INFO L82 PathProgramCache]: Analyzing trace with hash 93136807, now seen corresponding path program 1 times [2019-12-07 18:26:58,739 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:26:58,739 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193441864] [2019-12-07 18:26:58,739 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:26:58,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:26:58,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:26:58,777 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193441864] [2019-12-07 18:26:58,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:26:58,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:26:58,777 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420717592] [2019-12-07 18:26:58,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:26:58,778 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:26:58,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:26:58,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:26:58,778 INFO L87 Difference]: Start difference. First operand 55282 states and 181730 transitions. Second operand 5 states. [2019-12-07 18:26:59,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:26:59,102 INFO L93 Difference]: Finished difference Result 66444 states and 216166 transitions. [2019-12-07 18:26:59,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:26:59,102 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 18:26:59,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:26:59,206 INFO L225 Difference]: With dead ends: 66444 [2019-12-07 18:26:59,206 INFO L226 Difference]: Without dead ends: 66422 [2019-12-07 18:26:59,206 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:26:59,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66422 states. [2019-12-07 18:27:00,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66422 to 57016. [2019-12-07 18:27:00,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57016 states. [2019-12-07 18:27:00,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57016 states to 57016 states and 187284 transitions. [2019-12-07 18:27:00,257 INFO L78 Accepts]: Start accepts. Automaton has 57016 states and 187284 transitions. Word has length 27 [2019-12-07 18:27:00,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:00,257 INFO L462 AbstractCegarLoop]: Abstraction has 57016 states and 187284 transitions. [2019-12-07 18:27:00,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:27:00,257 INFO L276 IsEmpty]: Start isEmpty. Operand 57016 states and 187284 transitions. [2019-12-07 18:27:00,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:27:00,274 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:00,274 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:00,274 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:00,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:00,274 INFO L82 PathProgramCache]: Analyzing trace with hash -732588729, now seen corresponding path program 1 times [2019-12-07 18:27:00,274 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:00,274 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110837712] [2019-12-07 18:27:00,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:00,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:00,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:00,301 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [110837712] [2019-12-07 18:27:00,302 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:00,302 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:27:00,302 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1529564320] [2019-12-07 18:27:00,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:27:00,302 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:00,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:27:00,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:27:00,302 INFO L87 Difference]: Start difference. First operand 57016 states and 187284 transitions. Second operand 3 states. [2019-12-07 18:27:00,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:00,527 INFO L93 Difference]: Finished difference Result 70665 states and 228294 transitions. [2019-12-07 18:27:00,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:27:00,528 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 18:27:00,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:00,636 INFO L225 Difference]: With dead ends: 70665 [2019-12-07 18:27:00,636 INFO L226 Difference]: Without dead ends: 70665 [2019-12-07 18:27:00,637 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:27:00,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70665 states. [2019-12-07 18:27:01,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70665 to 61733. [2019-12-07 18:27:01,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61733 states. [2019-12-07 18:27:01,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61733 states to 61733 states and 198589 transitions. [2019-12-07 18:27:01,800 INFO L78 Accepts]: Start accepts. Automaton has 61733 states and 198589 transitions. Word has length 27 [2019-12-07 18:27:01,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:01,800 INFO L462 AbstractCegarLoop]: Abstraction has 61733 states and 198589 transitions. [2019-12-07 18:27:01,800 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:27:01,800 INFO L276 IsEmpty]: Start isEmpty. Operand 61733 states and 198589 transitions. [2019-12-07 18:27:01,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:27:01,823 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:01,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:01,823 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:01,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:01,824 INFO L82 PathProgramCache]: Analyzing trace with hash -1145591812, now seen corresponding path program 1 times [2019-12-07 18:27:01,824 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:01,824 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924137375] [2019-12-07 18:27:01,824 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:01,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:01,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:01,859 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924137375] [2019-12-07 18:27:01,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:01,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:27:01,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011489706] [2019-12-07 18:27:01,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:27:01,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:01,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:27:01,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:27:01,860 INFO L87 Difference]: Start difference. First operand 61733 states and 198589 transitions. Second operand 5 states. [2019-12-07 18:27:02,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:02,222 INFO L93 Difference]: Finished difference Result 74352 states and 236725 transitions. [2019-12-07 18:27:02,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:27:02,223 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 18:27:02,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:02,333 INFO L225 Difference]: With dead ends: 74352 [2019-12-07 18:27:02,333 INFO L226 Difference]: Without dead ends: 74328 [2019-12-07 18:27:02,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:27:02,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74328 states. [2019-12-07 18:27:03,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74328 to 61441. [2019-12-07 18:27:03,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61441 states. [2019-12-07 18:27:03,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61441 states to 61441 states and 197423 transitions. [2019-12-07 18:27:03,482 INFO L78 Accepts]: Start accepts. Automaton has 61441 states and 197423 transitions. Word has length 29 [2019-12-07 18:27:03,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:03,482 INFO L462 AbstractCegarLoop]: Abstraction has 61441 states and 197423 transitions. [2019-12-07 18:27:03,482 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:27:03,482 INFO L276 IsEmpty]: Start isEmpty. Operand 61441 states and 197423 transitions. [2019-12-07 18:27:03,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:27:03,511 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:03,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:03,511 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:03,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:03,511 INFO L82 PathProgramCache]: Analyzing trace with hash 1526911840, now seen corresponding path program 1 times [2019-12-07 18:27:03,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:03,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136799031] [2019-12-07 18:27:03,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:03,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:03,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:03,557 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2136799031] [2019-12-07 18:27:03,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:03,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:27:03,558 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1404685132] [2019-12-07 18:27:03,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:27:03,558 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:03,558 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:27:03,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:27:03,558 INFO L87 Difference]: Start difference. First operand 61441 states and 197423 transitions. Second operand 5 states. [2019-12-07 18:27:04,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:04,099 INFO L93 Difference]: Finished difference Result 91035 states and 288466 transitions. [2019-12-07 18:27:04,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:27:04,099 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 18:27:04,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:04,232 INFO L225 Difference]: With dead ends: 91035 [2019-12-07 18:27:04,232 INFO L226 Difference]: Without dead ends: 91035 [2019-12-07 18:27:04,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:27:04,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91035 states. [2019-12-07 18:27:05,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91035 to 71473. [2019-12-07 18:27:05,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71473 states. [2019-12-07 18:27:05,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71473 states to 71473 states and 229248 transitions. [2019-12-07 18:27:05,591 INFO L78 Accepts]: Start accepts. Automaton has 71473 states and 229248 transitions. Word has length 30 [2019-12-07 18:27:05,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:05,592 INFO L462 AbstractCegarLoop]: Abstraction has 71473 states and 229248 transitions. [2019-12-07 18:27:05,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:27:05,592 INFO L276 IsEmpty]: Start isEmpty. Operand 71473 states and 229248 transitions. [2019-12-07 18:27:05,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:27:05,625 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:05,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:05,625 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:05,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:05,625 INFO L82 PathProgramCache]: Analyzing trace with hash 1453746452, now seen corresponding path program 1 times [2019-12-07 18:27:05,625 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:05,626 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976582943] [2019-12-07 18:27:05,626 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:05,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:05,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:05,675 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976582943] [2019-12-07 18:27:05,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:05,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:27:05,676 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810080147] [2019-12-07 18:27:05,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:27:05,676 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:05,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:27:05,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:27:05,677 INFO L87 Difference]: Start difference. First operand 71473 states and 229248 transitions. Second operand 5 states. [2019-12-07 18:27:06,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:06,255 INFO L93 Difference]: Finished difference Result 100331 states and 318829 transitions. [2019-12-07 18:27:06,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:27:06,256 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 18:27:06,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:06,421 INFO L225 Difference]: With dead ends: 100331 [2019-12-07 18:27:06,421 INFO L226 Difference]: Without dead ends: 100331 [2019-12-07 18:27:06,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:27:06,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100331 states. [2019-12-07 18:27:07,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100331 to 84581. [2019-12-07 18:27:07,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84581 states. [2019-12-07 18:27:08,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84581 states to 84581 states and 271191 transitions. [2019-12-07 18:27:08,030 INFO L78 Accepts]: Start accepts. Automaton has 84581 states and 271191 transitions. Word has length 30 [2019-12-07 18:27:08,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:08,030 INFO L462 AbstractCegarLoop]: Abstraction has 84581 states and 271191 transitions. [2019-12-07 18:27:08,030 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:27:08,030 INFO L276 IsEmpty]: Start isEmpty. Operand 84581 states and 271191 transitions. [2019-12-07 18:27:08,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:27:08,074 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:08,074 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:08,074 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:08,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:08,075 INFO L82 PathProgramCache]: Analyzing trace with hash -954581060, now seen corresponding path program 1 times [2019-12-07 18:27:08,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:08,075 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673738273] [2019-12-07 18:27:08,075 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:08,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:08,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:08,106 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [673738273] [2019-12-07 18:27:08,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:08,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:27:08,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1242442430] [2019-12-07 18:27:08,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:27:08,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:08,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:27:08,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:27:08,107 INFO L87 Difference]: Start difference. First operand 84581 states and 271191 transitions. Second operand 4 states. [2019-12-07 18:27:08,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:08,218 INFO L93 Difference]: Finished difference Result 36387 states and 109489 transitions. [2019-12-07 18:27:08,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:27:08,218 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 18:27:08,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:08,261 INFO L225 Difference]: With dead ends: 36387 [2019-12-07 18:27:08,261 INFO L226 Difference]: Without dead ends: 36387 [2019-12-07 18:27:08,261 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:27:08,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36387 states. [2019-12-07 18:27:08,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36387 to 34787. [2019-12-07 18:27:08,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34787 states. [2019-12-07 18:27:08,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34787 states to 34787 states and 104899 transitions. [2019-12-07 18:27:08,749 INFO L78 Accepts]: Start accepts. Automaton has 34787 states and 104899 transitions. Word has length 31 [2019-12-07 18:27:08,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:08,750 INFO L462 AbstractCegarLoop]: Abstraction has 34787 states and 104899 transitions. [2019-12-07 18:27:08,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:27:08,750 INFO L276 IsEmpty]: Start isEmpty. Operand 34787 states and 104899 transitions. [2019-12-07 18:27:08,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:27:08,780 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:08,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:08,780 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:08,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:08,780 INFO L82 PathProgramCache]: Analyzing trace with hash 515851026, now seen corresponding path program 1 times [2019-12-07 18:27:08,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:08,781 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543452617] [2019-12-07 18:27:08,781 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:08,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:08,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:08,826 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543452617] [2019-12-07 18:27:08,826 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:08,826 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:27:08,826 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [393643387] [2019-12-07 18:27:08,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:27:08,826 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:08,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:27:08,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:27:08,826 INFO L87 Difference]: Start difference. First operand 34787 states and 104899 transitions. Second operand 6 states. [2019-12-07 18:27:09,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:09,253 INFO L93 Difference]: Finished difference Result 40518 states and 120353 transitions. [2019-12-07 18:27:09,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:27:09,254 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 18:27:09,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:09,301 INFO L225 Difference]: With dead ends: 40518 [2019-12-07 18:27:09,302 INFO L226 Difference]: Without dead ends: 40516 [2019-12-07 18:27:09,302 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:27:09,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40516 states. [2019-12-07 18:27:09,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40516 to 34844. [2019-12-07 18:27:09,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34844 states. [2019-12-07 18:27:09,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34844 states to 34844 states and 105046 transitions. [2019-12-07 18:27:09,882 INFO L78 Accepts]: Start accepts. Automaton has 34844 states and 105046 transitions. Word has length 39 [2019-12-07 18:27:09,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:09,882 INFO L462 AbstractCegarLoop]: Abstraction has 34844 states and 105046 transitions. [2019-12-07 18:27:09,882 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:27:09,883 INFO L276 IsEmpty]: Start isEmpty. Operand 34844 states and 105046 transitions. [2019-12-07 18:27:09,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:27:09,922 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:09,922 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:09,922 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:09,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:09,922 INFO L82 PathProgramCache]: Analyzing trace with hash -744983639, now seen corresponding path program 1 times [2019-12-07 18:27:09,922 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:09,922 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [349715072] [2019-12-07 18:27:09,922 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:09,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:09,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:09,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [349715072] [2019-12-07 18:27:09,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:09,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:27:09,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510267892] [2019-12-07 18:27:09,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:27:09,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:09,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:27:09,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:27:09,957 INFO L87 Difference]: Start difference. First operand 34844 states and 105046 transitions. Second operand 5 states. [2019-12-07 18:27:10,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:10,061 INFO L93 Difference]: Finished difference Result 32444 states and 99271 transitions. [2019-12-07 18:27:10,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:27:10,061 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:27:10,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:10,100 INFO L225 Difference]: With dead ends: 32444 [2019-12-07 18:27:10,101 INFO L226 Difference]: Without dead ends: 32204 [2019-12-07 18:27:10,101 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:27:10,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32204 states. [2019-12-07 18:27:10,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32204 to 17244. [2019-12-07 18:27:10,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17244 states. [2019-12-07 18:27:10,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17244 states to 17244 states and 53106 transitions. [2019-12-07 18:27:10,489 INFO L78 Accepts]: Start accepts. Automaton has 17244 states and 53106 transitions. Word has length 40 [2019-12-07 18:27:10,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:10,489 INFO L462 AbstractCegarLoop]: Abstraction has 17244 states and 53106 transitions. [2019-12-07 18:27:10,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:27:10,489 INFO L276 IsEmpty]: Start isEmpty. Operand 17244 states and 53106 transitions. [2019-12-07 18:27:10,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:27:10,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:10,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:10,505 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:10,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:10,505 INFO L82 PathProgramCache]: Analyzing trace with hash 165786421, now seen corresponding path program 1 times [2019-12-07 18:27:10,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:10,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928927220] [2019-12-07 18:27:10,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:10,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:10,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:10,555 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928927220] [2019-12-07 18:27:10,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:10,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:27:10,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164524205] [2019-12-07 18:27:10,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:27:10,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:10,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:27:10,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:27:10,556 INFO L87 Difference]: Start difference. First operand 17244 states and 53106 transitions. Second operand 6 states. [2019-12-07 18:27:10,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:10,983 INFO L93 Difference]: Finished difference Result 21841 states and 66057 transitions. [2019-12-07 18:27:10,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:27:10,983 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-12-07 18:27:10,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:11,007 INFO L225 Difference]: With dead ends: 21841 [2019-12-07 18:27:11,007 INFO L226 Difference]: Without dead ends: 21841 [2019-12-07 18:27:11,008 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:27:11,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21841 states. [2019-12-07 18:27:11,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21841 to 18089. [2019-12-07 18:27:11,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18089 states. [2019-12-07 18:27:11,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18089 states to 18089 states and 55506 transitions. [2019-12-07 18:27:11,296 INFO L78 Accepts]: Start accepts. Automaton has 18089 states and 55506 transitions. Word has length 53 [2019-12-07 18:27:11,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:11,296 INFO L462 AbstractCegarLoop]: Abstraction has 18089 states and 55506 transitions. [2019-12-07 18:27:11,296 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:27:11,296 INFO L276 IsEmpty]: Start isEmpty. Operand 18089 states and 55506 transitions. [2019-12-07 18:27:11,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:27:11,312 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:11,312 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:11,313 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:11,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:11,313 INFO L82 PathProgramCache]: Analyzing trace with hash 1047584721, now seen corresponding path program 2 times [2019-12-07 18:27:11,313 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:11,313 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552835171] [2019-12-07 18:27:11,313 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:11,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:11,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:11,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552835171] [2019-12-07 18:27:11,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:11,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:27:11,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377646546] [2019-12-07 18:27:11,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:27:11,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:11,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:27:11,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:27:11,385 INFO L87 Difference]: Start difference. First operand 18089 states and 55506 transitions. Second operand 7 states. [2019-12-07 18:27:12,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:12,020 INFO L93 Difference]: Finished difference Result 27669 states and 84522 transitions. [2019-12-07 18:27:12,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:27:12,020 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2019-12-07 18:27:12,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:12,053 INFO L225 Difference]: With dead ends: 27669 [2019-12-07 18:27:12,053 INFO L226 Difference]: Without dead ends: 27669 [2019-12-07 18:27:12,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 11 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:27:12,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27669 states. [2019-12-07 18:27:12,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27669 to 17669. [2019-12-07 18:27:12,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17669 states. [2019-12-07 18:27:12,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17669 states to 17669 states and 54334 transitions. [2019-12-07 18:27:12,378 INFO L78 Accepts]: Start accepts. Automaton has 17669 states and 54334 transitions. Word has length 53 [2019-12-07 18:27:12,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:12,378 INFO L462 AbstractCegarLoop]: Abstraction has 17669 states and 54334 transitions. [2019-12-07 18:27:12,378 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:27:12,378 INFO L276 IsEmpty]: Start isEmpty. Operand 17669 states and 54334 transitions. [2019-12-07 18:27:12,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:27:12,394 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:12,394 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:12,394 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:12,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:12,395 INFO L82 PathProgramCache]: Analyzing trace with hash -351992857, now seen corresponding path program 3 times [2019-12-07 18:27:12,395 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:12,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1122843736] [2019-12-07 18:27:12,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:12,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:12,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:12,427 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1122843736] [2019-12-07 18:27:12,427 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:12,427 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:27:12,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104206063] [2019-12-07 18:27:12,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:27:12,428 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:12,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:27:12,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:27:12,428 INFO L87 Difference]: Start difference. First operand 17669 states and 54334 transitions. Second operand 3 states. [2019-12-07 18:27:12,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:12,486 INFO L93 Difference]: Finished difference Result 17667 states and 54329 transitions. [2019-12-07 18:27:12,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:27:12,487 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 18:27:12,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:12,505 INFO L225 Difference]: With dead ends: 17667 [2019-12-07 18:27:12,505 INFO L226 Difference]: Without dead ends: 17667 [2019-12-07 18:27:12,506 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:27:12,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17667 states. [2019-12-07 18:27:12,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17667 to 15364. [2019-12-07 18:27:12,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15364 states. [2019-12-07 18:27:12,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15364 states to 15364 states and 47774 transitions. [2019-12-07 18:27:12,745 INFO L78 Accepts]: Start accepts. Automaton has 15364 states and 47774 transitions. Word has length 53 [2019-12-07 18:27:12,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:12,745 INFO L462 AbstractCegarLoop]: Abstraction has 15364 states and 47774 transitions. [2019-12-07 18:27:12,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:27:12,745 INFO L276 IsEmpty]: Start isEmpty. Operand 15364 states and 47774 transitions. [2019-12-07 18:27:12,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 18:27:12,759 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:12,759 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:12,759 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:12,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:12,759 INFO L82 PathProgramCache]: Analyzing trace with hash 1776229385, now seen corresponding path program 1 times [2019-12-07 18:27:12,759 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:12,759 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679505777] [2019-12-07 18:27:12,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:12,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:12,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:12,785 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [679505777] [2019-12-07 18:27:12,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:12,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:27:12,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [571480288] [2019-12-07 18:27:12,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:27:12,786 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:12,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:27:12,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:27:12,786 INFO L87 Difference]: Start difference. First operand 15364 states and 47774 transitions. Second operand 3 states. [2019-12-07 18:27:12,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:12,824 INFO L93 Difference]: Finished difference Result 13477 states and 41236 transitions. [2019-12-07 18:27:12,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:27:12,825 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 18:27:12,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:12,839 INFO L225 Difference]: With dead ends: 13477 [2019-12-07 18:27:12,839 INFO L226 Difference]: Without dead ends: 13477 [2019-12-07 18:27:12,839 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:27:12,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13477 states. [2019-12-07 18:27:13,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13477 to 12565. [2019-12-07 18:27:13,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12565 states. [2019-12-07 18:27:13,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12565 states to 12565 states and 38577 transitions. [2019-12-07 18:27:13,023 INFO L78 Accepts]: Start accepts. Automaton has 12565 states and 38577 transitions. Word has length 54 [2019-12-07 18:27:13,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:13,023 INFO L462 AbstractCegarLoop]: Abstraction has 12565 states and 38577 transitions. [2019-12-07 18:27:13,023 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:27:13,023 INFO L276 IsEmpty]: Start isEmpty. Operand 12565 states and 38577 transitions. [2019-12-07 18:27:13,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:27:13,035 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:13,035 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:13,035 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:13,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:13,035 INFO L82 PathProgramCache]: Analyzing trace with hash 359686577, now seen corresponding path program 1 times [2019-12-07 18:27:13,036 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:13,036 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935823421] [2019-12-07 18:27:13,036 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:13,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:13,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:13,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1935823421] [2019-12-07 18:27:13,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:13,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:27:13,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1413301858] [2019-12-07 18:27:13,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:27:13,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:13,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:27:13,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:27:13,101 INFO L87 Difference]: Start difference. First operand 12565 states and 38577 transitions. Second operand 7 states. [2019-12-07 18:27:13,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:13,473 INFO L93 Difference]: Finished difference Result 58117 states and 176684 transitions. [2019-12-07 18:27:13,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:27:13,473 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 55 [2019-12-07 18:27:13,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:13,525 INFO L225 Difference]: With dead ends: 58117 [2019-12-07 18:27:13,525 INFO L226 Difference]: Without dead ends: 43018 [2019-12-07 18:27:13,525 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:27:13,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43018 states. [2019-12-07 18:27:13,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43018 to 15660. [2019-12-07 18:27:13,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15660 states. [2019-12-07 18:27:13,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15660 states to 15660 states and 47937 transitions. [2019-12-07 18:27:13,930 INFO L78 Accepts]: Start accepts. Automaton has 15660 states and 47937 transitions. Word has length 55 [2019-12-07 18:27:13,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:13,931 INFO L462 AbstractCegarLoop]: Abstraction has 15660 states and 47937 transitions. [2019-12-07 18:27:13,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:27:13,931 INFO L276 IsEmpty]: Start isEmpty. Operand 15660 states and 47937 transitions. [2019-12-07 18:27:13,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:27:13,945 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:13,945 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:13,945 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:13,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:13,945 INFO L82 PathProgramCache]: Analyzing trace with hash 789470437, now seen corresponding path program 2 times [2019-12-07 18:27:13,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:13,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162463222] [2019-12-07 18:27:13,946 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:13,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:14,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:14,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1162463222] [2019-12-07 18:27:14,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:14,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:27:14,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [534177668] [2019-12-07 18:27:14,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:27:14,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:14,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:27:14,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:27:14,033 INFO L87 Difference]: Start difference. First operand 15660 states and 47937 transitions. Second operand 5 states. [2019-12-07 18:27:14,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:14,137 INFO L93 Difference]: Finished difference Result 39865 states and 121784 transitions. [2019-12-07 18:27:14,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:27:14,137 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 18:27:14,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:14,161 INFO L225 Difference]: With dead ends: 39865 [2019-12-07 18:27:14,162 INFO L226 Difference]: Without dead ends: 22284 [2019-12-07 18:27:14,162 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:27:14,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22284 states. [2019-12-07 18:27:14,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22284 to 12520. [2019-12-07 18:27:14,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12520 states. [2019-12-07 18:27:14,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12520 states to 12520 states and 38005 transitions. [2019-12-07 18:27:14,405 INFO L78 Accepts]: Start accepts. Automaton has 12520 states and 38005 transitions. Word has length 55 [2019-12-07 18:27:14,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:14,406 INFO L462 AbstractCegarLoop]: Abstraction has 12520 states and 38005 transitions. [2019-12-07 18:27:14,406 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:27:14,406 INFO L276 IsEmpty]: Start isEmpty. Operand 12520 states and 38005 transitions. [2019-12-07 18:27:14,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:27:14,417 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:14,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:14,417 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:14,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:14,418 INFO L82 PathProgramCache]: Analyzing trace with hash 430015837, now seen corresponding path program 3 times [2019-12-07 18:27:14,418 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:14,418 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855612546] [2019-12-07 18:27:14,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:14,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:14,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:14,468 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855612546] [2019-12-07 18:27:14,468 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:14,468 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:27:14,469 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1207660984] [2019-12-07 18:27:14,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:27:14,469 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:14,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:27:14,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:27:14,469 INFO L87 Difference]: Start difference. First operand 12520 states and 38005 transitions. Second operand 4 states. [2019-12-07 18:27:14,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:14,521 INFO L93 Difference]: Finished difference Result 20583 states and 62678 transitions. [2019-12-07 18:27:14,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:27:14,521 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 55 [2019-12-07 18:27:14,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:14,530 INFO L225 Difference]: With dead ends: 20583 [2019-12-07 18:27:14,530 INFO L226 Difference]: Without dead ends: 8135 [2019-12-07 18:27:14,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:27:14,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8135 states. [2019-12-07 18:27:14,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8135 to 8135. [2019-12-07 18:27:14,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8135 states. [2019-12-07 18:27:14,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8135 states to 8135 states and 24807 transitions. [2019-12-07 18:27:14,644 INFO L78 Accepts]: Start accepts. Automaton has 8135 states and 24807 transitions. Word has length 55 [2019-12-07 18:27:14,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:14,645 INFO L462 AbstractCegarLoop]: Abstraction has 8135 states and 24807 transitions. [2019-12-07 18:27:14,645 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:27:14,645 INFO L276 IsEmpty]: Start isEmpty. Operand 8135 states and 24807 transitions. [2019-12-07 18:27:14,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:27:14,651 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:14,651 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:14,651 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:14,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:14,652 INFO L82 PathProgramCache]: Analyzing trace with hash 404282337, now seen corresponding path program 4 times [2019-12-07 18:27:14,652 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:14,652 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240112154] [2019-12-07 18:27:14,652 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:14,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:27:14,779 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:27:14,779 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240112154] [2019-12-07 18:27:14,779 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:27:14,779 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:27:14,779 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965156389] [2019-12-07 18:27:14,780 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:27:14,780 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:27:14,780 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:27:14,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:27:14,780 INFO L87 Difference]: Start difference. First operand 8135 states and 24807 transitions. Second operand 12 states. [2019-12-07 18:27:15,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:27:15,384 INFO L93 Difference]: Finished difference Result 13739 states and 41290 transitions. [2019-12-07 18:27:15,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 18:27:15,385 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 55 [2019-12-07 18:27:15,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:27:15,394 INFO L225 Difference]: With dead ends: 13739 [2019-12-07 18:27:15,394 INFO L226 Difference]: Without dead ends: 9285 [2019-12-07 18:27:15,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=182, Invalid=810, Unknown=0, NotChecked=0, Total=992 [2019-12-07 18:27:15,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9285 states. [2019-12-07 18:27:15,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9285 to 8251. [2019-12-07 18:27:15,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8251 states. [2019-12-07 18:27:15,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8251 states to 8251 states and 24888 transitions. [2019-12-07 18:27:15,520 INFO L78 Accepts]: Start accepts. Automaton has 8251 states and 24888 transitions. Word has length 55 [2019-12-07 18:27:15,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:27:15,520 INFO L462 AbstractCegarLoop]: Abstraction has 8251 states and 24888 transitions. [2019-12-07 18:27:15,520 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:27:15,520 INFO L276 IsEmpty]: Start isEmpty. Operand 8251 states and 24888 transitions. [2019-12-07 18:27:15,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:27:15,527 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:27:15,527 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:27:15,527 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:27:15,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:27:15,527 INFO L82 PathProgramCache]: Analyzing trace with hash 406067685, now seen corresponding path program 5 times [2019-12-07 18:27:15,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:27:15,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713753193] [2019-12-07 18:27:15,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:27:15,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:27:15,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:27:15,589 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:27:15,590 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:27:15,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff0_thd1~0_335 0) (= 0 v_~y$r_buff1_thd3~0_125) (= v_~x~0_35 0) (= v_~y$w_buff1~0_269 0) (= 0 v_~y$r_buff1_thd2~0_133) (= v_~a~0_54 0) (= v_~y$w_buff1_used~0_559 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t642~0.base_28|)) (= v_~main$tmp_guard1~0_48 0) (= |v_#NULL.offset_3| 0) (= 0 v_~__unbuffered_p2_EAX~0_59) (= 0 v_~y$r_buff0_thd2~0_172) (= v_~y$read_delayed~0_6 0) (< 0 |v_#StackHeapBarrier_18|) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t642~0.base_28|) (= |v_ULTIMATE.start_main_~#t642~0.offset_19| 0) (= v_~y$w_buff0_used~0_854 0) (= 0 v_~__unbuffered_p0_EAX~0_68) (= v_~__unbuffered_p0_EBX~0_53 0) (= v_~z~0_107 0) (= 0 v_~y$r_buff0_thd3~0_136) (= v_~weak$$choice2~0_153 0) (= v_~y$mem_tmp~0_47 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t642~0.base_28| 4)) (= v_~__unbuffered_p2_EBX~0_59 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t642~0.base_28| 1)) (= v_~main$tmp_guard0~0_21 0) (= v_~__unbuffered_cnt~0_162 0) (= 0 v_~y$flush_delayed~0_90) (= 0 |v_#NULL.base_3|) (= v_~y$r_buff0_thd0~0_138 0) (= 0 v_~y$w_buff0~0_440) (= v_~y$r_buff1_thd1~0_236 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~weak$$choice0~0_34) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t642~0.base_28| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t642~0.base_28|) |v_ULTIMATE.start_main_~#t642~0.offset_19| 0)) |v_#memory_int_17|) (= v_~y$r_buff1_thd0~0_136 0) (= v_~y~0_214 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_~#t642~0.offset=|v_ULTIMATE.start_main_~#t642~0.offset_19|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_33|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ULTIMATE.start_main_~#t644~0.base=|v_ULTIMATE.start_main_~#t644~0.base_23|, ~a~0=v_~a~0_54, ~y$mem_tmp~0=v_~y$mem_tmp~0_47, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_68, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_335, ~y$flush_delayed~0=v_~y$flush_delayed~0_90, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_59, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_59, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_53, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~y$w_buff1~0=v_~y$w_buff1~0_269, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_172, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_162, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_136, ~x~0=v_~x~0_35, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_854, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_95|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_67|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_236, ULTIMATE.start_main_~#t644~0.offset=|v_ULTIMATE.start_main_~#t644~0.offset_17|, ~y$w_buff0~0=v_~y$w_buff0~0_440, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_136, ULTIMATE.start_main_~#t642~0.base=|v_ULTIMATE.start_main_~#t642~0.base_28|, ~y~0=v_~y~0_214, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_17|, ULTIMATE.start_main_~#t643~0.offset=|v_ULTIMATE.start_main_~#t643~0.offset_17|, ULTIMATE.start_main_~#t643~0.base=|v_ULTIMATE.start_main_~#t643~0.base_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_133, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_53|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_138, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_153, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_559} AuxVars[] AssignedVars[#NULL.offset, ULTIMATE.start_main_~#t642~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ULTIMATE.start_main_~#t644~0.base, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ~weak$$choice0~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t644~0.offset, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t642~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t643~0.offset, ULTIMATE.start_main_~#t643~0.base, ~main$tmp_guard0~0, #NULL.base, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:27:15,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L831-1-->L833: Formula: (and (= |v_ULTIMATE.start_main_~#t643~0.offset_10| 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t643~0.base_11|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t643~0.base_11|) 0) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t643~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t643~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t643~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t643~0.base_11|) |v_ULTIMATE.start_main_~#t643~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t643~0.base_11| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t643~0.offset=|v_ULTIMATE.start_main_~#t643~0.offset_10|, ULTIMATE.start_main_~#t643~0.base=|v_ULTIMATE.start_main_~#t643~0.base_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t643~0.offset, ULTIMATE.start_main_~#t643~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 18:27:15,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L833-1-->L835: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t644~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t644~0.base_11|) |v_ULTIMATE.start_main_~#t644~0.offset_10| 2)) |v_#memory_int_11|) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t644~0.base_11|) 0) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t644~0.base_11| 1)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t644~0.base_11|) (not (= |v_ULTIMATE.start_main_~#t644~0.base_11| 0)) (= |v_ULTIMATE.start_main_~#t644~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t644~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t644~0.base=|v_ULTIMATE.start_main_~#t644~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t644~0.offset=|v_ULTIMATE.start_main_~#t644~0.offset_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t644~0.base, ULTIMATE.start_main_~#t644~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 18:27:15,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] P1ENTRY-->L5-3: Formula: (and (= (ite (not (and (not (= 0 (mod ~y$w_buff1_used~0_Out-749815655 256))) (not (= 0 (mod ~y$w_buff0_used~0_Out-749815655 256))))) 1 0) |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-749815655|) (= ~y$w_buff0~0_In-749815655 ~y$w_buff1~0_Out-749815655) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-749815655)) (= P1Thread1of1ForFork1_~arg.offset_Out-749815655 |P1Thread1of1ForFork1_#in~arg.offset_In-749815655|) (= ~y$w_buff0~0_Out-749815655 1) (= 1 ~y$w_buff0_used~0_Out-749815655) (= ~y$w_buff1_used~0_Out-749815655 ~y$w_buff0_used~0_In-749815655) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-749815655 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-749815655|) (= |P1Thread1of1ForFork1_#in~arg.base_In-749815655| P1Thread1of1ForFork1_~arg.base_Out-749815655)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-749815655, ~y$w_buff0~0=~y$w_buff0~0_In-749815655, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-749815655|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-749815655|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-749815655, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out-749815655, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out-749815655, ~y$w_buff1~0=~y$w_buff1~0_Out-749815655, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-749815655|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out-749815655, ~y$w_buff0~0=~y$w_buff0~0_Out-749815655, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-749815655|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-749815655|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-749815655} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:27:15,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L808-2-->L808-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork2_#t~ite32_Out-865430048| |P2Thread1of1ForFork2_#t~ite33_Out-865430048|)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-865430048 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-865430048 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= |P2Thread1of1ForFork2_#t~ite32_Out-865430048| ~y$w_buff1~0_In-865430048)) (and .cse1 (= |P2Thread1of1ForFork2_#t~ite32_Out-865430048| ~y~0_In-865430048) (or .cse0 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-865430048, ~y$w_buff1~0=~y$w_buff1~0_In-865430048, ~y~0=~y~0_In-865430048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-865430048} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-865430048, ~y$w_buff1~0=~y$w_buff1~0_In-865430048, P2Thread1of1ForFork2_#t~ite33=|P2Thread1of1ForFork2_#t~ite33_Out-865430048|, P2Thread1of1ForFork2_#t~ite32=|P2Thread1of1ForFork2_#t~ite32_Out-865430048|, ~y~0=~y~0_In-865430048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-865430048} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32] because there is no mapped edge [2019-12-07 18:27:15,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-837145935 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-837145935 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite28_Out-837145935| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-837145935 |P1Thread1of1ForFork1_#t~ite28_Out-837145935|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-837145935, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-837145935} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-837145935, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-837145935, P1Thread1of1ForFork1_#t~ite28=|P1Thread1of1ForFork1_#t~ite28_Out-837145935|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite28] because there is no mapped edge [2019-12-07 18:27:15,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-107504779 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-107504779 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite34_Out-107504779|) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite34_Out-107504779| ~y$w_buff0_used~0_In-107504779)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-107504779, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-107504779} OutVars{P2Thread1of1ForFork2_#t~ite34=|P2Thread1of1ForFork2_#t~ite34_Out-107504779|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-107504779, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-107504779} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite34] because there is no mapped edge [2019-12-07 18:27:15,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L810-->L810-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In320245764 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In320245764 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In320245764 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In320245764 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite35_Out320245764| 0)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P2Thread1of1ForFork2_#t~ite35_Out320245764| ~y$w_buff1_used~0_In320245764)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In320245764, ~y$w_buff0_used~0=~y$w_buff0_used~0_In320245764, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In320245764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In320245764} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out320245764|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In320245764, ~y$w_buff0_used~0=~y$w_buff0_used~0_In320245764, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In320245764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In320245764} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35] because there is no mapped edge [2019-12-07 18:27:15,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In221599835 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In221599835 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd3~0_In221599835 |P2Thread1of1ForFork2_#t~ite36_Out221599835|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite36_Out221599835|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In221599835, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In221599835} OutVars{P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out221599835|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In221599835, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In221599835} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 18:27:15,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-981133981 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-981133981 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-981133981 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-981133981 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite37_Out-981133981| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite37_Out-981133981| ~y$r_buff1_thd3~0_In-981133981)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-981133981, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-981133981, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-981133981, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-981133981} OutVars{P2Thread1of1ForFork2_#t~ite37=|P2Thread1of1ForFork2_#t~ite37_Out-981133981|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-981133981, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-981133981, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-981133981, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-981133981} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37] because there is no mapped edge [2019-12-07 18:27:15,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L812-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite37_38| v_~y$r_buff1_thd3~0_74) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:27:15,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L787-->L787-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1970581285 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In-1970581285 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-1970581285 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In-1970581285 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite29_Out-1970581285| ~y$w_buff1_used~0_In-1970581285) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork1_#t~ite29_Out-1970581285| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1970581285, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1970581285, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1970581285, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1970581285} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1970581285, P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_Out-1970581285|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1970581285, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1970581285, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1970581285} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29] because there is no mapped edge [2019-12-07 18:27:15,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L788-->L789: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-682304433 256))) (.cse1 (= ~y$r_buff0_thd2~0_In-682304433 ~y$r_buff0_thd2~0_Out-682304433)) (.cse2 (= (mod ~y$w_buff0_used~0_In-682304433 256) 0))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= ~y$r_buff0_thd2~0_Out-682304433 0)) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-682304433, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-682304433} OutVars{P1Thread1of1ForFork1_#t~ite30=|P1Thread1of1ForFork1_#t~ite30_Out-682304433|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-682304433, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out-682304433} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite30, ~y$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:27:15,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1530321938 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-1530321938 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1530321938 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1530321938 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite31_Out-1530321938|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1530321938 |P1Thread1of1ForFork1_#t~ite31_Out-1530321938|) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1530321938, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1530321938, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1530321938, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1530321938} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1530321938, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1530321938, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out-1530321938|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1530321938, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1530321938} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 18:27:15,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L789-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite31_38| v_~y$r_buff1_thd2~0_54) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_#t~ite31, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:27:15,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L750-->L750-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1912922048 256)))) (or (and (= ~y$w_buff0~0_In1912922048 |P0Thread1of1ForFork0_#t~ite9_Out1912922048|) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite8_In1912922048| |P0Thread1of1ForFork0_#t~ite8_Out1912922048|)) (and .cse0 (= |P0Thread1of1ForFork0_#t~ite8_Out1912922048| |P0Thread1of1ForFork0_#t~ite9_Out1912922048|) (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In1912922048 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd1~0_In1912922048 256) 0)) (and .cse1 (= (mod ~y$w_buff1_used~0_In1912922048 256) 0)) (= (mod ~y$w_buff0_used~0_In1912922048 256) 0))) (= ~y$w_buff0~0_In1912922048 |P0Thread1of1ForFork0_#t~ite8_Out1912922048|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1912922048, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1912922048, ~y$w_buff0~0=~y$w_buff0~0_In1912922048, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1912922048, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_In1912922048|, ~weak$$choice2~0=~weak$$choice2~0_In1912922048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1912922048} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1912922048, P0Thread1of1ForFork0_#t~ite9=|P0Thread1of1ForFork0_#t~ite9_Out1912922048|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1912922048, ~y$w_buff0~0=~y$w_buff0~0_In1912922048, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1912922048|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1912922048, ~weak$$choice2~0=~weak$$choice2~0_In1912922048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1912922048} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite9, P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:27:15,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L751-->L751-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-149865277 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite12_Out-149865277| ~y$w_buff1~0_In-149865277) (= |P0Thread1of1ForFork0_#t~ite11_In-149865277| |P0Thread1of1ForFork0_#t~ite11_Out-149865277|)) (and (= ~y$w_buff1~0_In-149865277 |P0Thread1of1ForFork0_#t~ite11_Out-149865277|) (= |P0Thread1of1ForFork0_#t~ite12_Out-149865277| |P0Thread1of1ForFork0_#t~ite11_Out-149865277|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-149865277 256)))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-149865277 256) 0)) (and .cse1 (= (mod ~y$r_buff1_thd1~0_In-149865277 256) 0)) (= (mod ~y$w_buff0_used~0_In-149865277 256) 0))) .cse0))) InVars {P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_In-149865277|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-149865277, ~y$w_buff1~0=~y$w_buff1~0_In-149865277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-149865277, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-149865277, ~weak$$choice2~0=~weak$$choice2~0_In-149865277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-149865277} OutVars{P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_Out-149865277|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-149865277, ~y$w_buff1~0=~y$w_buff1~0_In-149865277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-149865277, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-149865277, ~weak$$choice2~0=~weak$$choice2~0_In-149865277, P0Thread1of1ForFork0_#t~ite12=|P0Thread1of1ForFork0_#t~ite12_Out-149865277|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-149865277} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite11, P0Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 18:27:15,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L754-->L755-8: Formula: (and (= |v_P0Thread1of1ForFork0_#t~ite22_33| |v_P0Thread1of1ForFork0_#t~ite22_32|) (= |v_P0Thread1of1ForFork0_#t~ite23_29| |v_P0Thread1of1ForFork0_#t~ite23_28|) (= v_~y$r_buff1_thd1~0_224 |v_P0Thread1of1ForFork0_#t~ite24_30|) (= v_~y$r_buff0_thd1~0_326 v_~y$r_buff0_thd1~0_325) (not (= 0 (mod v_~weak$$choice2~0_143 256)))) InVars {P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_33|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_326, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_29|} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_32|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_35|, P0Thread1of1ForFork0_#t~ite20=|v_P0Thread1of1ForFork0_#t~ite20_46|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_325, P0Thread1of1ForFork0_#t~ite19=|v_P0Thread1of1ForFork0_#t~ite19_31|, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite24=|v_P0Thread1of1ForFork0_#t~ite24_30|, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_28|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, P0Thread1of1ForFork0_#t~ite20, ~y$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite19, P0Thread1of1ForFork0_#t~ite24, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 18:27:15,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L757-->L765: Formula: (and (not (= (mod v_~y$flush_delayed~0_17 256) 0)) (= v_~y~0_46 v_~y$mem_tmp~0_7) (= 0 v_~y$flush_delayed~0_16) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{P0Thread1of1ForFork0_#t~ite25=|v_P0Thread1of1ForFork0_#t~ite25_19|, ~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite25, ~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0] because there is no mapped edge [2019-12-07 18:27:15,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L835-1-->L841: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_42) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:27:15,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L841-2-->L841-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In948559895 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In948559895 256) 0))) (or (and (= ~y$w_buff1~0_In948559895 |ULTIMATE.start_main_#t~ite41_Out948559895|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y~0_In948559895 |ULTIMATE.start_main_#t~ite41_Out948559895|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In948559895, ~y~0=~y~0_In948559895, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In948559895, ~y$w_buff1_used~0=~y$w_buff1_used~0_In948559895} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out948559895|, ~y$w_buff1~0=~y$w_buff1~0_In948559895, ~y~0=~y~0_In948559895, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In948559895, ~y$w_buff1_used~0=~y$w_buff1_used~0_In948559895} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 18:27:15,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L841-4-->L842: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:27:15,602 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L842-->L842-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1145509739 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1145509739 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite43_Out1145509739| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite43_Out1145509739| ~y$w_buff0_used~0_In1145509739)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1145509739, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1145509739} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1145509739, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1145509739, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out1145509739|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 18:27:15,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L843-->L843-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1477471077 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1477471077 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1477471077 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1477471077 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite44_Out1477471077| ~y$w_buff1_used~0_In1477471077)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite44_Out1477471077| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1477471077, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1477471077, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1477471077, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1477471077} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1477471077, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1477471077, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1477471077, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1477471077|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1477471077} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:27:15,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1619744687 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1619744687 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite45_Out1619744687|)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite45_Out1619744687| ~y$r_buff0_thd0~0_In1619744687)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1619744687, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1619744687} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1619744687, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1619744687, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1619744687|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:27:15,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L845-->L845-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In433668441 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In433668441 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In433668441 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In433668441 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out433668441| 0)) (and (= |ULTIMATE.start_main_#t~ite46_Out433668441| ~y$r_buff1_thd0~0_In433668441) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In433668441, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In433668441, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In433668441, ~y$w_buff1_used~0=~y$w_buff1_used~0_In433668441} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In433668441, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In433668441, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out433668441|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In433668441, ~y$w_buff1_used~0=~y$w_buff1_used~0_In433668441} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:27:15,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L845-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~main$tmp_guard1~0_17 (ite (= (ite (not (and (= v_~z~0_50 2) (= 1 v_~__unbuffered_p0_EAX~0_34) (= v_~__unbuffered_p0_EBX~0_19 0) (= 2 v_~__unbuffered_p2_EAX~0_22) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start_main_#t~ite46_39| v_~y$r_buff1_thd0~0_74) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_39|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_74, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:27:15,666 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:27:15 BasicIcfg [2019-12-07 18:27:15,666 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:27:15,666 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:27:15,666 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:27:15,666 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:27:15,667 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:25:05" (3/4) ... [2019-12-07 18:27:15,668 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:27:15,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff0_thd1~0_335 0) (= 0 v_~y$r_buff1_thd3~0_125) (= v_~x~0_35 0) (= v_~y$w_buff1~0_269 0) (= 0 v_~y$r_buff1_thd2~0_133) (= v_~a~0_54 0) (= v_~y$w_buff1_used~0_559 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t642~0.base_28|)) (= v_~main$tmp_guard1~0_48 0) (= |v_#NULL.offset_3| 0) (= 0 v_~__unbuffered_p2_EAX~0_59) (= 0 v_~y$r_buff0_thd2~0_172) (= v_~y$read_delayed~0_6 0) (< 0 |v_#StackHeapBarrier_18|) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t642~0.base_28|) (= |v_ULTIMATE.start_main_~#t642~0.offset_19| 0) (= v_~y$w_buff0_used~0_854 0) (= 0 v_~__unbuffered_p0_EAX~0_68) (= v_~__unbuffered_p0_EBX~0_53 0) (= v_~z~0_107 0) (= 0 v_~y$r_buff0_thd3~0_136) (= v_~weak$$choice2~0_153 0) (= v_~y$mem_tmp~0_47 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t642~0.base_28| 4)) (= v_~__unbuffered_p2_EBX~0_59 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t642~0.base_28| 1)) (= v_~main$tmp_guard0~0_21 0) (= v_~__unbuffered_cnt~0_162 0) (= 0 v_~y$flush_delayed~0_90) (= 0 |v_#NULL.base_3|) (= v_~y$r_buff0_thd0~0_138 0) (= 0 v_~y$w_buff0~0_440) (= v_~y$r_buff1_thd1~0_236 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~weak$$choice0~0_34) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t642~0.base_28| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t642~0.base_28|) |v_ULTIMATE.start_main_~#t642~0.offset_19| 0)) |v_#memory_int_17|) (= v_~y$r_buff1_thd0~0_136 0) (= v_~y~0_214 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_~#t642~0.offset=|v_ULTIMATE.start_main_~#t642~0.offset_19|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_33|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ULTIMATE.start_main_~#t644~0.base=|v_ULTIMATE.start_main_~#t644~0.base_23|, ~a~0=v_~a~0_54, ~y$mem_tmp~0=v_~y$mem_tmp~0_47, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_68, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_335, ~y$flush_delayed~0=v_~y$flush_delayed~0_90, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_59, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_59, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_53, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~y$w_buff1~0=v_~y$w_buff1~0_269, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_172, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_162, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_136, ~x~0=v_~x~0_35, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_854, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_95|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_67|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_236, ULTIMATE.start_main_~#t644~0.offset=|v_ULTIMATE.start_main_~#t644~0.offset_17|, ~y$w_buff0~0=v_~y$w_buff0~0_440, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_136, ULTIMATE.start_main_~#t642~0.base=|v_ULTIMATE.start_main_~#t642~0.base_28|, ~y~0=v_~y~0_214, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_17|, ULTIMATE.start_main_~#t643~0.offset=|v_ULTIMATE.start_main_~#t643~0.offset_17|, ULTIMATE.start_main_~#t643~0.base=|v_ULTIMATE.start_main_~#t643~0.base_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_133, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_53|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_138, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_153, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_559} AuxVars[] AssignedVars[#NULL.offset, ULTIMATE.start_main_~#t642~0.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ULTIMATE.start_main_~#t644~0.base, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ~weak$$choice0~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t644~0.offset, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t642~0.base, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t643~0.offset, ULTIMATE.start_main_~#t643~0.base, ~main$tmp_guard0~0, #NULL.base, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:27:15,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L831-1-->L833: Formula: (and (= |v_ULTIMATE.start_main_~#t643~0.offset_10| 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t643~0.base_11|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t643~0.base_11|) 0) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t643~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t643~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t643~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t643~0.base_11|) |v_ULTIMATE.start_main_~#t643~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t643~0.base_11| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t643~0.offset=|v_ULTIMATE.start_main_~#t643~0.offset_10|, ULTIMATE.start_main_~#t643~0.base=|v_ULTIMATE.start_main_~#t643~0.base_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t643~0.offset, ULTIMATE.start_main_~#t643~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 18:27:15,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L833-1-->L835: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t644~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t644~0.base_11|) |v_ULTIMATE.start_main_~#t644~0.offset_10| 2)) |v_#memory_int_11|) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t644~0.base_11|) 0) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t644~0.base_11| 1)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t644~0.base_11|) (not (= |v_ULTIMATE.start_main_~#t644~0.base_11| 0)) (= |v_ULTIMATE.start_main_~#t644~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t644~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t644~0.base=|v_ULTIMATE.start_main_~#t644~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t644~0.offset=|v_ULTIMATE.start_main_~#t644~0.offset_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t644~0.base, ULTIMATE.start_main_~#t644~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 18:27:15,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] P1ENTRY-->L5-3: Formula: (and (= (ite (not (and (not (= 0 (mod ~y$w_buff1_used~0_Out-749815655 256))) (not (= 0 (mod ~y$w_buff0_used~0_Out-749815655 256))))) 1 0) |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-749815655|) (= ~y$w_buff0~0_In-749815655 ~y$w_buff1~0_Out-749815655) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-749815655)) (= P1Thread1of1ForFork1_~arg.offset_Out-749815655 |P1Thread1of1ForFork1_#in~arg.offset_In-749815655|) (= ~y$w_buff0~0_Out-749815655 1) (= 1 ~y$w_buff0_used~0_Out-749815655) (= ~y$w_buff1_used~0_Out-749815655 ~y$w_buff0_used~0_In-749815655) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-749815655 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-749815655|) (= |P1Thread1of1ForFork1_#in~arg.base_In-749815655| P1Thread1of1ForFork1_~arg.base_Out-749815655)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-749815655, ~y$w_buff0~0=~y$w_buff0~0_In-749815655, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-749815655|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-749815655|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-749815655, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out-749815655, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out-749815655, ~y$w_buff1~0=~y$w_buff1~0_Out-749815655, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-749815655|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out-749815655, ~y$w_buff0~0=~y$w_buff0~0_Out-749815655, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-749815655|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-749815655|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-749815655} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:27:15,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L808-2-->L808-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork2_#t~ite32_Out-865430048| |P2Thread1of1ForFork2_#t~ite33_Out-865430048|)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-865430048 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-865430048 256) 0))) (or (and (not .cse0) .cse1 (not .cse2) (= |P2Thread1of1ForFork2_#t~ite32_Out-865430048| ~y$w_buff1~0_In-865430048)) (and .cse1 (= |P2Thread1of1ForFork2_#t~ite32_Out-865430048| ~y~0_In-865430048) (or .cse0 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-865430048, ~y$w_buff1~0=~y$w_buff1~0_In-865430048, ~y~0=~y~0_In-865430048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-865430048} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-865430048, ~y$w_buff1~0=~y$w_buff1~0_In-865430048, P2Thread1of1ForFork2_#t~ite33=|P2Thread1of1ForFork2_#t~ite33_Out-865430048|, P2Thread1of1ForFork2_#t~ite32=|P2Thread1of1ForFork2_#t~ite32_Out-865430048|, ~y~0=~y~0_In-865430048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-865430048} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32] because there is no mapped edge [2019-12-07 18:27:15,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-837145935 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-837145935 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite28_Out-837145935| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-837145935 |P1Thread1of1ForFork1_#t~ite28_Out-837145935|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-837145935, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-837145935} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-837145935, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-837145935, P1Thread1of1ForFork1_#t~ite28=|P1Thread1of1ForFork1_#t~ite28_Out-837145935|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite28] because there is no mapped edge [2019-12-07 18:27:15,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-107504779 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-107504779 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite34_Out-107504779|) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite34_Out-107504779| ~y$w_buff0_used~0_In-107504779)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-107504779, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-107504779} OutVars{P2Thread1of1ForFork2_#t~ite34=|P2Thread1of1ForFork2_#t~ite34_Out-107504779|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-107504779, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-107504779} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite34] because there is no mapped edge [2019-12-07 18:27:15,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L810-->L810-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In320245764 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In320245764 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In320245764 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In320245764 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite35_Out320245764| 0)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P2Thread1of1ForFork2_#t~ite35_Out320245764| ~y$w_buff1_used~0_In320245764)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In320245764, ~y$w_buff0_used~0=~y$w_buff0_used~0_In320245764, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In320245764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In320245764} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out320245764|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In320245764, ~y$w_buff0_used~0=~y$w_buff0_used~0_In320245764, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In320245764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In320245764} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35] because there is no mapped edge [2019-12-07 18:27:15,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In221599835 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In221599835 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd3~0_In221599835 |P2Thread1of1ForFork2_#t~ite36_Out221599835|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite36_Out221599835|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In221599835, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In221599835} OutVars{P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out221599835|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In221599835, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In221599835} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 18:27:15,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In-981133981 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-981133981 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-981133981 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-981133981 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite37_Out-981133981| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite37_Out-981133981| ~y$r_buff1_thd3~0_In-981133981)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-981133981, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-981133981, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-981133981, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-981133981} OutVars{P2Thread1of1ForFork2_#t~ite37=|P2Thread1of1ForFork2_#t~ite37_Out-981133981|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-981133981, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-981133981, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-981133981, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-981133981} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37] because there is no mapped edge [2019-12-07 18:27:15,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L812-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite37_38| v_~y$r_buff1_thd3~0_74) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:27:15,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L787-->L787-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1970581285 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In-1970581285 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-1970581285 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In-1970581285 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite29_Out-1970581285| ~y$w_buff1_used~0_In-1970581285) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork1_#t~ite29_Out-1970581285| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1970581285, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1970581285, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1970581285, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1970581285} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1970581285, P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_Out-1970581285|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1970581285, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1970581285, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1970581285} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29] because there is no mapped edge [2019-12-07 18:27:15,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L788-->L789: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-682304433 256))) (.cse1 (= ~y$r_buff0_thd2~0_In-682304433 ~y$r_buff0_thd2~0_Out-682304433)) (.cse2 (= (mod ~y$w_buff0_used~0_In-682304433 256) 0))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= ~y$r_buff0_thd2~0_Out-682304433 0)) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-682304433, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-682304433} OutVars{P1Thread1of1ForFork1_#t~ite30=|P1Thread1of1ForFork1_#t~ite30_Out-682304433|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-682304433, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out-682304433} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite30, ~y$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:27:15,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1530321938 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-1530321938 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1530321938 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1530321938 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite31_Out-1530321938|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1530321938 |P1Thread1of1ForFork1_#t~ite31_Out-1530321938|) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1530321938, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1530321938, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1530321938, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1530321938} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1530321938, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1530321938, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out-1530321938|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1530321938, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1530321938} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 18:27:15,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L789-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite31_38| v_~y$r_buff1_thd2~0_54) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_#t~ite31, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:27:15,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L750-->L750-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1912922048 256)))) (or (and (= ~y$w_buff0~0_In1912922048 |P0Thread1of1ForFork0_#t~ite9_Out1912922048|) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite8_In1912922048| |P0Thread1of1ForFork0_#t~ite8_Out1912922048|)) (and .cse0 (= |P0Thread1of1ForFork0_#t~ite8_Out1912922048| |P0Thread1of1ForFork0_#t~ite9_Out1912922048|) (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In1912922048 256) 0))) (or (and .cse1 (= (mod ~y$r_buff1_thd1~0_In1912922048 256) 0)) (and .cse1 (= (mod ~y$w_buff1_used~0_In1912922048 256) 0)) (= (mod ~y$w_buff0_used~0_In1912922048 256) 0))) (= ~y$w_buff0~0_In1912922048 |P0Thread1of1ForFork0_#t~ite8_Out1912922048|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1912922048, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1912922048, ~y$w_buff0~0=~y$w_buff0~0_In1912922048, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1912922048, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_In1912922048|, ~weak$$choice2~0=~weak$$choice2~0_In1912922048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1912922048} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1912922048, P0Thread1of1ForFork0_#t~ite9=|P0Thread1of1ForFork0_#t~ite9_Out1912922048|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1912922048, ~y$w_buff0~0=~y$w_buff0~0_In1912922048, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1912922048|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1912922048, ~weak$$choice2~0=~weak$$choice2~0_In1912922048, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1912922048} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite9, P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:27:15,675 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L751-->L751-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-149865277 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite12_Out-149865277| ~y$w_buff1~0_In-149865277) (= |P0Thread1of1ForFork0_#t~ite11_In-149865277| |P0Thread1of1ForFork0_#t~ite11_Out-149865277|)) (and (= ~y$w_buff1~0_In-149865277 |P0Thread1of1ForFork0_#t~ite11_Out-149865277|) (= |P0Thread1of1ForFork0_#t~ite12_Out-149865277| |P0Thread1of1ForFork0_#t~ite11_Out-149865277|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-149865277 256)))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-149865277 256) 0)) (and .cse1 (= (mod ~y$r_buff1_thd1~0_In-149865277 256) 0)) (= (mod ~y$w_buff0_used~0_In-149865277 256) 0))) .cse0))) InVars {P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_In-149865277|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-149865277, ~y$w_buff1~0=~y$w_buff1~0_In-149865277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-149865277, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-149865277, ~weak$$choice2~0=~weak$$choice2~0_In-149865277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-149865277} OutVars{P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_Out-149865277|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-149865277, ~y$w_buff1~0=~y$w_buff1~0_In-149865277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-149865277, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-149865277, ~weak$$choice2~0=~weak$$choice2~0_In-149865277, P0Thread1of1ForFork0_#t~ite12=|P0Thread1of1ForFork0_#t~ite12_Out-149865277|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-149865277} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite11, P0Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 18:27:15,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L754-->L755-8: Formula: (and (= |v_P0Thread1of1ForFork0_#t~ite22_33| |v_P0Thread1of1ForFork0_#t~ite22_32|) (= |v_P0Thread1of1ForFork0_#t~ite23_29| |v_P0Thread1of1ForFork0_#t~ite23_28|) (= v_~y$r_buff1_thd1~0_224 |v_P0Thread1of1ForFork0_#t~ite24_30|) (= v_~y$r_buff0_thd1~0_326 v_~y$r_buff0_thd1~0_325) (not (= 0 (mod v_~weak$$choice2~0_143 256)))) InVars {P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_33|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_326, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_29|} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_32|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_35|, P0Thread1of1ForFork0_#t~ite20=|v_P0Thread1of1ForFork0_#t~ite20_46|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_325, P0Thread1of1ForFork0_#t~ite19=|v_P0Thread1of1ForFork0_#t~ite19_31|, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite24=|v_P0Thread1of1ForFork0_#t~ite24_30|, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_28|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, P0Thread1of1ForFork0_#t~ite20, ~y$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite19, P0Thread1of1ForFork0_#t~ite24, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 18:27:15,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L757-->L765: Formula: (and (not (= (mod v_~y$flush_delayed~0_17 256) 0)) (= v_~y~0_46 v_~y$mem_tmp~0_7) (= 0 v_~y$flush_delayed~0_16) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{P0Thread1of1ForFork0_#t~ite25=|v_P0Thread1of1ForFork0_#t~ite25_19|, ~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite25, ~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0] because there is no mapped edge [2019-12-07 18:27:15,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L835-1-->L841: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_42) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:27:15,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L841-2-->L841-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In948559895 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In948559895 256) 0))) (or (and (= ~y$w_buff1~0_In948559895 |ULTIMATE.start_main_#t~ite41_Out948559895|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y~0_In948559895 |ULTIMATE.start_main_#t~ite41_Out948559895|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In948559895, ~y~0=~y~0_In948559895, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In948559895, ~y$w_buff1_used~0=~y$w_buff1_used~0_In948559895} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out948559895|, ~y$w_buff1~0=~y$w_buff1~0_In948559895, ~y~0=~y~0_In948559895, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In948559895, ~y$w_buff1_used~0=~y$w_buff1_used~0_In948559895} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 18:27:15,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L841-4-->L842: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:27:15,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L842-->L842-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1145509739 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1145509739 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite43_Out1145509739| 0)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite43_Out1145509739| ~y$w_buff0_used~0_In1145509739)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1145509739, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1145509739} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1145509739, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1145509739, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out1145509739|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 18:27:15,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L843-->L843-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In1477471077 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1477471077 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1477471077 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1477471077 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite44_Out1477471077| ~y$w_buff1_used~0_In1477471077)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite44_Out1477471077| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1477471077, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1477471077, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1477471077, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1477471077} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1477471077, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1477471077, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1477471077, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1477471077|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1477471077} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:27:15,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L844-->L844-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1619744687 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1619744687 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite45_Out1619744687|)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite45_Out1619744687| ~y$r_buff0_thd0~0_In1619744687)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1619744687, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1619744687} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1619744687, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1619744687, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1619744687|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:27:15,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L845-->L845-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In433668441 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In433668441 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In433668441 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In433668441 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out433668441| 0)) (and (= |ULTIMATE.start_main_#t~ite46_Out433668441| ~y$r_buff1_thd0~0_In433668441) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In433668441, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In433668441, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In433668441, ~y$w_buff1_used~0=~y$w_buff1_used~0_In433668441} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In433668441, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In433668441, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out433668441|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In433668441, ~y$w_buff1_used~0=~y$w_buff1_used~0_In433668441} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:27:15,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L845-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~main$tmp_guard1~0_17 (ite (= (ite (not (and (= v_~z~0_50 2) (= 1 v_~__unbuffered_p0_EAX~0_34) (= v_~__unbuffered_p0_EBX~0_19 0) (= 2 v_~__unbuffered_p2_EAX~0_22) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start_main_#t~ite46_39| v_~y$r_buff1_thd0~0_74) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_39|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_74, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:27:15,744 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_f47ae3c9-b2b7-41ed-acda-9fb90c4cec5b/bin/uautomizer/witness.graphml [2019-12-07 18:27:15,744 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:27:15,745 INFO L168 Benchmark]: Toolchain (without parser) took 130638.26 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 5.9 GB). Free memory was 939.8 MB in the beginning and 5.5 GB in the end (delta: -4.6 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:27:15,745 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:27:15,746 INFO L168 Benchmark]: CACSL2BoogieTranslator took 384.83 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -130.7 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:27:15,746 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:27:15,746 INFO L168 Benchmark]: Boogie Preprocessor took 25.09 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:27:15,746 INFO L168 Benchmark]: RCFGBuilder took 390.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.1 MB). Peak memory consumption was 51.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:27:15,747 INFO L168 Benchmark]: TraceAbstraction took 129719.70 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 5.6 GB in the end (delta: -4.5 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:27:15,747 INFO L168 Benchmark]: Witness Printer took 78.13 ms. Allocated memory is still 7.0 GB. Free memory was 5.6 GB in the beginning and 5.5 GB in the end (delta: 22.2 MB). Peak memory consumption was 22.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:27:15,748 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 384.83 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -130.7 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.09 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 390.26 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.1 MB). Peak memory consumption was 51.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 129719.70 ms. Allocated memory was 1.1 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 5.6 GB in the end (delta: -4.5 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. * Witness Printer took 78.13 ms. Allocated memory is still 7.0 GB. Free memory was 5.6 GB in the beginning and 5.5 GB in the end (delta: 22.2 MB). Peak memory consumption was 22.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 166 ProgramPointsBefore, 83 ProgramPointsAfterwards, 197 TransitionsBefore, 90 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 28 ChoiceCompositions, 6616 VarBasedMoverChecksPositive, 243 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 263 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 74173 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L831] FCALL, FORK 0 pthread_create(&t642, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L833] FCALL, FORK 0 pthread_create(&t643, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L835] FCALL, FORK 0 pthread_create(&t644, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L776] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L777] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L778] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L779] 2 y$r_buff0_thd2 = (_Bool)1 [L782] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L785] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] 3 z = 2 [L802] 3 __unbuffered_p2_EAX = z [L805] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L808] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L809] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L810] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L811] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L786] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L787] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L736] 1 a = 1 [L739] 1 x = 1 [L742] 1 __unbuffered_p0_EAX = x [L745] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L746] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L747] 1 y$flush_delayed = weak$$choice2 [L748] 1 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L749] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L749] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L750] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L751] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L752] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L753] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L755] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L756] 1 __unbuffered_p0_EBX = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L841] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L842] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L843] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L844] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 157 locations, 2 error locations. Result: UNSAFE, OverallTime: 129.5s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 24.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4816 SDtfs, 4927 SDslu, 9316 SDs, 0 SdLazy, 5325 SolverSat, 198 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 232 GetRequests, 64 SyntacticMatches, 13 SemanticMatches, 155 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 325 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=233180occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 91.4s AutomataMinimizationTime, 29 MinimizatonAttempts, 379849 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 966 NumberOfCodeBlocks, 966 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 882 ConstructedInterpolants, 0 QuantifiedInterpolants, 167660 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...