./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b624021352077739a0f7f0fd593689e7b9c01e66 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:01:08,747 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:01:08,748 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:01:08,756 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:01:08,756 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:01:08,757 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:01:08,758 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:01:08,759 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:01:08,760 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:01:08,761 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:01:08,762 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:01:08,763 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:01:08,763 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:01:08,763 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:01:08,764 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:01:08,765 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:01:08,765 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:01:08,766 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:01:08,768 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:01:08,769 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:01:08,770 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:01:08,771 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:01:08,772 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:01:08,772 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:01:08,774 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:01:08,774 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:01:08,774 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:01:08,775 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:01:08,775 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:01:08,776 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:01:08,776 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:01:08,776 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:01:08,777 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:01:08,777 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:01:08,778 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:01:08,778 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:01:08,778 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:01:08,778 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:01:08,778 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:01:08,779 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:01:08,779 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:01:08,780 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 19:01:08,789 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:01:08,789 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:01:08,790 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 19:01:08,790 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 19:01:08,790 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 19:01:08,790 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:01:08,790 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:01:08,790 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:01:08,790 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:01:08,791 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:01:08,791 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 19:01:08,792 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:01:08,792 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:01:08,792 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:01:08,792 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:01:08,792 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:01:08,792 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:01:08,792 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 19:01:08,792 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:01:08,793 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:01:08,793 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:01:08,793 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b624021352077739a0f7f0fd593689e7b9c01e66 [2019-12-07 19:01:08,894 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:01:08,904 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:01:08,907 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:01:08,908 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:01:08,908 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:01:08,909 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix024_rmo.oepc.i [2019-12-07 19:01:08,950 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/data/433cd72b4/2e2120b3ec394749bb9b3f0dfa96d328/FLAG956ff0228 [2019-12-07 19:01:09,427 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:01:09,427 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/sv-benchmarks/c/pthread-wmm/mix024_rmo.oepc.i [2019-12-07 19:01:09,438 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/data/433cd72b4/2e2120b3ec394749bb9b3f0dfa96d328/FLAG956ff0228 [2019-12-07 19:01:09,751 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/data/433cd72b4/2e2120b3ec394749bb9b3f0dfa96d328 [2019-12-07 19:01:09,757 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:01:09,760 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:01:09,763 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:01:09,763 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:01:09,771 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:01:09,772 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:01:09" (1/1) ... [2019-12-07 19:01:09,779 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@296938c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:09, skipping insertion in model container [2019-12-07 19:01:09,779 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:01:09" (1/1) ... [2019-12-07 19:01:09,787 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:01:09,817 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:01:10,052 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:01:10,060 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:01:10,101 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:01:10,146 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:01:10,146 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10 WrapperNode [2019-12-07 19:01:10,146 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:01:10,147 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:01:10,147 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:01:10,147 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:01:10,153 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,166 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,184 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:01:10,184 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:01:10,185 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:01:10,185 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:01:10,191 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,191 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,194 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,195 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,202 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,204 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,207 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... [2019-12-07 19:01:10,210 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:01:10,210 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:01:10,210 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:01:10,210 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:01:10,211 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:01:10,251 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:01:10,251 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:01:10,252 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:01:10,252 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:01:10,252 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:01:10,252 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:01:10,252 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:01:10,252 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:01:10,252 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:01:10,252 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:01:10,253 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:01:10,253 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:01:10,253 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:01:10,254 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:01:10,626 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:01:10,626 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:01:10,627 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:10 BoogieIcfgContainer [2019-12-07 19:01:10,627 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:01:10,627 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:01:10,627 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:01:10,629 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:01:10,629 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:01:09" (1/3) ... [2019-12-07 19:01:10,630 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@201ff61e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:01:10, skipping insertion in model container [2019-12-07 19:01:10,630 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:10" (2/3) ... [2019-12-07 19:01:10,630 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@201ff61e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:01:10, skipping insertion in model container [2019-12-07 19:01:10,630 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:10" (3/3) ... [2019-12-07 19:01:10,631 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_rmo.oepc.i [2019-12-07 19:01:10,638 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:01:10,638 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:01:10,643 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:01:10,643 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:01:10,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,669 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,669 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,669 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,670 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,670 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,674 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,674 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,678 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,678 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,679 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,680 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,686 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,687 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,688 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,689 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,690 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,691 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,692 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:10,703 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 19:01:10,715 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:01:10,716 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:01:10,716 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:01:10,716 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:01:10,716 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:01:10,716 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:01:10,716 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:01:10,716 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:01:10,729 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 19:01:10,730 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 19:01:10,784 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 19:01:10,784 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:01:10,794 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:01:10,809 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 19:01:10,841 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 19:01:10,841 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:01:10,846 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:01:10,862 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 19:01:10,863 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:01:13,771 WARN L192 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 19:01:13,885 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78858 [2019-12-07 19:01:13,885 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 19:01:13,888 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 19:01:28,778 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115112 states. [2019-12-07 19:01:28,780 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states. [2019-12-07 19:01:28,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 19:01:28,783 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:28,784 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 19:01:28,784 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:28,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:28,788 INFO L82 PathProgramCache]: Analyzing trace with hash 917918, now seen corresponding path program 1 times [2019-12-07 19:01:28,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:28,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740556109] [2019-12-07 19:01:28,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:28,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:28,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:28,935 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740556109] [2019-12-07 19:01:28,935 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:28,935 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:01:28,936 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1591963088] [2019-12-07 19:01:28,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:01:28,939 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:28,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:01:28,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:01:28,950 INFO L87 Difference]: Start difference. First operand 115112 states. Second operand 3 states. [2019-12-07 19:01:29,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:29,798 INFO L93 Difference]: Finished difference Result 114110 states and 484570 transitions. [2019-12-07 19:01:29,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:01:29,799 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 19:01:29,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:30,261 INFO L225 Difference]: With dead ends: 114110 [2019-12-07 19:01:30,262 INFO L226 Difference]: Without dead ends: 107012 [2019-12-07 19:01:30,263 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:01:34,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107012 states. [2019-12-07 19:01:37,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107012 to 107012. [2019-12-07 19:01:37,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107012 states. [2019-12-07 19:01:37,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107012 states to 107012 states and 453812 transitions. [2019-12-07 19:01:37,652 INFO L78 Accepts]: Start accepts. Automaton has 107012 states and 453812 transitions. Word has length 3 [2019-12-07 19:01:37,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:01:37,653 INFO L462 AbstractCegarLoop]: Abstraction has 107012 states and 453812 transitions. [2019-12-07 19:01:37,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:01:37,653 INFO L276 IsEmpty]: Start isEmpty. Operand 107012 states and 453812 transitions. [2019-12-07 19:01:37,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 19:01:37,656 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:37,656 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:01:37,656 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:37,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:37,656 INFO L82 PathProgramCache]: Analyzing trace with hash -1578322365, now seen corresponding path program 1 times [2019-12-07 19:01:37,656 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:37,656 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853972101] [2019-12-07 19:01:37,656 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:37,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:37,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:37,721 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853972101] [2019-12-07 19:01:37,721 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:37,721 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:01:37,721 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [706754701] [2019-12-07 19:01:37,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:01:37,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:37,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:01:37,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:01:37,723 INFO L87 Difference]: Start difference. First operand 107012 states and 453812 transitions. Second operand 4 states. [2019-12-07 19:01:38,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:38,847 INFO L93 Difference]: Finished difference Result 166210 states and 677236 transitions. [2019-12-07 19:01:38,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:01:38,847 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 19:01:38,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:39,242 INFO L225 Difference]: With dead ends: 166210 [2019-12-07 19:01:39,242 INFO L226 Difference]: Without dead ends: 166161 [2019-12-07 19:01:39,243 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:01:44,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166161 states. [2019-12-07 19:01:48,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166161 to 151748. [2019-12-07 19:01:48,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151748 states. [2019-12-07 19:01:48,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151748 states to 151748 states and 626089 transitions. [2019-12-07 19:01:48,633 INFO L78 Accepts]: Start accepts. Automaton has 151748 states and 626089 transitions. Word has length 11 [2019-12-07 19:01:48,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:01:48,633 INFO L462 AbstractCegarLoop]: Abstraction has 151748 states and 626089 transitions. [2019-12-07 19:01:48,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:01:48,634 INFO L276 IsEmpty]: Start isEmpty. Operand 151748 states and 626089 transitions. [2019-12-07 19:01:48,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:01:48,638 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:48,638 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:01:48,638 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:48,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:48,638 INFO L82 PathProgramCache]: Analyzing trace with hash 608601994, now seen corresponding path program 1 times [2019-12-07 19:01:48,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:48,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713175647] [2019-12-07 19:01:48,639 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:48,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:48,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:48,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713175647] [2019-12-07 19:01:48,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:48,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:01:48,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415407810] [2019-12-07 19:01:48,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:01:48,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:48,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:01:48,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:01:48,685 INFO L87 Difference]: Start difference. First operand 151748 states and 626089 transitions. Second operand 4 states. [2019-12-07 19:01:50,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:50,129 INFO L93 Difference]: Finished difference Result 218525 states and 880843 transitions. [2019-12-07 19:01:50,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:01:50,129 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:01:50,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:50,696 INFO L225 Difference]: With dead ends: 218525 [2019-12-07 19:01:50,696 INFO L226 Difference]: Without dead ends: 218469 [2019-12-07 19:01:50,697 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:01:56,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218469 states. [2019-12-07 19:01:59,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218469 to 182894. [2019-12-07 19:01:59,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182894 states. [2019-12-07 19:02:00,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182894 states to 182894 states and 750285 transitions. [2019-12-07 19:02:00,091 INFO L78 Accepts]: Start accepts. Automaton has 182894 states and 750285 transitions. Word has length 13 [2019-12-07 19:02:00,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:00,092 INFO L462 AbstractCegarLoop]: Abstraction has 182894 states and 750285 transitions. [2019-12-07 19:02:00,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:00,092 INFO L276 IsEmpty]: Start isEmpty. Operand 182894 states and 750285 transitions. [2019-12-07 19:02:00,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:02:00,099 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:00,100 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:00,100 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:00,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:00,100 INFO L82 PathProgramCache]: Analyzing trace with hash -1174763718, now seen corresponding path program 1 times [2019-12-07 19:02:00,100 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:00,101 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733522078] [2019-12-07 19:02:00,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:00,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:00,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:00,155 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733522078] [2019-12-07 19:02:00,155 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:00,155 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:00,155 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2063599964] [2019-12-07 19:02:00,156 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:00,156 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:00,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:00,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:00,156 INFO L87 Difference]: Start difference. First operand 182894 states and 750285 transitions. Second operand 5 states. [2019-12-07 19:02:01,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:01,425 INFO L93 Difference]: Finished difference Result 246966 states and 1003484 transitions. [2019-12-07 19:02:01,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:02:01,426 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 19:02:01,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:02,041 INFO L225 Difference]: With dead ends: 246966 [2019-12-07 19:02:02,041 INFO L226 Difference]: Without dead ends: 246966 [2019-12-07 19:02:02,041 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:02:10,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246966 states. [2019-12-07 19:02:13,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246966 to 202377. [2019-12-07 19:02:13,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202377 states. [2019-12-07 19:02:14,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202377 states to 202377 states and 829448 transitions. [2019-12-07 19:02:14,658 INFO L78 Accepts]: Start accepts. Automaton has 202377 states and 829448 transitions. Word has length 16 [2019-12-07 19:02:14,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:14,658 INFO L462 AbstractCegarLoop]: Abstraction has 202377 states and 829448 transitions. [2019-12-07 19:02:14,658 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:14,658 INFO L276 IsEmpty]: Start isEmpty. Operand 202377 states and 829448 transitions. [2019-12-07 19:02:14,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 19:02:14,673 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:14,673 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:14,673 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:14,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:14,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1130186099, now seen corresponding path program 1 times [2019-12-07 19:02:14,674 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:14,674 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881853047] [2019-12-07 19:02:14,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:14,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:14,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:14,740 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881853047] [2019-12-07 19:02:14,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:14,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:02:14,740 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441557743] [2019-12-07 19:02:14,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:02:14,740 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:14,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:02:14,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:14,740 INFO L87 Difference]: Start difference. First operand 202377 states and 829448 transitions. Second operand 3 states. [2019-12-07 19:02:16,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:16,269 INFO L93 Difference]: Finished difference Result 360373 states and 1469997 transitions. [2019-12-07 19:02:16,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:02:16,270 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 19:02:16,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:17,084 INFO L225 Difference]: With dead ends: 360373 [2019-12-07 19:02:17,084 INFO L226 Difference]: Without dead ends: 326981 [2019-12-07 19:02:17,084 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:27,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326981 states. [2019-12-07 19:02:32,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326981 to 314611. [2019-12-07 19:02:32,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314611 states. [2019-12-07 19:02:33,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314611 states to 314611 states and 1292003 transitions. [2019-12-07 19:02:33,850 INFO L78 Accepts]: Start accepts. Automaton has 314611 states and 1292003 transitions. Word has length 18 [2019-12-07 19:02:33,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:33,850 INFO L462 AbstractCegarLoop]: Abstraction has 314611 states and 1292003 transitions. [2019-12-07 19:02:33,850 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:02:33,850 INFO L276 IsEmpty]: Start isEmpty. Operand 314611 states and 1292003 transitions. [2019-12-07 19:02:33,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:02:33,870 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:33,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:33,870 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:33,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:33,870 INFO L82 PathProgramCache]: Analyzing trace with hash -1770026118, now seen corresponding path program 1 times [2019-12-07 19:02:33,871 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:33,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349094255] [2019-12-07 19:02:33,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:33,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:33,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:33,909 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349094255] [2019-12-07 19:02:33,909 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:33,910 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:02:33,910 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21468518] [2019-12-07 19:02:33,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:02:33,910 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:33,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:02:33,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:33,911 INFO L87 Difference]: Start difference. First operand 314611 states and 1292003 transitions. Second operand 5 states. [2019-12-07 19:02:36,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:36,633 INFO L93 Difference]: Finished difference Result 417749 states and 1684092 transitions. [2019-12-07 19:02:36,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:02:36,633 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 19:02:36,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:37,698 INFO L225 Difference]: With dead ends: 417749 [2019-12-07 19:02:37,698 INFO L226 Difference]: Without dead ends: 417651 [2019-12-07 19:02:37,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:02:49,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 417651 states. [2019-12-07 19:02:54,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 417651 to 328151. [2019-12-07 19:02:54,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328151 states. [2019-12-07 19:02:55,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328151 states to 328151 states and 1345794 transitions. [2019-12-07 19:02:55,901 INFO L78 Accepts]: Start accepts. Automaton has 328151 states and 1345794 transitions. Word has length 19 [2019-12-07 19:02:55,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:55,901 INFO L462 AbstractCegarLoop]: Abstraction has 328151 states and 1345794 transitions. [2019-12-07 19:02:55,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:02:55,901 INFO L276 IsEmpty]: Start isEmpty. Operand 328151 states and 1345794 transitions. [2019-12-07 19:02:55,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:02:55,925 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:55,925 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:55,925 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:55,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:55,925 INFO L82 PathProgramCache]: Analyzing trace with hash 115321022, now seen corresponding path program 1 times [2019-12-07 19:02:55,925 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:55,925 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [536876214] [2019-12-07 19:02:55,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:55,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:55,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:55,975 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [536876214] [2019-12-07 19:02:55,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:55,975 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:55,975 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091440924] [2019-12-07 19:02:55,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:02:55,975 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:55,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:02:55,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:55,976 INFO L87 Difference]: Start difference. First operand 328151 states and 1345794 transitions. Second operand 4 states. [2019-12-07 19:02:57,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:57,899 INFO L93 Difference]: Finished difference Result 337254 states and 1371901 transitions. [2019-12-07 19:02:57,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:02:57,900 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 19:02:57,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:58,725 INFO L225 Difference]: With dead ends: 337254 [2019-12-07 19:02:58,725 INFO L226 Difference]: Without dead ends: 337254 [2019-12-07 19:02:58,725 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:09,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337254 states. [2019-12-07 19:03:14,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337254 to 300214. [2019-12-07 19:03:14,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300214 states. [2019-12-07 19:03:15,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300214 states to 300214 states and 1231007 transitions. [2019-12-07 19:03:15,506 INFO L78 Accepts]: Start accepts. Automaton has 300214 states and 1231007 transitions. Word has length 19 [2019-12-07 19:03:15,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:15,507 INFO L462 AbstractCegarLoop]: Abstraction has 300214 states and 1231007 transitions. [2019-12-07 19:03:15,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:03:15,507 INFO L276 IsEmpty]: Start isEmpty. Operand 300214 states and 1231007 transitions. [2019-12-07 19:03:15,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:03:15,529 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:15,529 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:15,529 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:15,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:15,529 INFO L82 PathProgramCache]: Analyzing trace with hash -676038058, now seen corresponding path program 1 times [2019-12-07 19:03:15,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:15,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544636637] [2019-12-07 19:03:15,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:15,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:15,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:15,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544636637] [2019-12-07 19:03:15,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:15,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:03:15,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [353570547] [2019-12-07 19:03:15,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:03:15,565 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:15,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:03:15,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:15,565 INFO L87 Difference]: Start difference. First operand 300214 states and 1231007 transitions. Second operand 3 states. [2019-12-07 19:03:16,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:16,802 INFO L93 Difference]: Finished difference Result 300214 states and 1218717 transitions. [2019-12-07 19:03:16,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:03:16,803 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 19:03:16,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:18,219 INFO L225 Difference]: With dead ends: 300214 [2019-12-07 19:03:18,219 INFO L226 Difference]: Without dead ends: 300214 [2019-12-07 19:03:18,220 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:25,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300214 states. [2019-12-07 19:03:29,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300214 to 297550. [2019-12-07 19:03:29,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297550 states. [2019-12-07 19:03:30,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297550 states to 297550 states and 1208941 transitions. [2019-12-07 19:03:30,393 INFO L78 Accepts]: Start accepts. Automaton has 297550 states and 1208941 transitions. Word has length 19 [2019-12-07 19:03:30,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:30,393 INFO L462 AbstractCegarLoop]: Abstraction has 297550 states and 1208941 transitions. [2019-12-07 19:03:30,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:03:30,394 INFO L276 IsEmpty]: Start isEmpty. Operand 297550 states and 1208941 transitions. [2019-12-07 19:03:30,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 19:03:30,419 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:30,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:30,419 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:30,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:30,420 INFO L82 PathProgramCache]: Analyzing trace with hash 454537609, now seen corresponding path program 1 times [2019-12-07 19:03:30,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:30,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851998134] [2019-12-07 19:03:30,420 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:30,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:30,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:30,470 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851998134] [2019-12-07 19:03:30,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:30,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:03:30,470 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1583345607] [2019-12-07 19:03:30,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:03:30,471 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:30,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:03:30,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:30,471 INFO L87 Difference]: Start difference. First operand 297550 states and 1208941 transitions. Second operand 4 states. [2019-12-07 19:03:31,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:31,841 INFO L93 Difference]: Finished difference Result 335336 states and 1350580 transitions. [2019-12-07 19:03:31,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:03:31,841 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 19:03:31,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:36,086 INFO L225 Difference]: With dead ends: 335336 [2019-12-07 19:03:36,087 INFO L226 Difference]: Without dead ends: 335336 [2019-12-07 19:03:36,087 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:42,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335336 states. [2019-12-07 19:03:46,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335336 to 297526. [2019-12-07 19:03:46,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297526 states. [2019-12-07 19:03:48,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297526 states to 297526 states and 1208846 transitions. [2019-12-07 19:03:48,083 INFO L78 Accepts]: Start accepts. Automaton has 297526 states and 1208846 transitions. Word has length 20 [2019-12-07 19:03:48,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:48,084 INFO L462 AbstractCegarLoop]: Abstraction has 297526 states and 1208846 transitions. [2019-12-07 19:03:48,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:03:48,084 INFO L276 IsEmpty]: Start isEmpty. Operand 297526 states and 1208846 transitions. [2019-12-07 19:03:48,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 19:03:48,113 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:48,113 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:48,113 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:48,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:48,114 INFO L82 PathProgramCache]: Analyzing trace with hash -50907777, now seen corresponding path program 1 times [2019-12-07 19:03:48,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:48,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901325443] [2019-12-07 19:03:48,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:48,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:48,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:48,159 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901325443] [2019-12-07 19:03:48,160 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:48,160 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:03:48,160 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1598338382] [2019-12-07 19:03:48,160 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:03:48,160 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:48,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:03:48,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:48,161 INFO L87 Difference]: Start difference. First operand 297526 states and 1208846 transitions. Second operand 4 states. [2019-12-07 19:03:50,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:50,489 INFO L93 Difference]: Finished difference Result 459133 states and 1856451 transitions. [2019-12-07 19:03:50,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:03:50,490 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 19:03:50,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:51,582 INFO L225 Difference]: With dead ends: 459133 [2019-12-07 19:03:51,582 INFO L226 Difference]: Without dead ends: 411694 [2019-12-07 19:03:51,582 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:03:59,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411694 states. [2019-12-07 19:04:04,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411694 to 287144. [2019-12-07 19:04:04,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287144 states. [2019-12-07 19:04:05,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287144 states to 287144 states and 1161745 transitions. [2019-12-07 19:04:05,291 INFO L78 Accepts]: Start accepts. Automaton has 287144 states and 1161745 transitions. Word has length 21 [2019-12-07 19:04:05,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:05,292 INFO L462 AbstractCegarLoop]: Abstraction has 287144 states and 1161745 transitions. [2019-12-07 19:04:05,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:04:05,292 INFO L276 IsEmpty]: Start isEmpty. Operand 287144 states and 1161745 transitions. [2019-12-07 19:04:05,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 19:04:05,320 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:05,320 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:05,320 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:05,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:05,320 INFO L82 PathProgramCache]: Analyzing trace with hash -31915662, now seen corresponding path program 1 times [2019-12-07 19:04:05,320 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:05,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021779768] [2019-12-07 19:04:05,321 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:05,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:05,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:05,350 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021779768] [2019-12-07 19:04:05,350 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:05,350 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:04:05,350 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551843609] [2019-12-07 19:04:05,350 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:04:05,351 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:05,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:04:05,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:05,351 INFO L87 Difference]: Start difference. First operand 287144 states and 1161745 transitions. Second operand 3 states. [2019-12-07 19:04:05,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:05,512 INFO L93 Difference]: Finished difference Result 56769 states and 181021 transitions. [2019-12-07 19:04:05,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:04:05,513 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 19:04:05,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:05,590 INFO L225 Difference]: With dead ends: 56769 [2019-12-07 19:04:05,590 INFO L226 Difference]: Without dead ends: 56769 [2019-12-07 19:04:05,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:05,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56769 states. [2019-12-07 19:04:06,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56769 to 56769. [2019-12-07 19:04:06,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56769 states. [2019-12-07 19:04:06,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56769 states to 56769 states and 181021 transitions. [2019-12-07 19:04:06,518 INFO L78 Accepts]: Start accepts. Automaton has 56769 states and 181021 transitions. Word has length 21 [2019-12-07 19:04:06,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:06,519 INFO L462 AbstractCegarLoop]: Abstraction has 56769 states and 181021 transitions. [2019-12-07 19:04:06,519 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:04:06,519 INFO L276 IsEmpty]: Start isEmpty. Operand 56769 states and 181021 transitions. [2019-12-07 19:04:06,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:04:06,524 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:06,524 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:06,524 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:06,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:06,524 INFO L82 PathProgramCache]: Analyzing trace with hash -219431606, now seen corresponding path program 1 times [2019-12-07 19:04:06,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:06,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929816482] [2019-12-07 19:04:06,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:06,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:06,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:06,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [929816482] [2019-12-07 19:04:06,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:06,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:04:06,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937928975] [2019-12-07 19:04:06,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:04:06,566 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:06,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:04:06,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:04:06,567 INFO L87 Difference]: Start difference. First operand 56769 states and 181021 transitions. Second operand 6 states. [2019-12-07 19:04:08,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:08,122 INFO L93 Difference]: Finished difference Result 82600 states and 257673 transitions. [2019-12-07 19:04:08,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:04:08,122 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 19:04:08,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:08,235 INFO L225 Difference]: With dead ends: 82600 [2019-12-07 19:04:08,235 INFO L226 Difference]: Without dead ends: 82551 [2019-12-07 19:04:08,235 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:04:08,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82551 states. [2019-12-07 19:04:09,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82551 to 63907. [2019-12-07 19:04:09,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63907 states. [2019-12-07 19:04:09,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63907 states to 63907 states and 202249 transitions. [2019-12-07 19:04:09,414 INFO L78 Accepts]: Start accepts. Automaton has 63907 states and 202249 transitions. Word has length 22 [2019-12-07 19:04:09,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:09,414 INFO L462 AbstractCegarLoop]: Abstraction has 63907 states and 202249 transitions. [2019-12-07 19:04:09,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:04:09,414 INFO L276 IsEmpty]: Start isEmpty. Operand 63907 states and 202249 transitions. [2019-12-07 19:04:09,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:04:09,429 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:09,429 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:09,429 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:09,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:09,429 INFO L82 PathProgramCache]: Analyzing trace with hash 1790545903, now seen corresponding path program 1 times [2019-12-07 19:04:09,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:09,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679581304] [2019-12-07 19:04:09,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:09,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:09,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:09,470 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [679581304] [2019-12-07 19:04:09,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:09,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:04:09,470 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [39496580] [2019-12-07 19:04:09,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:04:09,470 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:09,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:04:09,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:04:09,470 INFO L87 Difference]: Start difference. First operand 63907 states and 202249 transitions. Second operand 6 states. [2019-12-07 19:04:10,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:10,008 INFO L93 Difference]: Finished difference Result 82695 states and 256419 transitions. [2019-12-07 19:04:10,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 19:04:10,009 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 19:04:10,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:10,119 INFO L225 Difference]: With dead ends: 82695 [2019-12-07 19:04:10,120 INFO L226 Difference]: Without dead ends: 82466 [2019-12-07 19:04:10,120 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:04:10,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82466 states. [2019-12-07 19:04:11,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82466 to 65158. [2019-12-07 19:04:11,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65158 states. [2019-12-07 19:04:11,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65158 states to 65158 states and 205799 transitions. [2019-12-07 19:04:11,379 INFO L78 Accepts]: Start accepts. Automaton has 65158 states and 205799 transitions. Word has length 27 [2019-12-07 19:04:11,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:11,379 INFO L462 AbstractCegarLoop]: Abstraction has 65158 states and 205799 transitions. [2019-12-07 19:04:11,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:04:11,379 INFO L276 IsEmpty]: Start isEmpty. Operand 65158 states and 205799 transitions. [2019-12-07 19:04:11,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 19:04:11,400 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:11,400 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:11,401 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:11,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:11,401 INFO L82 PathProgramCache]: Analyzing trace with hash 101231732, now seen corresponding path program 1 times [2019-12-07 19:04:11,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:11,401 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751876419] [2019-12-07 19:04:11,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:11,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:11,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:11,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [751876419] [2019-12-07 19:04:11,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:11,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:11,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862256217] [2019-12-07 19:04:11,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:04:11,434 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:11,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:04:11,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:11,435 INFO L87 Difference]: Start difference. First operand 65158 states and 205799 transitions. Second operand 4 states. [2019-12-07 19:04:11,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:11,505 INFO L93 Difference]: Finished difference Result 24830 states and 75182 transitions. [2019-12-07 19:04:11,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:04:11,506 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 19:04:11,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:11,535 INFO L225 Difference]: With dead ends: 24830 [2019-12-07 19:04:11,535 INFO L226 Difference]: Without dead ends: 24823 [2019-12-07 19:04:11,535 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:11,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24823 states. [2019-12-07 19:04:11,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24823 to 23414. [2019-12-07 19:04:11,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23414 states. [2019-12-07 19:04:11,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23414 states to 23414 states and 71016 transitions. [2019-12-07 19:04:11,855 INFO L78 Accepts]: Start accepts. Automaton has 23414 states and 71016 transitions. Word has length 30 [2019-12-07 19:04:11,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:11,855 INFO L462 AbstractCegarLoop]: Abstraction has 23414 states and 71016 transitions. [2019-12-07 19:04:11,855 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:04:11,855 INFO L276 IsEmpty]: Start isEmpty. Operand 23414 states and 71016 transitions. [2019-12-07 19:04:11,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 19:04:11,870 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:11,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:11,871 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:11,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:11,871 INFO L82 PathProgramCache]: Analyzing trace with hash -718999585, now seen corresponding path program 1 times [2019-12-07 19:04:11,871 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:11,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446717215] [2019-12-07 19:04:11,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:11,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:11,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:11,919 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446717215] [2019-12-07 19:04:11,919 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:11,919 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:04:11,919 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910515862] [2019-12-07 19:04:11,920 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:04:11,920 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:11,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:04:11,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:04:11,920 INFO L87 Difference]: Start difference. First operand 23414 states and 71016 transitions. Second operand 7 states. [2019-12-07 19:04:12,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:12,597 INFO L93 Difference]: Finished difference Result 29795 states and 87851 transitions. [2019-12-07 19:04:12,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 19:04:12,597 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 19:04:12,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:12,629 INFO L225 Difference]: With dead ends: 29795 [2019-12-07 19:04:12,629 INFO L226 Difference]: Without dead ends: 29795 [2019-12-07 19:04:12,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 19:04:12,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29795 states. [2019-12-07 19:04:13,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29795 to 22977. [2019-12-07 19:04:13,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22977 states. [2019-12-07 19:04:13,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22977 states to 22977 states and 69849 transitions. [2019-12-07 19:04:13,035 INFO L78 Accepts]: Start accepts. Automaton has 22977 states and 69849 transitions. Word has length 33 [2019-12-07 19:04:13,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:13,035 INFO L462 AbstractCegarLoop]: Abstraction has 22977 states and 69849 transitions. [2019-12-07 19:04:13,035 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:04:13,035 INFO L276 IsEmpty]: Start isEmpty. Operand 22977 states and 69849 transitions. [2019-12-07 19:04:13,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 19:04:13,053 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:13,053 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:13,053 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:13,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:13,053 INFO L82 PathProgramCache]: Analyzing trace with hash -1494536628, now seen corresponding path program 1 times [2019-12-07 19:04:13,053 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:13,053 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827633487] [2019-12-07 19:04:13,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:13,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:13,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:13,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827633487] [2019-12-07 19:04:13,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:13,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:04:13,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482022839] [2019-12-07 19:04:13,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:04:13,097 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:13,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:04:13,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:13,097 INFO L87 Difference]: Start difference. First operand 22977 states and 69849 transitions. Second operand 5 states. [2019-12-07 19:04:13,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:13,160 INFO L93 Difference]: Finished difference Result 21082 states and 65662 transitions. [2019-12-07 19:04:13,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:04:13,161 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 19:04:13,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:13,183 INFO L225 Difference]: With dead ends: 21082 [2019-12-07 19:04:13,183 INFO L226 Difference]: Without dead ends: 20648 [2019-12-07 19:04:13,183 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:13,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20648 states. [2019-12-07 19:04:13,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20648 to 12566. [2019-12-07 19:04:13,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12566 states. [2019-12-07 19:04:13,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12566 states to 12566 states and 39309 transitions. [2019-12-07 19:04:13,415 INFO L78 Accepts]: Start accepts. Automaton has 12566 states and 39309 transitions. Word has length 41 [2019-12-07 19:04:13,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:13,416 INFO L462 AbstractCegarLoop]: Abstraction has 12566 states and 39309 transitions. [2019-12-07 19:04:13,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:13,416 INFO L276 IsEmpty]: Start isEmpty. Operand 12566 states and 39309 transitions. [2019-12-07 19:04:13,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:13,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:13,427 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:13,427 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:13,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:13,427 INFO L82 PathProgramCache]: Analyzing trace with hash 1722031386, now seen corresponding path program 1 times [2019-12-07 19:04:13,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:13,427 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1152085858] [2019-12-07 19:04:13,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:13,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:13,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:13,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1152085858] [2019-12-07 19:04:13,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:13,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:13,456 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937637036] [2019-12-07 19:04:13,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:04:13,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:13,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:04:13,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:13,456 INFO L87 Difference]: Start difference. First operand 12566 states and 39309 transitions. Second operand 3 states. [2019-12-07 19:04:13,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:13,513 INFO L93 Difference]: Finished difference Result 17768 states and 55006 transitions. [2019-12-07 19:04:13,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:04:13,513 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 19:04:13,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:13,534 INFO L225 Difference]: With dead ends: 17768 [2019-12-07 19:04:13,534 INFO L226 Difference]: Without dead ends: 17768 [2019-12-07 19:04:13,534 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:13,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17768 states. [2019-12-07 19:04:13,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17768 to 14089. [2019-12-07 19:04:13,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14089 states. [2019-12-07 19:04:13,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14089 states to 14089 states and 43890 transitions. [2019-12-07 19:04:13,777 INFO L78 Accepts]: Start accepts. Automaton has 14089 states and 43890 transitions. Word has length 65 [2019-12-07 19:04:13,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:13,777 INFO L462 AbstractCegarLoop]: Abstraction has 14089 states and 43890 transitions. [2019-12-07 19:04:13,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:04:13,777 INFO L276 IsEmpty]: Start isEmpty. Operand 14089 states and 43890 transitions. [2019-12-07 19:04:13,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:13,790 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:13,790 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:13,790 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:13,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:13,791 INFO L82 PathProgramCache]: Analyzing trace with hash 550900030, now seen corresponding path program 1 times [2019-12-07 19:04:13,791 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:13,791 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369148269] [2019-12-07 19:04:13,791 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:13,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:13,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:13,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369148269] [2019-12-07 19:04:13,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:13,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:04:13,845 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831312124] [2019-12-07 19:04:13,845 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:04:13,845 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:13,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:04:13,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:13,846 INFO L87 Difference]: Start difference. First operand 14089 states and 43890 transitions. Second operand 5 states. [2019-12-07 19:04:14,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:14,168 INFO L93 Difference]: Finished difference Result 21208 states and 64963 transitions. [2019-12-07 19:04:14,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:04:14,169 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 19:04:14,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:14,190 INFO L225 Difference]: With dead ends: 21208 [2019-12-07 19:04:14,190 INFO L226 Difference]: Without dead ends: 21208 [2019-12-07 19:04:14,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:04:14,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21208 states. [2019-12-07 19:04:14,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21208 to 17969. [2019-12-07 19:04:14,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17969 states. [2019-12-07 19:04:14,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17969 states to 17969 states and 55748 transitions. [2019-12-07 19:04:14,475 INFO L78 Accepts]: Start accepts. Automaton has 17969 states and 55748 transitions. Word has length 65 [2019-12-07 19:04:14,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:14,475 INFO L462 AbstractCegarLoop]: Abstraction has 17969 states and 55748 transitions. [2019-12-07 19:04:14,475 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:14,475 INFO L276 IsEmpty]: Start isEmpty. Operand 17969 states and 55748 transitions. [2019-12-07 19:04:14,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:14,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:14,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:14,491 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:14,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:14,491 INFO L82 PathProgramCache]: Analyzing trace with hash 2130664412, now seen corresponding path program 2 times [2019-12-07 19:04:14,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:14,492 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498482818] [2019-12-07 19:04:14,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:14,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:14,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:14,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498482818] [2019-12-07 19:04:14,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:14,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:04:14,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708515231] [2019-12-07 19:04:14,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:04:14,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:14,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:04:14,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:14,532 INFO L87 Difference]: Start difference. First operand 17969 states and 55748 transitions. Second operand 3 states. [2019-12-07 19:04:14,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:14,608 INFO L93 Difference]: Finished difference Result 21266 states and 65874 transitions. [2019-12-07 19:04:14,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:04:14,608 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 19:04:14,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:14,633 INFO L225 Difference]: With dead ends: 21266 [2019-12-07 19:04:14,633 INFO L226 Difference]: Without dead ends: 21266 [2019-12-07 19:04:14,634 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:14,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21266 states. [2019-12-07 19:04:14,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21266 to 17068. [2019-12-07 19:04:14,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17068 states. [2019-12-07 19:04:14,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17068 states to 17068 states and 53370 transitions. [2019-12-07 19:04:14,914 INFO L78 Accepts]: Start accepts. Automaton has 17068 states and 53370 transitions. Word has length 65 [2019-12-07 19:04:14,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:14,915 INFO L462 AbstractCegarLoop]: Abstraction has 17068 states and 53370 transitions. [2019-12-07 19:04:14,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:04:14,915 INFO L276 IsEmpty]: Start isEmpty. Operand 17068 states and 53370 transitions. [2019-12-07 19:04:14,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:04:14,929 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:14,929 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:14,929 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:14,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:14,930 INFO L82 PathProgramCache]: Analyzing trace with hash 1183163386, now seen corresponding path program 1 times [2019-12-07 19:04:14,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:14,930 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930226847] [2019-12-07 19:04:14,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:14,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:15,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:15,102 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930226847] [2019-12-07 19:04:15,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:15,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:04:15,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1543002744] [2019-12-07 19:04:15,102 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 19:04:15,102 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:15,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 19:04:15,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:04:15,103 INFO L87 Difference]: Start difference. First operand 17068 states and 53370 transitions. Second operand 10 states. [2019-12-07 19:04:15,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:15,952 INFO L93 Difference]: Finished difference Result 51452 states and 160699 transitions. [2019-12-07 19:04:15,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 19:04:15,952 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 19:04:15,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:15,998 INFO L225 Difference]: With dead ends: 51452 [2019-12-07 19:04:15,998 INFO L226 Difference]: Without dead ends: 37061 [2019-12-07 19:04:15,999 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=189, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:04:16,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37061 states. [2019-12-07 19:04:16,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37061 to 24684. [2019-12-07 19:04:16,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24684 states. [2019-12-07 19:04:16,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24684 states to 24684 states and 77199 transitions. [2019-12-07 19:04:16,443 INFO L78 Accepts]: Start accepts. Automaton has 24684 states and 77199 transitions. Word has length 66 [2019-12-07 19:04:16,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:16,444 INFO L462 AbstractCegarLoop]: Abstraction has 24684 states and 77199 transitions. [2019-12-07 19:04:16,444 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 19:04:16,444 INFO L276 IsEmpty]: Start isEmpty. Operand 24684 states and 77199 transitions. [2019-12-07 19:04:16,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:04:16,469 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:16,469 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:16,469 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:16,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:16,470 INFO L82 PathProgramCache]: Analyzing trace with hash -1426300264, now seen corresponding path program 2 times [2019-12-07 19:04:16,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:16,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419564524] [2019-12-07 19:04:16,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:16,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:16,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:16,536 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419564524] [2019-12-07 19:04:16,536 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:16,536 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:04:16,536 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1587204263] [2019-12-07 19:04:16,536 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:04:16,537 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:16,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:04:16,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:16,537 INFO L87 Difference]: Start difference. First operand 24684 states and 77199 transitions. Second operand 5 states. [2019-12-07 19:04:16,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:16,948 INFO L93 Difference]: Finished difference Result 36269 states and 111697 transitions. [2019-12-07 19:04:16,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:04:16,948 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 19:04:16,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:16,992 INFO L225 Difference]: With dead ends: 36269 [2019-12-07 19:04:16,992 INFO L226 Difference]: Without dead ends: 36269 [2019-12-07 19:04:16,993 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:04:17,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36269 states. [2019-12-07 19:04:17,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36269 to 28778. [2019-12-07 19:04:17,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28778 states. [2019-12-07 19:04:17,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28778 states to 28778 states and 90066 transitions. [2019-12-07 19:04:17,469 INFO L78 Accepts]: Start accepts. Automaton has 28778 states and 90066 transitions. Word has length 66 [2019-12-07 19:04:17,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:17,470 INFO L462 AbstractCegarLoop]: Abstraction has 28778 states and 90066 transitions. [2019-12-07 19:04:17,470 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:17,470 INFO L276 IsEmpty]: Start isEmpty. Operand 28778 states and 90066 transitions. [2019-12-07 19:04:17,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:04:17,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:17,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:17,499 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:17,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:17,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1763897194, now seen corresponding path program 3 times [2019-12-07 19:04:17,499 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:17,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914374692] [2019-12-07 19:04:17,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:17,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:17,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:17,541 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914374692] [2019-12-07 19:04:17,541 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:17,541 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:04:17,542 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1383912701] [2019-12-07 19:04:17,542 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:04:17,542 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:17,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:04:17,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:17,542 INFO L87 Difference]: Start difference. First operand 28778 states and 90066 transitions. Second operand 3 states. [2019-12-07 19:04:17,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:17,599 INFO L93 Difference]: Finished difference Result 22909 states and 70288 transitions. [2019-12-07 19:04:17,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:04:17,600 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 19:04:17,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:17,624 INFO L225 Difference]: With dead ends: 22909 [2019-12-07 19:04:17,624 INFO L226 Difference]: Without dead ends: 22909 [2019-12-07 19:04:17,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:17,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22909 states. [2019-12-07 19:04:17,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22909 to 22249. [2019-12-07 19:04:17,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22249 states. [2019-12-07 19:04:17,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22249 states to 22249 states and 68393 transitions. [2019-12-07 19:04:17,935 INFO L78 Accepts]: Start accepts. Automaton has 22249 states and 68393 transitions. Word has length 66 [2019-12-07 19:04:17,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:17,935 INFO L462 AbstractCegarLoop]: Abstraction has 22249 states and 68393 transitions. [2019-12-07 19:04:17,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:04:17,935 INFO L276 IsEmpty]: Start isEmpty. Operand 22249 states and 68393 transitions. [2019-12-07 19:04:17,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:17,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:17,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:17,954 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:17,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:17,954 INFO L82 PathProgramCache]: Analyzing trace with hash 983067204, now seen corresponding path program 1 times [2019-12-07 19:04:17,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:17,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87814417] [2019-12-07 19:04:17,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:17,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:18,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:18,037 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87814417] [2019-12-07 19:04:18,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:18,037 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 19:04:18,037 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501769818] [2019-12-07 19:04:18,037 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 19:04:18,037 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:18,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 19:04:18,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:04:18,038 INFO L87 Difference]: Start difference. First operand 22249 states and 68393 transitions. Second operand 8 states. [2019-12-07 19:04:19,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:19,147 INFO L93 Difference]: Finished difference Result 88302 states and 267732 transitions. [2019-12-07 19:04:19,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 19:04:19,147 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 67 [2019-12-07 19:04:19,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:19,228 INFO L225 Difference]: With dead ends: 88302 [2019-12-07 19:04:19,229 INFO L226 Difference]: Without dead ends: 64653 [2019-12-07 19:04:19,229 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=224, Invalid=768, Unknown=0, NotChecked=0, Total=992 [2019-12-07 19:04:19,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64653 states. [2019-12-07 19:04:19,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64653 to 25274. [2019-12-07 19:04:19,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25274 states. [2019-12-07 19:04:19,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25274 states to 25274 states and 77544 transitions. [2019-12-07 19:04:19,916 INFO L78 Accepts]: Start accepts. Automaton has 25274 states and 77544 transitions. Word has length 67 [2019-12-07 19:04:19,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:19,916 INFO L462 AbstractCegarLoop]: Abstraction has 25274 states and 77544 transitions. [2019-12-07 19:04:19,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 19:04:19,916 INFO L276 IsEmpty]: Start isEmpty. Operand 25274 states and 77544 transitions. [2019-12-07 19:04:19,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:19,942 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:19,943 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:19,943 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:19,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:19,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1635380567, now seen corresponding path program 1 times [2019-12-07 19:04:19,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:19,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855026005] [2019-12-07 19:04:19,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:19,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:19,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:19,979 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855026005] [2019-12-07 19:04:19,979 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:19,979 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:19,979 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653092629] [2019-12-07 19:04:19,979 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:04:19,979 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:19,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:04:19,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:19,979 INFO L87 Difference]: Start difference. First operand 25274 states and 77544 transitions. Second operand 3 states. [2019-12-07 19:04:20,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:20,076 INFO L93 Difference]: Finished difference Result 27849 states and 83856 transitions. [2019-12-07 19:04:20,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:04:20,076 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 19:04:20,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:20,107 INFO L225 Difference]: With dead ends: 27849 [2019-12-07 19:04:20,107 INFO L226 Difference]: Without dead ends: 27849 [2019-12-07 19:04:20,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:20,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27849 states. [2019-12-07 19:04:20,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27849 to 25863. [2019-12-07 19:04:20,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25863 states. [2019-12-07 19:04:20,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25863 states to 25863 states and 78193 transitions. [2019-12-07 19:04:20,512 INFO L78 Accepts]: Start accepts. Automaton has 25863 states and 78193 transitions. Word has length 67 [2019-12-07 19:04:20,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:20,512 INFO L462 AbstractCegarLoop]: Abstraction has 25863 states and 78193 transitions. [2019-12-07 19:04:20,512 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:04:20,512 INFO L276 IsEmpty]: Start isEmpty. Operand 25863 states and 78193 transitions. [2019-12-07 19:04:20,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:20,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:20,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:20,539 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:20,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:20,539 INFO L82 PathProgramCache]: Analyzing trace with hash 342871268, now seen corresponding path program 1 times [2019-12-07 19:04:20,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:20,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962841817] [2019-12-07 19:04:20,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:20,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:20,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:20,578 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1962841817] [2019-12-07 19:04:20,579 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:20,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:20,579 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196665842] [2019-12-07 19:04:20,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:04:20,579 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:20,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:04:20,579 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:20,579 INFO L87 Difference]: Start difference. First operand 25863 states and 78193 transitions. Second operand 4 states. [2019-12-07 19:04:20,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:20,679 INFO L93 Difference]: Finished difference Result 25863 states and 78007 transitions. [2019-12-07 19:04:20,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:04:20,680 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 19:04:20,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:20,710 INFO L225 Difference]: With dead ends: 25863 [2019-12-07 19:04:20,711 INFO L226 Difference]: Without dead ends: 25863 [2019-12-07 19:04:20,711 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:20,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25863 states. [2019-12-07 19:04:21,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25863 to 23470. [2019-12-07 19:04:21,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23470 states. [2019-12-07 19:04:21,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23470 states to 23470 states and 71069 transitions. [2019-12-07 19:04:21,129 INFO L78 Accepts]: Start accepts. Automaton has 23470 states and 71069 transitions. Word has length 67 [2019-12-07 19:04:21,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:21,130 INFO L462 AbstractCegarLoop]: Abstraction has 23470 states and 71069 transitions. [2019-12-07 19:04:21,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:04:21,130 INFO L276 IsEmpty]: Start isEmpty. Operand 23470 states and 71069 transitions. [2019-12-07 19:04:21,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:21,148 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:21,148 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:21,148 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:21,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:21,149 INFO L82 PathProgramCache]: Analyzing trace with hash 330016750, now seen corresponding path program 2 times [2019-12-07 19:04:21,149 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:21,149 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263268972] [2019-12-07 19:04:21,149 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:21,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:21,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:21,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263268972] [2019-12-07 19:04:21,245 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:21,245 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:04:21,245 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2068353783] [2019-12-07 19:04:21,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 19:04:21,245 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:21,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 19:04:21,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:04:21,246 INFO L87 Difference]: Start difference. First operand 23470 states and 71069 transitions. Second operand 9 states. [2019-12-07 19:04:23,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:23,197 INFO L93 Difference]: Finished difference Result 103178 states and 305246 transitions. [2019-12-07 19:04:23,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 19:04:23,197 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 19:04:23,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:23,324 INFO L225 Difference]: With dead ends: 103178 [2019-12-07 19:04:23,324 INFO L226 Difference]: Without dead ends: 98570 [2019-12-07 19:04:23,325 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 554 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=369, Invalid=1353, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 19:04:23,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98570 states. [2019-12-07 19:04:24,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98570 to 23739. [2019-12-07 19:04:24,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23739 states. [2019-12-07 19:04:24,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23739 states to 23739 states and 71872 transitions. [2019-12-07 19:04:24,200 INFO L78 Accepts]: Start accepts. Automaton has 23739 states and 71872 transitions. Word has length 67 [2019-12-07 19:04:24,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:24,201 INFO L462 AbstractCegarLoop]: Abstraction has 23739 states and 71872 transitions. [2019-12-07 19:04:24,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 19:04:24,201 INFO L276 IsEmpty]: Start isEmpty. Operand 23739 states and 71872 transitions. [2019-12-07 19:04:24,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:24,221 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:24,221 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:24,222 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:24,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:24,222 INFO L82 PathProgramCache]: Analyzing trace with hash 1895560870, now seen corresponding path program 3 times [2019-12-07 19:04:24,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:24,222 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774533767] [2019-12-07 19:04:24,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:24,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:24,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:24,260 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774533767] [2019-12-07 19:04:24,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:24,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:24,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938542010] [2019-12-07 19:04:24,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:04:24,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:24,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:04:24,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:24,261 INFO L87 Difference]: Start difference. First operand 23739 states and 71872 transitions. Second operand 4 states. [2019-12-07 19:04:24,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:24,335 INFO L93 Difference]: Finished difference Result 25844 states and 77599 transitions. [2019-12-07 19:04:24,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:04:24,336 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 19:04:24,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:24,350 INFO L225 Difference]: With dead ends: 25844 [2019-12-07 19:04:24,350 INFO L226 Difference]: Without dead ends: 12802 [2019-12-07 19:04:24,350 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:24,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12802 states. [2019-12-07 19:04:24,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12802 to 12802. [2019-12-07 19:04:24,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12802 states. [2019-12-07 19:04:24,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12802 states to 12802 states and 38828 transitions. [2019-12-07 19:04:24,543 INFO L78 Accepts]: Start accepts. Automaton has 12802 states and 38828 transitions. Word has length 67 [2019-12-07 19:04:24,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:24,543 INFO L462 AbstractCegarLoop]: Abstraction has 12802 states and 38828 transitions. [2019-12-07 19:04:24,543 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:04:24,543 INFO L276 IsEmpty]: Start isEmpty. Operand 12802 states and 38828 transitions. [2019-12-07 19:04:24,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:24,554 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:24,555 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:24,555 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:24,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:24,555 INFO L82 PathProgramCache]: Analyzing trace with hash -1677754344, now seen corresponding path program 4 times [2019-12-07 19:04:24,555 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:24,555 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839727219] [2019-12-07 19:04:24,555 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:24,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:24,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:24,745 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839727219] [2019-12-07 19:04:24,745 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:24,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:04:24,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123947112] [2019-12-07 19:04:24,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:04:24,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:24,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:04:24,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:04:24,746 INFO L87 Difference]: Start difference. First operand 12802 states and 38828 transitions. Second operand 15 states. [2019-12-07 19:04:27,174 WARN L192 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 39 [2019-12-07 19:04:27,912 WARN L192 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 41 [2019-12-07 19:04:28,159 WARN L192 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 38 [2019-12-07 19:04:28,440 WARN L192 SmtUtils]: Spent 218.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 41 [2019-12-07 19:04:30,261 WARN L192 SmtUtils]: Spent 224.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 44 [2019-12-07 19:04:30,753 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 26 [2019-12-07 19:04:31,606 WARN L192 SmtUtils]: Spent 214.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 44 [2019-12-07 19:04:33,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:33,047 INFO L93 Difference]: Finished difference Result 46599 states and 138635 transitions. [2019-12-07 19:04:33,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 108 states. [2019-12-07 19:04:33,047 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 19:04:33,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:33,088 INFO L225 Difference]: With dead ends: 46599 [2019-12-07 19:04:33,088 INFO L226 Difference]: Without dead ends: 35448 [2019-12-07 19:04:33,092 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4384 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=1422, Invalid=10568, Unknown=0, NotChecked=0, Total=11990 [2019-12-07 19:04:33,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35448 states. [2019-12-07 19:04:33,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35448 to 13364. [2019-12-07 19:04:33,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13364 states. [2019-12-07 19:04:33,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13364 states to 13364 states and 40217 transitions. [2019-12-07 19:04:33,434 INFO L78 Accepts]: Start accepts. Automaton has 13364 states and 40217 transitions. Word has length 67 [2019-12-07 19:04:33,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:33,434 INFO L462 AbstractCegarLoop]: Abstraction has 13364 states and 40217 transitions. [2019-12-07 19:04:33,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:04:33,434 INFO L276 IsEmpty]: Start isEmpty. Operand 13364 states and 40217 transitions. [2019-12-07 19:04:33,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:33,447 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:33,447 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:33,447 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:33,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:33,447 INFO L82 PathProgramCache]: Analyzing trace with hash 15945052, now seen corresponding path program 5 times [2019-12-07 19:04:33,447 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:33,447 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2059151581] [2019-12-07 19:04:33,447 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:33,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:33,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:33,747 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2059151581] [2019-12-07 19:04:33,747 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:33,747 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 19:04:33,747 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507879147] [2019-12-07 19:04:33,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 19:04:33,747 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:33,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 19:04:33,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:04:33,748 INFO L87 Difference]: Start difference. First operand 13364 states and 40217 transitions. Second operand 17 states. [2019-12-07 19:04:34,384 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 45 [2019-12-07 19:04:34,834 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 37 DAG size of output: 36 [2019-12-07 19:04:36,851 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 34 [2019-12-07 19:04:38,888 WARN L192 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 32 [2019-12-07 19:04:39,099 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 32 [2019-12-07 19:04:39,891 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification that was a NOOP. DAG size: 41 [2019-12-07 19:04:40,598 WARN L192 SmtUtils]: Spent 235.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2019-12-07 19:04:43,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:43,485 INFO L93 Difference]: Finished difference Result 54670 states and 160483 transitions. [2019-12-07 19:04:43,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 116 states. [2019-12-07 19:04:43,486 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 19:04:43,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:43,536 INFO L225 Difference]: With dead ends: 54670 [2019-12-07 19:04:43,536 INFO L226 Difference]: Without dead ends: 45335 [2019-12-07 19:04:43,540 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5832 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=2013, Invalid=12993, Unknown=0, NotChecked=0, Total=15006 [2019-12-07 19:04:43,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45335 states. [2019-12-07 19:04:43,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45335 to 13679. [2019-12-07 19:04:43,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13679 states. [2019-12-07 19:04:43,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13679 states to 13679 states and 40951 transitions. [2019-12-07 19:04:43,940 INFO L78 Accepts]: Start accepts. Automaton has 13679 states and 40951 transitions. Word has length 67 [2019-12-07 19:04:43,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:43,941 INFO L462 AbstractCegarLoop]: Abstraction has 13679 states and 40951 transitions. [2019-12-07 19:04:43,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 19:04:43,941 INFO L276 IsEmpty]: Start isEmpty. Operand 13679 states and 40951 transitions. [2019-12-07 19:04:43,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:43,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:43,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:43,954 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:43,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:43,954 INFO L82 PathProgramCache]: Analyzing trace with hash -1623213776, now seen corresponding path program 6 times [2019-12-07 19:04:43,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:43,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723134938] [2019-12-07 19:04:43,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:43,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:44,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:44,012 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723134938] [2019-12-07 19:04:44,012 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:44,013 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:44,013 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1155416625] [2019-12-07 19:04:44,013 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:04:44,013 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:44,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:04:44,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:44,013 INFO L87 Difference]: Start difference. First operand 13679 states and 40951 transitions. Second operand 4 states. [2019-12-07 19:04:44,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:44,069 INFO L93 Difference]: Finished difference Result 23708 states and 70807 transitions. [2019-12-07 19:04:44,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:04:44,070 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 19:04:44,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:44,080 INFO L225 Difference]: With dead ends: 23708 [2019-12-07 19:04:44,080 INFO L226 Difference]: Without dead ends: 10919 [2019-12-07 19:04:44,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:44,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10919 states. [2019-12-07 19:04:44,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10919 to 10919. [2019-12-07 19:04:44,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10919 states. [2019-12-07 19:04:44,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10919 states to 10919 states and 32338 transitions. [2019-12-07 19:04:44,235 INFO L78 Accepts]: Start accepts. Automaton has 10919 states and 32338 transitions. Word has length 67 [2019-12-07 19:04:44,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:44,236 INFO L462 AbstractCegarLoop]: Abstraction has 10919 states and 32338 transitions. [2019-12-07 19:04:44,236 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:04:44,236 INFO L276 IsEmpty]: Start isEmpty. Operand 10919 states and 32338 transitions. [2019-12-07 19:04:44,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:44,244 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:44,244 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:44,245 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:44,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:44,245 INFO L82 PathProgramCache]: Analyzing trace with hash -2091967768, now seen corresponding path program 7 times [2019-12-07 19:04:44,245 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:44,245 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678444950] [2019-12-07 19:04:44,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:44,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:44,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:44,384 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [678444950] [2019-12-07 19:04:44,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:44,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:04:44,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067694483] [2019-12-07 19:04:44,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:04:44,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:44,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:04:44,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:04:44,385 INFO L87 Difference]: Start difference. First operand 10919 states and 32338 transitions. Second operand 11 states. [2019-12-07 19:04:45,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:45,153 INFO L93 Difference]: Finished difference Result 17996 states and 52555 transitions. [2019-12-07 19:04:45,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 19:04:45,154 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 19:04:45,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:45,165 INFO L225 Difference]: With dead ends: 17996 [2019-12-07 19:04:45,166 INFO L226 Difference]: Without dead ends: 13006 [2019-12-07 19:04:45,166 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=82, Invalid=338, Unknown=0, NotChecked=0, Total=420 [2019-12-07 19:04:45,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13006 states. [2019-12-07 19:04:45,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13006 to 11531. [2019-12-07 19:04:45,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11531 states. [2019-12-07 19:04:45,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11531 states to 11531 states and 34032 transitions. [2019-12-07 19:04:45,330 INFO L78 Accepts]: Start accepts. Automaton has 11531 states and 34032 transitions. Word has length 67 [2019-12-07 19:04:45,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:45,330 INFO L462 AbstractCegarLoop]: Abstraction has 11531 states and 34032 transitions. [2019-12-07 19:04:45,330 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:04:45,330 INFO L276 IsEmpty]: Start isEmpty. Operand 11531 states and 34032 transitions. [2019-12-07 19:04:45,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:45,339 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:45,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:45,339 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:45,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:45,340 INFO L82 PathProgramCache]: Analyzing trace with hash 1425975690, now seen corresponding path program 8 times [2019-12-07 19:04:45,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:45,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338167185] [2019-12-07 19:04:45,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:45,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:45,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:45,464 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1338167185] [2019-12-07 19:04:45,464 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:45,464 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:04:45,464 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1020530766] [2019-12-07 19:04:45,465 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:04:45,465 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:45,465 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:04:45,465 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:04:45,465 INFO L87 Difference]: Start difference. First operand 11531 states and 34032 transitions. Second operand 11 states. [2019-12-07 19:04:46,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:46,206 INFO L93 Difference]: Finished difference Result 18279 states and 53279 transitions. [2019-12-07 19:04:46,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 19:04:46,207 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 19:04:46,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:46,220 INFO L225 Difference]: With dead ends: 18279 [2019-12-07 19:04:46,220 INFO L226 Difference]: Without dead ends: 13989 [2019-12-07 19:04:46,220 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=130, Invalid=572, Unknown=0, NotChecked=0, Total=702 [2019-12-07 19:04:46,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13989 states. [2019-12-07 19:04:46,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13989 to 11539. [2019-12-07 19:04:46,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11539 states. [2019-12-07 19:04:46,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11539 states to 11539 states and 34020 transitions. [2019-12-07 19:04:46,394 INFO L78 Accepts]: Start accepts. Automaton has 11539 states and 34020 transitions. Word has length 67 [2019-12-07 19:04:46,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:46,395 INFO L462 AbstractCegarLoop]: Abstraction has 11539 states and 34020 transitions. [2019-12-07 19:04:46,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:04:46,395 INFO L276 IsEmpty]: Start isEmpty. Operand 11539 states and 34020 transitions. [2019-12-07 19:04:46,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:46,403 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:46,404 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:46,404 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:46,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:46,404 INFO L82 PathProgramCache]: Analyzing trace with hash 1279627604, now seen corresponding path program 9 times [2019-12-07 19:04:46,404 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:46,404 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024947441] [2019-12-07 19:04:46,404 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:46,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:46,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:46,685 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2024947441] [2019-12-07 19:04:46,685 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:46,685 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:04:46,685 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966037123] [2019-12-07 19:04:46,685 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:04:46,685 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:46,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:04:46,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:04:46,686 INFO L87 Difference]: Start difference. First operand 11539 states and 34020 transitions. Second operand 15 states. [2019-12-07 19:04:51,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:51,011 INFO L93 Difference]: Finished difference Result 17913 states and 51665 transitions. [2019-12-07 19:04:51,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 19:04:51,013 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 19:04:51,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:51,046 INFO L225 Difference]: With dead ends: 17913 [2019-12-07 19:04:51,046 INFO L226 Difference]: Without dead ends: 14712 [2019-12-07 19:04:51,047 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 848 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=485, Invalid=2595, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 19:04:51,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14712 states. [2019-12-07 19:04:51,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14712 to 11163. [2019-12-07 19:04:51,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11163 states. [2019-12-07 19:04:51,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11163 states to 11163 states and 33040 transitions. [2019-12-07 19:04:51,230 INFO L78 Accepts]: Start accepts. Automaton has 11163 states and 33040 transitions. Word has length 67 [2019-12-07 19:04:51,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:51,230 INFO L462 AbstractCegarLoop]: Abstraction has 11163 states and 33040 transitions. [2019-12-07 19:04:51,230 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:04:51,230 INFO L276 IsEmpty]: Start isEmpty. Operand 11163 states and 33040 transitions. [2019-12-07 19:04:51,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:51,239 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:51,239 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:51,240 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:51,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:51,240 INFO L82 PathProgramCache]: Analyzing trace with hash 1642000384, now seen corresponding path program 10 times [2019-12-07 19:04:51,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:51,240 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783954119] [2019-12-07 19:04:51,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:51,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:51,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:51,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [783954119] [2019-12-07 19:04:51,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:51,563 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 19:04:51,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2040853916] [2019-12-07 19:04:51,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 19:04:51,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:51,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 19:04:51,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:04:51,564 INFO L87 Difference]: Start difference. First operand 11163 states and 33040 transitions. Second operand 17 states. [2019-12-07 19:04:53,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:53,406 INFO L93 Difference]: Finished difference Result 17375 states and 50309 transitions. [2019-12-07 19:04:53,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 19:04:53,406 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 19:04:53,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:53,440 INFO L225 Difference]: With dead ends: 17375 [2019-12-07 19:04:53,440 INFO L226 Difference]: Without dead ends: 14596 [2019-12-07 19:04:53,441 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 786 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=462, Invalid=2618, Unknown=0, NotChecked=0, Total=3080 [2019-12-07 19:04:53,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14596 states. [2019-12-07 19:04:53,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14596 to 11339. [2019-12-07 19:04:53,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11339 states. [2019-12-07 19:04:53,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11339 states to 11339 states and 33498 transitions. [2019-12-07 19:04:53,604 INFO L78 Accepts]: Start accepts. Automaton has 11339 states and 33498 transitions. Word has length 67 [2019-12-07 19:04:53,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:53,604 INFO L462 AbstractCegarLoop]: Abstraction has 11339 states and 33498 transitions. [2019-12-07 19:04:53,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 19:04:53,604 INFO L276 IsEmpty]: Start isEmpty. Operand 11339 states and 33498 transitions. [2019-12-07 19:04:53,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:53,613 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:53,613 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:53,613 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:53,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:53,613 INFO L82 PathProgramCache]: Analyzing trace with hash 8609018, now seen corresponding path program 11 times [2019-12-07 19:04:53,613 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:53,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962113345] [2019-12-07 19:04:53,614 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:53,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:54,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:54,179 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1962113345] [2019-12-07 19:04:54,179 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:54,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 19:04:54,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1666484630] [2019-12-07 19:04:54,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 19:04:54,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:54,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 19:04:54,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:04:54,180 INFO L87 Difference]: Start difference. First operand 11339 states and 33498 transitions. Second operand 17 states. [2019-12-07 19:04:57,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:57,978 INFO L93 Difference]: Finished difference Result 17166 states and 49748 transitions. [2019-12-07 19:04:57,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2019-12-07 19:04:57,980 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 19:04:57,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:58,009 INFO L225 Difference]: With dead ends: 17166 [2019-12-07 19:04:58,009 INFO L226 Difference]: Without dead ends: 15007 [2019-12-07 19:04:58,010 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 958 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=542, Invalid=2650, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 19:04:58,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15007 states. [2019-12-07 19:04:58,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15007 to 11435. [2019-12-07 19:04:58,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11435 states. [2019-12-07 19:04:58,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11435 states to 11435 states and 33747 transitions. [2019-12-07 19:04:58,195 INFO L78 Accepts]: Start accepts. Automaton has 11435 states and 33747 transitions. Word has length 67 [2019-12-07 19:04:58,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:58,195 INFO L462 AbstractCegarLoop]: Abstraction has 11435 states and 33747 transitions. [2019-12-07 19:04:58,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 19:04:58,195 INFO L276 IsEmpty]: Start isEmpty. Operand 11435 states and 33747 transitions. [2019-12-07 19:04:58,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:04:58,204 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:58,204 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:58,204 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:58,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:58,204 INFO L82 PathProgramCache]: Analyzing trace with hash 903902050, now seen corresponding path program 12 times [2019-12-07 19:04:58,204 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:58,204 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839688884] [2019-12-07 19:04:58,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:58,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:58,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:58,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [839688884] [2019-12-07 19:04:58,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:58,530 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 19:04:58,530 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524429498] [2019-12-07 19:04:58,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 19:04:58,530 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:58,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 19:04:58,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:04:58,531 INFO L87 Difference]: Start difference. First operand 11435 states and 33747 transitions. Second operand 17 states. [2019-12-07 19:04:59,167 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 22 [2019-12-07 19:04:59,581 WARN L192 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 24 [2019-12-07 19:05:00,562 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 23 [2019-12-07 19:05:06,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:05:06,004 INFO L93 Difference]: Finished difference Result 19357 states and 55868 transitions. [2019-12-07 19:05:06,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2019-12-07 19:05:06,004 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 19:05:06,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:05:06,018 INFO L225 Difference]: With dead ends: 19357 [2019-12-07 19:05:06,018 INFO L226 Difference]: Without dead ends: 14465 [2019-12-07 19:05:06,019 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1227 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=589, Invalid=3701, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 19:05:06,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14465 states. [2019-12-07 19:05:06,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14465 to 11439. [2019-12-07 19:05:06,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11439 states. [2019-12-07 19:05:06,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11439 states to 11439 states and 33753 transitions. [2019-12-07 19:05:06,200 INFO L78 Accepts]: Start accepts. Automaton has 11439 states and 33753 transitions. Word has length 67 [2019-12-07 19:05:06,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:05:06,200 INFO L462 AbstractCegarLoop]: Abstraction has 11439 states and 33753 transitions. [2019-12-07 19:05:06,200 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 19:05:06,200 INFO L276 IsEmpty]: Start isEmpty. Operand 11439 states and 33753 transitions. [2019-12-07 19:05:06,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:05:06,210 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:05:06,210 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:05:06,210 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:05:06,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:05:06,210 INFO L82 PathProgramCache]: Analyzing trace with hash 1164810176, now seen corresponding path program 13 times [2019-12-07 19:05:06,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:05:06,210 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141240943] [2019-12-07 19:05:06,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:05:06,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:05:06,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:05:06,325 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141240943] [2019-12-07 19:05:06,325 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:05:06,325 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:05:06,325 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786276989] [2019-12-07 19:05:06,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:05:06,326 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:05:06,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:05:06,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:05:06,326 INFO L87 Difference]: Start difference. First operand 11439 states and 33753 transitions. Second operand 11 states. [2019-12-07 19:05:07,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:05:07,420 INFO L93 Difference]: Finished difference Result 17869 states and 51985 transitions. [2019-12-07 19:05:07,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 19:05:07,421 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 19:05:07,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:05:07,443 INFO L225 Difference]: With dead ends: 17869 [2019-12-07 19:05:07,443 INFO L226 Difference]: Without dead ends: 13380 [2019-12-07 19:05:07,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 298 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=241, Invalid=1019, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 19:05:07,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13380 states. [2019-12-07 19:05:07,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13380 to 11061. [2019-12-07 19:05:07,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11061 states. [2019-12-07 19:05:07,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11061 states to 11061 states and 32674 transitions. [2019-12-07 19:05:07,619 INFO L78 Accepts]: Start accepts. Automaton has 11061 states and 32674 transitions. Word has length 67 [2019-12-07 19:05:07,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:05:07,619 INFO L462 AbstractCegarLoop]: Abstraction has 11061 states and 32674 transitions. [2019-12-07 19:05:07,619 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:05:07,619 INFO L276 IsEmpty]: Start isEmpty. Operand 11061 states and 32674 transitions. [2019-12-07 19:05:07,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:05:07,628 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:05:07,628 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:05:07,629 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:05:07,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:05:07,629 INFO L82 PathProgramCache]: Analyzing trace with hash -919262302, now seen corresponding path program 14 times [2019-12-07 19:05:07,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:05:07,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872170004] [2019-12-07 19:05:07,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:05:07,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:05:07,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:05:07,702 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 19:05:07,702 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:05:07,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t645~0.offset_19| 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t645~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t645~0.base_24|) |v_ULTIMATE.start_main_~#t645~0.offset_19| 0)) |v_#memory_int_21|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= 0 |v_#NULL.base_6|) (= (store .cse0 |v_ULTIMATE.start_main_~#t645~0.base_24| 1) |v_#valid_63|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t645~0.base_24|) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t645~0.base_24| 4)) (= v_~a$r_buff1_thd3~0_297 0) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t645~0.base_24|)) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t645~0.offset=|v_ULTIMATE.start_main_~#t645~0.offset_19|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, ULTIMATE.start_main_~#t647~0.base=|v_ULTIMATE.start_main_~#t647~0.base_27|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ULTIMATE.start_main_~#t646~0.offset=|v_ULTIMATE.start_main_~#t646~0.offset_19|, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ULTIMATE.start_main_~#t647~0.offset=|v_ULTIMATE.start_main_~#t647~0.offset_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ULTIMATE.start_main_~#t646~0.base=|v_ULTIMATE.start_main_~#t646~0.base_26|, ~x~0=v_~x~0_88, ~a$read_delayed~0=v_~a$read_delayed~0_6, ULTIMATE.start_main_~#t645~0.base=|v_ULTIMATE.start_main_~#t645~0.base_24|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ~y~0=v_~y~0_39, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t645~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t647~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ULTIMATE.start_main_~#t646~0.offset, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t647~0.offset, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t646~0.base, ~x~0, ~a$read_delayed~0, ULTIMATE.start_main_~#t645~0.base, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 19:05:07,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t646~0.base_10| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t646~0.base_10| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t646~0.base_10|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t646~0.base_10|) 0) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t646~0.base_10| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t646~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t646~0.base_10|) |v_ULTIMATE.start_main_~#t646~0.offset_9| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t646~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t646~0.offset=|v_ULTIMATE.start_main_~#t646~0.offset_9|, #length=|v_#length_17|, ULTIMATE.start_main_~#t646~0.base=|v_ULTIMATE.start_main_~#t646~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t646~0.offset, #length, ULTIMATE.start_main_~#t646~0.base] because there is no mapped edge [2019-12-07 19:05:07,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t647~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t647~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t647~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t647~0.base_13|) |v_ULTIMATE.start_main_~#t647~0.offset_11| 2)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t647~0.base_13| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t647~0.base_13|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t647~0.base_13|)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t647~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t647~0.base=|v_ULTIMATE.start_main_~#t647~0.base_13|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t647~0.offset=|v_ULTIMATE.start_main_~#t647~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t647~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t647~0.offset, #length] because there is no mapped edge [2019-12-07 19:05:07,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 19:05:07,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In1723010159 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In1723010159 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In1723010159 |P1Thread1of1ForFork2_#t~ite9_Out1723010159|) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1723010159| ~a~0_In1723010159) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In1723010159, ~a$w_buff1~0=~a$w_buff1~0_In1723010159, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1723010159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1723010159} OutVars{~a~0=~a~0_In1723010159, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1723010159|, ~a$w_buff1~0=~a$w_buff1~0_In1723010159, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1723010159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1723010159} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 19:05:07,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1812785205 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1812785205 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out1812785205| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In1812785205 |P0Thread1of1ForFork1_#t~ite5_Out1812785205|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1812785205, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1812785205} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1812785205|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1812785205, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1812785205} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:05:07,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1463141438 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-1463141438 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In-1463141438 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1463141438 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1463141438| ~a$w_buff1_used~0_In-1463141438) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1463141438| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1463141438, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1463141438, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1463141438, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1463141438} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1463141438|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1463141438, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1463141438, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1463141438, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1463141438} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:05:07,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-1766244926 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_In-1766244926 ~a$r_buff0_thd1~0_Out-1766244926)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1766244926 256)))) (or (and (not .cse0) (= 0 ~a$r_buff0_thd1~0_Out-1766244926) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1766244926, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1766244926} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1766244926|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1766244926, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1766244926} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:05:07,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In1658609246 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1658609246 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1658609246 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1658609246 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1658609246| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1658609246| ~a$r_buff1_thd1~0_In1658609246) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1658609246, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1658609246, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1658609246, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1658609246} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1658609246|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1658609246, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1658609246, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1658609246, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1658609246} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:05:07,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:05:07,709 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-671787214 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_In-671787214| |P2Thread1of1ForFork0_#t~ite20_Out-671787214|) (= |P2Thread1of1ForFork0_#t~ite21_Out-671787214| ~a$w_buff0~0_In-671787214) (not .cse0)) (and (= ~a$w_buff0~0_In-671787214 |P2Thread1of1ForFork0_#t~ite20_Out-671787214|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-671787214 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-671787214 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-671787214 256) 0)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-671787214 256))))) (= |P2Thread1of1ForFork0_#t~ite21_Out-671787214| |P2Thread1of1ForFork0_#t~ite20_Out-671787214|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-671787214, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-671787214, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-671787214, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-671787214, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-671787214, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-671787214|, ~weak$$choice2~0=~weak$$choice2~0_In-671787214} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-671787214|, ~a$w_buff0~0=~a$w_buff0~0_In-671787214, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-671787214, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-671787214, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-671787214, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-671787214|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-671787214, ~weak$$choice2~0=~weak$$choice2~0_In-671787214} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 19:05:07,710 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In2114761290 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out2114761290| ~a$w_buff0_used~0_In2114761290) (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In2114761290 256)))) (or (= (mod ~a$w_buff0_used~0_In2114761290 256) 0) (and .cse0 (= 0 (mod ~a$w_buff1_used~0_In2114761290 256))) (and .cse0 (= (mod ~a$r_buff1_thd3~0_In2114761290 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite26_Out2114761290| |P2Thread1of1ForFork0_#t~ite27_Out2114761290|) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite27_Out2114761290| ~a$w_buff0_used~0_In2114761290) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In2114761290| |P2Thread1of1ForFork0_#t~ite26_Out2114761290|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In2114761290|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2114761290, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2114761290, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2114761290, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2114761290, ~weak$$choice2~0=~weak$$choice2~0_In2114761290} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out2114761290|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out2114761290|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2114761290, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2114761290, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2114761290, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2114761290, ~weak$$choice2~0=~weak$$choice2~0_In2114761290} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 19:05:07,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1428107490 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_In1428107490| |P2Thread1of1ForFork0_#t~ite29_Out1428107490|) (not .cse0) (= ~a$w_buff1_used~0_In1428107490 |P2Thread1of1ForFork0_#t~ite30_Out1428107490|)) (and (= |P2Thread1of1ForFork0_#t~ite29_Out1428107490| |P2Thread1of1ForFork0_#t~ite30_Out1428107490|) .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out1428107490| ~a$w_buff1_used~0_In1428107490) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1428107490 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1428107490 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In1428107490 256) 0)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1428107490 256) 0))))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1428107490, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1428107490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1428107490, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1428107490, ~weak$$choice2~0=~weak$$choice2~0_In1428107490, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1428107490|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1428107490, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1428107490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1428107490, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1428107490|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1428107490, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1428107490|, ~weak$$choice2~0=~weak$$choice2~0_In1428107490} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:05:07,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:05:07,711 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:05:07,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1332291971 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1332291971 256)))) (or (and (= ~a$w_buff0_used~0_In-1332291971 |P1Thread1of1ForFork2_#t~ite11_Out-1332291971|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1332291971|) (not .cse0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1332291971, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1332291971} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1332291971, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1332291971, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1332291971|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:05:07,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1925847367 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1925847367 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1925847367 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1925847367 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1925847367| 0)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1925847367| ~a$w_buff1_used~0_In-1925847367) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1925847367, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1925847367, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1925847367, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1925847367} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1925847367, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1925847367, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1925847367, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1925847367|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1925847367} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:05:07,712 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In139527943 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In139527943 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out139527943| ~a$r_buff0_thd2~0_In139527943)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out139527943| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In139527943, ~a$w_buff0_used~0=~a$w_buff0_used~0_In139527943} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In139527943, ~a$w_buff0_used~0=~a$w_buff0_used~0_In139527943, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out139527943|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:05:07,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-1998862099 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1998862099 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1998862099 256))) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-1998862099 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-1998862099| ~a$r_buff1_thd2~0_In-1998862099) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1998862099|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1998862099, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1998862099, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1998862099, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1998862099} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1998862099, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1998862099, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1998862099, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1998862099, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1998862099|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:05:07,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:05:07,713 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 19:05:07,714 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1899385569| |P2Thread1of1ForFork0_#t~ite39_Out1899385569|)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1899385569 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1899385569 256)))) (or (and (or .cse0 .cse1) .cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1899385569| ~a~0_In1899385569)) (and .cse2 (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1899385569| ~a$w_buff1~0_In1899385569)))) InVars {~a~0=~a~0_In1899385569, ~a$w_buff1~0=~a$w_buff1~0_In1899385569, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1899385569, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1899385569} OutVars{~a~0=~a~0_In1899385569, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1899385569|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1899385569|, ~a$w_buff1~0=~a$w_buff1~0_In1899385569, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1899385569, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1899385569} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:05:07,714 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1824585213 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1824585213 256)))) (or (and (= ~a$w_buff0_used~0_In1824585213 |P2Thread1of1ForFork0_#t~ite40_Out1824585213|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1824585213| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1824585213, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1824585213} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1824585213|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1824585213, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1824585213} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:05:07,714 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In976259507 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In976259507 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In976259507 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In976259507 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out976259507| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out976259507| ~a$w_buff1_used~0_In976259507)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In976259507, ~a$w_buff0_used~0=~a$w_buff0_used~0_In976259507, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In976259507, ~a$w_buff1_used~0=~a$w_buff1_used~0_In976259507} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In976259507, ~a$w_buff0_used~0=~a$w_buff0_used~0_In976259507, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In976259507, ~a$w_buff1_used~0=~a$w_buff1_used~0_In976259507, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out976259507|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:05:07,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In347573926 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In347573926 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd3~0_In347573926 |P2Thread1of1ForFork0_#t~ite42_Out347573926|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out347573926|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In347573926, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In347573926} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In347573926, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In347573926, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out347573926|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:05:07,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In1887932965 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1887932965 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1887932965 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1887932965 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out1887932965| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd3~0_In1887932965 |P2Thread1of1ForFork0_#t~ite43_Out1887932965|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1887932965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1887932965, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1887932965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1887932965} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1887932965|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1887932965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1887932965, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1887932965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1887932965} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:05:07,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:05:07,715 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:05:07,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out769446604| |ULTIMATE.start_main_#t~ite47_Out769446604|)) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In769446604 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In769446604 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out769446604| ~a$w_buff1~0_In769446604) .cse1 (not .cse2)) (and .cse1 (= |ULTIMATE.start_main_#t~ite47_Out769446604| ~a~0_In769446604) (or .cse2 .cse0)))) InVars {~a~0=~a~0_In769446604, ~a$w_buff1~0=~a$w_buff1~0_In769446604, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In769446604, ~a$w_buff1_used~0=~a$w_buff1_used~0_In769446604} OutVars{~a~0=~a~0_In769446604, ~a$w_buff1~0=~a$w_buff1~0_In769446604, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out769446604|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In769446604, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out769446604|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In769446604} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:05:07,716 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1050417585 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In1050417585 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1050417585| ~a$w_buff0_used~0_In1050417585) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out1050417585| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1050417585, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1050417585} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1050417585, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1050417585|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1050417585} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:05:07,717 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In924026070 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In924026070 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In924026070 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In924026070 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In924026070 |ULTIMATE.start_main_#t~ite50_Out924026070|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite50_Out924026070|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In924026070, ~a$w_buff0_used~0=~a$w_buff0_used~0_In924026070, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In924026070, ~a$w_buff1_used~0=~a$w_buff1_used~0_In924026070} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out924026070|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In924026070, ~a$w_buff0_used~0=~a$w_buff0_used~0_In924026070, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In924026070, ~a$w_buff1_used~0=~a$w_buff1_used~0_In924026070} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:05:07,717 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In777577301 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In777577301 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out777577301| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out777577301| ~a$r_buff0_thd0~0_In777577301)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In777577301, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In777577301} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out777577301|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In777577301, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In777577301} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:05:07,717 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1319310668 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In1319310668 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1319310668 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In1319310668 256) 0))) (or (and (= ~a$r_buff1_thd0~0_In1319310668 |ULTIMATE.start_main_#t~ite52_Out1319310668|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1319310668|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1319310668, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1319310668, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1319310668, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1319310668} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1319310668|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1319310668, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1319310668, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1319310668, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1319310668} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:05:07,718 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:05:07,769 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:05:07 BasicIcfg [2019-12-07 19:05:07,769 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:05:07,769 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:05:07,769 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:05:07,770 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:05:07,770 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:10" (3/4) ... [2019-12-07 19:05:07,771 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:05:07,772 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t645~0.offset_19| 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t645~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t645~0.base_24|) |v_ULTIMATE.start_main_~#t645~0.offset_19| 0)) |v_#memory_int_21|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= 0 |v_#NULL.base_6|) (= (store .cse0 |v_ULTIMATE.start_main_~#t645~0.base_24| 1) |v_#valid_63|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t645~0.base_24|) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t645~0.base_24| 4)) (= v_~a$r_buff1_thd3~0_297 0) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t645~0.base_24|)) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t645~0.offset=|v_ULTIMATE.start_main_~#t645~0.offset_19|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, ULTIMATE.start_main_~#t647~0.base=|v_ULTIMATE.start_main_~#t647~0.base_27|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ULTIMATE.start_main_~#t646~0.offset=|v_ULTIMATE.start_main_~#t646~0.offset_19|, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ULTIMATE.start_main_~#t647~0.offset=|v_ULTIMATE.start_main_~#t647~0.offset_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ULTIMATE.start_main_~#t646~0.base=|v_ULTIMATE.start_main_~#t646~0.base_26|, ~x~0=v_~x~0_88, ~a$read_delayed~0=v_~a$read_delayed~0_6, ULTIMATE.start_main_~#t645~0.base=|v_ULTIMATE.start_main_~#t645~0.base_24|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ~y~0=v_~y~0_39, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t645~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t647~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ULTIMATE.start_main_~#t646~0.offset, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t647~0.offset, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t646~0.base, ~x~0, ~a$read_delayed~0, ULTIMATE.start_main_~#t645~0.base, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 19:05:07,772 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t646~0.base_10| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t646~0.base_10| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t646~0.base_10|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t646~0.base_10|) 0) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t646~0.base_10| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t646~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t646~0.base_10|) |v_ULTIMATE.start_main_~#t646~0.offset_9| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t646~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t646~0.offset=|v_ULTIMATE.start_main_~#t646~0.offset_9|, #length=|v_#length_17|, ULTIMATE.start_main_~#t646~0.base=|v_ULTIMATE.start_main_~#t646~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t646~0.offset, #length, ULTIMATE.start_main_~#t646~0.base] because there is no mapped edge [2019-12-07 19:05:07,772 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t647~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t647~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t647~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t647~0.base_13|) |v_ULTIMATE.start_main_~#t647~0.offset_11| 2)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t647~0.base_13| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t647~0.base_13|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t647~0.base_13|)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t647~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t647~0.base=|v_ULTIMATE.start_main_~#t647~0.base_13|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t647~0.offset=|v_ULTIMATE.start_main_~#t647~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t647~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t647~0.offset, #length] because there is no mapped edge [2019-12-07 19:05:07,773 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 19:05:07,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In1723010159 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In1723010159 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In1723010159 |P1Thread1of1ForFork2_#t~ite9_Out1723010159|) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1723010159| ~a~0_In1723010159) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In1723010159, ~a$w_buff1~0=~a$w_buff1~0_In1723010159, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1723010159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1723010159} OutVars{~a~0=~a~0_In1723010159, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1723010159|, ~a$w_buff1~0=~a$w_buff1~0_In1723010159, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1723010159, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1723010159} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 19:05:07,774 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1812785205 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1812785205 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out1812785205| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In1812785205 |P0Thread1of1ForFork1_#t~ite5_Out1812785205|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1812785205, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1812785205} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1812785205|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1812785205, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1812785205} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:05:07,775 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1463141438 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-1463141438 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In-1463141438 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1463141438 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1463141438| ~a$w_buff1_used~0_In-1463141438) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1463141438| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1463141438, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1463141438, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1463141438, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1463141438} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1463141438|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1463141438, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1463141438, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1463141438, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1463141438} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:05:07,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-1766244926 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_In-1766244926 ~a$r_buff0_thd1~0_Out-1766244926)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1766244926 256)))) (or (and (not .cse0) (= 0 ~a$r_buff0_thd1~0_Out-1766244926) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1766244926, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1766244926} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1766244926|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1766244926, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1766244926} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:05:07,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In1658609246 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1658609246 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1658609246 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1658609246 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1658609246| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1658609246| ~a$r_buff1_thd1~0_In1658609246) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1658609246, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1658609246, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1658609246, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1658609246} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1658609246|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1658609246, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1658609246, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1658609246, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1658609246} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:05:07,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:05:07,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-671787214 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_In-671787214| |P2Thread1of1ForFork0_#t~ite20_Out-671787214|) (= |P2Thread1of1ForFork0_#t~ite21_Out-671787214| ~a$w_buff0~0_In-671787214) (not .cse0)) (and (= ~a$w_buff0~0_In-671787214 |P2Thread1of1ForFork0_#t~ite20_Out-671787214|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-671787214 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-671787214 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-671787214 256) 0)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-671787214 256))))) (= |P2Thread1of1ForFork0_#t~ite21_Out-671787214| |P2Thread1of1ForFork0_#t~ite20_Out-671787214|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-671787214, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-671787214, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-671787214, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-671787214, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-671787214, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-671787214|, ~weak$$choice2~0=~weak$$choice2~0_In-671787214} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-671787214|, ~a$w_buff0~0=~a$w_buff0~0_In-671787214, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-671787214, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-671787214, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-671787214, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-671787214|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-671787214, ~weak$$choice2~0=~weak$$choice2~0_In-671787214} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 19:05:07,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In2114761290 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out2114761290| ~a$w_buff0_used~0_In2114761290) (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In2114761290 256)))) (or (= (mod ~a$w_buff0_used~0_In2114761290 256) 0) (and .cse0 (= 0 (mod ~a$w_buff1_used~0_In2114761290 256))) (and .cse0 (= (mod ~a$r_buff1_thd3~0_In2114761290 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite26_Out2114761290| |P2Thread1of1ForFork0_#t~ite27_Out2114761290|) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite27_Out2114761290| ~a$w_buff0_used~0_In2114761290) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In2114761290| |P2Thread1of1ForFork0_#t~ite26_Out2114761290|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In2114761290|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2114761290, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2114761290, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2114761290, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2114761290, ~weak$$choice2~0=~weak$$choice2~0_In2114761290} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out2114761290|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out2114761290|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2114761290, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2114761290, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2114761290, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2114761290, ~weak$$choice2~0=~weak$$choice2~0_In2114761290} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 19:05:07,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1428107490 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_In1428107490| |P2Thread1of1ForFork0_#t~ite29_Out1428107490|) (not .cse0) (= ~a$w_buff1_used~0_In1428107490 |P2Thread1of1ForFork0_#t~ite30_Out1428107490|)) (and (= |P2Thread1of1ForFork0_#t~ite29_Out1428107490| |P2Thread1of1ForFork0_#t~ite30_Out1428107490|) .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out1428107490| ~a$w_buff1_used~0_In1428107490) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1428107490 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In1428107490 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In1428107490 256) 0)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1428107490 256) 0))))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1428107490, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1428107490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1428107490, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1428107490, ~weak$$choice2~0=~weak$$choice2~0_In1428107490, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1428107490|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1428107490, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1428107490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1428107490, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1428107490|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1428107490, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1428107490|, ~weak$$choice2~0=~weak$$choice2~0_In1428107490} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:05:07,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:05:07,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:05:07,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1332291971 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1332291971 256)))) (or (and (= ~a$w_buff0_used~0_In-1332291971 |P1Thread1of1ForFork2_#t~ite11_Out-1332291971|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1332291971|) (not .cse0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1332291971, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1332291971} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1332291971, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1332291971, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1332291971|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:05:07,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1925847367 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1925847367 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1925847367 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1925847367 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1925847367| 0)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1925847367| ~a$w_buff1_used~0_In-1925847367) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1925847367, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1925847367, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1925847367, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1925847367} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1925847367, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1925847367, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1925847367, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1925847367|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1925847367} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:05:07,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In139527943 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In139527943 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out139527943| ~a$r_buff0_thd2~0_In139527943)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out139527943| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In139527943, ~a$w_buff0_used~0=~a$w_buff0_used~0_In139527943} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In139527943, ~a$w_buff0_used~0=~a$w_buff0_used~0_In139527943, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out139527943|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:05:07,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-1998862099 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1998862099 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1998862099 256))) (.cse3 (= (mod ~a$r_buff0_thd2~0_In-1998862099 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-1998862099| ~a$r_buff1_thd2~0_In-1998862099) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1998862099|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1998862099, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1998862099, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1998862099, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1998862099} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1998862099, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1998862099, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1998862099, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1998862099, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1998862099|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:05:07,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:05:07,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 19:05:07,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1899385569| |P2Thread1of1ForFork0_#t~ite39_Out1899385569|)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1899385569 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1899385569 256)))) (or (and (or .cse0 .cse1) .cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out1899385569| ~a~0_In1899385569)) (and .cse2 (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1899385569| ~a$w_buff1~0_In1899385569)))) InVars {~a~0=~a~0_In1899385569, ~a$w_buff1~0=~a$w_buff1~0_In1899385569, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1899385569, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1899385569} OutVars{~a~0=~a~0_In1899385569, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1899385569|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1899385569|, ~a$w_buff1~0=~a$w_buff1~0_In1899385569, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1899385569, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1899385569} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:05:07,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1824585213 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1824585213 256)))) (or (and (= ~a$w_buff0_used~0_In1824585213 |P2Thread1of1ForFork0_#t~ite40_Out1824585213|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1824585213| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1824585213, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1824585213} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1824585213|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1824585213, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1824585213} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:05:07,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In976259507 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In976259507 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In976259507 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In976259507 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out976259507| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out976259507| ~a$w_buff1_used~0_In976259507)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In976259507, ~a$w_buff0_used~0=~a$w_buff0_used~0_In976259507, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In976259507, ~a$w_buff1_used~0=~a$w_buff1_used~0_In976259507} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In976259507, ~a$w_buff0_used~0=~a$w_buff0_used~0_In976259507, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In976259507, ~a$w_buff1_used~0=~a$w_buff1_used~0_In976259507, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out976259507|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:05:07,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In347573926 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In347573926 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd3~0_In347573926 |P2Thread1of1ForFork0_#t~ite42_Out347573926|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out347573926|) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In347573926, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In347573926} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In347573926, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In347573926, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out347573926|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:05:07,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In1887932965 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1887932965 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1887932965 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1887932965 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out1887932965| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd3~0_In1887932965 |P2Thread1of1ForFork0_#t~ite43_Out1887932965|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1887932965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1887932965, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1887932965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1887932965} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1887932965|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1887932965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1887932965, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1887932965, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1887932965} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:05:07,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:05:07,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:05:07,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out769446604| |ULTIMATE.start_main_#t~ite47_Out769446604|)) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In769446604 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In769446604 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out769446604| ~a$w_buff1~0_In769446604) .cse1 (not .cse2)) (and .cse1 (= |ULTIMATE.start_main_#t~ite47_Out769446604| ~a~0_In769446604) (or .cse2 .cse0)))) InVars {~a~0=~a~0_In769446604, ~a$w_buff1~0=~a$w_buff1~0_In769446604, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In769446604, ~a$w_buff1_used~0=~a$w_buff1_used~0_In769446604} OutVars{~a~0=~a~0_In769446604, ~a$w_buff1~0=~a$w_buff1~0_In769446604, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out769446604|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In769446604, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out769446604|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In769446604} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:05:07,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1050417585 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In1050417585 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1050417585| ~a$w_buff0_used~0_In1050417585) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out1050417585| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1050417585, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1050417585} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1050417585, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1050417585|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1050417585} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:05:07,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In924026070 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In924026070 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In924026070 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In924026070 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In924026070 |ULTIMATE.start_main_#t~ite50_Out924026070|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite50_Out924026070|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In924026070, ~a$w_buff0_used~0=~a$w_buff0_used~0_In924026070, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In924026070, ~a$w_buff1_used~0=~a$w_buff1_used~0_In924026070} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out924026070|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In924026070, ~a$w_buff0_used~0=~a$w_buff0_used~0_In924026070, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In924026070, ~a$w_buff1_used~0=~a$w_buff1_used~0_In924026070} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:05:07,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In777577301 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In777577301 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out777577301| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out777577301| ~a$r_buff0_thd0~0_In777577301)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In777577301, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In777577301} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out777577301|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In777577301, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In777577301} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:05:07,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1319310668 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In1319310668 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1319310668 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In1319310668 256) 0))) (or (and (= ~a$r_buff1_thd0~0_In1319310668 |ULTIMATE.start_main_#t~ite52_Out1319310668|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1319310668|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1319310668, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1319310668, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1319310668, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1319310668} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1319310668|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1319310668, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1319310668, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1319310668, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1319310668} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:05:07,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:05:07,835 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c878b751-8271-4a9a-a82d-befd7091eef5/bin/uautomizer/witness.graphml [2019-12-07 19:05:07,835 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:05:07,836 INFO L168 Benchmark]: Toolchain (without parser) took 238077.91 ms. Allocated memory was 1.0 GB in the beginning and 7.6 GB in the end (delta: 6.6 GB). Free memory was 939.4 MB in the beginning and 6.7 GB in the end (delta: -5.7 GB). Peak memory consumption was 841.1 MB. Max. memory is 11.5 GB. [2019-12-07 19:05:07,837 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:05:07,837 INFO L168 Benchmark]: CACSL2BoogieTranslator took 383.76 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -122.3 MB). Peak memory consumption was 24.0 MB. Max. memory is 11.5 GB. [2019-12-07 19:05:07,837 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:05:07,837 INFO L168 Benchmark]: Boogie Preprocessor took 25.65 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:05:07,837 INFO L168 Benchmark]: RCFGBuilder took 416.45 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. [2019-12-07 19:05:07,838 INFO L168 Benchmark]: TraceAbstraction took 237141.87 ms. Allocated memory was 1.1 GB in the beginning and 7.6 GB in the end (delta: 6.5 GB). Free memory was 996.3 MB in the beginning and 6.7 GB in the end (delta: -5.7 GB). Peak memory consumption was 791.2 MB. Max. memory is 11.5 GB. [2019-12-07 19:05:07,838 INFO L168 Benchmark]: Witness Printer took 66.08 ms. Allocated memory is still 7.6 GB. Free memory was 6.7 GB in the beginning and 6.7 GB in the end (delta: 11.4 MB). Peak memory consumption was 11.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:05:07,839 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 383.76 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -122.3 MB). Peak memory consumption was 24.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.48 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.65 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 416.45 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 237141.87 ms. Allocated memory was 1.1 GB in the beginning and 7.6 GB in the end (delta: 6.5 GB). Free memory was 996.3 MB in the beginning and 6.7 GB in the end (delta: -5.7 GB). Peak memory consumption was 791.2 MB. Max. memory is 11.5 GB. * Witness Printer took 66.08 ms. Allocated memory is still 7.6 GB. Free memory was 6.7 GB in the beginning and 6.7 GB in the end (delta: 11.4 MB). Peak memory consumption was 11.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 178 ProgramPointsBefore, 93 ProgramPointsAfterwards, 215 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7050 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 63 SemBasedMoverChecksPositive, 249 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78858 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t645, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t646, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t647, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L740] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L741] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L742] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L743] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L744] 1 a$r_buff0_thd1 = (_Bool)1 [L747] 1 x = 1 [L750] 1 __unbuffered_p0_EAX = x [L753] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L756] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L770] 2 y = 1 [L773] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L756] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L757] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L790] 3 z = 2 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L758] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=2] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=2] [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L845] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L845] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 236.9s, OverallIterations: 38, TraceHistogramMax: 1, AutomataDifference: 74.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8175 SDtfs, 15900 SDslu, 30016 SDs, 0 SdLazy, 25445 SolverSat, 1129 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 23.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 830 GetRequests, 100 SyntacticMatches, 21 SemanticMatches, 709 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15438 ImplicationChecksByTransitivity, 18.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=328151occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 139.4s AutomataMinimizationTime, 37 MinimizatonAttempts, 674393 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.2s InterpolantComputationTime, 1798 NumberOfCodeBlocks, 1798 NumberOfCodeBlocksAsserted, 38 NumberOfCheckSat, 1694 ConstructedInterpolants, 0 QuantifiedInterpolants, 711289 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 37 InterpolantComputations, 37 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...