./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1df5b9daca995b7565ccba46f069a4626aa6916b ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:17:41,690 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:17:41,691 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:17:41,698 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:17:41,699 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:17:41,699 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:17:41,700 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:17:41,702 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:17:41,703 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:17:41,703 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:17:41,704 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:17:41,705 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:17:41,705 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:17:41,706 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:17:41,706 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:17:41,707 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:17:41,708 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:17:41,708 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:17:41,710 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:17:41,711 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:17:41,712 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:17:41,713 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:17:41,714 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:17:41,714 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:17:41,716 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:17:41,716 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:17:41,716 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:17:41,717 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:17:41,717 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:17:41,717 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:17:41,718 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:17:41,718 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:17:41,718 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:17:41,719 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:17:41,719 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:17:41,720 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:17:41,720 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:17:41,720 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:17:41,720 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:17:41,721 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:17:41,721 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:17:41,722 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:17:41,730 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:17:41,731 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:17:41,731 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:17:41,732 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:17:41,732 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:17:41,732 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:17:41,732 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:17:41,732 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:17:41,732 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:17:41,732 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:17:41,732 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:17:41,733 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:17:41,733 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:17:41,733 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:17:41,733 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:17:41,733 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:17:41,733 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:17:41,733 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:17:41,733 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:17:41,734 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:17:41,734 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:17:41,734 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:17:41,734 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:17:41,734 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:17:41,734 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:17:41,734 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:17:41,734 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:17:41,735 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:17:41,735 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:17:41,735 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1df5b9daca995b7565ccba46f069a4626aa6916b [2019-12-07 10:17:41,840 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:17:41,850 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:17:41,853 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:17:41,854 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:17:41,855 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:17:41,855 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix024_rmo.opt.i [2019-12-07 10:17:41,893 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/data/8d4296799/309bedf687384358913b46e3e452c257/FLAGb3543e74a [2019-12-07 10:17:42,378 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:17:42,379 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/sv-benchmarks/c/pthread-wmm/mix024_rmo.opt.i [2019-12-07 10:17:42,390 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/data/8d4296799/309bedf687384358913b46e3e452c257/FLAGb3543e74a [2019-12-07 10:17:42,400 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/data/8d4296799/309bedf687384358913b46e3e452c257 [2019-12-07 10:17:42,402 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:17:42,403 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:17:42,403 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:17:42,403 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:17:42,406 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:17:42,406 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,408 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@232ca86d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42, skipping insertion in model container [2019-12-07 10:17:42,408 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,413 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:17:42,443 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:17:42,737 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:17:42,744 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:17:42,783 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:17:42,827 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:17:42,828 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42 WrapperNode [2019-12-07 10:17:42,828 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:17:42,828 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:17:42,829 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:17:42,829 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:17:42,834 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,846 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,865 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:17:42,865 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:17:42,865 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:17:42,865 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:17:42,871 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,871 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,874 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,875 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,881 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,884 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,886 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... [2019-12-07 10:17:42,888 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:17:42,889 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:17:42,889 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:17:42,889 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:17:42,889 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:17:42,929 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:17:42,929 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:17:42,929 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:17:42,929 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:17:42,929 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:17:42,929 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:17:42,929 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:17:42,930 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:17:42,930 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:17:42,930 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:17:42,930 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:17:42,930 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:17:42,930 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:17:42,931 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:17:43,281 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:17:43,281 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:17:43,282 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:17:43 BoogieIcfgContainer [2019-12-07 10:17:43,282 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:17:43,282 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:17:43,282 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:17:43,284 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:17:43,284 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:17:42" (1/3) ... [2019-12-07 10:17:43,285 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b041f2b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:17:43, skipping insertion in model container [2019-12-07 10:17:43,285 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:17:42" (2/3) ... [2019-12-07 10:17:43,285 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b041f2b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:17:43, skipping insertion in model container [2019-12-07 10:17:43,285 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:17:43" (3/3) ... [2019-12-07 10:17:43,286 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_rmo.opt.i [2019-12-07 10:17:43,292 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:17:43,292 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:17:43,297 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:17:43,298 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:17:43,323 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,324 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,324 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,324 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,324 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,324 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,324 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,324 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,325 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,325 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,325 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,325 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,325 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,325 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,326 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,326 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,326 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,326 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,326 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,326 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,326 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,326 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,327 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,327 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,327 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,327 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,327 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,327 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,327 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,328 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,328 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,328 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,328 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,328 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,328 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,333 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,333 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,333 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,333 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,333 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,333 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,333 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,334 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,335 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,335 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,335 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,335 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,335 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,335 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,335 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,336 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,336 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,336 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,336 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,336 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,336 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,337 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,337 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,337 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,337 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,338 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,338 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,338 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,338 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,338 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,339 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,340 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,341 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,342 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,342 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,342 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,342 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,342 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,342 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,342 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,342 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,343 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,344 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,345 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,345 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,345 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:17:43,358 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:17:43,370 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:17:43,371 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:17:43,371 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:17:43,371 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:17:43,371 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:17:43,371 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:17:43,371 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:17:43,371 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:17:43,384 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 166 places, 197 transitions [2019-12-07 10:17:43,385 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 166 places, 197 transitions [2019-12-07 10:17:43,446 INFO L134 PetriNetUnfolder]: 41/194 cut-off events. [2019-12-07 10:17:43,446 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:17:43,458 INFO L76 FinitePrefix]: Finished finitePrefix Result has 204 conditions, 194 events. 41/194 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 709 event pairs. 9/160 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 10:17:43,473 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 166 places, 197 transitions [2019-12-07 10:17:43,507 INFO L134 PetriNetUnfolder]: 41/194 cut-off events. [2019-12-07 10:17:43,507 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:17:43,514 INFO L76 FinitePrefix]: Finished finitePrefix Result has 204 conditions, 194 events. 41/194 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 709 event pairs. 9/160 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 10:17:43,528 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 10:17:43,529 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:17:46,493 WARN L192 SmtUtils]: Spent 204.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 48 [2019-12-07 10:17:46,873 WARN L192 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 10:17:46,961 INFO L206 etLargeBlockEncoding]: Checked pairs total: 74173 [2019-12-07 10:17:46,961 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 10:17:46,964 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 90 transitions [2019-12-07 10:17:55,293 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 82802 states. [2019-12-07 10:17:55,295 INFO L276 IsEmpty]: Start isEmpty. Operand 82802 states. [2019-12-07 10:17:55,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 10:17:55,299 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:55,299 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 10:17:55,299 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:55,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:55,303 INFO L82 PathProgramCache]: Analyzing trace with hash 803939489, now seen corresponding path program 1 times [2019-12-07 10:17:55,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:17:55,309 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676559171] [2019-12-07 10:17:55,309 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:55,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:55,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:55,447 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676559171] [2019-12-07 10:17:55,448 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:55,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:17:55,449 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777259479] [2019-12-07 10:17:55,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:17:55,452 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:17:55,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:17:55,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:17:55,462 INFO L87 Difference]: Start difference. First operand 82802 states. Second operand 3 states. [2019-12-07 10:17:56,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:56,014 INFO L93 Difference]: Finished difference Result 81762 states and 350164 transitions. [2019-12-07 10:17:56,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:17:56,016 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 10:17:56,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:56,331 INFO L225 Difference]: With dead ends: 81762 [2019-12-07 10:17:56,331 INFO L226 Difference]: Without dead ends: 77082 [2019-12-07 10:17:56,332 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:17:59,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77082 states. [2019-12-07 10:18:00,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77082 to 77082. [2019-12-07 10:18:00,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77082 states. [2019-12-07 10:18:00,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77082 states to 77082 states and 329650 transitions. [2019-12-07 10:18:00,686 INFO L78 Accepts]: Start accepts. Automaton has 77082 states and 329650 transitions. Word has length 5 [2019-12-07 10:18:00,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:00,686 INFO L462 AbstractCegarLoop]: Abstraction has 77082 states and 329650 transitions. [2019-12-07 10:18:00,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:18:00,686 INFO L276 IsEmpty]: Start isEmpty. Operand 77082 states and 329650 transitions. [2019-12-07 10:18:00,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:18:00,693 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:00,693 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:00,693 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:00,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:00,693 INFO L82 PathProgramCache]: Analyzing trace with hash -1596901179, now seen corresponding path program 1 times [2019-12-07 10:18:00,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:00,694 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467304545] [2019-12-07 10:18:00,694 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:00,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:00,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:00,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467304545] [2019-12-07 10:18:00,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:00,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:18:00,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [188968478] [2019-12-07 10:18:00,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:18:00,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:00,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:18:00,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:00,746 INFO L87 Difference]: Start difference. First operand 77082 states and 329650 transitions. Second operand 3 states. [2019-12-07 10:18:00,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:00,860 INFO L93 Difference]: Finished difference Result 20478 states and 70372 transitions. [2019-12-07 10:18:00,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:18:00,861 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 10:18:00,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:00,898 INFO L225 Difference]: With dead ends: 20478 [2019-12-07 10:18:00,898 INFO L226 Difference]: Without dead ends: 20478 [2019-12-07 10:18:00,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:01,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20478 states. [2019-12-07 10:18:01,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20478 to 20478. [2019-12-07 10:18:01,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20478 states. [2019-12-07 10:18:01,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20478 states to 20478 states and 70372 transitions. [2019-12-07 10:18:01,256 INFO L78 Accepts]: Start accepts. Automaton has 20478 states and 70372 transitions. Word has length 13 [2019-12-07 10:18:01,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:01,256 INFO L462 AbstractCegarLoop]: Abstraction has 20478 states and 70372 transitions. [2019-12-07 10:18:01,256 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:18:01,256 INFO L276 IsEmpty]: Start isEmpty. Operand 20478 states and 70372 transitions. [2019-12-07 10:18:01,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:18:01,257 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:01,258 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:01,258 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:01,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:01,258 INFO L82 PathProgramCache]: Analyzing trace with hash -1662041210, now seen corresponding path program 1 times [2019-12-07 10:18:01,258 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:01,258 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236132482] [2019-12-07 10:18:01,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:01,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:01,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:01,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [236132482] [2019-12-07 10:18:01,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:01,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:18:01,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425265618] [2019-12-07 10:18:01,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:18:01,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:01,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:18:01,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:18:01,306 INFO L87 Difference]: Start difference. First operand 20478 states and 70372 transitions. Second operand 4 states. [2019-12-07 10:18:01,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:01,544 INFO L93 Difference]: Finished difference Result 30802 states and 102312 transitions. [2019-12-07 10:18:01,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:18:01,544 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:18:01,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:01,601 INFO L225 Difference]: With dead ends: 30802 [2019-12-07 10:18:01,602 INFO L226 Difference]: Without dead ends: 30788 [2019-12-07 10:18:01,602 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:02,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30788 states. [2019-12-07 10:18:02,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30788 to 27348. [2019-12-07 10:18:02,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27348 states. [2019-12-07 10:18:03,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27348 states to 27348 states and 91824 transitions. [2019-12-07 10:18:03,001 INFO L78 Accepts]: Start accepts. Automaton has 27348 states and 91824 transitions. Word has length 13 [2019-12-07 10:18:03,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:03,001 INFO L462 AbstractCegarLoop]: Abstraction has 27348 states and 91824 transitions. [2019-12-07 10:18:03,001 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:18:03,001 INFO L276 IsEmpty]: Start isEmpty. Operand 27348 states and 91824 transitions. [2019-12-07 10:18:03,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 10:18:03,003 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:03,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:03,003 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:03,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:03,003 INFO L82 PathProgramCache]: Analyzing trace with hash -1480512145, now seen corresponding path program 1 times [2019-12-07 10:18:03,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:03,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070260490] [2019-12-07 10:18:03,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:03,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:03,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:03,056 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1070260490] [2019-12-07 10:18:03,056 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:03,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:18:03,057 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079067402] [2019-12-07 10:18:03,057 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:18:03,057 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:03,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:18:03,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:18:03,058 INFO L87 Difference]: Start difference. First operand 27348 states and 91824 transitions. Second operand 4 states. [2019-12-07 10:18:03,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:03,312 INFO L93 Difference]: Finished difference Result 35523 states and 117963 transitions. [2019-12-07 10:18:03,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:18:03,312 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 10:18:03,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:03,371 INFO L225 Difference]: With dead ends: 35523 [2019-12-07 10:18:03,371 INFO L226 Difference]: Without dead ends: 35512 [2019-12-07 10:18:03,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:03,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35512 states. [2019-12-07 10:18:03,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35512 to 30900. [2019-12-07 10:18:03,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30900 states. [2019-12-07 10:18:03,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30900 states to 30900 states and 103384 transitions. [2019-12-07 10:18:03,945 INFO L78 Accepts]: Start accepts. Automaton has 30900 states and 103384 transitions. Word has length 14 [2019-12-07 10:18:03,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:03,946 INFO L462 AbstractCegarLoop]: Abstraction has 30900 states and 103384 transitions. [2019-12-07 10:18:03,946 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:18:03,946 INFO L276 IsEmpty]: Start isEmpty. Operand 30900 states and 103384 transitions. [2019-12-07 10:18:03,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 10:18:03,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:03,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:03,948 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:03,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:03,948 INFO L82 PathProgramCache]: Analyzing trace with hash -1480362260, now seen corresponding path program 1 times [2019-12-07 10:18:03,948 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:03,948 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990483203] [2019-12-07 10:18:03,948 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:03,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:03,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:03,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990483203] [2019-12-07 10:18:03,993 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:03,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:18:03,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679758029] [2019-12-07 10:18:03,993 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:18:03,993 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:03,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:18:03,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:18:03,994 INFO L87 Difference]: Start difference. First operand 30900 states and 103384 transitions. Second operand 4 states. [2019-12-07 10:18:04,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:04,219 INFO L93 Difference]: Finished difference Result 38443 states and 127475 transitions. [2019-12-07 10:18:04,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:18:04,220 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 10:18:04,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:04,389 INFO L225 Difference]: With dead ends: 38443 [2019-12-07 10:18:04,390 INFO L226 Difference]: Without dead ends: 38432 [2019-12-07 10:18:04,390 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:04,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38432 states. [2019-12-07 10:18:04,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38432 to 30923. [2019-12-07 10:18:04,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30923 states. [2019-12-07 10:18:04,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30923 states to 30923 states and 103333 transitions. [2019-12-07 10:18:04,956 INFO L78 Accepts]: Start accepts. Automaton has 30923 states and 103333 transitions. Word has length 14 [2019-12-07 10:18:04,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:04,956 INFO L462 AbstractCegarLoop]: Abstraction has 30923 states and 103333 transitions. [2019-12-07 10:18:04,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:18:04,956 INFO L276 IsEmpty]: Start isEmpty. Operand 30923 states and 103333 transitions. [2019-12-07 10:18:04,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:18:04,963 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:04,963 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:04,963 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:04,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:04,963 INFO L82 PathProgramCache]: Analyzing trace with hash 2067973460, now seen corresponding path program 1 times [2019-12-07 10:18:04,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:04,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256579573] [2019-12-07 10:18:04,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:04,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:05,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:05,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256579573] [2019-12-07 10:18:05,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:05,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:05,032 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [267279547] [2019-12-07 10:18:05,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:05,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:05,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:05,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:05,033 INFO L87 Difference]: Start difference. First operand 30923 states and 103333 transitions. Second operand 5 states. [2019-12-07 10:18:05,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:05,405 INFO L93 Difference]: Finished difference Result 45281 states and 149378 transitions. [2019-12-07 10:18:05,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:18:05,405 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:18:05,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:05,473 INFO L225 Difference]: With dead ends: 45281 [2019-12-07 10:18:05,473 INFO L226 Difference]: Without dead ends: 45258 [2019-12-07 10:18:05,473 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:18:05,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45258 states. [2019-12-07 10:18:06,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45258 to 32469. [2019-12-07 10:18:06,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32469 states. [2019-12-07 10:18:06,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32469 states to 32469 states and 108463 transitions. [2019-12-07 10:18:06,119 INFO L78 Accepts]: Start accepts. Automaton has 32469 states and 108463 transitions. Word has length 22 [2019-12-07 10:18:06,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:06,119 INFO L462 AbstractCegarLoop]: Abstraction has 32469 states and 108463 transitions. [2019-12-07 10:18:06,119 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:06,119 INFO L276 IsEmpty]: Start isEmpty. Operand 32469 states and 108463 transitions. [2019-12-07 10:18:06,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:18:06,125 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:06,125 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:06,125 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:06,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:06,125 INFO L82 PathProgramCache]: Analyzing trace with hash 2068123345, now seen corresponding path program 1 times [2019-12-07 10:18:06,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:06,126 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298769605] [2019-12-07 10:18:06,126 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:06,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:06,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:06,170 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [298769605] [2019-12-07 10:18:06,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:06,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:06,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524796572] [2019-12-07 10:18:06,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:06,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:06,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:06,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:06,171 INFO L87 Difference]: Start difference. First operand 32469 states and 108463 transitions. Second operand 5 states. [2019-12-07 10:18:06,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:06,532 INFO L93 Difference]: Finished difference Result 46044 states and 151821 transitions. [2019-12-07 10:18:06,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:18:06,533 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:18:06,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:06,601 INFO L225 Difference]: With dead ends: 46044 [2019-12-07 10:18:06,601 INFO L226 Difference]: Without dead ends: 46021 [2019-12-07 10:18:06,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:18:06,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46021 states. [2019-12-07 10:18:07,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46021 to 30490. [2019-12-07 10:18:07,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30490 states. [2019-12-07 10:18:07,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30490 states to 30490 states and 101754 transitions. [2019-12-07 10:18:07,304 INFO L78 Accepts]: Start accepts. Automaton has 30490 states and 101754 transitions. Word has length 22 [2019-12-07 10:18:07,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:07,304 INFO L462 AbstractCegarLoop]: Abstraction has 30490 states and 101754 transitions. [2019-12-07 10:18:07,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:07,304 INFO L276 IsEmpty]: Start isEmpty. Operand 30490 states and 101754 transitions. [2019-12-07 10:18:07,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 10:18:07,313 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:07,313 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:07,313 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:07,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:07,313 INFO L82 PathProgramCache]: Analyzing trace with hash 668919418, now seen corresponding path program 1 times [2019-12-07 10:18:07,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:07,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698025130] [2019-12-07 10:18:07,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:07,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:07,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:07,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698025130] [2019-12-07 10:18:07,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:07,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:07,354 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702658108] [2019-12-07 10:18:07,354 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:07,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:07,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:07,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:07,355 INFO L87 Difference]: Start difference. First operand 30490 states and 101754 transitions. Second operand 5 states. [2019-12-07 10:18:07,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:07,683 INFO L93 Difference]: Finished difference Result 41888 states and 137386 transitions. [2019-12-07 10:18:07,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:18:07,683 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 10:18:07,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:07,744 INFO L225 Difference]: With dead ends: 41888 [2019-12-07 10:18:07,745 INFO L226 Difference]: Without dead ends: 41863 [2019-12-07 10:18:07,745 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:18:07,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41863 states. [2019-12-07 10:18:08,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41863 to 34468. [2019-12-07 10:18:08,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34468 states. [2019-12-07 10:18:08,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34468 states to 34468 states and 114244 transitions. [2019-12-07 10:18:08,380 INFO L78 Accepts]: Start accepts. Automaton has 34468 states and 114244 transitions. Word has length 25 [2019-12-07 10:18:08,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:08,380 INFO L462 AbstractCegarLoop]: Abstraction has 34468 states and 114244 transitions. [2019-12-07 10:18:08,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:08,380 INFO L276 IsEmpty]: Start isEmpty. Operand 34468 states and 114244 transitions. [2019-12-07 10:18:08,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:18:08,392 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:08,392 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:08,393 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:08,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:08,393 INFO L82 PathProgramCache]: Analyzing trace with hash 531742436, now seen corresponding path program 1 times [2019-12-07 10:18:08,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:08,393 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150860232] [2019-12-07 10:18:08,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:08,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:08,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:08,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150860232] [2019-12-07 10:18:08,419 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:08,419 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:08,419 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1402578765] [2019-12-07 10:18:08,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:18:08,419 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:08,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:18:08,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:08,420 INFO L87 Difference]: Start difference. First operand 34468 states and 114244 transitions. Second operand 3 states. [2019-12-07 10:18:08,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:08,566 INFO L93 Difference]: Finished difference Result 46620 states and 154653 transitions. [2019-12-07 10:18:08,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:18:08,567 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 10:18:08,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:08,641 INFO L225 Difference]: With dead ends: 46620 [2019-12-07 10:18:08,641 INFO L226 Difference]: Without dead ends: 46620 [2019-12-07 10:18:08,641 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:08,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46620 states. [2019-12-07 10:18:09,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46620 to 35311. [2019-12-07 10:18:09,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35311 states. [2019-12-07 10:18:09,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35311 states to 35311 states and 116912 transitions. [2019-12-07 10:18:09,353 INFO L78 Accepts]: Start accepts. Automaton has 35311 states and 116912 transitions. Word has length 27 [2019-12-07 10:18:09,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:09,353 INFO L462 AbstractCegarLoop]: Abstraction has 35311 states and 116912 transitions. [2019-12-07 10:18:09,353 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:18:09,353 INFO L276 IsEmpty]: Start isEmpty. Operand 35311 states and 116912 transitions. [2019-12-07 10:18:09,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:18:09,366 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:09,366 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:09,366 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:09,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:09,367 INFO L82 PathProgramCache]: Analyzing trace with hash 93136807, now seen corresponding path program 1 times [2019-12-07 10:18:09,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:09,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374374596] [2019-12-07 10:18:09,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:09,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:09,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:09,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374374596] [2019-12-07 10:18:09,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:09,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:09,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774742541] [2019-12-07 10:18:09,401 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:09,401 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:09,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:09,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:09,401 INFO L87 Difference]: Start difference. First operand 35311 states and 116912 transitions. Second operand 5 states. [2019-12-07 10:18:09,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:09,674 INFO L93 Difference]: Finished difference Result 44522 states and 146129 transitions. [2019-12-07 10:18:09,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:18:09,674 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 10:18:09,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:09,736 INFO L225 Difference]: With dead ends: 44522 [2019-12-07 10:18:09,736 INFO L226 Difference]: Without dead ends: 44500 [2019-12-07 10:18:09,737 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:18:09,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44500 states. [2019-12-07 10:18:10,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44500 to 36993. [2019-12-07 10:18:10,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36993 states. [2019-12-07 10:18:10,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36993 states to 36993 states and 122487 transitions. [2019-12-07 10:18:10,422 INFO L78 Accepts]: Start accepts. Automaton has 36993 states and 122487 transitions. Word has length 27 [2019-12-07 10:18:10,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:10,422 INFO L462 AbstractCegarLoop]: Abstraction has 36993 states and 122487 transitions. [2019-12-07 10:18:10,423 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:10,423 INFO L276 IsEmpty]: Start isEmpty. Operand 36993 states and 122487 transitions. [2019-12-07 10:18:10,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:18:10,436 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:10,436 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:10,436 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:10,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:10,437 INFO L82 PathProgramCache]: Analyzing trace with hash -732588729, now seen corresponding path program 1 times [2019-12-07 10:18:10,437 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:10,437 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507914833] [2019-12-07 10:18:10,437 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:10,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:10,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:10,462 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [507914833] [2019-12-07 10:18:10,462 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:10,462 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:10,462 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1950637430] [2019-12-07 10:18:10,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:18:10,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:10,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:18:10,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:10,463 INFO L87 Difference]: Start difference. First operand 36993 states and 122487 transitions. Second operand 3 states. [2019-12-07 10:18:10,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:10,612 INFO L93 Difference]: Finished difference Result 47992 states and 157480 transitions. [2019-12-07 10:18:10,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:18:10,613 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 10:18:10,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:10,683 INFO L225 Difference]: With dead ends: 47992 [2019-12-07 10:18:10,683 INFO L226 Difference]: Without dead ends: 47992 [2019-12-07 10:18:10,683 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:10,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47992 states. [2019-12-07 10:18:11,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47992 to 39507. [2019-12-07 10:18:11,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39507 states. [2019-12-07 10:18:11,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39507 states to 39507 states and 128418 transitions. [2019-12-07 10:18:11,395 INFO L78 Accepts]: Start accepts. Automaton has 39507 states and 128418 transitions. Word has length 27 [2019-12-07 10:18:11,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:11,395 INFO L462 AbstractCegarLoop]: Abstraction has 39507 states and 128418 transitions. [2019-12-07 10:18:11,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:18:11,395 INFO L276 IsEmpty]: Start isEmpty. Operand 39507 states and 128418 transitions. [2019-12-07 10:18:11,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 10:18:11,416 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:11,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:11,416 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:11,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:11,417 INFO L82 PathProgramCache]: Analyzing trace with hash -959778876, now seen corresponding path program 1 times [2019-12-07 10:18:11,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:11,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780071082] [2019-12-07 10:18:11,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:11,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:11,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:11,478 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780071082] [2019-12-07 10:18:11,479 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:11,479 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:18:11,479 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1823613755] [2019-12-07 10:18:11,479 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:11,479 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:11,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:11,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:11,480 INFO L87 Difference]: Start difference. First operand 39507 states and 128418 transitions. Second operand 5 states. [2019-12-07 10:18:12,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:12,009 INFO L93 Difference]: Finished difference Result 56363 states and 181168 transitions. [2019-12-07 10:18:12,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:18:12,009 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 10:18:12,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:12,093 INFO L225 Difference]: With dead ends: 56363 [2019-12-07 10:18:12,093 INFO L226 Difference]: Without dead ends: 56363 [2019-12-07 10:18:12,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:18:12,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56363 states. [2019-12-07 10:18:12,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56363 to 48100. [2019-12-07 10:18:12,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48100 states. [2019-12-07 10:18:12,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48100 states to 48100 states and 155661 transitions. [2019-12-07 10:18:12,928 INFO L78 Accepts]: Start accepts. Automaton has 48100 states and 155661 transitions. Word has length 28 [2019-12-07 10:18:12,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:12,928 INFO L462 AbstractCegarLoop]: Abstraction has 48100 states and 155661 transitions. [2019-12-07 10:18:12,928 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:12,928 INFO L276 IsEmpty]: Start isEmpty. Operand 48100 states and 155661 transitions. [2019-12-07 10:18:12,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 10:18:12,952 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:12,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:12,953 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:12,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:12,953 INFO L82 PathProgramCache]: Analyzing trace with hash -1145591812, now seen corresponding path program 1 times [2019-12-07 10:18:12,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:12,953 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041735051] [2019-12-07 10:18:12,953 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:12,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:12,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:12,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041735051] [2019-12-07 10:18:12,992 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:12,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:12,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531203516] [2019-12-07 10:18:12,993 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:12,993 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:12,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:12,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:12,994 INFO L87 Difference]: Start difference. First operand 48100 states and 155661 transitions. Second operand 5 states. [2019-12-07 10:18:13,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:13,327 INFO L93 Difference]: Finished difference Result 58422 states and 187740 transitions. [2019-12-07 10:18:13,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:18:13,328 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 10:18:13,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:13,418 INFO L225 Difference]: With dead ends: 58422 [2019-12-07 10:18:13,418 INFO L226 Difference]: Without dead ends: 58398 [2019-12-07 10:18:13,418 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:18:13,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58398 states. [2019-12-07 10:18:14,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58398 to 47878. [2019-12-07 10:18:14,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47878 states. [2019-12-07 10:18:14,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47878 states to 47878 states and 154649 transitions. [2019-12-07 10:18:14,275 INFO L78 Accepts]: Start accepts. Automaton has 47878 states and 154649 transitions. Word has length 29 [2019-12-07 10:18:14,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:14,275 INFO L462 AbstractCegarLoop]: Abstraction has 47878 states and 154649 transitions. [2019-12-07 10:18:14,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:14,275 INFO L276 IsEmpty]: Start isEmpty. Operand 47878 states and 154649 transitions. [2019-12-07 10:18:14,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 10:18:14,294 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:14,294 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:14,294 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:14,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:14,294 INFO L82 PathProgramCache]: Analyzing trace with hash -1022577234, now seen corresponding path program 1 times [2019-12-07 10:18:14,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:14,295 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663661923] [2019-12-07 10:18:14,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:14,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:14,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:14,339 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1663661923] [2019-12-07 10:18:14,339 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:14,339 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:18:14,339 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065863629] [2019-12-07 10:18:14,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:14,340 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:14,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:14,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:14,340 INFO L87 Difference]: Start difference. First operand 47878 states and 154649 transitions. Second operand 5 states. [2019-12-07 10:18:14,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:14,911 INFO L93 Difference]: Finished difference Result 67830 states and 217162 transitions. [2019-12-07 10:18:14,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:18:14,912 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 10:18:14,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:15,008 INFO L225 Difference]: With dead ends: 67830 [2019-12-07 10:18:15,008 INFO L226 Difference]: Without dead ends: 67830 [2019-12-07 10:18:15,009 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:18:15,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67830 states. [2019-12-07 10:18:15,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67830 to 52171. [2019-12-07 10:18:15,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52171 states. [2019-12-07 10:18:15,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52171 states to 52171 states and 168694 transitions. [2019-12-07 10:18:15,974 INFO L78 Accepts]: Start accepts. Automaton has 52171 states and 168694 transitions. Word has length 29 [2019-12-07 10:18:15,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:15,974 INFO L462 AbstractCegarLoop]: Abstraction has 52171 states and 168694 transitions. [2019-12-07 10:18:15,974 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:15,974 INFO L276 IsEmpty]: Start isEmpty. Operand 52171 states and 168694 transitions. [2019-12-07 10:18:15,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 10:18:15,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:15,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:15,999 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:15,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:15,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1243443546, now seen corresponding path program 1 times [2019-12-07 10:18:15,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:15,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825981898] [2019-12-07 10:18:15,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:16,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:16,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:16,030 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825981898] [2019-12-07 10:18:16,030 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:16,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:16,031 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551638381] [2019-12-07 10:18:16,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:18:16,031 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:16,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:18:16,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:18:16,031 INFO L87 Difference]: Start difference. First operand 52171 states and 168694 transitions. Second operand 4 states. [2019-12-07 10:18:16,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:16,096 INFO L93 Difference]: Finished difference Result 22117 states and 66473 transitions. [2019-12-07 10:18:16,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:18:16,097 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 10:18:16,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:16,121 INFO L225 Difference]: With dead ends: 22117 [2019-12-07 10:18:16,121 INFO L226 Difference]: Without dead ends: 22117 [2019-12-07 10:18:16,121 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:18:16,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22117 states. [2019-12-07 10:18:16,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22117 to 21219. [2019-12-07 10:18:16,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21219 states. [2019-12-07 10:18:16,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21219 states to 21219 states and 63884 transitions. [2019-12-07 10:18:16,411 INFO L78 Accepts]: Start accepts. Automaton has 21219 states and 63884 transitions. Word has length 29 [2019-12-07 10:18:16,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:16,412 INFO L462 AbstractCegarLoop]: Abstraction has 21219 states and 63884 transitions. [2019-12-07 10:18:16,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:18:16,412 INFO L276 IsEmpty]: Start isEmpty. Operand 21219 states and 63884 transitions. [2019-12-07 10:18:16,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 10:18:16,434 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:16,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:16,434 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:16,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:16,434 INFO L82 PathProgramCache]: Analyzing trace with hash 515851026, now seen corresponding path program 1 times [2019-12-07 10:18:16,434 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:16,434 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578837036] [2019-12-07 10:18:16,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:16,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:16,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:16,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [578837036] [2019-12-07 10:18:16,469 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:16,469 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:18:16,469 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [265242881] [2019-12-07 10:18:16,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:16,470 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:16,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:16,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:16,470 INFO L87 Difference]: Start difference. First operand 21219 states and 63884 transitions. Second operand 5 states. [2019-12-07 10:18:16,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:16,544 INFO L93 Difference]: Finished difference Result 19522 states and 59654 transitions. [2019-12-07 10:18:16,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:18:16,544 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2019-12-07 10:18:16,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:16,565 INFO L225 Difference]: With dead ends: 19522 [2019-12-07 10:18:16,565 INFO L226 Difference]: Without dead ends: 19522 [2019-12-07 10:18:16,566 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:16,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19522 states. [2019-12-07 10:18:16,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19522 to 17404. [2019-12-07 10:18:16,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17404 states. [2019-12-07 10:18:16,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17404 states to 17404 states and 53630 transitions. [2019-12-07 10:18:16,826 INFO L78 Accepts]: Start accepts. Automaton has 17404 states and 53630 transitions. Word has length 39 [2019-12-07 10:18:16,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:16,826 INFO L462 AbstractCegarLoop]: Abstraction has 17404 states and 53630 transitions. [2019-12-07 10:18:16,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:16,826 INFO L276 IsEmpty]: Start isEmpty. Operand 17404 states and 53630 transitions. [2019-12-07 10:18:16,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 10:18:16,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:16,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:16,841 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:16,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:16,841 INFO L82 PathProgramCache]: Analyzing trace with hash 165786421, now seen corresponding path program 1 times [2019-12-07 10:18:16,841 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:16,841 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139163415] [2019-12-07 10:18:16,841 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:16,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:16,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:16,900 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139163415] [2019-12-07 10:18:16,900 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:16,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:18:16,901 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [796337177] [2019-12-07 10:18:16,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:18:16,901 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:16,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:18:16,901 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:18:16,902 INFO L87 Difference]: Start difference. First operand 17404 states and 53630 transitions. Second operand 6 states. [2019-12-07 10:18:17,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:17,314 INFO L93 Difference]: Finished difference Result 22101 states and 66906 transitions. [2019-12-07 10:18:17,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 10:18:17,314 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2019-12-07 10:18:17,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:17,337 INFO L225 Difference]: With dead ends: 22101 [2019-12-07 10:18:17,337 INFO L226 Difference]: Without dead ends: 22101 [2019-12-07 10:18:17,337 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:18:17,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22101 states. [2019-12-07 10:18:17,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22101 to 18301. [2019-12-07 10:18:17,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18301 states. [2019-12-07 10:18:17,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18301 states to 18301 states and 56199 transitions. [2019-12-07 10:18:17,614 INFO L78 Accepts]: Start accepts. Automaton has 18301 states and 56199 transitions. Word has length 53 [2019-12-07 10:18:17,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:17,614 INFO L462 AbstractCegarLoop]: Abstraction has 18301 states and 56199 transitions. [2019-12-07 10:18:17,614 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:18:17,615 INFO L276 IsEmpty]: Start isEmpty. Operand 18301 states and 56199 transitions. [2019-12-07 10:18:17,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 10:18:17,630 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:17,630 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:17,630 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:17,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:17,631 INFO L82 PathProgramCache]: Analyzing trace with hash 1047584721, now seen corresponding path program 2 times [2019-12-07 10:18:17,631 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:17,631 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269781132] [2019-12-07 10:18:17,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:17,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:17,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:17,690 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [269781132] [2019-12-07 10:18:17,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:17,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 10:18:17,690 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2006939914] [2019-12-07 10:18:17,691 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:18:17,691 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:17,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:18:17,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:18:17,691 INFO L87 Difference]: Start difference. First operand 18301 states and 56199 transitions. Second operand 7 states. [2019-12-07 10:18:18,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:18,348 INFO L93 Difference]: Finished difference Result 28053 states and 85770 transitions. [2019-12-07 10:18:18,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 10:18:18,348 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 53 [2019-12-07 10:18:18,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:18,382 INFO L225 Difference]: With dead ends: 28053 [2019-12-07 10:18:18,382 INFO L226 Difference]: Without dead ends: 28053 [2019-12-07 10:18:18,382 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 11 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:18:18,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28053 states. [2019-12-07 10:18:18,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28053 to 17881. [2019-12-07 10:18:18,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17881 states. [2019-12-07 10:18:18,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17881 states to 17881 states and 55027 transitions. [2019-12-07 10:18:18,753 INFO L78 Accepts]: Start accepts. Automaton has 17881 states and 55027 transitions. Word has length 53 [2019-12-07 10:18:18,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:18,753 INFO L462 AbstractCegarLoop]: Abstraction has 17881 states and 55027 transitions. [2019-12-07 10:18:18,753 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:18:18,753 INFO L276 IsEmpty]: Start isEmpty. Operand 17881 states and 55027 transitions. [2019-12-07 10:18:18,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 10:18:18,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:18,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:18,769 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:18,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:18,770 INFO L82 PathProgramCache]: Analyzing trace with hash -351992857, now seen corresponding path program 3 times [2019-12-07 10:18:18,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:18,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737480408] [2019-12-07 10:18:18,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:18,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:18,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:18,806 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737480408] [2019-12-07 10:18:18,806 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:18,806 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:18:18,807 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436973618] [2019-12-07 10:18:18,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:18:18,807 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:18,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:18:18,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:18,807 INFO L87 Difference]: Start difference. First operand 17881 states and 55027 transitions. Second operand 3 states. [2019-12-07 10:18:18,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:18,855 INFO L93 Difference]: Finished difference Result 17879 states and 55022 transitions. [2019-12-07 10:18:18,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:18:18,856 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 10:18:18,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:18,875 INFO L225 Difference]: With dead ends: 17879 [2019-12-07 10:18:18,875 INFO L226 Difference]: Without dead ends: 17879 [2019-12-07 10:18:18,876 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:18,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17879 states. [2019-12-07 10:18:19,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17879 to 15528. [2019-12-07 10:18:19,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15528 states. [2019-12-07 10:18:19,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15528 states to 15528 states and 48315 transitions. [2019-12-07 10:18:19,115 INFO L78 Accepts]: Start accepts. Automaton has 15528 states and 48315 transitions. Word has length 53 [2019-12-07 10:18:19,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:19,115 INFO L462 AbstractCegarLoop]: Abstraction has 15528 states and 48315 transitions. [2019-12-07 10:18:19,115 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:18:19,115 INFO L276 IsEmpty]: Start isEmpty. Operand 15528 states and 48315 transitions. [2019-12-07 10:18:19,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 10:18:19,129 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:19,129 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:19,129 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:19,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:19,130 INFO L82 PathProgramCache]: Analyzing trace with hash 1776229385, now seen corresponding path program 1 times [2019-12-07 10:18:19,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:19,130 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534834287] [2019-12-07 10:18:19,130 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:19,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:19,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:19,188 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534834287] [2019-12-07 10:18:19,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:19,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:18:19,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142055950] [2019-12-07 10:18:19,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:18:19,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:19,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:18:19,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:18:19,190 INFO L87 Difference]: Start difference. First operand 15528 states and 48315 transitions. Second operand 4 states. [2019-12-07 10:18:19,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:19,265 INFO L93 Difference]: Finished difference Result 25133 states and 78666 transitions. [2019-12-07 10:18:19,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:18:19,266 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2019-12-07 10:18:19,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:19,283 INFO L225 Difference]: With dead ends: 25133 [2019-12-07 10:18:19,284 INFO L226 Difference]: Without dead ends: 12457 [2019-12-07 10:18:19,284 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:18:19,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12457 states. [2019-12-07 10:18:19,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12457 to 12457. [2019-12-07 10:18:19,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12457 states. [2019-12-07 10:18:19,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12457 states to 12457 states and 39084 transitions. [2019-12-07 10:18:19,454 INFO L78 Accepts]: Start accepts. Automaton has 12457 states and 39084 transitions. Word has length 54 [2019-12-07 10:18:19,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:19,454 INFO L462 AbstractCegarLoop]: Abstraction has 12457 states and 39084 transitions. [2019-12-07 10:18:19,454 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:18:19,454 INFO L276 IsEmpty]: Start isEmpty. Operand 12457 states and 39084 transitions. [2019-12-07 10:18:19,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 10:18:19,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:19,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:19,466 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:19,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:19,466 INFO L82 PathProgramCache]: Analyzing trace with hash -1131648305, now seen corresponding path program 2 times [2019-12-07 10:18:19,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:19,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398640129] [2019-12-07 10:18:19,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:19,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:19,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:19,532 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398640129] [2019-12-07 10:18:19,532 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:19,532 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:18:19,532 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828161318] [2019-12-07 10:18:19,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:18:19,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:19,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:18:19,533 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:18:19,533 INFO L87 Difference]: Start difference. First operand 12457 states and 39084 transitions. Second operand 5 states. [2019-12-07 10:18:19,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:19,609 INFO L93 Difference]: Finished difference Result 23349 states and 73599 transitions. [2019-12-07 10:18:19,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:18:19,610 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-12-07 10:18:19,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:19,620 INFO L225 Difference]: With dead ends: 23349 [2019-12-07 10:18:19,620 INFO L226 Difference]: Without dead ends: 9116 [2019-12-07 10:18:19,620 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:18:19,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9116 states. [2019-12-07 10:18:19,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9116 to 9116. [2019-12-07 10:18:19,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9116 states. [2019-12-07 10:18:19,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9116 states to 9116 states and 28789 transitions. [2019-12-07 10:18:19,748 INFO L78 Accepts]: Start accepts. Automaton has 9116 states and 28789 transitions. Word has length 54 [2019-12-07 10:18:19,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:19,748 INFO L462 AbstractCegarLoop]: Abstraction has 9116 states and 28789 transitions. [2019-12-07 10:18:19,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:18:19,749 INFO L276 IsEmpty]: Start isEmpty. Operand 9116 states and 28789 transitions. [2019-12-07 10:18:19,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 10:18:19,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:19,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:19,756 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:19,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:19,756 INFO L82 PathProgramCache]: Analyzing trace with hash -1397961039, now seen corresponding path program 3 times [2019-12-07 10:18:19,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:19,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924811323] [2019-12-07 10:18:19,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:19,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:19,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:19,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924811323] [2019-12-07 10:18:19,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:19,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:18:19,804 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1062322235] [2019-12-07 10:18:19,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:18:19,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:19,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:18:19,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:18:19,805 INFO L87 Difference]: Start difference. First operand 9116 states and 28789 transitions. Second operand 7 states. [2019-12-07 10:18:19,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:19,967 INFO L93 Difference]: Finished difference Result 15913 states and 49181 transitions. [2019-12-07 10:18:19,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 10:18:19,968 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 10:18:19,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:19,980 INFO L225 Difference]: With dead ends: 15913 [2019-12-07 10:18:19,980 INFO L226 Difference]: Without dead ends: 11670 [2019-12-07 10:18:19,981 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:18:20,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11670 states. [2019-12-07 10:18:20,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11670 to 10699. [2019-12-07 10:18:20,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10699 states. [2019-12-07 10:18:20,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10699 states to 10699 states and 33350 transitions. [2019-12-07 10:18:20,135 INFO L78 Accepts]: Start accepts. Automaton has 10699 states and 33350 transitions. Word has length 54 [2019-12-07 10:18:20,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:20,136 INFO L462 AbstractCegarLoop]: Abstraction has 10699 states and 33350 transitions. [2019-12-07 10:18:20,136 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:18:20,136 INFO L276 IsEmpty]: Start isEmpty. Operand 10699 states and 33350 transitions. [2019-12-07 10:18:20,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 10:18:20,145 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:20,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:20,145 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:20,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:20,146 INFO L82 PathProgramCache]: Analyzing trace with hash -133655403, now seen corresponding path program 4 times [2019-12-07 10:18:20,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:20,146 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695788120] [2019-12-07 10:18:20,146 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:20,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:20,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:20,192 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695788120] [2019-12-07 10:18:20,192 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:20,192 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:18:20,192 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1371154473] [2019-12-07 10:18:20,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:18:20,193 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:20,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:18:20,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:18:20,193 INFO L87 Difference]: Start difference. First operand 10699 states and 33350 transitions. Second operand 7 states. [2019-12-07 10:18:20,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:20,351 INFO L93 Difference]: Finished difference Result 17981 states and 54972 transitions. [2019-12-07 10:18:20,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 10:18:20,351 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 10:18:20,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:20,365 INFO L225 Difference]: With dead ends: 17981 [2019-12-07 10:18:20,365 INFO L226 Difference]: Without dead ends: 13182 [2019-12-07 10:18:20,365 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:18:20,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13182 states. [2019-12-07 10:18:20,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13182 to 12053. [2019-12-07 10:18:20,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12053 states. [2019-12-07 10:18:20,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12053 states to 12053 states and 37153 transitions. [2019-12-07 10:18:20,536 INFO L78 Accepts]: Start accepts. Automaton has 12053 states and 37153 transitions. Word has length 54 [2019-12-07 10:18:20,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:20,536 INFO L462 AbstractCegarLoop]: Abstraction has 12053 states and 37153 transitions. [2019-12-07 10:18:20,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:18:20,536 INFO L276 IsEmpty]: Start isEmpty. Operand 12053 states and 37153 transitions. [2019-12-07 10:18:20,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 10:18:20,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:20,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:20,546 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:20,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:20,547 INFO L82 PathProgramCache]: Analyzing trace with hash 593914115, now seen corresponding path program 5 times [2019-12-07 10:18:20,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:20,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158717839] [2019-12-07 10:18:20,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:20,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:20,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:20,618 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158717839] [2019-12-07 10:18:20,618 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:20,618 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:18:20,618 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002793105] [2019-12-07 10:18:20,618 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 10:18:20,618 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:20,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 10:18:20,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:18:20,619 INFO L87 Difference]: Start difference. First operand 12053 states and 37153 transitions. Second operand 9 states. [2019-12-07 10:18:21,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:21,157 INFO L93 Difference]: Finished difference Result 32565 states and 98659 transitions. [2019-12-07 10:18:21,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 10:18:21,158 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 54 [2019-12-07 10:18:21,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:21,193 INFO L225 Difference]: With dead ends: 32565 [2019-12-07 10:18:21,193 INFO L226 Difference]: Without dead ends: 31238 [2019-12-07 10:18:21,193 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=142, Invalid=458, Unknown=0, NotChecked=0, Total=600 [2019-12-07 10:18:21,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31238 states. [2019-12-07 10:18:21,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31238 to 12274. [2019-12-07 10:18:21,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12274 states. [2019-12-07 10:18:21,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12274 states to 12274 states and 37806 transitions. [2019-12-07 10:18:21,505 INFO L78 Accepts]: Start accepts. Automaton has 12274 states and 37806 transitions. Word has length 54 [2019-12-07 10:18:21,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:21,505 INFO L462 AbstractCegarLoop]: Abstraction has 12274 states and 37806 transitions. [2019-12-07 10:18:21,505 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 10:18:21,505 INFO L276 IsEmpty]: Start isEmpty. Operand 12274 states and 37806 transitions. [2019-12-07 10:18:21,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 10:18:21,515 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:21,515 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:21,516 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:21,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:21,516 INFO L82 PathProgramCache]: Analyzing trace with hash 1221899513, now seen corresponding path program 6 times [2019-12-07 10:18:21,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:21,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457546085] [2019-12-07 10:18:21,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:21,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:21,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:21,806 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457546085] [2019-12-07 10:18:21,806 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:21,806 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 10:18:21,806 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212237365] [2019-12-07 10:18:21,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 10:18:21,806 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:21,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 10:18:21,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:18:21,807 INFO L87 Difference]: Start difference. First operand 12274 states and 37806 transitions. Second operand 17 states. [2019-12-07 10:18:24,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:24,050 INFO L93 Difference]: Finished difference Result 24806 states and 74284 transitions. [2019-12-07 10:18:24,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 10:18:24,051 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 54 [2019-12-07 10:18:24,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:24,075 INFO L225 Difference]: With dead ends: 24806 [2019-12-07 10:18:24,075 INFO L226 Difference]: Without dead ends: 24234 [2019-12-07 10:18:24,076 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 742 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=474, Invalid=2282, Unknown=0, NotChecked=0, Total=2756 [2019-12-07 10:18:24,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24234 states. [2019-12-07 10:18:24,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24234 to 12318. [2019-12-07 10:18:24,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12318 states. [2019-12-07 10:18:24,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12318 states to 12318 states and 37971 transitions. [2019-12-07 10:18:24,331 INFO L78 Accepts]: Start accepts. Automaton has 12318 states and 37971 transitions. Word has length 54 [2019-12-07 10:18:24,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:24,331 INFO L462 AbstractCegarLoop]: Abstraction has 12318 states and 37971 transitions. [2019-12-07 10:18:24,331 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 10:18:24,331 INFO L276 IsEmpty]: Start isEmpty. Operand 12318 states and 37971 transitions. [2019-12-07 10:18:24,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 10:18:24,343 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:24,343 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:24,343 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:24,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:24,344 INFO L82 PathProgramCache]: Analyzing trace with hash -1827368133, now seen corresponding path program 7 times [2019-12-07 10:18:24,344 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:24,344 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1807705860] [2019-12-07 10:18:24,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:24,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:24,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:24,635 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1807705860] [2019-12-07 10:18:24,635 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:24,636 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 10:18:24,636 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055786265] [2019-12-07 10:18:24,636 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 10:18:24,636 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:24,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 10:18:24,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:18:24,636 INFO L87 Difference]: Start difference. First operand 12318 states and 37971 transitions. Second operand 18 states. [2019-12-07 10:18:27,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:27,158 INFO L93 Difference]: Finished difference Result 26203 states and 78561 transitions. [2019-12-07 10:18:27,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 10:18:27,159 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 54 [2019-12-07 10:18:27,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:27,188 INFO L225 Difference]: With dead ends: 26203 [2019-12-07 10:18:27,188 INFO L226 Difference]: Without dead ends: 25591 [2019-12-07 10:18:27,189 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 959 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=578, Invalid=2844, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 10:18:27,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25591 states. [2019-12-07 10:18:27,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25591 to 12380. [2019-12-07 10:18:27,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12380 states. [2019-12-07 10:18:27,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12380 states to 12380 states and 38204 transitions. [2019-12-07 10:18:27,457 INFO L78 Accepts]: Start accepts. Automaton has 12380 states and 38204 transitions. Word has length 54 [2019-12-07 10:18:27,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:27,457 INFO L462 AbstractCegarLoop]: Abstraction has 12380 states and 38204 transitions. [2019-12-07 10:18:27,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 10:18:27,457 INFO L276 IsEmpty]: Start isEmpty. Operand 12380 states and 38204 transitions. [2019-12-07 10:18:27,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 10:18:27,469 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:27,469 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:27,469 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:27,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:27,470 INFO L82 PathProgramCache]: Analyzing trace with hash 1788158321, now seen corresponding path program 8 times [2019-12-07 10:18:27,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:27,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252635432] [2019-12-07 10:18:27,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:27,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:27,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:27,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [252635432] [2019-12-07 10:18:27,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:27,505 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:18:27,505 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861770974] [2019-12-07 10:18:27,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:18:27,505 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:27,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:18:27,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:27,506 INFO L87 Difference]: Start difference. First operand 12380 states and 38204 transitions. Second operand 3 states. [2019-12-07 10:18:27,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:27,530 INFO L93 Difference]: Finished difference Result 8414 states and 25623 transitions. [2019-12-07 10:18:27,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:18:27,530 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 10:18:27,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:27,538 INFO L225 Difference]: With dead ends: 8414 [2019-12-07 10:18:27,539 INFO L226 Difference]: Without dead ends: 8414 [2019-12-07 10:18:27,539 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:18:27,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8414 states. [2019-12-07 10:18:27,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8414 to 8135. [2019-12-07 10:18:27,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8135 states. [2019-12-07 10:18:27,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8135 states to 8135 states and 24807 transitions. [2019-12-07 10:18:27,651 INFO L78 Accepts]: Start accepts. Automaton has 8135 states and 24807 transitions. Word has length 54 [2019-12-07 10:18:27,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:27,652 INFO L462 AbstractCegarLoop]: Abstraction has 8135 states and 24807 transitions. [2019-12-07 10:18:27,652 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:18:27,652 INFO L276 IsEmpty]: Start isEmpty. Operand 8135 states and 24807 transitions. [2019-12-07 10:18:27,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:18:27,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:27,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:27,658 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:27,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:27,659 INFO L82 PathProgramCache]: Analyzing trace with hash 404282337, now seen corresponding path program 1 times [2019-12-07 10:18:27,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:27,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212726091] [2019-12-07 10:18:27,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:27,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:27,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:27,756 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212726091] [2019-12-07 10:18:27,756 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:27,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:18:27,757 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923054793] [2019-12-07 10:18:27,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:18:27,757 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:27,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:18:27,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:18:27,757 INFO L87 Difference]: Start difference. First operand 8135 states and 24807 transitions. Second operand 10 states. [2019-12-07 10:18:28,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:28,344 INFO L93 Difference]: Finished difference Result 13703 states and 41097 transitions. [2019-12-07 10:18:28,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 10:18:28,344 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 55 [2019-12-07 10:18:28,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:28,354 INFO L225 Difference]: With dead ends: 13703 [2019-12-07 10:18:28,354 INFO L226 Difference]: Without dead ends: 9788 [2019-12-07 10:18:28,354 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=300, Unknown=0, NotChecked=0, Total=380 [2019-12-07 10:18:28,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9788 states. [2019-12-07 10:18:28,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9788 to 8449. [2019-12-07 10:18:28,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8449 states. [2019-12-07 10:18:28,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8449 states to 8449 states and 25555 transitions. [2019-12-07 10:18:28,476 INFO L78 Accepts]: Start accepts. Automaton has 8449 states and 25555 transitions. Word has length 55 [2019-12-07 10:18:28,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:28,476 INFO L462 AbstractCegarLoop]: Abstraction has 8449 states and 25555 transitions. [2019-12-07 10:18:28,476 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:18:28,476 INFO L276 IsEmpty]: Start isEmpty. Operand 8449 states and 25555 transitions. [2019-12-07 10:18:28,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:18:28,483 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:28,483 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:28,483 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:28,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:28,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1911212751, now seen corresponding path program 2 times [2019-12-07 10:18:28,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:28,484 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592070645] [2019-12-07 10:18:28,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:28,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:28,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:28,594 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592070645] [2019-12-07 10:18:28,595 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:28,595 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:18:28,595 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1552475407] [2019-12-07 10:18:28,595 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:18:28,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:28,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:18:28,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:18:28,595 INFO L87 Difference]: Start difference. First operand 8449 states and 25555 transitions. Second operand 11 states. [2019-12-07 10:18:29,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:29,286 INFO L93 Difference]: Finished difference Result 12193 states and 36195 transitions. [2019-12-07 10:18:29,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:18:29,287 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 55 [2019-12-07 10:18:29,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:29,296 INFO L225 Difference]: With dead ends: 12193 [2019-12-07 10:18:29,297 INFO L226 Difference]: Without dead ends: 9977 [2019-12-07 10:18:29,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 118 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=127, Invalid=575, Unknown=0, NotChecked=0, Total=702 [2019-12-07 10:18:29,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9977 states. [2019-12-07 10:18:29,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9977 to 8477. [2019-12-07 10:18:29,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8477 states. [2019-12-07 10:18:29,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8477 states to 8477 states and 25464 transitions. [2019-12-07 10:18:29,420 INFO L78 Accepts]: Start accepts. Automaton has 8477 states and 25464 transitions. Word has length 55 [2019-12-07 10:18:29,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:29,421 INFO L462 AbstractCegarLoop]: Abstraction has 8477 states and 25464 transitions. [2019-12-07 10:18:29,421 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:18:29,421 INFO L276 IsEmpty]: Start isEmpty. Operand 8477 states and 25464 transitions. [2019-12-07 10:18:29,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:18:29,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:29,428 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:29,428 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:29,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:29,428 INFO L82 PathProgramCache]: Analyzing trace with hash 905870895, now seen corresponding path program 3 times [2019-12-07 10:18:29,428 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:29,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977843188] [2019-12-07 10:18:29,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:29,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:29,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:29,888 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977843188] [2019-12-07 10:18:29,888 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:29,888 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 10:18:29,888 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [654114214] [2019-12-07 10:18:29,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 10:18:29,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:29,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 10:18:29,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2019-12-07 10:18:29,889 INFO L87 Difference]: Start difference. First operand 8477 states and 25464 transitions. Second operand 19 states. [2019-12-07 10:18:34,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:34,588 INFO L93 Difference]: Finished difference Result 15464 states and 44565 transitions. [2019-12-07 10:18:34,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 10:18:34,588 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 55 [2019-12-07 10:18:34,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:34,600 INFO L225 Difference]: With dead ends: 15464 [2019-12-07 10:18:34,601 INFO L226 Difference]: Without dead ends: 12281 [2019-12-07 10:18:34,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 774 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=483, Invalid=2379, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 10:18:34,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12281 states. [2019-12-07 10:18:34,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12281 to 8886. [2019-12-07 10:18:34,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8886 states. [2019-12-07 10:18:34,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8886 states to 8886 states and 26473 transitions. [2019-12-07 10:18:34,741 INFO L78 Accepts]: Start accepts. Automaton has 8886 states and 26473 transitions. Word has length 55 [2019-12-07 10:18:34,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:34,741 INFO L462 AbstractCegarLoop]: Abstraction has 8886 states and 26473 transitions. [2019-12-07 10:18:34,741 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 10:18:34,741 INFO L276 IsEmpty]: Start isEmpty. Operand 8886 states and 26473 transitions. [2019-12-07 10:18:34,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:18:34,748 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:34,749 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:34,749 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:34,749 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:34,749 INFO L82 PathProgramCache]: Analyzing trace with hash 1087540505, now seen corresponding path program 4 times [2019-12-07 10:18:34,749 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:34,749 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640992246] [2019-12-07 10:18:34,749 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:34,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:34,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:34,874 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [640992246] [2019-12-07 10:18:34,874 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:34,874 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:18:34,874 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1187037689] [2019-12-07 10:18:34,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:18:34,875 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:34,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:18:34,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:18:34,875 INFO L87 Difference]: Start difference. First operand 8886 states and 26473 transitions. Second operand 10 states. [2019-12-07 10:18:35,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:35,354 INFO L93 Difference]: Finished difference Result 12263 states and 36227 transitions. [2019-12-07 10:18:35,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:18:35,354 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 55 [2019-12-07 10:18:35,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:35,368 INFO L225 Difference]: With dead ends: 12263 [2019-12-07 10:18:35,368 INFO L226 Difference]: Without dead ends: 11953 [2019-12-07 10:18:35,368 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=149, Invalid=553, Unknown=0, NotChecked=0, Total=702 [2019-12-07 10:18:35,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11953 states. [2019-12-07 10:18:35,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11953 to 10771. [2019-12-07 10:18:35,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10771 states. [2019-12-07 10:18:35,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10771 states to 10771 states and 31918 transitions. [2019-12-07 10:18:35,524 INFO L78 Accepts]: Start accepts. Automaton has 10771 states and 31918 transitions. Word has length 55 [2019-12-07 10:18:35,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:35,524 INFO L462 AbstractCegarLoop]: Abstraction has 10771 states and 31918 transitions. [2019-12-07 10:18:35,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:18:35,524 INFO L276 IsEmpty]: Start isEmpty. Operand 10771 states and 31918 transitions. [2019-12-07 10:18:35,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:18:35,533 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:35,533 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:35,533 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:35,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:35,533 INFO L82 PathProgramCache]: Analyzing trace with hash 1093024805, now seen corresponding path program 5 times [2019-12-07 10:18:35,533 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:35,534 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1239660012] [2019-12-07 10:18:35,534 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:35,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:35,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:35,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1239660012] [2019-12-07 10:18:35,620 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:35,620 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:18:35,620 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685536511] [2019-12-07 10:18:35,620 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:18:35,620 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:35,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:18:35,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:18:35,621 INFO L87 Difference]: Start difference. First operand 10771 states and 31918 transitions. Second operand 10 states. [2019-12-07 10:18:35,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:35,945 INFO L93 Difference]: Finished difference Result 12260 states and 35930 transitions. [2019-12-07 10:18:35,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 10:18:35,945 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 55 [2019-12-07 10:18:35,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:35,955 INFO L225 Difference]: With dead ends: 12260 [2019-12-07 10:18:35,955 INFO L226 Difference]: Without dead ends: 9931 [2019-12-07 10:18:35,956 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=362, Unknown=0, NotChecked=0, Total=462 [2019-12-07 10:18:35,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9931 states. [2019-12-07 10:18:36,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9931 to 8592. [2019-12-07 10:18:36,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8592 states. [2019-12-07 10:18:36,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8592 states to 8592 states and 25712 transitions. [2019-12-07 10:18:36,080 INFO L78 Accepts]: Start accepts. Automaton has 8592 states and 25712 transitions. Word has length 55 [2019-12-07 10:18:36,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:36,080 INFO L462 AbstractCegarLoop]: Abstraction has 8592 states and 25712 transitions. [2019-12-07 10:18:36,080 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:18:36,080 INFO L276 IsEmpty]: Start isEmpty. Operand 8592 states and 25712 transitions. [2019-12-07 10:18:36,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:18:36,087 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:36,087 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:36,087 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:36,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:36,087 INFO L82 PathProgramCache]: Analyzing trace with hash 408163443, now seen corresponding path program 6 times [2019-12-07 10:18:36,087 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:36,087 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941577240] [2019-12-07 10:18:36,088 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:36,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:36,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:36,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941577240] [2019-12-07 10:18:36,197 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:36,197 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:18:36,197 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1308871782] [2019-12-07 10:18:36,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:18:36,197 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:36,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:18:36,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:18:36,198 INFO L87 Difference]: Start difference. First operand 8592 states and 25712 transitions. Second operand 11 states. [2019-12-07 10:18:36,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:36,624 INFO L93 Difference]: Finished difference Result 11316 states and 33446 transitions. [2019-12-07 10:18:36,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 10:18:36,625 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 55 [2019-12-07 10:18:36,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:36,633 INFO L225 Difference]: With dead ends: 11316 [2019-12-07 10:18:36,633 INFO L226 Difference]: Without dead ends: 9026 [2019-12-07 10:18:36,634 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=614, Unknown=0, NotChecked=0, Total=756 [2019-12-07 10:18:36,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9026 states. [2019-12-07 10:18:36,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9026 to 8134. [2019-12-07 10:18:36,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8134 states. [2019-12-07 10:18:36,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8134 states to 8134 states and 24441 transitions. [2019-12-07 10:18:36,749 INFO L78 Accepts]: Start accepts. Automaton has 8134 states and 24441 transitions. Word has length 55 [2019-12-07 10:18:36,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:36,749 INFO L462 AbstractCegarLoop]: Abstraction has 8134 states and 24441 transitions. [2019-12-07 10:18:36,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:18:36,749 INFO L276 IsEmpty]: Start isEmpty. Operand 8134 states and 24441 transitions. [2019-12-07 10:18:36,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:18:36,755 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:36,755 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:36,755 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:36,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:36,756 INFO L82 PathProgramCache]: Analyzing trace with hash 748808687, now seen corresponding path program 7 times [2019-12-07 10:18:36,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:36,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442319711] [2019-12-07 10:18:36,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:36,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:18:36,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:18:36,880 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [442319711] [2019-12-07 10:18:36,880 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:18:36,880 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:18:36,880 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1615137399] [2019-12-07 10:18:36,880 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:18:36,880 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:18:36,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:18:36,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:18:36,880 INFO L87 Difference]: Start difference. First operand 8134 states and 24441 transitions. Second operand 12 states. [2019-12-07 10:18:37,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:18:37,396 INFO L93 Difference]: Finished difference Result 9164 states and 27171 transitions. [2019-12-07 10:18:37,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:18:37,396 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 55 [2019-12-07 10:18:37,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:18:37,405 INFO L225 Difference]: With dead ends: 9164 [2019-12-07 10:18:37,405 INFO L226 Difference]: Without dead ends: 8986 [2019-12-07 10:18:37,405 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=142, Invalid=614, Unknown=0, NotChecked=0, Total=756 [2019-12-07 10:18:37,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8986 states. [2019-12-07 10:18:37,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8986 to 8030. [2019-12-07 10:18:37,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8030 states. [2019-12-07 10:18:37,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8030 states to 8030 states and 24167 transitions. [2019-12-07 10:18:37,518 INFO L78 Accepts]: Start accepts. Automaton has 8030 states and 24167 transitions. Word has length 55 [2019-12-07 10:18:37,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:18:37,518 INFO L462 AbstractCegarLoop]: Abstraction has 8030 states and 24167 transitions. [2019-12-07 10:18:37,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:18:37,518 INFO L276 IsEmpty]: Start isEmpty. Operand 8030 states and 24167 transitions. [2019-12-07 10:18:37,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 10:18:37,524 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:18:37,524 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:18:37,525 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:18:37,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:18:37,525 INFO L82 PathProgramCache]: Analyzing trace with hash 406067685, now seen corresponding path program 8 times [2019-12-07 10:18:37,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:18:37,525 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963026712] [2019-12-07 10:18:37,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:18:37,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:18:37,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:18:37,582 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:18:37,583 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:18:37,585 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff0_thd1~0_335 0) (= 0 v_~y$r_buff1_thd3~0_125) (= v_~x~0_35 0) (= v_~y$w_buff1~0_269 0) (= 0 v_~y$r_buff1_thd2~0_133) (= v_~a~0_54 0) (= v_~y$w_buff1_used~0_559 0) (= v_~main$tmp_guard1~0_48 0) (= |v_#NULL.offset_3| 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t648~0.base_28| 4)) (= 0 v_~__unbuffered_p2_EAX~0_59) (= 0 v_~y$r_buff0_thd2~0_172) (= |v_ULTIMATE.start_main_~#t648~0.offset_19| 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t648~0.base_28|) (= v_~y$read_delayed~0_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~y$w_buff0_used~0_854 0) (= 0 v_~__unbuffered_p0_EAX~0_68) (= v_~__unbuffered_p0_EBX~0_53 0) (= v_~z~0_107 0) (= 0 v_~y$r_buff0_thd3~0_136) (= v_~weak$$choice2~0_153 0) (= v_~y$mem_tmp~0_47 0) (= v_~__unbuffered_p2_EBX~0_59 0) (= v_~main$tmp_guard0~0_21 0) (= v_~__unbuffered_cnt~0_162 0) (= 0 v_~y$flush_delayed~0_90) (= 0 |v_#NULL.base_3|) (= v_~y$r_buff0_thd0~0_138 0) (= 0 v_~y$w_buff0~0_440) (= v_~y$r_buff1_thd1~0_236 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t648~0.base_28| 1)) (= 0 v_~y$read_delayed_var~0.offset_6) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t648~0.base_28| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t648~0.base_28|) |v_ULTIMATE.start_main_~#t648~0.offset_19| 0)) |v_#memory_int_17|) (= 0 v_~weak$$choice0~0_34) (= v_~y$r_buff1_thd0~0_136 0) (= v_~y~0_214 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t648~0.base_28|)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t648~0.offset=|v_ULTIMATE.start_main_~#t648~0.offset_19|, ULTIMATE.start_main_~#t650~0.base=|v_ULTIMATE.start_main_~#t650~0.base_23|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_33|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_54, ~y$mem_tmp~0=v_~y$mem_tmp~0_47, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_68, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_335, ~y$flush_delayed~0=v_~y$flush_delayed~0_90, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_59, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_59, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_53, ULTIMATE.start_main_~#t650~0.offset=|v_ULTIMATE.start_main_~#t650~0.offset_17|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~y$w_buff1~0=v_~y$w_buff1~0_269, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_172, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_162, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_136, ~x~0=v_~x~0_35, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_854, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_95|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_67|, ULTIMATE.start_main_~#t648~0.base=|v_ULTIMATE.start_main_~#t648~0.base_28|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_236, ~y$w_buff0~0=v_~y$w_buff0~0_440, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_136, ULTIMATE.start_main_~#t649~0.offset=|v_ULTIMATE.start_main_~#t649~0.offset_17|, ~y~0=v_~y~0_214, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_17|, ULTIMATE.start_main_~#t649~0.base=|v_ULTIMATE.start_main_~#t649~0.base_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_133, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_53|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_138, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_153, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_559} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t648~0.offset, ULTIMATE.start_main_~#t650~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_~#t650~0.offset, ~weak$$choice0~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t648~0.base, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t649~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t649~0.base, ~main$tmp_guard0~0, #NULL.base, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:18:37,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L831-1-->L833: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t649~0.base_11| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t649~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t649~0.base_11|) |v_ULTIMATE.start_main_~#t649~0.offset_10| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t649~0.base_11|) (not (= |v_ULTIMATE.start_main_~#t649~0.base_11| 0)) (= 0 |v_ULTIMATE.start_main_~#t649~0.offset_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t649~0.base_11|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t649~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t649~0.base=|v_ULTIMATE.start_main_~#t649~0.base_11|, ULTIMATE.start_main_~#t649~0.offset=|v_ULTIMATE.start_main_~#t649~0.offset_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t649~0.base, ULTIMATE.start_main_~#t649~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 10:18:37,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L833-1-->L835: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t650~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t650~0.base_11|) |v_ULTIMATE.start_main_~#t650~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t650~0.base_11| 4)) (= |v_ULTIMATE.start_main_~#t650~0.offset_10| 0) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t650~0.base_11|)) (not (= |v_ULTIMATE.start_main_~#t650~0.base_11| 0)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t650~0.base_11| 1)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t650~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t650~0.base=|v_ULTIMATE.start_main_~#t650~0.base_11|, ULTIMATE.start_main_~#t650~0.offset=|v_ULTIMATE.start_main_~#t650~0.offset_10|, #length=|v_#length_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t650~0.base, ULTIMATE.start_main_~#t650~0.offset, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 10:18:37,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] P1ENTRY-->L5-3: Formula: (and (not (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-802797857 0)) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-802797857 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-802797857|) (= P1Thread1of1ForFork1_~arg.base_Out-802797857 |P1Thread1of1ForFork1_#in~arg.base_In-802797857|) (= |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-802797857| (ite (not (and (not (= (mod ~y$w_buff1_used~0_Out-802797857 256) 0)) (not (= (mod ~y$w_buff0_used~0_Out-802797857 256) 0)))) 1 0)) (= 1 ~y$w_buff0~0_Out-802797857) (= |P1Thread1of1ForFork1_#in~arg.offset_In-802797857| P1Thread1of1ForFork1_~arg.offset_Out-802797857) (= ~y$w_buff0~0_In-802797857 ~y$w_buff1~0_Out-802797857) (= ~y$w_buff1_used~0_Out-802797857 ~y$w_buff0_used~0_In-802797857) (= ~y$w_buff0_used~0_Out-802797857 1)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-802797857, ~y$w_buff0~0=~y$w_buff0~0_In-802797857, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-802797857|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-802797857|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-802797857, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out-802797857, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out-802797857, ~y$w_buff1~0=~y$w_buff1~0_Out-802797857, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-802797857|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out-802797857, ~y$w_buff0~0=~y$w_buff0~0_Out-802797857, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-802797857|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-802797857|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-802797857} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:18:37,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L808-2-->L808-5: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1465915922 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1465915922 256))) (.cse0 (= |P2Thread1of1ForFork2_#t~ite33_Out-1465915922| |P2Thread1of1ForFork2_#t~ite32_Out-1465915922|))) (or (and .cse0 (= ~y$w_buff1~0_In-1465915922 |P2Thread1of1ForFork2_#t~ite32_Out-1465915922|) (not .cse1) (not .cse2)) (and (= |P2Thread1of1ForFork2_#t~ite32_Out-1465915922| ~y~0_In-1465915922) (or .cse1 .cse2) .cse0))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1465915922, ~y$w_buff1~0=~y$w_buff1~0_In-1465915922, ~y~0=~y~0_In-1465915922, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1465915922} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1465915922, ~y$w_buff1~0=~y$w_buff1~0_In-1465915922, P2Thread1of1ForFork2_#t~ite33=|P2Thread1of1ForFork2_#t~ite33_Out-1465915922|, P2Thread1of1ForFork2_#t~ite32=|P2Thread1of1ForFork2_#t~ite32_Out-1465915922|, ~y~0=~y~0_In-1465915922, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1465915922} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32] because there is no mapped edge [2019-12-07 10:18:37,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-502489412 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-502489412 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite28_Out-502489412| 0)) (and (= ~y$w_buff0_used~0_In-502489412 |P1Thread1of1ForFork1_#t~ite28_Out-502489412|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-502489412, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-502489412} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-502489412, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-502489412, P1Thread1of1ForFork1_#t~ite28=|P1Thread1of1ForFork1_#t~ite28_Out-502489412|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite28] because there is no mapped edge [2019-12-07 10:18:37,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L809-->L809-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-83853807 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-83853807 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-83853807 |P2Thread1of1ForFork2_#t~ite34_Out-83853807|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite34_Out-83853807|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-83853807, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-83853807} OutVars{P2Thread1of1ForFork2_#t~ite34=|P2Thread1of1ForFork2_#t~ite34_Out-83853807|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-83853807, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-83853807} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite34] because there is no mapped edge [2019-12-07 10:18:37,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L810-->L810-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd3~0_In-84758289 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-84758289 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-84758289 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-84758289 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite35_Out-84758289| ~y$w_buff1_used~0_In-84758289)) (and (= |P2Thread1of1ForFork2_#t~ite35_Out-84758289| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-84758289, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-84758289, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-84758289, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-84758289} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out-84758289|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-84758289, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-84758289, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-84758289, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-84758289} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35] because there is no mapped edge [2019-12-07 10:18:37,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L811-->L811-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-638984379 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-638984379 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite36_Out-638984379|)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd3~0_In-638984379 |P2Thread1of1ForFork2_#t~ite36_Out-638984379|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-638984379, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-638984379} OutVars{P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out-638984379|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-638984379, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-638984379} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 10:18:37,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1643738995 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1643738995 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1643738995 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1643738995 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite37_Out-1643738995|)) (and (= ~y$r_buff1_thd3~0_In-1643738995 |P2Thread1of1ForFork2_#t~ite37_Out-1643738995|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1643738995, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1643738995, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1643738995, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1643738995} OutVars{P2Thread1of1ForFork2_#t~ite37=|P2Thread1of1ForFork2_#t~ite37_Out-1643738995|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1643738995, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1643738995, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1643738995, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1643738995} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37] because there is no mapped edge [2019-12-07 10:18:37,591 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L812-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite37_38| v_~y$r_buff1_thd3~0_74) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 10:18:37,591 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L787-->L787-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In-2086671434 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2086671434 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-2086671434 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2086671434 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite29_Out-2086671434| ~y$w_buff1_used~0_In-2086671434)) (and (= 0 |P1Thread1of1ForFork1_#t~ite29_Out-2086671434|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2086671434, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2086671434, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2086671434, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2086671434} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2086671434, P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_Out-2086671434|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2086671434, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2086671434, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2086671434} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29] because there is no mapped edge [2019-12-07 10:18:37,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L788-->L789: Formula: (let ((.cse0 (= ~y$r_buff0_thd2~0_Out1860119885 ~y$r_buff0_thd2~0_In1860119885)) (.cse2 (= (mod ~y$r_buff0_thd2~0_In1860119885 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1860119885 256)))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse2) (not .cse1) (= ~y$r_buff0_thd2~0_Out1860119885 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1860119885, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1860119885} OutVars{P1Thread1of1ForFork1_#t~ite30=|P1Thread1of1ForFork1_#t~ite30_Out1860119885|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1860119885, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out1860119885} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite30, ~y$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 10:18:37,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L789-->L789-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In674971609 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In674971609 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In674971609 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In674971609 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite31_Out674971609|)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite31_Out674971609| ~y$r_buff1_thd2~0_In674971609) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In674971609, ~y$w_buff0_used~0=~y$w_buff0_used~0_In674971609, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In674971609, ~y$w_buff1_used~0=~y$w_buff1_used~0_In674971609} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In674971609, ~y$w_buff0_used~0=~y$w_buff0_used~0_In674971609, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out674971609|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In674971609, ~y$w_buff1_used~0=~y$w_buff1_used~0_In674971609} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 10:18:37,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L789-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite31_38| v_~y$r_buff1_thd2~0_54) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_#t~ite31, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 10:18:37,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L750-->L750-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In471939990 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite8_In471939990| |P0Thread1of1ForFork0_#t~ite8_Out471939990|) (= |P0Thread1of1ForFork0_#t~ite9_Out471939990| ~y$w_buff0~0_In471939990)) (and (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In471939990 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In471939990 256)) (and (= (mod ~y$w_buff1_used~0_In471939990 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd1~0_In471939990 256)) .cse1))) (= |P0Thread1of1ForFork0_#t~ite9_Out471939990| |P0Thread1of1ForFork0_#t~ite8_Out471939990|) (= |P0Thread1of1ForFork0_#t~ite8_Out471939990| ~y$w_buff0~0_In471939990) .cse0))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In471939990, ~y$w_buff0_used~0=~y$w_buff0_used~0_In471939990, ~y$w_buff0~0=~y$w_buff0~0_In471939990, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In471939990, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_In471939990|, ~weak$$choice2~0=~weak$$choice2~0_In471939990, ~y$w_buff1_used~0=~y$w_buff1_used~0_In471939990} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In471939990, P0Thread1of1ForFork0_#t~ite9=|P0Thread1of1ForFork0_#t~ite9_Out471939990|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In471939990, ~y$w_buff0~0=~y$w_buff0~0_In471939990, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out471939990|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In471939990, ~weak$$choice2~0=~weak$$choice2~0_In471939990, ~y$w_buff1_used~0=~y$w_buff1_used~0_In471939990} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite9, P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 10:18:37,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L751-->L751-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1003785970 256) 0))) (or (and .cse0 (= |P0Thread1of1ForFork0_#t~ite11_Out1003785970| |P0Thread1of1ForFork0_#t~ite12_Out1003785970|) (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In1003785970 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In1003785970 256)) .cse1) (and (= (mod ~y$r_buff1_thd1~0_In1003785970 256) 0) .cse1) (= 0 (mod ~y$w_buff0_used~0_In1003785970 256)))) (= |P0Thread1of1ForFork0_#t~ite11_Out1003785970| ~y$w_buff1~0_In1003785970)) (and (= |P0Thread1of1ForFork0_#t~ite12_Out1003785970| ~y$w_buff1~0_In1003785970) (= |P0Thread1of1ForFork0_#t~ite11_In1003785970| |P0Thread1of1ForFork0_#t~ite11_Out1003785970|) (not .cse0)))) InVars {P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_In1003785970|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1003785970, ~y$w_buff1~0=~y$w_buff1~0_In1003785970, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1003785970, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1003785970, ~weak$$choice2~0=~weak$$choice2~0_In1003785970, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1003785970} OutVars{P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_Out1003785970|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1003785970, ~y$w_buff1~0=~y$w_buff1~0_In1003785970, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1003785970, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1003785970, ~weak$$choice2~0=~weak$$choice2~0_In1003785970, P0Thread1of1ForFork0_#t~ite12=|P0Thread1of1ForFork0_#t~ite12_Out1003785970|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1003785970} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite11, P0Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 10:18:37,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L754-->L755-8: Formula: (and (= |v_P0Thread1of1ForFork0_#t~ite22_33| |v_P0Thread1of1ForFork0_#t~ite22_32|) (= |v_P0Thread1of1ForFork0_#t~ite23_29| |v_P0Thread1of1ForFork0_#t~ite23_28|) (= v_~y$r_buff1_thd1~0_224 |v_P0Thread1of1ForFork0_#t~ite24_30|) (= v_~y$r_buff0_thd1~0_326 v_~y$r_buff0_thd1~0_325) (not (= 0 (mod v_~weak$$choice2~0_143 256)))) InVars {P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_33|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_326, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_29|} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_32|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_35|, P0Thread1of1ForFork0_#t~ite20=|v_P0Thread1of1ForFork0_#t~ite20_46|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_325, P0Thread1of1ForFork0_#t~ite19=|v_P0Thread1of1ForFork0_#t~ite19_31|, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite24=|v_P0Thread1of1ForFork0_#t~ite24_30|, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_28|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, P0Thread1of1ForFork0_#t~ite20, ~y$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite19, P0Thread1of1ForFork0_#t~ite24, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 10:18:37,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L757-->L765: Formula: (and (not (= (mod v_~y$flush_delayed~0_17 256) 0)) (= v_~y~0_46 v_~y$mem_tmp~0_7) (= 0 v_~y$flush_delayed~0_16) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{P0Thread1of1ForFork0_#t~ite25=|v_P0Thread1of1ForFork0_#t~ite25_19|, ~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite25, ~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0] because there is no mapped edge [2019-12-07 10:18:37,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L835-1-->L841: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_42) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:18:37,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L841-2-->L841-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1577443403 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In1577443403 256)))) (or (and (= ~y~0_In1577443403 |ULTIMATE.start_main_#t~ite41_Out1577443403|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= ~y$w_buff1~0_In1577443403 |ULTIMATE.start_main_#t~ite41_Out1577443403|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1577443403, ~y~0=~y~0_In1577443403, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1577443403, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1577443403} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1577443403|, ~y$w_buff1~0=~y$w_buff1~0_In1577443403, ~y~0=~y~0_In1577443403, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1577443403, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1577443403} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 10:18:37,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L841-4-->L842: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:18:37,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L842-->L842-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1456078895 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1456078895 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out1456078895|) (not .cse1)) (and (= ~y$w_buff0_used~0_In1456078895 |ULTIMATE.start_main_#t~ite43_Out1456078895|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1456078895, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1456078895} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1456078895, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1456078895, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out1456078895|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 10:18:37,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-253548165 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-253548165 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In-253548165 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-253548165 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-253548165|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite44_Out-253548165| ~y$w_buff1_used~0_In-253548165) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-253548165, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-253548165, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-253548165, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-253548165} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-253548165, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-253548165, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-253548165, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-253548165|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-253548165} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 10:18:37,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1336276950 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In1336276950 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite45_Out1336276950| 0)) (and (= |ULTIMATE.start_main_#t~ite45_Out1336276950| ~y$r_buff0_thd0~0_In1336276950) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1336276950, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1336276950} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1336276950, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1336276950, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1336276950|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 10:18:37,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L845-->L845-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In861612963 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In861612963 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In861612963 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In861612963 256)))) (or (and (= ~y$r_buff1_thd0~0_In861612963 |ULTIMATE.start_main_#t~ite46_Out861612963|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite46_Out861612963| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In861612963, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In861612963, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In861612963, ~y$w_buff1_used~0=~y$w_buff1_used~0_In861612963} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In861612963, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In861612963, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out861612963|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In861612963, ~y$w_buff1_used~0=~y$w_buff1_used~0_In861612963} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 10:18:37,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L845-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~main$tmp_guard1~0_17 (ite (= (ite (not (and (= v_~z~0_50 2) (= 1 v_~__unbuffered_p0_EAX~0_34) (= v_~__unbuffered_p0_EBX~0_19 0) (= 2 v_~__unbuffered_p2_EAX~0_22) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start_main_#t~ite46_39| v_~y$r_buff1_thd0~0_74) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_39|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_74, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:18:37,659 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:18:37 BasicIcfg [2019-12-07 10:18:37,659 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:18:37,659 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:18:37,660 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:18:37,660 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:18:37,660 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:17:43" (3/4) ... [2019-12-07 10:18:37,662 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:18:37,662 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] ULTIMATE.startENTRY-->L831: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff0_thd1~0_335 0) (= 0 v_~y$r_buff1_thd3~0_125) (= v_~x~0_35 0) (= v_~y$w_buff1~0_269 0) (= 0 v_~y$r_buff1_thd2~0_133) (= v_~a~0_54 0) (= v_~y$w_buff1_used~0_559 0) (= v_~main$tmp_guard1~0_48 0) (= |v_#NULL.offset_3| 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t648~0.base_28| 4)) (= 0 v_~__unbuffered_p2_EAX~0_59) (= 0 v_~y$r_buff0_thd2~0_172) (= |v_ULTIMATE.start_main_~#t648~0.offset_19| 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t648~0.base_28|) (= v_~y$read_delayed~0_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~y$w_buff0_used~0_854 0) (= 0 v_~__unbuffered_p0_EAX~0_68) (= v_~__unbuffered_p0_EBX~0_53 0) (= v_~z~0_107 0) (= 0 v_~y$r_buff0_thd3~0_136) (= v_~weak$$choice2~0_153 0) (= v_~y$mem_tmp~0_47 0) (= v_~__unbuffered_p2_EBX~0_59 0) (= v_~main$tmp_guard0~0_21 0) (= v_~__unbuffered_cnt~0_162 0) (= 0 v_~y$flush_delayed~0_90) (= 0 |v_#NULL.base_3|) (= v_~y$r_buff0_thd0~0_138 0) (= 0 v_~y$w_buff0~0_440) (= v_~y$r_buff1_thd1~0_236 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t648~0.base_28| 1)) (= 0 v_~y$read_delayed_var~0.offset_6) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t648~0.base_28| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t648~0.base_28|) |v_ULTIMATE.start_main_~#t648~0.offset_19| 0)) |v_#memory_int_17|) (= 0 v_~weak$$choice0~0_34) (= v_~y$r_buff1_thd0~0_136 0) (= v_~y~0_214 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t648~0.base_28|)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t648~0.offset=|v_ULTIMATE.start_main_~#t648~0.offset_19|, ULTIMATE.start_main_~#t650~0.base=|v_ULTIMATE.start_main_~#t650~0.base_23|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_33|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_54, ~y$mem_tmp~0=v_~y$mem_tmp~0_47, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_68, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_125, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_335, ~y$flush_delayed~0=v_~y$flush_delayed~0_90, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_59, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_59, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_53, ULTIMATE.start_main_~#t650~0.offset=|v_ULTIMATE.start_main_~#t650~0.offset_17|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~y$w_buff1~0=v_~y$w_buff1~0_269, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_172, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_162, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_136, ~x~0=v_~x~0_35, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_854, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_95|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_67|, ULTIMATE.start_main_~#t648~0.base=|v_ULTIMATE.start_main_~#t648~0.base_28|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_37|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_236, ~y$w_buff0~0=v_~y$w_buff0~0_440, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_136, ULTIMATE.start_main_~#t649~0.offset=|v_ULTIMATE.start_main_~#t649~0.offset_17|, ~y~0=v_~y~0_214, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_17|, ULTIMATE.start_main_~#t649~0.base=|v_ULTIMATE.start_main_~#t649~0.base_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, #NULL.base=|v_#NULL.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_133, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_53|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_138, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_107, ~weak$$choice2~0=v_~weak$$choice2~0_153, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_559} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t648~0.offset, ULTIMATE.start_main_~#t650~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_~#t650~0.offset, ~weak$$choice0~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t648~0.base, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t649~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t649~0.base, ~main$tmp_guard0~0, #NULL.base, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:18:37,662 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L831-1-->L833: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t649~0.base_11| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t649~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t649~0.base_11|) |v_ULTIMATE.start_main_~#t649~0.offset_10| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t649~0.base_11|) (not (= |v_ULTIMATE.start_main_~#t649~0.base_11| 0)) (= 0 |v_ULTIMATE.start_main_~#t649~0.offset_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t649~0.base_11|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t649~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t649~0.base=|v_ULTIMATE.start_main_~#t649~0.base_11|, ULTIMATE.start_main_~#t649~0.offset=|v_ULTIMATE.start_main_~#t649~0.offset_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t649~0.base, ULTIMATE.start_main_~#t649~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 10:18:37,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L833-1-->L835: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t650~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t650~0.base_11|) |v_ULTIMATE.start_main_~#t650~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t650~0.base_11| 4)) (= |v_ULTIMATE.start_main_~#t650~0.offset_10| 0) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t650~0.base_11|)) (not (= |v_ULTIMATE.start_main_~#t650~0.base_11| 0)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t650~0.base_11| 1)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t650~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t650~0.base=|v_ULTIMATE.start_main_~#t650~0.base_11|, ULTIMATE.start_main_~#t650~0.offset=|v_ULTIMATE.start_main_~#t650~0.offset_10|, #length=|v_#length_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_6|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t650~0.base, ULTIMATE.start_main_~#t650~0.offset, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 10:18:37,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] P1ENTRY-->L5-3: Formula: (and (not (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-802797857 0)) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-802797857 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-802797857|) (= P1Thread1of1ForFork1_~arg.base_Out-802797857 |P1Thread1of1ForFork1_#in~arg.base_In-802797857|) (= |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-802797857| (ite (not (and (not (= (mod ~y$w_buff1_used~0_Out-802797857 256) 0)) (not (= (mod ~y$w_buff0_used~0_Out-802797857 256) 0)))) 1 0)) (= 1 ~y$w_buff0~0_Out-802797857) (= |P1Thread1of1ForFork1_#in~arg.offset_In-802797857| P1Thread1of1ForFork1_~arg.offset_Out-802797857) (= ~y$w_buff0~0_In-802797857 ~y$w_buff1~0_Out-802797857) (= ~y$w_buff1_used~0_Out-802797857 ~y$w_buff0_used~0_In-802797857) (= ~y$w_buff0_used~0_Out-802797857 1)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-802797857, ~y$w_buff0~0=~y$w_buff0~0_In-802797857, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-802797857|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-802797857|} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-802797857, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out-802797857, ~y$w_buff0_used~0=~y$w_buff0_used~0_Out-802797857, ~y$w_buff1~0=~y$w_buff1~0_Out-802797857, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-802797857|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out-802797857, ~y$w_buff0~0=~y$w_buff0~0_Out-802797857, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-802797857|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-802797857|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-802797857} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, P1Thread1of1ForFork1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~y$w_buff0~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:18:37,664 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L808-2-->L808-5: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1465915922 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1465915922 256))) (.cse0 (= |P2Thread1of1ForFork2_#t~ite33_Out-1465915922| |P2Thread1of1ForFork2_#t~ite32_Out-1465915922|))) (or (and .cse0 (= ~y$w_buff1~0_In-1465915922 |P2Thread1of1ForFork2_#t~ite32_Out-1465915922|) (not .cse1) (not .cse2)) (and (= |P2Thread1of1ForFork2_#t~ite32_Out-1465915922| ~y~0_In-1465915922) (or .cse1 .cse2) .cse0))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1465915922, ~y$w_buff1~0=~y$w_buff1~0_In-1465915922, ~y~0=~y~0_In-1465915922, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1465915922} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1465915922, ~y$w_buff1~0=~y$w_buff1~0_In-1465915922, P2Thread1of1ForFork2_#t~ite33=|P2Thread1of1ForFork2_#t~ite33_Out-1465915922|, P2Thread1of1ForFork2_#t~ite32=|P2Thread1of1ForFork2_#t~ite32_Out-1465915922|, ~y~0=~y~0_In-1465915922, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1465915922} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32] because there is no mapped edge [2019-12-07 10:18:37,665 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-502489412 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-502489412 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite28_Out-502489412| 0)) (and (= ~y$w_buff0_used~0_In-502489412 |P1Thread1of1ForFork1_#t~ite28_Out-502489412|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-502489412, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-502489412} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-502489412, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-502489412, P1Thread1of1ForFork1_#t~ite28=|P1Thread1of1ForFork1_#t~ite28_Out-502489412|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite28] because there is no mapped edge [2019-12-07 10:18:37,665 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L809-->L809-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-83853807 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-83853807 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-83853807 |P2Thread1of1ForFork2_#t~ite34_Out-83853807|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite34_Out-83853807|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-83853807, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-83853807} OutVars{P2Thread1of1ForFork2_#t~ite34=|P2Thread1of1ForFork2_#t~ite34_Out-83853807|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-83853807, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-83853807} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite34] because there is no mapped edge [2019-12-07 10:18:37,665 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L810-->L810-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd3~0_In-84758289 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-84758289 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-84758289 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-84758289 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite35_Out-84758289| ~y$w_buff1_used~0_In-84758289)) (and (= |P2Thread1of1ForFork2_#t~ite35_Out-84758289| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-84758289, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-84758289, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-84758289, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-84758289} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out-84758289|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-84758289, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-84758289, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-84758289, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-84758289} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35] because there is no mapped edge [2019-12-07 10:18:37,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L811-->L811-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-638984379 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-638984379 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite36_Out-638984379|)) (and (or .cse0 .cse1) (= ~y$r_buff0_thd3~0_In-638984379 |P2Thread1of1ForFork2_#t~ite36_Out-638984379|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-638984379, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-638984379} OutVars{P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out-638984379|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-638984379, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-638984379} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 10:18:37,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1643738995 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1643738995 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-1643738995 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1643738995 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite37_Out-1643738995|)) (and (= ~y$r_buff1_thd3~0_In-1643738995 |P2Thread1of1ForFork2_#t~ite37_Out-1643738995|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1643738995, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1643738995, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1643738995, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1643738995} OutVars{P2Thread1of1ForFork2_#t~ite37=|P2Thread1of1ForFork2_#t~ite37_Out-1643738995|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1643738995, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1643738995, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1643738995, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1643738995} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37] because there is no mapped edge [2019-12-07 10:18:37,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L812-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite37_38| v_~y$r_buff1_thd3~0_74) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 10:18:37,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L787-->L787-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In-2086671434 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2086671434 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-2086671434 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2086671434 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite29_Out-2086671434| ~y$w_buff1_used~0_In-2086671434)) (and (= 0 |P1Thread1of1ForFork1_#t~ite29_Out-2086671434|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2086671434, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2086671434, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2086671434, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2086671434} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2086671434, P1Thread1of1ForFork1_#t~ite29=|P1Thread1of1ForFork1_#t~ite29_Out-2086671434|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2086671434, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2086671434, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2086671434} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite29] because there is no mapped edge [2019-12-07 10:18:37,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L788-->L789: Formula: (let ((.cse0 (= ~y$r_buff0_thd2~0_Out1860119885 ~y$r_buff0_thd2~0_In1860119885)) (.cse2 (= (mod ~y$r_buff0_thd2~0_In1860119885 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1860119885 256)))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse2) (not .cse1) (= ~y$r_buff0_thd2~0_Out1860119885 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1860119885, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1860119885} OutVars{P1Thread1of1ForFork1_#t~ite30=|P1Thread1of1ForFork1_#t~ite30_Out1860119885|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1860119885, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_Out1860119885} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite30, ~y$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 10:18:37,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L789-->L789-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In674971609 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In674971609 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In674971609 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In674971609 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite31_Out674971609|)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite31_Out674971609| ~y$r_buff1_thd2~0_In674971609) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In674971609, ~y$w_buff0_used~0=~y$w_buff0_used~0_In674971609, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In674971609, ~y$w_buff1_used~0=~y$w_buff1_used~0_In674971609} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In674971609, ~y$w_buff0_used~0=~y$w_buff0_used~0_In674971609, P1Thread1of1ForFork1_#t~ite31=|P1Thread1of1ForFork1_#t~ite31_Out674971609|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In674971609, ~y$w_buff1_used~0=~y$w_buff1_used~0_In674971609} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite31] because there is no mapped edge [2019-12-07 10:18:37,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L789-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite31_38| v_~y$r_buff1_thd2~0_54) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_#t~ite31=|v_P1Thread1of1ForFork1_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_#t~ite31, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 10:18:37,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L750-->L750-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In471939990 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite8_In471939990| |P0Thread1of1ForFork0_#t~ite8_Out471939990|) (= |P0Thread1of1ForFork0_#t~ite9_Out471939990| ~y$w_buff0~0_In471939990)) (and (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In471939990 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In471939990 256)) (and (= (mod ~y$w_buff1_used~0_In471939990 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd1~0_In471939990 256)) .cse1))) (= |P0Thread1of1ForFork0_#t~ite9_Out471939990| |P0Thread1of1ForFork0_#t~ite8_Out471939990|) (= |P0Thread1of1ForFork0_#t~ite8_Out471939990| ~y$w_buff0~0_In471939990) .cse0))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In471939990, ~y$w_buff0_used~0=~y$w_buff0_used~0_In471939990, ~y$w_buff0~0=~y$w_buff0~0_In471939990, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In471939990, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_In471939990|, ~weak$$choice2~0=~weak$$choice2~0_In471939990, ~y$w_buff1_used~0=~y$w_buff1_used~0_In471939990} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In471939990, P0Thread1of1ForFork0_#t~ite9=|P0Thread1of1ForFork0_#t~ite9_Out471939990|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In471939990, ~y$w_buff0~0=~y$w_buff0~0_In471939990, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out471939990|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In471939990, ~weak$$choice2~0=~weak$$choice2~0_In471939990, ~y$w_buff1_used~0=~y$w_buff1_used~0_In471939990} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite9, P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 10:18:37,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L751-->L751-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1003785970 256) 0))) (or (and .cse0 (= |P0Thread1of1ForFork0_#t~ite11_Out1003785970| |P0Thread1of1ForFork0_#t~ite12_Out1003785970|) (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In1003785970 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In1003785970 256)) .cse1) (and (= (mod ~y$r_buff1_thd1~0_In1003785970 256) 0) .cse1) (= 0 (mod ~y$w_buff0_used~0_In1003785970 256)))) (= |P0Thread1of1ForFork0_#t~ite11_Out1003785970| ~y$w_buff1~0_In1003785970)) (and (= |P0Thread1of1ForFork0_#t~ite12_Out1003785970| ~y$w_buff1~0_In1003785970) (= |P0Thread1of1ForFork0_#t~ite11_In1003785970| |P0Thread1of1ForFork0_#t~ite11_Out1003785970|) (not .cse0)))) InVars {P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_In1003785970|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1003785970, ~y$w_buff1~0=~y$w_buff1~0_In1003785970, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1003785970, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1003785970, ~weak$$choice2~0=~weak$$choice2~0_In1003785970, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1003785970} OutVars{P0Thread1of1ForFork0_#t~ite11=|P0Thread1of1ForFork0_#t~ite11_Out1003785970|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1003785970, ~y$w_buff1~0=~y$w_buff1~0_In1003785970, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1003785970, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1003785970, ~weak$$choice2~0=~weak$$choice2~0_In1003785970, P0Thread1of1ForFork0_#t~ite12=|P0Thread1of1ForFork0_#t~ite12_Out1003785970|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1003785970} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite11, P0Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 10:18:37,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L754-->L755-8: Formula: (and (= |v_P0Thread1of1ForFork0_#t~ite22_33| |v_P0Thread1of1ForFork0_#t~ite22_32|) (= |v_P0Thread1of1ForFork0_#t~ite23_29| |v_P0Thread1of1ForFork0_#t~ite23_28|) (= v_~y$r_buff1_thd1~0_224 |v_P0Thread1of1ForFork0_#t~ite24_30|) (= v_~y$r_buff0_thd1~0_326 v_~y$r_buff0_thd1~0_325) (not (= 0 (mod v_~weak$$choice2~0_143 256)))) InVars {P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_33|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_326, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_29|} OutVars{P0Thread1of1ForFork0_#t~ite22=|v_P0Thread1of1ForFork0_#t~ite22_32|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_224, P0Thread1of1ForFork0_#t~ite21=|v_P0Thread1of1ForFork0_#t~ite21_35|, P0Thread1of1ForFork0_#t~ite20=|v_P0Thread1of1ForFork0_#t~ite20_46|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_325, P0Thread1of1ForFork0_#t~ite19=|v_P0Thread1of1ForFork0_#t~ite19_31|, ~weak$$choice2~0=v_~weak$$choice2~0_143, P0Thread1of1ForFork0_#t~ite24=|v_P0Thread1of1ForFork0_#t~ite24_30|, P0Thread1of1ForFork0_#t~ite23=|v_P0Thread1of1ForFork0_#t~ite23_28|} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite22, P0Thread1of1ForFork0_#t~ite21, P0Thread1of1ForFork0_#t~ite20, ~y$r_buff0_thd1~0, P0Thread1of1ForFork0_#t~ite19, P0Thread1of1ForFork0_#t~ite24, P0Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 10:18:37,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L757-->L765: Formula: (and (not (= (mod v_~y$flush_delayed~0_17 256) 0)) (= v_~y~0_46 v_~y$mem_tmp~0_7) (= 0 v_~y$flush_delayed~0_16) (= (+ v_~__unbuffered_cnt~0_36 1) v_~__unbuffered_cnt~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{P0Thread1of1ForFork0_#t~ite25=|v_P0Thread1of1ForFork0_#t~ite25_19|, ~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite25, ~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0] because there is no mapped edge [2019-12-07 10:18:37,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L835-1-->L841: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_42) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42} OutVars{ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:18:37,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L841-2-->L841-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1577443403 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In1577443403 256)))) (or (and (= ~y~0_In1577443403 |ULTIMATE.start_main_#t~ite41_Out1577443403|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= ~y$w_buff1~0_In1577443403 |ULTIMATE.start_main_#t~ite41_Out1577443403|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1577443403, ~y~0=~y~0_In1577443403, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1577443403, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1577443403} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1577443403|, ~y$w_buff1~0=~y$w_buff1~0_In1577443403, ~y~0=~y~0_In1577443403, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1577443403, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1577443403} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 10:18:37,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L841-4-->L842: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:18:37,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L842-->L842-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1456078895 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1456078895 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out1456078895|) (not .cse1)) (and (= ~y$w_buff0_used~0_In1456078895 |ULTIMATE.start_main_#t~ite43_Out1456078895|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1456078895, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1456078895} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1456078895, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1456078895, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out1456078895|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 10:18:37,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-253548165 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-253548165 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In-253548165 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-253548165 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-253548165|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite44_Out-253548165| ~y$w_buff1_used~0_In-253548165) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-253548165, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-253548165, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-253548165, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-253548165} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-253548165, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-253548165, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-253548165, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-253548165|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-253548165} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 10:18:37,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1336276950 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In1336276950 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite45_Out1336276950| 0)) (and (= |ULTIMATE.start_main_#t~ite45_Out1336276950| ~y$r_buff0_thd0~0_In1336276950) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1336276950, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1336276950} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1336276950, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1336276950, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1336276950|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 10:18:37,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L845-->L845-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In861612963 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In861612963 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In861612963 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In861612963 256)))) (or (and (= ~y$r_buff1_thd0~0_In861612963 |ULTIMATE.start_main_#t~ite46_Out861612963|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite46_Out861612963| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In861612963, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In861612963, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In861612963, ~y$w_buff1_used~0=~y$w_buff1_used~0_In861612963} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In861612963, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In861612963, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out861612963|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In861612963, ~y$w_buff1_used~0=~y$w_buff1_used~0_In861612963} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 10:18:37,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L845-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= v_~main$tmp_guard1~0_17 (ite (= (ite (not (and (= v_~z~0_50 2) (= 1 v_~__unbuffered_p0_EAX~0_34) (= v_~__unbuffered_p0_EBX~0_19 0) (= 2 v_~__unbuffered_p2_EAX~0_22) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start_main_#t~ite46_39| v_~y$r_buff1_thd0~0_74) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_39|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_34, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~z~0=v_~z~0_50, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_74, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:18:37,733 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_076adf61-a89f-41ee-aaa1-4a661628452e/bin/uautomizer/witness.graphml [2019-12-07 10:18:37,733 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:18:37,734 INFO L168 Benchmark]: Toolchain (without parser) took 55331.91 ms. Allocated memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: 3.3 GB). Free memory was 939.3 MB in the beginning and 2.2 GB in the end (delta: -1.3 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. [2019-12-07 10:18:37,735 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:18:37,735 INFO L168 Benchmark]: CACSL2BoogieTranslator took 424.99 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.9 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -155.2 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. [2019-12-07 10:18:37,736 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.28 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:18:37,736 INFO L168 Benchmark]: Boogie Preprocessor took 23.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:18:37,736 INFO L168 Benchmark]: RCFGBuilder took 393.04 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 58.9 MB). Peak memory consumption was 58.9 MB. Max. memory is 11.5 GB. [2019-12-07 10:18:37,737 INFO L168 Benchmark]: TraceAbstraction took 54376.80 ms. Allocated memory was 1.2 GB in the beginning and 4.3 GB in the end (delta: 3.2 GB). Free memory was 1.0 GB in the beginning and 2.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. [2019-12-07 10:18:37,737 INFO L168 Benchmark]: Witness Printer took 73.80 ms. Allocated memory is still 4.3 GB. Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2019-12-07 10:18:37,739 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 424.99 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.9 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -155.2 MB). Peak memory consumption was 22.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.28 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.74 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 393.04 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 58.9 MB). Peak memory consumption was 58.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 54376.80 ms. Allocated memory was 1.2 GB in the beginning and 4.3 GB in the end (delta: 3.2 GB). Free memory was 1.0 GB in the beginning and 2.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 2.0 GB. Max. memory is 11.5 GB. * Witness Printer took 73.80 ms. Allocated memory is still 4.3 GB. Free memory was 2.2 GB in the beginning and 2.2 GB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 166 ProgramPointsBefore, 83 ProgramPointsAfterwards, 197 TransitionsBefore, 90 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 31 ConcurrentYvCompositions, 28 ChoiceCompositions, 6616 VarBasedMoverChecksPositive, 243 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 263 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 74173 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L831] FCALL, FORK 0 pthread_create(&t648, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L833] FCALL, FORK 0 pthread_create(&t649, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L835] FCALL, FORK 0 pthread_create(&t650, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L776] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L777] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L778] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L779] 2 y$r_buff0_thd2 = (_Bool)1 [L782] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L785] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] 3 z = 2 [L802] 3 __unbuffered_p2_EAX = z [L805] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L808] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L808] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L809] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L810] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L811] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L786] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L787] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L736] 1 a = 1 [L739] 1 x = 1 [L742] 1 __unbuffered_p0_EAX = x [L745] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L746] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L747] 1 y$flush_delayed = weak$$choice2 [L748] 1 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L749] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L749] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L750] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L751] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L752] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L753] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L755] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L756] 1 __unbuffered_p0_EBX = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L841] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L842] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L843] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L844] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 157 locations, 2 error locations. Result: UNSAFE, OverallTime: 54.2s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 20.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6183 SDtfs, 10959 SDslu, 22548 SDs, 0 SdLazy, 14568 SolverSat, 728 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 522 GetRequests, 61 SyntacticMatches, 28 SemanticMatches, 433 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3323 ImplicationChecksByTransitivity, 6.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=82802occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 17.8s AutomataMinimizationTime, 34 MinimizatonAttempts, 189431 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 1394 NumberOfCodeBlocks, 1394 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1305 ConstructedInterpolants, 0 QuantifiedInterpolants, 400311 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...