./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 242971a9ba6c52a5d6aebad81b4037b1db49bef9 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:48:49,378 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:48:49,380 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:48:49,387 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:48:49,387 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:48:49,388 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:48:49,388 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:48:49,390 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:48:49,391 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:48:49,392 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:48:49,392 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:48:49,393 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:48:49,393 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:48:49,394 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:48:49,395 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:48:49,395 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:48:49,396 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:48:49,397 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:48:49,398 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:48:49,399 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:48:49,400 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:48:49,401 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:48:49,402 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:48:49,402 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:48:49,404 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:48:49,404 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:48:49,404 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:48:49,405 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:48:49,405 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:48:49,406 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:48:49,406 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:48:49,406 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:48:49,407 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:48:49,407 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:48:49,408 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:48:49,408 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:48:49,408 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:48:49,409 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:48:49,409 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:48:49,409 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:48:49,410 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:48:49,410 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:48:49,420 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:48:49,420 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:48:49,421 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:48:49,421 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:48:49,421 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:48:49,421 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:48:49,421 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:48:49,421 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:48:49,421 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:48:49,422 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:48:49,422 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:48:49,422 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:48:49,422 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:48:49,422 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:48:49,422 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:48:49,422 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:48:49,423 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:48:49,423 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:48:49,423 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:48:49,423 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:48:49,423 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:48:49,423 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:48:49,423 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:48:49,424 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:48:49,424 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:48:49,424 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:48:49,424 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:48:49,424 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:48:49,424 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:48:49,424 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 242971a9ba6c52a5d6aebad81b4037b1db49bef9 [2019-12-07 17:48:49,522 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:48:49,530 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:48:49,533 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:48:49,534 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:48:49,535 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:48:49,535 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix024_tso.oepc.i [2019-12-07 17:48:49,574 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/data/aa0929f47/786c316f2071452bbd9334c08b51b862/FLAGa4b12241c [2019-12-07 17:48:49,955 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:48:49,956 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/sv-benchmarks/c/pthread-wmm/mix024_tso.oepc.i [2019-12-07 17:48:49,967 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/data/aa0929f47/786c316f2071452bbd9334c08b51b862/FLAGa4b12241c [2019-12-07 17:48:49,977 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/data/aa0929f47/786c316f2071452bbd9334c08b51b862 [2019-12-07 17:48:49,979 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:48:49,980 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:48:49,980 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:48:49,980 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:48:49,983 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:48:49,983 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:48:49" (1/1) ... [2019-12-07 17:48:49,985 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:49, skipping insertion in model container [2019-12-07 17:48:49,985 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:48:49" (1/1) ... [2019-12-07 17:48:49,990 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:48:50,021 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:48:50,271 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:48:50,278 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:48:50,324 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:48:50,371 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:48:50,372 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50 WrapperNode [2019-12-07 17:48:50,372 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:48:50,372 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:48:50,373 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:48:50,373 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:48:50,378 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,392 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,411 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:48:50,411 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:48:50,411 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:48:50,411 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:48:50,418 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,418 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,421 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,421 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,429 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,432 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,434 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... [2019-12-07 17:48:50,437 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:48:50,438 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:48:50,438 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:48:50,438 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:48:50,438 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:48:50,480 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:48:50,480 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:48:50,480 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:48:50,480 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:48:50,480 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:48:50,480 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:48:50,480 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:48:50,480 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:48:50,480 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:48:50,480 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:48:50,480 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:48:50,481 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:48:50,481 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:48:50,482 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:48:50,847 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:48:50,847 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:48:50,848 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:48:50 BoogieIcfgContainer [2019-12-07 17:48:50,848 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:48:50,849 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:48:50,849 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:48:50,850 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:48:50,851 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:48:49" (1/3) ... [2019-12-07 17:48:50,851 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2449c595 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:48:50, skipping insertion in model container [2019-12-07 17:48:50,851 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:48:50" (2/3) ... [2019-12-07 17:48:50,852 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2449c595 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:48:50, skipping insertion in model container [2019-12-07 17:48:50,852 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:48:50" (3/3) ... [2019-12-07 17:48:50,853 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_tso.oepc.i [2019-12-07 17:48:50,859 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:48:50,859 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:48:50,864 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:48:50,865 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:48:50,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,891 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,891 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,891 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,891 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,892 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,892 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,892 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,896 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,896 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,896 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,897 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,900 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,901 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:48:50,925 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:48:50,937 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:48:50,937 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:48:50,937 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:48:50,937 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:48:50,937 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:48:50,938 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:48:50,938 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:48:50,938 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:48:50,950 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 17:48:50,951 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 17:48:51,006 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 17:48:51,006 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:48:51,017 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:48:51,034 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 17:48:51,066 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 17:48:51,066 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:48:51,072 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:48:51,087 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:48:51,088 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:48:54,042 WARN L192 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 17:48:54,149 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78858 [2019-12-07 17:48:54,149 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 17:48:54,151 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 17:49:08,787 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115112 states. [2019-12-07 17:49:08,789 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states. [2019-12-07 17:49:08,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:49:08,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:08,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:49:08,793 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:08,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:08,797 INFO L82 PathProgramCache]: Analyzing trace with hash 917918, now seen corresponding path program 1 times [2019-12-07 17:49:08,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:08,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97057532] [2019-12-07 17:49:08,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:08,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:08,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:08,932 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97057532] [2019-12-07 17:49:08,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:08,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:49:08,933 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30959248] [2019-12-07 17:49:08,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:08,936 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:08,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:08,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:08,946 INFO L87 Difference]: Start difference. First operand 115112 states. Second operand 3 states. [2019-12-07 17:49:09,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:09,666 INFO L93 Difference]: Finished difference Result 114110 states and 484570 transitions. [2019-12-07 17:49:09,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:09,667 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:49:09,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:10,307 INFO L225 Difference]: With dead ends: 114110 [2019-12-07 17:49:10,307 INFO L226 Difference]: Without dead ends: 107012 [2019-12-07 17:49:10,309 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:14,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107012 states. [2019-12-07 17:49:17,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107012 to 107012. [2019-12-07 17:49:17,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107012 states. [2019-12-07 17:49:17,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107012 states to 107012 states and 453812 transitions. [2019-12-07 17:49:17,717 INFO L78 Accepts]: Start accepts. Automaton has 107012 states and 453812 transitions. Word has length 3 [2019-12-07 17:49:17,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:17,717 INFO L462 AbstractCegarLoop]: Abstraction has 107012 states and 453812 transitions. [2019-12-07 17:49:17,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:17,718 INFO L276 IsEmpty]: Start isEmpty. Operand 107012 states and 453812 transitions. [2019-12-07 17:49:17,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:49:17,721 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:17,721 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:17,721 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:17,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:17,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1578322365, now seen corresponding path program 1 times [2019-12-07 17:49:17,722 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:17,722 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307790180] [2019-12-07 17:49:17,722 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:17,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:17,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:17,786 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307790180] [2019-12-07 17:49:17,787 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:17,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:17,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [461083461] [2019-12-07 17:49:17,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:49:17,788 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:17,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:49:17,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:49:17,788 INFO L87 Difference]: Start difference. First operand 107012 states and 453812 transitions. Second operand 4 states. [2019-12-07 17:49:18,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:18,821 INFO L93 Difference]: Finished difference Result 166210 states and 677236 transitions. [2019-12-07 17:49:18,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:49:18,822 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:49:18,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:19,215 INFO L225 Difference]: With dead ends: 166210 [2019-12-07 17:49:19,215 INFO L226 Difference]: Without dead ends: 166161 [2019-12-07 17:49:19,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:24,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166161 states. [2019-12-07 17:49:28,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166161 to 151748. [2019-12-07 17:49:28,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151748 states. [2019-12-07 17:49:28,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151748 states to 151748 states and 626089 transitions. [2019-12-07 17:49:28,698 INFO L78 Accepts]: Start accepts. Automaton has 151748 states and 626089 transitions. Word has length 11 [2019-12-07 17:49:28,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:28,698 INFO L462 AbstractCegarLoop]: Abstraction has 151748 states and 626089 transitions. [2019-12-07 17:49:28,698 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:49:28,698 INFO L276 IsEmpty]: Start isEmpty. Operand 151748 states and 626089 transitions. [2019-12-07 17:49:28,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:49:28,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:28,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:28,705 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:28,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:28,705 INFO L82 PathProgramCache]: Analyzing trace with hash 608601994, now seen corresponding path program 1 times [2019-12-07 17:49:28,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:28,705 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227892688] [2019-12-07 17:49:28,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:28,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:28,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:28,753 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227892688] [2019-12-07 17:49:28,754 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:28,754 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:28,754 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817480979] [2019-12-07 17:49:28,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:49:28,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:28,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:49:28,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:49:28,755 INFO L87 Difference]: Start difference. First operand 151748 states and 626089 transitions. Second operand 4 states. [2019-12-07 17:49:29,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:29,802 INFO L93 Difference]: Finished difference Result 218525 states and 880843 transitions. [2019-12-07 17:49:29,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:49:29,802 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:49:29,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:30,376 INFO L225 Difference]: With dead ends: 218525 [2019-12-07 17:49:30,376 INFO L226 Difference]: Without dead ends: 218469 [2019-12-07 17:49:30,376 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:38,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218469 states. [2019-12-07 17:49:41,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218469 to 182894. [2019-12-07 17:49:41,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182894 states. [2019-12-07 17:49:42,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182894 states to 182894 states and 750285 transitions. [2019-12-07 17:49:42,077 INFO L78 Accepts]: Start accepts. Automaton has 182894 states and 750285 transitions. Word has length 13 [2019-12-07 17:49:42,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:42,078 INFO L462 AbstractCegarLoop]: Abstraction has 182894 states and 750285 transitions. [2019-12-07 17:49:42,078 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:49:42,078 INFO L276 IsEmpty]: Start isEmpty. Operand 182894 states and 750285 transitions. [2019-12-07 17:49:42,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:49:42,085 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:42,085 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:42,085 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:42,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:42,086 INFO L82 PathProgramCache]: Analyzing trace with hash -1174763718, now seen corresponding path program 1 times [2019-12-07 17:49:42,086 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:42,086 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [140613148] [2019-12-07 17:49:42,086 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:42,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:42,135 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:42,136 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [140613148] [2019-12-07 17:49:42,136 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:42,136 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:42,136 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694918445] [2019-12-07 17:49:42,136 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:42,136 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:42,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:42,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:42,137 INFO L87 Difference]: Start difference. First operand 182894 states and 750285 transitions. Second operand 5 states. [2019-12-07 17:49:43,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:43,360 INFO L93 Difference]: Finished difference Result 246966 states and 1003484 transitions. [2019-12-07 17:49:43,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:49:43,360 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 17:49:43,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:43,974 INFO L225 Difference]: With dead ends: 246966 [2019-12-07 17:49:43,974 INFO L226 Difference]: Without dead ends: 246966 [2019-12-07 17:49:43,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:50,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246966 states. [2019-12-07 17:49:56,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246966 to 202377. [2019-12-07 17:49:56,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202377 states. [2019-12-07 17:49:56,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202377 states to 202377 states and 829448 transitions. [2019-12-07 17:49:56,727 INFO L78 Accepts]: Start accepts. Automaton has 202377 states and 829448 transitions. Word has length 16 [2019-12-07 17:49:56,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:56,727 INFO L462 AbstractCegarLoop]: Abstraction has 202377 states and 829448 transitions. [2019-12-07 17:49:56,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:56,727 INFO L276 IsEmpty]: Start isEmpty. Operand 202377 states and 829448 transitions. [2019-12-07 17:49:56,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:49:56,740 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:56,741 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:56,741 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:56,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:56,741 INFO L82 PathProgramCache]: Analyzing trace with hash -1130186099, now seen corresponding path program 1 times [2019-12-07 17:49:56,741 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:56,741 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567126598] [2019-12-07 17:49:56,741 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:56,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:56,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:56,821 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567126598] [2019-12-07 17:49:56,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:56,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:49:56,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110090540] [2019-12-07 17:49:56,821 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:56,821 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:56,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:56,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:56,822 INFO L87 Difference]: Start difference. First operand 202377 states and 829448 transitions. Second operand 3 states. [2019-12-07 17:49:58,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:58,802 INFO L93 Difference]: Finished difference Result 360373 states and 1469997 transitions. [2019-12-07 17:49:58,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:58,803 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:49:58,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:59,606 INFO L225 Difference]: With dead ends: 360373 [2019-12-07 17:49:59,607 INFO L226 Difference]: Without dead ends: 326981 [2019-12-07 17:49:59,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:07,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326981 states. [2019-12-07 17:50:11,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326981 to 314611. [2019-12-07 17:50:11,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314611 states. [2019-12-07 17:50:12,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314611 states to 314611 states and 1292003 transitions. [2019-12-07 17:50:12,834 INFO L78 Accepts]: Start accepts. Automaton has 314611 states and 1292003 transitions. Word has length 18 [2019-12-07 17:50:12,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:12,835 INFO L462 AbstractCegarLoop]: Abstraction has 314611 states and 1292003 transitions. [2019-12-07 17:50:12,835 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:12,835 INFO L276 IsEmpty]: Start isEmpty. Operand 314611 states and 1292003 transitions. [2019-12-07 17:50:12,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:50:12,855 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:12,855 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:12,855 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:12,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:12,855 INFO L82 PathProgramCache]: Analyzing trace with hash -1770026118, now seen corresponding path program 1 times [2019-12-07 17:50:12,855 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:12,855 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766908366] [2019-12-07 17:50:12,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:12,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:12,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:12,888 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [766908366] [2019-12-07 17:50:12,888 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:12,888 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:50:12,888 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1875189943] [2019-12-07 17:50:12,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:50:12,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:12,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:50:12,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:12,889 INFO L87 Difference]: Start difference. First operand 314611 states and 1292003 transitions. Second operand 3 states. [2019-12-07 17:50:13,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:13,067 INFO L93 Difference]: Finished difference Result 56352 states and 182969 transitions. [2019-12-07 17:50:13,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:13,068 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:50:13,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:13,154 INFO L225 Difference]: With dead ends: 56352 [2019-12-07 17:50:13,154 INFO L226 Difference]: Without dead ends: 56352 [2019-12-07 17:50:13,155 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:13,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56352 states. [2019-12-07 17:50:14,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56352 to 56212. [2019-12-07 17:50:14,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56212 states. [2019-12-07 17:50:14,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56212 states to 56212 states and 182569 transitions. [2019-12-07 17:50:14,467 INFO L78 Accepts]: Start accepts. Automaton has 56212 states and 182569 transitions. Word has length 19 [2019-12-07 17:50:14,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:14,467 INFO L462 AbstractCegarLoop]: Abstraction has 56212 states and 182569 transitions. [2019-12-07 17:50:14,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:14,467 INFO L276 IsEmpty]: Start isEmpty. Operand 56212 states and 182569 transitions. [2019-12-07 17:50:14,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:50:14,476 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:14,476 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:14,476 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:14,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:14,476 INFO L82 PathProgramCache]: Analyzing trace with hash -219431606, now seen corresponding path program 1 times [2019-12-07 17:50:14,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:14,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272373363] [2019-12-07 17:50:14,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:14,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:14,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:14,533 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272373363] [2019-12-07 17:50:14,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:14,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:50:14,534 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1987272838] [2019-12-07 17:50:14,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:50:14,534 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:14,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:50:14,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:50:14,535 INFO L87 Difference]: Start difference. First operand 56212 states and 182569 transitions. Second operand 6 states. [2019-12-07 17:50:15,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:15,169 INFO L93 Difference]: Finished difference Result 78644 states and 249563 transitions. [2019-12-07 17:50:15,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:50:15,170 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 17:50:15,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:15,289 INFO L225 Difference]: With dead ends: 78644 [2019-12-07 17:50:15,289 INFO L226 Difference]: Without dead ends: 78637 [2019-12-07 17:50:15,289 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:50:15,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78637 states. [2019-12-07 17:50:16,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78637 to 57478. [2019-12-07 17:50:16,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57478 states. [2019-12-07 17:50:17,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57478 states to 57478 states and 185683 transitions. [2019-12-07 17:50:17,871 INFO L78 Accepts]: Start accepts. Automaton has 57478 states and 185683 transitions. Word has length 22 [2019-12-07 17:50:17,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:17,871 INFO L462 AbstractCegarLoop]: Abstraction has 57478 states and 185683 transitions. [2019-12-07 17:50:17,871 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:50:17,872 INFO L276 IsEmpty]: Start isEmpty. Operand 57478 states and 185683 transitions. [2019-12-07 17:50:17,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:50:17,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:17,884 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:17,884 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:17,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:17,884 INFO L82 PathProgramCache]: Analyzing trace with hash -2132778958, now seen corresponding path program 1 times [2019-12-07 17:50:17,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:17,884 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119960569] [2019-12-07 17:50:17,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:17,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:17,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:17,912 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119960569] [2019-12-07 17:50:17,912 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:17,912 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:17,912 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [708172807] [2019-12-07 17:50:17,912 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:50:17,912 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:17,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:50:17,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:50:17,912 INFO L87 Difference]: Start difference. First operand 57478 states and 185683 transitions. Second operand 4 states. [2019-12-07 17:50:17,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:17,971 INFO L93 Difference]: Finished difference Result 23873 states and 73205 transitions. [2019-12-07 17:50:17,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:50:17,972 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 17:50:17,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:17,998 INFO L225 Difference]: With dead ends: 23873 [2019-12-07 17:50:17,998 INFO L226 Difference]: Without dead ends: 23873 [2019-12-07 17:50:17,998 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:50:18,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23873 states. [2019-12-07 17:50:18,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23873 to 22627. [2019-12-07 17:50:18,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22627 states. [2019-12-07 17:50:18,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22627 states to 22627 states and 69400 transitions. [2019-12-07 17:50:18,330 INFO L78 Accepts]: Start accepts. Automaton has 22627 states and 69400 transitions. Word has length 25 [2019-12-07 17:50:18,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:18,330 INFO L462 AbstractCegarLoop]: Abstraction has 22627 states and 69400 transitions. [2019-12-07 17:50:18,330 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:50:18,330 INFO L276 IsEmpty]: Start isEmpty. Operand 22627 states and 69400 transitions. [2019-12-07 17:50:18,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:50:18,344 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:18,344 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:18,344 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:18,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:18,344 INFO L82 PathProgramCache]: Analyzing trace with hash 1790545903, now seen corresponding path program 1 times [2019-12-07 17:50:18,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:18,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721393598] [2019-12-07 17:50:18,345 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:18,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:18,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:18,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721393598] [2019-12-07 17:50:18,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:18,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:50:18,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677519841] [2019-12-07 17:50:18,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:50:18,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:18,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:50:18,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:50:18,390 INFO L87 Difference]: Start difference. First operand 22627 states and 69400 transitions. Second operand 6 states. [2019-12-07 17:50:18,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:18,731 INFO L93 Difference]: Finished difference Result 30554 states and 91395 transitions. [2019-12-07 17:50:18,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:50:18,732 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 17:50:18,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:18,767 INFO L225 Difference]: With dead ends: 30554 [2019-12-07 17:50:18,767 INFO L226 Difference]: Without dead ends: 30554 [2019-12-07 17:50:18,767 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:50:18,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30554 states. [2019-12-07 17:50:19,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30554 to 25589. [2019-12-07 17:50:19,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25589 states. [2019-12-07 17:50:19,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25589 states to 25589 states and 78135 transitions. [2019-12-07 17:50:19,174 INFO L78 Accepts]: Start accepts. Automaton has 25589 states and 78135 transitions. Word has length 27 [2019-12-07 17:50:19,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:19,174 INFO L462 AbstractCegarLoop]: Abstraction has 25589 states and 78135 transitions. [2019-12-07 17:50:19,174 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:50:19,174 INFO L276 IsEmpty]: Start isEmpty. Operand 25589 states and 78135 transitions. [2019-12-07 17:50:19,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 17:50:19,199 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:19,199 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:19,199 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:19,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:19,200 INFO L82 PathProgramCache]: Analyzing trace with hash -718999585, now seen corresponding path program 1 times [2019-12-07 17:50:19,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:19,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273477284] [2019-12-07 17:50:19,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:19,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:19,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:19,253 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [273477284] [2019-12-07 17:50:19,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:19,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:50:19,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [146853472] [2019-12-07 17:50:19,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:50:19,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:19,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:50:19,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:50:19,254 INFO L87 Difference]: Start difference. First operand 25589 states and 78135 transitions. Second operand 7 states. [2019-12-07 17:50:19,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:19,884 INFO L93 Difference]: Finished difference Result 32882 states and 97956 transitions. [2019-12-07 17:50:19,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:50:19,884 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 17:50:19,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:19,921 INFO L225 Difference]: With dead ends: 32882 [2019-12-07 17:50:19,921 INFO L226 Difference]: Without dead ends: 32882 [2019-12-07 17:50:19,922 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:50:20,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32882 states. [2019-12-07 17:50:20,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32882 to 23340. [2019-12-07 17:50:20,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23340 states. [2019-12-07 17:50:20,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23340 states to 23340 states and 71436 transitions. [2019-12-07 17:50:20,307 INFO L78 Accepts]: Start accepts. Automaton has 23340 states and 71436 transitions. Word has length 33 [2019-12-07 17:50:20,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:20,307 INFO L462 AbstractCegarLoop]: Abstraction has 23340 states and 71436 transitions. [2019-12-07 17:50:20,307 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:50:20,307 INFO L276 IsEmpty]: Start isEmpty. Operand 23340 states and 71436 transitions. [2019-12-07 17:50:20,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 17:50:20,327 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:20,327 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:20,328 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:20,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:20,328 INFO L82 PathProgramCache]: Analyzing trace with hash -1488715022, now seen corresponding path program 1 times [2019-12-07 17:50:20,328 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:20,328 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802940312] [2019-12-07 17:50:20,328 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:20,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:20,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:20,357 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802940312] [2019-12-07 17:50:20,357 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:20,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:50:20,357 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623201820] [2019-12-07 17:50:20,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:50:20,357 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:20,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:50:20,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:20,358 INFO L87 Difference]: Start difference. First operand 23340 states and 71436 transitions. Second operand 3 states. [2019-12-07 17:50:20,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:20,441 INFO L93 Difference]: Finished difference Result 22028 states and 66331 transitions. [2019-12-07 17:50:20,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:20,442 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 17:50:20,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:20,465 INFO L225 Difference]: With dead ends: 22028 [2019-12-07 17:50:20,465 INFO L226 Difference]: Without dead ends: 22028 [2019-12-07 17:50:20,465 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:20,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22028 states. [2019-12-07 17:50:20,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22028 to 22024. [2019-12-07 17:50:20,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22024 states. [2019-12-07 17:50:20,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22024 states to 22024 states and 66323 transitions. [2019-12-07 17:50:20,761 INFO L78 Accepts]: Start accepts. Automaton has 22024 states and 66323 transitions. Word has length 39 [2019-12-07 17:50:20,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:20,761 INFO L462 AbstractCegarLoop]: Abstraction has 22024 states and 66323 transitions. [2019-12-07 17:50:20,761 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:20,761 INFO L276 IsEmpty]: Start isEmpty. Operand 22024 states and 66323 transitions. [2019-12-07 17:50:20,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:50:20,779 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:20,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:20,780 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:20,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:20,780 INFO L82 PathProgramCache]: Analyzing trace with hash -1216727354, now seen corresponding path program 1 times [2019-12-07 17:50:20,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:20,780 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602021807] [2019-12-07 17:50:20,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:20,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:20,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:20,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [602021807] [2019-12-07 17:50:20,849 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:20,849 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:50:20,849 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1713081743] [2019-12-07 17:50:20,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:50:20,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:20,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:50:20,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:50:20,850 INFO L87 Difference]: Start difference. First operand 22024 states and 66323 transitions. Second operand 5 states. [2019-12-07 17:50:21,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:21,265 INFO L93 Difference]: Finished difference Result 32048 states and 95524 transitions. [2019-12-07 17:50:21,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:50:21,266 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 17:50:21,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:21,300 INFO L225 Difference]: With dead ends: 32048 [2019-12-07 17:50:21,301 INFO L226 Difference]: Without dead ends: 32048 [2019-12-07 17:50:21,301 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:50:21,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32048 states. [2019-12-07 17:50:21,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32048 to 29862. [2019-12-07 17:50:21,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29862 states. [2019-12-07 17:50:21,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29862 states to 29862 states and 89565 transitions. [2019-12-07 17:50:21,752 INFO L78 Accepts]: Start accepts. Automaton has 29862 states and 89565 transitions. Word has length 40 [2019-12-07 17:50:21,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:21,753 INFO L462 AbstractCegarLoop]: Abstraction has 29862 states and 89565 transitions. [2019-12-07 17:50:21,753 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:50:21,753 INFO L276 IsEmpty]: Start isEmpty. Operand 29862 states and 89565 transitions. [2019-12-07 17:50:21,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:50:21,780 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:21,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:21,780 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:21,781 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:21,781 INFO L82 PathProgramCache]: Analyzing trace with hash 1361686320, now seen corresponding path program 2 times [2019-12-07 17:50:21,781 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:21,781 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052782118] [2019-12-07 17:50:21,781 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:21,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:21,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:21,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052782118] [2019-12-07 17:50:21,827 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:21,827 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:50:21,827 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [52608113] [2019-12-07 17:50:21,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:50:21,827 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:21,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:50:21,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:50:21,828 INFO L87 Difference]: Start difference. First operand 29862 states and 89565 transitions. Second operand 5 states. [2019-12-07 17:50:22,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:22,116 INFO L93 Difference]: Finished difference Result 36517 states and 108363 transitions. [2019-12-07 17:50:22,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:50:22,116 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 17:50:22,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:22,156 INFO L225 Difference]: With dead ends: 36517 [2019-12-07 17:50:22,156 INFO L226 Difference]: Without dead ends: 36517 [2019-12-07 17:50:22,157 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:50:22,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36517 states. [2019-12-07 17:50:22,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36517 to 31247. [2019-12-07 17:50:22,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31247 states. [2019-12-07 17:50:22,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31247 states to 31247 states and 93726 transitions. [2019-12-07 17:50:22,638 INFO L78 Accepts]: Start accepts. Automaton has 31247 states and 93726 transitions. Word has length 40 [2019-12-07 17:50:22,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:22,638 INFO L462 AbstractCegarLoop]: Abstraction has 31247 states and 93726 transitions. [2019-12-07 17:50:22,638 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:50:22,638 INFO L276 IsEmpty]: Start isEmpty. Operand 31247 states and 93726 transitions. [2019-12-07 17:50:22,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:50:22,665 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:22,665 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:22,666 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:22,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:22,666 INFO L82 PathProgramCache]: Analyzing trace with hash 1126068974, now seen corresponding path program 3 times [2019-12-07 17:50:22,666 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:22,666 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415934854] [2019-12-07 17:50:22,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:22,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:22,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:22,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415934854] [2019-12-07 17:50:22,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:22,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:50:22,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [646292998] [2019-12-07 17:50:22,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:50:22,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:22,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:50:22,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:22,701 INFO L87 Difference]: Start difference. First operand 31247 states and 93726 transitions. Second operand 3 states. [2019-12-07 17:50:22,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:22,822 INFO L93 Difference]: Finished difference Result 31247 states and 93630 transitions. [2019-12-07 17:50:22,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:22,822 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 17:50:22,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:22,859 INFO L225 Difference]: With dead ends: 31247 [2019-12-07 17:50:22,859 INFO L226 Difference]: Without dead ends: 31247 [2019-12-07 17:50:22,859 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:22,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31247 states. [2019-12-07 17:50:23,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31247 to 26772. [2019-12-07 17:50:23,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26772 states. [2019-12-07 17:50:23,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26772 states to 26772 states and 81242 transitions. [2019-12-07 17:50:23,264 INFO L78 Accepts]: Start accepts. Automaton has 26772 states and 81242 transitions. Word has length 40 [2019-12-07 17:50:23,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:23,265 INFO L462 AbstractCegarLoop]: Abstraction has 26772 states and 81242 transitions. [2019-12-07 17:50:23,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:23,265 INFO L276 IsEmpty]: Start isEmpty. Operand 26772 states and 81242 transitions. [2019-12-07 17:50:23,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:50:23,289 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:23,289 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:23,289 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:23,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:23,290 INFO L82 PathProgramCache]: Analyzing trace with hash -1421190175, now seen corresponding path program 1 times [2019-12-07 17:50:23,290 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:23,290 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800322727] [2019-12-07 17:50:23,290 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:23,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:23,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:23,357 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800322727] [2019-12-07 17:50:23,357 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:23,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:23,358 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233198450] [2019-12-07 17:50:23,358 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:50:23,358 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:23,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:50:23,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:50:23,358 INFO L87 Difference]: Start difference. First operand 26772 states and 81242 transitions. Second operand 4 states. [2019-12-07 17:50:23,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:23,471 INFO L93 Difference]: Finished difference Result 42255 states and 128241 transitions. [2019-12-07 17:50:23,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:50:23,472 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 41 [2019-12-07 17:50:23,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:23,493 INFO L225 Difference]: With dead ends: 42255 [2019-12-07 17:50:23,493 INFO L226 Difference]: Without dead ends: 19196 [2019-12-07 17:50:23,493 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:50:23,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19196 states. [2019-12-07 17:50:23,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19196 to 18202. [2019-12-07 17:50:23,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18202 states. [2019-12-07 17:50:23,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18202 states to 18202 states and 53725 transitions. [2019-12-07 17:50:23,751 INFO L78 Accepts]: Start accepts. Automaton has 18202 states and 53725 transitions. Word has length 41 [2019-12-07 17:50:23,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:23,751 INFO L462 AbstractCegarLoop]: Abstraction has 18202 states and 53725 transitions. [2019-12-07 17:50:23,752 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:50:23,752 INFO L276 IsEmpty]: Start isEmpty. Operand 18202 states and 53725 transitions. [2019-12-07 17:50:23,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 17:50:23,766 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:23,766 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:23,766 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:23,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:23,766 INFO L82 PathProgramCache]: Analyzing trace with hash 1695955148, now seen corresponding path program 1 times [2019-12-07 17:50:23,766 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:23,767 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1534034914] [2019-12-07 17:50:23,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:23,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:23,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:23,804 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1534034914] [2019-12-07 17:50:23,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:23,805 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:50:23,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [208239617] [2019-12-07 17:50:23,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:50:23,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:23,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:50:23,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:50:23,805 INFO L87 Difference]: Start difference. First operand 18202 states and 53725 transitions. Second operand 5 states. [2019-12-07 17:50:23,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:23,860 INFO L93 Difference]: Finished difference Result 17077 states and 51263 transitions. [2019-12-07 17:50:23,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:50:23,860 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 17:50:23,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:23,878 INFO L225 Difference]: With dead ends: 17077 [2019-12-07 17:50:23,878 INFO L226 Difference]: Without dead ends: 15754 [2019-12-07 17:50:23,878 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:50:23,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15754 states. [2019-12-07 17:50:24,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15754 to 15754. [2019-12-07 17:50:24,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15754 states. [2019-12-07 17:50:24,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15754 states to 15754 states and 48373 transitions. [2019-12-07 17:50:24,093 INFO L78 Accepts]: Start accepts. Automaton has 15754 states and 48373 transitions. Word has length 42 [2019-12-07 17:50:24,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:24,093 INFO L462 AbstractCegarLoop]: Abstraction has 15754 states and 48373 transitions. [2019-12-07 17:50:24,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:50:24,093 INFO L276 IsEmpty]: Start isEmpty. Operand 15754 states and 48373 transitions. [2019-12-07 17:50:24,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:24,106 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:24,106 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:24,106 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:24,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:24,106 INFO L82 PathProgramCache]: Analyzing trace with hash 2131512672, now seen corresponding path program 1 times [2019-12-07 17:50:24,106 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:24,106 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271139889] [2019-12-07 17:50:24,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:24,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:24,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:24,131 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271139889] [2019-12-07 17:50:24,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:24,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:24,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959296821] [2019-12-07 17:50:24,132 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:50:24,132 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:24,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:50:24,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:24,133 INFO L87 Difference]: Start difference. First operand 15754 states and 48373 transitions. Second operand 3 states. [2019-12-07 17:50:24,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:24,208 INFO L93 Difference]: Finished difference Result 22206 states and 67546 transitions. [2019-12-07 17:50:24,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:24,208 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:50:24,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:24,231 INFO L225 Difference]: With dead ends: 22206 [2019-12-07 17:50:24,231 INFO L226 Difference]: Without dead ends: 22206 [2019-12-07 17:50:24,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:24,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22206 states. [2019-12-07 17:50:24,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22206 to 17290. [2019-12-07 17:50:24,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17290 states. [2019-12-07 17:50:24,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17290 states to 17290 states and 52878 transitions. [2019-12-07 17:50:24,510 INFO L78 Accepts]: Start accepts. Automaton has 17290 states and 52878 transitions. Word has length 66 [2019-12-07 17:50:24,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:24,511 INFO L462 AbstractCegarLoop]: Abstraction has 17290 states and 52878 transitions. [2019-12-07 17:50:24,511 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:24,511 INFO L276 IsEmpty]: Start isEmpty. Operand 17290 states and 52878 transitions. [2019-12-07 17:50:24,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:24,528 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:24,528 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:24,528 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:24,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:24,529 INFO L82 PathProgramCache]: Analyzing trace with hash -795885678, now seen corresponding path program 1 times [2019-12-07 17:50:24,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:24,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11042030] [2019-12-07 17:50:24,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:24,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:24,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:24,579 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [11042030] [2019-12-07 17:50:24,579 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:24,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:50:24,579 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067970024] [2019-12-07 17:50:24,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:50:24,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:24,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:50:24,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:50:24,580 INFO L87 Difference]: Start difference. First operand 17290 states and 52878 transitions. Second operand 5 states. [2019-12-07 17:50:24,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:24,806 INFO L93 Difference]: Finished difference Result 19010 states and 57640 transitions. [2019-12-07 17:50:24,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:50:24,806 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 17:50:24,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:24,826 INFO L225 Difference]: With dead ends: 19010 [2019-12-07 17:50:24,826 INFO L226 Difference]: Without dead ends: 19010 [2019-12-07 17:50:24,826 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:50:24,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19010 states. [2019-12-07 17:50:25,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19010 to 17406. [2019-12-07 17:50:25,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17406 states. [2019-12-07 17:50:25,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17406 states to 17406 states and 53244 transitions. [2019-12-07 17:50:25,105 INFO L78 Accepts]: Start accepts. Automaton has 17406 states and 53244 transitions. Word has length 66 [2019-12-07 17:50:25,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:25,105 INFO L462 AbstractCegarLoop]: Abstraction has 17406 states and 53244 transitions. [2019-12-07 17:50:25,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:50:25,105 INFO L276 IsEmpty]: Start isEmpty. Operand 17406 states and 53244 transitions. [2019-12-07 17:50:25,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:25,119 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:25,119 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:25,119 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:25,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:25,120 INFO L82 PathProgramCache]: Analyzing trace with hash -456705074, now seen corresponding path program 2 times [2019-12-07 17:50:25,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:25,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [947480422] [2019-12-07 17:50:25,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:25,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:25,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:25,183 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [947480422] [2019-12-07 17:50:25,183 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:25,183 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:25,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1782653871] [2019-12-07 17:50:25,184 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:50:25,184 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:25,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:50:25,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:50:25,184 INFO L87 Difference]: Start difference. First operand 17406 states and 53244 transitions. Second operand 4 states. [2019-12-07 17:50:25,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:25,272 INFO L93 Difference]: Finished difference Result 30493 states and 93529 transitions. [2019-12-07 17:50:25,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:50:25,272 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 17:50:25,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:25,302 INFO L225 Difference]: With dead ends: 30493 [2019-12-07 17:50:25,303 INFO L226 Difference]: Without dead ends: 26853 [2019-12-07 17:50:25,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:50:25,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26853 states. [2019-12-07 17:50:25,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26853 to 16762. [2019-12-07 17:50:25,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16762 states. [2019-12-07 17:50:25,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16762 states to 16762 states and 51241 transitions. [2019-12-07 17:50:25,601 INFO L78 Accepts]: Start accepts. Automaton has 16762 states and 51241 transitions. Word has length 66 [2019-12-07 17:50:25,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:25,601 INFO L462 AbstractCegarLoop]: Abstraction has 16762 states and 51241 transitions. [2019-12-07 17:50:25,601 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:50:25,601 INFO L276 IsEmpty]: Start isEmpty. Operand 16762 states and 51241 transitions. [2019-12-07 17:50:25,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:25,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:25,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:25,617 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:25,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:25,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1255297360, now seen corresponding path program 3 times [2019-12-07 17:50:25,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:25,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616433852] [2019-12-07 17:50:25,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:25,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:25,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:25,720 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616433852] [2019-12-07 17:50:25,720 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:25,720 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:50:25,720 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204149222] [2019-12-07 17:50:25,721 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:50:25,721 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:25,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:50:25,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:50:25,721 INFO L87 Difference]: Start difference. First operand 16762 states and 51241 transitions. Second operand 8 states. [2019-12-07 17:50:26,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:26,460 INFO L93 Difference]: Finished difference Result 66045 states and 200018 transitions. [2019-12-07 17:50:26,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 17:50:26,461 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 17:50:26,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:26,522 INFO L225 Difference]: With dead ends: 66045 [2019-12-07 17:50:26,522 INFO L226 Difference]: Without dead ends: 48000 [2019-12-07 17:50:26,522 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 151 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:50:26,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48000 states. [2019-12-07 17:50:26,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48000 to 19335. [2019-12-07 17:50:26,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19335 states. [2019-12-07 17:50:27,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19335 states to 19335 states and 58764 transitions. [2019-12-07 17:50:27,004 INFO L78 Accepts]: Start accepts. Automaton has 19335 states and 58764 transitions. Word has length 66 [2019-12-07 17:50:27,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:27,005 INFO L462 AbstractCegarLoop]: Abstraction has 19335 states and 58764 transitions. [2019-12-07 17:50:27,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:50:27,005 INFO L276 IsEmpty]: Start isEmpty. Operand 19335 states and 58764 transitions. [2019-12-07 17:50:27,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:27,020 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:27,021 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:27,021 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:27,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:27,021 INFO L82 PathProgramCache]: Analyzing trace with hash -474377046, now seen corresponding path program 4 times [2019-12-07 17:50:27,021 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:27,021 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [762115600] [2019-12-07 17:50:27,021 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:27,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:27,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:27,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [762115600] [2019-12-07 17:50:27,059 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:27,059 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:27,059 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685781961] [2019-12-07 17:50:27,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:50:27,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:27,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:50:27,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:50:27,059 INFO L87 Difference]: Start difference. First operand 19335 states and 58764 transitions. Second operand 4 states. [2019-12-07 17:50:27,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:27,133 INFO L93 Difference]: Finished difference Result 30751 states and 93646 transitions. [2019-12-07 17:50:27,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:50:27,133 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 17:50:27,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:27,145 INFO L225 Difference]: With dead ends: 30751 [2019-12-07 17:50:27,145 INFO L226 Difference]: Without dead ends: 11529 [2019-12-07 17:50:27,146 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:50:27,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11529 states. [2019-12-07 17:50:27,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11529 to 11529. [2019-12-07 17:50:27,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11529 states. [2019-12-07 17:50:27,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11529 states to 11529 states and 35138 transitions. [2019-12-07 17:50:27,307 INFO L78 Accepts]: Start accepts. Automaton has 11529 states and 35138 transitions. Word has length 66 [2019-12-07 17:50:27,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:27,307 INFO L462 AbstractCegarLoop]: Abstraction has 11529 states and 35138 transitions. [2019-12-07 17:50:27,307 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:50:27,307 INFO L276 IsEmpty]: Start isEmpty. Operand 11529 states and 35138 transitions. [2019-12-07 17:50:27,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:27,316 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:27,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:27,317 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:27,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:27,317 INFO L82 PathProgramCache]: Analyzing trace with hash 1338482558, now seen corresponding path program 5 times [2019-12-07 17:50:27,317 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:27,317 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791675281] [2019-12-07 17:50:27,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:27,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:27,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:27,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791675281] [2019-12-07 17:50:27,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:27,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:50:27,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051212724] [2019-12-07 17:50:27,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:50:27,472 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:27,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:50:27,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:50:27,472 INFO L87 Difference]: Start difference. First operand 11529 states and 35138 transitions. Second operand 10 states. [2019-12-07 17:50:28,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:28,103 INFO L93 Difference]: Finished difference Result 19134 states and 57429 transitions. [2019-12-07 17:50:28,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:50:28,103 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 17:50:28,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:28,118 INFO L225 Difference]: With dead ends: 19134 [2019-12-07 17:50:28,119 INFO L226 Difference]: Without dead ends: 14551 [2019-12-07 17:50:28,119 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-12-07 17:50:28,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14551 states. [2019-12-07 17:50:28,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14551 to 11946. [2019-12-07 17:50:28,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11946 states. [2019-12-07 17:50:28,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11946 states to 11946 states and 36021 transitions. [2019-12-07 17:50:28,311 INFO L78 Accepts]: Start accepts. Automaton has 11946 states and 36021 transitions. Word has length 66 [2019-12-07 17:50:28,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:28,311 INFO L462 AbstractCegarLoop]: Abstraction has 11946 states and 36021 transitions. [2019-12-07 17:50:28,311 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:50:28,311 INFO L276 IsEmpty]: Start isEmpty. Operand 11946 states and 36021 transitions. [2019-12-07 17:50:28,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:28,320 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:28,321 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:28,321 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:28,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:28,321 INFO L82 PathProgramCache]: Analyzing trace with hash -1282024016, now seen corresponding path program 6 times [2019-12-07 17:50:28,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:28,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151072646] [2019-12-07 17:50:28,321 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:28,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:28,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:28,369 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151072646] [2019-12-07 17:50:28,369 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:28,369 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:50:28,369 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531730599] [2019-12-07 17:50:28,369 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:50:28,369 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:28,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:50:28,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:50:28,370 INFO L87 Difference]: Start difference. First operand 11946 states and 36021 transitions. Second operand 7 states. [2019-12-07 17:50:28,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:28,529 INFO L93 Difference]: Finished difference Result 21160 states and 62801 transitions. [2019-12-07 17:50:28,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 17:50:28,530 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 17:50:28,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:28,545 INFO L225 Difference]: With dead ends: 21160 [2019-12-07 17:50:28,545 INFO L226 Difference]: Without dead ends: 15392 [2019-12-07 17:50:28,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:50:28,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15392 states. [2019-12-07 17:50:28,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15392 to 12408. [2019-12-07 17:50:28,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12408 states. [2019-12-07 17:50:28,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12408 states to 12408 states and 37295 transitions. [2019-12-07 17:50:28,748 INFO L78 Accepts]: Start accepts. Automaton has 12408 states and 37295 transitions. Word has length 66 [2019-12-07 17:50:28,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:28,748 INFO L462 AbstractCegarLoop]: Abstraction has 12408 states and 37295 transitions. [2019-12-07 17:50:28,748 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:50:28,748 INFO L276 IsEmpty]: Start isEmpty. Operand 12408 states and 37295 transitions. [2019-12-07 17:50:28,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:28,759 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:28,759 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:28,759 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:28,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:28,759 INFO L82 PathProgramCache]: Analyzing trace with hash 1667111342, now seen corresponding path program 7 times [2019-12-07 17:50:28,760 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:28,760 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510725140] [2019-12-07 17:50:28,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:28,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:28,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:28,867 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510725140] [2019-12-07 17:50:28,867 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:28,867 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:50:28,867 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [758377137] [2019-12-07 17:50:28,867 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:50:28,868 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:28,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:50:28,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:50:28,868 INFO L87 Difference]: Start difference. First operand 12408 states and 37295 transitions. Second operand 11 states. [2019-12-07 17:50:29,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:29,525 INFO L93 Difference]: Finished difference Result 19949 states and 59264 transitions. [2019-12-07 17:50:29,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:50:29,525 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 17:50:29,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:29,540 INFO L225 Difference]: With dead ends: 19949 [2019-12-07 17:50:29,540 INFO L226 Difference]: Without dead ends: 15077 [2019-12-07 17:50:29,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 17:50:29,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15077 states. [2019-12-07 17:50:29,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15077 to 12286. [2019-12-07 17:50:29,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12286 states. [2019-12-07 17:50:29,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12286 states to 12286 states and 36899 transitions. [2019-12-07 17:50:29,726 INFO L78 Accepts]: Start accepts. Automaton has 12286 states and 36899 transitions. Word has length 66 [2019-12-07 17:50:29,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:29,727 INFO L462 AbstractCegarLoop]: Abstraction has 12286 states and 36899 transitions. [2019-12-07 17:50:29,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:50:29,727 INFO L276 IsEmpty]: Start isEmpty. Operand 12286 states and 36899 transitions. [2019-12-07 17:50:29,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:29,737 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:29,737 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:29,737 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:29,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:29,737 INFO L82 PathProgramCache]: Analyzing trace with hash 1662390436, now seen corresponding path program 8 times [2019-12-07 17:50:29,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:29,737 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405073070] [2019-12-07 17:50:29,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:29,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:29,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:29,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405073070] [2019-12-07 17:50:29,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:29,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:50:29,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734325766] [2019-12-07 17:50:29,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:50:29,845 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:29,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:50:29,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:50:29,845 INFO L87 Difference]: Start difference. First operand 12286 states and 36899 transitions. Second operand 10 states. [2019-12-07 17:50:30,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:30,270 INFO L93 Difference]: Finished difference Result 19142 states and 56755 transitions. [2019-12-07 17:50:30,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 17:50:30,270 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 17:50:30,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:30,285 INFO L225 Difference]: With dead ends: 19142 [2019-12-07 17:50:30,285 INFO L226 Difference]: Without dead ends: 15264 [2019-12-07 17:50:30,286 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=480, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:50:30,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15264 states. [2019-12-07 17:50:30,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15264 to 12308. [2019-12-07 17:50:30,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12308 states. [2019-12-07 17:50:30,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12308 states to 12308 states and 36901 transitions. [2019-12-07 17:50:30,480 INFO L78 Accepts]: Start accepts. Automaton has 12308 states and 36901 transitions. Word has length 66 [2019-12-07 17:50:30,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:30,480 INFO L462 AbstractCegarLoop]: Abstraction has 12308 states and 36901 transitions. [2019-12-07 17:50:30,480 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:50:30,480 INFO L276 IsEmpty]: Start isEmpty. Operand 12308 states and 36901 transitions. [2019-12-07 17:50:30,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:30,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:30,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:30,491 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:30,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:30,491 INFO L82 PathProgramCache]: Analyzing trace with hash 1119890552, now seen corresponding path program 9 times [2019-12-07 17:50:30,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:30,492 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871924251] [2019-12-07 17:50:30,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:30,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:30,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:30,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871924251] [2019-12-07 17:50:30,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:30,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:50:30,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355308640] [2019-12-07 17:50:30,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:50:30,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:30,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:50:30,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:50:30,623 INFO L87 Difference]: Start difference. First operand 12308 states and 36901 transitions. Second operand 11 states. [2019-12-07 17:50:31,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:31,287 INFO L93 Difference]: Finished difference Result 18330 states and 54295 transitions. [2019-12-07 17:50:31,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 17:50:31,287 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 17:50:31,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:31,302 INFO L225 Difference]: With dead ends: 18330 [2019-12-07 17:50:31,302 INFO L226 Difference]: Without dead ends: 14528 [2019-12-07 17:50:31,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 298 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=241, Invalid=1019, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 17:50:31,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14528 states. [2019-12-07 17:50:31,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14528 to 12000. [2019-12-07 17:50:31,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12000 states. [2019-12-07 17:50:31,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12000 states to 12000 states and 35968 transitions. [2019-12-07 17:50:31,487 INFO L78 Accepts]: Start accepts. Automaton has 12000 states and 35968 transitions. Word has length 66 [2019-12-07 17:50:31,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:31,487 INFO L462 AbstractCegarLoop]: Abstraction has 12000 states and 35968 transitions. [2019-12-07 17:50:31,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:50:31,487 INFO L276 IsEmpty]: Start isEmpty. Operand 12000 states and 35968 transitions. [2019-12-07 17:50:31,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:31,496 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:31,496 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:31,496 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:31,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:31,496 INFO L82 PathProgramCache]: Analyzing trace with hash -1011009474, now seen corresponding path program 10 times [2019-12-07 17:50:31,496 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:31,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673654469] [2019-12-07 17:50:31,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:31,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:31,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:31,618 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673654469] [2019-12-07 17:50:31,618 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:31,618 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:50:31,618 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1409180653] [2019-12-07 17:50:31,619 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:50:31,619 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:31,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:50:31,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:50:31,619 INFO L87 Difference]: Start difference. First operand 12000 states and 35968 transitions. Second operand 12 states. [2019-12-07 17:50:32,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:32,049 INFO L93 Difference]: Finished difference Result 14703 states and 43473 transitions. [2019-12-07 17:50:32,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 17:50:32,049 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 17:50:32,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:32,063 INFO L225 Difference]: With dead ends: 14703 [2019-12-07 17:50:32,063 INFO L226 Difference]: Without dead ends: 14496 [2019-12-07 17:50:32,064 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:50:32,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14496 states. [2019-12-07 17:50:32,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14496 to 11824. [2019-12-07 17:50:32,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11824 states. [2019-12-07 17:50:32,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11824 states to 11824 states and 35496 transitions. [2019-12-07 17:50:32,247 INFO L78 Accepts]: Start accepts. Automaton has 11824 states and 35496 transitions. Word has length 66 [2019-12-07 17:50:32,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:32,247 INFO L462 AbstractCegarLoop]: Abstraction has 11824 states and 35496 transitions. [2019-12-07 17:50:32,247 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:50:32,248 INFO L276 IsEmpty]: Start isEmpty. Operand 11824 states and 35496 transitions. [2019-12-07 17:50:32,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:32,257 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:32,257 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:32,257 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:32,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:32,257 INFO L82 PathProgramCache]: Analyzing trace with hash -71109482, now seen corresponding path program 11 times [2019-12-07 17:50:32,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:32,257 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745488167] [2019-12-07 17:50:32,257 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:32,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:32,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:32,401 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745488167] [2019-12-07 17:50:32,401 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:32,401 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:50:32,401 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705694730] [2019-12-07 17:50:32,401 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:50:32,402 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:32,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:50:32,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:50:32,402 INFO L87 Difference]: Start difference. First operand 11824 states and 35496 transitions. Second operand 10 states. [2019-12-07 17:50:33,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:33,349 INFO L93 Difference]: Finished difference Result 21898 states and 64219 transitions. [2019-12-07 17:50:33,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:50:33,350 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 17:50:33,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:33,375 INFO L225 Difference]: With dead ends: 21898 [2019-12-07 17:50:33,376 INFO L226 Difference]: Without dead ends: 21634 [2019-12-07 17:50:33,376 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2019-12-07 17:50:33,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21634 states. [2019-12-07 17:50:33,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21634 to 14338. [2019-12-07 17:50:33,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14338 states. [2019-12-07 17:50:33,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14338 states to 14338 states and 42817 transitions. [2019-12-07 17:50:33,627 INFO L78 Accepts]: Start accepts. Automaton has 14338 states and 42817 transitions. Word has length 66 [2019-12-07 17:50:33,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:33,627 INFO L462 AbstractCegarLoop]: Abstraction has 14338 states and 42817 transitions. [2019-12-07 17:50:33,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:50:33,628 INFO L276 IsEmpty]: Start isEmpty. Operand 14338 states and 42817 transitions. [2019-12-07 17:50:33,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:33,640 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:33,640 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:33,640 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:33,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:33,640 INFO L82 PathProgramCache]: Analyzing trace with hash -914309490, now seen corresponding path program 12 times [2019-12-07 17:50:33,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:33,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209971683] [2019-12-07 17:50:33,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:33,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:33,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:33,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209971683] [2019-12-07 17:50:33,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:33,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:50:33,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [595788928] [2019-12-07 17:50:33,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:50:33,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:33,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:50:33,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:50:33,734 INFO L87 Difference]: Start difference. First operand 14338 states and 42817 transitions. Second operand 9 states. [2019-12-07 17:50:34,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:34,591 INFO L93 Difference]: Finished difference Result 21445 states and 62754 transitions. [2019-12-07 17:50:34,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 17:50:34,592 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 17:50:34,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:34,623 INFO L225 Difference]: With dead ends: 21445 [2019-12-07 17:50:34,623 INFO L226 Difference]: Without dead ends: 21445 [2019-12-07 17:50:34,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:50:34,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21445 states. [2019-12-07 17:50:34,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21445 to 14673. [2019-12-07 17:50:34,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14673 states. [2019-12-07 17:50:34,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14673 states to 14673 states and 43618 transitions. [2019-12-07 17:50:34,915 INFO L78 Accepts]: Start accepts. Automaton has 14673 states and 43618 transitions. Word has length 66 [2019-12-07 17:50:34,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:34,915 INFO L462 AbstractCegarLoop]: Abstraction has 14673 states and 43618 transitions. [2019-12-07 17:50:34,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:50:34,915 INFO L276 IsEmpty]: Start isEmpty. Operand 14673 states and 43618 transitions. [2019-12-07 17:50:34,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:34,926 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:34,926 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:34,926 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:34,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:34,926 INFO L82 PathProgramCache]: Analyzing trace with hash 1712750060, now seen corresponding path program 13 times [2019-12-07 17:50:34,927 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:34,927 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311451698] [2019-12-07 17:50:34,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:34,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:35,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:35,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311451698] [2019-12-07 17:50:35,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:35,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:50:35,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [591811945] [2019-12-07 17:50:35,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:50:35,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:35,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:50:35,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:50:35,072 INFO L87 Difference]: Start difference. First operand 14673 states and 43618 transitions. Second operand 12 states. [2019-12-07 17:50:36,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:36,346 INFO L93 Difference]: Finished difference Result 21297 states and 62232 transitions. [2019-12-07 17:50:36,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:50:36,346 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 17:50:36,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:36,367 INFO L225 Difference]: With dead ends: 21297 [2019-12-07 17:50:36,367 INFO L226 Difference]: Without dead ends: 21297 [2019-12-07 17:50:36,367 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=230, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:50:36,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21297 states. [2019-12-07 17:50:36,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21297 to 14733. [2019-12-07 17:50:36,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14733 states. [2019-12-07 17:50:36,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14733 states to 14733 states and 43788 transitions. [2019-12-07 17:50:36,616 INFO L78 Accepts]: Start accepts. Automaton has 14733 states and 43788 transitions. Word has length 66 [2019-12-07 17:50:36,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:36,616 INFO L462 AbstractCegarLoop]: Abstraction has 14733 states and 43788 transitions. [2019-12-07 17:50:36,616 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:50:36,616 INFO L276 IsEmpty]: Start isEmpty. Operand 14733 states and 43788 transitions. [2019-12-07 17:50:36,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:36,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:36,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:36,630 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:36,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:36,630 INFO L82 PathProgramCache]: Analyzing trace with hash -914363260, now seen corresponding path program 1 times [2019-12-07 17:50:36,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:36,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016760555] [2019-12-07 17:50:36,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:36,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:36,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:36,652 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016760555] [2019-12-07 17:50:36,652 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:36,652 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:36,653 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967079996] [2019-12-07 17:50:36,653 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:50:36,653 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:36,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:50:36,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:36,653 INFO L87 Difference]: Start difference. First operand 14733 states and 43788 transitions. Second operand 3 states. [2019-12-07 17:50:36,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:36,709 INFO L93 Difference]: Finished difference Result 17982 states and 52973 transitions. [2019-12-07 17:50:36,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:36,710 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:50:36,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:36,727 INFO L225 Difference]: With dead ends: 17982 [2019-12-07 17:50:36,727 INFO L226 Difference]: Without dead ends: 17982 [2019-12-07 17:50:36,728 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:36,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17982 states. [2019-12-07 17:50:36,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17982 to 15393. [2019-12-07 17:50:36,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15393 states. [2019-12-07 17:50:36,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15393 states to 15393 states and 45120 transitions. [2019-12-07 17:50:36,964 INFO L78 Accepts]: Start accepts. Automaton has 15393 states and 45120 transitions. Word has length 66 [2019-12-07 17:50:36,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:36,965 INFO L462 AbstractCegarLoop]: Abstraction has 15393 states and 45120 transitions. [2019-12-07 17:50:36,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:36,965 INFO L276 IsEmpty]: Start isEmpty. Operand 15393 states and 45120 transitions. [2019-12-07 17:50:36,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:36,977 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:36,978 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:36,978 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:36,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:36,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1582588948, now seen corresponding path program 14 times [2019-12-07 17:50:36,978 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:36,978 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591236853] [2019-12-07 17:50:36,978 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:36,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:37,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:37,117 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1591236853] [2019-12-07 17:50:37,117 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:37,117 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:50:37,117 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [183884302] [2019-12-07 17:50:37,117 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:50:37,117 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:37,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:50:37,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:50:37,117 INFO L87 Difference]: Start difference. First operand 15393 states and 45120 transitions. Second operand 12 states. [2019-12-07 17:50:41,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:41,151 INFO L93 Difference]: Finished difference Result 22954 states and 66093 transitions. [2019-12-07 17:50:41,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:50:41,152 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 17:50:41,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:41,185 INFO L225 Difference]: With dead ends: 22954 [2019-12-07 17:50:41,186 INFO L226 Difference]: Without dead ends: 22954 [2019-12-07 17:50:41,186 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=98, Invalid=322, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:50:41,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22954 states. [2019-12-07 17:50:41,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22954 to 15345. [2019-12-07 17:50:41,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15345 states. [2019-12-07 17:50:41,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15345 states to 15345 states and 44984 transitions. [2019-12-07 17:50:41,456 INFO L78 Accepts]: Start accepts. Automaton has 15345 states and 44984 transitions. Word has length 66 [2019-12-07 17:50:41,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:41,456 INFO L462 AbstractCegarLoop]: Abstraction has 15345 states and 44984 transitions. [2019-12-07 17:50:41,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:50:41,456 INFO L276 IsEmpty]: Start isEmpty. Operand 15345 states and 44984 transitions. [2019-12-07 17:50:41,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:41,469 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:41,470 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:41,470 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:41,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:41,470 INFO L82 PathProgramCache]: Analyzing trace with hash 814920742, now seen corresponding path program 15 times [2019-12-07 17:50:41,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:41,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1127651673] [2019-12-07 17:50:41,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:41,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:41,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:41,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1127651673] [2019-12-07 17:50:41,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:41,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:50:41,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439752040] [2019-12-07 17:50:41,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:50:41,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:41,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:50:41,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:50:41,609 INFO L87 Difference]: Start difference. First operand 15345 states and 44984 transitions. Second operand 12 states. [2019-12-07 17:50:42,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:42,865 INFO L93 Difference]: Finished difference Result 22367 states and 64540 transitions. [2019-12-07 17:50:42,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 17:50:42,866 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 17:50:42,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:42,896 INFO L225 Difference]: With dead ends: 22367 [2019-12-07 17:50:42,896 INFO L226 Difference]: Without dead ends: 22367 [2019-12-07 17:50:42,897 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=122, Invalid=340, Unknown=0, NotChecked=0, Total=462 [2019-12-07 17:50:42,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22367 states. [2019-12-07 17:50:43,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22367 to 14565. [2019-12-07 17:50:43,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14565 states. [2019-12-07 17:50:43,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14565 states to 14565 states and 42828 transitions. [2019-12-07 17:50:43,153 INFO L78 Accepts]: Start accepts. Automaton has 14565 states and 42828 transitions. Word has length 66 [2019-12-07 17:50:43,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:43,153 INFO L462 AbstractCegarLoop]: Abstraction has 14565 states and 42828 transitions. [2019-12-07 17:50:43,153 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:50:43,153 INFO L276 IsEmpty]: Start isEmpty. Operand 14565 states and 42828 transitions. [2019-12-07 17:50:43,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:50:43,165 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:43,166 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:43,166 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:43,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:43,166 INFO L82 PathProgramCache]: Analyzing trace with hash -124195356, now seen corresponding path program 16 times [2019-12-07 17:50:43,166 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:43,166 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624564422] [2019-12-07 17:50:43,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:43,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:43,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:50:43,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624564422] [2019-12-07 17:50:43,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:43,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:43,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242288478] [2019-12-07 17:50:43,220 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:50:43,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:43,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:50:43,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:50:43,221 INFO L87 Difference]: Start difference. First operand 14565 states and 42828 transitions. Second operand 4 states. [2019-12-07 17:50:43,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:43,289 INFO L93 Difference]: Finished difference Result 16590 states and 48984 transitions. [2019-12-07 17:50:43,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:43,289 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 17:50:43,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:43,306 INFO L225 Difference]: With dead ends: 16590 [2019-12-07 17:50:43,306 INFO L226 Difference]: Without dead ends: 16590 [2019-12-07 17:50:43,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:50:43,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16590 states. [2019-12-07 17:50:43,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16590 to 13305. [2019-12-07 17:50:43,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13305 states. [2019-12-07 17:50:43,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13305 states to 13305 states and 39588 transitions. [2019-12-07 17:50:43,519 INFO L78 Accepts]: Start accepts. Automaton has 13305 states and 39588 transitions. Word has length 66 [2019-12-07 17:50:43,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:43,520 INFO L462 AbstractCegarLoop]: Abstraction has 13305 states and 39588 transitions. [2019-12-07 17:50:43,520 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:50:43,520 INFO L276 IsEmpty]: Start isEmpty. Operand 13305 states and 39588 transitions. [2019-12-07 17:50:43,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:50:43,532 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:43,532 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:43,532 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:43,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:43,532 INFO L82 PathProgramCache]: Analyzing trace with hash -919262302, now seen corresponding path program 1 times [2019-12-07 17:50:43,532 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:43,532 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411732565] [2019-12-07 17:50:43,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:43,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:50:43,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:50:43,605 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:50:43,605 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:50:43,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t651~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t651~0.base_24|) |v_ULTIMATE.start_main_~#t651~0.offset_19| 0)) |v_#memory_int_21|) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t651~0.base_24|)) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (< 0 |v_#StackHeapBarrier_17|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t651~0.base_24|) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= |v_ULTIMATE.start_main_~#t651~0.offset_19| 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t651~0.base_24| 1)) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t651~0.base_24| 4)) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ULTIMATE.start_main_~#t653~0.base=|v_ULTIMATE.start_main_~#t653~0.base_27|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ULTIMATE.start_main_~#t652~0.base=|v_ULTIMATE.start_main_~#t652~0.base_26|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ULTIMATE.start_main_~#t651~0.offset=|v_ULTIMATE.start_main_~#t651~0.offset_19|, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ULTIMATE.start_main_~#t651~0.base=|v_ULTIMATE.start_main_~#t651~0.base_24|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ~y~0=v_~y~0_39, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ULTIMATE.start_main_~#t653~0.offset=|v_ULTIMATE.start_main_~#t653~0.offset_20|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_~#t652~0.offset=|v_ULTIMATE.start_main_~#t652~0.offset_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t653~0.base, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t652~0.base, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t651~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t651~0.base, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ULTIMATE.start_main_~#t653~0.offset, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_~#t652~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 17:50:43,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t652~0.base_10| 4) |v_#length_17|) (not (= |v_ULTIMATE.start_main_~#t652~0.base_10| 0)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t652~0.base_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t652~0.base_10|)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t652~0.base_10| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t652~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t652~0.base_10|) |v_ULTIMATE.start_main_~#t652~0.offset_9| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t652~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t652~0.base=|v_ULTIMATE.start_main_~#t652~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t652~0.offset=|v_ULTIMATE.start_main_~#t652~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t652~0.base, ULTIMATE.start_main_~#t652~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:50:43,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t653~0.base_13| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t653~0.base_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t653~0.base_13| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t653~0.base_13|)) (= |v_ULTIMATE.start_main_~#t653~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t653~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t653~0.base_13|) |v_ULTIMATE.start_main_~#t653~0.offset_11| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t653~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t653~0.offset=|v_ULTIMATE.start_main_~#t653~0.offset_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t653~0.base=|v_ULTIMATE.start_main_~#t653~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t653~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t653~0.base] because there is no mapped edge [2019-12-07 17:50:43,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 17:50:43,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-802465787 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-802465787 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out-802465787| ~a~0_In-802465787) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-802465787| ~a$w_buff1~0_In-802465787) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In-802465787, ~a$w_buff1~0=~a$w_buff1~0_In-802465787, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-802465787, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-802465787} OutVars{~a~0=~a~0_In-802465787, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-802465787|, ~a$w_buff1~0=~a$w_buff1~0_In-802465787, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-802465787, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-802465787} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 17:50:43,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1901817699 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1901817699 256)))) (or (and (= ~a$w_buff0_used~0_In1901817699 |P0Thread1of1ForFork1_#t~ite5_Out1901817699|) (or .cse0 .cse1)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out1901817699| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1901817699, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1901817699} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1901817699|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1901817699, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1901817699} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:50:43,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-616689446 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-616689446 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-616689446 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-616689446 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-616689446 |P0Thread1of1ForFork1_#t~ite6_Out-616689446|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork1_#t~ite6_Out-616689446| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-616689446, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-616689446, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-616689446, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-616689446} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-616689446|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-616689446, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-616689446, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-616689446, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-616689446} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:50:43,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In2089498578 256))) (.cse1 (= ~a$r_buff0_thd1~0_In2089498578 ~a$r_buff0_thd1~0_Out2089498578)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In2089498578 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~a$r_buff0_thd1~0_Out2089498578) (not .cse0)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2089498578, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2089498578} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out2089498578|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2089498578, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out2089498578} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:50:43,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In1121540538 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd1~0_In1121540538 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In1121540538 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In1121540538 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1121540538| ~a$r_buff1_thd1~0_In1121540538) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1121540538| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1121540538, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1121540538, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1121540538, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1121540538} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1121540538|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1121540538, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1121540538, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1121540538, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1121540538} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:50:43,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:50:43,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-124802245 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out-124802245| ~a$w_buff0~0_In-124802245) (= |P2Thread1of1ForFork0_#t~ite20_In-124802245| |P2Thread1of1ForFork0_#t~ite20_Out-124802245|)) (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-124802245 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-124802245 256) 0)) (= (mod ~a$w_buff0_used~0_In-124802245 256) 0) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-124802245 256))))) (= ~a$w_buff0~0_In-124802245 |P2Thread1of1ForFork0_#t~ite20_Out-124802245|) (= |P2Thread1of1ForFork0_#t~ite21_Out-124802245| |P2Thread1of1ForFork0_#t~ite20_Out-124802245|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-124802245, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-124802245, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-124802245, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-124802245, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-124802245, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-124802245|, ~weak$$choice2~0=~weak$$choice2~0_In-124802245} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-124802245|, ~a$w_buff0~0=~a$w_buff0~0_In-124802245, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-124802245, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-124802245, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-124802245, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-124802245|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-124802245, ~weak$$choice2~0=~weak$$choice2~0_In-124802245} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 17:50:43,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1762713235 256) 0))) (or (and .cse0 (= ~a$w_buff0_used~0_In-1762713235 |P2Thread1of1ForFork0_#t~ite26_Out-1762713235|) (= |P2Thread1of1ForFork0_#t~ite27_Out-1762713235| |P2Thread1of1ForFork0_#t~ite26_Out-1762713235|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1762713235 256)))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1762713235 256))) (and (= (mod ~a$w_buff1_used~0_In-1762713235 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-1762713235 256))))) (and (= |P2Thread1of1ForFork0_#t~ite26_In-1762713235| |P2Thread1of1ForFork0_#t~ite26_Out-1762713235|) (= ~a$w_buff0_used~0_In-1762713235 |P2Thread1of1ForFork0_#t~ite27_Out-1762713235|) (not .cse0)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1762713235|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1762713235, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1762713235, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1762713235, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1762713235, ~weak$$choice2~0=~weak$$choice2~0_In-1762713235} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1762713235|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1762713235|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1762713235, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1762713235, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1762713235, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1762713235, ~weak$$choice2~0=~weak$$choice2~0_In-1762713235} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:50:43,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-787739934 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_Out-787739934| ~a$w_buff1_used~0_In-787739934) .cse0 (= |P2Thread1of1ForFork0_#t~ite30_Out-787739934| |P2Thread1of1ForFork0_#t~ite29_Out-787739934|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-787739934 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-787739934 256) 0)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-787739934 256))) (= (mod ~a$w_buff0_used~0_In-787739934 256) 0)))) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_In-787739934| |P2Thread1of1ForFork0_#t~ite29_Out-787739934|) (= |P2Thread1of1ForFork0_#t~ite30_Out-787739934| ~a$w_buff1_used~0_In-787739934)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-787739934, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-787739934, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-787739934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-787739934, ~weak$$choice2~0=~weak$$choice2~0_In-787739934, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-787739934|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-787739934, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-787739934, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-787739934, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-787739934|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-787739934, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-787739934|, ~weak$$choice2~0=~weak$$choice2~0_In-787739934} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:50:43,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:50:43,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 17:50:43,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1858230330 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1858230330 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1858230330 |P1Thread1of1ForFork2_#t~ite11_Out1858230330|)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1858230330|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1858230330, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1858230330} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1858230330, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1858230330, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1858230330|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:50:43,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In-1188291186 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1188291186 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1188291186 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1188291186 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1188291186| ~a$w_buff1_used~0_In-1188291186) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1188291186|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1188291186, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1188291186, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1188291186, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1188291186} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1188291186, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1188291186, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1188291186, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1188291186|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1188291186} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:50:43,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-204629242 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-204629242 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-204629242 |P1Thread1of1ForFork2_#t~ite13_Out-204629242|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-204629242|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-204629242, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-204629242} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-204629242, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-204629242, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-204629242|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:50:43,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1350969871 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-1350969871 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1350969871 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1350969871 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1350969871|)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$r_buff1_thd2~0_In-1350969871 |P1Thread1of1ForFork2_#t~ite14_Out-1350969871|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1350969871, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1350969871, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350969871, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1350969871} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1350969871, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1350969871, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350969871, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1350969871, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1350969871|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:50:43,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:50:43,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 17:50:43,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In194091227 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In194091227 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out194091227| |P2Thread1of1ForFork0_#t~ite38_Out194091227|))) (or (and (or .cse0 .cse1) .cse2 (= ~a~0_In194091227 |P2Thread1of1ForFork0_#t~ite38_Out194091227|)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out194091227| ~a$w_buff1~0_In194091227) .cse2))) InVars {~a~0=~a~0_In194091227, ~a$w_buff1~0=~a$w_buff1~0_In194091227, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In194091227, ~a$w_buff1_used~0=~a$w_buff1_used~0_In194091227} OutVars{~a~0=~a~0_In194091227, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out194091227|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out194091227|, ~a$w_buff1~0=~a$w_buff1~0_In194091227, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In194091227, ~a$w_buff1_used~0=~a$w_buff1_used~0_In194091227} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:50:43,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In693072507 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In693072507 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out693072507|)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In693072507 |P2Thread1of1ForFork0_#t~ite40_Out693072507|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In693072507, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In693072507} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out693072507|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In693072507, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In693072507} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:50:43,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1303595495 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1303595495 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1303595495 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-1303595495 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1303595495| ~a$w_buff1_used~0_In-1303595495)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1303595495|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1303595495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1303595495, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1303595495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1303595495} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1303595495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1303595495, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1303595495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1303595495, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1303595495|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:50:43,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-235082773 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-235082773 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-235082773| ~a$r_buff0_thd3~0_In-235082773)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-235082773| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-235082773, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-235082773} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-235082773, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-235082773, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-235082773|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:50:43,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1301909724 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1301909724 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd3~0_In1301909724 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In1301909724 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite43_Out1301909724| ~a$r_buff1_thd3~0_In1301909724) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out1301909724| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1301909724, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1301909724, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1301909724, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1301909724} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1301909724|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1301909724, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1301909724, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1301909724, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1301909724} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:50:43,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:50:43,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:50:43,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out2029572246| |ULTIMATE.start_main_#t~ite48_Out2029572246|)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In2029572246 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In2029572246 256) 0))) (or (and .cse0 (not .cse1) (= ~a$w_buff1~0_In2029572246 |ULTIMATE.start_main_#t~ite47_Out2029572246|) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out2029572246| ~a~0_In2029572246)))) InVars {~a~0=~a~0_In2029572246, ~a$w_buff1~0=~a$w_buff1~0_In2029572246, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In2029572246, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2029572246} OutVars{~a~0=~a~0_In2029572246, ~a$w_buff1~0=~a$w_buff1~0_In2029572246, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out2029572246|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In2029572246, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out2029572246|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2029572246} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:50:43,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-361323778 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-361323778 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-361323778|)) (and (= ~a$w_buff0_used~0_In-361323778 |ULTIMATE.start_main_#t~ite49_Out-361323778|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-361323778, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-361323778} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-361323778, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-361323778|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-361323778} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:50:43,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1721577792 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1721577792 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1721577792 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-1721577792 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-1721577792 |ULTIMATE.start_main_#t~ite50_Out-1721577792|)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1721577792|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1721577792, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1721577792, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1721577792, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1721577792} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1721577792|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1721577792, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1721577792, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1721577792, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1721577792} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:50:43,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In1368216591 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1368216591 256) 0))) (or (and (= ~a$r_buff0_thd0~0_In1368216591 |ULTIMATE.start_main_#t~ite51_Out1368216591|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out1368216591| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1368216591, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368216591} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1368216591|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1368216591, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368216591} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:50:43,621 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In162130150 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In162130150 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In162130150 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In162130150 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out162130150| ~a$r_buff1_thd0~0_In162130150)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite52_Out162130150| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In162130150, ~a$w_buff0_used~0=~a$w_buff0_used~0_In162130150, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In162130150, ~a$w_buff1_used~0=~a$w_buff1_used~0_In162130150} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out162130150|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In162130150, ~a$w_buff0_used~0=~a$w_buff0_used~0_In162130150, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In162130150, ~a$w_buff1_used~0=~a$w_buff1_used~0_In162130150} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:50:43,621 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:50:43,673 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:50:43 BasicIcfg [2019-12-07 17:50:43,673 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:50:43,673 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:50:43,673 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:50:43,674 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:50:43,674 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:48:50" (3/4) ... [2019-12-07 17:50:43,675 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:50:43,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t651~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t651~0.base_24|) |v_ULTIMATE.start_main_~#t651~0.offset_19| 0)) |v_#memory_int_21|) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t651~0.base_24|)) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (< 0 |v_#StackHeapBarrier_17|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t651~0.base_24|) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= |v_ULTIMATE.start_main_~#t651~0.offset_19| 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t651~0.base_24| 1)) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t651~0.base_24| 4)) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ULTIMATE.start_main_~#t653~0.base=|v_ULTIMATE.start_main_~#t653~0.base_27|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ULTIMATE.start_main_~#t652~0.base=|v_ULTIMATE.start_main_~#t652~0.base_26|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ULTIMATE.start_main_~#t651~0.offset=|v_ULTIMATE.start_main_~#t651~0.offset_19|, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ULTIMATE.start_main_~#t651~0.base=|v_ULTIMATE.start_main_~#t651~0.base_24|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ~y~0=v_~y~0_39, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ULTIMATE.start_main_~#t653~0.offset=|v_ULTIMATE.start_main_~#t653~0.offset_20|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_~#t652~0.offset=|v_ULTIMATE.start_main_~#t652~0.offset_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t653~0.base, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t652~0.base, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t651~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t651~0.base, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ULTIMATE.start_main_~#t653~0.offset, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_~#t652~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 17:50:43,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t652~0.base_10| 4) |v_#length_17|) (not (= |v_ULTIMATE.start_main_~#t652~0.base_10| 0)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t652~0.base_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t652~0.base_10|)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t652~0.base_10| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t652~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t652~0.base_10|) |v_ULTIMATE.start_main_~#t652~0.offset_9| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t652~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t652~0.base=|v_ULTIMATE.start_main_~#t652~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t652~0.offset=|v_ULTIMATE.start_main_~#t652~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t652~0.base, ULTIMATE.start_main_~#t652~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:50:43,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t653~0.base_13| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t653~0.base_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t653~0.base_13| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t653~0.base_13|)) (= |v_ULTIMATE.start_main_~#t653~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t653~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t653~0.base_13|) |v_ULTIMATE.start_main_~#t653~0.offset_11| 2)) |v_#memory_int_11|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t653~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t653~0.offset=|v_ULTIMATE.start_main_~#t653~0.offset_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t653~0.base=|v_ULTIMATE.start_main_~#t653~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t653~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t653~0.base] because there is no mapped edge [2019-12-07 17:50:43,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 17:50:43,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-802465787 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-802465787 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out-802465787| ~a~0_In-802465787) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-802465787| ~a$w_buff1~0_In-802465787) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In-802465787, ~a$w_buff1~0=~a$w_buff1~0_In-802465787, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-802465787, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-802465787} OutVars{~a~0=~a~0_In-802465787, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-802465787|, ~a$w_buff1~0=~a$w_buff1~0_In-802465787, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-802465787, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-802465787} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 17:50:43,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1901817699 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1901817699 256)))) (or (and (= ~a$w_buff0_used~0_In1901817699 |P0Thread1of1ForFork1_#t~ite5_Out1901817699|) (or .cse0 .cse1)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out1901817699| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1901817699, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1901817699} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1901817699|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1901817699, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1901817699} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:50:43,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-616689446 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In-616689446 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-616689446 256))) (.cse2 (= (mod ~a$r_buff0_thd1~0_In-616689446 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-616689446 |P0Thread1of1ForFork1_#t~ite6_Out-616689446|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork1_#t~ite6_Out-616689446| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-616689446, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-616689446, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-616689446, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-616689446} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-616689446|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-616689446, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-616689446, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-616689446, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-616689446} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:50:43,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In2089498578 256))) (.cse1 (= ~a$r_buff0_thd1~0_In2089498578 ~a$r_buff0_thd1~0_Out2089498578)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In2089498578 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~a$r_buff0_thd1~0_Out2089498578) (not .cse0)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2089498578, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2089498578} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out2089498578|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2089498578, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out2089498578} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:50:43,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In1121540538 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd1~0_In1121540538 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In1121540538 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In1121540538 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1121540538| ~a$r_buff1_thd1~0_In1121540538) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1121540538| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1121540538, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1121540538, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1121540538, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1121540538} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1121540538|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1121540538, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1121540538, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1121540538, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1121540538} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:50:43,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:50:43,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-124802245 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out-124802245| ~a$w_buff0~0_In-124802245) (= |P2Thread1of1ForFork0_#t~ite20_In-124802245| |P2Thread1of1ForFork0_#t~ite20_Out-124802245|)) (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-124802245 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-124802245 256) 0)) (= (mod ~a$w_buff0_used~0_In-124802245 256) 0) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-124802245 256))))) (= ~a$w_buff0~0_In-124802245 |P2Thread1of1ForFork0_#t~ite20_Out-124802245|) (= |P2Thread1of1ForFork0_#t~ite21_Out-124802245| |P2Thread1of1ForFork0_#t~ite20_Out-124802245|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-124802245, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-124802245, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-124802245, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-124802245, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-124802245, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-124802245|, ~weak$$choice2~0=~weak$$choice2~0_In-124802245} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-124802245|, ~a$w_buff0~0=~a$w_buff0~0_In-124802245, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-124802245, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-124802245, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-124802245, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-124802245|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-124802245, ~weak$$choice2~0=~weak$$choice2~0_In-124802245} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 17:50:43,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1762713235 256) 0))) (or (and .cse0 (= ~a$w_buff0_used~0_In-1762713235 |P2Thread1of1ForFork0_#t~ite26_Out-1762713235|) (= |P2Thread1of1ForFork0_#t~ite27_Out-1762713235| |P2Thread1of1ForFork0_#t~ite26_Out-1762713235|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1762713235 256)))) (or (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1762713235 256))) (and (= (mod ~a$w_buff1_used~0_In-1762713235 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-1762713235 256))))) (and (= |P2Thread1of1ForFork0_#t~ite26_In-1762713235| |P2Thread1of1ForFork0_#t~ite26_Out-1762713235|) (= ~a$w_buff0_used~0_In-1762713235 |P2Thread1of1ForFork0_#t~ite27_Out-1762713235|) (not .cse0)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-1762713235|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1762713235, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1762713235, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1762713235, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1762713235, ~weak$$choice2~0=~weak$$choice2~0_In-1762713235} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-1762713235|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-1762713235|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1762713235, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1762713235, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1762713235, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1762713235, ~weak$$choice2~0=~weak$$choice2~0_In-1762713235} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 17:50:43,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-787739934 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_Out-787739934| ~a$w_buff1_used~0_In-787739934) .cse0 (= |P2Thread1of1ForFork0_#t~ite30_Out-787739934| |P2Thread1of1ForFork0_#t~ite29_Out-787739934|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-787739934 256) 0))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In-787739934 256) 0)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-787739934 256))) (= (mod ~a$w_buff0_used~0_In-787739934 256) 0)))) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_In-787739934| |P2Thread1of1ForFork0_#t~ite29_Out-787739934|) (= |P2Thread1of1ForFork0_#t~ite30_Out-787739934| ~a$w_buff1_used~0_In-787739934)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-787739934, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-787739934, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-787739934, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-787739934, ~weak$$choice2~0=~weak$$choice2~0_In-787739934, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-787739934|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-787739934, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-787739934, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-787739934, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-787739934|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-787739934, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-787739934|, ~weak$$choice2~0=~weak$$choice2~0_In-787739934} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:50:43,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:50:43,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 17:50:43,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1858230330 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In1858230330 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1858230330 |P1Thread1of1ForFork2_#t~ite11_Out1858230330|)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1858230330|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1858230330, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1858230330} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1858230330, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1858230330, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1858230330|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:50:43,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In-1188291186 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1188291186 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-1188291186 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-1188291186 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1188291186| ~a$w_buff1_used~0_In-1188291186) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1188291186|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1188291186, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1188291186, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1188291186, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1188291186} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1188291186, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1188291186, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1188291186, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1188291186|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1188291186} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:50:43,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-204629242 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-204629242 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-204629242 |P1Thread1of1ForFork2_#t~ite13_Out-204629242|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-204629242|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-204629242, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-204629242} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-204629242, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-204629242, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-204629242|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:50:43,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1350969871 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-1350969871 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1350969871 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1350969871 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1350969871|)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$r_buff1_thd2~0_In-1350969871 |P1Thread1of1ForFork2_#t~ite14_Out-1350969871|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1350969871, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1350969871, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350969871, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1350969871} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1350969871, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1350969871, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350969871, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1350969871, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1350969871|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:50:43,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:50:43,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 17:50:43,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In194091227 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In194091227 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out194091227| |P2Thread1of1ForFork0_#t~ite38_Out194091227|))) (or (and (or .cse0 .cse1) .cse2 (= ~a~0_In194091227 |P2Thread1of1ForFork0_#t~ite38_Out194091227|)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out194091227| ~a$w_buff1~0_In194091227) .cse2))) InVars {~a~0=~a~0_In194091227, ~a$w_buff1~0=~a$w_buff1~0_In194091227, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In194091227, ~a$w_buff1_used~0=~a$w_buff1_used~0_In194091227} OutVars{~a~0=~a~0_In194091227, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out194091227|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out194091227|, ~a$w_buff1~0=~a$w_buff1~0_In194091227, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In194091227, ~a$w_buff1_used~0=~a$w_buff1_used~0_In194091227} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:50:43,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In693072507 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In693072507 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out693072507|)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In693072507 |P2Thread1of1ForFork0_#t~ite40_Out693072507|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In693072507, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In693072507} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out693072507|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In693072507, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In693072507} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:50:43,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1303595495 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1303595495 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1303595495 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-1303595495 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1303595495| ~a$w_buff1_used~0_In-1303595495)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1303595495|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1303595495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1303595495, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1303595495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1303595495} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1303595495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1303595495, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1303595495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1303595495, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1303595495|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:50:43,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-235082773 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-235082773 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-235082773| ~a$r_buff0_thd3~0_In-235082773)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-235082773| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-235082773, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-235082773} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-235082773, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-235082773, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-235082773|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:50:43,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1301909724 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In1301909724 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd3~0_In1301909724 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In1301909724 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite43_Out1301909724| ~a$r_buff1_thd3~0_In1301909724) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out1301909724| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1301909724, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1301909724, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1301909724, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1301909724} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1301909724|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1301909724, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1301909724, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1301909724, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1301909724} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:50:43,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:50:43,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:50:43,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out2029572246| |ULTIMATE.start_main_#t~ite48_Out2029572246|)) (.cse2 (= (mod ~a$r_buff1_thd0~0_In2029572246 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In2029572246 256) 0))) (or (and .cse0 (not .cse1) (= ~a$w_buff1~0_In2029572246 |ULTIMATE.start_main_#t~ite47_Out2029572246|) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out2029572246| ~a~0_In2029572246)))) InVars {~a~0=~a~0_In2029572246, ~a$w_buff1~0=~a$w_buff1~0_In2029572246, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In2029572246, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2029572246} OutVars{~a~0=~a~0_In2029572246, ~a$w_buff1~0=~a$w_buff1~0_In2029572246, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out2029572246|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In2029572246, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out2029572246|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2029572246} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:50:43,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-361323778 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-361323778 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-361323778|)) (and (= ~a$w_buff0_used~0_In-361323778 |ULTIMATE.start_main_#t~ite49_Out-361323778|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-361323778, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-361323778} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-361323778, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-361323778|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-361323778} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:50:43,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1721577792 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-1721577792 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1721577792 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In-1721577792 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In-1721577792 |ULTIMATE.start_main_#t~ite50_Out-1721577792|)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1721577792|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1721577792, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1721577792, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1721577792, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1721577792} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1721577792|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1721577792, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1721577792, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1721577792, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1721577792} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:50:43,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In1368216591 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In1368216591 256) 0))) (or (and (= ~a$r_buff0_thd0~0_In1368216591 |ULTIMATE.start_main_#t~ite51_Out1368216591|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out1368216591| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1368216591, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368216591} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1368216591|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1368216591, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368216591} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:50:43,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In162130150 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In162130150 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In162130150 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In162130150 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out162130150| ~a$r_buff1_thd0~0_In162130150)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite52_Out162130150| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In162130150, ~a$w_buff0_used~0=~a$w_buff0_used~0_In162130150, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In162130150, ~a$w_buff1_used~0=~a$w_buff1_used~0_In162130150} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out162130150|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In162130150, ~a$w_buff0_used~0=~a$w_buff0_used~0_In162130150, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In162130150, ~a$w_buff1_used~0=~a$w_buff1_used~0_In162130150} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:50:43,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:50:43,738 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_61e547ce-8e92-4077-adf1-be50075dcc3d/bin/uautomizer/witness.graphml [2019-12-07 17:50:43,738 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:50:43,739 INFO L168 Benchmark]: Toolchain (without parser) took 113760.12 ms. Allocated memory was 1.0 GB in the beginning and 6.8 GB in the end (delta: 5.8 GB). Free memory was 937.1 MB in the beginning and 5.3 GB in the end (delta: -4.4 GB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-12-07 17:50:43,740 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:50:43,740 INFO L168 Benchmark]: CACSL2BoogieTranslator took 391.93 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.8 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -133.3 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:43,740 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:43,740 INFO L168 Benchmark]: Boogie Preprocessor took 26.23 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:50:43,741 INFO L168 Benchmark]: RCFGBuilder took 410.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:43,741 INFO L168 Benchmark]: TraceAbstraction took 112824.61 ms. Allocated memory was 1.1 GB in the beginning and 6.8 GB in the end (delta: 5.7 GB). Free memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: -4.3 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2019-12-07 17:50:43,741 INFO L168 Benchmark]: Witness Printer took 65.16 ms. Allocated memory is still 6.8 GB. Free memory was 5.3 GB in the beginning and 5.3 GB in the end (delta: 37.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:43,742 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 391.93 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.8 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -133.3 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.23 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 410.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 112824.61 ms. Allocated memory was 1.1 GB in the beginning and 6.8 GB in the end (delta: 5.7 GB). Free memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: -4.3 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. * Witness Printer took 65.16 ms. Allocated memory is still 6.8 GB. Free memory was 5.3 GB in the beginning and 5.3 GB in the end (delta: 37.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 178 ProgramPointsBefore, 93 ProgramPointsAfterwards, 215 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7050 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 63 SemBasedMoverChecksPositive, 249 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78858 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t651, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t652, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t653, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L740] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L741] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L742] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L743] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L744] 1 a$r_buff0_thd1 = (_Bool)1 [L747] 1 x = 1 [L750] 1 __unbuffered_p0_EAX = x [L753] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L756] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L770] 2 y = 1 [L773] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L756] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L757] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L790] 3 z = 2 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L758] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=2] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=2] [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L845] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L845] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 112.6s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 25.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7061 SDtfs, 9663 SDslu, 23761 SDs, 0 SdLazy, 14272 SolverSat, 382 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 408 GetRequests, 77 SyntacticMatches, 21 SemanticMatches, 310 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1038 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=314611occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 66.0s AutomataMinimizationTime, 34 MinimizatonAttempts, 260657 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1684 NumberOfCodeBlocks, 1684 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1583 ConstructedInterpolants, 0 QuantifiedInterpolants, 498165 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...