./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e84d801c4b3bcca1d14353ca734b698e1b9944a7 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:01:09,160 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:01:09,161 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:01:09,169 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:01:09,169 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:01:09,170 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:01:09,170 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:01:09,172 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:01:09,173 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:01:09,174 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:01:09,174 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:01:09,175 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:01:09,175 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:01:09,176 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:01:09,177 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:01:09,177 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:01:09,178 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:01:09,179 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:01:09,180 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:01:09,181 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:01:09,182 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:01:09,183 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:01:09,184 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:01:09,184 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:01:09,186 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:01:09,186 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:01:09,186 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:01:09,187 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:01:09,187 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:01:09,188 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:01:09,188 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:01:09,188 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:01:09,189 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:01:09,189 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:01:09,190 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:01:09,190 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:01:09,190 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:01:09,190 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:01:09,190 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:01:09,191 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:01:09,191 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:01:09,192 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:01:09,201 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:01:09,202 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:01:09,202 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:01:09,202 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:01:09,203 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:01:09,203 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:01:09,203 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:01:09,203 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:01:09,203 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:01:09,203 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:01:09,203 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:01:09,204 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:01:09,204 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:01:09,204 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:01:09,204 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:01:09,204 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:01:09,204 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:01:09,205 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:01:09,205 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:01:09,205 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:01:09,205 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:01:09,205 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:01:09,205 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:01:09,205 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:01:09,206 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:01:09,206 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:01:09,206 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:01:09,206 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:01:09,206 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:01:09,206 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e84d801c4b3bcca1d14353ca734b698e1b9944a7 [2019-12-07 18:01:09,302 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:01:09,309 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:01:09,311 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:01:09,312 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:01:09,313 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:01:09,313 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix024_tso.opt.i [2019-12-07 18:01:09,348 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/data/313c5ba58/70d0cc13eae941958af382439fb37c01/FLAG36e401689 [2019-12-07 18:01:09,786 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:01:09,786 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/sv-benchmarks/c/pthread-wmm/mix024_tso.opt.i [2019-12-07 18:01:09,797 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/data/313c5ba58/70d0cc13eae941958af382439fb37c01/FLAG36e401689 [2019-12-07 18:01:09,806 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/data/313c5ba58/70d0cc13eae941958af382439fb37c01 [2019-12-07 18:01:09,808 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:01:09,809 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:01:09,809 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:01:09,810 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:01:09,812 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:01:09,813 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:01:09" (1/1) ... [2019-12-07 18:01:09,814 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:09, skipping insertion in model container [2019-12-07 18:01:09,814 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:01:09" (1/1) ... [2019-12-07 18:01:09,819 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:01:09,856 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:01:10,117 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:01:10,125 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:01:10,170 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:01:10,216 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:01:10,216 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10 WrapperNode [2019-12-07 18:01:10,217 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:01:10,217 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:01:10,217 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:01:10,217 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:01:10,224 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,238 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,258 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:01:10,258 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:01:10,258 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:01:10,258 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:01:10,265 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,265 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,269 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,269 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,277 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,280 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,283 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... [2019-12-07 18:01:10,286 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:01:10,287 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:01:10,287 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:01:10,287 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:01:10,288 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:01:10,332 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:01:10,332 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:01:10,332 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:01:10,332 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:01:10,332 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:01:10,332 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:01:10,333 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:01:10,333 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:01:10,333 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:01:10,333 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:01:10,333 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:01:10,333 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:01:10,333 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:01:10,335 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:01:10,710 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:01:10,710 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:01:10,711 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:01:10 BoogieIcfgContainer [2019-12-07 18:01:10,711 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:01:10,712 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:01:10,712 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:01:10,714 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:01:10,714 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:01:09" (1/3) ... [2019-12-07 18:01:10,714 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60a1d39a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:01:10, skipping insertion in model container [2019-12-07 18:01:10,715 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:01:10" (2/3) ... [2019-12-07 18:01:10,715 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60a1d39a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:01:10, skipping insertion in model container [2019-12-07 18:01:10,715 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:01:10" (3/3) ... [2019-12-07 18:01:10,716 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_tso.opt.i [2019-12-07 18:01:10,722 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:01:10,722 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:01:10,727 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:01:10,728 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:01:10,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,753 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,754 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,754 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,754 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,754 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,754 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,754 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,758 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,758 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,758 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,759 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,760 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,761 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,762 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,763 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,764 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,765 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,766 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,767 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:01:10,785 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:01:10,798 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:01:10,798 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:01:10,798 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:01:10,798 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:01:10,798 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:01:10,798 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:01:10,798 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:01:10,798 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:01:10,814 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 18:01:10,815 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 18:01:10,880 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 18:01:10,880 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:01:10,891 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:01:10,907 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 18:01:10,938 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 18:01:10,938 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:01:10,944 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:01:10,960 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:01:10,961 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:01:13,896 WARN L192 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 18:01:14,004 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78858 [2019-12-07 18:01:14,004 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 18:01:14,007 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 18:01:29,878 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115112 states. [2019-12-07 18:01:29,880 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states. [2019-12-07 18:01:29,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:01:29,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:29,884 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:01:29,884 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:29,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:29,888 INFO L82 PathProgramCache]: Analyzing trace with hash 917918, now seen corresponding path program 1 times [2019-12-07 18:01:29,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:29,894 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228946083] [2019-12-07 18:01:29,894 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:29,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:30,028 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:30,029 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228946083] [2019-12-07 18:01:30,029 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:30,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:01:30,030 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125762213] [2019-12-07 18:01:30,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:01:30,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:30,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:01:30,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:01:30,044 INFO L87 Difference]: Start difference. First operand 115112 states. Second operand 3 states. [2019-12-07 18:01:30,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:30,755 INFO L93 Difference]: Finished difference Result 114110 states and 484570 transitions. [2019-12-07 18:01:30,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:01:30,757 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:01:30,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:31,173 INFO L225 Difference]: With dead ends: 114110 [2019-12-07 18:01:31,174 INFO L226 Difference]: Without dead ends: 107012 [2019-12-07 18:01:31,174 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:01:35,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107012 states. [2019-12-07 18:01:38,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107012 to 107012. [2019-12-07 18:01:38,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107012 states. [2019-12-07 18:01:38,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107012 states to 107012 states and 453812 transitions. [2019-12-07 18:01:38,769 INFO L78 Accepts]: Start accepts. Automaton has 107012 states and 453812 transitions. Word has length 3 [2019-12-07 18:01:38,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:38,769 INFO L462 AbstractCegarLoop]: Abstraction has 107012 states and 453812 transitions. [2019-12-07 18:01:38,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:01:38,770 INFO L276 IsEmpty]: Start isEmpty. Operand 107012 states and 453812 transitions. [2019-12-07 18:01:38,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:01:38,773 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:38,773 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:38,773 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:38,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:38,773 INFO L82 PathProgramCache]: Analyzing trace with hash -1578322365, now seen corresponding path program 1 times [2019-12-07 18:01:38,773 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:38,774 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874575588] [2019-12-07 18:01:38,774 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:38,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:38,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:38,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874575588] [2019-12-07 18:01:38,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:38,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:01:38,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867189753] [2019-12-07 18:01:38,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:01:38,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:38,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:01:38,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:01:38,839 INFO L87 Difference]: Start difference. First operand 107012 states and 453812 transitions. Second operand 4 states. [2019-12-07 18:01:39,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:39,997 INFO L93 Difference]: Finished difference Result 166210 states and 677236 transitions. [2019-12-07 18:01:39,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:01:39,998 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:01:39,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:40,383 INFO L225 Difference]: With dead ends: 166210 [2019-12-07 18:01:40,383 INFO L226 Difference]: Without dead ends: 166161 [2019-12-07 18:01:40,384 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:01:45,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166161 states. [2019-12-07 18:01:49,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166161 to 151748. [2019-12-07 18:01:49,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151748 states. [2019-12-07 18:01:50,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151748 states to 151748 states and 626089 transitions. [2019-12-07 18:01:50,162 INFO L78 Accepts]: Start accepts. Automaton has 151748 states and 626089 transitions. Word has length 11 [2019-12-07 18:01:50,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:50,163 INFO L462 AbstractCegarLoop]: Abstraction has 151748 states and 626089 transitions. [2019-12-07 18:01:50,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:01:50,163 INFO L276 IsEmpty]: Start isEmpty. Operand 151748 states and 626089 transitions. [2019-12-07 18:01:50,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:01:50,168 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:50,168 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:50,168 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:50,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:50,168 INFO L82 PathProgramCache]: Analyzing trace with hash 608601994, now seen corresponding path program 1 times [2019-12-07 18:01:50,168 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:50,169 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881147008] [2019-12-07 18:01:50,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:50,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:50,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:50,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881147008] [2019-12-07 18:01:50,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:50,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:01:50,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771613093] [2019-12-07 18:01:50,220 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:01:50,220 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:50,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:01:50,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:01:50,221 INFO L87 Difference]: Start difference. First operand 151748 states and 626089 transitions. Second operand 4 states. [2019-12-07 18:01:51,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:51,363 INFO L93 Difference]: Finished difference Result 218525 states and 880843 transitions. [2019-12-07 18:01:51,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:01:51,364 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:01:51,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:51,964 INFO L225 Difference]: With dead ends: 218525 [2019-12-07 18:01:51,964 INFO L226 Difference]: Without dead ends: 218469 [2019-12-07 18:01:51,965 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:01:58,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218469 states. [2019-12-07 18:02:03,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218469 to 182894. [2019-12-07 18:02:03,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182894 states. [2019-12-07 18:02:03,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182894 states to 182894 states and 750285 transitions. [2019-12-07 18:02:03,625 INFO L78 Accepts]: Start accepts. Automaton has 182894 states and 750285 transitions. Word has length 13 [2019-12-07 18:02:03,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:02:03,626 INFO L462 AbstractCegarLoop]: Abstraction has 182894 states and 750285 transitions. [2019-12-07 18:02:03,626 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:02:03,626 INFO L276 IsEmpty]: Start isEmpty. Operand 182894 states and 750285 transitions. [2019-12-07 18:02:03,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:02:03,633 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:02:03,633 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:02:03,634 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:02:03,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:02:03,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1174763718, now seen corresponding path program 1 times [2019-12-07 18:02:03,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:02:03,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763758676] [2019-12-07 18:02:03,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:02:03,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:02:03,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:02:03,685 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1763758676] [2019-12-07 18:02:03,685 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:02:03,685 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:02:03,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [885772355] [2019-12-07 18:02:03,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:02:03,686 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:02:03,686 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:02:03,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:02:03,686 INFO L87 Difference]: Start difference. First operand 182894 states and 750285 transitions. Second operand 5 states. [2019-12-07 18:02:05,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:02:05,297 INFO L93 Difference]: Finished difference Result 246966 states and 1003484 transitions. [2019-12-07 18:02:05,297 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:02:05,297 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:02:05,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:02:05,914 INFO L225 Difference]: With dead ends: 246966 [2019-12-07 18:02:05,915 INFO L226 Difference]: Without dead ends: 246966 [2019-12-07 18:02:05,915 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:02:12,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246966 states. [2019-12-07 18:02:18,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246966 to 202377. [2019-12-07 18:02:18,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202377 states. [2019-12-07 18:02:19,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202377 states to 202377 states and 829448 transitions. [2019-12-07 18:02:19,010 INFO L78 Accepts]: Start accepts. Automaton has 202377 states and 829448 transitions. Word has length 16 [2019-12-07 18:02:19,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:02:19,010 INFO L462 AbstractCegarLoop]: Abstraction has 202377 states and 829448 transitions. [2019-12-07 18:02:19,010 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:02:19,010 INFO L276 IsEmpty]: Start isEmpty. Operand 202377 states and 829448 transitions. [2019-12-07 18:02:19,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:02:19,024 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:02:19,024 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:02:19,024 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:02:19,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:02:19,025 INFO L82 PathProgramCache]: Analyzing trace with hash -1130186099, now seen corresponding path program 1 times [2019-12-07 18:02:19,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:02:19,025 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932216616] [2019-12-07 18:02:19,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:02:19,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:02:19,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:02:19,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [932216616] [2019-12-07 18:02:19,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:02:19,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:02:19,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1521549782] [2019-12-07 18:02:19,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:02:19,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:02:19,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:02:19,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:02:19,101 INFO L87 Difference]: Start difference. First operand 202377 states and 829448 transitions. Second operand 3 states. [2019-12-07 18:02:21,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:02:21,200 INFO L93 Difference]: Finished difference Result 360373 states and 1469997 transitions. [2019-12-07 18:02:21,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:02:21,201 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:02:21,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:02:22,004 INFO L225 Difference]: With dead ends: 360373 [2019-12-07 18:02:22,005 INFO L226 Difference]: Without dead ends: 326981 [2019-12-07 18:02:22,005 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:02:29,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326981 states. [2019-12-07 18:02:34,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326981 to 314611. [2019-12-07 18:02:34,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314611 states. [2019-12-07 18:02:35,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314611 states to 314611 states and 1292003 transitions. [2019-12-07 18:02:35,599 INFO L78 Accepts]: Start accepts. Automaton has 314611 states and 1292003 transitions. Word has length 18 [2019-12-07 18:02:35,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:02:35,599 INFO L462 AbstractCegarLoop]: Abstraction has 314611 states and 1292003 transitions. [2019-12-07 18:02:35,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:02:35,600 INFO L276 IsEmpty]: Start isEmpty. Operand 314611 states and 1292003 transitions. [2019-12-07 18:02:35,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:02:35,620 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:02:35,620 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:02:35,620 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:02:35,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:02:35,620 INFO L82 PathProgramCache]: Analyzing trace with hash -1770026118, now seen corresponding path program 1 times [2019-12-07 18:02:35,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:02:35,620 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860658351] [2019-12-07 18:02:35,621 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:02:35,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:02:35,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:02:35,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860658351] [2019-12-07 18:02:35,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:02:35,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:02:35,660 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708589910] [2019-12-07 18:02:35,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:02:35,661 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:02:35,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:02:35,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:02:35,661 INFO L87 Difference]: Start difference. First operand 314611 states and 1292003 transitions. Second operand 5 states. [2019-12-07 18:02:40,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:02:40,633 INFO L93 Difference]: Finished difference Result 417749 states and 1684092 transitions. [2019-12-07 18:02:40,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:02:40,633 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:02:40,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:02:42,009 INFO L225 Difference]: With dead ends: 417749 [2019-12-07 18:02:42,009 INFO L226 Difference]: Without dead ends: 417651 [2019-12-07 18:02:42,010 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:02:50,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 417651 states. [2019-12-07 18:02:56,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 417651 to 328151. [2019-12-07 18:02:56,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328151 states. [2019-12-07 18:02:57,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328151 states to 328151 states and 1345794 transitions. [2019-12-07 18:02:57,526 INFO L78 Accepts]: Start accepts. Automaton has 328151 states and 1345794 transitions. Word has length 19 [2019-12-07 18:02:57,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:02:57,526 INFO L462 AbstractCegarLoop]: Abstraction has 328151 states and 1345794 transitions. [2019-12-07 18:02:57,526 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:02:57,527 INFO L276 IsEmpty]: Start isEmpty. Operand 328151 states and 1345794 transitions. [2019-12-07 18:02:57,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:02:57,551 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:02:57,551 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:02:57,551 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:02:57,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:02:57,551 INFO L82 PathProgramCache]: Analyzing trace with hash 115321022, now seen corresponding path program 1 times [2019-12-07 18:02:57,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:02:57,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [71467090] [2019-12-07 18:02:57,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:02:57,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:02:57,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:02:57,584 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [71467090] [2019-12-07 18:02:57,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:02:57,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:02:57,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080873671] [2019-12-07 18:02:57,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:02:57,585 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:02:57,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:02:57,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:02:57,585 INFO L87 Difference]: Start difference. First operand 328151 states and 1345794 transitions. Second operand 3 states. [2019-12-07 18:02:59,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:02:59,667 INFO L93 Difference]: Finished difference Result 328151 states and 1332566 transitions. [2019-12-07 18:02:59,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:02:59,667 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:02:59,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:03:00,480 INFO L225 Difference]: With dead ends: 328151 [2019-12-07 18:03:00,480 INFO L226 Difference]: Without dead ends: 328151 [2019-12-07 18:03:00,480 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:03:11,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328151 states. [2019-12-07 18:03:15,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328151 to 325487. [2019-12-07 18:03:15,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325487 states. [2019-12-07 18:03:16,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325487 states to 325487 states and 1322790 transitions. [2019-12-07 18:03:16,534 INFO L78 Accepts]: Start accepts. Automaton has 325487 states and 1322790 transitions. Word has length 19 [2019-12-07 18:03:16,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:03:16,534 INFO L462 AbstractCegarLoop]: Abstraction has 325487 states and 1322790 transitions. [2019-12-07 18:03:16,534 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:03:16,534 INFO L276 IsEmpty]: Start isEmpty. Operand 325487 states and 1322790 transitions. [2019-12-07 18:03:16,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:03:16,556 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:03:16,556 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:03:16,557 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:03:16,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:03:16,557 INFO L82 PathProgramCache]: Analyzing trace with hash 1476369392, now seen corresponding path program 1 times [2019-12-07 18:03:16,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:03:16,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960204195] [2019-12-07 18:03:16,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:03:16,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:03:16,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:03:16,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960204195] [2019-12-07 18:03:16,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:03:16,591 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:03:16,591 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971749989] [2019-12-07 18:03:16,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:03:16,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:03:16,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:03:16,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:03:16,592 INFO L87 Difference]: Start difference. First operand 325487 states and 1322790 transitions. Second operand 3 states. [2019-12-07 18:03:18,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:03:18,442 INFO L93 Difference]: Finished difference Result 322858 states and 1311997 transitions. [2019-12-07 18:03:18,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:03:18,442 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:03:18,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:03:19,266 INFO L225 Difference]: With dead ends: 322858 [2019-12-07 18:03:19,266 INFO L226 Difference]: Without dead ends: 322858 [2019-12-07 18:03:19,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:03:26,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322858 states. [2019-12-07 18:03:30,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322858 to 297550. [2019-12-07 18:03:30,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297550 states. [2019-12-07 18:03:31,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297550 states to 297550 states and 1208941 transitions. [2019-12-07 18:03:31,880 INFO L78 Accepts]: Start accepts. Automaton has 297550 states and 1208941 transitions. Word has length 19 [2019-12-07 18:03:31,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:03:31,881 INFO L462 AbstractCegarLoop]: Abstraction has 297550 states and 1208941 transitions. [2019-12-07 18:03:31,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:03:31,881 INFO L276 IsEmpty]: Start isEmpty. Operand 297550 states and 1208941 transitions. [2019-12-07 18:03:31,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:03:31,904 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:03:31,904 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:03:31,905 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:03:31,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:03:31,905 INFO L82 PathProgramCache]: Analyzing trace with hash 454537609, now seen corresponding path program 1 times [2019-12-07 18:03:31,905 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:03:31,905 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374017465] [2019-12-07 18:03:31,905 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:03:31,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:03:31,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:03:31,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374017465] [2019-12-07 18:03:31,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:03:31,953 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:03:31,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1810416892] [2019-12-07 18:03:31,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:03:31,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:03:31,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:03:31,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:03:31,954 INFO L87 Difference]: Start difference. First operand 297550 states and 1208941 transitions. Second operand 4 states. [2019-12-07 18:03:36,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:03:36,085 INFO L93 Difference]: Finished difference Result 335336 states and 1350580 transitions. [2019-12-07 18:03:36,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:03:36,086 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 18:03:36,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:03:36,902 INFO L225 Difference]: With dead ends: 335336 [2019-12-07 18:03:36,902 INFO L226 Difference]: Without dead ends: 335336 [2019-12-07 18:03:36,902 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:03:44,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335336 states. [2019-12-07 18:03:48,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335336 to 297526. [2019-12-07 18:03:48,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297526 states. [2019-12-07 18:03:50,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297526 states to 297526 states and 1208846 transitions. [2019-12-07 18:03:50,077 INFO L78 Accepts]: Start accepts. Automaton has 297526 states and 1208846 transitions. Word has length 20 [2019-12-07 18:03:50,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:03:50,077 INFO L462 AbstractCegarLoop]: Abstraction has 297526 states and 1208846 transitions. [2019-12-07 18:03:50,077 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:03:50,077 INFO L276 IsEmpty]: Start isEmpty. Operand 297526 states and 1208846 transitions. [2019-12-07 18:03:50,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:03:50,106 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:03:50,107 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:03:50,107 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:03:50,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:03:50,107 INFO L82 PathProgramCache]: Analyzing trace with hash -50907777, now seen corresponding path program 1 times [2019-12-07 18:03:50,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:03:50,107 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626257483] [2019-12-07 18:03:50,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:03:50,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:03:50,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:03:50,149 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626257483] [2019-12-07 18:03:50,149 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:03:50,149 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:03:50,149 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1699829064] [2019-12-07 18:03:50,149 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:03:50,149 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:03:50,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:03:50,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:03:50,150 INFO L87 Difference]: Start difference. First operand 297526 states and 1208846 transitions. Second operand 4 states. [2019-12-07 18:03:52,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:03:52,680 INFO L93 Difference]: Finished difference Result 459133 states and 1856451 transitions. [2019-12-07 18:03:52,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:03:52,681 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 18:03:52,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:03:53,762 INFO L225 Difference]: With dead ends: 459133 [2019-12-07 18:03:53,762 INFO L226 Difference]: Without dead ends: 411694 [2019-12-07 18:03:53,762 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:04:05,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411694 states. [2019-12-07 18:04:10,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411694 to 287144. [2019-12-07 18:04:10,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287144 states. [2019-12-07 18:04:11,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287144 states to 287144 states and 1161745 transitions. [2019-12-07 18:04:11,561 INFO L78 Accepts]: Start accepts. Automaton has 287144 states and 1161745 transitions. Word has length 21 [2019-12-07 18:04:11,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:11,561 INFO L462 AbstractCegarLoop]: Abstraction has 287144 states and 1161745 transitions. [2019-12-07 18:04:11,561 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:04:11,561 INFO L276 IsEmpty]: Start isEmpty. Operand 287144 states and 1161745 transitions. [2019-12-07 18:04:11,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 18:04:11,590 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:11,590 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:11,590 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:11,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:11,591 INFO L82 PathProgramCache]: Analyzing trace with hash -31915662, now seen corresponding path program 1 times [2019-12-07 18:04:11,591 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:11,591 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945280865] [2019-12-07 18:04:11,591 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:11,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:11,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:11,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945280865] [2019-12-07 18:04:11,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:11,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:04:11,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651179745] [2019-12-07 18:04:11,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:04:11,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:11,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:04:11,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:11,623 INFO L87 Difference]: Start difference. First operand 287144 states and 1161745 transitions. Second operand 3 states. [2019-12-07 18:04:11,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:11,794 INFO L93 Difference]: Finished difference Result 56769 states and 181021 transitions. [2019-12-07 18:04:11,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:04:11,795 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 18:04:11,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:11,879 INFO L225 Difference]: With dead ends: 56769 [2019-12-07 18:04:11,879 INFO L226 Difference]: Without dead ends: 56769 [2019-12-07 18:04:11,879 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:12,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56769 states. [2019-12-07 18:04:12,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56769 to 56769. [2019-12-07 18:04:12,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56769 states. [2019-12-07 18:04:12,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56769 states to 56769 states and 181021 transitions. [2019-12-07 18:04:12,788 INFO L78 Accepts]: Start accepts. Automaton has 56769 states and 181021 transitions. Word has length 21 [2019-12-07 18:04:12,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:12,788 INFO L462 AbstractCegarLoop]: Abstraction has 56769 states and 181021 transitions. [2019-12-07 18:04:12,788 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:04:12,788 INFO L276 IsEmpty]: Start isEmpty. Operand 56769 states and 181021 transitions. [2019-12-07 18:04:12,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:04:12,794 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:12,794 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:12,794 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:12,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:12,794 INFO L82 PathProgramCache]: Analyzing trace with hash -219431606, now seen corresponding path program 1 times [2019-12-07 18:04:12,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:12,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084236522] [2019-12-07 18:04:12,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:12,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:12,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:12,831 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084236522] [2019-12-07 18:04:12,831 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:12,831 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:04:12,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020890365] [2019-12-07 18:04:12,831 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:04:12,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:12,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:04:12,832 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:04:12,832 INFO L87 Difference]: Start difference. First operand 56769 states and 181021 transitions. Second operand 6 states. [2019-12-07 18:04:13,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:13,973 INFO L93 Difference]: Finished difference Result 82600 states and 257673 transitions. [2019-12-07 18:04:13,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:04:13,973 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:04:13,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:14,086 INFO L225 Difference]: With dead ends: 82600 [2019-12-07 18:04:14,086 INFO L226 Difference]: Without dead ends: 82551 [2019-12-07 18:04:14,087 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:04:14,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82551 states. [2019-12-07 18:04:15,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82551 to 63907. [2019-12-07 18:04:15,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63907 states. [2019-12-07 18:04:15,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63907 states to 63907 states and 202249 transitions. [2019-12-07 18:04:15,261 INFO L78 Accepts]: Start accepts. Automaton has 63907 states and 202249 transitions. Word has length 22 [2019-12-07 18:04:15,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:15,262 INFO L462 AbstractCegarLoop]: Abstraction has 63907 states and 202249 transitions. [2019-12-07 18:04:15,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:04:15,262 INFO L276 IsEmpty]: Start isEmpty. Operand 63907 states and 202249 transitions. [2019-12-07 18:04:15,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:04:15,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:15,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:15,277 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:15,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:15,277 INFO L82 PathProgramCache]: Analyzing trace with hash 1790545903, now seen corresponding path program 1 times [2019-12-07 18:04:15,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:15,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035543785] [2019-12-07 18:04:15,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:15,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:15,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:15,315 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035543785] [2019-12-07 18:04:15,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:15,315 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:04:15,315 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367661024] [2019-12-07 18:04:15,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:04:15,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:15,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:04:15,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:04:15,316 INFO L87 Difference]: Start difference. First operand 63907 states and 202249 transitions. Second operand 6 states. [2019-12-07 18:04:15,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:15,781 INFO L93 Difference]: Finished difference Result 82695 states and 256419 transitions. [2019-12-07 18:04:15,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:04:15,781 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:04:15,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:15,891 INFO L225 Difference]: With dead ends: 82695 [2019-12-07 18:04:15,891 INFO L226 Difference]: Without dead ends: 82466 [2019-12-07 18:04:15,891 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:04:16,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82466 states. [2019-12-07 18:04:17,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82466 to 65158. [2019-12-07 18:04:17,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65158 states. [2019-12-07 18:04:17,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65158 states to 65158 states and 205799 transitions. [2019-12-07 18:04:17,453 INFO L78 Accepts]: Start accepts. Automaton has 65158 states and 205799 transitions. Word has length 27 [2019-12-07 18:04:17,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:17,453 INFO L462 AbstractCegarLoop]: Abstraction has 65158 states and 205799 transitions. [2019-12-07 18:04:17,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:04:17,453 INFO L276 IsEmpty]: Start isEmpty. Operand 65158 states and 205799 transitions. [2019-12-07 18:04:17,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:04:17,475 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:17,475 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:17,475 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:17,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:17,476 INFO L82 PathProgramCache]: Analyzing trace with hash 101231732, now seen corresponding path program 1 times [2019-12-07 18:04:17,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:17,476 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2065005835] [2019-12-07 18:04:17,476 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:17,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:17,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:17,510 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2065005835] [2019-12-07 18:04:17,510 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:17,510 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:04:17,511 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430616532] [2019-12-07 18:04:17,511 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:04:17,511 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:17,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:04:17,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:17,511 INFO L87 Difference]: Start difference. First operand 65158 states and 205799 transitions. Second operand 4 states. [2019-12-07 18:04:17,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:17,589 INFO L93 Difference]: Finished difference Result 24830 states and 75182 transitions. [2019-12-07 18:04:17,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:04:17,590 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 18:04:17,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:17,624 INFO L225 Difference]: With dead ends: 24830 [2019-12-07 18:04:17,624 INFO L226 Difference]: Without dead ends: 24823 [2019-12-07 18:04:17,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:17,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24823 states. [2019-12-07 18:04:17,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24823 to 23414. [2019-12-07 18:04:17,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23414 states. [2019-12-07 18:04:17,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23414 states to 23414 states and 71016 transitions. [2019-12-07 18:04:17,976 INFO L78 Accepts]: Start accepts. Automaton has 23414 states and 71016 transitions. Word has length 30 [2019-12-07 18:04:17,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:17,976 INFO L462 AbstractCegarLoop]: Abstraction has 23414 states and 71016 transitions. [2019-12-07 18:04:17,976 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:04:17,976 INFO L276 IsEmpty]: Start isEmpty. Operand 23414 states and 71016 transitions. [2019-12-07 18:04:17,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:04:17,992 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:17,992 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:17,992 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:17,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:17,993 INFO L82 PathProgramCache]: Analyzing trace with hash -718999585, now seen corresponding path program 1 times [2019-12-07 18:04:17,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:17,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464281193] [2019-12-07 18:04:17,993 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:18,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:18,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:18,048 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1464281193] [2019-12-07 18:04:18,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:18,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:04:18,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [592369418] [2019-12-07 18:04:18,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:04:18,049 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:18,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:04:18,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:04:18,049 INFO L87 Difference]: Start difference. First operand 23414 states and 71016 transitions. Second operand 7 states. [2019-12-07 18:04:18,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:18,701 INFO L93 Difference]: Finished difference Result 29795 states and 87851 transitions. [2019-12-07 18:04:18,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:04:18,701 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:04:18,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:18,734 INFO L225 Difference]: With dead ends: 29795 [2019-12-07 18:04:18,735 INFO L226 Difference]: Without dead ends: 29795 [2019-12-07 18:04:18,735 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:04:18,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29795 states. [2019-12-07 18:04:19,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29795 to 22977. [2019-12-07 18:04:19,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22977 states. [2019-12-07 18:04:19,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22977 states to 22977 states and 69849 transitions. [2019-12-07 18:04:19,166 INFO L78 Accepts]: Start accepts. Automaton has 22977 states and 69849 transitions. Word has length 33 [2019-12-07 18:04:19,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:19,167 INFO L462 AbstractCegarLoop]: Abstraction has 22977 states and 69849 transitions. [2019-12-07 18:04:19,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:04:19,167 INFO L276 IsEmpty]: Start isEmpty. Operand 22977 states and 69849 transitions. [2019-12-07 18:04:19,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:04:19,185 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:19,185 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:19,185 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:19,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:19,185 INFO L82 PathProgramCache]: Analyzing trace with hash -1494536628, now seen corresponding path program 1 times [2019-12-07 18:04:19,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:19,185 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [946431239] [2019-12-07 18:04:19,185 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:19,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:19,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:19,213 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [946431239] [2019-12-07 18:04:19,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:19,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:04:19,213 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51703762] [2019-12-07 18:04:19,213 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:04:19,213 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:19,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:04:19,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:19,214 INFO L87 Difference]: Start difference. First operand 22977 states and 69849 transitions. Second operand 3 states. [2019-12-07 18:04:19,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:19,269 INFO L93 Difference]: Finished difference Result 21994 states and 65815 transitions. [2019-12-07 18:04:19,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:04:19,269 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 18:04:19,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:19,295 INFO L225 Difference]: With dead ends: 21994 [2019-12-07 18:04:19,295 INFO L226 Difference]: Without dead ends: 21994 [2019-12-07 18:04:19,296 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:19,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21994 states. [2019-12-07 18:04:19,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21994 to 21862. [2019-12-07 18:04:19,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21862 states. [2019-12-07 18:04:19,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21862 states to 21862 states and 65446 transitions. [2019-12-07 18:04:19,620 INFO L78 Accepts]: Start accepts. Automaton has 21862 states and 65446 transitions. Word has length 41 [2019-12-07 18:04:19,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:19,621 INFO L462 AbstractCegarLoop]: Abstraction has 21862 states and 65446 transitions. [2019-12-07 18:04:19,621 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:04:19,621 INFO L276 IsEmpty]: Start isEmpty. Operand 21862 states and 65446 transitions. [2019-12-07 18:04:19,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 18:04:19,639 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:19,639 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:19,639 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:19,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:19,639 INFO L82 PathProgramCache]: Analyzing trace with hash -2107392736, now seen corresponding path program 1 times [2019-12-07 18:04:19,639 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:19,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712230898] [2019-12-07 18:04:19,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:19,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:19,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:19,674 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712230898] [2019-12-07 18:04:19,674 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:19,674 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:04:19,674 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295807175] [2019-12-07 18:04:19,674 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:04:19,675 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:19,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:04:19,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:04:19,675 INFO L87 Difference]: Start difference. First operand 21862 states and 65446 transitions. Second operand 5 states. [2019-12-07 18:04:19,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:19,734 INFO L93 Difference]: Finished difference Result 19984 states and 61306 transitions. [2019-12-07 18:04:19,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:04:19,735 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 18:04:19,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:19,755 INFO L225 Difference]: With dead ends: 19984 [2019-12-07 18:04:19,755 INFO L226 Difference]: Without dead ends: 19550 [2019-12-07 18:04:19,756 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:04:19,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19550 states. [2019-12-07 18:04:19,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19550 to 11756. [2019-12-07 18:04:19,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11756 states. [2019-12-07 18:04:19,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11756 states to 11756 states and 36213 transitions. [2019-12-07 18:04:19,970 INFO L78 Accepts]: Start accepts. Automaton has 11756 states and 36213 transitions. Word has length 42 [2019-12-07 18:04:19,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:19,970 INFO L462 AbstractCegarLoop]: Abstraction has 11756 states and 36213 transitions. [2019-12-07 18:04:19,970 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:04:19,970 INFO L276 IsEmpty]: Start isEmpty. Operand 11756 states and 36213 transitions. [2019-12-07 18:04:19,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:04:19,980 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:19,980 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:19,980 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:19,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:19,980 INFO L82 PathProgramCache]: Analyzing trace with hash -1663930386, now seen corresponding path program 1 times [2019-12-07 18:04:19,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:19,980 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483103820] [2019-12-07 18:04:19,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:19,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:20,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:20,008 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483103820] [2019-12-07 18:04:20,008 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:20,008 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:04:20,009 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [928706313] [2019-12-07 18:04:20,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:04:20,009 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:20,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:04:20,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:20,009 INFO L87 Difference]: Start difference. First operand 11756 states and 36213 transitions. Second operand 3 states. [2019-12-07 18:04:20,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:20,066 INFO L93 Difference]: Finished difference Result 16486 states and 50235 transitions. [2019-12-07 18:04:20,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:04:20,066 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:04:20,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:20,085 INFO L225 Difference]: With dead ends: 16486 [2019-12-07 18:04:20,085 INFO L226 Difference]: Without dead ends: 16486 [2019-12-07 18:04:20,085 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:20,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16486 states. [2019-12-07 18:04:20,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16486 to 13149. [2019-12-07 18:04:20,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13149 states. [2019-12-07 18:04:20,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13149 states to 13149 states and 40316 transitions. [2019-12-07 18:04:20,303 INFO L78 Accepts]: Start accepts. Automaton has 13149 states and 40316 transitions. Word has length 66 [2019-12-07 18:04:20,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:20,304 INFO L462 AbstractCegarLoop]: Abstraction has 13149 states and 40316 transitions. [2019-12-07 18:04:20,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:04:20,304 INFO L276 IsEmpty]: Start isEmpty. Operand 13149 states and 40316 transitions. [2019-12-07 18:04:20,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:04:20,315 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:20,315 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:20,316 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:20,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:20,316 INFO L82 PathProgramCache]: Analyzing trace with hash 1459905554, now seen corresponding path program 1 times [2019-12-07 18:04:20,316 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:20,316 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649617089] [2019-12-07 18:04:20,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:20,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:20,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:20,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649617089] [2019-12-07 18:04:20,369 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:20,369 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:04:20,369 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674513676] [2019-12-07 18:04:20,369 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:04:20,369 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:20,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:04:20,369 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:04:20,369 INFO L87 Difference]: Start difference. First operand 13149 states and 40316 transitions. Second operand 5 states. [2019-12-07 18:04:20,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:20,710 INFO L93 Difference]: Finished difference Result 19791 states and 59806 transitions. [2019-12-07 18:04:20,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:04:20,710 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 18:04:20,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:20,730 INFO L225 Difference]: With dead ends: 19791 [2019-12-07 18:04:20,730 INFO L226 Difference]: Without dead ends: 19791 [2019-12-07 18:04:20,730 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:04:20,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19791 states. [2019-12-07 18:04:20,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19791 to 16579. [2019-12-07 18:04:20,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16579 states. [2019-12-07 18:04:20,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16579 states to 16579 states and 50698 transitions. [2019-12-07 18:04:20,993 INFO L78 Accepts]: Start accepts. Automaton has 16579 states and 50698 transitions. Word has length 66 [2019-12-07 18:04:20,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:20,993 INFO L462 AbstractCegarLoop]: Abstraction has 16579 states and 50698 transitions. [2019-12-07 18:04:20,993 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:04:20,994 INFO L276 IsEmpty]: Start isEmpty. Operand 16579 states and 50698 transitions. [2019-12-07 18:04:21,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:04:21,008 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:21,008 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:21,008 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:21,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:21,008 INFO L82 PathProgramCache]: Analyzing trace with hash -1255297360, now seen corresponding path program 2 times [2019-12-07 18:04:21,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:21,009 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332722384] [2019-12-07 18:04:21,009 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:21,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:21,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:21,075 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332722384] [2019-12-07 18:04:21,076 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:21,076 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:04:21,076 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [170641221] [2019-12-07 18:04:21,076 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:04:21,076 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:21,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:04:21,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:21,076 INFO L87 Difference]: Start difference. First operand 16579 states and 50698 transitions. Second operand 4 states. [2019-12-07 18:04:21,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:21,159 INFO L93 Difference]: Finished difference Result 19484 states and 59450 transitions. [2019-12-07 18:04:21,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:04:21,159 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 18:04:21,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:21,181 INFO L225 Difference]: With dead ends: 19484 [2019-12-07 18:04:21,181 INFO L226 Difference]: Without dead ends: 19484 [2019-12-07 18:04:21,181 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:21,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19484 states. [2019-12-07 18:04:21,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19484 to 15440. [2019-12-07 18:04:21,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15440 states. [2019-12-07 18:04:21,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15440 states to 15440 states and 47555 transitions. [2019-12-07 18:04:21,473 INFO L78 Accepts]: Start accepts. Automaton has 15440 states and 47555 transitions. Word has length 66 [2019-12-07 18:04:21,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:21,473 INFO L462 AbstractCegarLoop]: Abstraction has 15440 states and 47555 transitions. [2019-12-07 18:04:21,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:04:21,473 INFO L276 IsEmpty]: Start isEmpty. Operand 15440 states and 47555 transitions. [2019-12-07 18:04:21,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:21,486 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:21,486 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:21,486 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:21,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:21,486 INFO L82 PathProgramCache]: Analyzing trace with hash -702436442, now seen corresponding path program 1 times [2019-12-07 18:04:21,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:21,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73803490] [2019-12-07 18:04:21,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:21,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:21,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:21,584 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [73803490] [2019-12-07 18:04:21,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:21,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:04:21,585 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [137989692] [2019-12-07 18:04:21,585 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:04:21,585 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:21,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:04:21,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:04:21,585 INFO L87 Difference]: Start difference. First operand 15440 states and 47555 transitions. Second operand 8 states. [2019-12-07 18:04:23,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:23,107 INFO L93 Difference]: Finished difference Result 80547 states and 246022 transitions. [2019-12-07 18:04:23,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:04:23,107 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 67 [2019-12-07 18:04:23,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:23,183 INFO L225 Difference]: With dead ends: 80547 [2019-12-07 18:04:23,183 INFO L226 Difference]: Without dead ends: 59384 [2019-12-07 18:04:23,183 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=224, Invalid=768, Unknown=0, NotChecked=0, Total=992 [2019-12-07 18:04:23,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59384 states. [2019-12-07 18:04:23,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59384 to 18078. [2019-12-07 18:04:23,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18078 states. [2019-12-07 18:04:23,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18078 states to 18078 states and 55556 transitions. [2019-12-07 18:04:23,747 INFO L78 Accepts]: Start accepts. Automaton has 18078 states and 55556 transitions. Word has length 67 [2019-12-07 18:04:23,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:23,747 INFO L462 AbstractCegarLoop]: Abstraction has 18078 states and 55556 transitions. [2019-12-07 18:04:23,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:04:23,747 INFO L276 IsEmpty]: Start isEmpty. Operand 18078 states and 55556 transitions. [2019-12-07 18:04:23,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:23,764 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:23,764 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:23,764 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:23,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:23,764 INFO L82 PathProgramCache]: Analyzing trace with hash -982181312, now seen corresponding path program 2 times [2019-12-07 18:04:23,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:23,765 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1098238398] [2019-12-07 18:04:23,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:23,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:23,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:23,821 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1098238398] [2019-12-07 18:04:23,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:23,822 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:04:23,822 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937375665] [2019-12-07 18:04:23,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:04:23,822 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:23,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:04:23,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:23,822 INFO L87 Difference]: Start difference. First operand 18078 states and 55556 transitions. Second operand 4 states. [2019-12-07 18:04:23,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:23,928 INFO L93 Difference]: Finished difference Result 31351 states and 96710 transitions. [2019-12-07 18:04:23,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:04:23,928 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:04:23,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:23,944 INFO L225 Difference]: With dead ends: 31351 [2019-12-07 18:04:23,945 INFO L226 Difference]: Without dead ends: 14533 [2019-12-07 18:04:23,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:04:24,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14533 states. [2019-12-07 18:04:24,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14533 to 14533. [2019-12-07 18:04:24,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14533 states. [2019-12-07 18:04:24,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14533 states to 14533 states and 44893 transitions. [2019-12-07 18:04:24,150 INFO L78 Accepts]: Start accepts. Automaton has 14533 states and 44893 transitions. Word has length 67 [2019-12-07 18:04:24,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:24,150 INFO L462 AbstractCegarLoop]: Abstraction has 14533 states and 44893 transitions. [2019-12-07 18:04:24,150 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:04:24,150 INFO L276 IsEmpty]: Start isEmpty. Operand 14533 states and 44893 transitions. [2019-12-07 18:04:24,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:24,162 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:24,162 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:24,162 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:24,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:24,162 INFO L82 PathProgramCache]: Analyzing trace with hash -1677754344, now seen corresponding path program 3 times [2019-12-07 18:04:24,162 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:24,163 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767083468] [2019-12-07 18:04:24,163 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:24,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:24,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:24,338 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767083468] [2019-12-07 18:04:24,338 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:24,338 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:04:24,339 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212536228] [2019-12-07 18:04:24,339 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 18:04:24,339 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:24,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 18:04:24,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=152, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:04:24,339 INFO L87 Difference]: Start difference. First operand 14533 states and 44893 transitions. Second operand 14 states. [2019-12-07 18:04:30,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:30,777 INFO L93 Difference]: Finished difference Result 60092 states and 181987 transitions. [2019-12-07 18:04:30,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 103 states. [2019-12-07 18:04:30,778 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 18:04:30,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:30,831 INFO L225 Difference]: With dead ends: 60092 [2019-12-07 18:04:30,831 INFO L226 Difference]: Without dead ends: 44834 [2019-12-07 18:04:30,835 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3989 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=1393, Invalid=9527, Unknown=0, NotChecked=0, Total=10920 [2019-12-07 18:04:30,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44834 states. [2019-12-07 18:04:31,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44834 to 15451. [2019-12-07 18:04:31,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15451 states. [2019-12-07 18:04:31,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15451 states to 15451 states and 47340 transitions. [2019-12-07 18:04:31,272 INFO L78 Accepts]: Start accepts. Automaton has 15451 states and 47340 transitions. Word has length 67 [2019-12-07 18:04:31,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:31,272 INFO L462 AbstractCegarLoop]: Abstraction has 15451 states and 47340 transitions. [2019-12-07 18:04:31,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 18:04:31,272 INFO L276 IsEmpty]: Start isEmpty. Operand 15451 states and 47340 transitions. [2019-12-07 18:04:31,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:31,287 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:31,287 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:31,287 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:31,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:31,287 INFO L82 PathProgramCache]: Analyzing trace with hash 15945052, now seen corresponding path program 4 times [2019-12-07 18:04:31,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:31,287 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597134582] [2019-12-07 18:04:31,287 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:31,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:31,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:31,343 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597134582] [2019-12-07 18:04:31,343 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:31,343 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:04:31,343 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [894470831] [2019-12-07 18:04:31,344 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:04:31,344 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:31,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:04:31,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:31,344 INFO L87 Difference]: Start difference. First operand 15451 states and 47340 transitions. Second operand 4 states. [2019-12-07 18:04:31,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:31,415 INFO L93 Difference]: Finished difference Result 26278 states and 80398 transitions. [2019-12-07 18:04:31,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:04:31,415 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:04:31,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:31,427 INFO L225 Difference]: With dead ends: 26278 [2019-12-07 18:04:31,427 INFO L226 Difference]: Without dead ends: 11705 [2019-12-07 18:04:31,428 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:31,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11705 states. [2019-12-07 18:04:31,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11705 to 11705. [2019-12-07 18:04:31,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11705 states. [2019-12-07 18:04:31,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11705 states to 11705 states and 35507 transitions. [2019-12-07 18:04:31,593 INFO L78 Accepts]: Start accepts. Automaton has 11705 states and 35507 transitions. Word has length 67 [2019-12-07 18:04:31,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:31,594 INFO L462 AbstractCegarLoop]: Abstraction has 11705 states and 35507 transitions. [2019-12-07 18:04:31,594 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:04:31,594 INFO L276 IsEmpty]: Start isEmpty. Operand 11705 states and 35507 transitions. [2019-12-07 18:04:31,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:31,603 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:31,603 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:31,603 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:31,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:31,603 INFO L82 PathProgramCache]: Analyzing trace with hash -2091967768, now seen corresponding path program 5 times [2019-12-07 18:04:31,604 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:31,604 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246655296] [2019-12-07 18:04:31,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:31,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:31,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:31,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246655296] [2019-12-07 18:04:31,683 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:31,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:04:31,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937620792] [2019-12-07 18:04:31,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:04:31,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:31,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:04:31,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:04:31,684 INFO L87 Difference]: Start difference. First operand 11705 states and 35507 transitions. Second operand 7 states. [2019-12-07 18:04:31,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:31,915 INFO L93 Difference]: Finished difference Result 21134 states and 63081 transitions. [2019-12-07 18:04:31,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 18:04:31,916 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 18:04:31,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:31,932 INFO L225 Difference]: With dead ends: 21134 [2019-12-07 18:04:31,932 INFO L226 Difference]: Without dead ends: 15428 [2019-12-07 18:04:31,933 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:04:31,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15428 states. [2019-12-07 18:04:32,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15428 to 12381. [2019-12-07 18:04:32,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12381 states. [2019-12-07 18:04:32,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12381 states to 12381 states and 37421 transitions. [2019-12-07 18:04:32,148 INFO L78 Accepts]: Start accepts. Automaton has 12381 states and 37421 transitions. Word has length 67 [2019-12-07 18:04:32,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:32,148 INFO L462 AbstractCegarLoop]: Abstraction has 12381 states and 37421 transitions. [2019-12-07 18:04:32,149 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:04:32,149 INFO L276 IsEmpty]: Start isEmpty. Operand 12381 states and 37421 transitions. [2019-12-07 18:04:32,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:32,165 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:32,165 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:32,165 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:32,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:32,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1425975690, now seen corresponding path program 6 times [2019-12-07 18:04:32,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:32,166 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555339741] [2019-12-07 18:04:32,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:32,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:32,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:32,295 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [555339741] [2019-12-07 18:04:32,295 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:32,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:04:32,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744130150] [2019-12-07 18:04:32,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:04:32,295 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:32,296 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:04:32,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:04:32,296 INFO L87 Difference]: Start difference. First operand 12381 states and 37421 transitions. Second operand 11 states. [2019-12-07 18:04:33,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:33,021 INFO L93 Difference]: Finished difference Result 19837 states and 59166 transitions. [2019-12-07 18:04:33,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:04:33,022 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:04:33,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:33,038 INFO L225 Difference]: With dead ends: 19837 [2019-12-07 18:04:33,038 INFO L226 Difference]: Without dead ends: 15138 [2019-12-07 18:04:33,038 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=121, Invalid=529, Unknown=0, NotChecked=0, Total=650 [2019-12-07 18:04:33,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15138 states. [2019-12-07 18:04:33,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15138 to 12381. [2019-12-07 18:04:33,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12381 states. [2019-12-07 18:04:33,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12381 states to 12381 states and 37340 transitions. [2019-12-07 18:04:33,247 INFO L78 Accepts]: Start accepts. Automaton has 12381 states and 37340 transitions. Word has length 67 [2019-12-07 18:04:33,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:33,247 INFO L462 AbstractCegarLoop]: Abstraction has 12381 states and 37340 transitions. [2019-12-07 18:04:33,247 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:04:33,248 INFO L276 IsEmpty]: Start isEmpty. Operand 12381 states and 37340 transitions. [2019-12-07 18:04:33,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:33,259 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:33,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:33,259 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:33,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:33,259 INFO L82 PathProgramCache]: Analyzing trace with hash 1279627604, now seen corresponding path program 7 times [2019-12-07 18:04:33,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:33,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052860105] [2019-12-07 18:04:33,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:33,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:33,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:33,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052860105] [2019-12-07 18:04:33,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:33,375 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:04:33,376 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1692310400] [2019-12-07 18:04:33,376 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:04:33,376 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:33,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:04:33,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:04:33,376 INFO L87 Difference]: Start difference. First operand 12381 states and 37340 transitions. Second operand 10 states. [2019-12-07 18:04:33,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:33,944 INFO L93 Difference]: Finished difference Result 19114 states and 56903 transitions. [2019-12-07 18:04:33,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:04:33,944 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 18:04:33,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:33,959 INFO L225 Difference]: With dead ends: 19114 [2019-12-07 18:04:33,960 INFO L226 Difference]: Without dead ends: 15236 [2019-12-07 18:04:33,960 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 250 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=219, Invalid=837, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 18:04:34,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15236 states. [2019-12-07 18:04:34,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15236 to 12043. [2019-12-07 18:04:34,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12043 states. [2019-12-07 18:04:34,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12043 states to 12043 states and 36271 transitions. [2019-12-07 18:04:34,157 INFO L78 Accepts]: Start accepts. Automaton has 12043 states and 36271 transitions. Word has length 67 [2019-12-07 18:04:34,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:34,157 INFO L462 AbstractCegarLoop]: Abstraction has 12043 states and 36271 transitions. [2019-12-07 18:04:34,157 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:04:34,157 INFO L276 IsEmpty]: Start isEmpty. Operand 12043 states and 36271 transitions. [2019-12-07 18:04:34,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:34,167 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:34,167 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:34,167 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:34,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:34,167 INFO L82 PathProgramCache]: Analyzing trace with hash 1642000384, now seen corresponding path program 8 times [2019-12-07 18:04:34,167 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:34,167 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1163401007] [2019-12-07 18:04:34,168 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:34,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:34,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:34,297 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1163401007] [2019-12-07 18:04:34,297 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:34,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:04:34,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089694995] [2019-12-07 18:04:34,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:04:34,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:34,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:04:34,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:04:34,298 INFO L87 Difference]: Start difference. First operand 12043 states and 36271 transitions. Second operand 12 states. [2019-12-07 18:04:34,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:34,845 INFO L93 Difference]: Finished difference Result 17552 states and 52287 transitions. [2019-12-07 18:04:34,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:04:34,845 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 18:04:34,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:34,859 INFO L225 Difference]: With dead ends: 17552 [2019-12-07 18:04:34,859 INFO L226 Difference]: Without dead ends: 13826 [2019-12-07 18:04:34,859 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=116, Invalid=484, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:04:34,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13826 states. [2019-12-07 18:04:35,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13826 to 11717. [2019-12-07 18:04:35,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11717 states. [2019-12-07 18:04:35,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11717 states to 11717 states and 35302 transitions. [2019-12-07 18:04:35,043 INFO L78 Accepts]: Start accepts. Automaton has 11717 states and 35302 transitions. Word has length 67 [2019-12-07 18:04:35,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:35,043 INFO L462 AbstractCegarLoop]: Abstraction has 11717 states and 35302 transitions. [2019-12-07 18:04:35,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:04:35,043 INFO L276 IsEmpty]: Start isEmpty. Operand 11717 states and 35302 transitions. [2019-12-07 18:04:35,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:35,053 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:35,053 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:35,053 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:35,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:35,054 INFO L82 PathProgramCache]: Analyzing trace with hash 8609018, now seen corresponding path program 9 times [2019-12-07 18:04:35,054 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:35,054 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444484219] [2019-12-07 18:04:35,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:35,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:35,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:35,382 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444484219] [2019-12-07 18:04:35,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:35,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:04:35,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047352420] [2019-12-07 18:04:35,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:04:35,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:35,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:04:35,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:04:35,383 INFO L87 Difference]: Start difference. First operand 11717 states and 35302 transitions. Second operand 16 states. [2019-12-07 18:04:38,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:38,142 INFO L93 Difference]: Finished difference Result 13871 states and 40933 transitions. [2019-12-07 18:04:38,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2019-12-07 18:04:38,143 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:04:38,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:38,166 INFO L225 Difference]: With dead ends: 13871 [2019-12-07 18:04:38,166 INFO L226 Difference]: Without dead ends: 13612 [2019-12-07 18:04:38,169 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1386 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=672, Invalid=3884, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 18:04:38,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13612 states. [2019-12-07 18:04:38,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13612 to 11541. [2019-12-07 18:04:38,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11541 states. [2019-12-07 18:04:38,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11541 states to 11541 states and 34830 transitions. [2019-12-07 18:04:38,355 INFO L78 Accepts]: Start accepts. Automaton has 11541 states and 34830 transitions. Word has length 67 [2019-12-07 18:04:38,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:38,355 INFO L462 AbstractCegarLoop]: Abstraction has 11541 states and 34830 transitions. [2019-12-07 18:04:38,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:04:38,355 INFO L276 IsEmpty]: Start isEmpty. Operand 11541 states and 34830 transitions. [2019-12-07 18:04:38,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:04:38,364 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:38,364 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:38,365 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:38,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:38,365 INFO L82 PathProgramCache]: Analyzing trace with hash -919262302, now seen corresponding path program 10 times [2019-12-07 18:04:38,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:38,365 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222545775] [2019-12-07 18:04:38,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:38,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:04:38,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:04:38,440 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:04:38,440 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:04:38,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= 0 v_~weak$$choice0~0_14) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t654~0.base_24|)) (= |v_#NULL.offset_6| 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t654~0.base_24| 4)) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (= |v_ULTIMATE.start_main_~#t654~0.offset_19| 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t654~0.base_24|) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= (store .cse0 |v_ULTIMATE.start_main_~#t654~0.base_24| 1) |v_#valid_63|) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t654~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t654~0.base_24|) |v_ULTIMATE.start_main_~#t654~0.offset_19| 0))) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t655~0.offset=|v_ULTIMATE.start_main_~#t655~0.offset_19|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, ULTIMATE.start_main_~#t656~0.base=|v_ULTIMATE.start_main_~#t656~0.base_27|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ULTIMATE.start_main_~#t656~0.offset=|v_ULTIMATE.start_main_~#t656~0.offset_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_~#t654~0.base=|v_ULTIMATE.start_main_~#t654~0.base_24|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ULTIMATE.start_main_~#t654~0.offset=|v_ULTIMATE.start_main_~#t654~0.offset_19|, ~y~0=v_~y~0_39, ULTIMATE.start_main_~#t655~0.base=|v_ULTIMATE.start_main_~#t655~0.base_26|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t655~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t656~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t656~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_~#t654~0.base, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t654~0.offset, ~y~0, ULTIMATE.start_main_~#t655~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:04:38,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t655~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t655~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t655~0.base_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t655~0.base_10|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t655~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t655~0.base_10|) |v_ULTIMATE.start_main_~#t655~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t655~0.base_10| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t655~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t655~0.base=|v_ULTIMATE.start_main_~#t655~0.base_10|, ULTIMATE.start_main_~#t655~0.offset=|v_ULTIMATE.start_main_~#t655~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t655~0.base, ULTIMATE.start_main_~#t655~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:04:38,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t656~0.base_13| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t656~0.base_13|) (= |v_ULTIMATE.start_main_~#t656~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t656~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t656~0.base_13|) |v_ULTIMATE.start_main_~#t656~0.offset_11| 2)) |v_#memory_int_11|) (not (= 0 |v_ULTIMATE.start_main_~#t656~0.base_13|)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t656~0.base_13|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t656~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t656~0.base=|v_ULTIMATE.start_main_~#t656~0.base_13|, ULTIMATE.start_main_~#t656~0.offset=|v_ULTIMATE.start_main_~#t656~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t656~0.base, ULTIMATE.start_main_~#t656~0.offset, #length] because there is no mapped edge [2019-12-07 18:04:38,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:04:38,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In1981741290 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In1981741290 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1981741290| ~a~0_In1981741290)) (and (not .cse1) (not .cse0) (= ~a$w_buff1~0_In1981741290 |P1Thread1of1ForFork2_#t~ite9_Out1981741290|)))) InVars {~a~0=~a~0_In1981741290, ~a$w_buff1~0=~a$w_buff1~0_In1981741290, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1981741290, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1981741290} OutVars{~a~0=~a~0_In1981741290, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1981741290|, ~a$w_buff1~0=~a$w_buff1~0_In1981741290, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1981741290, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1981741290} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:04:38,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-222160885 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-222160885 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out-222160885| 0)) (and (= ~a$w_buff0_used~0_In-222160885 |P0Thread1of1ForFork1_#t~ite5_Out-222160885|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-222160885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-222160885} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-222160885|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-222160885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-222160885} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:04:38,446 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In-219521352 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-219521352 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-219521352 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-219521352 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-219521352 |P0Thread1of1ForFork1_#t~ite6_Out-219521352|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-219521352|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-219521352, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-219521352, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-219521352, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-219521352} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-219521352|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-219521352, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-219521352, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-219521352, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-219521352} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:04:38,447 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In2038478849 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In2038478849 256))) (.cse2 (= ~a$r_buff0_thd1~0_Out2038478849 ~a$r_buff0_thd1~0_In2038478849))) (or (and (not .cse0) (= 0 ~a$r_buff0_thd1~0_Out2038478849) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2038478849, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2038478849} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out2038478849|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2038478849, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out2038478849} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:04:38,447 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-1870467941 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1870467941 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In-1870467941 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1870467941 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-1870467941| ~a$r_buff1_thd1~0_In-1870467941) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1870467941| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1870467941|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:04:38,447 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:04:38,447 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In343737774 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out343737774| |P2Thread1of1ForFork0_#t~ite20_Out343737774|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In343737774 256) 0))) (or (= (mod ~a$w_buff0_used~0_In343737774 256) 0) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In343737774 256) 0)) (and (= (mod ~a$w_buff1_used~0_In343737774 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite20_Out343737774| ~a$w_buff0~0_In343737774)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out343737774| ~a$w_buff0~0_In343737774) (= |P2Thread1of1ForFork0_#t~ite20_In343737774| |P2Thread1of1ForFork0_#t~ite20_Out343737774|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In343737774, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In343737774, ~a$w_buff0_used~0=~a$w_buff0_used~0_In343737774, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In343737774, ~a$w_buff1_used~0=~a$w_buff1_used~0_In343737774, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In343737774|, ~weak$$choice2~0=~weak$$choice2~0_In343737774} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out343737774|, ~a$w_buff0~0=~a$w_buff0~0_In343737774, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In343737774, ~a$w_buff0_used~0=~a$w_buff0_used~0_In343737774, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In343737774, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out343737774|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In343737774, ~weak$$choice2~0=~weak$$choice2~0_In343737774} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:04:38,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-153703239 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out-153703239| ~a$w_buff0_used~0_In-153703239) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-153703239| |P2Thread1of1ForFork0_#t~ite26_Out-153703239|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-153703239| |P2Thread1of1ForFork0_#t~ite26_Out-153703239|) .cse0 (= ~a$w_buff0_used~0_In-153703239 |P2Thread1of1ForFork0_#t~ite26_Out-153703239|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-153703239 256) 0))) (or (= (mod ~a$w_buff0_used~0_In-153703239 256) 0) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-153703239 256))) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-153703239 256)))))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-153703239|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-153703239, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-153703239, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-153703239, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-153703239, ~weak$$choice2~0=~weak$$choice2~0_In-153703239} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-153703239|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-153703239|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-153703239, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-153703239, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-153703239, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-153703239, ~weak$$choice2~0=~weak$$choice2~0_In-153703239} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:04:38,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1410848416 256) 0))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In1410848416 256) 0))) (or (= (mod ~a$w_buff0_used~0_In1410848416 256) 0) (and .cse0 (= (mod ~a$w_buff1_used~0_In1410848416 256) 0)) (and .cse0 (= (mod ~a$r_buff1_thd3~0_In1410848416 256) 0)))) .cse1 (= |P2Thread1of1ForFork0_#t~ite29_Out1410848416| ~a$w_buff1_used~0_In1410848416) (= |P2Thread1of1ForFork0_#t~ite29_Out1410848416| |P2Thread1of1ForFork0_#t~ite30_Out1410848416|)) (and (= |P2Thread1of1ForFork0_#t~ite29_In1410848416| |P2Thread1of1ForFork0_#t~ite29_Out1410848416|) (not .cse1) (= ~a$w_buff1_used~0_In1410848416 |P2Thread1of1ForFork0_#t~ite30_Out1410848416|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1410848416, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1410848416, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1410848416, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1410848416, ~weak$$choice2~0=~weak$$choice2~0_In1410848416, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1410848416|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1410848416, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1410848416, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1410848416, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1410848416|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1410848416, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1410848416|, ~weak$$choice2~0=~weak$$choice2~0_In1410848416} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:04:38,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:04:38,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:04:38,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-732052024 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-732052024 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-732052024| ~a$w_buff0_used~0_In-732052024)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-732052024| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-732052024|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:04:38,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In1099508783 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd2~0_In1099508783 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1099508783 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1099508783 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1099508783|)) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In1099508783 |P1Thread1of1ForFork2_#t~ite12_Out1099508783|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1099508783, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1099508783} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1099508783, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1099508783|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1099508783} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:04:38,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1196256965 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1196256965 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In1196256965 |P1Thread1of1ForFork2_#t~ite13_Out1196256965|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1196256965|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1196256965|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:04:38,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In1841604176 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1841604176 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In1841604176 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In1841604176 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out1841604176| 0)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out1841604176| ~a$r_buff1_thd2~0_In1841604176) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1841604176, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1841604176, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1841604176|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:04:38,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:04:38,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:04:38,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-698442741| |P2Thread1of1ForFork0_#t~ite38_Out-698442741|)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-698442741 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-698442741 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In-698442741 |P2Thread1of1ForFork0_#t~ite38_Out-698442741|) (not .cse1) .cse2) (and (= ~a~0_In-698442741 |P2Thread1of1ForFork0_#t~ite38_Out-698442741|) .cse2 (or .cse1 .cse0)))) InVars {~a~0=~a~0_In-698442741, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} OutVars{~a~0=~a~0_In-698442741, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-698442741|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-698442741|, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:04:38,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1502886291 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1502886291 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1502886291 |P2Thread1of1ForFork0_#t~ite40_Out1502886291|)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1502886291| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1502886291, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1502886291} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1502886291|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1502886291, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1502886291} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:04:38,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-242601350 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-242601350 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In-242601350 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-242601350 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-242601350|)) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-242601350 |P2Thread1of1ForFork0_#t~ite41_Out-242601350|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-242601350, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-242601350} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-242601350, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-242601350, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-242601350|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:04:38,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In2134191769 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In2134191769 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out2134191769| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out2134191769| ~a$r_buff0_thd3~0_In2134191769) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2134191769, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2134191769} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2134191769, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2134191769, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2134191769|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:04:38,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In767325982 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In767325982 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In767325982 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In767325982 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In767325982 |P2Thread1of1ForFork0_#t~ite43_Out767325982|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out767325982|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In767325982, ~a$w_buff0_used~0=~a$w_buff0_used~0_In767325982, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In767325982, ~a$w_buff1_used~0=~a$w_buff1_used~0_In767325982} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out767325982|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In767325982, ~a$w_buff0_used~0=~a$w_buff0_used~0_In767325982, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In767325982, ~a$w_buff1_used~0=~a$w_buff1_used~0_In767325982} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:04:38,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:04:38,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:04:38,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1989241911 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out1989241911| |ULTIMATE.start_main_#t~ite47_Out1989241911|)) (.cse1 (= (mod ~a$w_buff1_used~0_In1989241911 256) 0))) (or (and (= ~a~0_In1989241911 |ULTIMATE.start_main_#t~ite47_Out1989241911|) (or .cse0 .cse1) .cse2) (and (= ~a$w_buff1~0_In1989241911 |ULTIMATE.start_main_#t~ite47_Out1989241911|) (not .cse0) .cse2 (not .cse1)))) InVars {~a~0=~a~0_In1989241911, ~a$w_buff1~0=~a$w_buff1~0_In1989241911, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1989241911, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1989241911} OutVars{~a~0=~a~0_In1989241911, ~a$w_buff1~0=~a$w_buff1~0_In1989241911, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1989241911|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1989241911, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1989241911|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1989241911} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:04:38,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1350836257 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1350836257 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-1350836257| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1350836257| ~a$w_buff0_used~0_In-1350836257)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1350836257} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1350836257|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1350836257} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:04:38,455 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-2030690428 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-2030690428 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-2030690428 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In-2030690428 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-2030690428|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-2030690428 |ULTIMATE.start_main_#t~ite50_Out-2030690428|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-2030690428|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:04:38,455 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1368432698 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1368432698 256)))) (or (and (= ~a$r_buff0_thd0~0_In1368432698 |ULTIMATE.start_main_#t~ite51_Out1368432698|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out1368432698| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1368432698|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:04:38,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1956661476 256))) (.cse3 (= (mod ~a$r_buff0_thd0~0_In-1956661476 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1956661476 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1956661476 256)))) (or (and (= ~a$r_buff1_thd0~0_In-1956661476 |ULTIMATE.start_main_#t~ite52_Out-1956661476|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-1956661476|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1956661476, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1956661476, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1956661476, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1956661476} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1956661476|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1956661476, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1956661476, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1956661476, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1956661476} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:04:38,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:04:38,511 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:04:38 BasicIcfg [2019-12-07 18:04:38,511 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:04:38,511 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:04:38,511 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:04:38,511 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:04:38,512 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:01:10" (3/4) ... [2019-12-07 18:04:38,513 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:04:38,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= 0 v_~weak$$choice0~0_14) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t654~0.base_24|)) (= |v_#NULL.offset_6| 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t654~0.base_24| 4)) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (= |v_ULTIMATE.start_main_~#t654~0.offset_19| 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t654~0.base_24|) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= (store .cse0 |v_ULTIMATE.start_main_~#t654~0.base_24| 1) |v_#valid_63|) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t654~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t654~0.base_24|) |v_ULTIMATE.start_main_~#t654~0.offset_19| 0))) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t655~0.offset=|v_ULTIMATE.start_main_~#t655~0.offset_19|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, ULTIMATE.start_main_~#t656~0.base=|v_ULTIMATE.start_main_~#t656~0.base_27|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ULTIMATE.start_main_~#t656~0.offset=|v_ULTIMATE.start_main_~#t656~0.offset_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_~#t654~0.base=|v_ULTIMATE.start_main_~#t654~0.base_24|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ULTIMATE.start_main_~#t654~0.offset=|v_ULTIMATE.start_main_~#t654~0.offset_19|, ~y~0=v_~y~0_39, ULTIMATE.start_main_~#t655~0.base=|v_ULTIMATE.start_main_~#t655~0.base_26|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t655~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t656~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t656~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_~#t654~0.base, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t654~0.offset, ~y~0, ULTIMATE.start_main_~#t655~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 18:04:38,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t655~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t655~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t655~0.base_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t655~0.base_10|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t655~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t655~0.base_10|) |v_ULTIMATE.start_main_~#t655~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t655~0.base_10| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t655~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t655~0.base=|v_ULTIMATE.start_main_~#t655~0.base_10|, ULTIMATE.start_main_~#t655~0.offset=|v_ULTIMATE.start_main_~#t655~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t655~0.base, ULTIMATE.start_main_~#t655~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:04:38,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t656~0.base_13| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t656~0.base_13|) (= |v_ULTIMATE.start_main_~#t656~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t656~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t656~0.base_13|) |v_ULTIMATE.start_main_~#t656~0.offset_11| 2)) |v_#memory_int_11|) (not (= 0 |v_ULTIMATE.start_main_~#t656~0.base_13|)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t656~0.base_13|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t656~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t656~0.base=|v_ULTIMATE.start_main_~#t656~0.base_13|, ULTIMATE.start_main_~#t656~0.offset=|v_ULTIMATE.start_main_~#t656~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t656~0.base, ULTIMATE.start_main_~#t656~0.offset, #length] because there is no mapped edge [2019-12-07 18:04:38,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 18:04:38,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In1981741290 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In1981741290 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1981741290| ~a~0_In1981741290)) (and (not .cse1) (not .cse0) (= ~a$w_buff1~0_In1981741290 |P1Thread1of1ForFork2_#t~ite9_Out1981741290|)))) InVars {~a~0=~a~0_In1981741290, ~a$w_buff1~0=~a$w_buff1~0_In1981741290, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1981741290, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1981741290} OutVars{~a~0=~a~0_In1981741290, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1981741290|, ~a$w_buff1~0=~a$w_buff1~0_In1981741290, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1981741290, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1981741290} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:04:38,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-222160885 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-222160885 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out-222160885| 0)) (and (= ~a$w_buff0_used~0_In-222160885 |P0Thread1of1ForFork1_#t~ite5_Out-222160885|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-222160885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-222160885} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-222160885|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-222160885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-222160885} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:04:38,517 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In-219521352 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-219521352 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-219521352 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-219521352 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-219521352 |P0Thread1of1ForFork1_#t~ite6_Out-219521352|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-219521352|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-219521352, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-219521352, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-219521352, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-219521352} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-219521352|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-219521352, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-219521352, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-219521352, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-219521352} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:04:38,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In2038478849 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In2038478849 256))) (.cse2 (= ~a$r_buff0_thd1~0_Out2038478849 ~a$r_buff0_thd1~0_In2038478849))) (or (and (not .cse0) (= 0 ~a$r_buff0_thd1~0_Out2038478849) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2038478849, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In2038478849} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out2038478849|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2038478849, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out2038478849} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:04:38,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-1870467941 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1870467941 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In-1870467941 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1870467941 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-1870467941| ~a$r_buff1_thd1~0_In-1870467941) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1870467941| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1870467941|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1870467941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1870467941, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1870467941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1870467941} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:04:38,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:04:38,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In343737774 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out343737774| |P2Thread1of1ForFork0_#t~ite20_Out343737774|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In343737774 256) 0))) (or (= (mod ~a$w_buff0_used~0_In343737774 256) 0) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In343737774 256) 0)) (and (= (mod ~a$w_buff1_used~0_In343737774 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite20_Out343737774| ~a$w_buff0~0_In343737774)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out343737774| ~a$w_buff0~0_In343737774) (= |P2Thread1of1ForFork0_#t~ite20_In343737774| |P2Thread1of1ForFork0_#t~ite20_Out343737774|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In343737774, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In343737774, ~a$w_buff0_used~0=~a$w_buff0_used~0_In343737774, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In343737774, ~a$w_buff1_used~0=~a$w_buff1_used~0_In343737774, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In343737774|, ~weak$$choice2~0=~weak$$choice2~0_In343737774} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out343737774|, ~a$w_buff0~0=~a$w_buff0~0_In343737774, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In343737774, ~a$w_buff0_used~0=~a$w_buff0_used~0_In343737774, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In343737774, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out343737774|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In343737774, ~weak$$choice2~0=~weak$$choice2~0_In343737774} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 18:04:38,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-153703239 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out-153703239| ~a$w_buff0_used~0_In-153703239) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-153703239| |P2Thread1of1ForFork0_#t~ite26_Out-153703239|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-153703239| |P2Thread1of1ForFork0_#t~ite26_Out-153703239|) .cse0 (= ~a$w_buff0_used~0_In-153703239 |P2Thread1of1ForFork0_#t~ite26_Out-153703239|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-153703239 256) 0))) (or (= (mod ~a$w_buff0_used~0_In-153703239 256) 0) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-153703239 256))) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-153703239 256)))))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-153703239|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-153703239, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-153703239, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-153703239, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-153703239, ~weak$$choice2~0=~weak$$choice2~0_In-153703239} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-153703239|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-153703239|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-153703239, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-153703239, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-153703239, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-153703239, ~weak$$choice2~0=~weak$$choice2~0_In-153703239} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 18:04:38,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1410848416 256) 0))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In1410848416 256) 0))) (or (= (mod ~a$w_buff0_used~0_In1410848416 256) 0) (and .cse0 (= (mod ~a$w_buff1_used~0_In1410848416 256) 0)) (and .cse0 (= (mod ~a$r_buff1_thd3~0_In1410848416 256) 0)))) .cse1 (= |P2Thread1of1ForFork0_#t~ite29_Out1410848416| ~a$w_buff1_used~0_In1410848416) (= |P2Thread1of1ForFork0_#t~ite29_Out1410848416| |P2Thread1of1ForFork0_#t~ite30_Out1410848416|)) (and (= |P2Thread1of1ForFork0_#t~ite29_In1410848416| |P2Thread1of1ForFork0_#t~ite29_Out1410848416|) (not .cse1) (= ~a$w_buff1_used~0_In1410848416 |P2Thread1of1ForFork0_#t~ite30_Out1410848416|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1410848416, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1410848416, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1410848416, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1410848416, ~weak$$choice2~0=~weak$$choice2~0_In1410848416, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1410848416|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1410848416, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1410848416, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1410848416, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1410848416|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1410848416, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1410848416|, ~weak$$choice2~0=~weak$$choice2~0_In1410848416} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:04:38,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:04:38,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:04:38,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-732052024 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-732052024 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-732052024| ~a$w_buff0_used~0_In-732052024)) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-732052024| 0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-732052024, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-732052024, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-732052024|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:04:38,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In1099508783 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd2~0_In1099508783 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1099508783 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1099508783 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1099508783|)) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In1099508783 |P1Thread1of1ForFork2_#t~ite12_Out1099508783|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1099508783, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1099508783} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1099508783, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1099508783, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1099508783, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1099508783|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1099508783} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:04:38,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1196256965 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1196256965 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In1196256965 |P1Thread1of1ForFork2_#t~ite13_Out1196256965|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out1196256965|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1196256965, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1196256965, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1196256965|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:04:38,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In1841604176 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1841604176 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In1841604176 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In1841604176 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out1841604176| 0)) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out1841604176| ~a$r_buff1_thd2~0_In1841604176) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1841604176, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1841604176, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1841604176, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1841604176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1841604176, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1841604176|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:04:38,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:04:38,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 18:04:38,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-698442741| |P2Thread1of1ForFork0_#t~ite38_Out-698442741|)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-698442741 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-698442741 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In-698442741 |P2Thread1of1ForFork0_#t~ite38_Out-698442741|) (not .cse1) .cse2) (and (= ~a~0_In-698442741 |P2Thread1of1ForFork0_#t~ite38_Out-698442741|) .cse2 (or .cse1 .cse0)))) InVars {~a~0=~a~0_In-698442741, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} OutVars{~a~0=~a~0_In-698442741, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-698442741|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-698442741|, ~a$w_buff1~0=~a$w_buff1~0_In-698442741, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-698442741, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-698442741} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:04:38,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1502886291 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1502886291 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1502886291 |P2Thread1of1ForFork0_#t~ite40_Out1502886291|)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1502886291| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1502886291, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1502886291} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1502886291|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1502886291, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1502886291} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:04:38,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-242601350 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-242601350 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In-242601350 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-242601350 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-242601350|)) (and (or .cse1 .cse0) (= ~a$w_buff1_used~0_In-242601350 |P2Thread1of1ForFork0_#t~ite41_Out-242601350|) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-242601350, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-242601350} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-242601350, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-242601350, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-242601350, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-242601350, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-242601350|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:04:38,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In2134191769 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In2134191769 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out2134191769| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out2134191769| ~a$r_buff0_thd3~0_In2134191769) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2134191769, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2134191769} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2134191769, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2134191769, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2134191769|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:04:38,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In767325982 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In767325982 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In767325982 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In767325982 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In767325982 |P2Thread1of1ForFork0_#t~ite43_Out767325982|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out767325982|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In767325982, ~a$w_buff0_used~0=~a$w_buff0_used~0_In767325982, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In767325982, ~a$w_buff1_used~0=~a$w_buff1_used~0_In767325982} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out767325982|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In767325982, ~a$w_buff0_used~0=~a$w_buff0_used~0_In767325982, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In767325982, ~a$w_buff1_used~0=~a$w_buff1_used~0_In767325982} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:04:38,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:04:38,524 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:04:38,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1989241911 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out1989241911| |ULTIMATE.start_main_#t~ite47_Out1989241911|)) (.cse1 (= (mod ~a$w_buff1_used~0_In1989241911 256) 0))) (or (and (= ~a~0_In1989241911 |ULTIMATE.start_main_#t~ite47_Out1989241911|) (or .cse0 .cse1) .cse2) (and (= ~a$w_buff1~0_In1989241911 |ULTIMATE.start_main_#t~ite47_Out1989241911|) (not .cse0) .cse2 (not .cse1)))) InVars {~a~0=~a~0_In1989241911, ~a$w_buff1~0=~a$w_buff1~0_In1989241911, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1989241911, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1989241911} OutVars{~a~0=~a~0_In1989241911, ~a$w_buff1~0=~a$w_buff1~0_In1989241911, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1989241911|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1989241911, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1989241911|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1989241911} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:04:38,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1350836257 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1350836257 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-1350836257| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1350836257| ~a$w_buff0_used~0_In-1350836257)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1350836257} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1350836257, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1350836257|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1350836257} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:04:38,525 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-2030690428 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-2030690428 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-2030690428 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In-2030690428 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-2030690428|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-2030690428 |ULTIMATE.start_main_#t~ite50_Out-2030690428|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-2030690428|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2030690428, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2030690428, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2030690428, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2030690428} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:04:38,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1368432698 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1368432698 256)))) (or (and (= ~a$r_buff0_thd0~0_In1368432698 |ULTIMATE.start_main_#t~ite51_Out1368432698|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out1368432698| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1368432698|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1368432698, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1368432698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:04:38,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1956661476 256))) (.cse3 (= (mod ~a$r_buff0_thd0~0_In-1956661476 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1956661476 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1956661476 256)))) (or (and (= ~a$r_buff1_thd0~0_In-1956661476 |ULTIMATE.start_main_#t~ite52_Out-1956661476|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-1956661476|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1956661476, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1956661476, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1956661476, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1956661476} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1956661476|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1956661476, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1956661476, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1956661476, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1956661476} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:04:38,526 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:04:38,578 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_35dda462-3050-49a3-a6f1-31e991005c28/bin/uautomizer/witness.graphml [2019-12-07 18:04:38,578 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:04:38,579 INFO L168 Benchmark]: Toolchain (without parser) took 208770.87 ms. Allocated memory was 1.0 GB in the beginning and 8.5 GB in the end (delta: 7.5 GB). Free memory was 940.7 MB in the beginning and 3.8 GB in the end (delta: -2.9 GB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. [2019-12-07 18:04:38,580 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:04:38,580 INFO L168 Benchmark]: CACSL2BoogieTranslator took 407.40 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.7 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -127.6 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:04:38,580 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:04:38,580 INFO L168 Benchmark]: Boogie Preprocessor took 28.27 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:04:38,581 INFO L168 Benchmark]: RCFGBuilder took 424.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.9 MB in the end (delta: 68.1 MB). Peak memory consumption was 68.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:04:38,581 INFO L168 Benchmark]: TraceAbstraction took 207799.06 ms. Allocated memory was 1.1 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 994.9 MB in the beginning and 3.8 GB in the end (delta: -2.9 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. [2019-12-07 18:04:38,581 INFO L168 Benchmark]: Witness Printer took 67.28 ms. Allocated memory is still 8.5 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 37.7 MB). Peak memory consumption was 37.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:04:38,582 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 407.40 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.7 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -127.6 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 28.27 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 424.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 994.9 MB in the end (delta: 68.1 MB). Peak memory consumption was 68.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 207799.06 ms. Allocated memory was 1.1 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 994.9 MB in the beginning and 3.8 GB in the end (delta: -2.9 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. * Witness Printer took 67.28 ms. Allocated memory is still 8.5 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 37.7 MB). Peak memory consumption was 37.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 178 ProgramPointsBefore, 93 ProgramPointsAfterwards, 215 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7050 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 63 SemBasedMoverChecksPositive, 249 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 78858 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t654, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t655, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t656, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L740] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L741] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L742] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L743] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L744] 1 a$r_buff0_thd1 = (_Bool)1 [L747] 1 x = 1 [L750] 1 __unbuffered_p0_EAX = x [L753] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L756] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L770] 2 y = 1 [L773] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L756] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L757] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L790] 3 z = 2 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L758] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=2] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=2] [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L845] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L845] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 207.6s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 46.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6035 SDtfs, 8548 SDslu, 18830 SDs, 0 SdLazy, 12103 SolverSat, 475 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 443 GetRequests, 63 SyntacticMatches, 8 SemanticMatches, 372 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6181 ImplicationChecksByTransitivity, 5.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=328151occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 138.9s AutomataMinimizationTime, 29 MinimizatonAttempts, 533343 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 1243 NumberOfCodeBlocks, 1243 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 1147 ConstructedInterpolants, 0 QuantifiedInterpolants, 443831 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...