./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix025_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix025_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6bda64db91168d9958245e97a2ff6da271485d85 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:02:33,325 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:02:33,326 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:02:33,335 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:02:33,335 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:02:33,336 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:02:33,337 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:02:33,338 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:02:33,340 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:02:33,341 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:02:33,342 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:02:33,343 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:02:33,343 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:02:33,344 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:02:33,345 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:02:33,346 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:02:33,347 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:02:33,347 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:02:33,349 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:02:33,351 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:02:33,352 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:02:33,352 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:02:33,353 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:02:33,353 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:02:33,355 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:02:33,355 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:02:33,355 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:02:33,356 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:02:33,356 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:02:33,357 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:02:33,357 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:02:33,357 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:02:33,358 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:02:33,358 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:02:33,359 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:02:33,359 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:02:33,359 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:02:33,359 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:02:33,359 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:02:33,360 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:02:33,360 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:02:33,361 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:02:33,370 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:02:33,370 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:02:33,370 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:02:33,371 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:02:33,371 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:02:33,371 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:02:33,371 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:02:33,371 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:02:33,371 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:02:33,371 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:02:33,371 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:02:33,371 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:02:33,372 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:02:33,372 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:02:33,372 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:02:33,372 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:02:33,372 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:02:33,372 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:02:33,372 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:02:33,372 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:02:33,372 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:02:33,373 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:02:33,373 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:02:33,373 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:02:33,373 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:02:33,373 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:02:33,373 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:02:33,373 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:02:33,373 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:02:33,374 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6bda64db91168d9958245e97a2ff6da271485d85 [2019-12-07 18:02:33,476 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:02:33,486 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:02:33,489 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:02:33,490 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:02:33,490 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:02:33,491 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix025_power.oepc.i [2019-12-07 18:02:33,531 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/data/5f60a36d5/bed6b67819564aab85cabda06be2e3bf/FLAG9aa046965 [2019-12-07 18:02:34,051 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:02:34,052 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/sv-benchmarks/c/pthread-wmm/mix025_power.oepc.i [2019-12-07 18:02:34,063 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/data/5f60a36d5/bed6b67819564aab85cabda06be2e3bf/FLAG9aa046965 [2019-12-07 18:02:34,562 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/data/5f60a36d5/bed6b67819564aab85cabda06be2e3bf [2019-12-07 18:02:34,564 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:02:34,565 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:02:34,566 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:02:34,566 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:02:34,569 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:02:34,570 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:34,572 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@227d51b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34, skipping insertion in model container [2019-12-07 18:02:34,572 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:34,578 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:02:34,608 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:02:34,861 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:02:34,869 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:02:34,914 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:02:34,959 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:02:34,959 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34 WrapperNode [2019-12-07 18:02:34,959 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:02:34,960 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:02:34,960 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:02:34,960 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:02:34,966 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:34,979 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:34,998 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:02:34,998 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:02:34,998 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:02:34,998 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:02:35,005 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:35,005 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:35,008 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:35,008 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:35,016 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:35,019 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:35,021 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... [2019-12-07 18:02:35,024 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:02:35,025 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:02:35,025 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:02:35,025 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:02:35,025 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:02:35,064 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:02:35,064 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:02:35,064 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:02:35,064 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:02:35,064 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:02:35,064 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:02:35,064 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:02:35,064 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:02:35,064 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:02:35,065 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:02:35,065 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:02:35,065 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:02:35,065 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:02:35,066 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:02:35,425 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:02:35,426 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:02:35,426 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:02:35 BoogieIcfgContainer [2019-12-07 18:02:35,426 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:02:35,427 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:02:35,427 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:02:35,429 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:02:35,429 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:02:34" (1/3) ... [2019-12-07 18:02:35,429 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12a2b71e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:02:35, skipping insertion in model container [2019-12-07 18:02:35,430 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:02:34" (2/3) ... [2019-12-07 18:02:35,430 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12a2b71e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:02:35, skipping insertion in model container [2019-12-07 18:02:35,430 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:02:35" (3/3) ... [2019-12-07 18:02:35,431 INFO L109 eAbstractionObserver]: Analyzing ICFG mix025_power.oepc.i [2019-12-07 18:02:35,437 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:02:35,437 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:02:35,442 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:02:35,442 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:02:35,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,467 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,467 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,467 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,467 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,467 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,467 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,467 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,471 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,471 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,471 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,471 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,471 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,471 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,471 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,471 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,472 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,473 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,474 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,474 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,474 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,474 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,475 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,476 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,477 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,478 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,479 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,480 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,481 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,482 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,483 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,484 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,485 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,486 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:02:35,497 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:02:35,509 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:02:35,509 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:02:35,510 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:02:35,510 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:02:35,510 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:02:35,510 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:02:35,510 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:02:35,510 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:02:35,521 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 18:02:35,522 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 18:02:35,576 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 18:02:35,576 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:02:35,587 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:02:35,602 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 18:02:35,631 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 18:02:35,631 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:02:35,636 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:02:35,652 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:02:35,653 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:02:38,488 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 18:02:38,734 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130103 [2019-12-07 18:02:38,734 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 18:02:38,736 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 105 transitions [2019-12-07 18:02:56,339 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 122102 states. [2019-12-07 18:02:56,340 INFO L276 IsEmpty]: Start isEmpty. Operand 122102 states. [2019-12-07 18:02:56,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:02:56,344 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:02:56,344 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:02:56,345 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:02:56,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:02:56,348 INFO L82 PathProgramCache]: Analyzing trace with hash 913940, now seen corresponding path program 1 times [2019-12-07 18:02:56,354 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:02:56,354 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92901832] [2019-12-07 18:02:56,354 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:02:56,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:02:56,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:02:56,481 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92901832] [2019-12-07 18:02:56,482 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:02:56,482 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:02:56,482 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [190634536] [2019-12-07 18:02:56,486 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:02:56,486 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:02:56,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:02:56,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:02:56,497 INFO L87 Difference]: Start difference. First operand 122102 states. Second operand 3 states. [2019-12-07 18:02:57,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:02:57,271 INFO L93 Difference]: Finished difference Result 121140 states and 517588 transitions. [2019-12-07 18:02:57,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:02:57,272 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:02:57,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:02:57,895 INFO L225 Difference]: With dead ends: 121140 [2019-12-07 18:02:57,895 INFO L226 Difference]: Without dead ends: 107958 [2019-12-07 18:02:57,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:03:03,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107958 states. [2019-12-07 18:03:04,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107958 to 107958. [2019-12-07 18:03:04,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107958 states. [2019-12-07 18:03:04,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107958 states to 107958 states and 460128 transitions. [2019-12-07 18:03:04,875 INFO L78 Accepts]: Start accepts. Automaton has 107958 states and 460128 transitions. Word has length 3 [2019-12-07 18:03:04,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:03:04,876 INFO L462 AbstractCegarLoop]: Abstraction has 107958 states and 460128 transitions. [2019-12-07 18:03:04,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:03:04,876 INFO L276 IsEmpty]: Start isEmpty. Operand 107958 states and 460128 transitions. [2019-12-07 18:03:04,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:03:04,879 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:03:04,879 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:03:04,879 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:03:04,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:03:04,880 INFO L82 PathProgramCache]: Analyzing trace with hash 2082409598, now seen corresponding path program 1 times [2019-12-07 18:03:04,880 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:03:04,880 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471306040] [2019-12-07 18:03:04,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:03:04,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:03:04,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:03:04,939 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1471306040] [2019-12-07 18:03:04,939 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:03:04,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:03:04,939 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [52975777] [2019-12-07 18:03:04,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:03:04,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:03:04,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:03:04,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:03:04,940 INFO L87 Difference]: Start difference. First operand 107958 states and 460128 transitions. Second operand 4 states. [2019-12-07 18:03:05,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:03:05,921 INFO L93 Difference]: Finished difference Result 172022 states and 703369 transitions. [2019-12-07 18:03:05,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:03:05,922 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:03:05,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:03:06,827 INFO L225 Difference]: With dead ends: 172022 [2019-12-07 18:03:06,827 INFO L226 Difference]: Without dead ends: 171924 [2019-12-07 18:03:06,828 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:03:13,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171924 states. [2019-12-07 18:03:15,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171924 to 156115. [2019-12-07 18:03:15,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156115 states. [2019-12-07 18:03:16,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156115 states to 156115 states and 647087 transitions. [2019-12-07 18:03:16,624 INFO L78 Accepts]: Start accepts. Automaton has 156115 states and 647087 transitions. Word has length 11 [2019-12-07 18:03:16,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:03:16,624 INFO L462 AbstractCegarLoop]: Abstraction has 156115 states and 647087 transitions. [2019-12-07 18:03:16,625 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:03:16,625 INFO L276 IsEmpty]: Start isEmpty. Operand 156115 states and 647087 transitions. [2019-12-07 18:03:16,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:03:16,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:03:16,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:03:16,629 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:03:16,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:03:16,629 INFO L82 PathProgramCache]: Analyzing trace with hash 594088235, now seen corresponding path program 1 times [2019-12-07 18:03:16,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:03:16,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564795189] [2019-12-07 18:03:16,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:03:16,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:03:16,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:03:16,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564795189] [2019-12-07 18:03:16,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:03:16,679 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:03:16,679 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21520667] [2019-12-07 18:03:16,680 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:03:16,680 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:03:16,680 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:03:16,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:03:16,680 INFO L87 Difference]: Start difference. First operand 156115 states and 647087 transitions. Second operand 4 states. [2019-12-07 18:03:17,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:03:17,850 INFO L93 Difference]: Finished difference Result 219290 states and 888852 transitions. [2019-12-07 18:03:17,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:03:17,851 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:03:17,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:03:18,456 INFO L225 Difference]: With dead ends: 219290 [2019-12-07 18:03:18,456 INFO L226 Difference]: Without dead ends: 219178 [2019-12-07 18:03:18,457 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:03:24,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219178 states. [2019-12-07 18:03:29,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219178 to 184451. [2019-12-07 18:03:29,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184451 states. [2019-12-07 18:03:29,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184451 states to 184451 states and 760798 transitions. [2019-12-07 18:03:29,952 INFO L78 Accepts]: Start accepts. Automaton has 184451 states and 760798 transitions. Word has length 13 [2019-12-07 18:03:29,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:03:29,953 INFO L462 AbstractCegarLoop]: Abstraction has 184451 states and 760798 transitions. [2019-12-07 18:03:29,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:03:29,953 INFO L276 IsEmpty]: Start isEmpty. Operand 184451 states and 760798 transitions. [2019-12-07 18:03:29,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:03:29,961 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:03:29,961 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:03:29,961 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:03:29,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:03:29,961 INFO L82 PathProgramCache]: Analyzing trace with hash -805978823, now seen corresponding path program 1 times [2019-12-07 18:03:29,961 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:03:29,962 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415441653] [2019-12-07 18:03:29,962 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:03:29,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:03:29,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:03:29,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415441653] [2019-12-07 18:03:29,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:03:29,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:03:29,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [564960220] [2019-12-07 18:03:29,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:03:29,992 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:03:29,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:03:29,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:03:29,992 INFO L87 Difference]: Start difference. First operand 184451 states and 760798 transitions. Second operand 3 states. [2019-12-07 18:03:31,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:03:31,533 INFO L93 Difference]: Finished difference Result 284614 states and 1168466 transitions. [2019-12-07 18:03:31,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:03:31,534 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 18:03:31,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:03:32,315 INFO L225 Difference]: With dead ends: 284614 [2019-12-07 18:03:32,315 INFO L226 Difference]: Without dead ends: 284614 [2019-12-07 18:03:32,315 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:03:38,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284614 states. [2019-12-07 18:03:45,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284614 to 221232. [2019-12-07 18:03:45,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221232 states. [2019-12-07 18:03:45,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221232 states to 221232 states and 911865 transitions. [2019-12-07 18:03:45,984 INFO L78 Accepts]: Start accepts. Automaton has 221232 states and 911865 transitions. Word has length 16 [2019-12-07 18:03:45,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:03:45,985 INFO L462 AbstractCegarLoop]: Abstraction has 221232 states and 911865 transitions. [2019-12-07 18:03:45,985 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:03:45,985 INFO L276 IsEmpty]: Start isEmpty. Operand 221232 states and 911865 transitions. [2019-12-07 18:03:45,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:03:45,992 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:03:45,992 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:03:45,992 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:03:45,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:03:45,992 INFO L82 PathProgramCache]: Analyzing trace with hash -805853304, now seen corresponding path program 1 times [2019-12-07 18:03:45,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:03:45,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140415175] [2019-12-07 18:03:45,993 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:03:46,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:03:46,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:03:46,039 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1140415175] [2019-12-07 18:03:46,039 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:03:46,040 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:03:46,040 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138693733] [2019-12-07 18:03:46,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:03:46,040 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:03:46,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:03:46,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:03:46,041 INFO L87 Difference]: Start difference. First operand 221232 states and 911865 transitions. Second operand 4 states. [2019-12-07 18:03:47,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:03:47,392 INFO L93 Difference]: Finished difference Result 262568 states and 1070974 transitions. [2019-12-07 18:03:47,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:03:47,393 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 18:03:47,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:03:48,631 INFO L225 Difference]: With dead ends: 262568 [2019-12-07 18:03:48,631 INFO L226 Difference]: Without dead ends: 262568 [2019-12-07 18:03:48,632 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:03:55,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262568 states. [2019-12-07 18:03:58,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262568 to 233184. [2019-12-07 18:03:58,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233184 states. [2019-12-07 18:03:59,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233184 states to 233184 states and 959818 transitions. [2019-12-07 18:03:59,635 INFO L78 Accepts]: Start accepts. Automaton has 233184 states and 959818 transitions. Word has length 16 [2019-12-07 18:03:59,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:03:59,635 INFO L462 AbstractCegarLoop]: Abstraction has 233184 states and 959818 transitions. [2019-12-07 18:03:59,635 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:03:59,635 INFO L276 IsEmpty]: Start isEmpty. Operand 233184 states and 959818 transitions. [2019-12-07 18:03:59,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:03:59,642 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:03:59,642 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:03:59,642 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:03:59,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:03:59,642 INFO L82 PathProgramCache]: Analyzing trace with hash -1222928522, now seen corresponding path program 1 times [2019-12-07 18:03:59,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:03:59,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [553554193] [2019-12-07 18:03:59,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:03:59,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:03:59,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:03:59,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [553554193] [2019-12-07 18:03:59,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:03:59,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:03:59,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614154729] [2019-12-07 18:03:59,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:03:59,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:03:59,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:03:59,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:03:59,672 INFO L87 Difference]: Start difference. First operand 233184 states and 959818 transitions. Second operand 4 states. [2019-12-07 18:04:03,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:03,585 INFO L93 Difference]: Finished difference Result 277148 states and 1134062 transitions. [2019-12-07 18:04:03,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:04:03,586 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 18:04:03,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:04,299 INFO L225 Difference]: With dead ends: 277148 [2019-12-07 18:04:04,300 INFO L226 Difference]: Without dead ends: 277148 [2019-12-07 18:04:04,300 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:04:10,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277148 states. [2019-12-07 18:04:14,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277148 to 236057. [2019-12-07 18:04:14,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236057 states. [2019-12-07 18:04:15,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236057 states to 236057 states and 972653 transitions. [2019-12-07 18:04:15,122 INFO L78 Accepts]: Start accepts. Automaton has 236057 states and 972653 transitions. Word has length 16 [2019-12-07 18:04:15,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:15,122 INFO L462 AbstractCegarLoop]: Abstraction has 236057 states and 972653 transitions. [2019-12-07 18:04:15,122 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:04:15,122 INFO L276 IsEmpty]: Start isEmpty. Operand 236057 states and 972653 transitions. [2019-12-07 18:04:15,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:04:15,134 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:15,134 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:15,134 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:15,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:15,134 INFO L82 PathProgramCache]: Analyzing trace with hash -2141168645, now seen corresponding path program 1 times [2019-12-07 18:04:15,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:15,135 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760768685] [2019-12-07 18:04:15,135 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:15,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:15,564 WARN L192 SmtUtils]: Spent 396.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 15 [2019-12-07 18:04:15,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:15,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760768685] [2019-12-07 18:04:15,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:15,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:04:15,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1953770720] [2019-12-07 18:04:15,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:04:15,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:15,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:04:15,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:15,568 INFO L87 Difference]: Start difference. First operand 236057 states and 972653 transitions. Second operand 3 states. [2019-12-07 18:04:18,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:18,045 INFO L93 Difference]: Finished difference Result 419928 states and 1722928 transitions. [2019-12-07 18:04:18,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:04:18,046 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:04:18,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:19,046 INFO L225 Difference]: With dead ends: 419928 [2019-12-07 18:04:19,046 INFO L226 Difference]: Without dead ends: 386621 [2019-12-07 18:04:19,047 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:29,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386621 states. [2019-12-07 18:04:35,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386621 to 371396. [2019-12-07 18:04:35,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 371396 states. [2019-12-07 18:04:36,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371396 states to 371396 states and 1535333 transitions. [2019-12-07 18:04:36,710 INFO L78 Accepts]: Start accepts. Automaton has 371396 states and 1535333 transitions. Word has length 18 [2019-12-07 18:04:36,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:36,711 INFO L462 AbstractCegarLoop]: Abstraction has 371396 states and 1535333 transitions. [2019-12-07 18:04:36,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:04:36,711 INFO L276 IsEmpty]: Start isEmpty. Operand 371396 states and 1535333 transitions. [2019-12-07 18:04:36,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:04:36,740 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:36,740 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:36,740 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:36,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:36,740 INFO L82 PathProgramCache]: Analyzing trace with hash -1067747929, now seen corresponding path program 1 times [2019-12-07 18:04:36,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:36,741 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557731433] [2019-12-07 18:04:36,741 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:36,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:36,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:36,788 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1557731433] [2019-12-07 18:04:36,788 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:36,788 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:04:36,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1042056181] [2019-12-07 18:04:36,789 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:04:36,789 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:36,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:04:36,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:36,789 INFO L87 Difference]: Start difference. First operand 371396 states and 1535333 transitions. Second operand 4 states. [2019-12-07 18:04:39,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:04:39,171 INFO L93 Difference]: Finished difference Result 385817 states and 1580823 transitions. [2019-12-07 18:04:39,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:04:39,171 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 18:04:39,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:04:40,206 INFO L225 Difference]: With dead ends: 385817 [2019-12-07 18:04:40,206 INFO L226 Difference]: Without dead ends: 385817 [2019-12-07 18:04:40,207 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:04:51,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 385817 states. [2019-12-07 18:04:57,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 385817 to 367892. [2019-12-07 18:04:57,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 367892 states. [2019-12-07 18:04:59,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367892 states to 367892 states and 1521919 transitions. [2019-12-07 18:04:59,514 INFO L78 Accepts]: Start accepts. Automaton has 367892 states and 1521919 transitions. Word has length 19 [2019-12-07 18:04:59,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:04:59,514 INFO L462 AbstractCegarLoop]: Abstraction has 367892 states and 1521919 transitions. [2019-12-07 18:04:59,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:04:59,514 INFO L276 IsEmpty]: Start isEmpty. Operand 367892 states and 1521919 transitions. [2019-12-07 18:04:59,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:04:59,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:04:59,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:04:59,541 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:04:59,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:04:59,542 INFO L82 PathProgramCache]: Analyzing trace with hash 700766782, now seen corresponding path program 1 times [2019-12-07 18:04:59,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:04:59,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763208823] [2019-12-07 18:04:59,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:04:59,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:04:59,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:04:59,569 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763208823] [2019-12-07 18:04:59,569 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:04:59,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:04:59,570 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207673857] [2019-12-07 18:04:59,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:04:59,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:04:59,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:04:59,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:04:59,570 INFO L87 Difference]: Start difference. First operand 367892 states and 1521919 transitions. Second operand 3 states. [2019-12-07 18:05:01,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:01,716 INFO L93 Difference]: Finished difference Result 346805 states and 1418106 transitions. [2019-12-07 18:05:01,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:05:01,717 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:05:01,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:02,573 INFO L225 Difference]: With dead ends: 346805 [2019-12-07 18:05:02,573 INFO L226 Difference]: Without dead ends: 346805 [2019-12-07 18:05:02,573 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:05:09,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346805 states. [2019-12-07 18:05:14,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346805 to 343459. [2019-12-07 18:05:14,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343459 states. [2019-12-07 18:05:15,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343459 states to 343459 states and 1405774 transitions. [2019-12-07 18:05:15,279 INFO L78 Accepts]: Start accepts. Automaton has 343459 states and 1405774 transitions. Word has length 19 [2019-12-07 18:05:15,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:15,279 INFO L462 AbstractCegarLoop]: Abstraction has 343459 states and 1405774 transitions. [2019-12-07 18:05:15,280 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:05:15,280 INFO L276 IsEmpty]: Start isEmpty. Operand 343459 states and 1405774 transitions. [2019-12-07 18:05:15,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:05:15,302 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:15,302 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:15,302 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:15,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:15,302 INFO L82 PathProgramCache]: Analyzing trace with hash -116744345, now seen corresponding path program 1 times [2019-12-07 18:05:15,302 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:15,302 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029753719] [2019-12-07 18:05:15,302 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:15,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:15,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:15,337 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1029753719] [2019-12-07 18:05:15,337 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:15,338 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:05:15,338 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133228498] [2019-12-07 18:05:15,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:05:15,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:15,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:05:15,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:05:15,338 INFO L87 Difference]: Start difference. First operand 343459 states and 1405774 transitions. Second operand 5 states. [2019-12-07 18:05:20,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:20,798 INFO L93 Difference]: Finished difference Result 481018 states and 1929261 transitions. [2019-12-07 18:05:20,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:05:20,798 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:05:20,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:22,355 INFO L225 Difference]: With dead ends: 481018 [2019-12-07 18:05:22,355 INFO L226 Difference]: Without dead ends: 480836 [2019-12-07 18:05:22,356 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:05:30,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480836 states. [2019-12-07 18:05:36,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480836 to 364743. [2019-12-07 18:05:36,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364743 states. [2019-12-07 18:05:38,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364743 states to 364743 states and 1489285 transitions. [2019-12-07 18:05:38,148 INFO L78 Accepts]: Start accepts. Automaton has 364743 states and 1489285 transitions. Word has length 19 [2019-12-07 18:05:38,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:38,148 INFO L462 AbstractCegarLoop]: Abstraction has 364743 states and 1489285 transitions. [2019-12-07 18:05:38,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:05:38,148 INFO L276 IsEmpty]: Start isEmpty. Operand 364743 states and 1489285 transitions. [2019-12-07 18:05:38,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:05:38,173 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:38,173 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:38,173 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:38,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:38,174 INFO L82 PathProgramCache]: Analyzing trace with hash 1088543872, now seen corresponding path program 1 times [2019-12-07 18:05:38,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:38,174 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958705202] [2019-12-07 18:05:38,174 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:38,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:38,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:38,198 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [958705202] [2019-12-07 18:05:38,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:38,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:05:38,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [33050961] [2019-12-07 18:05:38,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:05:38,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:38,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:05:38,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:05:38,200 INFO L87 Difference]: Start difference. First operand 364743 states and 1489285 transitions. Second operand 3 states. [2019-12-07 18:05:38,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:38,433 INFO L93 Difference]: Finished difference Result 67472 states and 218112 transitions. [2019-12-07 18:05:38,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:05:38,433 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 18:05:38,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:38,536 INFO L225 Difference]: With dead ends: 67472 [2019-12-07 18:05:38,537 INFO L226 Difference]: Without dead ends: 67472 [2019-12-07 18:05:38,537 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:05:38,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67472 states. [2019-12-07 18:05:39,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67472 to 67472. [2019-12-07 18:05:39,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67472 states. [2019-12-07 18:05:40,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67472 states to 67472 states and 218112 transitions. [2019-12-07 18:05:40,080 INFO L78 Accepts]: Start accepts. Automaton has 67472 states and 218112 transitions. Word has length 19 [2019-12-07 18:05:40,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:40,080 INFO L462 AbstractCegarLoop]: Abstraction has 67472 states and 218112 transitions. [2019-12-07 18:05:40,080 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:05:40,080 INFO L276 IsEmpty]: Start isEmpty. Operand 67472 states and 218112 transitions. [2019-12-07 18:05:40,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:05:40,088 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:40,088 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:40,088 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:40,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:40,088 INFO L82 PathProgramCache]: Analyzing trace with hash -655013944, now seen corresponding path program 1 times [2019-12-07 18:05:40,088 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:40,088 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1485432014] [2019-12-07 18:05:40,088 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:40,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:40,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:40,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1485432014] [2019-12-07 18:05:40,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:40,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:05:40,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321524179] [2019-12-07 18:05:40,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:05:40,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:40,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:05:40,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:05:40,129 INFO L87 Difference]: Start difference. First operand 67472 states and 218112 transitions. Second operand 5 states. [2019-12-07 18:05:40,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:40,628 INFO L93 Difference]: Finished difference Result 88451 states and 279620 transitions. [2019-12-07 18:05:40,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:05:40,629 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:05:40,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:40,757 INFO L225 Difference]: With dead ends: 88451 [2019-12-07 18:05:40,758 INFO L226 Difference]: Without dead ends: 88437 [2019-12-07 18:05:40,758 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:05:41,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88437 states. [2019-12-07 18:05:42,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88437 to 71798. [2019-12-07 18:05:42,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71798 states. [2019-12-07 18:05:42,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71798 states to 71798 states and 231108 transitions. [2019-12-07 18:05:42,382 INFO L78 Accepts]: Start accepts. Automaton has 71798 states and 231108 transitions. Word has length 22 [2019-12-07 18:05:42,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:42,382 INFO L462 AbstractCegarLoop]: Abstraction has 71798 states and 231108 transitions. [2019-12-07 18:05:42,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:05:42,383 INFO L276 IsEmpty]: Start isEmpty. Operand 71798 states and 231108 transitions. [2019-12-07 18:05:42,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:05:42,390 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:42,390 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:42,390 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:42,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:42,390 INFO L82 PathProgramCache]: Analyzing trace with hash -2032339914, now seen corresponding path program 1 times [2019-12-07 18:05:42,390 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:42,390 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513529041] [2019-12-07 18:05:42,390 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:42,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:42,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:42,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513529041] [2019-12-07 18:05:42,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:42,425 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:05:42,426 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1972153843] [2019-12-07 18:05:42,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:05:42,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:42,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:05:42,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:05:42,426 INFO L87 Difference]: Start difference. First operand 71798 states and 231108 transitions. Second operand 5 states. [2019-12-07 18:05:42,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:42,924 INFO L93 Difference]: Finished difference Result 91330 states and 289623 transitions. [2019-12-07 18:05:42,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:05:42,924 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:05:42,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:43,056 INFO L225 Difference]: With dead ends: 91330 [2019-12-07 18:05:43,056 INFO L226 Difference]: Without dead ends: 91316 [2019-12-07 18:05:43,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:05:43,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91316 states. [2019-12-07 18:05:44,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91316 to 69605. [2019-12-07 18:05:44,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69605 states. [2019-12-07 18:05:44,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69605 states to 69605 states and 224450 transitions. [2019-12-07 18:05:44,339 INFO L78 Accepts]: Start accepts. Automaton has 69605 states and 224450 transitions. Word has length 22 [2019-12-07 18:05:44,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:44,339 INFO L462 AbstractCegarLoop]: Abstraction has 69605 states and 224450 transitions. [2019-12-07 18:05:44,339 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:05:44,339 INFO L276 IsEmpty]: Start isEmpty. Operand 69605 states and 224450 transitions. [2019-12-07 18:05:44,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 18:05:44,354 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:44,355 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:44,355 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:44,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:44,355 INFO L82 PathProgramCache]: Analyzing trace with hash -1083173402, now seen corresponding path program 1 times [2019-12-07 18:05:44,355 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:44,355 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029901439] [2019-12-07 18:05:44,355 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:44,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:44,402 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:44,402 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029901439] [2019-12-07 18:05:44,402 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:44,403 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:05:44,403 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346438011] [2019-12-07 18:05:44,403 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:05:44,403 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:44,403 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:05:44,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:05:44,404 INFO L87 Difference]: Start difference. First operand 69605 states and 224450 transitions. Second operand 5 states. [2019-12-07 18:05:44,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:44,874 INFO L93 Difference]: Finished difference Result 86092 states and 273664 transitions. [2019-12-07 18:05:44,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:05:44,874 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 18:05:44,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:45,003 INFO L225 Difference]: With dead ends: 86092 [2019-12-07 18:05:45,003 INFO L226 Difference]: Without dead ends: 86044 [2019-12-07 18:05:45,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:05:45,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86044 states. [2019-12-07 18:05:46,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86044 to 73017. [2019-12-07 18:05:46,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73017 states. [2019-12-07 18:05:46,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73017 states to 73017 states and 234757 transitions. [2019-12-07 18:05:46,300 INFO L78 Accepts]: Start accepts. Automaton has 73017 states and 234757 transitions. Word has length 26 [2019-12-07 18:05:46,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:46,300 INFO L462 AbstractCegarLoop]: Abstraction has 73017 states and 234757 transitions. [2019-12-07 18:05:46,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:05:46,300 INFO L276 IsEmpty]: Start isEmpty. Operand 73017 states and 234757 transitions. [2019-12-07 18:05:46,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:05:46,321 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:46,321 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:46,321 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:46,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:46,322 INFO L82 PathProgramCache]: Analyzing trace with hash -799804073, now seen corresponding path program 1 times [2019-12-07 18:05:46,322 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:46,322 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927790745] [2019-12-07 18:05:46,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:46,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:46,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:46,361 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [927790745] [2019-12-07 18:05:46,361 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:46,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:05:46,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450535953] [2019-12-07 18:05:46,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:05:46,362 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:46,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:05:46,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:05:46,363 INFO L87 Difference]: Start difference. First operand 73017 states and 234757 transitions. Second operand 5 states. [2019-12-07 18:05:46,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:46,779 INFO L93 Difference]: Finished difference Result 87024 states and 275380 transitions. [2019-12-07 18:05:46,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:05:46,780 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 18:05:46,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:46,899 INFO L225 Difference]: With dead ends: 87024 [2019-12-07 18:05:46,900 INFO L226 Difference]: Without dead ends: 86980 [2019-12-07 18:05:46,900 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:05:47,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86980 states. [2019-12-07 18:05:48,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86980 to 72137. [2019-12-07 18:05:48,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72137 states. [2019-12-07 18:05:48,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72137 states to 72137 states and 232084 transitions. [2019-12-07 18:05:48,225 INFO L78 Accepts]: Start accepts. Automaton has 72137 states and 232084 transitions. Word has length 28 [2019-12-07 18:05:48,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:48,225 INFO L462 AbstractCegarLoop]: Abstraction has 72137 states and 232084 transitions. [2019-12-07 18:05:48,225 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:05:48,226 INFO L276 IsEmpty]: Start isEmpty. Operand 72137 states and 232084 transitions. [2019-12-07 18:05:48,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:05:48,249 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:48,249 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:48,249 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:48,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:48,250 INFO L82 PathProgramCache]: Analyzing trace with hash -1469523336, now seen corresponding path program 1 times [2019-12-07 18:05:48,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:48,250 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275318128] [2019-12-07 18:05:48,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:48,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:48,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:48,277 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275318128] [2019-12-07 18:05:48,277 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:48,277 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:05:48,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1656697246] [2019-12-07 18:05:48,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:05:48,278 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:48,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:05:48,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:05:48,278 INFO L87 Difference]: Start difference. First operand 72137 states and 232084 transitions. Second operand 4 states. [2019-12-07 18:05:48,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:48,367 INFO L93 Difference]: Finished difference Result 27979 states and 86655 transitions. [2019-12-07 18:05:48,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:05:48,368 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 18:05:48,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:48,403 INFO L225 Difference]: With dead ends: 27979 [2019-12-07 18:05:48,403 INFO L226 Difference]: Without dead ends: 27979 [2019-12-07 18:05:48,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:05:48,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27979 states. [2019-12-07 18:05:48,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27979 to 25500. [2019-12-07 18:05:48,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25500 states. [2019-12-07 18:05:48,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25500 states to 25500 states and 79033 transitions. [2019-12-07 18:05:48,795 INFO L78 Accepts]: Start accepts. Automaton has 25500 states and 79033 transitions. Word has length 30 [2019-12-07 18:05:48,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:48,796 INFO L462 AbstractCegarLoop]: Abstraction has 25500 states and 79033 transitions. [2019-12-07 18:05:48,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:05:48,796 INFO L276 IsEmpty]: Start isEmpty. Operand 25500 states and 79033 transitions. [2019-12-07 18:05:48,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 18:05:48,814 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:48,814 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:48,815 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:48,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:48,815 INFO L82 PathProgramCache]: Analyzing trace with hash -145847770, now seen corresponding path program 1 times [2019-12-07 18:05:48,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:48,815 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215811460] [2019-12-07 18:05:48,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:48,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:48,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:48,861 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215811460] [2019-12-07 18:05:48,861 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:48,861 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:05:48,862 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992968758] [2019-12-07 18:05:48,862 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:05:48,862 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:48,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:05:48,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:05:48,862 INFO L87 Difference]: Start difference. First operand 25500 states and 79033 transitions. Second operand 6 states. [2019-12-07 18:05:49,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:49,305 INFO L93 Difference]: Finished difference Result 32400 states and 98245 transitions. [2019-12-07 18:05:49,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:05:49,306 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 18:05:49,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:49,343 INFO L225 Difference]: With dead ends: 32400 [2019-12-07 18:05:49,343 INFO L226 Difference]: Without dead ends: 32400 [2019-12-07 18:05:49,344 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:05:49,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32400 states. [2019-12-07 18:05:49,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32400 to 25938. [2019-12-07 18:05:49,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25938 states. [2019-12-07 18:05:49,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25938 states to 25938 states and 80337 transitions. [2019-12-07 18:05:49,818 INFO L78 Accepts]: Start accepts. Automaton has 25938 states and 80337 transitions. Word has length 32 [2019-12-07 18:05:49,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:49,818 INFO L462 AbstractCegarLoop]: Abstraction has 25938 states and 80337 transitions. [2019-12-07 18:05:49,818 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:05:49,818 INFO L276 IsEmpty]: Start isEmpty. Operand 25938 states and 80337 transitions. [2019-12-07 18:05:49,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:05:49,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:49,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:49,839 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:49,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:49,839 INFO L82 PathProgramCache]: Analyzing trace with hash -1380765993, now seen corresponding path program 1 times [2019-12-07 18:05:49,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:49,839 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816437061] [2019-12-07 18:05:49,839 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:49,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:49,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:49,884 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816437061] [2019-12-07 18:05:49,884 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:49,884 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:05:49,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094984408] [2019-12-07 18:05:49,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:05:49,885 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:49,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:05:49,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:05:49,885 INFO L87 Difference]: Start difference. First operand 25938 states and 80337 transitions. Second operand 6 states. [2019-12-07 18:05:50,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:50,313 INFO L93 Difference]: Finished difference Result 31899 states and 96883 transitions. [2019-12-07 18:05:50,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:05:50,313 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 18:05:50,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:50,352 INFO L225 Difference]: With dead ends: 31899 [2019-12-07 18:05:50,352 INFO L226 Difference]: Without dead ends: 31899 [2019-12-07 18:05:50,352 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:05:50,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31899 states. [2019-12-07 18:05:50,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31899 to 24780. [2019-12-07 18:05:50,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24780 states. [2019-12-07 18:05:50,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24780 states to 24780 states and 76926 transitions. [2019-12-07 18:05:50,779 INFO L78 Accepts]: Start accepts. Automaton has 24780 states and 76926 transitions. Word has length 34 [2019-12-07 18:05:50,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:50,779 INFO L462 AbstractCegarLoop]: Abstraction has 24780 states and 76926 transitions. [2019-12-07 18:05:50,779 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:05:50,779 INFO L276 IsEmpty]: Start isEmpty. Operand 24780 states and 76926 transitions. [2019-12-07 18:05:50,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:05:50,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:50,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:50,802 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:50,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:50,802 INFO L82 PathProgramCache]: Analyzing trace with hash 1174419869, now seen corresponding path program 1 times [2019-12-07 18:05:50,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:50,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625532079] [2019-12-07 18:05:50,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:50,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:50,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:50,846 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625532079] [2019-12-07 18:05:50,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:50,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:05:50,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356137078] [2019-12-07 18:05:50,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:05:50,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:50,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:05:50,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:05:50,847 INFO L87 Difference]: Start difference. First operand 24780 states and 76926 transitions. Second operand 5 states. [2019-12-07 18:05:51,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:51,260 INFO L93 Difference]: Finished difference Result 36358 states and 111275 transitions. [2019-12-07 18:05:51,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:05:51,260 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 18:05:51,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:51,304 INFO L225 Difference]: With dead ends: 36358 [2019-12-07 18:05:51,304 INFO L226 Difference]: Without dead ends: 36358 [2019-12-07 18:05:51,305 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:05:51,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36358 states. [2019-12-07 18:05:51,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36358 to 31699. [2019-12-07 18:05:51,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31699 states. [2019-12-07 18:05:51,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31699 states to 31699 states and 98212 transitions. [2019-12-07 18:05:51,821 INFO L78 Accepts]: Start accepts. Automaton has 31699 states and 98212 transitions. Word has length 41 [2019-12-07 18:05:51,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:51,821 INFO L462 AbstractCegarLoop]: Abstraction has 31699 states and 98212 transitions. [2019-12-07 18:05:51,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:05:51,821 INFO L276 IsEmpty]: Start isEmpty. Operand 31699 states and 98212 transitions. [2019-12-07 18:05:51,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:05:51,851 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:51,851 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:51,851 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:51,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:51,852 INFO L82 PathProgramCache]: Analyzing trace with hash 1274395705, now seen corresponding path program 2 times [2019-12-07 18:05:51,852 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:51,852 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344334482] [2019-12-07 18:05:51,852 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:51,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:51,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:51,893 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344334482] [2019-12-07 18:05:51,893 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:51,893 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:05:51,894 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1462786486] [2019-12-07 18:05:51,894 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:05:51,894 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:51,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:05:51,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:05:51,894 INFO L87 Difference]: Start difference. First operand 31699 states and 98212 transitions. Second operand 5 states. [2019-12-07 18:05:51,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:51,986 INFO L93 Difference]: Finished difference Result 29593 states and 93482 transitions. [2019-12-07 18:05:51,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:05:51,986 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 18:05:51,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:52,025 INFO L225 Difference]: With dead ends: 29593 [2019-12-07 18:05:52,026 INFO L226 Difference]: Without dead ends: 29365 [2019-12-07 18:05:52,026 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:05:52,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29365 states. [2019-12-07 18:05:52,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29365 to 18223. [2019-12-07 18:05:52,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18223 states. [2019-12-07 18:05:52,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18223 states to 18223 states and 57294 transitions. [2019-12-07 18:05:52,390 INFO L78 Accepts]: Start accepts. Automaton has 18223 states and 57294 transitions. Word has length 41 [2019-12-07 18:05:52,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:52,390 INFO L462 AbstractCegarLoop]: Abstraction has 18223 states and 57294 transitions. [2019-12-07 18:05:52,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:05:52,390 INFO L276 IsEmpty]: Start isEmpty. Operand 18223 states and 57294 transitions. [2019-12-07 18:05:52,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 18:05:52,405 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:52,405 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:52,406 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:52,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:52,406 INFO L82 PathProgramCache]: Analyzing trace with hash 1306345889, now seen corresponding path program 1 times [2019-12-07 18:05:52,406 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:52,406 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993407951] [2019-12-07 18:05:52,406 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:52,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:52,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:52,460 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993407951] [2019-12-07 18:05:52,460 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:52,460 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:05:52,460 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1295868538] [2019-12-07 18:05:52,461 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:05:52,461 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:52,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:05:52,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:05:52,461 INFO L87 Difference]: Start difference. First operand 18223 states and 57294 transitions. Second operand 6 states. [2019-12-07 18:05:52,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:52,950 INFO L93 Difference]: Finished difference Result 24434 states and 75591 transitions. [2019-12-07 18:05:52,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:05:52,950 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2019-12-07 18:05:52,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:52,977 INFO L225 Difference]: With dead ends: 24434 [2019-12-07 18:05:52,977 INFO L226 Difference]: Without dead ends: 24434 [2019-12-07 18:05:52,977 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:05:53,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24434 states. [2019-12-07 18:05:53,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24434 to 19099. [2019-12-07 18:05:53,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19099 states. [2019-12-07 18:05:53,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19099 states to 19099 states and 59998 transitions. [2019-12-07 18:05:53,298 INFO L78 Accepts]: Start accepts. Automaton has 19099 states and 59998 transitions. Word has length 64 [2019-12-07 18:05:53,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:53,299 INFO L462 AbstractCegarLoop]: Abstraction has 19099 states and 59998 transitions. [2019-12-07 18:05:53,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:05:53,299 INFO L276 IsEmpty]: Start isEmpty. Operand 19099 states and 59998 transitions. [2019-12-07 18:05:53,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 18:05:53,315 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:53,315 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:53,316 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:53,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:53,316 INFO L82 PathProgramCache]: Analyzing trace with hash -1813344643, now seen corresponding path program 2 times [2019-12-07 18:05:53,316 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:53,316 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699569596] [2019-12-07 18:05:53,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:53,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:53,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:53,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1699569596] [2019-12-07 18:05:53,391 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:53,391 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:05:53,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036447093] [2019-12-07 18:05:53,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:05:53,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:53,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:05:53,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:05:53,391 INFO L87 Difference]: Start difference. First operand 19099 states and 59998 transitions. Second operand 7 states. [2019-12-07 18:05:53,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:53,936 INFO L93 Difference]: Finished difference Result 85840 states and 271443 transitions. [2019-12-07 18:05:53,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:05:53,937 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 18:05:53,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:54,029 INFO L225 Difference]: With dead ends: 85840 [2019-12-07 18:05:54,029 INFO L226 Difference]: Without dead ends: 65667 [2019-12-07 18:05:54,029 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:05:54,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65667 states. [2019-12-07 18:05:54,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65667 to 23823. [2019-12-07 18:05:54,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23823 states. [2019-12-07 18:05:54,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23823 states to 23823 states and 74885 transitions. [2019-12-07 18:05:54,651 INFO L78 Accepts]: Start accepts. Automaton has 23823 states and 74885 transitions. Word has length 64 [2019-12-07 18:05:54,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:54,652 INFO L462 AbstractCegarLoop]: Abstraction has 23823 states and 74885 transitions. [2019-12-07 18:05:54,652 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:05:54,652 INFO L276 IsEmpty]: Start isEmpty. Operand 23823 states and 74885 transitions. [2019-12-07 18:05:54,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 18:05:54,672 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:54,672 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:54,673 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:54,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:54,673 INFO L82 PathProgramCache]: Analyzing trace with hash -1562318197, now seen corresponding path program 3 times [2019-12-07 18:05:54,673 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:54,673 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527872741] [2019-12-07 18:05:54,673 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:54,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:54,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:54,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527872741] [2019-12-07 18:05:54,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:54,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:05:54,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140807112] [2019-12-07 18:05:54,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:05:54,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:54,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:05:54,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:05:54,745 INFO L87 Difference]: Start difference. First operand 23823 states and 74885 transitions. Second operand 7 states. [2019-12-07 18:05:55,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:55,353 INFO L93 Difference]: Finished difference Result 92569 states and 288439 transitions. [2019-12-07 18:05:55,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:05:55,353 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 18:05:55,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:55,443 INFO L225 Difference]: With dead ends: 92569 [2019-12-07 18:05:55,443 INFO L226 Difference]: Without dead ends: 67366 [2019-12-07 18:05:55,443 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:05:55,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67366 states. [2019-12-07 18:05:56,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67366 to 26928. [2019-12-07 18:05:56,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26928 states. [2019-12-07 18:05:56,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26928 states to 26928 states and 84117 transitions. [2019-12-07 18:05:56,093 INFO L78 Accepts]: Start accepts. Automaton has 26928 states and 84117 transitions. Word has length 64 [2019-12-07 18:05:56,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:56,093 INFO L462 AbstractCegarLoop]: Abstraction has 26928 states and 84117 transitions. [2019-12-07 18:05:56,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:05:56,093 INFO L276 IsEmpty]: Start isEmpty. Operand 26928 states and 84117 transitions. [2019-12-07 18:05:56,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 18:05:56,120 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:56,120 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:56,120 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:56,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:56,120 INFO L82 PathProgramCache]: Analyzing trace with hash 324712527, now seen corresponding path program 4 times [2019-12-07 18:05:56,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:56,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [76001165] [2019-12-07 18:05:56,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:56,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:56,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:56,164 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [76001165] [2019-12-07 18:05:56,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:56,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:05:56,165 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [337885938] [2019-12-07 18:05:56,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:05:56,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:56,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:05:56,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:05:56,165 INFO L87 Difference]: Start difference. First operand 26928 states and 84117 transitions. Second operand 3 states. [2019-12-07 18:05:56,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:56,276 INFO L93 Difference]: Finished difference Result 31644 states and 98028 transitions. [2019-12-07 18:05:56,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:05:56,277 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 18:05:56,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:56,317 INFO L225 Difference]: With dead ends: 31644 [2019-12-07 18:05:56,317 INFO L226 Difference]: Without dead ends: 31644 [2019-12-07 18:05:56,317 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:05:56,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31644 states. [2019-12-07 18:05:56,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31644 to 27390. [2019-12-07 18:05:56,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27390 states. [2019-12-07 18:05:56,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27390 states to 27390 states and 85749 transitions. [2019-12-07 18:05:56,760 INFO L78 Accepts]: Start accepts. Automaton has 27390 states and 85749 transitions. Word has length 64 [2019-12-07 18:05:56,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:56,760 INFO L462 AbstractCegarLoop]: Abstraction has 27390 states and 85749 transitions. [2019-12-07 18:05:56,760 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:05:56,760 INFO L276 IsEmpty]: Start isEmpty. Operand 27390 states and 85749 transitions. [2019-12-07 18:05:56,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:05:56,788 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:56,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:56,788 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:56,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:56,788 INFO L82 PathProgramCache]: Analyzing trace with hash -1976937813, now seen corresponding path program 1 times [2019-12-07 18:05:56,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:56,789 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785804918] [2019-12-07 18:05:56,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:56,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:56,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:56,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [785804918] [2019-12-07 18:05:56,856 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:56,856 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:05:56,856 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [814948892] [2019-12-07 18:05:56,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:05:56,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:56,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:05:56,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:05:56,856 INFO L87 Difference]: Start difference. First operand 27390 states and 85749 transitions. Second operand 7 states. [2019-12-07 18:05:57,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:57,474 INFO L93 Difference]: Finished difference Result 95537 states and 300593 transitions. [2019-12-07 18:05:57,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:05:57,474 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 18:05:57,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:57,589 INFO L225 Difference]: With dead ends: 95537 [2019-12-07 18:05:57,589 INFO L226 Difference]: Without dead ends: 86455 [2019-12-07 18:05:57,589 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:05:57,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86455 states. [2019-12-07 18:05:58,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86455 to 27820. [2019-12-07 18:05:58,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27820 states. [2019-12-07 18:05:58,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27820 states to 27820 states and 87309 transitions. [2019-12-07 18:05:58,419 INFO L78 Accepts]: Start accepts. Automaton has 27820 states and 87309 transitions. Word has length 65 [2019-12-07 18:05:58,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:58,420 INFO L462 AbstractCegarLoop]: Abstraction has 27820 states and 87309 transitions. [2019-12-07 18:05:58,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:05:58,420 INFO L276 IsEmpty]: Start isEmpty. Operand 27820 states and 87309 transitions. [2019-12-07 18:05:58,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 18:05:58,449 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:58,449 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:58,449 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:58,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:58,450 INFO L82 PathProgramCache]: Analyzing trace with hash 78921339, now seen corresponding path program 2 times [2019-12-07 18:05:58,450 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:58,450 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929119295] [2019-12-07 18:05:58,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:58,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:58,489 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:58,490 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1929119295] [2019-12-07 18:05:58,490 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:58,490 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:05:58,490 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [134792142] [2019-12-07 18:05:58,490 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:05:58,490 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:58,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:05:58,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:05:58,491 INFO L87 Difference]: Start difference. First operand 27820 states and 87309 transitions. Second operand 3 states. [2019-12-07 18:05:58,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:05:58,555 INFO L93 Difference]: Finished difference Result 24004 states and 74117 transitions. [2019-12-07 18:05:58,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:05:58,556 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 18:05:58,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:05:58,582 INFO L225 Difference]: With dead ends: 24004 [2019-12-07 18:05:58,582 INFO L226 Difference]: Without dead ends: 24004 [2019-12-07 18:05:58,582 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:05:58,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24004 states. [2019-12-07 18:05:58,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24004 to 22197. [2019-12-07 18:05:58,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22197 states. [2019-12-07 18:05:58,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22197 states to 22197 states and 68562 transitions. [2019-12-07 18:05:58,894 INFO L78 Accepts]: Start accepts. Automaton has 22197 states and 68562 transitions. Word has length 65 [2019-12-07 18:05:58,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:05:58,894 INFO L462 AbstractCegarLoop]: Abstraction has 22197 states and 68562 transitions. [2019-12-07 18:05:58,894 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:05:58,894 INFO L276 IsEmpty]: Start isEmpty. Operand 22197 states and 68562 transitions. [2019-12-07 18:05:58,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:05:58,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:05:58,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:05:58,913 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:05:58,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:05:58,913 INFO L82 PathProgramCache]: Analyzing trace with hash -1524862519, now seen corresponding path program 1 times [2019-12-07 18:05:58,913 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:05:58,913 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414496542] [2019-12-07 18:05:58,914 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:05:58,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:05:59,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:05:59,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414496542] [2019-12-07 18:05:59,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:05:59,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:05:59,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [229439163] [2019-12-07 18:05:59,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:05:59,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:05:59,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:05:59,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:05:59,071 INFO L87 Difference]: Start difference. First operand 22197 states and 68562 transitions. Second operand 11 states. [2019-12-07 18:06:00,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:06:00,503 INFO L93 Difference]: Finished difference Result 80741 states and 252274 transitions. [2019-12-07 18:06:00,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 18:06:00,503 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 18:06:00,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:06:00,609 INFO L225 Difference]: With dead ends: 80741 [2019-12-07 18:06:00,609 INFO L226 Difference]: Without dead ends: 78196 [2019-12-07 18:06:00,610 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 573 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=393, Invalid=1587, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 18:06:00,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78196 states. [2019-12-07 18:06:01,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78196 to 26945. [2019-12-07 18:06:01,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26945 states. [2019-12-07 18:06:01,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26945 states to 26945 states and 83161 transitions. [2019-12-07 18:06:01,354 INFO L78 Accepts]: Start accepts. Automaton has 26945 states and 83161 transitions. Word has length 66 [2019-12-07 18:06:01,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:06:01,355 INFO L462 AbstractCegarLoop]: Abstraction has 26945 states and 83161 transitions. [2019-12-07 18:06:01,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:06:01,355 INFO L276 IsEmpty]: Start isEmpty. Operand 26945 states and 83161 transitions. [2019-12-07 18:06:01,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:06:01,382 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:06:01,383 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:06:01,383 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:06:01,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:06:01,383 INFO L82 PathProgramCache]: Analyzing trace with hash -1239159877, now seen corresponding path program 2 times [2019-12-07 18:06:01,383 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:06:01,383 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1377068450] [2019-12-07 18:06:01,383 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:06:01,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:06:01,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:06:01,572 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1377068450] [2019-12-07 18:06:01,572 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:06:01,572 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:06:01,572 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1045278223] [2019-12-07 18:06:01,572 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:06:01,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:06:01,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:06:01,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:06:01,573 INFO L87 Difference]: Start difference. First operand 26945 states and 83161 transitions. Second operand 11 states. [2019-12-07 18:06:02,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:06:02,766 INFO L93 Difference]: Finished difference Result 73876 states and 227428 transitions. [2019-12-07 18:06:02,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 18:06:02,766 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 18:06:02,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:06:02,842 INFO L225 Difference]: With dead ends: 73876 [2019-12-07 18:06:02,842 INFO L226 Difference]: Without dead ends: 56343 [2019-12-07 18:06:02,843 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 561 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=389, Invalid=1591, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 18:06:02,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56343 states. [2019-12-07 18:06:03,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56343 to 21820. [2019-12-07 18:06:03,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21820 states. [2019-12-07 18:06:03,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21820 states to 21820 states and 66862 transitions. [2019-12-07 18:06:03,383 INFO L78 Accepts]: Start accepts. Automaton has 21820 states and 66862 transitions. Word has length 66 [2019-12-07 18:06:03,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:06:03,383 INFO L462 AbstractCegarLoop]: Abstraction has 21820 states and 66862 transitions. [2019-12-07 18:06:03,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:06:03,383 INFO L276 IsEmpty]: Start isEmpty. Operand 21820 states and 66862 transitions. [2019-12-07 18:06:03,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:06:03,401 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:06:03,401 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:06:03,402 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:06:03,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:06:03,402 INFO L82 PathProgramCache]: Analyzing trace with hash -952881413, now seen corresponding path program 3 times [2019-12-07 18:06:03,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:06:03,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1547089107] [2019-12-07 18:06:03,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:06:03,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:06:03,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:06:03,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1547089107] [2019-12-07 18:06:03,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:06:03,736 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:06:03,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977040568] [2019-12-07 18:06:03,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:06:03,736 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:06:03,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:06:03,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:06:03,737 INFO L87 Difference]: Start difference. First operand 21820 states and 66862 transitions. Second operand 16 states. [2019-12-07 18:06:07,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:06:07,569 INFO L93 Difference]: Finished difference Result 45726 states and 138757 transitions. [2019-12-07 18:06:07,569 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 18:06:07,569 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 66 [2019-12-07 18:06:07,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:06:07,616 INFO L225 Difference]: With dead ends: 45726 [2019-12-07 18:06:07,616 INFO L226 Difference]: Without dead ends: 44174 [2019-12-07 18:06:07,618 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1101 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=630, Invalid=3276, Unknown=0, NotChecked=0, Total=3906 [2019-12-07 18:06:07,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44174 states. [2019-12-07 18:06:07,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44174 to 21290. [2019-12-07 18:06:07,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21290 states. [2019-12-07 18:06:08,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21290 states to 21290 states and 65390 transitions. [2019-12-07 18:06:08,034 INFO L78 Accepts]: Start accepts. Automaton has 21290 states and 65390 transitions. Word has length 66 [2019-12-07 18:06:08,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:06:08,034 INFO L462 AbstractCegarLoop]: Abstraction has 21290 states and 65390 transitions. [2019-12-07 18:06:08,034 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:06:08,034 INFO L276 IsEmpty]: Start isEmpty. Operand 21290 states and 65390 transitions. [2019-12-07 18:06:08,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:06:08,053 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:06:08,053 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:06:08,053 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:06:08,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:06:08,053 INFO L82 PathProgramCache]: Analyzing trace with hash 620198601, now seen corresponding path program 4 times [2019-12-07 18:06:08,053 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:06:08,053 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012965822] [2019-12-07 18:06:08,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:06:08,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:06:08,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:06:08,136 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:06:08,136 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:06:08,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= 0 |v_ULTIMATE.start_main_~#t657~0.offset_16|) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t657~0.base_22|) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= v_~z$w_buff1_used~0_500 0) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t657~0.base_22| 4)) (= v_~z$read_delayed~0_7 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t657~0.base_22| 1) |v_#valid_69|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t657~0.base_22|)) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t657~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t657~0.base_22|) |v_ULTIMATE.start_main_~#t657~0.offset_16| 0)) |v_#memory_int_19|) (= 0 v_~z$r_buff0_thd3~0_379) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t658~0.offset=|v_ULTIMATE.start_main_~#t658~0.offset_14|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, ULTIMATE.start_main_~#t659~0.base=|v_ULTIMATE.start_main_~#t659~0.base_17|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_~#t658~0.base=|v_ULTIMATE.start_main_~#t658~0.base_19|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, ULTIMATE.start_main_~#t657~0.base=|v_ULTIMATE.start_main_~#t657~0.base_22|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t657~0.offset=|v_ULTIMATE.start_main_~#t657~0.offset_16|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_133, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ULTIMATE.start_main_~#t659~0.offset=|v_ULTIMATE.start_main_~#t659~0.offset_14|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t658~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t659~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_~#t658~0.base, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t657~0.base, ULTIMATE.start_main_~#t657~0.offset, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t659~0.offset, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:06:08,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:06:08,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t658~0.base_11| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t658~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t658~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t658~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t658~0.base_11|) |v_ULTIMATE.start_main_~#t658~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t658~0.base_11| 1) |v_#valid_31|) (= 0 |v_ULTIMATE.start_main_~#t658~0.offset_10|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t658~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t658~0.offset=|v_ULTIMATE.start_main_~#t658~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t658~0.base=|v_ULTIMATE.start_main_~#t658~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t658~0.offset, ULTIMATE.start_main_~#t658~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:06:08,140 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t659~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t659~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t659~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t659~0.base_12|) |v_ULTIMATE.start_main_~#t659~0.offset_10| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t659~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t659~0.base_12| 0)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t659~0.base_12| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t659~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t659~0.offset=|v_ULTIMATE.start_main_~#t659~0.offset_10|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t659~0.base=|v_ULTIMATE.start_main_~#t659~0.base_12|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t659~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t659~0.base, #length] because there is no mapped edge [2019-12-07 18:06:08,142 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1862333176 256))) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1862333176| |P1Thread1of1ForFork2_#t~ite10_Out1862333176|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1862333176 256)))) (or (and (or .cse0 .cse1) .cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1862333176| ~z~0_In1862333176)) (and (not .cse0) .cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1862333176| ~z$w_buff1~0_In1862333176) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1862333176, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1862333176, ~z$w_buff1~0=~z$w_buff1~0_In1862333176, ~z~0=~z~0_In1862333176} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1862333176|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1862333176, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1862333176|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1862333176, ~z$w_buff1~0=~z$w_buff1~0_In1862333176, ~z~0=~z~0_In1862333176} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:06:08,143 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1651619703 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite24_Out1651619703| ~z$w_buff1~0_In1651619703) (= |P2Thread1of1ForFork0_#t~ite23_In1651619703| |P2Thread1of1ForFork0_#t~ite23_Out1651619703|) (not .cse0)) (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1651619703 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd3~0_In1651619703 256)) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1651619703 256))) (= (mod ~z$w_buff0_used~0_In1651619703 256) 0))) (= |P2Thread1of1ForFork0_#t~ite24_Out1651619703| |P2Thread1of1ForFork0_#t~ite23_Out1651619703|) (= ~z$w_buff1~0_In1651619703 |P2Thread1of1ForFork0_#t~ite23_Out1651619703|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1651619703, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1651619703, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1651619703|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1651619703, ~z$w_buff1~0=~z$w_buff1~0_In1651619703, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1651619703, ~weak$$choice2~0=~weak$$choice2~0_In1651619703} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1651619703, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1651619703|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1651619703, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1651619703|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1651619703, ~z$w_buff1~0=~z$w_buff1~0_In1651619703, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1651619703, ~weak$$choice2~0=~weak$$choice2~0_In1651619703} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 18:06:08,144 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In763159009 256) 0)) (.cse5 (= (mod ~z$w_buff0_used~0_In763159009 256) 0)) (.cse4 (= (mod ~z$r_buff1_thd3~0_In763159009 256) 0)) (.cse6 (= 0 (mod ~z$r_buff0_thd3~0_In763159009 256))) (.cse1 (= |P2Thread1of1ForFork0_#t~ite29_Out763159009| |P2Thread1of1ForFork0_#t~ite30_Out763159009|)) (.cse0 (= 0 (mod ~weak$$choice2~0_In763159009 256)))) (or (let ((.cse3 (not .cse6))) (and (= |P2Thread1of1ForFork0_#t~ite29_Out763159009| |P2Thread1of1ForFork0_#t~ite28_Out763159009|) (= 0 |P2Thread1of1ForFork0_#t~ite28_Out763159009|) .cse0 .cse1 (or (not .cse2) .cse3) (or (not .cse4) .cse3) (not .cse5))) (and (or (and (= ~z$w_buff1_used~0_In763159009 |P2Thread1of1ForFork0_#t~ite29_Out763159009|) (or (and .cse6 .cse2) .cse5 (and .cse4 .cse6)) .cse0 .cse1) (and (= ~z$w_buff1_used~0_In763159009 |P2Thread1of1ForFork0_#t~ite30_Out763159009|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_Out763159009| |P2Thread1of1ForFork0_#t~ite29_In763159009|))) (= |P2Thread1of1ForFork0_#t~ite28_In763159009| |P2Thread1of1ForFork0_#t~ite28_Out763159009|)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In763159009|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In763159009, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In763159009, ~z$w_buff1_used~0=~z$w_buff1_used~0_In763159009, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In763159009, ~weak$$choice2~0=~weak$$choice2~0_In763159009, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In763159009|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out763159009|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In763159009, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In763159009, ~z$w_buff1_used~0=~z$w_buff1_used~0_In763159009, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In763159009, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out763159009|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out763159009|, ~weak$$choice2~0=~weak$$choice2~0_In763159009} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:06:08,144 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:06:08,144 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:06:08,145 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-988525752 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out-988525752| |P2Thread1of1ForFork0_#t~ite39_Out-988525752|)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-988525752 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-988525752| ~z~0_In-988525752) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-988525752| ~z$w_buff1~0_In-988525752) (not .cse1) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-988525752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-988525752, ~z$w_buff1~0=~z$w_buff1~0_In-988525752, ~z~0=~z~0_In-988525752} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-988525752|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-988525752|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-988525752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-988525752, ~z$w_buff1~0=~z$w_buff1~0_In-988525752, ~z~0=~z~0_In-988525752} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:06:08,145 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In760265765 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In760265765 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out760265765| ~z$w_buff0_used~0_In760265765) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork0_#t~ite40_Out760265765|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In760265765} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out760265765|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In760265765} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:06:08,145 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In2005253206 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2005253206 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In2005253206 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In2005253206 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out2005253206| ~z$w_buff1_used~0_In2005253206)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out2005253206| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2005253206, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2005253206, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2005253206} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2005253206, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2005253206, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2005253206, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out2005253206|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:06:08,146 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1632527143 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1632527143 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1632527143|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd3~0_In1632527143 |P2Thread1of1ForFork0_#t~ite42_Out1632527143|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1632527143, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1632527143} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1632527143, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1632527143, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1632527143|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:06:08,146 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1320061449 256))) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1320061449 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1320061449 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1320061449 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1320061449|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd3~0_In-1320061449 |P2Thread1of1ForFork0_#t~ite43_Out-1320061449|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1320061449, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1320061449, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1320061449, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1320061449} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1320061449|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1320061449, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1320061449, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1320061449, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1320061449} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:06:08,146 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:06:08,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1515198035 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1515198035 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1515198035 |P0Thread1of1ForFork1_#t~ite5_Out1515198035|)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out1515198035| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1515198035, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1515198035} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1515198035|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1515198035, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1515198035} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:06:08,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1822191220 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In1822191220 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1822191220 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1822191220 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1822191220|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1822191220 |P0Thread1of1ForFork1_#t~ite6_Out1822191220|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1822191220, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1822191220, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1822191220, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1822191220} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1822191220, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1822191220|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1822191220, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1822191220, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1822191220} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:06:08,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-103968607 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out-103968607 ~z$r_buff0_thd1~0_In-103968607)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-103968607 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd1~0_Out-103968607 0) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-103968607, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-103968607} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-103968607, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-103968607|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-103968607} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:06:08,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In1613471065 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In1613471065 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1613471065 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In1613471065 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1613471065| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out1613471065| ~z$r_buff1_thd1~0_In1613471065)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1613471065, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1613471065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1613471065, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1613471065} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1613471065|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1613471065, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1613471065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1613471065, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1613471065} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:06:08,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:06:08,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1372692094 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1372692094 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out1372692094| ~z$w_buff0_used~0_In1372692094)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1372692094|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1372692094, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1372692094} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1372692094, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1372692094|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1372692094} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:06:08,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In1903582197 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1903582197 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1903582197 256))) (.cse0 (= (mod ~z$r_buff1_thd2~0_In1903582197 256) 0))) (or (and (= ~z$w_buff1_used~0_In1903582197 |P1Thread1of1ForFork2_#t~ite12_Out1903582197|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1903582197|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903582197, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1903582197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1903582197, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1903582197} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1903582197, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1903582197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1903582197, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1903582197|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1903582197} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:06:08,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-221023180 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-221023180 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-221023180 |P1Thread1of1ForFork2_#t~ite13_Out-221023180|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-221023180|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-221023180, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-221023180} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-221023180, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-221023180|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-221023180} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:06:08,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In1903474534 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1903474534 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1903474534 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1903474534 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out1903474534| ~z$r_buff1_thd2~0_In1903474534) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1903474534|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1903474534, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1903474534, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1903474534} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1903474534, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1903474534, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1903474534|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1903474534} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:06:08,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:06:08,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:06:08,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-647140950 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-647140950 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out-647140950| ~z$w_buff1~0_In-647140950) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite47_Out-647140950| ~z~0_In-647140950) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$w_buff1~0=~z$w_buff1~0_In-647140950, ~z~0=~z~0_In-647140950} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-647140950, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-647140950|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$w_buff1~0=~z$w_buff1~0_In-647140950, ~z~0=~z~0_In-647140950} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:06:08,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 18:06:08,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In589317413 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In589317413 256) 0))) (or (and (= ~z$w_buff0_used~0_In589317413 |ULTIMATE.start_main_#t~ite49_Out589317413|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out589317413|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In589317413, ~z$w_buff0_used~0=~z$w_buff0_used~0_In589317413} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In589317413, ~z$w_buff0_used~0=~z$w_buff0_used~0_In589317413, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out589317413|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:06:08,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-16581287 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-16581287 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-16581287 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-16581287 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-16581287 |ULTIMATE.start_main_#t~ite50_Out-16581287|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-16581287|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-16581287, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-16581287, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-16581287} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-16581287|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-16581287, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-16581287, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-16581287} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:06:08,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In21236130 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In21236130 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out21236130| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out21236130| ~z$r_buff0_thd0~0_In21236130)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In21236130, ~z$w_buff0_used~0=~z$w_buff0_used~0_In21236130} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In21236130, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out21236130|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In21236130} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:06:08,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In876211489 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In876211489 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In876211489 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In876211489 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out876211489| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In876211489 |ULTIMATE.start_main_#t~ite52_Out876211489|) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In876211489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In876211489, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In876211489, ~z$w_buff1_used~0=~z$w_buff1_used~0_In876211489} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out876211489|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In876211489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In876211489, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In876211489, ~z$w_buff1_used~0=~z$w_buff1_used~0_In876211489} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:06:08,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:06:08,205 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:06:08 BasicIcfg [2019-12-07 18:06:08,205 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:06:08,205 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:06:08,205 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:06:08,205 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:06:08,205 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:02:35" (3/4) ... [2019-12-07 18:06:08,207 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:06:08,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= 0 |v_ULTIMATE.start_main_~#t657~0.offset_16|) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t657~0.base_22|) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= v_~z$w_buff1_used~0_500 0) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t657~0.base_22| 4)) (= v_~z$read_delayed~0_7 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t657~0.base_22| 1) |v_#valid_69|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t657~0.base_22|)) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t657~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t657~0.base_22|) |v_ULTIMATE.start_main_~#t657~0.offset_16| 0)) |v_#memory_int_19|) (= 0 v_~z$r_buff0_thd3~0_379) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t658~0.offset=|v_ULTIMATE.start_main_~#t658~0.offset_14|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, ULTIMATE.start_main_~#t659~0.base=|v_ULTIMATE.start_main_~#t659~0.base_17|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_~#t658~0.base=|v_ULTIMATE.start_main_~#t658~0.base_19|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, ULTIMATE.start_main_~#t657~0.base=|v_ULTIMATE.start_main_~#t657~0.base_22|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t657~0.offset=|v_ULTIMATE.start_main_~#t657~0.offset_16|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_133, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ULTIMATE.start_main_~#t659~0.offset=|v_ULTIMATE.start_main_~#t659~0.offset_14|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t658~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t659~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_~#t658~0.base, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t657~0.base, ULTIMATE.start_main_~#t657~0.offset, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t659~0.offset, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:06:08,208 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:06:08,208 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t658~0.base_11| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t658~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t658~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t658~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t658~0.base_11|) |v_ULTIMATE.start_main_~#t658~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t658~0.base_11| 1) |v_#valid_31|) (= 0 |v_ULTIMATE.start_main_~#t658~0.offset_10|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t658~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t658~0.offset=|v_ULTIMATE.start_main_~#t658~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t658~0.base=|v_ULTIMATE.start_main_~#t658~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t658~0.offset, ULTIMATE.start_main_~#t658~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 18:06:08,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t659~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t659~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t659~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t659~0.base_12|) |v_ULTIMATE.start_main_~#t659~0.offset_10| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t659~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t659~0.base_12| 0)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t659~0.base_12| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t659~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t659~0.offset=|v_ULTIMATE.start_main_~#t659~0.offset_10|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t659~0.base=|v_ULTIMATE.start_main_~#t659~0.base_12|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t659~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t659~0.base, #length] because there is no mapped edge [2019-12-07 18:06:08,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1862333176 256))) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1862333176| |P1Thread1of1ForFork2_#t~ite10_Out1862333176|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1862333176 256)))) (or (and (or .cse0 .cse1) .cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1862333176| ~z~0_In1862333176)) (and (not .cse0) .cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out1862333176| ~z$w_buff1~0_In1862333176) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1862333176, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1862333176, ~z$w_buff1~0=~z$w_buff1~0_In1862333176, ~z~0=~z~0_In1862333176} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1862333176|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1862333176, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1862333176|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1862333176, ~z$w_buff1~0=~z$w_buff1~0_In1862333176, ~z~0=~z~0_In1862333176} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 18:06:08,211 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1651619703 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite24_Out1651619703| ~z$w_buff1~0_In1651619703) (= |P2Thread1of1ForFork0_#t~ite23_In1651619703| |P2Thread1of1ForFork0_#t~ite23_Out1651619703|) (not .cse0)) (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1651619703 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd3~0_In1651619703 256)) .cse1) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1651619703 256))) (= (mod ~z$w_buff0_used~0_In1651619703 256) 0))) (= |P2Thread1of1ForFork0_#t~ite24_Out1651619703| |P2Thread1of1ForFork0_#t~ite23_Out1651619703|) (= ~z$w_buff1~0_In1651619703 |P2Thread1of1ForFork0_#t~ite23_Out1651619703|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1651619703, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1651619703, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1651619703|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1651619703, ~z$w_buff1~0=~z$w_buff1~0_In1651619703, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1651619703, ~weak$$choice2~0=~weak$$choice2~0_In1651619703} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1651619703, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1651619703|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1651619703, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1651619703|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1651619703, ~z$w_buff1~0=~z$w_buff1~0_In1651619703, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1651619703, ~weak$$choice2~0=~weak$$choice2~0_In1651619703} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 18:06:08,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In763159009 256) 0)) (.cse5 (= (mod ~z$w_buff0_used~0_In763159009 256) 0)) (.cse4 (= (mod ~z$r_buff1_thd3~0_In763159009 256) 0)) (.cse6 (= 0 (mod ~z$r_buff0_thd3~0_In763159009 256))) (.cse1 (= |P2Thread1of1ForFork0_#t~ite29_Out763159009| |P2Thread1of1ForFork0_#t~ite30_Out763159009|)) (.cse0 (= 0 (mod ~weak$$choice2~0_In763159009 256)))) (or (let ((.cse3 (not .cse6))) (and (= |P2Thread1of1ForFork0_#t~ite29_Out763159009| |P2Thread1of1ForFork0_#t~ite28_Out763159009|) (= 0 |P2Thread1of1ForFork0_#t~ite28_Out763159009|) .cse0 .cse1 (or (not .cse2) .cse3) (or (not .cse4) .cse3) (not .cse5))) (and (or (and (= ~z$w_buff1_used~0_In763159009 |P2Thread1of1ForFork0_#t~ite29_Out763159009|) (or (and .cse6 .cse2) .cse5 (and .cse4 .cse6)) .cse0 .cse1) (and (= ~z$w_buff1_used~0_In763159009 |P2Thread1of1ForFork0_#t~ite30_Out763159009|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_Out763159009| |P2Thread1of1ForFork0_#t~ite29_In763159009|))) (= |P2Thread1of1ForFork0_#t~ite28_In763159009| |P2Thread1of1ForFork0_#t~ite28_Out763159009|)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In763159009|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In763159009, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In763159009, ~z$w_buff1_used~0=~z$w_buff1_used~0_In763159009, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In763159009, ~weak$$choice2~0=~weak$$choice2~0_In763159009, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In763159009|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out763159009|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In763159009, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In763159009, ~z$w_buff1_used~0=~z$w_buff1_used~0_In763159009, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In763159009, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out763159009|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out763159009|, ~weak$$choice2~0=~weak$$choice2~0_In763159009} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:06:08,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:06:08,213 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 18:06:08,213 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-988525752 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out-988525752| |P2Thread1of1ForFork0_#t~ite39_Out-988525752|)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-988525752 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-988525752| ~z~0_In-988525752) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-988525752| ~z$w_buff1~0_In-988525752) (not .cse1) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-988525752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-988525752, ~z$w_buff1~0=~z$w_buff1~0_In-988525752, ~z~0=~z~0_In-988525752} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-988525752|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-988525752|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-988525752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-988525752, ~z$w_buff1~0=~z$w_buff1~0_In-988525752, ~z~0=~z~0_In-988525752} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:06:08,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In760265765 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In760265765 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out760265765| ~z$w_buff0_used~0_In760265765) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork0_#t~ite40_Out760265765|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In760265765} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out760265765|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In760265765} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:06:08,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In2005253206 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2005253206 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In2005253206 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In2005253206 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out2005253206| ~z$w_buff1_used~0_In2005253206)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out2005253206| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2005253206, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2005253206, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2005253206} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2005253206, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2005253206, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2005253206, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out2005253206|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:06:08,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1632527143 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1632527143 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out1632527143|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd3~0_In1632527143 |P2Thread1of1ForFork0_#t~ite42_Out1632527143|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1632527143, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1632527143} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1632527143, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1632527143, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1632527143|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 18:06:08,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1320061449 256))) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1320061449 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1320061449 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1320061449 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1320061449|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd3~0_In-1320061449 |P2Thread1of1ForFork0_#t~ite43_Out-1320061449|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1320061449, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1320061449, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1320061449, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1320061449} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1320061449|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1320061449, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1320061449, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1320061449, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1320061449} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:06:08,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 18:06:08,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1515198035 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In1515198035 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1515198035 |P0Thread1of1ForFork1_#t~ite5_Out1515198035|)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out1515198035| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1515198035, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1515198035} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1515198035|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1515198035, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1515198035} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 18:06:08,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1822191220 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In1822191220 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1822191220 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1822191220 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1822191220|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1822191220 |P0Thread1of1ForFork1_#t~ite6_Out1822191220|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1822191220, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1822191220, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1822191220, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1822191220} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1822191220, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1822191220|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1822191220, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1822191220, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1822191220} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 18:06:08,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-103968607 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out-103968607 ~z$r_buff0_thd1~0_In-103968607)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-103968607 256)))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd1~0_Out-103968607 0) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-103968607, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-103968607} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-103968607, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-103968607|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-103968607} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:06:08,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In1613471065 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In1613471065 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1613471065 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In1613471065 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1613471065| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork1_#t~ite8_Out1613471065| ~z$r_buff1_thd1~0_In1613471065)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1613471065, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1613471065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1613471065, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1613471065} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1613471065|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1613471065, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1613471065, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1613471065, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1613471065} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 18:06:08,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:06:08,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1372692094 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1372692094 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out1372692094| ~z$w_buff0_used~0_In1372692094)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1372692094|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1372692094, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1372692094} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1372692094, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1372692094|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1372692094} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 18:06:08,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd2~0_In1903582197 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1903582197 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1903582197 256))) (.cse0 (= (mod ~z$r_buff1_thd2~0_In1903582197 256) 0))) (or (and (= ~z$w_buff1_used~0_In1903582197 |P1Thread1of1ForFork2_#t~ite12_Out1903582197|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1903582197|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903582197, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1903582197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1903582197, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1903582197} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1903582197, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1903582197, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1903582197, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1903582197|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1903582197} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 18:06:08,217 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-221023180 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-221023180 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-221023180 |P1Thread1of1ForFork2_#t~ite13_Out-221023180|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-221023180|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-221023180, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-221023180} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-221023180, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-221023180|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-221023180} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 18:06:08,217 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In1903474534 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In1903474534 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1903474534 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1903474534 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite14_Out1903474534| ~z$r_buff1_thd2~0_In1903474534) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out1903474534|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1903474534, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1903474534, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1903474534} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1903474534, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1903474534, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1903474534|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1903474534} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 18:06:08,217 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:06:08,217 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:06:08,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-647140950 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-647140950 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out-647140950| ~z$w_buff1~0_In-647140950) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite47_Out-647140950| ~z~0_In-647140950) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$w_buff1~0=~z$w_buff1~0_In-647140950, ~z~0=~z~0_In-647140950} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-647140950, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-647140950|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$w_buff1~0=~z$w_buff1~0_In-647140950, ~z~0=~z~0_In-647140950} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:06:08,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 18:06:08,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In589317413 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In589317413 256) 0))) (or (and (= ~z$w_buff0_used~0_In589317413 |ULTIMATE.start_main_#t~ite49_Out589317413|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out589317413|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In589317413, ~z$w_buff0_used~0=~z$w_buff0_used~0_In589317413} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In589317413, ~z$w_buff0_used~0=~z$w_buff0_used~0_In589317413, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out589317413|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:06:08,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-16581287 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-16581287 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-16581287 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-16581287 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-16581287 |ULTIMATE.start_main_#t~ite50_Out-16581287|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-16581287|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-16581287, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-16581287, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-16581287} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-16581287|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-16581287, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-16581287, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-16581287} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:06:08,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In21236130 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In21236130 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out21236130| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out21236130| ~z$r_buff0_thd0~0_In21236130)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In21236130, ~z$w_buff0_used~0=~z$w_buff0_used~0_In21236130} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In21236130, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out21236130|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In21236130} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:06:08,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In876211489 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In876211489 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In876211489 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In876211489 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out876211489| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In876211489 |ULTIMATE.start_main_#t~ite52_Out876211489|) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In876211489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In876211489, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In876211489, ~z$w_buff1_used~0=~z$w_buff1_used~0_In876211489} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out876211489|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In876211489, ~z$w_buff0_used~0=~z$w_buff0_used~0_In876211489, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In876211489, ~z$w_buff1_used~0=~z$w_buff1_used~0_In876211489} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:06:08,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:06:08,268 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_a95c5cea-3741-4a47-b94d-162b9582c0e3/bin/uautomizer/witness.graphml [2019-12-07 18:06:08,269 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:06:08,270 INFO L168 Benchmark]: Toolchain (without parser) took 213704.43 ms. Allocated memory was 1.0 GB in the beginning and 9.3 GB in the end (delta: 8.2 GB). Free memory was 938.1 MB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 4.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:06:08,270 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:06:08,270 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.40 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 84.9 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -113.1 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:06:08,270 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:06:08,270 INFO L168 Benchmark]: Boogie Preprocessor took 26.09 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:06:08,271 INFO L168 Benchmark]: RCFGBuilder took 401.90 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 991.7 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:06:08,271 INFO L168 Benchmark]: TraceAbstraction took 212777.68 ms. Allocated memory was 1.1 GB in the beginning and 9.3 GB in the end (delta: 8.2 GB). Free memory was 991.7 MB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 4.8 GB. Max. memory is 11.5 GB. [2019-12-07 18:06:08,271 INFO L168 Benchmark]: Witness Printer took 63.72 ms. Allocated memory is still 9.3 GB. Free memory was 4.4 GB in the beginning and 4.4 GB in the end (delta: 11.2 MB). Peak memory consumption was 11.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:06:08,273 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.40 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 84.9 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -113.1 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.09 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 401.90 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 991.7 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 212777.68 ms. Allocated memory was 1.1 GB in the beginning and 9.3 GB in the end (delta: 8.2 GB). Free memory was 991.7 MB in the beginning and 4.4 GB in the end (delta: -3.4 GB). Peak memory consumption was 4.8 GB. Max. memory is 11.5 GB. * Witness Printer took 63.72 ms. Allocated memory is still 9.3 GB. Free memory was 4.4 GB in the beginning and 4.4 GB in the end (delta: 11.2 MB). Peak memory consumption was 11.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 7047 VarBasedMoverChecksPositive, 336 VarBasedMoverChecksNegative, 168 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 130103 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t657, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t658, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L829] FCALL, FORK 0 pthread_create(&t659, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 2 [L783] 3 __unbuffered_p2_EAX = y [L786] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L787] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L788] 3 z$flush_delayed = weak$$choice2 [L789] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L766] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L791] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L792] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L793] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L803] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L804] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L835] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L837] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L838] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 212.6s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 45.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8021 SDtfs, 7877 SDslu, 25259 SDs, 0 SdLazy, 12597 SolverSat, 295 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 344 GetRequests, 42 SyntacticMatches, 12 SemanticMatches, 290 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2453 ImplicationChecksByTransitivity, 3.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=371396occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 143.3s AutomataMinimizationTime, 29 MinimizatonAttempts, 696034 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 1095 NumberOfCodeBlocks, 1095 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 1000 ConstructedInterpolants, 0 QuantifiedInterpolants, 336078 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...