./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix025_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix025_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 91f883a5369c1c32c8ea0cc107d1039cd83366bd .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:17:13,403 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:17:13,404 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:17:13,412 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:17:13,412 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:17:13,412 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:17:13,413 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:17:13,415 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:17:13,416 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:17:13,417 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:17:13,417 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:17:13,418 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:17:13,418 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:17:13,419 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:17:13,420 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:17:13,420 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:17:13,421 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:17:13,422 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:17:13,423 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:17:13,424 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:17:13,425 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:17:13,426 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:17:13,427 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:17:13,427 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:17:13,429 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:17:13,429 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:17:13,429 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:17:13,430 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:17:13,430 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:17:13,431 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:17:13,431 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:17:13,431 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:17:13,432 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:17:13,432 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:17:13,433 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:17:13,433 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:17:13,433 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:17:13,433 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:17:13,433 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:17:13,434 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:17:13,434 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:17:13,435 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:17:13,444 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:17:13,444 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:17:13,445 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:17:13,445 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:17:13,445 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:17:13,446 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:17:13,446 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:17:13,446 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:17:13,446 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:17:13,446 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:17:13,446 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:17:13,446 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:17:13,447 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:17:13,447 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:17:13,447 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:17:13,447 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:17:13,447 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:17:13,447 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:17:13,447 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:17:13,448 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:17:13,448 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:17:13,448 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:17:13,448 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:17:13,448 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:17:13,448 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:17:13,448 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:17:13,449 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:17:13,449 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:17:13,449 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:17:13,449 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 91f883a5369c1c32c8ea0cc107d1039cd83366bd [2019-12-07 17:17:13,548 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:17:13,558 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:17:13,560 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:17:13,562 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:17:13,562 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:17:13,563 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix025_pso.oepc.i [2019-12-07 17:17:13,600 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/data/1c556da50/387fe68abf7043fd8b99ab6cea1fcc24/FLAGdccc19eca [2019-12-07 17:17:13,982 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:17:13,983 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/sv-benchmarks/c/pthread-wmm/mix025_pso.oepc.i [2019-12-07 17:17:13,993 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/data/1c556da50/387fe68abf7043fd8b99ab6cea1fcc24/FLAGdccc19eca [2019-12-07 17:17:14,002 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/data/1c556da50/387fe68abf7043fd8b99ab6cea1fcc24 [2019-12-07 17:17:14,004 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:17:14,005 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:17:14,006 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:17:14,006 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:17:14,008 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:17:14,009 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,010 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14, skipping insertion in model container [2019-12-07 17:17:14,011 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,015 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:17:14,046 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:17:14,292 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:17:14,300 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:17:14,344 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:17:14,390 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:17:14,390 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14 WrapperNode [2019-12-07 17:17:14,390 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:17:14,391 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:17:14,391 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:17:14,391 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:17:14,396 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,409 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,427 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:17:14,427 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:17:14,427 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:17:14,427 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:17:14,433 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,434 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,437 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,437 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,444 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,447 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,450 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... [2019-12-07 17:17:14,453 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:17:14,453 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:17:14,453 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:17:14,453 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:17:14,454 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:17:14,493 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:17:14,494 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:17:14,494 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:17:14,494 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:17:14,494 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:17:14,494 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:17:14,494 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:17:14,494 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:17:14,494 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:17:14,494 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:17:14,494 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:17:14,494 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:17:14,495 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:17:14,496 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:17:14,850 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:17:14,850 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:17:14,851 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:14 BoogieIcfgContainer [2019-12-07 17:17:14,851 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:17:14,852 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:17:14,852 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:17:14,854 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:17:14,854 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:17:14" (1/3) ... [2019-12-07 17:17:14,854 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43be6323 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:17:14, skipping insertion in model container [2019-12-07 17:17:14,855 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:17:14" (2/3) ... [2019-12-07 17:17:14,855 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43be6323 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:17:14, skipping insertion in model container [2019-12-07 17:17:14,855 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:14" (3/3) ... [2019-12-07 17:17:14,856 INFO L109 eAbstractionObserver]: Analyzing ICFG mix025_pso.oepc.i [2019-12-07 17:17:14,862 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:17:14,863 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:17:14,867 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:17:14,868 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:17:14,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,893 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,894 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,894 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,894 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,894 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,894 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,894 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,895 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,896 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,897 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,898 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,898 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,898 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,899 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,900 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,901 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,901 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,901 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,901 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,901 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,901 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,902 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,902 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,903 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,904 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,905 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,906 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,907 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,908 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,909 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,910 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,911 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,912 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,913 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:17:14,925 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:17:14,937 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:17:14,937 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:17:14,938 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:17:14,938 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:17:14,938 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:17:14,938 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:17:14,938 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:17:14,938 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:17:14,948 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 17:17:14,950 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 17:17:15,005 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 17:17:15,006 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:17:15,016 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:17:15,031 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 17:17:15,061 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 17:17:15,061 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:17:15,067 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:17:15,082 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 17:17:15,083 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:17:17,938 WARN L192 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 17:17:18,182 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130103 [2019-12-07 17:17:18,183 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 17:17:18,185 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 105 transitions [2019-12-07 17:17:35,541 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 122102 states. [2019-12-07 17:17:35,542 INFO L276 IsEmpty]: Start isEmpty. Operand 122102 states. [2019-12-07 17:17:35,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:17:35,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:17:35,547 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:17:35,547 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:17:35,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:17:35,551 INFO L82 PathProgramCache]: Analyzing trace with hash 913940, now seen corresponding path program 1 times [2019-12-07 17:17:35,556 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:17:35,556 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151963627] [2019-12-07 17:17:35,556 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:17:35,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:17:35,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:17:35,682 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151963627] [2019-12-07 17:17:35,682 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:17:35,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:17:35,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761666856] [2019-12-07 17:17:35,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:17:35,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:17:35,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:17:35,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:17:35,697 INFO L87 Difference]: Start difference. First operand 122102 states. Second operand 3 states. [2019-12-07 17:17:36,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:17:36,545 INFO L93 Difference]: Finished difference Result 121140 states and 517588 transitions. [2019-12-07 17:17:36,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:17:36,547 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:17:36,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:17:36,983 INFO L225 Difference]: With dead ends: 121140 [2019-12-07 17:17:36,983 INFO L226 Difference]: Without dead ends: 107958 [2019-12-07 17:17:36,984 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:17:41,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107958 states. [2019-12-07 17:17:42,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107958 to 107958. [2019-12-07 17:17:42,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107958 states. [2019-12-07 17:17:44,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107958 states to 107958 states and 460128 transitions. [2019-12-07 17:17:44,971 INFO L78 Accepts]: Start accepts. Automaton has 107958 states and 460128 transitions. Word has length 3 [2019-12-07 17:17:44,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:17:44,971 INFO L462 AbstractCegarLoop]: Abstraction has 107958 states and 460128 transitions. [2019-12-07 17:17:44,972 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:17:44,972 INFO L276 IsEmpty]: Start isEmpty. Operand 107958 states and 460128 transitions. [2019-12-07 17:17:44,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:17:44,975 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:17:44,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:17:44,975 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:17:44,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:17:44,975 INFO L82 PathProgramCache]: Analyzing trace with hash 2082409598, now seen corresponding path program 1 times [2019-12-07 17:17:44,975 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:17:44,975 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228469387] [2019-12-07 17:17:44,976 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:17:44,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:17:45,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:17:45,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228469387] [2019-12-07 17:17:45,034 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:17:45,034 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:17:45,034 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773690018] [2019-12-07 17:17:45,035 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:17:45,035 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:17:45,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:17:45,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:17:45,036 INFO L87 Difference]: Start difference. First operand 107958 states and 460128 transitions. Second operand 4 states. [2019-12-07 17:17:45,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:17:45,972 INFO L93 Difference]: Finished difference Result 172022 states and 703369 transitions. [2019-12-07 17:17:45,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:17:45,973 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:17:45,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:17:46,410 INFO L225 Difference]: With dead ends: 172022 [2019-12-07 17:17:46,410 INFO L226 Difference]: Without dead ends: 171924 [2019-12-07 17:17:46,411 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:17:51,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171924 states. [2019-12-07 17:17:54,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171924 to 156115. [2019-12-07 17:17:54,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156115 states. [2019-12-07 17:17:54,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156115 states to 156115 states and 647087 transitions. [2019-12-07 17:17:54,606 INFO L78 Accepts]: Start accepts. Automaton has 156115 states and 647087 transitions. Word has length 11 [2019-12-07 17:17:54,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:17:54,606 INFO L462 AbstractCegarLoop]: Abstraction has 156115 states and 647087 transitions. [2019-12-07 17:17:54,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:17:54,606 INFO L276 IsEmpty]: Start isEmpty. Operand 156115 states and 647087 transitions. [2019-12-07 17:17:54,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:17:54,610 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:17:54,610 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:17:54,610 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:17:54,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:17:54,610 INFO L82 PathProgramCache]: Analyzing trace with hash 594088235, now seen corresponding path program 1 times [2019-12-07 17:17:54,611 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:17:54,611 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446733474] [2019-12-07 17:17:54,611 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:17:54,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:17:54,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:17:54,658 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446733474] [2019-12-07 17:17:54,658 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:17:54,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:17:54,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540187353] [2019-12-07 17:17:54,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:17:54,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:17:54,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:17:54,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:17:54,659 INFO L87 Difference]: Start difference. First operand 156115 states and 647087 transitions. Second operand 4 states. [2019-12-07 17:17:57,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:17:57,429 INFO L93 Difference]: Finished difference Result 219290 states and 888852 transitions. [2019-12-07 17:17:57,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:17:57,430 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:17:57,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:17:57,990 INFO L225 Difference]: With dead ends: 219290 [2019-12-07 17:17:57,990 INFO L226 Difference]: Without dead ends: 219178 [2019-12-07 17:17:57,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:03,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219178 states. [2019-12-07 17:18:06,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219178 to 184451. [2019-12-07 17:18:06,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184451 states. [2019-12-07 17:18:07,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184451 states to 184451 states and 760798 transitions. [2019-12-07 17:18:07,055 INFO L78 Accepts]: Start accepts. Automaton has 184451 states and 760798 transitions. Word has length 13 [2019-12-07 17:18:07,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:07,056 INFO L462 AbstractCegarLoop]: Abstraction has 184451 states and 760798 transitions. [2019-12-07 17:18:07,056 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:07,056 INFO L276 IsEmpty]: Start isEmpty. Operand 184451 states and 760798 transitions. [2019-12-07 17:18:07,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:18:07,063 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:07,063 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:07,064 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:07,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:07,064 INFO L82 PathProgramCache]: Analyzing trace with hash -805978823, now seen corresponding path program 1 times [2019-12-07 17:18:07,064 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:07,064 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691430204] [2019-12-07 17:18:07,064 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:07,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:07,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:07,097 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691430204] [2019-12-07 17:18:07,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:07,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:18:07,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1935694378] [2019-12-07 17:18:07,098 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:07,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:07,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:07,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:07,098 INFO L87 Difference]: Start difference. First operand 184451 states and 760798 transitions. Second operand 3 states. [2019-12-07 17:18:08,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:08,312 INFO L93 Difference]: Finished difference Result 284614 states and 1168466 transitions. [2019-12-07 17:18:08,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:08,313 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 17:18:08,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:11,693 INFO L225 Difference]: With dead ends: 284614 [2019-12-07 17:18:11,694 INFO L226 Difference]: Without dead ends: 284614 [2019-12-07 17:18:11,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:18,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284614 states. [2019-12-07 17:18:21,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284614 to 221232. [2019-12-07 17:18:21,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221232 states. [2019-12-07 17:18:22,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221232 states to 221232 states and 911865 transitions. [2019-12-07 17:18:22,301 INFO L78 Accepts]: Start accepts. Automaton has 221232 states and 911865 transitions. Word has length 16 [2019-12-07 17:18:22,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:22,301 INFO L462 AbstractCegarLoop]: Abstraction has 221232 states and 911865 transitions. [2019-12-07 17:18:22,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:18:22,301 INFO L276 IsEmpty]: Start isEmpty. Operand 221232 states and 911865 transitions. [2019-12-07 17:18:22,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:18:22,309 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:22,309 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:22,309 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:22,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:22,309 INFO L82 PathProgramCache]: Analyzing trace with hash -805853304, now seen corresponding path program 1 times [2019-12-07 17:18:22,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:22,310 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316268467] [2019-12-07 17:18:22,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:22,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:22,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:22,357 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316268467] [2019-12-07 17:18:22,357 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:22,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:22,357 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529695785] [2019-12-07 17:18:22,358 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:18:22,358 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:22,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:18:22,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:18:22,358 INFO L87 Difference]: Start difference. First operand 221232 states and 911865 transitions. Second operand 4 states. [2019-12-07 17:18:23,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:23,632 INFO L93 Difference]: Finished difference Result 262568 states and 1070974 transitions. [2019-12-07 17:18:23,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:18:23,633 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:18:23,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:24,922 INFO L225 Difference]: With dead ends: 262568 [2019-12-07 17:18:24,922 INFO L226 Difference]: Without dead ends: 262568 [2019-12-07 17:18:24,922 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:31,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262568 states. [2019-12-07 17:18:37,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262568 to 233184. [2019-12-07 17:18:37,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233184 states. [2019-12-07 17:18:38,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233184 states to 233184 states and 959818 transitions. [2019-12-07 17:18:38,547 INFO L78 Accepts]: Start accepts. Automaton has 233184 states and 959818 transitions. Word has length 16 [2019-12-07 17:18:38,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:38,548 INFO L462 AbstractCegarLoop]: Abstraction has 233184 states and 959818 transitions. [2019-12-07 17:18:38,548 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:38,548 INFO L276 IsEmpty]: Start isEmpty. Operand 233184 states and 959818 transitions. [2019-12-07 17:18:38,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 17:18:38,554 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:38,554 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:38,554 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:38,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:38,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1222928522, now seen corresponding path program 1 times [2019-12-07 17:18:38,554 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:38,555 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225836189] [2019-12-07 17:18:38,555 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:38,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:38,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:38,592 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225836189] [2019-12-07 17:18:38,592 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:38,592 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:18:38,592 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946157486] [2019-12-07 17:18:38,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:18:38,593 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:38,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:18:38,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:18:38,593 INFO L87 Difference]: Start difference. First operand 233184 states and 959818 transitions. Second operand 4 states. [2019-12-07 17:18:40,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:40,350 INFO L93 Difference]: Finished difference Result 277148 states and 1134062 transitions. [2019-12-07 17:18:40,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:18:40,350 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 17:18:40,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:41,050 INFO L225 Difference]: With dead ends: 277148 [2019-12-07 17:18:41,050 INFO L226 Difference]: Without dead ends: 277148 [2019-12-07 17:18:41,050 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:18:47,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277148 states. [2019-12-07 17:18:53,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277148 to 236057. [2019-12-07 17:18:53,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236057 states. [2019-12-07 17:18:54,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236057 states to 236057 states and 972653 transitions. [2019-12-07 17:18:54,704 INFO L78 Accepts]: Start accepts. Automaton has 236057 states and 972653 transitions. Word has length 16 [2019-12-07 17:18:54,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:18:54,704 INFO L462 AbstractCegarLoop]: Abstraction has 236057 states and 972653 transitions. [2019-12-07 17:18:54,704 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:18:54,704 INFO L276 IsEmpty]: Start isEmpty. Operand 236057 states and 972653 transitions. [2019-12-07 17:18:54,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:18:54,716 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:18:54,716 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:18:54,716 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:18:54,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:18:54,716 INFO L82 PathProgramCache]: Analyzing trace with hash -2141168645, now seen corresponding path program 1 times [2019-12-07 17:18:54,716 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:18:54,716 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356443613] [2019-12-07 17:18:54,716 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:18:54,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:18:54,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:18:54,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356443613] [2019-12-07 17:18:54,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:18:54,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:18:54,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067191011] [2019-12-07 17:18:54,774 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:18:54,774 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:18:54,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:18:54,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:18:54,775 INFO L87 Difference]: Start difference. First operand 236057 states and 972653 transitions. Second operand 3 states. [2019-12-07 17:18:56,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:18:56,994 INFO L93 Difference]: Finished difference Result 419928 states and 1722928 transitions. [2019-12-07 17:18:56,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:18:56,995 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:18:56,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:18:58,570 INFO L225 Difference]: With dead ends: 419928 [2019-12-07 17:18:58,571 INFO L226 Difference]: Without dead ends: 386621 [2019-12-07 17:18:58,571 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:09,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386621 states. [2019-12-07 17:19:14,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386621 to 371396. [2019-12-07 17:19:14,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 371396 states. [2019-12-07 17:19:16,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371396 states to 371396 states and 1535333 transitions. [2019-12-07 17:19:16,482 INFO L78 Accepts]: Start accepts. Automaton has 371396 states and 1535333 transitions. Word has length 18 [2019-12-07 17:19:16,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:16,482 INFO L462 AbstractCegarLoop]: Abstraction has 371396 states and 1535333 transitions. [2019-12-07 17:19:16,482 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:19:16,482 INFO L276 IsEmpty]: Start isEmpty. Operand 371396 states and 1535333 transitions. [2019-12-07 17:19:16,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:19:16,511 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:16,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:16,511 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:16,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:16,511 INFO L82 PathProgramCache]: Analyzing trace with hash -1067747929, now seen corresponding path program 1 times [2019-12-07 17:19:16,512 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:16,512 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929715175] [2019-12-07 17:19:16,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:16,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:16,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:16,534 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1929715175] [2019-12-07 17:19:16,534 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:16,534 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:19:16,534 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [558169233] [2019-12-07 17:19:16,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:19:16,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:16,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:19:16,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:16,535 INFO L87 Difference]: Start difference. First operand 371396 states and 1535333 transitions. Second operand 3 states. [2019-12-07 17:19:16,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:16,753 INFO L93 Difference]: Finished difference Result 67236 states and 219982 transitions. [2019-12-07 17:19:16,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:19:16,753 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:19:16,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:16,860 INFO L225 Difference]: With dead ends: 67236 [2019-12-07 17:19:16,860 INFO L226 Difference]: Without dead ends: 67236 [2019-12-07 17:19:16,860 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:17,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67236 states. [2019-12-07 17:19:18,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67236 to 67116. [2019-12-07 17:19:18,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67116 states. [2019-12-07 17:19:18,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67116 states to 67116 states and 219642 transitions. [2019-12-07 17:19:18,413 INFO L78 Accepts]: Start accepts. Automaton has 67116 states and 219642 transitions. Word has length 19 [2019-12-07 17:19:18,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:18,413 INFO L462 AbstractCegarLoop]: Abstraction has 67116 states and 219642 transitions. [2019-12-07 17:19:18,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:19:18,414 INFO L276 IsEmpty]: Start isEmpty. Operand 67116 states and 219642 transitions. [2019-12-07 17:19:18,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:19:18,424 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:18,424 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:18,424 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:18,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:18,424 INFO L82 PathProgramCache]: Analyzing trace with hash -655013944, now seen corresponding path program 1 times [2019-12-07 17:19:18,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:18,424 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317266644] [2019-12-07 17:19:18,424 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:18,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:18,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:18,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317266644] [2019-12-07 17:19:18,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:18,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:19:18,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423813244] [2019-12-07 17:19:18,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:19:18,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:18,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:19:18,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:19:18,459 INFO L87 Difference]: Start difference. First operand 67116 states and 219642 transitions. Second operand 5 states. [2019-12-07 17:19:18,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:18,984 INFO L93 Difference]: Finished difference Result 88999 states and 284217 transitions. [2019-12-07 17:19:18,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:19:18,985 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:19:18,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:19,119 INFO L225 Difference]: With dead ends: 88999 [2019-12-07 17:19:19,119 INFO L226 Difference]: Without dead ends: 88985 [2019-12-07 17:19:19,119 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:19:19,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88985 states. [2019-12-07 17:19:20,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88985 to 69932. [2019-12-07 17:19:20,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69932 states. [2019-12-07 17:19:20,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69932 states to 69932 states and 228046 transitions. [2019-12-07 17:19:20,939 INFO L78 Accepts]: Start accepts. Automaton has 69932 states and 228046 transitions. Word has length 22 [2019-12-07 17:19:20,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:20,939 INFO L462 AbstractCegarLoop]: Abstraction has 69932 states and 228046 transitions. [2019-12-07 17:19:20,939 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:19:20,939 INFO L276 IsEmpty]: Start isEmpty. Operand 69932 states and 228046 transitions. [2019-12-07 17:19:20,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:19:20,950 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:20,950 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:20,950 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:20,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:20,950 INFO L82 PathProgramCache]: Analyzing trace with hash -2032339914, now seen corresponding path program 1 times [2019-12-07 17:19:20,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:20,950 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558478484] [2019-12-07 17:19:20,950 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:20,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:20,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:20,983 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1558478484] [2019-12-07 17:19:20,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:20,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:19:20,983 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923894909] [2019-12-07 17:19:20,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:19:20,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:20,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:19:20,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:19:20,984 INFO L87 Difference]: Start difference. First operand 69932 states and 228046 transitions. Second operand 5 states. [2019-12-07 17:19:21,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:21,507 INFO L93 Difference]: Finished difference Result 92842 states and 296053 transitions. [2019-12-07 17:19:21,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:19:21,508 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:19:21,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:21,649 INFO L225 Difference]: With dead ends: 92842 [2019-12-07 17:19:21,649 INFO L226 Difference]: Without dead ends: 92828 [2019-12-07 17:19:21,649 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:19:21,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92828 states. [2019-12-07 17:19:22,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92828 to 67604. [2019-12-07 17:19:22,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67604 states. [2019-12-07 17:19:23,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67604 states to 67604 states and 220665 transitions. [2019-12-07 17:19:23,176 INFO L78 Accepts]: Start accepts. Automaton has 67604 states and 220665 transitions. Word has length 22 [2019-12-07 17:19:23,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:23,176 INFO L462 AbstractCegarLoop]: Abstraction has 67604 states and 220665 transitions. [2019-12-07 17:19:23,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:19:23,177 INFO L276 IsEmpty]: Start isEmpty. Operand 67604 states and 220665 transitions. [2019-12-07 17:19:23,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:19:23,193 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:23,193 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:23,194 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:23,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:23,194 INFO L82 PathProgramCache]: Analyzing trace with hash -701847110, now seen corresponding path program 1 times [2019-12-07 17:19:23,194 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:23,194 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048975736] [2019-12-07 17:19:23,194 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:23,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:23,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:23,281 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048975736] [2019-12-07 17:19:23,281 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:23,281 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:19:23,282 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [954913963] [2019-12-07 17:19:23,282 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:19:23,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:23,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:19:23,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:19:23,282 INFO L87 Difference]: Start difference. First operand 67604 states and 220665 transitions. Second operand 6 states. [2019-12-07 17:19:23,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:23,848 INFO L93 Difference]: Finished difference Result 85888 states and 275019 transitions. [2019-12-07 17:19:23,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:19:23,848 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 17:19:23,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:23,978 INFO L225 Difference]: With dead ends: 85888 [2019-12-07 17:19:23,978 INFO L226 Difference]: Without dead ends: 85862 [2019-12-07 17:19:23,978 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:19:24,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85862 states. [2019-12-07 17:19:25,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85862 to 75230. [2019-12-07 17:19:25,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75230 states. [2019-12-07 17:19:25,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75230 states to 75230 states and 244326 transitions. [2019-12-07 17:19:25,329 INFO L78 Accepts]: Start accepts. Automaton has 75230 states and 244326 transitions. Word has length 25 [2019-12-07 17:19:25,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:25,329 INFO L462 AbstractCegarLoop]: Abstraction has 75230 states and 244326 transitions. [2019-12-07 17:19:25,329 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:19:25,329 INFO L276 IsEmpty]: Start isEmpty. Operand 75230 states and 244326 transitions. [2019-12-07 17:19:25,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 17:19:25,350 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:25,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:25,350 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:25,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:25,351 INFO L82 PathProgramCache]: Analyzing trace with hash -1083173402, now seen corresponding path program 1 times [2019-12-07 17:19:25,351 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:25,351 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1123265505] [2019-12-07 17:19:25,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:25,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:25,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:25,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1123265505] [2019-12-07 17:19:25,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:25,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:19:25,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606704350] [2019-12-07 17:19:25,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:19:25,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:25,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:19:25,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:19:25,391 INFO L87 Difference]: Start difference. First operand 75230 states and 244326 transitions. Second operand 5 states. [2019-12-07 17:19:25,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:25,928 INFO L93 Difference]: Finished difference Result 92697 states and 296533 transitions. [2019-12-07 17:19:25,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:19:25,928 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 17:19:25,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:26,066 INFO L225 Difference]: With dead ends: 92697 [2019-12-07 17:19:26,066 INFO L226 Difference]: Without dead ends: 92649 [2019-12-07 17:19:26,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:19:26,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92649 states. [2019-12-07 17:19:27,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92649 to 82791. [2019-12-07 17:19:27,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82791 states. [2019-12-07 17:19:27,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82791 states to 82791 states and 267509 transitions. [2019-12-07 17:19:27,524 INFO L78 Accepts]: Start accepts. Automaton has 82791 states and 267509 transitions. Word has length 26 [2019-12-07 17:19:27,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:27,525 INFO L462 AbstractCegarLoop]: Abstraction has 82791 states and 267509 transitions. [2019-12-07 17:19:27,525 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:19:27,525 INFO L276 IsEmpty]: Start isEmpty. Operand 82791 states and 267509 transitions. [2019-12-07 17:19:27,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:19:27,545 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:27,545 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:27,546 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:27,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:27,546 INFO L82 PathProgramCache]: Analyzing trace with hash 935660349, now seen corresponding path program 1 times [2019-12-07 17:19:27,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:27,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [765417637] [2019-12-07 17:19:27,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:27,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:27,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:27,590 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [765417637] [2019-12-07 17:19:27,590 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:27,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:19:27,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799245638] [2019-12-07 17:19:27,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:19:27,591 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:27,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:19:27,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:19:27,591 INFO L87 Difference]: Start difference. First operand 82791 states and 267509 transitions. Second operand 5 states. [2019-12-07 17:19:28,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:28,334 INFO L93 Difference]: Finished difference Result 112875 states and 360534 transitions. [2019-12-07 17:19:28,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:19:28,334 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 17:19:28,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:28,517 INFO L225 Difference]: With dead ends: 112875 [2019-12-07 17:19:28,517 INFO L226 Difference]: Without dead ends: 112875 [2019-12-07 17:19:28,517 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:19:28,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112875 states. [2019-12-07 17:19:30,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112875 to 100455. [2019-12-07 17:19:30,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100455 states. [2019-12-07 17:19:30,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100455 states to 100455 states and 323490 transitions. [2019-12-07 17:19:30,271 INFO L78 Accepts]: Start accepts. Automaton has 100455 states and 323490 transitions. Word has length 28 [2019-12-07 17:19:30,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:30,272 INFO L462 AbstractCegarLoop]: Abstraction has 100455 states and 323490 transitions. [2019-12-07 17:19:30,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:19:30,272 INFO L276 IsEmpty]: Start isEmpty. Operand 100455 states and 323490 transitions. [2019-12-07 17:19:30,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:19:30,492 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:30,492 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:30,492 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:30,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:30,492 INFO L82 PathProgramCache]: Analyzing trace with hash -799804073, now seen corresponding path program 1 times [2019-12-07 17:19:30,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:30,493 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502250711] [2019-12-07 17:19:30,493 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:30,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:30,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:30,533 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1502250711] [2019-12-07 17:19:30,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:30,534 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:19:30,534 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143669335] [2019-12-07 17:19:30,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:19:30,534 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:30,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:19:30,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:19:30,534 INFO L87 Difference]: Start difference. First operand 100455 states and 323490 transitions. Second operand 5 states. [2019-12-07 17:19:31,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:31,074 INFO L93 Difference]: Finished difference Result 115391 states and 366917 transitions. [2019-12-07 17:19:31,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:19:31,075 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 17:19:31,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:31,263 INFO L225 Difference]: With dead ends: 115391 [2019-12-07 17:19:31,263 INFO L226 Difference]: Without dead ends: 115347 [2019-12-07 17:19:31,264 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:19:31,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115347 states. [2019-12-07 17:19:32,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115347 to 99384. [2019-12-07 17:19:32,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99384 states. [2019-12-07 17:19:33,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99384 states to 99384 states and 320289 transitions. [2019-12-07 17:19:33,296 INFO L78 Accepts]: Start accepts. Automaton has 99384 states and 320289 transitions. Word has length 28 [2019-12-07 17:19:33,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:33,296 INFO L462 AbstractCegarLoop]: Abstraction has 99384 states and 320289 transitions. [2019-12-07 17:19:33,297 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:19:33,297 INFO L276 IsEmpty]: Start isEmpty. Operand 99384 states and 320289 transitions. [2019-12-07 17:19:33,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:19:33,331 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:33,331 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:33,331 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:33,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:33,332 INFO L82 PathProgramCache]: Analyzing trace with hash -377953641, now seen corresponding path program 1 times [2019-12-07 17:19:33,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:33,332 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957239358] [2019-12-07 17:19:33,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:33,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:33,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:33,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957239358] [2019-12-07 17:19:33,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:33,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:19:33,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1478103788] [2019-12-07 17:19:33,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:19:33,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:33,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:19:33,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:19:33,389 INFO L87 Difference]: Start difference. First operand 99384 states and 320289 transitions. Second operand 4 states. [2019-12-07 17:19:33,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:33,687 INFO L93 Difference]: Finished difference Result 100392 states and 322470 transitions. [2019-12-07 17:19:33,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:19:33,687 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 17:19:33,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:33,847 INFO L225 Difference]: With dead ends: 100392 [2019-12-07 17:19:33,847 INFO L226 Difference]: Without dead ends: 100392 [2019-12-07 17:19:33,847 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:19:34,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100392 states. [2019-12-07 17:19:35,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100392 to 98150. [2019-12-07 17:19:35,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98150 states. [2019-12-07 17:19:35,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98150 states to 98150 states and 316608 transitions. [2019-12-07 17:19:35,662 INFO L78 Accepts]: Start accepts. Automaton has 98150 states and 316608 transitions. Word has length 29 [2019-12-07 17:19:35,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:35,662 INFO L462 AbstractCegarLoop]: Abstraction has 98150 states and 316608 transitions. [2019-12-07 17:19:35,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:19:35,662 INFO L276 IsEmpty]: Start isEmpty. Operand 98150 states and 316608 transitions. [2019-12-07 17:19:35,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:19:35,698 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:35,698 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:35,698 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:35,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:35,698 INFO L82 PathProgramCache]: Analyzing trace with hash -1469523336, now seen corresponding path program 1 times [2019-12-07 17:19:35,698 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:35,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959676325] [2019-12-07 17:19:35,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:35,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:35,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:35,727 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959676325] [2019-12-07 17:19:35,727 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:35,727 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:19:35,727 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132036958] [2019-12-07 17:19:35,727 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:19:35,728 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:35,728 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:19:35,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:19:35,728 INFO L87 Difference]: Start difference. First operand 98150 states and 316608 transitions. Second operand 4 states. [2019-12-07 17:19:35,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:35,846 INFO L93 Difference]: Finished difference Result 41561 states and 126855 transitions. [2019-12-07 17:19:35,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:19:35,847 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 17:19:35,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:35,894 INFO L225 Difference]: With dead ends: 41561 [2019-12-07 17:19:35,894 INFO L226 Difference]: Without dead ends: 41561 [2019-12-07 17:19:35,895 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:19:36,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41561 states. [2019-12-07 17:19:36,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41561 to 38011. [2019-12-07 17:19:36,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38011 states. [2019-12-07 17:19:36,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38011 states to 38011 states and 116193 transitions. [2019-12-07 17:19:36,464 INFO L78 Accepts]: Start accepts. Automaton has 38011 states and 116193 transitions. Word has length 30 [2019-12-07 17:19:36,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:36,464 INFO L462 AbstractCegarLoop]: Abstraction has 38011 states and 116193 transitions. [2019-12-07 17:19:36,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:19:36,465 INFO L276 IsEmpty]: Start isEmpty. Operand 38011 states and 116193 transitions. [2019-12-07 17:19:36,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 17:19:36,493 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:36,493 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:36,493 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:36,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:36,494 INFO L82 PathProgramCache]: Analyzing trace with hash -145847770, now seen corresponding path program 1 times [2019-12-07 17:19:36,494 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:36,494 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [18534172] [2019-12-07 17:19:36,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:36,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:36,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:36,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [18534172] [2019-12-07 17:19:36,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:36,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:19:36,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1033118943] [2019-12-07 17:19:36,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:19:36,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:36,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:19:36,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:19:36,539 INFO L87 Difference]: Start difference. First operand 38011 states and 116193 transitions. Second operand 6 states. [2019-12-07 17:19:37,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:37,009 INFO L93 Difference]: Finished difference Result 48391 states and 145259 transitions. [2019-12-07 17:19:37,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:19:37,009 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 17:19:37,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:37,064 INFO L225 Difference]: With dead ends: 48391 [2019-12-07 17:19:37,064 INFO L226 Difference]: Without dead ends: 48391 [2019-12-07 17:19:37,064 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:19:37,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48391 states. [2019-12-07 17:19:37,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48391 to 39788. [2019-12-07 17:19:37,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39788 states. [2019-12-07 17:19:37,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39788 states to 39788 states and 121329 transitions. [2019-12-07 17:19:37,717 INFO L78 Accepts]: Start accepts. Automaton has 39788 states and 121329 transitions. Word has length 32 [2019-12-07 17:19:37,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:37,717 INFO L462 AbstractCegarLoop]: Abstraction has 39788 states and 121329 transitions. [2019-12-07 17:19:37,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:19:37,717 INFO L276 IsEmpty]: Start isEmpty. Operand 39788 states and 121329 transitions. [2019-12-07 17:19:37,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 17:19:37,829 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:37,829 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:37,829 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:37,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:37,829 INFO L82 PathProgramCache]: Analyzing trace with hash -1380765993, now seen corresponding path program 1 times [2019-12-07 17:19:37,830 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:37,830 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062821940] [2019-12-07 17:19:37,830 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:37,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:37,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:37,887 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062821940] [2019-12-07 17:19:37,887 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:37,887 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:19:37,887 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473696497] [2019-12-07 17:19:37,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:19:37,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:37,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:19:37,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:19:37,888 INFO L87 Difference]: Start difference. First operand 39788 states and 121329 transitions. Second operand 6 states. [2019-12-07 17:19:38,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:38,351 INFO L93 Difference]: Finished difference Result 47323 states and 141903 transitions. [2019-12-07 17:19:38,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:19:38,351 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 17:19:38,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:38,407 INFO L225 Difference]: With dead ends: 47323 [2019-12-07 17:19:38,407 INFO L226 Difference]: Without dead ends: 47323 [2019-12-07 17:19:38,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:19:38,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47323 states. [2019-12-07 17:19:38,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47323 to 36421. [2019-12-07 17:19:38,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36421 states. [2019-12-07 17:19:39,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36421 states to 36421 states and 111374 transitions. [2019-12-07 17:19:39,014 INFO L78 Accepts]: Start accepts. Automaton has 36421 states and 111374 transitions. Word has length 34 [2019-12-07 17:19:39,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:39,014 INFO L462 AbstractCegarLoop]: Abstraction has 36421 states and 111374 transitions. [2019-12-07 17:19:39,014 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:19:39,014 INFO L276 IsEmpty]: Start isEmpty. Operand 36421 states and 111374 transitions. [2019-12-07 17:19:39,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:19:39,047 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:39,048 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:39,048 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:39,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:39,048 INFO L82 PathProgramCache]: Analyzing trace with hash -950700709, now seen corresponding path program 1 times [2019-12-07 17:19:39,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:39,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254577785] [2019-12-07 17:19:39,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:39,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:39,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:39,106 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254577785] [2019-12-07 17:19:39,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:39,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:19:39,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038835628] [2019-12-07 17:19:39,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:19:39,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:39,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:19:39,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:19:39,107 INFO L87 Difference]: Start difference. First operand 36421 states and 111374 transitions. Second operand 6 states. [2019-12-07 17:19:39,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:39,850 INFO L93 Difference]: Finished difference Result 46360 states and 139393 transitions. [2019-12-07 17:19:39,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:19:39,850 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 17:19:39,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:39,905 INFO L225 Difference]: With dead ends: 46360 [2019-12-07 17:19:39,905 INFO L226 Difference]: Without dead ends: 46360 [2019-12-07 17:19:39,905 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:19:40,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46360 states. [2019-12-07 17:19:40,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46360 to 38411. [2019-12-07 17:19:40,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38411 states. [2019-12-07 17:19:40,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38411 states to 38411 states and 117323 transitions. [2019-12-07 17:19:40,640 INFO L78 Accepts]: Start accepts. Automaton has 38411 states and 117323 transitions. Word has length 40 [2019-12-07 17:19:40,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:40,640 INFO L462 AbstractCegarLoop]: Abstraction has 38411 states and 117323 transitions. [2019-12-07 17:19:40,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:19:40,640 INFO L276 IsEmpty]: Start isEmpty. Operand 38411 states and 117323 transitions. [2019-12-07 17:19:40,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:19:40,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:40,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:40,671 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:40,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:40,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1539124191, now seen corresponding path program 2 times [2019-12-07 17:19:40,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:40,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538673882] [2019-12-07 17:19:40,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:40,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:40,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:40,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538673882] [2019-12-07 17:19:40,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:40,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:19:40,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1726155037] [2019-12-07 17:19:40,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:19:40,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:40,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:19:40,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:19:40,738 INFO L87 Difference]: Start difference. First operand 38411 states and 117323 transitions. Second operand 6 states. [2019-12-07 17:19:41,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:41,365 INFO L93 Difference]: Finished difference Result 65014 states and 199137 transitions. [2019-12-07 17:19:41,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:19:41,366 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 17:19:41,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:41,450 INFO L225 Difference]: With dead ends: 65014 [2019-12-07 17:19:41,450 INFO L226 Difference]: Without dead ends: 65014 [2019-12-07 17:19:41,450 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:19:41,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65014 states. [2019-12-07 17:19:42,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65014 to 45251. [2019-12-07 17:19:42,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45251 states. [2019-12-07 17:19:42,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45251 states to 45251 states and 139110 transitions. [2019-12-07 17:19:42,240 INFO L78 Accepts]: Start accepts. Automaton has 45251 states and 139110 transitions. Word has length 40 [2019-12-07 17:19:42,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:42,240 INFO L462 AbstractCegarLoop]: Abstraction has 45251 states and 139110 transitions. [2019-12-07 17:19:42,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:19:42,240 INFO L276 IsEmpty]: Start isEmpty. Operand 45251 states and 139110 transitions. [2019-12-07 17:19:42,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:19:42,281 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:42,281 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:42,281 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:42,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:42,281 INFO L82 PathProgramCache]: Analyzing trace with hash 1284723393, now seen corresponding path program 3 times [2019-12-07 17:19:42,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:42,281 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000313002] [2019-12-07 17:19:42,281 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:42,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:42,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:42,338 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000313002] [2019-12-07 17:19:42,338 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:42,338 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:19:42,338 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151638854] [2019-12-07 17:19:42,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:19:42,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:42,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:19:42,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:19:42,338 INFO L87 Difference]: Start difference. First operand 45251 states and 139110 transitions. Second operand 7 states. [2019-12-07 17:19:43,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:43,474 INFO L93 Difference]: Finished difference Result 70270 states and 214124 transitions. [2019-12-07 17:19:43,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:19:43,475 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2019-12-07 17:19:43,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:43,575 INFO L225 Difference]: With dead ends: 70270 [2019-12-07 17:19:43,575 INFO L226 Difference]: Without dead ends: 70270 [2019-12-07 17:19:43,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:19:43,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70270 states. [2019-12-07 17:19:44,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70270 to 45596. [2019-12-07 17:19:44,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45596 states. [2019-12-07 17:19:44,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45596 states to 45596 states and 140086 transitions. [2019-12-07 17:19:44,466 INFO L78 Accepts]: Start accepts. Automaton has 45596 states and 140086 transitions. Word has length 40 [2019-12-07 17:19:44,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:44,466 INFO L462 AbstractCegarLoop]: Abstraction has 45596 states and 140086 transitions. [2019-12-07 17:19:44,466 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:19:44,466 INFO L276 IsEmpty]: Start isEmpty. Operand 45596 states and 140086 transitions. [2019-12-07 17:19:44,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:19:44,508 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:44,508 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:44,508 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:44,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:44,508 INFO L82 PathProgramCache]: Analyzing trace with hash 1274395705, now seen corresponding path program 1 times [2019-12-07 17:19:44,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:44,508 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101558490] [2019-12-07 17:19:44,509 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:44,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:44,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:44,544 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [101558490] [2019-12-07 17:19:44,544 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:44,544 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:19:44,544 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2006564354] [2019-12-07 17:19:44,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:19:44,544 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:44,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:19:44,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:19:44,545 INFO L87 Difference]: Start difference. First operand 45596 states and 140086 transitions. Second operand 5 states. [2019-12-07 17:19:44,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:44,669 INFO L93 Difference]: Finished difference Result 43274 states and 134686 transitions. [2019-12-07 17:19:44,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:19:44,670 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 17:19:44,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:44,729 INFO L225 Difference]: With dead ends: 43274 [2019-12-07 17:19:44,729 INFO L226 Difference]: Without dead ends: 42903 [2019-12-07 17:19:44,729 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:19:44,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42903 states. [2019-12-07 17:19:45,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42903 to 26704. [2019-12-07 17:19:45,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26704 states. [2019-12-07 17:19:45,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26704 states to 26704 states and 83027 transitions. [2019-12-07 17:19:45,243 INFO L78 Accepts]: Start accepts. Automaton has 26704 states and 83027 transitions. Word has length 41 [2019-12-07 17:19:45,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:45,243 INFO L462 AbstractCegarLoop]: Abstraction has 26704 states and 83027 transitions. [2019-12-07 17:19:45,243 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:19:45,244 INFO L276 IsEmpty]: Start isEmpty. Operand 26704 states and 83027 transitions. [2019-12-07 17:19:45,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 17:19:45,270 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:45,270 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:45,270 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:45,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:45,271 INFO L82 PathProgramCache]: Analyzing trace with hash 20161267, now seen corresponding path program 1 times [2019-12-07 17:19:45,271 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:45,271 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174378628] [2019-12-07 17:19:45,271 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:45,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:45,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:45,322 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1174378628] [2019-12-07 17:19:45,322 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:45,322 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:19:45,323 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978964431] [2019-12-07 17:19:45,323 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:19:45,323 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:45,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:19:45,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:19:45,323 INFO L87 Difference]: Start difference. First operand 26704 states and 83027 transitions. Second operand 6 states. [2019-12-07 17:19:45,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:45,843 INFO L93 Difference]: Finished difference Result 36430 states and 111461 transitions. [2019-12-07 17:19:45,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:19:45,844 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 63 [2019-12-07 17:19:45,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:45,887 INFO L225 Difference]: With dead ends: 36430 [2019-12-07 17:19:45,887 INFO L226 Difference]: Without dead ends: 36430 [2019-12-07 17:19:45,887 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:19:46,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36430 states. [2019-12-07 17:19:46,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36430 to 28577. [2019-12-07 17:19:46,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28577 states. [2019-12-07 17:19:46,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28577 states to 28577 states and 88599 transitions. [2019-12-07 17:19:46,364 INFO L78 Accepts]: Start accepts. Automaton has 28577 states and 88599 transitions. Word has length 63 [2019-12-07 17:19:46,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:46,364 INFO L462 AbstractCegarLoop]: Abstraction has 28577 states and 88599 transitions. [2019-12-07 17:19:46,364 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:19:46,364 INFO L276 IsEmpty]: Start isEmpty. Operand 28577 states and 88599 transitions. [2019-12-07 17:19:46,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 17:19:46,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:46,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:46,393 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:46,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:46,393 INFO L82 PathProgramCache]: Analyzing trace with hash -1743041897, now seen corresponding path program 2 times [2019-12-07 17:19:46,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:46,393 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1885189118] [2019-12-07 17:19:46,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:46,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:46,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:46,429 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1885189118] [2019-12-07 17:19:46,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:46,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:19:46,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1458485256] [2019-12-07 17:19:46,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:19:46,430 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:46,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:19:46,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:46,430 INFO L87 Difference]: Start difference. First operand 28577 states and 88599 transitions. Second operand 3 states. [2019-12-07 17:19:46,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:46,544 INFO L93 Difference]: Finished difference Result 35949 states and 110770 transitions. [2019-12-07 17:19:46,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:19:46,544 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 63 [2019-12-07 17:19:46,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:46,589 INFO L225 Difference]: With dead ends: 35949 [2019-12-07 17:19:46,589 INFO L226 Difference]: Without dead ends: 35949 [2019-12-07 17:19:46,589 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:46,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35949 states. [2019-12-07 17:19:47,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35949 to 29932. [2019-12-07 17:19:47,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29932 states. [2019-12-07 17:19:47,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29932 states to 29932 states and 92998 transitions. [2019-12-07 17:19:47,107 INFO L78 Accepts]: Start accepts. Automaton has 29932 states and 92998 transitions. Word has length 63 [2019-12-07 17:19:47,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:47,107 INFO L462 AbstractCegarLoop]: Abstraction has 29932 states and 92998 transitions. [2019-12-07 17:19:47,107 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:19:47,107 INFO L276 IsEmpty]: Start isEmpty. Operand 29932 states and 92998 transitions. [2019-12-07 17:19:47,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 17:19:47,136 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:47,136 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:47,136 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:47,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:47,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1516969687, now seen corresponding path program 1 times [2019-12-07 17:19:47,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:47,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784699088] [2019-12-07 17:19:47,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:47,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:47,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:47,213 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784699088] [2019-12-07 17:19:47,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:47,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:19:47,213 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776979297] [2019-12-07 17:19:47,213 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:19:47,213 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:47,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:19:47,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:19:47,214 INFO L87 Difference]: Start difference. First operand 29932 states and 92998 transitions. Second operand 9 states. [2019-12-07 17:19:48,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:48,640 INFO L93 Difference]: Finished difference Result 41655 states and 126730 transitions. [2019-12-07 17:19:48,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 17:19:48,641 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 64 [2019-12-07 17:19:48,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:48,689 INFO L225 Difference]: With dead ends: 41655 [2019-12-07 17:19:48,689 INFO L226 Difference]: Without dead ends: 41655 [2019-12-07 17:19:48,690 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=987, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 17:19:48,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41655 states. [2019-12-07 17:19:49,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41655 to 29453. [2019-12-07 17:19:49,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29453 states. [2019-12-07 17:19:49,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29453 states to 29453 states and 91351 transitions. [2019-12-07 17:19:49,207 INFO L78 Accepts]: Start accepts. Automaton has 29453 states and 91351 transitions. Word has length 64 [2019-12-07 17:19:49,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:49,207 INFO L462 AbstractCegarLoop]: Abstraction has 29453 states and 91351 transitions. [2019-12-07 17:19:49,207 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:19:49,207 INFO L276 IsEmpty]: Start isEmpty. Operand 29453 states and 91351 transitions. [2019-12-07 17:19:49,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 17:19:49,237 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:49,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:49,237 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:49,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:49,237 INFO L82 PathProgramCache]: Analyzing trace with hash 1056711475, now seen corresponding path program 2 times [2019-12-07 17:19:49,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:49,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262309165] [2019-12-07 17:19:49,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:49,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:49,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:49,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262309165] [2019-12-07 17:19:49,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:49,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:19:49,294 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [763128214] [2019-12-07 17:19:49,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:19:49,294 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:49,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:19:49,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:19:49,294 INFO L87 Difference]: Start difference. First operand 29453 states and 91351 transitions. Second operand 7 states. [2019-12-07 17:19:49,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:49,692 INFO L93 Difference]: Finished difference Result 85812 states and 263760 transitions. [2019-12-07 17:19:49,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:19:49,692 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 17:19:49,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:49,774 INFO L225 Difference]: With dead ends: 85812 [2019-12-07 17:19:49,774 INFO L226 Difference]: Without dead ends: 63008 [2019-12-07 17:19:49,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:19:49,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63008 states. [2019-12-07 17:19:50,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63008 to 34174. [2019-12-07 17:19:50,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34174 states. [2019-12-07 17:19:50,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34174 states to 34174 states and 105491 transitions. [2019-12-07 17:19:50,523 INFO L78 Accepts]: Start accepts. Automaton has 34174 states and 105491 transitions. Word has length 64 [2019-12-07 17:19:50,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:50,523 INFO L462 AbstractCegarLoop]: Abstraction has 34174 states and 105491 transitions. [2019-12-07 17:19:50,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:19:50,523 INFO L276 IsEmpty]: Start isEmpty. Operand 34174 states and 105491 transitions. [2019-12-07 17:19:50,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 17:19:50,556 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:50,556 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:50,557 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:50,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:50,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1694378579, now seen corresponding path program 3 times [2019-12-07 17:19:50,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:50,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828405596] [2019-12-07 17:19:50,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:50,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:50,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:50,706 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1828405596] [2019-12-07 17:19:50,706 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:50,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:19:50,707 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171598724] [2019-12-07 17:19:50,707 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:19:50,707 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:50,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:19:50,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:19:50,708 INFO L87 Difference]: Start difference. First operand 34174 states and 105491 transitions. Second operand 10 states. [2019-12-07 17:19:51,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:51,827 INFO L93 Difference]: Finished difference Result 59233 states and 182441 transitions. [2019-12-07 17:19:51,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 17:19:51,828 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 64 [2019-12-07 17:19:51,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:51,907 INFO L225 Difference]: With dead ends: 59233 [2019-12-07 17:19:51,907 INFO L226 Difference]: Without dead ends: 59233 [2019-12-07 17:19:51,907 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=394, Unknown=0, NotChecked=0, Total=506 [2019-12-07 17:19:52,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59233 states. [2019-12-07 17:19:52,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59233 to 37186. [2019-12-07 17:19:52,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37186 states. [2019-12-07 17:19:52,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37186 states to 37186 states and 115220 transitions. [2019-12-07 17:19:52,611 INFO L78 Accepts]: Start accepts. Automaton has 37186 states and 115220 transitions. Word has length 64 [2019-12-07 17:19:52,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:52,611 INFO L462 AbstractCegarLoop]: Abstraction has 37186 states and 115220 transitions. [2019-12-07 17:19:52,611 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:19:52,611 INFO L276 IsEmpty]: Start isEmpty. Operand 37186 states and 115220 transitions. [2019-12-07 17:19:52,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 17:19:52,647 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:52,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:52,648 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:52,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:52,648 INFO L82 PathProgramCache]: Analyzing trace with hash 1796426447, now seen corresponding path program 4 times [2019-12-07 17:19:52,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:52,649 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438066151] [2019-12-07 17:19:52,649 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:52,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:52,701 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:52,701 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1438066151] [2019-12-07 17:19:52,701 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:52,702 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:19:52,702 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693769419] [2019-12-07 17:19:52,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:19:52,702 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:52,702 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:19:52,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:19:52,702 INFO L87 Difference]: Start difference. First operand 37186 states and 115220 transitions. Second operand 7 states. [2019-12-07 17:19:53,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:53,140 INFO L93 Difference]: Finished difference Result 94906 states and 289673 transitions. [2019-12-07 17:19:53,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:19:53,140 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 17:19:53,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:53,229 INFO L225 Difference]: With dead ends: 94906 [2019-12-07 17:19:53,230 INFO L226 Difference]: Without dead ends: 68126 [2019-12-07 17:19:53,230 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:19:53,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68126 states. [2019-12-07 17:19:54,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68126 to 40796. [2019-12-07 17:19:54,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40796 states. [2019-12-07 17:19:54,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40796 states to 40796 states and 125375 transitions. [2019-12-07 17:19:54,090 INFO L78 Accepts]: Start accepts. Automaton has 40796 states and 125375 transitions. Word has length 64 [2019-12-07 17:19:54,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:54,090 INFO L462 AbstractCegarLoop]: Abstraction has 40796 states and 125375 transitions. [2019-12-07 17:19:54,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:19:54,090 INFO L276 IsEmpty]: Start isEmpty. Operand 40796 states and 125375 transitions. [2019-12-07 17:19:54,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 17:19:54,130 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:54,130 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:54,130 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:54,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:54,130 INFO L82 PathProgramCache]: Analyzing trace with hash 1753738833, now seen corresponding path program 5 times [2019-12-07 17:19:54,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:54,131 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186952192] [2019-12-07 17:19:54,131 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:54,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:54,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:54,200 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186952192] [2019-12-07 17:19:54,200 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:54,200 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:19:54,201 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862819756] [2019-12-07 17:19:54,201 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:19:54,201 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:54,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:19:54,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:19:54,201 INFO L87 Difference]: Start difference. First operand 40796 states and 125375 transitions. Second operand 7 states. [2019-12-07 17:19:54,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:54,920 INFO L93 Difference]: Finished difference Result 151339 states and 463590 transitions. [2019-12-07 17:19:54,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:19:54,920 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 17:19:54,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:55,126 INFO L225 Difference]: With dead ends: 151339 [2019-12-07 17:19:55,126 INFO L226 Difference]: Without dead ends: 134307 [2019-12-07 17:19:55,127 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2019-12-07 17:19:55,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134307 states. [2019-12-07 17:19:56,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134307 to 41898. [2019-12-07 17:19:56,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41898 states. [2019-12-07 17:19:56,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41898 states to 41898 states and 129079 transitions. [2019-12-07 17:19:56,340 INFO L78 Accepts]: Start accepts. Automaton has 41898 states and 129079 transitions. Word has length 64 [2019-12-07 17:19:56,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:56,340 INFO L462 AbstractCegarLoop]: Abstraction has 41898 states and 129079 transitions. [2019-12-07 17:19:56,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:19:56,340 INFO L276 IsEmpty]: Start isEmpty. Operand 41898 states and 129079 transitions. [2019-12-07 17:19:56,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 17:19:56,381 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:56,381 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:56,381 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:56,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:56,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1820548391, now seen corresponding path program 6 times [2019-12-07 17:19:56,381 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:56,381 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [349443909] [2019-12-07 17:19:56,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:56,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:56,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:56,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [349443909] [2019-12-07 17:19:56,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:56,425 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:19:56,425 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2035910641] [2019-12-07 17:19:56,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:19:56,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:56,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:19:56,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:56,426 INFO L87 Difference]: Start difference. First operand 41898 states and 129079 transitions. Second operand 3 states. [2019-12-07 17:19:56,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:56,538 INFO L93 Difference]: Finished difference Result 41897 states and 129077 transitions. [2019-12-07 17:19:56,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:19:56,539 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 17:19:56,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:56,591 INFO L225 Difference]: With dead ends: 41897 [2019-12-07 17:19:56,591 INFO L226 Difference]: Without dead ends: 41897 [2019-12-07 17:19:56,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:56,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41897 states. [2019-12-07 17:19:57,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41897 to 32651. [2019-12-07 17:19:57,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32651 states. [2019-12-07 17:19:57,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32651 states to 32651 states and 102251 transitions. [2019-12-07 17:19:57,226 INFO L78 Accepts]: Start accepts. Automaton has 32651 states and 102251 transitions. Word has length 64 [2019-12-07 17:19:57,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:57,226 INFO L462 AbstractCegarLoop]: Abstraction has 32651 states and 102251 transitions. [2019-12-07 17:19:57,226 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:19:57,226 INFO L276 IsEmpty]: Start isEmpty. Operand 32651 states and 102251 transitions. [2019-12-07 17:19:57,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:19:57,258 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:57,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:57,259 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:57,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:57,259 INFO L82 PathProgramCache]: Analyzing trace with hash 78921339, now seen corresponding path program 1 times [2019-12-07 17:19:57,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:57,259 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268813613] [2019-12-07 17:19:57,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:57,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:57,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:57,297 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [268813613] [2019-12-07 17:19:57,297 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:57,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:19:57,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763128454] [2019-12-07 17:19:57,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:19:57,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:57,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:19:57,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:57,297 INFO L87 Difference]: Start difference. First operand 32651 states and 102251 transitions. Second operand 3 states. [2019-12-07 17:19:57,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:57,361 INFO L93 Difference]: Finished difference Result 23639 states and 73013 transitions. [2019-12-07 17:19:57,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:19:57,361 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:19:57,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:57,387 INFO L225 Difference]: With dead ends: 23639 [2019-12-07 17:19:57,387 INFO L226 Difference]: Without dead ends: 23639 [2019-12-07 17:19:57,387 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:19:57,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23639 states. [2019-12-07 17:19:57,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23639 to 21780. [2019-12-07 17:19:57,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21780 states. [2019-12-07 17:19:57,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21780 states to 21780 states and 67242 transitions. [2019-12-07 17:19:57,703 INFO L78 Accepts]: Start accepts. Automaton has 21780 states and 67242 transitions. Word has length 65 [2019-12-07 17:19:57,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:57,703 INFO L462 AbstractCegarLoop]: Abstraction has 21780 states and 67242 transitions. [2019-12-07 17:19:57,703 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:19:57,703 INFO L276 IsEmpty]: Start isEmpty. Operand 21780 states and 67242 transitions. [2019-12-07 17:19:57,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:19:57,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:57,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:57,723 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:57,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:57,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1524862519, now seen corresponding path program 1 times [2019-12-07 17:19:57,723 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:57,723 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2107812172] [2019-12-07 17:19:57,723 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:57,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:57,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:57,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2107812172] [2019-12-07 17:19:57,832 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:57,832 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:19:57,832 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [358809557] [2019-12-07 17:19:57,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:19:57,832 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:57,832 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:19:57,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:19:57,833 INFO L87 Difference]: Start difference. First operand 21780 states and 67242 transitions. Second operand 11 states. [2019-12-07 17:19:58,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:19:58,593 INFO L93 Difference]: Finished difference Result 47427 states and 146714 transitions. [2019-12-07 17:19:58,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 17:19:58,594 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 17:19:58,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:19:58,648 INFO L225 Difference]: With dead ends: 47427 [2019-12-07 17:19:58,648 INFO L226 Difference]: Without dead ends: 44909 [2019-12-07 17:19:58,648 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=190, Invalid=802, Unknown=0, NotChecked=0, Total=992 [2019-12-07 17:19:58,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44909 states. [2019-12-07 17:19:59,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44909 to 26577. [2019-12-07 17:19:59,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26577 states. [2019-12-07 17:19:59,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26577 states to 26577 states and 81939 transitions. [2019-12-07 17:19:59,181 INFO L78 Accepts]: Start accepts. Automaton has 26577 states and 81939 transitions. Word has length 66 [2019-12-07 17:19:59,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:19:59,181 INFO L462 AbstractCegarLoop]: Abstraction has 26577 states and 81939 transitions. [2019-12-07 17:19:59,181 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:19:59,181 INFO L276 IsEmpty]: Start isEmpty. Operand 26577 states and 81939 transitions. [2019-12-07 17:19:59,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:19:59,208 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:19:59,208 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:19:59,209 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:19:59,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:19:59,209 INFO L82 PathProgramCache]: Analyzing trace with hash -1239159877, now seen corresponding path program 2 times [2019-12-07 17:19:59,209 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:19:59,209 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347672537] [2019-12-07 17:19:59,209 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:19:59,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:19:59,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:19:59,334 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347672537] [2019-12-07 17:19:59,334 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:19:59,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:19:59,335 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593701456] [2019-12-07 17:19:59,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:19:59,335 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:19:59,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:19:59,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:19:59,335 INFO L87 Difference]: Start difference. First operand 26577 states and 81939 transitions. Second operand 11 states. [2019-12-07 17:20:00,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:20:00,559 INFO L93 Difference]: Finished difference Result 73850 states and 227170 transitions. [2019-12-07 17:20:00,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 17:20:00,559 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 17:20:00,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:20:00,634 INFO L225 Difference]: With dead ends: 73850 [2019-12-07 17:20:00,634 INFO L226 Difference]: Without dead ends: 56265 [2019-12-07 17:20:00,635 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 561 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=389, Invalid=1591, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 17:20:00,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56265 states. [2019-12-07 17:20:01,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56265 to 21625. [2019-12-07 17:20:01,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21625 states. [2019-12-07 17:20:01,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21625 states to 21625 states and 66175 transitions. [2019-12-07 17:20:01,176 INFO L78 Accepts]: Start accepts. Automaton has 21625 states and 66175 transitions. Word has length 66 [2019-12-07 17:20:01,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:20:01,176 INFO L462 AbstractCegarLoop]: Abstraction has 21625 states and 66175 transitions. [2019-12-07 17:20:01,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:20:01,176 INFO L276 IsEmpty]: Start isEmpty. Operand 21625 states and 66175 transitions. [2019-12-07 17:20:01,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:20:01,195 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:20:01,195 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:20:01,195 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:20:01,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:20:01,195 INFO L82 PathProgramCache]: Analyzing trace with hash -952881413, now seen corresponding path program 3 times [2019-12-07 17:20:01,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:20:01,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570486867] [2019-12-07 17:20:01,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:20:01,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:20:01,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:20:01,330 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570486867] [2019-12-07 17:20:01,330 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:20:01,330 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 17:20:01,330 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012003870] [2019-12-07 17:20:01,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 17:20:01,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:20:01,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 17:20:01,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:20:01,331 INFO L87 Difference]: Start difference. First operand 21625 states and 66175 transitions. Second operand 12 states. [2019-12-07 17:20:02,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:20:02,570 INFO L93 Difference]: Finished difference Result 57225 states and 175163 transitions. [2019-12-07 17:20:02,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 17:20:02,570 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 17:20:02,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:20:02,645 INFO L225 Difference]: With dead ends: 57225 [2019-12-07 17:20:02,645 INFO L226 Difference]: Without dead ends: 55429 [2019-12-07 17:20:02,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 491 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=330, Invalid=1562, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 17:20:02,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55429 states. [2019-12-07 17:20:03,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55429 to 20957. [2019-12-07 17:20:03,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20957 states. [2019-12-07 17:20:03,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20957 states to 20957 states and 64336 transitions. [2019-12-07 17:20:03,173 INFO L78 Accepts]: Start accepts. Automaton has 20957 states and 64336 transitions. Word has length 66 [2019-12-07 17:20:03,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:20:03,174 INFO L462 AbstractCegarLoop]: Abstraction has 20957 states and 64336 transitions. [2019-12-07 17:20:03,174 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 17:20:03,174 INFO L276 IsEmpty]: Start isEmpty. Operand 20957 states and 64336 transitions. [2019-12-07 17:20:03,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:20:03,193 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:20:03,193 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:20:03,193 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:20:03,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:20:03,193 INFO L82 PathProgramCache]: Analyzing trace with hash 620198601, now seen corresponding path program 4 times [2019-12-07 17:20:03,193 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:20:03,193 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861468101] [2019-12-07 17:20:03,193 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:20:03,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:20:03,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:20:03,272 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:20:03,272 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:20:03,274 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t663~0.base_22| 4)) (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t663~0.base_22|)) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= v_~z$w_buff1_used~0_500 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t663~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t663~0.base_22|) |v_ULTIMATE.start_main_~#t663~0.offset_16| 0)) |v_#memory_int_19|) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t663~0.base_22|) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= |v_ULTIMATE.start_main_~#t663~0.offset_16| 0) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd3~0_379) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t663~0.base_22| 1)) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t665~0.base=|v_ULTIMATE.start_main_~#t665~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, ULTIMATE.start_main_~#t665~0.offset=|v_ULTIMATE.start_main_~#t665~0.offset_14|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_~#t663~0.base=|v_ULTIMATE.start_main_~#t663~0.base_22|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ULTIMATE.start_main_~#t664~0.base=|v_ULTIMATE.start_main_~#t664~0.base_19|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_133, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ULTIMATE.start_main_~#t664~0.offset=|v_ULTIMATE.start_main_~#t664~0.offset_14|, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_~#t663~0.offset=|v_ULTIMATE.start_main_~#t663~0.offset_16|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t665~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t665~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t663~0.base, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ULTIMATE.start_main_~#t664~0.base, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t664~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t663~0.offset, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:20:03,275 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:20:03,276 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t664~0.base_11|) (= |v_ULTIMATE.start_main_~#t664~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t664~0.base_11| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t664~0.base_11| 4)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t664~0.base_11|) 0) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t664~0.base_11| 1) |v_#valid_31|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t664~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t664~0.base_11|) |v_ULTIMATE.start_main_~#t664~0.offset_10| 1)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t664~0.base=|v_ULTIMATE.start_main_~#t664~0.base_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t664~0.offset=|v_ULTIMATE.start_main_~#t664~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t664~0.base, #length, ULTIMATE.start_main_~#t664~0.offset] because there is no mapped edge [2019-12-07 17:20:03,277 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t665~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t665~0.base_12|) |v_ULTIMATE.start_main_~#t665~0.offset_10| 2)) |v_#memory_int_11|) (not (= 0 |v_ULTIMATE.start_main_~#t665~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t665~0.offset_10|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t665~0.base_12| 1)) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t665~0.base_12|)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t665~0.base_12|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t665~0.base_12| 4) |v_#length_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t665~0.base=|v_ULTIMATE.start_main_~#t665~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t665~0.offset=|v_ULTIMATE.start_main_~#t665~0.offset_10|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t665~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t665~0.offset, #length] because there is no mapped edge [2019-12-07 17:20:03,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-545007716 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-545007716 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out-545007716| |P1Thread1of1ForFork2_#t~ite10_Out-545007716|))) (or (and (not .cse0) .cse1 (not .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out-545007716| ~z$w_buff1~0_In-545007716)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-545007716| ~z~0_In-545007716) (or .cse2 .cse0) .cse1))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-545007716, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-545007716, ~z$w_buff1~0=~z$w_buff1~0_In-545007716, ~z~0=~z~0_In-545007716} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-545007716|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-545007716, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-545007716|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-545007716, ~z$w_buff1~0=~z$w_buff1~0_In-545007716, ~z~0=~z~0_In-545007716} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 17:20:03,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1161010058 256) 0))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1161010058 256)))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1161010058 256)) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In1161010058 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1161010058 256) 0))) (= |P2Thread1of1ForFork0_#t~ite23_Out1161010058| |P2Thread1of1ForFork0_#t~ite24_Out1161010058|) (= ~z$w_buff1~0_In1161010058 |P2Thread1of1ForFork0_#t~ite23_Out1161010058|)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In1161010058| |P2Thread1of1ForFork0_#t~ite23_Out1161010058|) (= ~z$w_buff1~0_In1161010058 |P2Thread1of1ForFork0_#t~ite24_Out1161010058|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1161010058, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1161010058, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1161010058|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1161010058, ~z$w_buff1~0=~z$w_buff1~0_In1161010058, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1161010058, ~weak$$choice2~0=~weak$$choice2~0_In1161010058} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1161010058, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1161010058|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1161010058, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1161010058|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1161010058, ~z$w_buff1~0=~z$w_buff1~0_In1161010058, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1161010058, ~weak$$choice2~0=~weak$$choice2~0_In1161010058} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 17:20:03,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse3 (= (mod ~weak$$choice2~0_In1546873193 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1546873193 256))) (.cse6 (= (mod ~z$r_buff0_thd3~0_In1546873193 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In1546873193 256))) (.cse4 (= (mod ~z$w_buff0_used~0_In1546873193 256) 0)) (.cse5 (= |P2Thread1of1ForFork0_#t~ite29_Out1546873193| |P2Thread1of1ForFork0_#t~ite30_Out1546873193|))) (or (let ((.cse1 (not .cse6))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse1) (= |P2Thread1of1ForFork0_#t~ite29_Out1546873193| |P2Thread1of1ForFork0_#t~ite28_Out1546873193|) .cse3 (not .cse4) .cse5 (= 0 |P2Thread1of1ForFork0_#t~ite28_Out1546873193|))) (and (= |P2Thread1of1ForFork0_#t~ite28_In1546873193| |P2Thread1of1ForFork0_#t~ite28_Out1546873193|) (or (and (not .cse3) (= ~z$w_buff1_used~0_In1546873193 |P2Thread1of1ForFork0_#t~ite30_Out1546873193|) (= |P2Thread1of1ForFork0_#t~ite29_Out1546873193| |P2Thread1of1ForFork0_#t~ite29_In1546873193|)) (and (= |P2Thread1of1ForFork0_#t~ite29_Out1546873193| ~z$w_buff1_used~0_In1546873193) .cse3 (or (and .cse0 .cse6) (and .cse6 .cse2) .cse4) .cse5))))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In1546873193|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1546873193, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1546873193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1546873193, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1546873193, ~weak$$choice2~0=~weak$$choice2~0_In1546873193, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1546873193|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out1546873193|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1546873193, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1546873193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1546873193, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1546873193, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1546873193|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1546873193|, ~weak$$choice2~0=~weak$$choice2~0_In1546873193} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:20:03,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:20:03,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:20:03,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1953557047 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1953557047 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1953557047| |P2Thread1of1ForFork0_#t~ite38_Out-1953557047|))) (or (and (= ~z~0_In-1953557047 |P2Thread1of1ForFork0_#t~ite38_Out-1953557047|) (or .cse0 .cse1) .cse2) (and (not .cse0) (not .cse1) .cse2 (= ~z$w_buff1~0_In-1953557047 |P2Thread1of1ForFork0_#t~ite38_Out-1953557047|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1953557047, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1953557047, ~z$w_buff1~0=~z$w_buff1~0_In-1953557047, ~z~0=~z~0_In-1953557047} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1953557047|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1953557047|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1953557047, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1953557047, ~z$w_buff1~0=~z$w_buff1~0_In-1953557047, ~z~0=~z~0_In-1953557047} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:20:03,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1476573944 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1476573944 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1476573944 |P2Thread1of1ForFork0_#t~ite40_Out-1476573944|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-1476573944|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1476573944, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1476573944} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1476573944, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1476573944|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1476573944} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:20:03,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1586811627 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1586811627 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1586811627 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1586811627 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1586811627|)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite41_Out-1586811627| ~z$w_buff1_used~0_In-1586811627) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1586811627, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1586811627, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1586811627, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1586811627} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1586811627, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1586811627, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1586811627, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1586811627, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1586811627|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:20:03,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-861499675 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-861499675 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-861499675| 0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-861499675| ~z$r_buff0_thd3~0_In-861499675) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-861499675, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-861499675} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-861499675, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-861499675, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-861499675|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:20:03,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In1612034532 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In1612034532 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1612034532 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1612034532 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out1612034532| 0)) (and (= ~z$r_buff1_thd3~0_In1612034532 |P2Thread1of1ForFork0_#t~ite43_Out1612034532|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1612034532, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1612034532, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1612034532, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1612034532} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1612034532|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1612034532, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1612034532, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1612034532, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1612034532} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:20:03,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:20:03,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In915626569 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In915626569 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out915626569| 0)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out915626569| ~z$w_buff0_used~0_In915626569) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In915626569, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In915626569} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out915626569|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In915626569, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In915626569} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:20:03,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1702186885 256))) (.cse0 (= (mod ~z$r_buff1_thd1~0_In1702186885 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1702186885 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1702186885 256)))) (or (and (= ~z$w_buff1_used~0_In1702186885 |P0Thread1of1ForFork1_#t~ite6_Out1702186885|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1702186885|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1702186885, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1702186885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1702186885, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1702186885} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1702186885, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1702186885|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1702186885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1702186885, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1702186885} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:20:03,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2054213562 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out2054213562 ~z$r_buff0_thd1~0_In2054213562)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In2054213562 256)))) (or (and (= 0 ~z$r_buff0_thd1~0_Out2054213562) (not .cse0) (not .cse1)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2054213562, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2054213562} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2054213562, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out2054213562|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2054213562} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:20:03,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-2016265135 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-2016265135 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd1~0_In-2016265135 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-2016265135 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out-2016265135| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-2016265135| ~z$r_buff1_thd1~0_In-2016265135) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2016265135, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2016265135, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2016265135, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2016265135} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-2016265135|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2016265135, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2016265135, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2016265135, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2016265135} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:20:03,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:20:03,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In574281168 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In574281168 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out574281168| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out574281168| ~z$w_buff0_used~0_In574281168)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In574281168, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In574281168} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In574281168, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out574281168|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In574281168} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:20:03,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-94579314 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-94579314 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-94579314 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In-94579314 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-94579314|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-94579314| ~z$w_buff1_used~0_In-94579314) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-94579314, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-94579314, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-94579314, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-94579314} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-94579314, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-94579314, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-94579314, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-94579314|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-94579314} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:20:03,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1783254107 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1783254107 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1783254107| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1783254107| ~z$r_buff0_thd2~0_In-1783254107)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1783254107, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1783254107} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1783254107, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1783254107|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1783254107} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:20:03,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1591182067 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In1591182067 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1591182067 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1591182067 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1591182067| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite14_Out1591182067| ~z$r_buff1_thd2~0_In1591182067) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1591182067, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1591182067, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1591182067, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1591182067} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1591182067, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1591182067, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1591182067, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1591182067|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1591182067} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:20:03,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:20:03,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:20:03,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In691374510 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In691374510 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out691374510| ~z~0_In691374510)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out691374510| ~z$w_buff1~0_In691374510)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In691374510, ~z$w_buff1_used~0=~z$w_buff1_used~0_In691374510, ~z$w_buff1~0=~z$w_buff1~0_In691374510, ~z~0=~z~0_In691374510} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In691374510, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out691374510|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In691374510, ~z$w_buff1~0=~z$w_buff1~0_In691374510, ~z~0=~z~0_In691374510} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 17:20:03,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 17:20:03,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1671404312 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1671404312 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out1671404312|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In1671404312 |ULTIMATE.start_main_#t~ite49_Out1671404312|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1671404312, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1671404312} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1671404312, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1671404312, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1671404312|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:20:03,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1060114942 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1060114942 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-1060114942 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1060114942 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out-1060114942| ~z$w_buff1_used~0_In-1060114942) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1060114942| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1060114942, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1060114942, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1060114942, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1060114942} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1060114942|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1060114942, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1060114942, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1060114942, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1060114942} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:20:03,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In501781217 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In501781217 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In501781217 |ULTIMATE.start_main_#t~ite51_Out501781217|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out501781217|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In501781217, ~z$w_buff0_used~0=~z$w_buff0_used~0_In501781217} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In501781217, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out501781217|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In501781217} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:20:03,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In127163766 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In127163766 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In127163766 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In127163766 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In127163766 |ULTIMATE.start_main_#t~ite52_Out127163766|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite52_Out127163766|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In127163766, ~z$w_buff0_used~0=~z$w_buff0_used~0_In127163766, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In127163766, ~z$w_buff1_used~0=~z$w_buff1_used~0_In127163766} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out127163766|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In127163766, ~z$w_buff0_used~0=~z$w_buff0_used~0_In127163766, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In127163766, ~z$w_buff1_used~0=~z$w_buff1_used~0_In127163766} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:20:03,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:20:03,351 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:20:03 BasicIcfg [2019-12-07 17:20:03,351 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:20:03,351 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:20:03,351 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:20:03,352 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:20:03,352 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:17:14" (3/4) ... [2019-12-07 17:20:03,354 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:20:03,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t663~0.base_22| 4)) (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t663~0.base_22|)) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= v_~z$w_buff1_used~0_500 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t663~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t663~0.base_22|) |v_ULTIMATE.start_main_~#t663~0.offset_16| 0)) |v_#memory_int_19|) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t663~0.base_22|) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= |v_ULTIMATE.start_main_~#t663~0.offset_16| 0) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd3~0_379) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t663~0.base_22| 1)) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t665~0.base=|v_ULTIMATE.start_main_~#t665~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, ULTIMATE.start_main_~#t665~0.offset=|v_ULTIMATE.start_main_~#t665~0.offset_14|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_~#t663~0.base=|v_ULTIMATE.start_main_~#t663~0.base_22|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ULTIMATE.start_main_~#t664~0.base=|v_ULTIMATE.start_main_~#t664~0.base_19|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_133, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ULTIMATE.start_main_~#t664~0.offset=|v_ULTIMATE.start_main_~#t664~0.offset_14|, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_~#t663~0.offset=|v_ULTIMATE.start_main_~#t663~0.offset_16|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t665~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t665~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t663~0.base, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ULTIMATE.start_main_~#t664~0.base, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t664~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t663~0.offset, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:20:03,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:20:03,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t664~0.base_11|) (= |v_ULTIMATE.start_main_~#t664~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t664~0.base_11| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t664~0.base_11| 4)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t664~0.base_11|) 0) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t664~0.base_11| 1) |v_#valid_31|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t664~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t664~0.base_11|) |v_ULTIMATE.start_main_~#t664~0.offset_10| 1)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t664~0.base=|v_ULTIMATE.start_main_~#t664~0.base_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t664~0.offset=|v_ULTIMATE.start_main_~#t664~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t664~0.base, #length, ULTIMATE.start_main_~#t664~0.offset] because there is no mapped edge [2019-12-07 17:20:03,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t665~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t665~0.base_12|) |v_ULTIMATE.start_main_~#t665~0.offset_10| 2)) |v_#memory_int_11|) (not (= 0 |v_ULTIMATE.start_main_~#t665~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t665~0.offset_10|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t665~0.base_12| 1)) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t665~0.base_12|)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t665~0.base_12|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t665~0.base_12| 4) |v_#length_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t665~0.base=|v_ULTIMATE.start_main_~#t665~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t665~0.offset=|v_ULTIMATE.start_main_~#t665~0.offset_10|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t665~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t665~0.offset, #length] because there is no mapped edge [2019-12-07 17:20:03,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-545007716 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-545007716 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out-545007716| |P1Thread1of1ForFork2_#t~ite10_Out-545007716|))) (or (and (not .cse0) .cse1 (not .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out-545007716| ~z$w_buff1~0_In-545007716)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-545007716| ~z~0_In-545007716) (or .cse2 .cse0) .cse1))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-545007716, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-545007716, ~z$w_buff1~0=~z$w_buff1~0_In-545007716, ~z~0=~z~0_In-545007716} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-545007716|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-545007716, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-545007716|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-545007716, ~z$w_buff1~0=~z$w_buff1~0_In-545007716, ~z~0=~z~0_In-545007716} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 17:20:03,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1161010058 256) 0))) (or (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1161010058 256)))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1161010058 256)) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In1161010058 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1161010058 256) 0))) (= |P2Thread1of1ForFork0_#t~ite23_Out1161010058| |P2Thread1of1ForFork0_#t~ite24_Out1161010058|) (= ~z$w_buff1~0_In1161010058 |P2Thread1of1ForFork0_#t~ite23_Out1161010058|)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In1161010058| |P2Thread1of1ForFork0_#t~ite23_Out1161010058|) (= ~z$w_buff1~0_In1161010058 |P2Thread1of1ForFork0_#t~ite24_Out1161010058|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1161010058, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1161010058, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1161010058|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1161010058, ~z$w_buff1~0=~z$w_buff1~0_In1161010058, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1161010058, ~weak$$choice2~0=~weak$$choice2~0_In1161010058} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1161010058, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1161010058|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1161010058, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1161010058|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1161010058, ~z$w_buff1~0=~z$w_buff1~0_In1161010058, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1161010058, ~weak$$choice2~0=~weak$$choice2~0_In1161010058} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 17:20:03,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse3 (= (mod ~weak$$choice2~0_In1546873193 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1546873193 256))) (.cse6 (= (mod ~z$r_buff0_thd3~0_In1546873193 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In1546873193 256))) (.cse4 (= (mod ~z$w_buff0_used~0_In1546873193 256) 0)) (.cse5 (= |P2Thread1of1ForFork0_#t~ite29_Out1546873193| |P2Thread1of1ForFork0_#t~ite30_Out1546873193|))) (or (let ((.cse1 (not .cse6))) (and (or (not .cse0) .cse1) (or (not .cse2) .cse1) (= |P2Thread1of1ForFork0_#t~ite29_Out1546873193| |P2Thread1of1ForFork0_#t~ite28_Out1546873193|) .cse3 (not .cse4) .cse5 (= 0 |P2Thread1of1ForFork0_#t~ite28_Out1546873193|))) (and (= |P2Thread1of1ForFork0_#t~ite28_In1546873193| |P2Thread1of1ForFork0_#t~ite28_Out1546873193|) (or (and (not .cse3) (= ~z$w_buff1_used~0_In1546873193 |P2Thread1of1ForFork0_#t~ite30_Out1546873193|) (= |P2Thread1of1ForFork0_#t~ite29_Out1546873193| |P2Thread1of1ForFork0_#t~ite29_In1546873193|)) (and (= |P2Thread1of1ForFork0_#t~ite29_Out1546873193| ~z$w_buff1_used~0_In1546873193) .cse3 (or (and .cse0 .cse6) (and .cse6 .cse2) .cse4) .cse5))))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In1546873193|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1546873193, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1546873193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1546873193, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1546873193, ~weak$$choice2~0=~weak$$choice2~0_In1546873193, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1546873193|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out1546873193|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1546873193, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1546873193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1546873193, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1546873193, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1546873193|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1546873193|, ~weak$$choice2~0=~weak$$choice2~0_In1546873193} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:20:03,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:20:03,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 17:20:03,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1953557047 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1953557047 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1953557047| |P2Thread1of1ForFork0_#t~ite38_Out-1953557047|))) (or (and (= ~z~0_In-1953557047 |P2Thread1of1ForFork0_#t~ite38_Out-1953557047|) (or .cse0 .cse1) .cse2) (and (not .cse0) (not .cse1) .cse2 (= ~z$w_buff1~0_In-1953557047 |P2Thread1of1ForFork0_#t~ite38_Out-1953557047|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1953557047, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1953557047, ~z$w_buff1~0=~z$w_buff1~0_In-1953557047, ~z~0=~z~0_In-1953557047} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1953557047|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1953557047|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1953557047, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1953557047, ~z$w_buff1~0=~z$w_buff1~0_In-1953557047, ~z~0=~z~0_In-1953557047} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 17:20:03,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1476573944 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1476573944 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1476573944 |P2Thread1of1ForFork0_#t~ite40_Out-1476573944|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-1476573944|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1476573944, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1476573944} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1476573944, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1476573944|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1476573944} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 17:20:03,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1586811627 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1586811627 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1586811627 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-1586811627 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1586811627|)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite41_Out-1586811627| ~z$w_buff1_used~0_In-1586811627) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1586811627, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1586811627, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1586811627, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1586811627} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1586811627, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1586811627, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1586811627, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1586811627, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1586811627|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 17:20:03,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-861499675 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-861499675 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-861499675| 0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-861499675| ~z$r_buff0_thd3~0_In-861499675) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-861499675, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-861499675} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-861499675, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-861499675, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-861499675|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 17:20:03,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In1612034532 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In1612034532 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1612034532 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1612034532 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out1612034532| 0)) (and (= ~z$r_buff1_thd3~0_In1612034532 |P2Thread1of1ForFork0_#t~ite43_Out1612034532|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1612034532, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1612034532, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1612034532, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1612034532} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1612034532|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1612034532, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1612034532, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1612034532, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1612034532} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 17:20:03,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:20:03,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In915626569 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In915626569 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out915626569| 0)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out915626569| ~z$w_buff0_used~0_In915626569) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In915626569, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In915626569} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out915626569|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In915626569, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In915626569} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 17:20:03,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1702186885 256))) (.cse0 (= (mod ~z$r_buff1_thd1~0_In1702186885 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1702186885 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1702186885 256)))) (or (and (= ~z$w_buff1_used~0_In1702186885 |P0Thread1of1ForFork1_#t~ite6_Out1702186885|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1702186885|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1702186885, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1702186885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1702186885, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1702186885} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1702186885, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1702186885|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1702186885, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1702186885, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1702186885} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 17:20:03,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2054213562 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out2054213562 ~z$r_buff0_thd1~0_In2054213562)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In2054213562 256)))) (or (and (= 0 ~z$r_buff0_thd1~0_Out2054213562) (not .cse0) (not .cse1)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2054213562, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2054213562} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2054213562, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out2054213562|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2054213562} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:20:03,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-2016265135 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-2016265135 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd1~0_In-2016265135 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-2016265135 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out-2016265135| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-2016265135| ~z$r_buff1_thd1~0_In-2016265135) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2016265135, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2016265135, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2016265135, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2016265135} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-2016265135|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2016265135, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2016265135, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2016265135, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2016265135} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 17:20:03,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:20:03,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In574281168 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In574281168 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out574281168| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out574281168| ~z$w_buff0_used~0_In574281168)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In574281168, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In574281168} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In574281168, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out574281168|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In574281168} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 17:20:03,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-94579314 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-94579314 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-94579314 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In-94579314 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-94579314|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-94579314| ~z$w_buff1_used~0_In-94579314) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-94579314, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-94579314, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-94579314, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-94579314} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-94579314, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-94579314, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-94579314, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-94579314|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-94579314} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 17:20:03,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1783254107 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1783254107 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1783254107| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1783254107| ~z$r_buff0_thd2~0_In-1783254107)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1783254107, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1783254107} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1783254107, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1783254107|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1783254107} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 17:20:03,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1591182067 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In1591182067 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1591182067 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1591182067 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out1591182067| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite14_Out1591182067| ~z$r_buff1_thd2~0_In1591182067) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1591182067, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1591182067, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1591182067, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1591182067} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1591182067, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1591182067, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1591182067, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1591182067|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1591182067} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 17:20:03,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:20:03,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:20:03,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In691374510 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In691374510 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out691374510| ~z~0_In691374510)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out691374510| ~z$w_buff1~0_In691374510)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In691374510, ~z$w_buff1_used~0=~z$w_buff1_used~0_In691374510, ~z$w_buff1~0=~z$w_buff1~0_In691374510, ~z~0=~z~0_In691374510} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In691374510, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out691374510|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In691374510, ~z$w_buff1~0=~z$w_buff1~0_In691374510, ~z~0=~z~0_In691374510} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 17:20:03,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 17:20:03,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1671404312 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1671404312 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out1671404312|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In1671404312 |ULTIMATE.start_main_#t~ite49_Out1671404312|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1671404312, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1671404312} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1671404312, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1671404312, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1671404312|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 17:20:03,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1060114942 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1060114942 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-1060114942 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1060114942 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out-1060114942| ~z$w_buff1_used~0_In-1060114942) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1060114942| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1060114942, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1060114942, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1060114942, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1060114942} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1060114942|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1060114942, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1060114942, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1060114942, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1060114942} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 17:20:03,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In501781217 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In501781217 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In501781217 |ULTIMATE.start_main_#t~ite51_Out501781217|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out501781217|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In501781217, ~z$w_buff0_used~0=~z$w_buff0_used~0_In501781217} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In501781217, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out501781217|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In501781217} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 17:20:03,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In127163766 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In127163766 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In127163766 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In127163766 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In127163766 |ULTIMATE.start_main_#t~ite52_Out127163766|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite52_Out127163766|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In127163766, ~z$w_buff0_used~0=~z$w_buff0_used~0_In127163766, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In127163766, ~z$w_buff1_used~0=~z$w_buff1_used~0_In127163766} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out127163766|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In127163766, ~z$w_buff0_used~0=~z$w_buff0_used~0_In127163766, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In127163766, ~z$w_buff1_used~0=~z$w_buff1_used~0_In127163766} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 17:20:03,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:20:03,430 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_8fda9b29-6d82-461c-b3b7-5eb966765d8e/bin/uautomizer/witness.graphml [2019-12-07 17:20:03,430 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:20:03,432 INFO L168 Benchmark]: Toolchain (without parser) took 169426.75 ms. Allocated memory was 1.0 GB in the beginning and 8.6 GB in the end (delta: 7.6 GB). Free memory was 938.2 MB in the beginning and 2.4 GB in the end (delta: -1.5 GB). Peak memory consumption was 6.1 GB. Max. memory is 11.5 GB. [2019-12-07 17:20:03,432 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:20:03,432 INFO L168 Benchmark]: CACSL2BoogieTranslator took 385.07 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -129.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:20:03,433 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:20:03,433 INFO L168 Benchmark]: Boogie Preprocessor took 25.66 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:20:03,433 INFO L168 Benchmark]: RCFGBuilder took 398.07 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:20:03,434 INFO L168 Benchmark]: TraceAbstraction took 168499.16 ms. Allocated memory was 1.1 GB in the beginning and 8.6 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 6.0 GB. Max. memory is 11.5 GB. [2019-12-07 17:20:03,434 INFO L168 Benchmark]: Witness Printer took 79.17 ms. Allocated memory is still 8.6 GB. Free memory was 2.5 GB in the beginning and 2.4 GB in the end (delta: 47.4 MB). Peak memory consumption was 47.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:20:03,436 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 385.07 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -129.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.22 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.66 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 398.07 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 168499.16 ms. Allocated memory was 1.1 GB in the beginning and 8.6 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 6.0 GB. Max. memory is 11.5 GB. * Witness Printer took 79.17 ms. Allocated memory is still 8.6 GB. Free memory was 2.5 GB in the beginning and 2.4 GB in the end (delta: 47.4 MB). Peak memory consumption was 47.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 7047 VarBasedMoverChecksPositive, 336 VarBasedMoverChecksNegative, 168 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 130103 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t663, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t664, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L829] FCALL, FORK 0 pthread_create(&t665, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 2 [L783] 3 __unbuffered_p2_EAX = y [L786] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L787] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L788] 3 z$flush_delayed = weak$$choice2 [L789] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L766] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L791] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L792] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L793] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L803] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L804] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L835] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L837] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L838] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 168.3s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 37.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9566 SDtfs, 9906 SDslu, 31239 SDs, 0 SdLazy, 14742 SolverSat, 361 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 422 GetRequests, 65 SyntacticMatches, 26 SemanticMatches, 331 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1845 ImplicationChecksByTransitivity, 2.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=371396occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 106.6s AutomataMinimizationTime, 34 MinimizatonAttempts, 682011 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 1388 NumberOfCodeBlocks, 1388 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1288 ConstructedInterpolants, 0 QuantifiedInterpolants, 322218 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...