./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix025_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix025_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 882ad8c9f91ee7cffe0736657c8c4e7aafda9feb ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:24:37,286 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:24:37,288 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:24:37,295 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:24:37,295 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:24:37,296 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:24:37,297 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:24:37,298 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:24:37,299 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:24:37,300 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:24:37,301 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:24:37,301 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:24:37,302 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:24:37,302 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:24:37,303 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:24:37,304 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:24:37,304 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:24:37,305 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:24:37,306 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:24:37,308 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:24:37,309 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:24:37,309 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:24:37,310 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:24:37,311 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:24:37,312 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:24:37,312 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:24:37,313 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:24:37,313 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:24:37,313 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:24:37,314 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:24:37,314 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:24:37,314 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:24:37,315 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:24:37,315 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:24:37,316 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:24:37,316 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:24:37,316 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:24:37,316 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:24:37,317 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:24:37,317 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:24:37,317 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:24:37,318 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:24:37,327 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:24:37,328 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:24:37,328 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:24:37,329 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:24:37,329 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:24:37,329 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:24:37,329 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:24:37,329 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:24:37,329 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:24:37,329 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:24:37,329 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:24:37,330 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:24:37,330 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:24:37,330 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:24:37,330 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:24:37,330 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:24:37,330 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:24:37,330 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:24:37,331 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:24:37,331 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:24:37,331 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:24:37,331 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:24:37,331 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:24:37,331 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:24:37,331 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:24:37,331 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:24:37,331 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:24:37,332 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:24:37,332 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:24:37,332 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 882ad8c9f91ee7cffe0736657c8c4e7aafda9feb [2019-12-07 16:24:37,431 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:24:37,441 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:24:37,444 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:24:37,445 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:24:37,445 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:24:37,446 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix025_pso.opt.i [2019-12-07 16:24:37,490 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/data/5247d25e4/22a85f43486946668b65027198329e1c/FLAG29c078d80 [2019-12-07 16:24:37,948 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:24:37,949 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/sv-benchmarks/c/pthread-wmm/mix025_pso.opt.i [2019-12-07 16:24:37,958 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/data/5247d25e4/22a85f43486946668b65027198329e1c/FLAG29c078d80 [2019-12-07 16:24:37,968 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/data/5247d25e4/22a85f43486946668b65027198329e1c [2019-12-07 16:24:37,969 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:24:37,970 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:24:37,971 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:24:37,971 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:24:37,973 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:24:37,974 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,976 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37, skipping insertion in model container [2019-12-07 16:24:37,976 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,980 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:24:38,009 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:24:38,254 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:24:38,262 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:24:38,302 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:24:38,347 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:24:38,347 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38 WrapperNode [2019-12-07 16:24:38,347 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:24:38,348 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:24:38,348 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:24:38,348 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:24:38,354 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,366 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,385 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:24:38,385 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:24:38,385 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:24:38,385 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:24:38,391 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,392 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,395 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,395 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,401 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,404 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,406 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... [2019-12-07 16:24:38,409 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:24:38,410 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:24:38,410 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:24:38,410 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:24:38,410 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:24:38,449 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:24:38,449 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:24:38,450 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:24:38,450 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:24:38,450 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:24:38,450 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:24:38,450 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:24:38,450 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:24:38,450 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 16:24:38,450 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 16:24:38,450 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:24:38,450 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:24:38,450 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:24:38,451 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:24:38,803 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:24:38,804 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:24:38,804 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:24:38 BoogieIcfgContainer [2019-12-07 16:24:38,805 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:24:38,805 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:24:38,805 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:24:38,807 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:24:38,807 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:24:37" (1/3) ... [2019-12-07 16:24:38,808 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d525dff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:24:38, skipping insertion in model container [2019-12-07 16:24:38,808 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:38" (2/3) ... [2019-12-07 16:24:38,808 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d525dff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:24:38, skipping insertion in model container [2019-12-07 16:24:38,808 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:24:38" (3/3) ... [2019-12-07 16:24:38,810 INFO L109 eAbstractionObserver]: Analyzing ICFG mix025_pso.opt.i [2019-12-07 16:24:38,816 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:24:38,816 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:24:38,821 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:24:38,822 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:24:38,853 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,853 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,854 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,854 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,854 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,854 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,854 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,854 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,855 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,855 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,855 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,855 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,856 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,856 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,856 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,856 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,856 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,857 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,857 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,857 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,857 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,857 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,857 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,858 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,858 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,858 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,858 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,858 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,858 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,859 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,859 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,859 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,859 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,859 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,863 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,863 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,863 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,863 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,863 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,863 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,864 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,864 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,864 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,864 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,864 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,864 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,865 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,865 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,865 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,865 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,865 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,865 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,866 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,866 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,866 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,866 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,866 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,866 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,867 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,867 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,867 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,867 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,867 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,867 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,868 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,868 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,868 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,868 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,868 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,868 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,869 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,869 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,869 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,869 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,869 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,869 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,869 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,870 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,870 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,871 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,871 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,871 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,871 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,871 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,871 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,872 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,872 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,872 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,872 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,872 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,872 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,873 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,873 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,873 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,873 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,873 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,873 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,874 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,874 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,874 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,874 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,874 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,874 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,875 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,876 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,876 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,876 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,877 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,879 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,879 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,879 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,879 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,879 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,879 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,880 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,880 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,880 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,880 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,880 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,880 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,881 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,881 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:38,896 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 16:24:38,910 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:24:38,910 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:24:38,910 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:24:38,910 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:24:38,910 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:24:38,910 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:24:38,910 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:24:38,911 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:24:38,925 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-12-07 16:24:38,926 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 16:24:38,981 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 16:24:38,981 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:24:38,991 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 718 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 16:24:39,005 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 16:24:39,032 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 16:24:39,032 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:24:39,037 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 718 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 16:24:39,051 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 16:24:39,052 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:24:42,227 WARN L192 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 16:24:42,310 INFO L206 etLargeBlockEncoding]: Checked pairs total: 73051 [2019-12-07 16:24:42,310 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 16:24:42,313 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-12-07 16:24:51,263 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 83162 states. [2019-12-07 16:24:51,265 INFO L276 IsEmpty]: Start isEmpty. Operand 83162 states. [2019-12-07 16:24:51,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 16:24:51,269 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:24:51,269 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 16:24:51,269 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:24:51,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:24:51,273 INFO L82 PathProgramCache]: Analyzing trace with hash 800250999, now seen corresponding path program 1 times [2019-12-07 16:24:51,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:24:51,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419011846] [2019-12-07 16:24:51,279 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:24:51,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:24:51,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:24:51,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419011846] [2019-12-07 16:24:51,423 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:24:51,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:24:51,424 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [749409212] [2019-12-07 16:24:51,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:24:51,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:24:51,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:24:51,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:24:51,438 INFO L87 Difference]: Start difference. First operand 83162 states. Second operand 3 states. [2019-12-07 16:24:52,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:24:52,070 INFO L93 Difference]: Finished difference Result 82042 states and 356056 transitions. [2019-12-07 16:24:52,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:24:52,072 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 16:24:52,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:24:52,450 INFO L225 Difference]: With dead ends: 82042 [2019-12-07 16:24:52,450 INFO L226 Difference]: Without dead ends: 77338 [2019-12-07 16:24:52,451 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:24:54,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77338 states. [2019-12-07 16:24:56,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77338 to 77338. [2019-12-07 16:24:56,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77338 states. [2019-12-07 16:24:56,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77338 states to 77338 states and 335168 transitions. [2019-12-07 16:24:56,435 INFO L78 Accepts]: Start accepts. Automaton has 77338 states and 335168 transitions. Word has length 5 [2019-12-07 16:24:56,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:24:56,436 INFO L462 AbstractCegarLoop]: Abstraction has 77338 states and 335168 transitions. [2019-12-07 16:24:56,436 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:24:56,436 INFO L276 IsEmpty]: Start isEmpty. Operand 77338 states and 335168 transitions. [2019-12-07 16:24:56,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:24:56,441 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:24:56,442 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:24:56,442 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:24:56,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:24:56,442 INFO L82 PathProgramCache]: Analyzing trace with hash -463413440, now seen corresponding path program 1 times [2019-12-07 16:24:56,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:24:56,442 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1726573703] [2019-12-07 16:24:56,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:24:56,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:24:56,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:24:56,501 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1726573703] [2019-12-07 16:24:56,501 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:24:56,501 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:24:56,501 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [619453180] [2019-12-07 16:24:56,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:24:56,502 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:24:56,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:24:56,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:24:56,503 INFO L87 Difference]: Start difference. First operand 77338 states and 335168 transitions. Second operand 4 states. [2019-12-07 16:24:57,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:24:57,184 INFO L93 Difference]: Finished difference Result 119002 states and 493831 transitions. [2019-12-07 16:24:57,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:24:57,185 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:24:57,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:24:57,509 INFO L225 Difference]: With dead ends: 119002 [2019-12-07 16:24:57,510 INFO L226 Difference]: Without dead ends: 118911 [2019-12-07 16:24:57,511 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:02,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118911 states. [2019-12-07 16:25:03,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118911 to 109839. [2019-12-07 16:25:03,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109839 states. [2019-12-07 16:25:04,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109839 states to 109839 states and 460824 transitions. [2019-12-07 16:25:04,155 INFO L78 Accepts]: Start accepts. Automaton has 109839 states and 460824 transitions. Word has length 13 [2019-12-07 16:25:04,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:04,156 INFO L462 AbstractCegarLoop]: Abstraction has 109839 states and 460824 transitions. [2019-12-07 16:25:04,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:25:04,156 INFO L276 IsEmpty]: Start isEmpty. Operand 109839 states and 460824 transitions. [2019-12-07 16:25:04,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:25:04,159 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:04,159 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:04,159 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:04,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:04,159 INFO L82 PathProgramCache]: Analyzing trace with hash 2092378622, now seen corresponding path program 1 times [2019-12-07 16:25:04,159 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:04,160 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494120416] [2019-12-07 16:25:04,160 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:04,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:04,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:04,215 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [494120416] [2019-12-07 16:25:04,215 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:04,215 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:04,215 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [824804142] [2019-12-07 16:25:04,215 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:25:04,215 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:04,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:25:04,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:25:04,216 INFO L87 Difference]: Start difference. First operand 109839 states and 460824 transitions. Second operand 4 states. [2019-12-07 16:25:05,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:05,242 INFO L93 Difference]: Finished difference Result 153490 states and 628667 transitions. [2019-12-07 16:25:05,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:25:05,243 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:25:05,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:05,634 INFO L225 Difference]: With dead ends: 153490 [2019-12-07 16:25:05,635 INFO L226 Difference]: Without dead ends: 153386 [2019-12-07 16:25:05,635 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:09,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153386 states. [2019-12-07 16:25:13,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153386 to 130549. [2019-12-07 16:25:13,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130549 states. [2019-12-07 16:25:13,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130549 states to 130549 states and 543763 transitions. [2019-12-07 16:25:13,435 INFO L78 Accepts]: Start accepts. Automaton has 130549 states and 543763 transitions. Word has length 13 [2019-12-07 16:25:13,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:13,435 INFO L462 AbstractCegarLoop]: Abstraction has 130549 states and 543763 transitions. [2019-12-07 16:25:13,436 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:25:13,436 INFO L276 IsEmpty]: Start isEmpty. Operand 130549 states and 543763 transitions. [2019-12-07 16:25:13,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 16:25:13,438 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:13,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:13,438 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:13,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:13,439 INFO L82 PathProgramCache]: Analyzing trace with hash 740124844, now seen corresponding path program 1 times [2019-12-07 16:25:13,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:13,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [111051927] [2019-12-07 16:25:13,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:13,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:13,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:13,475 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [111051927] [2019-12-07 16:25:13,475 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:13,475 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:13,475 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1728536903] [2019-12-07 16:25:13,476 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:25:13,476 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:13,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:25:13,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:25:13,476 INFO L87 Difference]: Start difference. First operand 130549 states and 543763 transitions. Second operand 4 states. [2019-12-07 16:25:14,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:14,290 INFO L93 Difference]: Finished difference Result 162838 states and 668586 transitions. [2019-12-07 16:25:14,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:25:14,291 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 16:25:14,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:14,700 INFO L225 Difference]: With dead ends: 162838 [2019-12-07 16:25:14,700 INFO L226 Difference]: Without dead ends: 162750 [2019-12-07 16:25:14,700 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:18,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162750 states. [2019-12-07 16:25:20,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162750 to 140790. [2019-12-07 16:25:20,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140790 states. [2019-12-07 16:25:21,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140790 states to 140790 states and 584562 transitions. [2019-12-07 16:25:21,138 INFO L78 Accepts]: Start accepts. Automaton has 140790 states and 584562 transitions. Word has length 14 [2019-12-07 16:25:21,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:21,138 INFO L462 AbstractCegarLoop]: Abstraction has 140790 states and 584562 transitions. [2019-12-07 16:25:21,138 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:25:21,138 INFO L276 IsEmpty]: Start isEmpty. Operand 140790 states and 584562 transitions. [2019-12-07 16:25:21,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 16:25:21,141 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:21,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:21,141 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:21,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:21,141 INFO L82 PathProgramCache]: Analyzing trace with hash 739988072, now seen corresponding path program 1 times [2019-12-07 16:25:21,141 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:21,142 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213063879] [2019-12-07 16:25:21,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:21,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:21,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:21,163 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213063879] [2019-12-07 16:25:21,163 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:21,163 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:25:21,163 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132603961] [2019-12-07 16:25:21,163 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:25:21,164 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:21,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:25:21,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:21,164 INFO L87 Difference]: Start difference. First operand 140790 states and 584562 transitions. Second operand 3 states. [2019-12-07 16:25:22,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:22,051 INFO L93 Difference]: Finished difference Result 195371 states and 811522 transitions. [2019-12-07 16:25:22,052 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:25:22,052 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 16:25:22,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:22,558 INFO L225 Difference]: With dead ends: 195371 [2019-12-07 16:25:22,559 INFO L226 Difference]: Without dead ends: 195371 [2019-12-07 16:25:22,559 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:28,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195371 states. [2019-12-07 16:25:30,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195371 to 171215. [2019-12-07 16:25:30,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171215 states. [2019-12-07 16:25:31,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171215 states to 171215 states and 713371 transitions. [2019-12-07 16:25:31,526 INFO L78 Accepts]: Start accepts. Automaton has 171215 states and 713371 transitions. Word has length 14 [2019-12-07 16:25:31,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:31,526 INFO L462 AbstractCegarLoop]: Abstraction has 171215 states and 713371 transitions. [2019-12-07 16:25:31,526 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:25:31,526 INFO L276 IsEmpty]: Start isEmpty. Operand 171215 states and 713371 transitions. [2019-12-07 16:25:31,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 16:25:31,529 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:31,529 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:31,529 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:31,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:31,529 INFO L82 PathProgramCache]: Analyzing trace with hash 575422588, now seen corresponding path program 1 times [2019-12-07 16:25:31,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:31,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [55488383] [2019-12-07 16:25:31,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:31,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:31,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:31,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [55488383] [2019-12-07 16:25:31,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:31,563 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:31,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1968274429] [2019-12-07 16:25:31,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:25:31,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:31,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:25:31,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:25:31,564 INFO L87 Difference]: Start difference. First operand 171215 states and 713371 transitions. Second operand 4 states. [2019-12-07 16:25:32,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:32,624 INFO L93 Difference]: Finished difference Result 200032 states and 824493 transitions. [2019-12-07 16:25:32,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:25:32,625 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 16:25:32,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:33,711 INFO L225 Difference]: With dead ends: 200032 [2019-12-07 16:25:33,711 INFO L226 Difference]: Without dead ends: 199944 [2019-12-07 16:25:33,711 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:37,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199944 states. [2019-12-07 16:25:42,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199944 to 173869. [2019-12-07 16:25:42,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173869 states. [2019-12-07 16:25:43,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173869 states to 173869 states and 724501 transitions. [2019-12-07 16:25:43,063 INFO L78 Accepts]: Start accepts. Automaton has 173869 states and 724501 transitions. Word has length 14 [2019-12-07 16:25:43,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:43,063 INFO L462 AbstractCegarLoop]: Abstraction has 173869 states and 724501 transitions. [2019-12-07 16:25:43,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:25:43,063 INFO L276 IsEmpty]: Start isEmpty. Operand 173869 states and 724501 transitions. [2019-12-07 16:25:43,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 16:25:43,076 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:43,076 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:43,076 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:43,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:43,076 INFO L82 PathProgramCache]: Analyzing trace with hash -1027045792, now seen corresponding path program 1 times [2019-12-07 16:25:43,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:43,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227964531] [2019-12-07 16:25:43,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:43,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:43,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:43,112 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227964531] [2019-12-07 16:25:43,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:43,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:43,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [12357973] [2019-12-07 16:25:43,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:25:43,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:43,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:25:43,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:43,114 INFO L87 Difference]: Start difference. First operand 173869 states and 724501 transitions. Second operand 3 states. [2019-12-07 16:25:44,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:44,172 INFO L93 Difference]: Finished difference Result 164023 states and 676058 transitions. [2019-12-07 16:25:44,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:25:44,173 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 16:25:44,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:44,587 INFO L225 Difference]: With dead ends: 164023 [2019-12-07 16:25:44,587 INFO L226 Difference]: Without dead ends: 164023 [2019-12-07 16:25:44,587 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:48,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164023 states. [2019-12-07 16:25:50,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164023 to 161763. [2019-12-07 16:25:50,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161763 states. [2019-12-07 16:25:51,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161763 states to 161763 states and 667464 transitions. [2019-12-07 16:25:51,537 INFO L78 Accepts]: Start accepts. Automaton has 161763 states and 667464 transitions. Word has length 18 [2019-12-07 16:25:51,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:51,537 INFO L462 AbstractCegarLoop]: Abstraction has 161763 states and 667464 transitions. [2019-12-07 16:25:51,537 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:25:51,537 INFO L276 IsEmpty]: Start isEmpty. Operand 161763 states and 667464 transitions. [2019-12-07 16:25:51,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 16:25:51,547 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:51,547 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:51,547 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:51,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:51,547 INFO L82 PathProgramCache]: Analyzing trace with hash 1868687955, now seen corresponding path program 1 times [2019-12-07 16:25:51,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:51,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456453231] [2019-12-07 16:25:51,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:51,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:51,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:51,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456453231] [2019-12-07 16:25:51,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:51,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:25:51,589 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182915035] [2019-12-07 16:25:51,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:25:51,590 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:51,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:25:51,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:51,590 INFO L87 Difference]: Start difference. First operand 161763 states and 667464 transitions. Second operand 3 states. [2019-12-07 16:25:52,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:52,759 INFO L93 Difference]: Finished difference Result 269150 states and 1104012 transitions. [2019-12-07 16:25:52,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:25:52,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 16:25:52,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:55,978 INFO L225 Difference]: With dead ends: 269150 [2019-12-07 16:25:55,978 INFO L226 Difference]: Without dead ends: 261062 [2019-12-07 16:25:55,978 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:26:00,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261062 states. [2019-12-07 16:26:04,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261062 to 251419. [2019-12-07 16:26:04,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251419 states. [2019-12-07 16:26:05,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251419 states to 251419 states and 1040381 transitions. [2019-12-07 16:26:05,299 INFO L78 Accepts]: Start accepts. Automaton has 251419 states and 1040381 transitions. Word has length 18 [2019-12-07 16:26:05,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:05,299 INFO L462 AbstractCegarLoop]: Abstraction has 251419 states and 1040381 transitions. [2019-12-07 16:26:05,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:26:05,299 INFO L276 IsEmpty]: Start isEmpty. Operand 251419 states and 1040381 transitions. [2019-12-07 16:26:05,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:26:05,319 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:05,319 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:05,319 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:05,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:05,319 INFO L82 PathProgramCache]: Analyzing trace with hash 1754353062, now seen corresponding path program 1 times [2019-12-07 16:26:05,319 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:05,319 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1575076318] [2019-12-07 16:26:05,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:05,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:05,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:05,351 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1575076318] [2019-12-07 16:26:05,351 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:05,351 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:26:05,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86622861] [2019-12-07 16:26:05,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:26:05,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:05,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:26:05,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:05,352 INFO L87 Difference]: Start difference. First operand 251419 states and 1040381 transitions. Second operand 5 states. [2019-12-07 16:26:07,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:07,742 INFO L93 Difference]: Finished difference Result 344457 states and 1392343 transitions. [2019-12-07 16:26:07,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:26:07,742 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 16:26:07,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:08,622 INFO L225 Difference]: With dead ends: 344457 [2019-12-07 16:26:08,622 INFO L226 Difference]: Without dead ends: 344238 [2019-12-07 16:26:08,622 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:26:14,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344238 states. [2019-12-07 16:26:21,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344238 to 268284. [2019-12-07 16:26:21,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268284 states. [2019-12-07 16:26:22,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268284 states to 268284 states and 1105599 transitions. [2019-12-07 16:26:22,707 INFO L78 Accepts]: Start accepts. Automaton has 268284 states and 1105599 transitions. Word has length 19 [2019-12-07 16:26:22,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:22,707 INFO L462 AbstractCegarLoop]: Abstraction has 268284 states and 1105599 transitions. [2019-12-07 16:26:22,707 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:26:22,707 INFO L276 IsEmpty]: Start isEmpty. Operand 268284 states and 1105599 transitions. [2019-12-07 16:26:22,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:26:22,726 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:22,726 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:22,726 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:22,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:22,726 INFO L82 PathProgramCache]: Analyzing trace with hash 422869821, now seen corresponding path program 1 times [2019-12-07 16:26:22,726 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:22,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133918676] [2019-12-07 16:26:22,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:22,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:22,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:22,764 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2133918676] [2019-12-07 16:26:22,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:22,764 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:26:22,764 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [729359494] [2019-12-07 16:26:22,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:26:22,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:22,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:26:22,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:26:22,765 INFO L87 Difference]: Start difference. First operand 268284 states and 1105599 transitions. Second operand 4 states. [2019-12-07 16:26:23,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:23,033 INFO L93 Difference]: Finished difference Result 71088 states and 248205 transitions. [2019-12-07 16:26:23,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:26:23,033 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 16:26:23,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:23,131 INFO L225 Difference]: With dead ends: 71088 [2019-12-07 16:26:23,131 INFO L226 Difference]: Without dead ends: 54408 [2019-12-07 16:26:23,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:23,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54408 states. [2019-12-07 16:26:23,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54408 to 54408. [2019-12-07 16:26:23,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54408 states. [2019-12-07 16:26:24,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54408 states to 54408 states and 180240 transitions. [2019-12-07 16:26:24,052 INFO L78 Accepts]: Start accepts. Automaton has 54408 states and 180240 transitions. Word has length 19 [2019-12-07 16:26:24,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:24,052 INFO L462 AbstractCegarLoop]: Abstraction has 54408 states and 180240 transitions. [2019-12-07 16:26:24,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:26:24,052 INFO L276 IsEmpty]: Start isEmpty. Operand 54408 states and 180240 transitions. [2019-12-07 16:26:24,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:26:24,061 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:24,062 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:24,062 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:24,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:24,062 INFO L82 PathProgramCache]: Analyzing trace with hash -532738305, now seen corresponding path program 1 times [2019-12-07 16:26:24,062 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:24,062 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42371579] [2019-12-07 16:26:24,062 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:24,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:24,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:24,103 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42371579] [2019-12-07 16:26:24,103 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:24,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:26:24,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108581430] [2019-12-07 16:26:24,104 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:26:24,104 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:24,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:26:24,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:24,104 INFO L87 Difference]: Start difference. First operand 54408 states and 180240 transitions. Second operand 5 states. [2019-12-07 16:26:24,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:24,532 INFO L93 Difference]: Finished difference Result 70029 states and 227317 transitions. [2019-12-07 16:26:24,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:26:24,532 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 16:26:24,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:24,641 INFO L225 Difference]: With dead ends: 70029 [2019-12-07 16:26:24,641 INFO L226 Difference]: Without dead ends: 69838 [2019-12-07 16:26:24,642 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:26:24,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69838 states. [2019-12-07 16:26:25,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69838 to 56978. [2019-12-07 16:26:25,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56978 states. [2019-12-07 16:26:26,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56978 states to 56978 states and 187868 transitions. [2019-12-07 16:26:26,074 INFO L78 Accepts]: Start accepts. Automaton has 56978 states and 187868 transitions. Word has length 22 [2019-12-07 16:26:26,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:26,074 INFO L462 AbstractCegarLoop]: Abstraction has 56978 states and 187868 transitions. [2019-12-07 16:26:26,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:26:26,074 INFO L276 IsEmpty]: Start isEmpty. Operand 56978 states and 187868 transitions. [2019-12-07 16:26:26,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:26:26,083 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:26,083 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:26,083 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:26,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:26,084 INFO L82 PathProgramCache]: Analyzing trace with hash 828372869, now seen corresponding path program 1 times [2019-12-07 16:26:26,084 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:26,084 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857507522] [2019-12-07 16:26:26,084 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:26,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:26,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:26,114 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857507522] [2019-12-07 16:26:26,114 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:26,114 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:26:26,114 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766491437] [2019-12-07 16:26:26,114 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:26:26,114 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:26,115 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:26:26,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:26,115 INFO L87 Difference]: Start difference. First operand 56978 states and 187868 transitions. Second operand 5 states. [2019-12-07 16:26:26,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:26,587 INFO L93 Difference]: Finished difference Result 70908 states and 230478 transitions. [2019-12-07 16:26:26,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:26:26,588 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 16:26:26,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:26,696 INFO L225 Difference]: With dead ends: 70908 [2019-12-07 16:26:26,697 INFO L226 Difference]: Without dead ends: 70639 [2019-12-07 16:26:26,697 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:26:26,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70639 states. [2019-12-07 16:26:27,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70639 to 55395. [2019-12-07 16:26:27,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55395 states. [2019-12-07 16:26:27,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55395 states to 55395 states and 182991 transitions. [2019-12-07 16:26:27,922 INFO L78 Accepts]: Start accepts. Automaton has 55395 states and 182991 transitions. Word has length 22 [2019-12-07 16:26:27,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:27,922 INFO L462 AbstractCegarLoop]: Abstraction has 55395 states and 182991 transitions. [2019-12-07 16:26:27,922 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:26:27,922 INFO L276 IsEmpty]: Start isEmpty. Operand 55395 states and 182991 transitions. [2019-12-07 16:26:27,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 16:26:27,943 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:27,943 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:27,943 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:27,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:27,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1106278827, now seen corresponding path program 1 times [2019-12-07 16:26:27,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:27,944 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707026151] [2019-12-07 16:26:27,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:27,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:27,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:27,976 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707026151] [2019-12-07 16:26:27,976 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:27,976 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:26:27,976 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800490893] [2019-12-07 16:26:27,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:26:27,976 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:27,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:26:27,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:27,977 INFO L87 Difference]: Start difference. First operand 55395 states and 182991 transitions. Second operand 5 states. [2019-12-07 16:26:28,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:28,364 INFO L93 Difference]: Finished difference Result 70465 states and 229775 transitions. [2019-12-07 16:26:28,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:26:28,364 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 16:26:28,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:28,474 INFO L225 Difference]: With dead ends: 70465 [2019-12-07 16:26:28,474 INFO L226 Difference]: Without dead ends: 70441 [2019-12-07 16:26:28,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:26:28,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70441 states. [2019-12-07 16:26:29,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70441 to 59379. [2019-12-07 16:26:29,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59379 states. [2019-12-07 16:26:29,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59379 states to 59379 states and 195570 transitions. [2019-12-07 16:26:29,541 INFO L78 Accepts]: Start accepts. Automaton has 59379 states and 195570 transitions. Word has length 28 [2019-12-07 16:26:29,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:29,541 INFO L462 AbstractCegarLoop]: Abstraction has 59379 states and 195570 transitions. [2019-12-07 16:26:29,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:26:29,542 INFO L276 IsEmpty]: Start isEmpty. Operand 59379 states and 195570 transitions. [2019-12-07 16:26:29,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 16:26:29,562 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:29,563 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:29,563 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:29,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:29,563 INFO L82 PathProgramCache]: Analyzing trace with hash 1126449648, now seen corresponding path program 1 times [2019-12-07 16:26:29,563 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:29,563 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [452703026] [2019-12-07 16:26:29,564 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:29,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:29,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:29,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [452703026] [2019-12-07 16:26:29,603 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:29,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:26:29,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [317463913] [2019-12-07 16:26:29,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:26:29,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:29,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:26:29,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:29,605 INFO L87 Difference]: Start difference. First operand 59379 states and 195570 transitions. Second operand 5 states. [2019-12-07 16:26:29,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:29,984 INFO L93 Difference]: Finished difference Result 72627 states and 235603 transitions. [2019-12-07 16:26:29,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:26:29,985 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 16:26:29,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:30,088 INFO L225 Difference]: With dead ends: 72627 [2019-12-07 16:26:30,088 INFO L226 Difference]: Without dead ends: 72603 [2019-12-07 16:26:30,089 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:26:30,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72603 states. [2019-12-07 16:26:31,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72603 to 58846. [2019-12-07 16:26:31,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58846 states. [2019-12-07 16:26:31,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58846 states to 58846 states and 193596 transitions. [2019-12-07 16:26:31,211 INFO L78 Accepts]: Start accepts. Automaton has 58846 states and 193596 transitions. Word has length 29 [2019-12-07 16:26:31,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:31,211 INFO L462 AbstractCegarLoop]: Abstraction has 58846 states and 193596 transitions. [2019-12-07 16:26:31,211 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:26:31,211 INFO L276 IsEmpty]: Start isEmpty. Operand 58846 states and 193596 transitions. [2019-12-07 16:26:31,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 16:26:31,234 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:31,234 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:31,234 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:31,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:31,234 INFO L82 PathProgramCache]: Analyzing trace with hash -14540022, now seen corresponding path program 1 times [2019-12-07 16:26:31,234 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:31,235 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [349472588] [2019-12-07 16:26:31,235 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:31,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:31,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:31,288 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [349472588] [2019-12-07 16:26:31,288 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:31,288 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:26:31,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1190214950] [2019-12-07 16:26:31,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:26:31,289 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:31,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:26:31,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:31,289 INFO L87 Difference]: Start difference. First operand 58846 states and 193596 transitions. Second operand 5 states. [2019-12-07 16:26:31,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:31,401 INFO L93 Difference]: Finished difference Result 25479 states and 80212 transitions. [2019-12-07 16:26:31,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:26:31,402 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 16:26:31,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:31,431 INFO L225 Difference]: With dead ends: 25479 [2019-12-07 16:26:31,431 INFO L226 Difference]: Without dead ends: 22030 [2019-12-07 16:26:31,431 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:26:31,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22030 states. [2019-12-07 16:26:31,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22030 to 21326. [2019-12-07 16:26:31,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21326 states. [2019-12-07 16:26:31,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21326 states to 21326 states and 66962 transitions. [2019-12-07 16:26:31,743 INFO L78 Accepts]: Start accepts. Automaton has 21326 states and 66962 transitions. Word has length 30 [2019-12-07 16:26:31,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:31,743 INFO L462 AbstractCegarLoop]: Abstraction has 21326 states and 66962 transitions. [2019-12-07 16:26:31,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:26:31,743 INFO L276 IsEmpty]: Start isEmpty. Operand 21326 states and 66962 transitions. [2019-12-07 16:26:31,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 16:26:31,763 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:31,764 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:31,764 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:31,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:31,764 INFO L82 PathProgramCache]: Analyzing trace with hash -761398124, now seen corresponding path program 1 times [2019-12-07 16:26:31,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:31,764 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047611391] [2019-12-07 16:26:31,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:31,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:31,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:31,808 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047611391] [2019-12-07 16:26:31,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:31,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:26:31,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467342886] [2019-12-07 16:26:31,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:26:31,809 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:31,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:26:31,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:26:31,809 INFO L87 Difference]: Start difference. First operand 21326 states and 66962 transitions. Second operand 6 states. [2019-12-07 16:26:32,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:32,187 INFO L93 Difference]: Finished difference Result 26013 states and 79558 transitions. [2019-12-07 16:26:32,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 16:26:32,187 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 16:26:32,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:32,218 INFO L225 Difference]: With dead ends: 26013 [2019-12-07 16:26:32,218 INFO L226 Difference]: Without dead ends: 26011 [2019-12-07 16:26:32,219 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:26:32,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26011 states. [2019-12-07 16:26:32,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26011 to 21359. [2019-12-07 16:26:32,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21359 states. [2019-12-07 16:26:32,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21359 states to 21359 states and 66932 transitions. [2019-12-07 16:26:32,553 INFO L78 Accepts]: Start accepts. Automaton has 21359 states and 66932 transitions. Word has length 40 [2019-12-07 16:26:32,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:32,554 INFO L462 AbstractCegarLoop]: Abstraction has 21359 states and 66932 transitions. [2019-12-07 16:26:32,554 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:26:32,554 INFO L276 IsEmpty]: Start isEmpty. Operand 21359 states and 66932 transitions. [2019-12-07 16:26:32,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 16:26:32,574 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:32,574 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:32,574 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:32,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:32,574 INFO L82 PathProgramCache]: Analyzing trace with hash 1633369453, now seen corresponding path program 1 times [2019-12-07 16:26:32,574 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:32,575 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517808186] [2019-12-07 16:26:32,575 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:32,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:32,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:32,614 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1517808186] [2019-12-07 16:26:32,614 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:32,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:26:32,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1900601600] [2019-12-07 16:26:32,615 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:26:32,615 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:32,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:26:32,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:32,615 INFO L87 Difference]: Start difference. First operand 21359 states and 66932 transitions. Second operand 5 states. [2019-12-07 16:26:33,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:33,020 INFO L93 Difference]: Finished difference Result 32702 states and 101145 transitions. [2019-12-07 16:26:33,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:26:33,021 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 16:26:33,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:33,056 INFO L225 Difference]: With dead ends: 32702 [2019-12-07 16:26:33,056 INFO L226 Difference]: Without dead ends: 32702 [2019-12-07 16:26:33,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:26:33,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32702 states. [2019-12-07 16:26:33,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32702 to 29005. [2019-12-07 16:26:33,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29005 states. [2019-12-07 16:26:33,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29005 states to 29005 states and 90665 transitions. [2019-12-07 16:26:33,498 INFO L78 Accepts]: Start accepts. Automaton has 29005 states and 90665 transitions. Word has length 40 [2019-12-07 16:26:33,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:33,498 INFO L462 AbstractCegarLoop]: Abstraction has 29005 states and 90665 transitions. [2019-12-07 16:26:33,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:26:33,498 INFO L276 IsEmpty]: Start isEmpty. Operand 29005 states and 90665 transitions. [2019-12-07 16:26:33,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 16:26:33,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:33,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:33,527 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:33,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:33,527 INFO L82 PathProgramCache]: Analyzing trace with hash -308441065, now seen corresponding path program 2 times [2019-12-07 16:26:33,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:33,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767019341] [2019-12-07 16:26:33,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:33,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:33,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:33,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767019341] [2019-12-07 16:26:33,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:33,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:26:33,574 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1374035098] [2019-12-07 16:26:33,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:26:33,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:33,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:26:33,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:26:33,575 INFO L87 Difference]: Start difference. First operand 29005 states and 90665 transitions. Second operand 3 states. [2019-12-07 16:26:33,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:33,662 INFO L93 Difference]: Finished difference Result 27449 states and 84608 transitions. [2019-12-07 16:26:33,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:26:33,662 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 16:26:33,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:33,698 INFO L225 Difference]: With dead ends: 27449 [2019-12-07 16:26:33,699 INFO L226 Difference]: Without dead ends: 27449 [2019-12-07 16:26:33,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:26:33,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27449 states. [2019-12-07 16:26:34,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27449 to 26596. [2019-12-07 16:26:34,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26596 states. [2019-12-07 16:26:34,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26596 states to 26596 states and 82170 transitions. [2019-12-07 16:26:34,069 INFO L78 Accepts]: Start accepts. Automaton has 26596 states and 82170 transitions. Word has length 40 [2019-12-07 16:26:34,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:34,069 INFO L462 AbstractCegarLoop]: Abstraction has 26596 states and 82170 transitions. [2019-12-07 16:26:34,070 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:26:34,070 INFO L276 IsEmpty]: Start isEmpty. Operand 26596 states and 82170 transitions. [2019-12-07 16:26:34,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 16:26:34,097 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:34,097 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:34,097 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:34,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:34,097 INFO L82 PathProgramCache]: Analyzing trace with hash 797278347, now seen corresponding path program 1 times [2019-12-07 16:26:34,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:34,098 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1382617541] [2019-12-07 16:26:34,098 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:34,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:34,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:34,237 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1382617541] [2019-12-07 16:26:34,237 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:34,237 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:26:34,237 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265233400] [2019-12-07 16:26:34,237 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:26:34,237 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:34,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:26:34,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:26:34,238 INFO L87 Difference]: Start difference. First operand 26596 states and 82170 transitions. Second operand 8 states. [2019-12-07 16:26:34,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:34,782 INFO L93 Difference]: Finished difference Result 32679 states and 98703 transitions. [2019-12-07 16:26:34,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 16:26:34,782 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2019-12-07 16:26:34,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:34,819 INFO L225 Difference]: With dead ends: 32679 [2019-12-07 16:26:34,820 INFO L226 Difference]: Without dead ends: 32677 [2019-12-07 16:26:34,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:26:34,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32677 states. [2019-12-07 16:26:35,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32677 to 25844. [2019-12-07 16:26:35,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25844 states. [2019-12-07 16:26:35,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25844 states to 25844 states and 79909 transitions. [2019-12-07 16:26:35,249 INFO L78 Accepts]: Start accepts. Automaton has 25844 states and 79909 transitions. Word has length 41 [2019-12-07 16:26:35,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:35,250 INFO L462 AbstractCegarLoop]: Abstraction has 25844 states and 79909 transitions. [2019-12-07 16:26:35,250 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:26:35,250 INFO L276 IsEmpty]: Start isEmpty. Operand 25844 states and 79909 transitions. [2019-12-07 16:26:35,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 16:26:35,275 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:35,275 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:35,275 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:35,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:35,275 INFO L82 PathProgramCache]: Analyzing trace with hash -922918315, now seen corresponding path program 2 times [2019-12-07 16:26:35,276 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:35,276 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257852301] [2019-12-07 16:26:35,276 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:35,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:35,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:35,330 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257852301] [2019-12-07 16:26:35,330 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:35,331 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:26:35,331 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411516570] [2019-12-07 16:26:35,331 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:26:35,331 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:35,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:26:35,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:26:35,332 INFO L87 Difference]: Start difference. First operand 25844 states and 79909 transitions. Second operand 6 states. [2019-12-07 16:26:35,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:35,439 INFO L93 Difference]: Finished difference Result 23916 states and 75317 transitions. [2019-12-07 16:26:35,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:26:35,439 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 16:26:35,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:35,466 INFO L225 Difference]: With dead ends: 23916 [2019-12-07 16:26:35,466 INFO L226 Difference]: Without dead ends: 23542 [2019-12-07 16:26:35,466 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:26:35,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23542 states. [2019-12-07 16:26:35,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23542 to 14007. [2019-12-07 16:26:35,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14007 states. [2019-12-07 16:26:35,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14007 states to 14007 states and 44351 transitions. [2019-12-07 16:26:35,756 INFO L78 Accepts]: Start accepts. Automaton has 14007 states and 44351 transitions. Word has length 41 [2019-12-07 16:26:35,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:35,756 INFO L462 AbstractCegarLoop]: Abstraction has 14007 states and 44351 transitions. [2019-12-07 16:26:35,756 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:26:35,756 INFO L276 IsEmpty]: Start isEmpty. Operand 14007 states and 44351 transitions. [2019-12-07 16:26:35,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:35,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:35,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:35,776 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:35,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:35,776 INFO L82 PathProgramCache]: Analyzing trace with hash 852736153, now seen corresponding path program 1 times [2019-12-07 16:26:35,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:35,776 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028918236] [2019-12-07 16:26:35,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:35,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:35,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:35,814 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028918236] [2019-12-07 16:26:35,814 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:35,814 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:26:35,814 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1046464483] [2019-12-07 16:26:35,815 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:26:35,815 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:35,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:26:35,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:26:35,815 INFO L87 Difference]: Start difference. First operand 14007 states and 44351 transitions. Second operand 3 states. [2019-12-07 16:26:35,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:35,876 INFO L93 Difference]: Finished difference Result 15541 states and 47074 transitions. [2019-12-07 16:26:35,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:26:35,877 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 16:26:35,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:35,893 INFO L225 Difference]: With dead ends: 15541 [2019-12-07 16:26:35,893 INFO L226 Difference]: Without dead ends: 15541 [2019-12-07 16:26:35,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:26:35,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15541 states. [2019-12-07 16:26:36,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15541 to 12584. [2019-12-07 16:26:36,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12584 states. [2019-12-07 16:26:36,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12584 states to 12584 states and 38652 transitions. [2019-12-07 16:26:36,092 INFO L78 Accepts]: Start accepts. Automaton has 12584 states and 38652 transitions. Word has length 56 [2019-12-07 16:26:36,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:36,093 INFO L462 AbstractCegarLoop]: Abstraction has 12584 states and 38652 transitions. [2019-12-07 16:26:36,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:26:36,093 INFO L276 IsEmpty]: Start isEmpty. Operand 12584 states and 38652 transitions. [2019-12-07 16:26:36,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:36,104 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:36,104 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:36,104 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:36,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:36,105 INFO L82 PathProgramCache]: Analyzing trace with hash -415784116, now seen corresponding path program 1 times [2019-12-07 16:26:36,105 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:36,105 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [826278859] [2019-12-07 16:26:36,105 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:36,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:36,166 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:36,166 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [826278859] [2019-12-07 16:26:36,166 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:36,166 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:26:36,166 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [398539169] [2019-12-07 16:26:36,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:26:36,167 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:36,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:26:36,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:26:36,167 INFO L87 Difference]: Start difference. First operand 12584 states and 38652 transitions. Second operand 5 states. [2019-12-07 16:26:36,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:36,273 INFO L93 Difference]: Finished difference Result 28984 states and 89349 transitions. [2019-12-07 16:26:36,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:26:36,274 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-12-07 16:26:36,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:36,292 INFO L225 Difference]: With dead ends: 28984 [2019-12-07 16:26:36,292 INFO L226 Difference]: Without dead ends: 16704 [2019-12-07 16:26:36,292 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:26:36,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16704 states. [2019-12-07 16:26:36,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16704 to 10422. [2019-12-07 16:26:36,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10422 states. [2019-12-07 16:26:36,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10422 states to 10422 states and 31798 transitions. [2019-12-07 16:26:36,483 INFO L78 Accepts]: Start accepts. Automaton has 10422 states and 31798 transitions. Word has length 56 [2019-12-07 16:26:36,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:36,483 INFO L462 AbstractCegarLoop]: Abstraction has 10422 states and 31798 transitions. [2019-12-07 16:26:36,483 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:26:36,483 INFO L276 IsEmpty]: Start isEmpty. Operand 10422 states and 31798 transitions. [2019-12-07 16:26:36,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:36,492 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:36,492 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:36,492 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:36,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:36,492 INFO L82 PathProgramCache]: Analyzing trace with hash 1395977884, now seen corresponding path program 2 times [2019-12-07 16:26:36,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:36,493 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598216266] [2019-12-07 16:26:36,493 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:36,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:36,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:36,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1598216266] [2019-12-07 16:26:36,745 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:36,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:26:36,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238001554] [2019-12-07 16:26:36,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:26:36,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:36,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:26:36,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:26:36,745 INFO L87 Difference]: Start difference. First operand 10422 states and 31798 transitions. Second operand 11 states. [2019-12-07 16:26:37,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:37,531 INFO L93 Difference]: Finished difference Result 28575 states and 87662 transitions. [2019-12-07 16:26:37,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 16:26:37,531 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 16:26:37,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:37,562 INFO L225 Difference]: With dead ends: 28575 [2019-12-07 16:26:37,562 INFO L226 Difference]: Without dead ends: 27241 [2019-12-07 16:26:37,563 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 349 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=271, Invalid=1135, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 16:26:37,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27241 states. [2019-12-07 16:26:37,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27241 to 17233. [2019-12-07 16:26:37,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17233 states. [2019-12-07 16:26:37,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17233 states to 17233 states and 52926 transitions. [2019-12-07 16:26:37,892 INFO L78 Accepts]: Start accepts. Automaton has 17233 states and 52926 transitions. Word has length 56 [2019-12-07 16:26:37,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:37,892 INFO L462 AbstractCegarLoop]: Abstraction has 17233 states and 52926 transitions. [2019-12-07 16:26:37,892 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:26:37,892 INFO L276 IsEmpty]: Start isEmpty. Operand 17233 states and 52926 transitions. [2019-12-07 16:26:37,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:37,907 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:37,907 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:37,907 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:37,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:37,907 INFO L82 PathProgramCache]: Analyzing trace with hash 2017615148, now seen corresponding path program 3 times [2019-12-07 16:26:37,907 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:37,907 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842340574] [2019-12-07 16:26:37,907 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:37,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:38,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:38,405 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842340574] [2019-12-07 16:26:38,405 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:38,405 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 16:26:38,405 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182746949] [2019-12-07 16:26:38,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 16:26:38,405 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:38,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 16:26:38,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 16:26:38,406 INFO L87 Difference]: Start difference. First operand 17233 states and 52926 transitions. Second operand 15 states. [2019-12-07 16:26:42,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:42,817 INFO L93 Difference]: Finished difference Result 42284 states and 126824 transitions. [2019-12-07 16:26:42,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 16:26:42,817 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 16:26:42,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:42,854 INFO L225 Difference]: With dead ends: 42284 [2019-12-07 16:26:42,854 INFO L226 Difference]: Without dead ends: 31467 [2019-12-07 16:26:42,855 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 678 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=440, Invalid=2110, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 16:26:42,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31467 states. [2019-12-07 16:26:43,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31467 to 17890. [2019-12-07 16:26:43,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17890 states. [2019-12-07 16:26:43,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17890 states to 17890 states and 54365 transitions. [2019-12-07 16:26:43,228 INFO L78 Accepts]: Start accepts. Automaton has 17890 states and 54365 transitions. Word has length 56 [2019-12-07 16:26:43,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:43,228 INFO L462 AbstractCegarLoop]: Abstraction has 17890 states and 54365 transitions. [2019-12-07 16:26:43,228 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 16:26:43,228 INFO L276 IsEmpty]: Start isEmpty. Operand 17890 states and 54365 transitions. [2019-12-07 16:26:43,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:43,244 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:43,244 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:43,244 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:43,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:43,244 INFO L82 PathProgramCache]: Analyzing trace with hash 72457218, now seen corresponding path program 4 times [2019-12-07 16:26:43,244 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:43,244 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [48804786] [2019-12-07 16:26:43,244 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:43,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:43,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:43,366 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [48804786] [2019-12-07 16:26:43,366 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:43,366 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:26:43,366 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1532855982] [2019-12-07 16:26:43,367 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:26:43,367 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:43,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:26:43,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:26:43,367 INFO L87 Difference]: Start difference. First operand 17890 states and 54365 transitions. Second operand 12 states. [2019-12-07 16:26:44,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:44,491 INFO L93 Difference]: Finished difference Result 28460 states and 85021 transitions. [2019-12-07 16:26:44,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 16:26:44,491 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 16:26:44,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:44,515 INFO L225 Difference]: With dead ends: 28460 [2019-12-07 16:26:44,515 INFO L226 Difference]: Without dead ends: 20609 [2019-12-07 16:26:44,516 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=191, Invalid=801, Unknown=0, NotChecked=0, Total=992 [2019-12-07 16:26:44,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20609 states. [2019-12-07 16:26:44,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20609 to 16832. [2019-12-07 16:26:44,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16832 states. [2019-12-07 16:26:44,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16832 states to 16832 states and 50801 transitions. [2019-12-07 16:26:44,773 INFO L78 Accepts]: Start accepts. Automaton has 16832 states and 50801 transitions. Word has length 56 [2019-12-07 16:26:44,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:44,773 INFO L462 AbstractCegarLoop]: Abstraction has 16832 states and 50801 transitions. [2019-12-07 16:26:44,773 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:26:44,773 INFO L276 IsEmpty]: Start isEmpty. Operand 16832 states and 50801 transitions. [2019-12-07 16:26:44,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:44,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:44,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:44,788 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:44,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:44,788 INFO L82 PathProgramCache]: Analyzing trace with hash 509404522, now seen corresponding path program 5 times [2019-12-07 16:26:44,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:44,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563730210] [2019-12-07 16:26:44,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:44,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:45,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:45,050 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563730210] [2019-12-07 16:26:45,050 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:45,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 16:26:45,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [947553203] [2019-12-07 16:26:45,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 16:26:45,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:45,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 16:26:45,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:26:45,051 INFO L87 Difference]: Start difference. First operand 16832 states and 50801 transitions. Second operand 17 states. [2019-12-07 16:26:47,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:47,828 INFO L93 Difference]: Finished difference Result 20116 states and 59570 transitions. [2019-12-07 16:26:47,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 16:26:47,828 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 56 [2019-12-07 16:26:47,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:47,845 INFO L225 Difference]: With dead ends: 20116 [2019-12-07 16:26:47,846 INFO L226 Difference]: Without dead ends: 19604 [2019-12-07 16:26:47,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=188, Invalid=1002, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 16:26:47,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19604 states. [2019-12-07 16:26:48,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19604 to 17048. [2019-12-07 16:26:48,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17048 states. [2019-12-07 16:26:48,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17048 states to 17048 states and 51325 transitions. [2019-12-07 16:26:48,092 INFO L78 Accepts]: Start accepts. Automaton has 17048 states and 51325 transitions. Word has length 56 [2019-12-07 16:26:48,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:48,092 INFO L462 AbstractCegarLoop]: Abstraction has 17048 states and 51325 transitions. [2019-12-07 16:26:48,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 16:26:48,092 INFO L276 IsEmpty]: Start isEmpty. Operand 17048 states and 51325 transitions. [2019-12-07 16:26:48,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:48,107 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:48,107 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:48,107 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:48,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:48,107 INFO L82 PathProgramCache]: Analyzing trace with hash 1516360014, now seen corresponding path program 6 times [2019-12-07 16:26:48,107 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:48,107 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149366022] [2019-12-07 16:26:48,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:48,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:48,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:48,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [149366022] [2019-12-07 16:26:48,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:48,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 16:26:48,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905332514] [2019-12-07 16:26:48,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 16:26:48,474 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:48,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 16:26:48,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=268, Unknown=0, NotChecked=0, Total=306 [2019-12-07 16:26:48,475 INFO L87 Difference]: Start difference. First operand 17048 states and 51325 transitions. Second operand 18 states. [2019-12-07 16:26:50,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:50,212 INFO L93 Difference]: Finished difference Result 20451 states and 60380 transitions. [2019-12-07 16:26:50,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 16:26:50,212 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2019-12-07 16:26:50,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:50,233 INFO L225 Difference]: With dead ends: 20451 [2019-12-07 16:26:50,233 INFO L226 Difference]: Without dead ends: 20069 [2019-12-07 16:26:50,233 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 430 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=343, Invalid=1913, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 16:26:50,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20069 states. [2019-12-07 16:26:50,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20069 to 17108. [2019-12-07 16:26:50,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17108 states. [2019-12-07 16:26:50,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17108 states to 17108 states and 51519 transitions. [2019-12-07 16:26:50,490 INFO L78 Accepts]: Start accepts. Automaton has 17108 states and 51519 transitions. Word has length 56 [2019-12-07 16:26:50,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:50,490 INFO L462 AbstractCegarLoop]: Abstraction has 17108 states and 51519 transitions. [2019-12-07 16:26:50,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 16:26:50,491 INFO L276 IsEmpty]: Start isEmpty. Operand 17108 states and 51519 transitions. [2019-12-07 16:26:50,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:50,505 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:50,505 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:50,505 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:50,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:50,505 INFO L82 PathProgramCache]: Analyzing trace with hash 192528808, now seen corresponding path program 7 times [2019-12-07 16:26:50,506 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:50,506 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809324343] [2019-12-07 16:26:50,506 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:50,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:50,642 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:50,642 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809324343] [2019-12-07 16:26:50,642 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:50,642 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 16:26:50,642 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [103196379] [2019-12-07 16:26:50,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 16:26:50,643 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:50,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 16:26:50,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:26:50,643 INFO L87 Difference]: Start difference. First operand 17108 states and 51519 transitions. Second operand 12 states. [2019-12-07 16:26:52,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:52,468 INFO L93 Difference]: Finished difference Result 22920 states and 68178 transitions. [2019-12-07 16:26:52,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 16:26:52,469 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 16:26:52,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:52,492 INFO L225 Difference]: With dead ends: 22920 [2019-12-07 16:26:52,492 INFO L226 Difference]: Without dead ends: 20192 [2019-12-07 16:26:52,493 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=177, Invalid=693, Unknown=0, NotChecked=0, Total=870 [2019-12-07 16:26:52,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20192 states. [2019-12-07 16:26:52,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20192 to 16294. [2019-12-07 16:26:52,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16294 states. [2019-12-07 16:26:52,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16294 states to 16294 states and 49086 transitions. [2019-12-07 16:26:52,755 INFO L78 Accepts]: Start accepts. Automaton has 16294 states and 49086 transitions. Word has length 56 [2019-12-07 16:26:52,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:52,755 INFO L462 AbstractCegarLoop]: Abstraction has 16294 states and 49086 transitions. [2019-12-07 16:26:52,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 16:26:52,755 INFO L276 IsEmpty]: Start isEmpty. Operand 16294 states and 49086 transitions. [2019-12-07 16:26:52,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:52,769 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:52,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:52,769 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:52,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:52,770 INFO L82 PathProgramCache]: Analyzing trace with hash -136953250, now seen corresponding path program 8 times [2019-12-07 16:26:52,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:52,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634368244] [2019-12-07 16:26:52,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:52,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:26:52,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:26:52,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634368244] [2019-12-07 16:26:52,903 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:26:52,903 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:26:52,903 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119199669] [2019-12-07 16:26:52,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:26:52,903 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:26:52,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:26:52,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:26:52,904 INFO L87 Difference]: Start difference. First operand 16294 states and 49086 transitions. Second operand 13 states. [2019-12-07 16:26:54,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:26:54,522 INFO L93 Difference]: Finished difference Result 23163 states and 68530 transitions. [2019-12-07 16:26:54,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 16:26:54,523 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 56 [2019-12-07 16:26:54,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:26:54,543 INFO L225 Difference]: With dead ends: 23163 [2019-12-07 16:26:54,543 INFO L226 Difference]: Without dead ends: 20089 [2019-12-07 16:26:54,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 378 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=298, Invalid=1508, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 16:26:54,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20089 states. [2019-12-07 16:26:54,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20089 to 16016. [2019-12-07 16:26:54,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16016 states. [2019-12-07 16:26:54,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16016 states to 16016 states and 48326 transitions. [2019-12-07 16:26:54,792 INFO L78 Accepts]: Start accepts. Automaton has 16016 states and 48326 transitions. Word has length 56 [2019-12-07 16:26:54,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:26:54,792 INFO L462 AbstractCegarLoop]: Abstraction has 16016 states and 48326 transitions. [2019-12-07 16:26:54,792 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:26:54,793 INFO L276 IsEmpty]: Start isEmpty. Operand 16016 states and 48326 transitions. [2019-12-07 16:26:54,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 16:26:54,806 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:26:54,806 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:26:54,807 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:26:54,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:26:54,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1474997086, now seen corresponding path program 9 times [2019-12-07 16:26:54,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:26:54,807 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1997535843] [2019-12-07 16:26:54,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:26:54,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:26:54,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:26:54,871 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:26:54,871 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:26:54,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] ULTIMATE.startENTRY-->L821: Formula: (let ((.cse0 (store |v_#valid_70| 0 0))) (and (= 0 v_~weak$$choice0~0_31) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_191) (= v_~main$tmp_guard1~0_50 0) (= v_~x$flush_delayed~0_46 0) (= v_~weak$$choice2~0_179 0) (= v_~x$r_buff0_thd1~0_355 0) (= |v_#NULL.offset_3| 0) (= 0 v_~x$w_buff0~0_341) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_8) (= v_~main$tmp_guard0~0_45 0) (= 0 v_~x$r_buff1_thd3~0_194) (= v_~y~0_194 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t666~0.base_35| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t666~0.base_35| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t666~0.base_35|) |v_ULTIMATE.start_main_~#t666~0.offset_25| 0)) |v_#memory_int_15|) (= 0 v_~x$r_buff0_thd2~0_248) (= 0 v_~__unbuffered_cnt~0_63) (= 0 v_~x~0_215) (= v_~x$r_buff1_thd0~0_218 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= 0 v_~x$w_buff0_used~0_867) (= v_~__unbuffered_p2_EBX~0_66 0) (= v_~z~0_56 0) (= 0 v_~__unbuffered_p2_EAX~0_66) (= v_~x$r_buff0_thd0~0_151 0) (= v_~x$mem_tmp~0_33 0) (= v_~x$r_buff1_thd1~0_359 0) (= 0 v_~x$w_buff1~0_257) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t666~0.base_35|)) (= 0 |v_#NULL.base_3|) (= |v_#valid_68| (store .cse0 |v_ULTIMATE.start_main_~#t666~0.base_35| 1)) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t666~0.base_35|) (= 0 v_~x$r_buff0_thd3~0_139) (= 0 |v_ULTIMATE.start_main_~#t666~0.offset_25|) (= 0 v_~x$w_buff1_used~0_545))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t668~0.base=|v_ULTIMATE.start_main_~#t668~0.base_35|, ULTIMATE.start_main_~#t668~0.offset=|v_ULTIMATE.start_main_~#t668~0.offset_25|, ~x$w_buff0~0=v_~x$w_buff0~0_341, ~x$flush_delayed~0=v_~x$flush_delayed~0_46, #NULL.offset=|v_#NULL.offset_3|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_359, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_139, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_52|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, #length=|v_#length_17|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_66, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_66, ~x$w_buff1~0=v_~x$w_buff1~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_545, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_191, ULTIMATE.start_main_~#t667~0.offset=|v_ULTIMATE.start_main_~#t667~0.offset_25|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_31, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ULTIMATE.start_main_~#t666~0.offset=|v_ULTIMATE.start_main_~#t666~0.offset_25|, ~x~0=v_~x~0_215, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_355, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_104|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_194, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ~x$mem_tmp~0=v_~x$mem_tmp~0_33, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_49|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_66|, ~y~0=v_~y~0_194, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_23|, ULTIMATE.start_main_~#t667~0.base=|v_ULTIMATE.start_main_~#t667~0.base_35|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_45, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_218, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_248, #NULL.base=|v_#NULL.base_3|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_867, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_48|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_~#t666~0.base=|v_ULTIMATE.start_main_~#t666~0.base_35|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_68|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_11|, ~z~0=v_~z~0_56, ~weak$$choice2~0=v_~weak$$choice2~0_179, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t668~0.base, ULTIMATE.start_main_~#t668~0.offset, ~x$w_buff0~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_~#t667~0.offset, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t666~0.offset, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t667~0.base, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t666~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 16:26:54,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L821-1-->L823: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t667~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t667~0.base_13|) |v_ULTIMATE.start_main_~#t667~0.offset_11| 1)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t667~0.base_13| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t667~0.base_13| 4)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t667~0.base_13|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t667~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t667~0.offset_11|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t667~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, ULTIMATE.start_main_~#t667~0.base=|v_ULTIMATE.start_main_~#t667~0.base_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t667~0.offset=|v_ULTIMATE.start_main_~#t667~0.offset_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t667~0.base, #length, ULTIMATE.start_main_~#t667~0.offset] because there is no mapped edge [2019-12-07 16:26:54,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L823-1-->L825: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t668~0.base_12|)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t668~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t668~0.offset_10|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t668~0.base_12| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t668~0.base_12|) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t668~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t668~0.base_12|) |v_ULTIMATE.start_main_~#t668~0.offset_10| 2))) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t668~0.base_12|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t668~0.base=|v_ULTIMATE.start_main_~#t668~0.base_12|, ULTIMATE.start_main_~#t668~0.offset=|v_ULTIMATE.start_main_~#t668~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t668~0.base, ULTIMATE.start_main_~#t668~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 16:26:54,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L5-3: Formula: (and (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_107 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_57 256))))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (= |v_P1Thread1of1ForFork0_#in~arg.base_11| v_P1Thread1of1ForFork0_~arg.base_9) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (not (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11 0)) (= 1 v_~x$w_buff0_used~0_107) (= v_~x$w_buff1_used~0_57 v_~x$w_buff0_used~0_108) (= v_~x$w_buff0~0_35 v_~x$w_buff1~0_25) (= 1 v_~x$w_buff0~0_34) (= |v_P1Thread1of1ForFork0_#in~arg.offset_11| v_P1Thread1of1ForFork0_~arg.offset_9)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_35, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_11|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_108} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_34, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_9, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_9, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_11|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|, ~x$w_buff1~0=v_~x$w_buff1~0_25, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_57, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_107} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 16:26:54,876 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L798-2-->L798-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-986385627 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-986385627 256) 0))) (or (and (= ~x$w_buff1~0_In-986385627 |P2Thread1of1ForFork1_#t~ite32_Out-986385627|) (not .cse0) (not .cse1)) (and (= ~x~0_In-986385627 |P2Thread1of1ForFork1_#t~ite32_Out-986385627|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-986385627, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-986385627, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-986385627, ~x~0=~x~0_In-986385627} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-986385627|, ~x$w_buff1~0=~x$w_buff1~0_In-986385627, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-986385627, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-986385627, ~x~0=~x~0_In-986385627} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 16:26:54,877 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L798-4-->L799: Formula: (= v_~x~0_55 |v_P2Thread1of1ForFork1_#t~ite32_22|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_22|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_21|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_27|, ~x~0=v_~x~0_55} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 16:26:54,877 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L799-->L799-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-967948249 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-967948249 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-967948249 |P2Thread1of1ForFork1_#t~ite34_Out-967948249|)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out-967948249|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-967948249, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-967948249} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-967948249|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-967948249, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-967948249} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 16:26:54,877 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In775103514 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In775103514 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite28_Out775103514|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In775103514 |P1Thread1of1ForFork0_#t~ite28_Out775103514|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In775103514, ~x$w_buff0_used~0=~x$w_buff0_used~0_In775103514} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In775103514, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out775103514|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In775103514} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 16:26:54,878 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L777-->L777-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd2~0_In-647298868 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-647298868 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-647298868 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-647298868 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out-647298868| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite29_Out-647298868| ~x$w_buff1_used~0_In-647298868) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-647298868, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-647298868, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-647298868, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-647298868} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-647298868, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-647298868, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-647298868, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-647298868|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-647298868} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:26:54,878 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L740-->L740-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1398589320 256)))) (or (and .cse0 (= |P0Thread1of1ForFork2_#t~ite8_Out1398589320| ~x$w_buff0~0_In1398589320) (= |P0Thread1of1ForFork2_#t~ite8_Out1398589320| |P0Thread1of1ForFork2_#t~ite9_Out1398589320|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1398589320 256)))) (or (and (= (mod ~x$w_buff1_used~0_In1398589320 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In1398589320 256)) (and (= (mod ~x$r_buff1_thd1~0_In1398589320 256) 0) .cse1)))) (and (not .cse0) (= ~x$w_buff0~0_In1398589320 |P0Thread1of1ForFork2_#t~ite9_Out1398589320|) (= |P0Thread1of1ForFork2_#t~ite8_In1398589320| |P0Thread1of1ForFork2_#t~ite8_Out1398589320|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In1398589320, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1398589320, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In1398589320|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1398589320, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1398589320, ~weak$$choice2~0=~weak$$choice2~0_In1398589320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1398589320} OutVars{~x$w_buff0~0=~x$w_buff0~0_In1398589320, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1398589320, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out1398589320|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1398589320, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out1398589320|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1398589320, ~weak$$choice2~0=~weak$$choice2~0_In1398589320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1398589320} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 16:26:54,879 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L778-->L779: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_In-2002713524 ~x$r_buff0_thd2~0_Out-2002713524)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-2002713524 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-2002713524 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (= 0 ~x$r_buff0_thd2~0_Out-2002713524) (not .cse1) (not .cse2)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2002713524, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2002713524} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-2002713524|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-2002713524, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2002713524} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 16:26:54,880 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In458564793 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In458564793 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In458564793 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In458564793 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out458564793| ~x$r_buff1_thd2~0_In458564793)) (and (= |P1Thread1of1ForFork0_#t~ite31_Out458564793| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In458564793, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In458564793, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In458564793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In458564793} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out458564793|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In458564793, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In458564793, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In458564793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In458564793} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:26:54,880 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_40 |v_P1Thread1of1ForFork0_#t~ite31_24|) (= v_~__unbuffered_cnt~0_34 (+ v_~__unbuffered_cnt~0_35 1)) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_23|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_40, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 16:26:54,880 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1769998283 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite18_Out-1769998283| ~x$w_buff1_used~0_In-1769998283) (= |P0Thread1of1ForFork2_#t~ite17_In-1769998283| |P0Thread1of1ForFork2_#t~ite17_Out-1769998283|)) (and .cse0 (= |P0Thread1of1ForFork2_#t~ite17_Out-1769998283| ~x$w_buff1_used~0_In-1769998283) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1769998283 256)))) (or (= 0 (mod ~x$w_buff0_used~0_In-1769998283 256)) (and (= 0 (mod ~x$w_buff1_used~0_In-1769998283 256)) .cse1) (and (= (mod ~x$r_buff1_thd1~0_In-1769998283 256) 0) .cse1))) (= |P0Thread1of1ForFork2_#t~ite18_Out-1769998283| |P0Thread1of1ForFork2_#t~ite17_Out-1769998283|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1769998283, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-1769998283|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1769998283, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1769998283, ~weak$$choice2~0=~weak$$choice2~0_In-1769998283, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1769998283} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1769998283, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-1769998283|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-1769998283|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1769998283, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1769998283, ~weak$$choice2~0=~weak$$choice2~0_In-1769998283, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1769998283} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 16:26:54,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L744-->L745: Formula: (and (not (= (mod v_~weak$$choice2~0_45 256) 0)) (= v_~x$r_buff0_thd1~0_116 v_~x$r_buff0_thd1~0_115)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_116, ~weak$$choice2~0=v_~weak$$choice2~0_45} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_45, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 16:26:54,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L745-->L745-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-357438716 256)))) (or (and (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-357438716 256) 0))) (or (and .cse0 (= (mod ~x$w_buff1_used~0_In-357438716 256) 0)) (and (= 0 (mod ~x$r_buff1_thd1~0_In-357438716 256)) .cse0) (= (mod ~x$w_buff0_used~0_In-357438716 256) 0))) .cse1 (= |P0Thread1of1ForFork2_#t~ite23_Out-357438716| |P0Thread1of1ForFork2_#t~ite24_Out-357438716|) (= ~x$r_buff1_thd1~0_In-357438716 |P0Thread1of1ForFork2_#t~ite23_Out-357438716|)) (and (not .cse1) (= ~x$r_buff1_thd1~0_In-357438716 |P0Thread1of1ForFork2_#t~ite24_Out-357438716|) (= |P0Thread1of1ForFork2_#t~ite23_In-357438716| |P0Thread1of1ForFork2_#t~ite23_Out-357438716|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-357438716, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-357438716, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-357438716, ~weak$$choice2~0=~weak$$choice2~0_In-357438716, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-357438716|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-357438716} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-357438716, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-357438716, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-357438716, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-357438716|, ~weak$$choice2~0=~weak$$choice2~0_In-357438716, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-357438716|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-357438716} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 16:26:54,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L747-->L755: Formula: (and (= 0 v_~x$flush_delayed~0_9) (= v_~x$mem_tmp~0_7 v_~x~0_28) (not (= 0 (mod v_~x$flush_delayed~0_10 256))) (= v_~__unbuffered_cnt~0_13 (+ v_~__unbuffered_cnt~0_14 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_10, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~x$mem_tmp~0=v_~x$mem_tmp~0_7} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_5|, ~x$flush_delayed~0=v_~x$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_7, ~x~0=v_~x~0_28} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 16:26:54,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L800-->L800-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In-1822479151 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1822479151 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1822479151 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1822479151 256)))) (or (and (= ~x$w_buff1_used~0_In-1822479151 |P2Thread1of1ForFork1_#t~ite35_Out-1822479151|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork1_#t~ite35_Out-1822479151|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1822479151, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1822479151, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1822479151, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1822479151} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-1822479151|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1822479151, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1822479151, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1822479151, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1822479151} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 16:26:54,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1007271327 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1007271327 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1007271327| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1007271327| ~x$r_buff0_thd3~0_In-1007271327) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1007271327, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1007271327} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-1007271327|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1007271327, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1007271327} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 16:26:54,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1397009743 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In1397009743 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1397009743 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1397009743 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out1397009743| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite37_Out1397009743| ~x$r_buff1_thd3~0_In1397009743) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1397009743, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1397009743, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1397009743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1397009743} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1397009743|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1397009743, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1397009743, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1397009743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1397009743} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 16:26:54,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L802-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= |v_P2Thread1of1ForFork1_#t~ite37_28| v_~x$r_buff1_thd3~0_133)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 16:26:54,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L829-->L831-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= (mod v_~x$r_buff0_thd0~0_28 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:26:54,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L831-2-->L831-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In865079167 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd0~0_In865079167 256) 0))) (or (and (or .cse0 .cse1) (= ~x~0_In865079167 |ULTIMATE.start_main_#t~ite41_Out865079167|)) (and (= |ULTIMATE.start_main_#t~ite41_Out865079167| ~x$w_buff1~0_In865079167) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In865079167, ~x$w_buff1_used~0=~x$w_buff1_used~0_In865079167, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In865079167, ~x~0=~x~0_In865079167} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out865079167|, ~x$w_buff1~0=~x$w_buff1~0_In865079167, ~x$w_buff1_used~0=~x$w_buff1_used~0_In865079167, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In865079167, ~x~0=~x~0_In865079167} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 16:26:54,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L831-4-->L832: Formula: (= v_~x~0_17 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 16:26:54,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L832-->L832-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1077331589 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1077331589 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite43_Out1077331589| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite43_Out1077331589| ~x$w_buff0_used~0_In1077331589)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1077331589, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1077331589} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1077331589, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out1077331589|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1077331589} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 16:26:54,884 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In1649344722 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1649344722 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1649344722 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In1649344722 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite44_Out1649344722|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1649344722 |ULTIMATE.start_main_#t~ite44_Out1649344722|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1649344722, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1649344722, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1649344722, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1649344722} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1649344722, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1649344722, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1649344722, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1649344722|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1649344722} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 16:26:54,884 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L834-->L834-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-779855956 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-779855956 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out-779855956| ~x$r_buff0_thd0~0_In-779855956)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out-779855956|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-779855956, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-779855956} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-779855956, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-779855956|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-779855956} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 16:26:54,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L835-->L835-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In1195735004 256))) (.cse2 (= (mod ~x$r_buff0_thd0~0_In1195735004 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1195735004 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1195735004 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite46_Out1195735004|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd0~0_In1195735004 |ULTIMATE.start_main_#t~ite46_Out1195735004|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1195735004, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1195735004, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1195735004, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1195735004} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1195735004, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1195735004|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1195735004, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1195735004, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1195735004} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 16:26:54,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L835-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~x$r_buff1_thd0~0_177 |v_ULTIMATE.start_main_#t~ite46_58|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_18|) (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_32 0) (= 2 v_~__unbuffered_p2_EAX~0_32) (= v_~y~0_146 2) (= 0 v_~__unbuffered_p0_EAX~0_49))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_18| (mod v_~main$tmp_guard1~0_25 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_49, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~y~0=v_~y~0_146} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_49, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~y~0=v_~y~0_146, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_18|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:26:54,932 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:26:54 BasicIcfg [2019-12-07 16:26:54,932 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:26:54,932 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:26:54,932 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:26:54,932 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:26:54,933 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:24:38" (3/4) ... [2019-12-07 16:26:54,934 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:26:54,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] ULTIMATE.startENTRY-->L821: Formula: (let ((.cse0 (store |v_#valid_70| 0 0))) (and (= 0 v_~weak$$choice0~0_31) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_191) (= v_~main$tmp_guard1~0_50 0) (= v_~x$flush_delayed~0_46 0) (= v_~weak$$choice2~0_179 0) (= v_~x$r_buff0_thd1~0_355 0) (= |v_#NULL.offset_3| 0) (= 0 v_~x$w_buff0~0_341) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_8) (= v_~main$tmp_guard0~0_45 0) (= 0 v_~x$r_buff1_thd3~0_194) (= v_~y~0_194 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t666~0.base_35| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t666~0.base_35| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t666~0.base_35|) |v_ULTIMATE.start_main_~#t666~0.offset_25| 0)) |v_#memory_int_15|) (= 0 v_~x$r_buff0_thd2~0_248) (= 0 v_~__unbuffered_cnt~0_63) (= 0 v_~x~0_215) (= v_~x$r_buff1_thd0~0_218 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= 0 v_~x$w_buff0_used~0_867) (= v_~__unbuffered_p2_EBX~0_66 0) (= v_~z~0_56 0) (= 0 v_~__unbuffered_p2_EAX~0_66) (= v_~x$r_buff0_thd0~0_151 0) (= v_~x$mem_tmp~0_33 0) (= v_~x$r_buff1_thd1~0_359 0) (= 0 v_~x$w_buff1~0_257) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t666~0.base_35|)) (= 0 |v_#NULL.base_3|) (= |v_#valid_68| (store .cse0 |v_ULTIMATE.start_main_~#t666~0.base_35| 1)) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t666~0.base_35|) (= 0 v_~x$r_buff0_thd3~0_139) (= 0 |v_ULTIMATE.start_main_~#t666~0.offset_25|) (= 0 v_~x$w_buff1_used~0_545))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t668~0.base=|v_ULTIMATE.start_main_~#t668~0.base_35|, ULTIMATE.start_main_~#t668~0.offset=|v_ULTIMATE.start_main_~#t668~0.offset_25|, ~x$w_buff0~0=v_~x$w_buff0~0_341, ~x$flush_delayed~0=v_~x$flush_delayed~0_46, #NULL.offset=|v_#NULL.offset_3|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_359, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_139, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_52|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, #length=|v_#length_17|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_66, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_66, ~x$w_buff1~0=v_~x$w_buff1~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_545, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_191, ULTIMATE.start_main_~#t667~0.offset=|v_ULTIMATE.start_main_~#t667~0.offset_25|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_31, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ULTIMATE.start_main_~#t666~0.offset=|v_ULTIMATE.start_main_~#t666~0.offset_25|, ~x~0=v_~x~0_215, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_355, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_104|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_194, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ~x$mem_tmp~0=v_~x$mem_tmp~0_33, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_49|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_66|, ~y~0=v_~y~0_194, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_23|, ULTIMATE.start_main_~#t667~0.base=|v_ULTIMATE.start_main_~#t667~0.base_35|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_45, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_218, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_248, #NULL.base=|v_#NULL.base_3|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_867, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_48|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_~#t666~0.base=|v_ULTIMATE.start_main_~#t666~0.base_35|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_68|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_11|, ~z~0=v_~z~0_56, ~weak$$choice2~0=v_~weak$$choice2~0_179, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t668~0.base, ULTIMATE.start_main_~#t668~0.offset, ~x$w_buff0~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_~#t667~0.offset, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t666~0.offset, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t667~0.base, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t666~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 16:26:54,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L821-1-->L823: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t667~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t667~0.base_13|) |v_ULTIMATE.start_main_~#t667~0.offset_11| 1)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t667~0.base_13| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t667~0.base_13| 4)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t667~0.base_13|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t667~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t667~0.offset_11|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t667~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, ULTIMATE.start_main_~#t667~0.base=|v_ULTIMATE.start_main_~#t667~0.base_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t667~0.offset=|v_ULTIMATE.start_main_~#t667~0.offset_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t667~0.base, #length, ULTIMATE.start_main_~#t667~0.offset] because there is no mapped edge [2019-12-07 16:26:54,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L823-1-->L825: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t668~0.base_12|)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t668~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t668~0.offset_10|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t668~0.base_12| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t668~0.base_12|) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t668~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t668~0.base_12|) |v_ULTIMATE.start_main_~#t668~0.offset_10| 2))) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t668~0.base_12|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t668~0.base=|v_ULTIMATE.start_main_~#t668~0.base_12|, ULTIMATE.start_main_~#t668~0.offset=|v_ULTIMATE.start_main_~#t668~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t668~0.base, ULTIMATE.start_main_~#t668~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 16:26:54,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L5-3: Formula: (and (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_107 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_57 256))))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (= |v_P1Thread1of1ForFork0_#in~arg.base_11| v_P1Thread1of1ForFork0_~arg.base_9) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (not (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11 0)) (= 1 v_~x$w_buff0_used~0_107) (= v_~x$w_buff1_used~0_57 v_~x$w_buff0_used~0_108) (= v_~x$w_buff0~0_35 v_~x$w_buff1~0_25) (= 1 v_~x$w_buff0~0_34) (= |v_P1Thread1of1ForFork0_#in~arg.offset_11| v_P1Thread1of1ForFork0_~arg.offset_9)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_35, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_11|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_108} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_34, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_9, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_9, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_11|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|, ~x$w_buff1~0=v_~x$w_buff1~0_25, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_57, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_107} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 16:26:54,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L798-2-->L798-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-986385627 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-986385627 256) 0))) (or (and (= ~x$w_buff1~0_In-986385627 |P2Thread1of1ForFork1_#t~ite32_Out-986385627|) (not .cse0) (not .cse1)) (and (= ~x~0_In-986385627 |P2Thread1of1ForFork1_#t~ite32_Out-986385627|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-986385627, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-986385627, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-986385627, ~x~0=~x~0_In-986385627} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-986385627|, ~x$w_buff1~0=~x$w_buff1~0_In-986385627, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-986385627, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-986385627, ~x~0=~x~0_In-986385627} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 16:26:54,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L798-4-->L799: Formula: (= v_~x~0_55 |v_P2Thread1of1ForFork1_#t~ite32_22|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_22|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_21|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_27|, ~x~0=v_~x~0_55} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 16:26:54,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L799-->L799-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-967948249 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-967948249 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-967948249 |P2Thread1of1ForFork1_#t~ite34_Out-967948249|)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out-967948249|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-967948249, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-967948249} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-967948249|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-967948249, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-967948249} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 16:26:54,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In775103514 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In775103514 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite28_Out775103514|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In775103514 |P1Thread1of1ForFork0_#t~ite28_Out775103514|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In775103514, ~x$w_buff0_used~0=~x$w_buff0_used~0_In775103514} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In775103514, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out775103514|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In775103514} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 16:26:54,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L777-->L777-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd2~0_In-647298868 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-647298868 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-647298868 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-647298868 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out-647298868| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite29_Out-647298868| ~x$w_buff1_used~0_In-647298868) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-647298868, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-647298868, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-647298868, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-647298868} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-647298868, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-647298868, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-647298868, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-647298868|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-647298868} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:26:54,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L740-->L740-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1398589320 256)))) (or (and .cse0 (= |P0Thread1of1ForFork2_#t~ite8_Out1398589320| ~x$w_buff0~0_In1398589320) (= |P0Thread1of1ForFork2_#t~ite8_Out1398589320| |P0Thread1of1ForFork2_#t~ite9_Out1398589320|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1398589320 256)))) (or (and (= (mod ~x$w_buff1_used~0_In1398589320 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In1398589320 256)) (and (= (mod ~x$r_buff1_thd1~0_In1398589320 256) 0) .cse1)))) (and (not .cse0) (= ~x$w_buff0~0_In1398589320 |P0Thread1of1ForFork2_#t~ite9_Out1398589320|) (= |P0Thread1of1ForFork2_#t~ite8_In1398589320| |P0Thread1of1ForFork2_#t~ite8_Out1398589320|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In1398589320, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1398589320, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In1398589320|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1398589320, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1398589320, ~weak$$choice2~0=~weak$$choice2~0_In1398589320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1398589320} OutVars{~x$w_buff0~0=~x$w_buff0~0_In1398589320, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1398589320, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out1398589320|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1398589320, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out1398589320|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1398589320, ~weak$$choice2~0=~weak$$choice2~0_In1398589320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1398589320} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 16:26:54,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L778-->L779: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_In-2002713524 ~x$r_buff0_thd2~0_Out-2002713524)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-2002713524 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-2002713524 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (= 0 ~x$r_buff0_thd2~0_Out-2002713524) (not .cse1) (not .cse2)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2002713524, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2002713524} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-2002713524|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-2002713524, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2002713524} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 16:26:54,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In458564793 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In458564793 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In458564793 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In458564793 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out458564793| ~x$r_buff1_thd2~0_In458564793)) (and (= |P1Thread1of1ForFork0_#t~ite31_Out458564793| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In458564793, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In458564793, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In458564793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In458564793} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out458564793|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In458564793, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In458564793, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In458564793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In458564793} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:26:54,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_40 |v_P1Thread1of1ForFork0_#t~ite31_24|) (= v_~__unbuffered_cnt~0_34 (+ v_~__unbuffered_cnt~0_35 1)) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_23|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_40, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 16:26:54,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1769998283 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite18_Out-1769998283| ~x$w_buff1_used~0_In-1769998283) (= |P0Thread1of1ForFork2_#t~ite17_In-1769998283| |P0Thread1of1ForFork2_#t~ite17_Out-1769998283|)) (and .cse0 (= |P0Thread1of1ForFork2_#t~ite17_Out-1769998283| ~x$w_buff1_used~0_In-1769998283) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1769998283 256)))) (or (= 0 (mod ~x$w_buff0_used~0_In-1769998283 256)) (and (= 0 (mod ~x$w_buff1_used~0_In-1769998283 256)) .cse1) (and (= (mod ~x$r_buff1_thd1~0_In-1769998283 256) 0) .cse1))) (= |P0Thread1of1ForFork2_#t~ite18_Out-1769998283| |P0Thread1of1ForFork2_#t~ite17_Out-1769998283|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1769998283, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-1769998283|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1769998283, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1769998283, ~weak$$choice2~0=~weak$$choice2~0_In-1769998283, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1769998283} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1769998283, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-1769998283|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-1769998283|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1769998283, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1769998283, ~weak$$choice2~0=~weak$$choice2~0_In-1769998283, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1769998283} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 16:26:54,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L744-->L745: Formula: (and (not (= (mod v_~weak$$choice2~0_45 256) 0)) (= v_~x$r_buff0_thd1~0_116 v_~x$r_buff0_thd1~0_115)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_116, ~weak$$choice2~0=v_~weak$$choice2~0_45} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_45, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 16:26:54,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L745-->L745-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-357438716 256)))) (or (and (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-357438716 256) 0))) (or (and .cse0 (= (mod ~x$w_buff1_used~0_In-357438716 256) 0)) (and (= 0 (mod ~x$r_buff1_thd1~0_In-357438716 256)) .cse0) (= (mod ~x$w_buff0_used~0_In-357438716 256) 0))) .cse1 (= |P0Thread1of1ForFork2_#t~ite23_Out-357438716| |P0Thread1of1ForFork2_#t~ite24_Out-357438716|) (= ~x$r_buff1_thd1~0_In-357438716 |P0Thread1of1ForFork2_#t~ite23_Out-357438716|)) (and (not .cse1) (= ~x$r_buff1_thd1~0_In-357438716 |P0Thread1of1ForFork2_#t~ite24_Out-357438716|) (= |P0Thread1of1ForFork2_#t~ite23_In-357438716| |P0Thread1of1ForFork2_#t~ite23_Out-357438716|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-357438716, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-357438716, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-357438716, ~weak$$choice2~0=~weak$$choice2~0_In-357438716, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-357438716|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-357438716} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-357438716, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-357438716, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-357438716, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-357438716|, ~weak$$choice2~0=~weak$$choice2~0_In-357438716, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-357438716|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-357438716} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 16:26:54,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L747-->L755: Formula: (and (= 0 v_~x$flush_delayed~0_9) (= v_~x$mem_tmp~0_7 v_~x~0_28) (not (= 0 (mod v_~x$flush_delayed~0_10 256))) (= v_~__unbuffered_cnt~0_13 (+ v_~__unbuffered_cnt~0_14 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_10, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~x$mem_tmp~0=v_~x$mem_tmp~0_7} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_5|, ~x$flush_delayed~0=v_~x$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_7, ~x~0=v_~x~0_28} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 16:26:54,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L800-->L800-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In-1822479151 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1822479151 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1822479151 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1822479151 256)))) (or (and (= ~x$w_buff1_used~0_In-1822479151 |P2Thread1of1ForFork1_#t~ite35_Out-1822479151|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork1_#t~ite35_Out-1822479151|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1822479151, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1822479151, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1822479151, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1822479151} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-1822479151|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1822479151, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1822479151, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1822479151, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1822479151} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 16:26:54,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1007271327 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1007271327 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1007271327| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1007271327| ~x$r_buff0_thd3~0_In-1007271327) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1007271327, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1007271327} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-1007271327|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1007271327, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1007271327} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 16:26:54,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1397009743 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In1397009743 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1397009743 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1397009743 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out1397009743| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite37_Out1397009743| ~x$r_buff1_thd3~0_In1397009743) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1397009743, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1397009743, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1397009743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1397009743} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1397009743|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1397009743, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1397009743, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1397009743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1397009743} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 16:26:54,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L802-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= |v_P2Thread1of1ForFork1_#t~ite37_28| v_~x$r_buff1_thd3~0_133)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 16:26:54,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L829-->L831-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= (mod v_~x$r_buff0_thd0~0_28 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:26:54,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L831-2-->L831-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In865079167 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd0~0_In865079167 256) 0))) (or (and (or .cse0 .cse1) (= ~x~0_In865079167 |ULTIMATE.start_main_#t~ite41_Out865079167|)) (and (= |ULTIMATE.start_main_#t~ite41_Out865079167| ~x$w_buff1~0_In865079167) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In865079167, ~x$w_buff1_used~0=~x$w_buff1_used~0_In865079167, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In865079167, ~x~0=~x~0_In865079167} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out865079167|, ~x$w_buff1~0=~x$w_buff1~0_In865079167, ~x$w_buff1_used~0=~x$w_buff1_used~0_In865079167, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In865079167, ~x~0=~x~0_In865079167} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 16:26:54,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L831-4-->L832: Formula: (= v_~x~0_17 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 16:26:54,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L832-->L832-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1077331589 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1077331589 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite43_Out1077331589| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite43_Out1077331589| ~x$w_buff0_used~0_In1077331589)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1077331589, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1077331589} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1077331589, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out1077331589|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1077331589} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 16:26:54,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In1649344722 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1649344722 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1649344722 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In1649344722 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite44_Out1649344722|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1649344722 |ULTIMATE.start_main_#t~ite44_Out1649344722|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1649344722, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1649344722, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1649344722, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1649344722} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1649344722, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1649344722, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1649344722, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1649344722|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1649344722} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 16:26:54,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L834-->L834-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-779855956 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-779855956 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out-779855956| ~x$r_buff0_thd0~0_In-779855956)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out-779855956|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-779855956, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-779855956} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-779855956, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-779855956|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-779855956} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 16:26:54,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L835-->L835-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In1195735004 256))) (.cse2 (= (mod ~x$r_buff0_thd0~0_In1195735004 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1195735004 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1195735004 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite46_Out1195735004|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd0~0_In1195735004 |ULTIMATE.start_main_#t~ite46_Out1195735004|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1195735004, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1195735004, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1195735004, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1195735004} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1195735004, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1195735004|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1195735004, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1195735004, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1195735004} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 16:26:54,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L835-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~x$r_buff1_thd0~0_177 |v_ULTIMATE.start_main_#t~ite46_58|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_18|) (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_32 0) (= 2 v_~__unbuffered_p2_EAX~0_32) (= v_~y~0_146 2) (= 0 v_~__unbuffered_p0_EAX~0_49))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_18| (mod v_~main$tmp_guard1~0_25 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_49, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~y~0=v_~y~0_146} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_49, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~y~0=v_~y~0_146, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_18|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:26:54,992 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_3de64f13-35b8-42ed-8e67-d5f1f7a98ab3/bin/uautomizer/witness.graphml [2019-12-07 16:26:54,993 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:26:54,994 INFO L168 Benchmark]: Toolchain (without parser) took 137023.35 ms. Allocated memory was 1.0 GB in the beginning and 8.4 GB in the end (delta: 7.4 GB). Free memory was 934.0 MB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. [2019-12-07 16:26:54,994 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:26:54,994 INFO L168 Benchmark]: CACSL2BoogieTranslator took 376.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.6 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -132.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 16:26:54,994 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:26:54,995 INFO L168 Benchmark]: Boogie Preprocessor took 24.56 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:26:54,995 INFO L168 Benchmark]: RCFGBuilder took 395.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. [2019-12-07 16:26:54,995 INFO L168 Benchmark]: TraceAbstraction took 136126.72 ms. Allocated memory was 1.1 GB in the beginning and 8.4 GB in the end (delta: 7.3 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 16:26:54,995 INFO L168 Benchmark]: Witness Printer took 60.35 ms. Allocated memory is still 8.4 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 44.5 MB). Peak memory consumption was 44.5 MB. Max. memory is 11.5 GB. [2019-12-07 16:26:54,997 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 376.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.6 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -132.4 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.56 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 395.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 136126.72 ms. Allocated memory was 1.1 GB in the beginning and 8.4 GB in the end (delta: 7.3 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. * Witness Printer took 60.35 ms. Allocated memory is still 8.4 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 44.5 MB). Peak memory consumption was 44.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 8 FixpointIterations, 33 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 26 ChoiceCompositions, 6794 VarBasedMoverChecksPositive, 260 VarBasedMoverChecksNegative, 81 SemBasedMoverChecksPositive, 256 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 73051 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L821] FCALL, FORK 0 pthread_create(&t666, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L823] FCALL, FORK 0 pthread_create(&t667, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L825] FCALL, FORK 0 pthread_create(&t668, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L789] 3 y = 2 [L792] 3 __unbuffered_p2_EAX = y [L795] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=0] [L798] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=0] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L732] 1 z = 1 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L799] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L800] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L801] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L827] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L832] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L833] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L834] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 135.9s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 36.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5466 SDtfs, 7705 SDslu, 19195 SDs, 0 SdLazy, 18078 SolverSat, 442 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 11.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 429 GetRequests, 46 SyntacticMatches, 23 SemanticMatches, 360 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2373 ImplicationChecksByTransitivity, 4.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=268284occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 83.8s AutomataMinimizationTime, 29 MinimizatonAttempts, 321243 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 1040 NumberOfCodeBlocks, 1040 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 955 ConstructedInterpolants, 0 QuantifiedInterpolants, 274930 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...