./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix025_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix025_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2dd793b1f4f49f659d6d0e32dad73188a8c90523 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:49:27,795 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:49:27,796 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:49:27,803 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:49:27,804 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:49:27,804 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:49:27,805 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:49:27,807 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:49:27,808 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:49:27,808 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:49:27,809 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:49:27,810 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:49:27,810 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:49:27,811 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:49:27,811 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:49:27,812 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:49:27,813 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:49:27,813 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:49:27,815 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:49:27,816 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:49:27,817 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:49:27,818 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:49:27,819 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:49:27,819 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:49:27,821 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:49:27,821 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:49:27,821 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:49:27,822 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:49:27,822 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:49:27,823 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:49:27,823 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:49:27,823 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:49:27,824 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:49:27,824 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:49:27,825 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:49:27,825 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:49:27,825 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:49:27,825 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:49:27,825 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:49:27,826 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:49:27,826 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:49:27,827 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:49:27,836 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:49:27,836 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:49:27,837 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:49:27,837 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:49:27,837 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:49:27,837 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:49:27,837 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:49:27,837 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:49:27,837 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:49:27,837 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:49:27,838 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:49:27,838 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:49:27,838 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:49:27,838 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:49:27,838 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:49:27,838 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:49:27,838 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:49:27,838 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:49:27,839 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:49:27,839 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:49:27,839 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:49:27,839 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:49:27,839 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:49:27,839 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:49:27,839 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:49:27,839 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:49:27,839 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:49:27,840 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:49:27,840 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:49:27,840 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2dd793b1f4f49f659d6d0e32dad73188a8c90523 [2019-12-07 13:49:27,943 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:49:27,951 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:49:27,953 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:49:27,954 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:49:27,954 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:49:27,955 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix025_rmo.oepc.i [2019-12-07 13:49:27,991 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/data/294d3a4e9/2a658c96b3ce4e1686561cf857aabdf3/FLAG5fbcccea1 [2019-12-07 13:49:28,456 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:49:28,456 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/sv-benchmarks/c/pthread-wmm/mix025_rmo.oepc.i [2019-12-07 13:49:28,466 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/data/294d3a4e9/2a658c96b3ce4e1686561cf857aabdf3/FLAG5fbcccea1 [2019-12-07 13:49:28,475 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/data/294d3a4e9/2a658c96b3ce4e1686561cf857aabdf3 [2019-12-07 13:49:28,477 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:49:28,478 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:49:28,478 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:49:28,479 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:49:28,481 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:49:28,481 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,483 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28, skipping insertion in model container [2019-12-07 13:49:28,483 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,488 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:49:28,518 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:49:28,793 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:49:28,801 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:49:28,846 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:49:28,894 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:49:28,894 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28 WrapperNode [2019-12-07 13:49:28,894 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:49:28,895 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:49:28,895 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:49:28,895 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:49:28,900 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,914 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,932 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:49:28,932 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:49:28,932 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:49:28,932 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:49:28,938 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,939 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,942 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,942 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,949 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,952 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,954 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... [2019-12-07 13:49:28,957 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:49:28,957 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:49:28,957 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:49:28,957 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:49:28,958 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:49:28,997 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:49:28,997 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:49:28,997 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:49:28,997 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:49:28,997 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:49:28,997 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:49:28,997 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:49:28,997 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:49:28,997 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:49:28,997 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:49:28,998 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:49:28,998 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:49:28,998 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:49:28,999 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:49:29,349 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:49:29,349 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:49:29,350 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:49:29 BoogieIcfgContainer [2019-12-07 13:49:29,350 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:49:29,350 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:49:29,350 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:49:29,352 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:49:29,352 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:49:28" (1/3) ... [2019-12-07 13:49:29,353 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@77668a8c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:49:29, skipping insertion in model container [2019-12-07 13:49:29,353 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:49:28" (2/3) ... [2019-12-07 13:49:29,353 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@77668a8c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:49:29, skipping insertion in model container [2019-12-07 13:49:29,354 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:49:29" (3/3) ... [2019-12-07 13:49:29,355 INFO L109 eAbstractionObserver]: Analyzing ICFG mix025_rmo.oepc.i [2019-12-07 13:49:29,361 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:49:29,361 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:49:29,366 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:49:29,367 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:49:29,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,391 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,391 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,391 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,392 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,392 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,396 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,396 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,397 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,397 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,397 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,397 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,397 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,397 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,398 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,398 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,398 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,398 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,398 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,399 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,399 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,399 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,399 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,399 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,400 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,400 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,400 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,400 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,400 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,400 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,401 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,401 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,401 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,401 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,401 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,401 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,403 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,403 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,406 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,406 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,406 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,406 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,406 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,406 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,407 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,407 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,407 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,407 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,407 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,407 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:49:29,432 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:49:29,445 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:49:29,445 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:49:29,445 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:49:29,445 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:49:29,445 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:49:29,445 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:49:29,445 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:49:29,445 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:49:29,456 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 13:49:29,457 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 13:49:29,513 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 13:49:29,513 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:49:29,523 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:49:29,540 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 13:49:29,571 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 13:49:29,571 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:49:29,576 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:49:29,591 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:49:29,592 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:49:32,455 WARN L192 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 13:49:32,708 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130103 [2019-12-07 13:49:32,709 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 13:49:32,711 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 105 transitions [2019-12-07 13:49:50,485 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 122102 states. [2019-12-07 13:49:50,487 INFO L276 IsEmpty]: Start isEmpty. Operand 122102 states. [2019-12-07 13:49:50,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:49:50,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:49:50,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:49:50,491 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:49:50,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:49:50,495 INFO L82 PathProgramCache]: Analyzing trace with hash 913940, now seen corresponding path program 1 times [2019-12-07 13:49:50,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:49:50,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1329968398] [2019-12-07 13:49:50,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:49:50,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:49:50,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:49:50,635 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1329968398] [2019-12-07 13:49:50,636 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:49:50,636 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:49:50,636 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [493417140] [2019-12-07 13:49:50,639 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:49:50,639 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:49:50,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:49:50,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:49:50,650 INFO L87 Difference]: Start difference. First operand 122102 states. Second operand 3 states. [2019-12-07 13:49:51,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:49:51,391 INFO L93 Difference]: Finished difference Result 121140 states and 517588 transitions. [2019-12-07 13:49:51,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:49:51,392 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:49:51,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:49:51,929 INFO L225 Difference]: With dead ends: 121140 [2019-12-07 13:49:51,930 INFO L226 Difference]: Without dead ends: 107958 [2019-12-07 13:49:51,930 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:49:56,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107958 states. [2019-12-07 13:49:57,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107958 to 107958. [2019-12-07 13:49:57,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107958 states. [2019-12-07 13:49:59,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107958 states to 107958 states and 460128 transitions. [2019-12-07 13:49:59,769 INFO L78 Accepts]: Start accepts. Automaton has 107958 states and 460128 transitions. Word has length 3 [2019-12-07 13:49:59,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:49:59,769 INFO L462 AbstractCegarLoop]: Abstraction has 107958 states and 460128 transitions. [2019-12-07 13:49:59,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:49:59,770 INFO L276 IsEmpty]: Start isEmpty. Operand 107958 states and 460128 transitions. [2019-12-07 13:49:59,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:49:59,773 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:49:59,773 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:49:59,773 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:49:59,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:49:59,774 INFO L82 PathProgramCache]: Analyzing trace with hash 2082409598, now seen corresponding path program 1 times [2019-12-07 13:49:59,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:49:59,774 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237102223] [2019-12-07 13:49:59,774 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:49:59,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:49:59,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:49:59,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [237102223] [2019-12-07 13:49:59,832 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:49:59,832 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:49:59,832 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901379757] [2019-12-07 13:49:59,833 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:49:59,833 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:49:59,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:49:59,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:49:59,834 INFO L87 Difference]: Start difference. First operand 107958 states and 460128 transitions. Second operand 4 states. [2019-12-07 13:50:00,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:00,791 INFO L93 Difference]: Finished difference Result 172022 states and 703369 transitions. [2019-12-07 13:50:00,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:50:00,791 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:50:00,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:01,236 INFO L225 Difference]: With dead ends: 172022 [2019-12-07 13:50:01,236 INFO L226 Difference]: Without dead ends: 171924 [2019-12-07 13:50:01,236 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:06,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171924 states. [2019-12-07 13:50:08,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171924 to 156115. [2019-12-07 13:50:08,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156115 states. [2019-12-07 13:50:09,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156115 states to 156115 states and 647087 transitions. [2019-12-07 13:50:09,112 INFO L78 Accepts]: Start accepts. Automaton has 156115 states and 647087 transitions. Word has length 11 [2019-12-07 13:50:09,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:09,112 INFO L462 AbstractCegarLoop]: Abstraction has 156115 states and 647087 transitions. [2019-12-07 13:50:09,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:50:09,112 INFO L276 IsEmpty]: Start isEmpty. Operand 156115 states and 647087 transitions. [2019-12-07 13:50:09,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:50:09,116 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:09,116 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:09,116 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:09,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:09,117 INFO L82 PathProgramCache]: Analyzing trace with hash 594088235, now seen corresponding path program 1 times [2019-12-07 13:50:09,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:09,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720379288] [2019-12-07 13:50:09,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:09,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:09,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:09,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720379288] [2019-12-07 13:50:09,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:09,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:50:09,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885977573] [2019-12-07 13:50:09,168 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:50:09,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:09,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:50:09,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:50:09,169 INFO L87 Difference]: Start difference. First operand 156115 states and 647087 transitions. Second operand 4 states. [2019-12-07 13:50:10,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:10,290 INFO L93 Difference]: Finished difference Result 219290 states and 888852 transitions. [2019-12-07 13:50:10,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:50:10,291 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:50:10,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:10,862 INFO L225 Difference]: With dead ends: 219290 [2019-12-07 13:50:10,862 INFO L226 Difference]: Without dead ends: 219178 [2019-12-07 13:50:10,862 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:18,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219178 states. [2019-12-07 13:50:21,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219178 to 184451. [2019-12-07 13:50:21,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184451 states. [2019-12-07 13:50:21,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184451 states to 184451 states and 760798 transitions. [2019-12-07 13:50:21,582 INFO L78 Accepts]: Start accepts. Automaton has 184451 states and 760798 transitions. Word has length 13 [2019-12-07 13:50:21,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:21,583 INFO L462 AbstractCegarLoop]: Abstraction has 184451 states and 760798 transitions. [2019-12-07 13:50:21,583 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:50:21,583 INFO L276 IsEmpty]: Start isEmpty. Operand 184451 states and 760798 transitions. [2019-12-07 13:50:21,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:50:21,591 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:21,591 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:21,591 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:21,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:21,592 INFO L82 PathProgramCache]: Analyzing trace with hash -805978823, now seen corresponding path program 1 times [2019-12-07 13:50:21,592 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:21,592 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768045590] [2019-12-07 13:50:21,592 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:21,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:21,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:21,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768045590] [2019-12-07 13:50:21,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:21,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:50:21,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25810356] [2019-12-07 13:50:21,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:50:21,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:21,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:50:21,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:21,623 INFO L87 Difference]: Start difference. First operand 184451 states and 760798 transitions. Second operand 3 states. [2019-12-07 13:50:23,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:23,223 INFO L93 Difference]: Finished difference Result 284614 states and 1168466 transitions. [2019-12-07 13:50:23,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:50:23,224 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 13:50:23,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:23,946 INFO L225 Difference]: With dead ends: 284614 [2019-12-07 13:50:23,946 INFO L226 Difference]: Without dead ends: 284614 [2019-12-07 13:50:23,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:50:32,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284614 states. [2019-12-07 13:50:35,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284614 to 221232. [2019-12-07 13:50:35,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221232 states. [2019-12-07 13:50:36,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221232 states to 221232 states and 911865 transitions. [2019-12-07 13:50:36,391 INFO L78 Accepts]: Start accepts. Automaton has 221232 states and 911865 transitions. Word has length 16 [2019-12-07 13:50:36,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:36,391 INFO L462 AbstractCegarLoop]: Abstraction has 221232 states and 911865 transitions. [2019-12-07 13:50:36,392 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:50:36,392 INFO L276 IsEmpty]: Start isEmpty. Operand 221232 states and 911865 transitions. [2019-12-07 13:50:36,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:50:36,399 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:36,399 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:36,399 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:36,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:36,400 INFO L82 PathProgramCache]: Analyzing trace with hash -805853304, now seen corresponding path program 1 times [2019-12-07 13:50:36,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:36,400 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998236174] [2019-12-07 13:50:36,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:36,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:36,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:36,438 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998236174] [2019-12-07 13:50:36,438 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:36,438 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:50:36,438 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2050884318] [2019-12-07 13:50:36,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:50:36,439 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:36,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:50:36,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:50:36,439 INFO L87 Difference]: Start difference. First operand 221232 states and 911865 transitions. Second operand 4 states. [2019-12-07 13:50:38,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:38,335 INFO L93 Difference]: Finished difference Result 262568 states and 1070974 transitions. [2019-12-07 13:50:38,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:50:38,336 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:50:38,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:38,999 INFO L225 Difference]: With dead ends: 262568 [2019-12-07 13:50:39,000 INFO L226 Difference]: Without dead ends: 262568 [2019-12-07 13:50:39,000 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:50:47,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262568 states. [2019-12-07 13:50:50,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262568 to 233184. [2019-12-07 13:50:50,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233184 states. [2019-12-07 13:50:51,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233184 states to 233184 states and 959818 transitions. [2019-12-07 13:50:51,826 INFO L78 Accepts]: Start accepts. Automaton has 233184 states and 959818 transitions. Word has length 16 [2019-12-07 13:50:51,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:50:51,827 INFO L462 AbstractCegarLoop]: Abstraction has 233184 states and 959818 transitions. [2019-12-07 13:50:51,827 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:50:51,827 INFO L276 IsEmpty]: Start isEmpty. Operand 233184 states and 959818 transitions. [2019-12-07 13:50:51,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:50:51,834 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:50:51,834 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:50:51,834 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:50:51,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:50:51,834 INFO L82 PathProgramCache]: Analyzing trace with hash -1222928522, now seen corresponding path program 1 times [2019-12-07 13:50:51,834 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:50:51,835 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082821477] [2019-12-07 13:50:51,835 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:50:51,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:50:51,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:50:51,873 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1082821477] [2019-12-07 13:50:51,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:50:51,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:50:51,873 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317080370] [2019-12-07 13:50:51,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:50:51,874 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:50:51,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:50:51,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:50:51,874 INFO L87 Difference]: Start difference. First operand 233184 states and 959818 transitions. Second operand 4 states. [2019-12-07 13:50:53,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:50:53,757 INFO L93 Difference]: Finished difference Result 277148 states and 1134062 transitions. [2019-12-07 13:50:53,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:50:53,757 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:50:53,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:50:54,447 INFO L225 Difference]: With dead ends: 277148 [2019-12-07 13:50:54,447 INFO L226 Difference]: Without dead ends: 277148 [2019-12-07 13:50:54,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:51:00,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277148 states. [2019-12-07 13:51:04,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277148 to 236057. [2019-12-07 13:51:04,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236057 states. [2019-12-07 13:51:05,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236057 states to 236057 states and 972653 transitions. [2019-12-07 13:51:05,072 INFO L78 Accepts]: Start accepts. Automaton has 236057 states and 972653 transitions. Word has length 16 [2019-12-07 13:51:05,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:51:05,072 INFO L462 AbstractCegarLoop]: Abstraction has 236057 states and 972653 transitions. [2019-12-07 13:51:05,072 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:51:05,073 INFO L276 IsEmpty]: Start isEmpty. Operand 236057 states and 972653 transitions. [2019-12-07 13:51:05,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:51:05,085 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:51:05,085 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:51:05,085 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:51:05,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:51:05,085 INFO L82 PathProgramCache]: Analyzing trace with hash -2141168645, now seen corresponding path program 1 times [2019-12-07 13:51:05,085 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:51:05,085 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117756850] [2019-12-07 13:51:05,085 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:51:05,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:51:05,135 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:51:05,136 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117756850] [2019-12-07 13:51:05,136 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:51:05,136 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:51:05,136 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980885404] [2019-12-07 13:51:05,136 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:51:05,136 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:51:05,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:51:05,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:51:05,137 INFO L87 Difference]: Start difference. First operand 236057 states and 972653 transitions. Second operand 3 states. [2019-12-07 13:51:09,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:51:09,092 INFO L93 Difference]: Finished difference Result 419928 states and 1722928 transitions. [2019-12-07 13:51:09,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:51:09,092 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:51:09,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:51:10,388 INFO L225 Difference]: With dead ends: 419928 [2019-12-07 13:51:10,388 INFO L226 Difference]: Without dead ends: 386621 [2019-12-07 13:51:10,389 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:51:17,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386621 states. [2019-12-07 13:51:23,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386621 to 371396. [2019-12-07 13:51:23,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 371396 states. [2019-12-07 13:51:24,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371396 states to 371396 states and 1535333 transitions. [2019-12-07 13:51:24,578 INFO L78 Accepts]: Start accepts. Automaton has 371396 states and 1535333 transitions. Word has length 18 [2019-12-07 13:51:24,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:51:24,579 INFO L462 AbstractCegarLoop]: Abstraction has 371396 states and 1535333 transitions. [2019-12-07 13:51:24,579 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:51:24,579 INFO L276 IsEmpty]: Start isEmpty. Operand 371396 states and 1535333 transitions. [2019-12-07 13:51:24,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:51:24,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:51:24,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:51:24,610 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:51:24,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:51:24,610 INFO L82 PathProgramCache]: Analyzing trace with hash -1067747929, now seen corresponding path program 1 times [2019-12-07 13:51:24,610 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:51:24,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101132449] [2019-12-07 13:51:24,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:51:24,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:51:24,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:51:24,668 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101132449] [2019-12-07 13:51:24,668 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:51:24,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:51:24,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664796366] [2019-12-07 13:51:24,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:51:24,669 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:51:24,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:51:24,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:51:24,669 INFO L87 Difference]: Start difference. First operand 371396 states and 1535333 transitions. Second operand 4 states. [2019-12-07 13:51:29,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:51:29,893 INFO L93 Difference]: Finished difference Result 385817 states and 1580823 transitions. [2019-12-07 13:51:29,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:51:29,894 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 13:51:29,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:51:30,882 INFO L225 Difference]: With dead ends: 385817 [2019-12-07 13:51:30,882 INFO L226 Difference]: Without dead ends: 385817 [2019-12-07 13:51:30,882 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:51:37,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 385817 states. [2019-12-07 13:51:43,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 385817 to 367892. [2019-12-07 13:51:43,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 367892 states. [2019-12-07 13:51:45,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367892 states to 367892 states and 1521919 transitions. [2019-12-07 13:51:45,058 INFO L78 Accepts]: Start accepts. Automaton has 367892 states and 1521919 transitions. Word has length 19 [2019-12-07 13:51:45,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:51:45,058 INFO L462 AbstractCegarLoop]: Abstraction has 367892 states and 1521919 transitions. [2019-12-07 13:51:45,059 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:51:45,059 INFO L276 IsEmpty]: Start isEmpty. Operand 367892 states and 1521919 transitions. [2019-12-07 13:51:45,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:51:45,088 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:51:45,088 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:51:45,088 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:51:45,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:51:45,088 INFO L82 PathProgramCache]: Analyzing trace with hash 700766782, now seen corresponding path program 1 times [2019-12-07 13:51:45,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:51:45,089 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [26020241] [2019-12-07 13:51:45,089 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:51:45,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:51:45,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:51:45,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [26020241] [2019-12-07 13:51:45,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:51:45,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:51:45,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1581891706] [2019-12-07 13:51:45,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:51:45,124 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:51:45,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:51:45,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:51:45,124 INFO L87 Difference]: Start difference. First operand 367892 states and 1521919 transitions. Second operand 3 states. [2019-12-07 13:51:47,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:51:47,149 INFO L93 Difference]: Finished difference Result 346805 states and 1418106 transitions. [2019-12-07 13:51:47,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:51:47,150 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 13:51:47,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:51:48,653 INFO L225 Difference]: With dead ends: 346805 [2019-12-07 13:51:48,653 INFO L226 Difference]: Without dead ends: 346805 [2019-12-07 13:51:48,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:51:58,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346805 states. [2019-12-07 13:52:02,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346805 to 343459. [2019-12-07 13:52:02,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343459 states. [2019-12-07 13:52:04,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343459 states to 343459 states and 1405774 transitions. [2019-12-07 13:52:04,219 INFO L78 Accepts]: Start accepts. Automaton has 343459 states and 1405774 transitions. Word has length 19 [2019-12-07 13:52:04,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:04,220 INFO L462 AbstractCegarLoop]: Abstraction has 343459 states and 1405774 transitions. [2019-12-07 13:52:04,220 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:52:04,220 INFO L276 IsEmpty]: Start isEmpty. Operand 343459 states and 1405774 transitions. [2019-12-07 13:52:04,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:52:04,244 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:04,244 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:04,245 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:04,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:04,245 INFO L82 PathProgramCache]: Analyzing trace with hash -116744345, now seen corresponding path program 1 times [2019-12-07 13:52:04,245 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:04,245 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148277814] [2019-12-07 13:52:04,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:04,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:04,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:04,282 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1148277814] [2019-12-07 13:52:04,282 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:04,282 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:52:04,282 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641708004] [2019-12-07 13:52:04,282 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:52:04,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:04,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:52:04,283 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:04,283 INFO L87 Difference]: Start difference. First operand 343459 states and 1405774 transitions. Second operand 5 states. [2019-12-07 13:52:07,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:07,350 INFO L93 Difference]: Finished difference Result 481018 states and 1929261 transitions. [2019-12-07 13:52:07,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:52:07,350 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 13:52:07,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:09,128 INFO L225 Difference]: With dead ends: 481018 [2019-12-07 13:52:09,128 INFO L226 Difference]: Without dead ends: 480836 [2019-12-07 13:52:09,128 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:52:20,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480836 states. [2019-12-07 13:52:26,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480836 to 364743. [2019-12-07 13:52:26,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364743 states. [2019-12-07 13:52:27,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364743 states to 364743 states and 1489285 transitions. [2019-12-07 13:52:27,929 INFO L78 Accepts]: Start accepts. Automaton has 364743 states and 1489285 transitions. Word has length 19 [2019-12-07 13:52:27,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:27,929 INFO L462 AbstractCegarLoop]: Abstraction has 364743 states and 1489285 transitions. [2019-12-07 13:52:27,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:52:27,929 INFO L276 IsEmpty]: Start isEmpty. Operand 364743 states and 1489285 transitions. [2019-12-07 13:52:27,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:52:27,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:27,955 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:27,955 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:27,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:27,955 INFO L82 PathProgramCache]: Analyzing trace with hash 1088543872, now seen corresponding path program 1 times [2019-12-07 13:52:27,955 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:27,955 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2080943882] [2019-12-07 13:52:27,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:27,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:27,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:27,987 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2080943882] [2019-12-07 13:52:27,987 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:27,987 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:52:27,988 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1871459036] [2019-12-07 13:52:27,988 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:52:27,988 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:27,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:52:27,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:52:27,988 INFO L87 Difference]: Start difference. First operand 364743 states and 1489285 transitions. Second operand 3 states. [2019-12-07 13:52:28,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:28,207 INFO L93 Difference]: Finished difference Result 67472 states and 218112 transitions. [2019-12-07 13:52:28,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:52:28,207 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 13:52:28,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:28,310 INFO L225 Difference]: With dead ends: 67472 [2019-12-07 13:52:28,310 INFO L226 Difference]: Without dead ends: 67472 [2019-12-07 13:52:28,310 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:52:28,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67472 states. [2019-12-07 13:52:29,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67472 to 67472. [2019-12-07 13:52:29,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67472 states. [2019-12-07 13:52:29,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67472 states to 67472 states and 218112 transitions. [2019-12-07 13:52:29,360 INFO L78 Accepts]: Start accepts. Automaton has 67472 states and 218112 transitions. Word has length 19 [2019-12-07 13:52:29,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:29,360 INFO L462 AbstractCegarLoop]: Abstraction has 67472 states and 218112 transitions. [2019-12-07 13:52:29,360 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:52:29,360 INFO L276 IsEmpty]: Start isEmpty. Operand 67472 states and 218112 transitions. [2019-12-07 13:52:29,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:52:29,368 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:29,368 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:29,368 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:29,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:29,368 INFO L82 PathProgramCache]: Analyzing trace with hash -655013944, now seen corresponding path program 1 times [2019-12-07 13:52:29,368 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:29,368 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033465246] [2019-12-07 13:52:29,368 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:29,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:29,402 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:29,402 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033465246] [2019-12-07 13:52:29,402 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:29,402 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:52:29,402 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396798363] [2019-12-07 13:52:29,402 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:52:29,402 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:29,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:52:29,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:29,403 INFO L87 Difference]: Start difference. First operand 67472 states and 218112 transitions. Second operand 5 states. [2019-12-07 13:52:30,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:30,447 INFO L93 Difference]: Finished difference Result 88451 states and 279620 transitions. [2019-12-07 13:52:30,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:52:30,447 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:52:30,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:30,572 INFO L225 Difference]: With dead ends: 88451 [2019-12-07 13:52:30,572 INFO L226 Difference]: Without dead ends: 88437 [2019-12-07 13:52:30,572 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:52:30,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88437 states. [2019-12-07 13:52:31,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88437 to 71798. [2019-12-07 13:52:31,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71798 states. [2019-12-07 13:52:31,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71798 states to 71798 states and 231108 transitions. [2019-12-07 13:52:31,851 INFO L78 Accepts]: Start accepts. Automaton has 71798 states and 231108 transitions. Word has length 22 [2019-12-07 13:52:31,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:31,852 INFO L462 AbstractCegarLoop]: Abstraction has 71798 states and 231108 transitions. [2019-12-07 13:52:31,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:52:31,852 INFO L276 IsEmpty]: Start isEmpty. Operand 71798 states and 231108 transitions. [2019-12-07 13:52:31,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:52:31,859 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:31,859 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:31,860 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:31,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:31,860 INFO L82 PathProgramCache]: Analyzing trace with hash -2032339914, now seen corresponding path program 1 times [2019-12-07 13:52:31,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:31,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630764452] [2019-12-07 13:52:31,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:31,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:31,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:31,893 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630764452] [2019-12-07 13:52:31,893 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:31,893 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:52:31,893 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [616286103] [2019-12-07 13:52:31,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:52:31,893 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:31,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:52:31,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:31,894 INFO L87 Difference]: Start difference. First operand 71798 states and 231108 transitions. Second operand 5 states. [2019-12-07 13:52:32,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:32,381 INFO L93 Difference]: Finished difference Result 91330 states and 289623 transitions. [2019-12-07 13:52:32,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:52:32,382 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:52:32,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:32,514 INFO L225 Difference]: With dead ends: 91330 [2019-12-07 13:52:32,514 INFO L226 Difference]: Without dead ends: 91316 [2019-12-07 13:52:32,515 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:52:33,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91316 states. [2019-12-07 13:52:34,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91316 to 69605. [2019-12-07 13:52:34,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69605 states. [2019-12-07 13:52:34,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69605 states to 69605 states and 224450 transitions. [2019-12-07 13:52:34,186 INFO L78 Accepts]: Start accepts. Automaton has 69605 states and 224450 transitions. Word has length 22 [2019-12-07 13:52:34,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:34,186 INFO L462 AbstractCegarLoop]: Abstraction has 69605 states and 224450 transitions. [2019-12-07 13:52:34,186 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:52:34,186 INFO L276 IsEmpty]: Start isEmpty. Operand 69605 states and 224450 transitions. [2019-12-07 13:52:34,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 13:52:34,202 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:34,202 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:34,202 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:34,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:34,202 INFO L82 PathProgramCache]: Analyzing trace with hash -1083173402, now seen corresponding path program 1 times [2019-12-07 13:52:34,203 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:34,203 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542267105] [2019-12-07 13:52:34,203 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:34,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:34,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:34,235 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1542267105] [2019-12-07 13:52:34,235 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:34,235 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:52:34,235 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012235647] [2019-12-07 13:52:34,236 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:52:34,236 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:34,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:52:34,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:34,236 INFO L87 Difference]: Start difference. First operand 69605 states and 224450 transitions. Second operand 5 states. [2019-12-07 13:52:34,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:34,647 INFO L93 Difference]: Finished difference Result 86092 states and 273664 transitions. [2019-12-07 13:52:34,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:52:34,647 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 13:52:34,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:34,772 INFO L225 Difference]: With dead ends: 86092 [2019-12-07 13:52:34,772 INFO L226 Difference]: Without dead ends: 86044 [2019-12-07 13:52:34,772 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:52:35,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86044 states. [2019-12-07 13:52:35,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86044 to 73017. [2019-12-07 13:52:35,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73017 states. [2019-12-07 13:52:36,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73017 states to 73017 states and 234757 transitions. [2019-12-07 13:52:36,112 INFO L78 Accepts]: Start accepts. Automaton has 73017 states and 234757 transitions. Word has length 26 [2019-12-07 13:52:36,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:36,112 INFO L462 AbstractCegarLoop]: Abstraction has 73017 states and 234757 transitions. [2019-12-07 13:52:36,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:52:36,112 INFO L276 IsEmpty]: Start isEmpty. Operand 73017 states and 234757 transitions. [2019-12-07 13:52:36,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:52:36,137 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:36,137 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:36,137 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:36,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:36,138 INFO L82 PathProgramCache]: Analyzing trace with hash -799804073, now seen corresponding path program 1 times [2019-12-07 13:52:36,138 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:36,138 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281690028] [2019-12-07 13:52:36,138 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:36,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:36,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:36,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [281690028] [2019-12-07 13:52:36,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:36,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:52:36,182 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1458014876] [2019-12-07 13:52:36,182 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:52:36,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:36,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:52:36,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:36,183 INFO L87 Difference]: Start difference. First operand 73017 states and 234757 transitions. Second operand 5 states. [2019-12-07 13:52:36,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:36,605 INFO L93 Difference]: Finished difference Result 87024 states and 275380 transitions. [2019-12-07 13:52:36,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:52:36,606 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 13:52:36,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:36,732 INFO L225 Difference]: With dead ends: 87024 [2019-12-07 13:52:36,732 INFO L226 Difference]: Without dead ends: 86980 [2019-12-07 13:52:36,733 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:52:37,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86980 states. [2019-12-07 13:52:37,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86980 to 72137. [2019-12-07 13:52:37,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72137 states. [2019-12-07 13:52:38,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72137 states to 72137 states and 232084 transitions. [2019-12-07 13:52:38,097 INFO L78 Accepts]: Start accepts. Automaton has 72137 states and 232084 transitions. Word has length 28 [2019-12-07 13:52:38,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:38,098 INFO L462 AbstractCegarLoop]: Abstraction has 72137 states and 232084 transitions. [2019-12-07 13:52:38,098 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:52:38,098 INFO L276 IsEmpty]: Start isEmpty. Operand 72137 states and 232084 transitions. [2019-12-07 13:52:38,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:52:38,122 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:38,122 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:38,122 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:38,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:38,122 INFO L82 PathProgramCache]: Analyzing trace with hash -1469523336, now seen corresponding path program 1 times [2019-12-07 13:52:38,122 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:38,123 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [220262695] [2019-12-07 13:52:38,123 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:38,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:38,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:38,148 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [220262695] [2019-12-07 13:52:38,149 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:38,149 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:52:38,149 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1235183636] [2019-12-07 13:52:38,149 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:52:38,149 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:38,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:52:38,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:52:38,150 INFO L87 Difference]: Start difference. First operand 72137 states and 232084 transitions. Second operand 4 states. [2019-12-07 13:52:38,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:38,235 INFO L93 Difference]: Finished difference Result 27979 states and 86655 transitions. [2019-12-07 13:52:38,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:52:38,235 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:52:38,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:38,272 INFO L225 Difference]: With dead ends: 27979 [2019-12-07 13:52:38,272 INFO L226 Difference]: Without dead ends: 27979 [2019-12-07 13:52:38,272 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:52:38,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27979 states. [2019-12-07 13:52:38,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27979 to 25500. [2019-12-07 13:52:38,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25500 states. [2019-12-07 13:52:38,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25500 states to 25500 states and 79033 transitions. [2019-12-07 13:52:38,646 INFO L78 Accepts]: Start accepts. Automaton has 25500 states and 79033 transitions. Word has length 30 [2019-12-07 13:52:38,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:38,646 INFO L462 AbstractCegarLoop]: Abstraction has 25500 states and 79033 transitions. [2019-12-07 13:52:38,646 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:52:38,646 INFO L276 IsEmpty]: Start isEmpty. Operand 25500 states and 79033 transitions. [2019-12-07 13:52:38,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 13:52:38,664 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:38,665 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:38,665 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:38,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:38,665 INFO L82 PathProgramCache]: Analyzing trace with hash -145847770, now seen corresponding path program 1 times [2019-12-07 13:52:38,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:38,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905854161] [2019-12-07 13:52:38,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:38,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:38,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:38,704 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905854161] [2019-12-07 13:52:38,704 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:38,705 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:52:38,705 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291468199] [2019-12-07 13:52:38,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:52:38,705 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:38,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:52:38,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:52:38,706 INFO L87 Difference]: Start difference. First operand 25500 states and 79033 transitions. Second operand 6 states. [2019-12-07 13:52:39,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:39,125 INFO L93 Difference]: Finished difference Result 32400 states and 98245 transitions. [2019-12-07 13:52:39,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:52:39,125 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 13:52:39,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:39,164 INFO L225 Difference]: With dead ends: 32400 [2019-12-07 13:52:39,164 INFO L226 Difference]: Without dead ends: 32400 [2019-12-07 13:52:39,165 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:52:39,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32400 states. [2019-12-07 13:52:39,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32400 to 25938. [2019-12-07 13:52:39,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25938 states. [2019-12-07 13:52:39,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25938 states to 25938 states and 80337 transitions. [2019-12-07 13:52:39,598 INFO L78 Accepts]: Start accepts. Automaton has 25938 states and 80337 transitions. Word has length 32 [2019-12-07 13:52:39,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:39,599 INFO L462 AbstractCegarLoop]: Abstraction has 25938 states and 80337 transitions. [2019-12-07 13:52:39,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:52:39,599 INFO L276 IsEmpty]: Start isEmpty. Operand 25938 states and 80337 transitions. [2019-12-07 13:52:39,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 13:52:39,620 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:39,620 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:39,620 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:39,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:39,620 INFO L82 PathProgramCache]: Analyzing trace with hash -1380765993, now seen corresponding path program 1 times [2019-12-07 13:52:39,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:39,621 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914380046] [2019-12-07 13:52:39,621 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:39,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:39,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:39,658 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914380046] [2019-12-07 13:52:39,659 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:39,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:52:39,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866855046] [2019-12-07 13:52:39,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:52:39,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:39,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:52:39,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:52:39,660 INFO L87 Difference]: Start difference. First operand 25938 states and 80337 transitions. Second operand 6 states. [2019-12-07 13:52:40,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:40,079 INFO L93 Difference]: Finished difference Result 31899 states and 96883 transitions. [2019-12-07 13:52:40,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:52:40,079 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 13:52:40,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:40,118 INFO L225 Difference]: With dead ends: 31899 [2019-12-07 13:52:40,118 INFO L226 Difference]: Without dead ends: 31899 [2019-12-07 13:52:40,118 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:52:40,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31899 states. [2019-12-07 13:52:40,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31899 to 24780. [2019-12-07 13:52:40,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24780 states. [2019-12-07 13:52:40,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24780 states to 24780 states and 76926 transitions. [2019-12-07 13:52:40,555 INFO L78 Accepts]: Start accepts. Automaton has 24780 states and 76926 transitions. Word has length 34 [2019-12-07 13:52:40,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:40,555 INFO L462 AbstractCegarLoop]: Abstraction has 24780 states and 76926 transitions. [2019-12-07 13:52:40,555 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:52:40,555 INFO L276 IsEmpty]: Start isEmpty. Operand 24780 states and 76926 transitions. [2019-12-07 13:52:40,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:52:40,578 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:40,578 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:40,578 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:40,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:40,578 INFO L82 PathProgramCache]: Analyzing trace with hash 1174419869, now seen corresponding path program 1 times [2019-12-07 13:52:40,579 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:40,579 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629786092] [2019-12-07 13:52:40,579 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:40,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:40,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:40,626 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [629786092] [2019-12-07 13:52:40,626 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:40,626 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:52:40,626 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2018629465] [2019-12-07 13:52:40,626 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:52:40,626 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:40,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:52:40,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:40,627 INFO L87 Difference]: Start difference. First operand 24780 states and 76926 transitions. Second operand 5 states. [2019-12-07 13:52:41,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:41,027 INFO L93 Difference]: Finished difference Result 36358 states and 111275 transitions. [2019-12-07 13:52:41,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:52:41,027 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 13:52:41,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:41,071 INFO L225 Difference]: With dead ends: 36358 [2019-12-07 13:52:41,071 INFO L226 Difference]: Without dead ends: 36358 [2019-12-07 13:52:41,071 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:52:41,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36358 states. [2019-12-07 13:52:41,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36358 to 31699. [2019-12-07 13:52:41,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31699 states. [2019-12-07 13:52:41,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31699 states to 31699 states and 98212 transitions. [2019-12-07 13:52:41,593 INFO L78 Accepts]: Start accepts. Automaton has 31699 states and 98212 transitions. Word has length 41 [2019-12-07 13:52:41,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:41,594 INFO L462 AbstractCegarLoop]: Abstraction has 31699 states and 98212 transitions. [2019-12-07 13:52:41,594 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:52:41,594 INFO L276 IsEmpty]: Start isEmpty. Operand 31699 states and 98212 transitions. [2019-12-07 13:52:41,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:52:41,625 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:41,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:41,625 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:41,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:41,625 INFO L82 PathProgramCache]: Analyzing trace with hash 1274395705, now seen corresponding path program 2 times [2019-12-07 13:52:41,625 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:41,626 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409816567] [2019-12-07 13:52:41,626 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:41,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:41,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:41,658 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409816567] [2019-12-07 13:52:41,658 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:41,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:52:41,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1462240320] [2019-12-07 13:52:41,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:52:41,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:41,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:52:41,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:41,659 INFO L87 Difference]: Start difference. First operand 31699 states and 98212 transitions. Second operand 5 states. [2019-12-07 13:52:41,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:41,748 INFO L93 Difference]: Finished difference Result 29593 states and 93482 transitions. [2019-12-07 13:52:41,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:52:41,748 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 13:52:41,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:41,788 INFO L225 Difference]: With dead ends: 29593 [2019-12-07 13:52:41,788 INFO L226 Difference]: Without dead ends: 29365 [2019-12-07 13:52:41,788 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:41,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29365 states. [2019-12-07 13:52:42,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29365 to 18223. [2019-12-07 13:52:42,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18223 states. [2019-12-07 13:52:42,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18223 states to 18223 states and 57294 transitions. [2019-12-07 13:52:42,116 INFO L78 Accepts]: Start accepts. Automaton has 18223 states and 57294 transitions. Word has length 41 [2019-12-07 13:52:42,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:42,116 INFO L462 AbstractCegarLoop]: Abstraction has 18223 states and 57294 transitions. [2019-12-07 13:52:42,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:52:42,117 INFO L276 IsEmpty]: Start isEmpty. Operand 18223 states and 57294 transitions. [2019-12-07 13:52:42,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:52:42,133 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:42,133 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:42,133 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:42,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:42,133 INFO L82 PathProgramCache]: Analyzing trace with hash 1306345889, now seen corresponding path program 1 times [2019-12-07 13:52:42,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:42,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648719109] [2019-12-07 13:52:42,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:42,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:42,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:42,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648719109] [2019-12-07 13:52:42,186 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:42,186 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:52:42,186 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2116217703] [2019-12-07 13:52:42,186 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:52:42,186 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:42,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:52:42,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:52:42,186 INFO L87 Difference]: Start difference. First operand 18223 states and 57294 transitions. Second operand 6 states. [2019-12-07 13:52:42,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:42,682 INFO L93 Difference]: Finished difference Result 24434 states and 75591 transitions. [2019-12-07 13:52:42,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 13:52:42,682 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2019-12-07 13:52:42,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:42,709 INFO L225 Difference]: With dead ends: 24434 [2019-12-07 13:52:42,709 INFO L226 Difference]: Without dead ends: 24434 [2019-12-07 13:52:42,709 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:52:42,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24434 states. [2019-12-07 13:52:43,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24434 to 19099. [2019-12-07 13:52:43,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19099 states. [2019-12-07 13:52:43,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19099 states to 19099 states and 59998 transitions. [2019-12-07 13:52:43,035 INFO L78 Accepts]: Start accepts. Automaton has 19099 states and 59998 transitions. Word has length 64 [2019-12-07 13:52:43,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:43,035 INFO L462 AbstractCegarLoop]: Abstraction has 19099 states and 59998 transitions. [2019-12-07 13:52:43,035 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:52:43,035 INFO L276 IsEmpty]: Start isEmpty. Operand 19099 states and 59998 transitions. [2019-12-07 13:52:43,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:52:43,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:43,052 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:43,052 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:43,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:43,052 INFO L82 PathProgramCache]: Analyzing trace with hash -1813344643, now seen corresponding path program 2 times [2019-12-07 13:52:43,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:43,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342916027] [2019-12-07 13:52:43,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:43,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:43,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:43,113 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342916027] [2019-12-07 13:52:43,114 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:43,114 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:52:43,114 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2016124245] [2019-12-07 13:52:43,114 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:52:43,114 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:43,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:52:43,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:52:43,114 INFO L87 Difference]: Start difference. First operand 19099 states and 59998 transitions. Second operand 7 states. [2019-12-07 13:52:44,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:44,043 INFO L93 Difference]: Finished difference Result 26732 states and 82068 transitions. [2019-12-07 13:52:44,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 13:52:44,044 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 13:52:44,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:44,075 INFO L225 Difference]: With dead ends: 26732 [2019-12-07 13:52:44,075 INFO L226 Difference]: Without dead ends: 26732 [2019-12-07 13:52:44,075 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=396, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:52:44,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26732 states. [2019-12-07 13:52:44,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26732 to 19211. [2019-12-07 13:52:44,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19211 states. [2019-12-07 13:52:44,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19211 states to 19211 states and 60262 transitions. [2019-12-07 13:52:44,397 INFO L78 Accepts]: Start accepts. Automaton has 19211 states and 60262 transitions. Word has length 64 [2019-12-07 13:52:44,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:44,397 INFO L462 AbstractCegarLoop]: Abstraction has 19211 states and 60262 transitions. [2019-12-07 13:52:44,397 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:52:44,397 INFO L276 IsEmpty]: Start isEmpty. Operand 19211 states and 60262 transitions. [2019-12-07 13:52:44,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:52:44,412 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:44,412 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:44,412 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:44,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:44,413 INFO L82 PathProgramCache]: Analyzing trace with hash 1013389541, now seen corresponding path program 3 times [2019-12-07 13:52:44,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:44,413 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141377092] [2019-12-07 13:52:44,413 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:44,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:44,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:44,476 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141377092] [2019-12-07 13:52:44,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:44,476 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:52:44,476 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076417930] [2019-12-07 13:52:44,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:52:44,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:44,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:52:44,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:52:44,477 INFO L87 Difference]: Start difference. First operand 19211 states and 60262 transitions. Second operand 7 states. [2019-12-07 13:52:44,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:44,805 INFO L93 Difference]: Finished difference Result 55054 states and 172444 transitions. [2019-12-07 13:52:44,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:52:44,805 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 13:52:44,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:44,858 INFO L225 Difference]: With dead ends: 55054 [2019-12-07 13:52:44,858 INFO L226 Difference]: Without dead ends: 41813 [2019-12-07 13:52:44,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:52:44,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41813 states. [2019-12-07 13:52:45,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41813 to 23705. [2019-12-07 13:52:45,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23705 states. [2019-12-07 13:52:45,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23705 states to 23705 states and 74427 transitions. [2019-12-07 13:52:45,340 INFO L78 Accepts]: Start accepts. Automaton has 23705 states and 74427 transitions. Word has length 64 [2019-12-07 13:52:45,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:45,341 INFO L462 AbstractCegarLoop]: Abstraction has 23705 states and 74427 transitions. [2019-12-07 13:52:45,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:52:45,341 INFO L276 IsEmpty]: Start isEmpty. Operand 23705 states and 74427 transitions. [2019-12-07 13:52:45,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:52:45,364 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:45,364 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:45,364 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:45,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:45,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1737700513, now seen corresponding path program 4 times [2019-12-07 13:52:45,364 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:45,365 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464066222] [2019-12-07 13:52:45,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:45,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:45,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:45,418 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1464066222] [2019-12-07 13:52:45,418 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:45,418 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:52:45,418 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375389741] [2019-12-07 13:52:45,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:52:45,419 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:45,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:52:45,419 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:52:45,419 INFO L87 Difference]: Start difference. First operand 23705 states and 74427 transitions. Second operand 7 states. [2019-12-07 13:52:45,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:45,799 INFO L93 Difference]: Finished difference Result 58571 states and 181283 transitions. [2019-12-07 13:52:45,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:52:45,799 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 13:52:45,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:45,846 INFO L225 Difference]: With dead ends: 58571 [2019-12-07 13:52:45,846 INFO L226 Difference]: Without dead ends: 42536 [2019-12-07 13:52:45,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:52:45,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42536 states. [2019-12-07 13:52:46,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42536 to 26572. [2019-12-07 13:52:46,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26572 states. [2019-12-07 13:52:46,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26572 states to 26572 states and 82964 transitions. [2019-12-07 13:52:46,355 INFO L78 Accepts]: Start accepts. Automaton has 26572 states and 82964 transitions. Word has length 64 [2019-12-07 13:52:46,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:46,355 INFO L462 AbstractCegarLoop]: Abstraction has 26572 states and 82964 transitions. [2019-12-07 13:52:46,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:52:46,356 INFO L276 IsEmpty]: Start isEmpty. Operand 26572 states and 82964 transitions. [2019-12-07 13:52:46,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:52:46,383 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:46,384 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:46,384 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:46,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:46,384 INFO L82 PathProgramCache]: Analyzing trace with hash -1780388127, now seen corresponding path program 5 times [2019-12-07 13:52:46,384 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:46,384 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476418557] [2019-12-07 13:52:46,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:46,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:46,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:46,461 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1476418557] [2019-12-07 13:52:46,462 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:46,462 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:52:46,462 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240163720] [2019-12-07 13:52:46,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:52:46,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:46,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:52:46,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:52:46,462 INFO L87 Difference]: Start difference. First operand 26572 states and 82964 transitions. Second operand 7 states. [2019-12-07 13:52:47,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:47,048 INFO L93 Difference]: Finished difference Result 93162 states and 292564 transitions. [2019-12-07 13:52:47,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:52:47,048 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 13:52:47,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:47,166 INFO L225 Difference]: With dead ends: 93162 [2019-12-07 13:52:47,166 INFO L226 Difference]: Without dead ends: 83878 [2019-12-07 13:52:47,167 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2019-12-07 13:52:47,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83878 states. [2019-12-07 13:52:47,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83878 to 27198. [2019-12-07 13:52:47,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27198 states. [2019-12-07 13:52:47,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27198 states to 27198 states and 85184 transitions. [2019-12-07 13:52:47,925 INFO L78 Accepts]: Start accepts. Automaton has 27198 states and 85184 transitions. Word has length 64 [2019-12-07 13:52:47,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:47,925 INFO L462 AbstractCegarLoop]: Abstraction has 27198 states and 85184 transitions. [2019-12-07 13:52:47,925 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:52:47,925 INFO L276 IsEmpty]: Start isEmpty. Operand 27198 states and 85184 transitions. [2019-12-07 13:52:47,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:52:47,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:47,954 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:47,954 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:47,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:47,954 INFO L82 PathProgramCache]: Analyzing trace with hash 2010713375, now seen corresponding path program 6 times [2019-12-07 13:52:47,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:47,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750936884] [2019-12-07 13:52:47,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:47,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:48,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:48,002 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750936884] [2019-12-07 13:52:48,002 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:48,002 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:52:48,002 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [967530641] [2019-12-07 13:52:48,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:52:48,003 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:48,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:52:48,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:52:48,003 INFO L87 Difference]: Start difference. First operand 27198 states and 85184 transitions. Second operand 3 states. [2019-12-07 13:52:48,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:48,063 INFO L93 Difference]: Finished difference Result 23404 states and 72171 transitions. [2019-12-07 13:52:48,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:52:48,064 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 13:52:48,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:48,089 INFO L225 Difference]: With dead ends: 23404 [2019-12-07 13:52:48,089 INFO L226 Difference]: Without dead ends: 23404 [2019-12-07 13:52:48,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:52:48,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23404 states. [2019-12-07 13:52:48,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23404 to 21770. [2019-12-07 13:52:48,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21770 states. [2019-12-07 13:52:48,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21770 states to 21770 states and 67013 transitions. [2019-12-07 13:52:48,419 INFO L78 Accepts]: Start accepts. Automaton has 21770 states and 67013 transitions. Word has length 64 [2019-12-07 13:52:48,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:48,420 INFO L462 AbstractCegarLoop]: Abstraction has 21770 states and 67013 transitions. [2019-12-07 13:52:48,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:52:48,420 INFO L276 IsEmpty]: Start isEmpty. Operand 21770 states and 67013 transitions. [2019-12-07 13:52:48,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:52:48,440 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:48,440 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:48,440 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:48,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:48,440 INFO L82 PathProgramCache]: Analyzing trace with hash 903189921, now seen corresponding path program 1 times [2019-12-07 13:52:48,440 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:48,440 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786521923] [2019-12-07 13:52:48,440 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:48,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:48,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:48,721 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786521923] [2019-12-07 13:52:48,721 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:48,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:52:48,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [612370657] [2019-12-07 13:52:48,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:52:48,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:48,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:52:48,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:52:48,722 INFO L87 Difference]: Start difference. First operand 21770 states and 67013 transitions. Second operand 15 states. [2019-12-07 13:52:54,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:54,484 INFO L93 Difference]: Finished difference Result 60810 states and 185795 transitions. [2019-12-07 13:52:54,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 13:52:54,485 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 65 [2019-12-07 13:52:54,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:54,552 INFO L225 Difference]: With dead ends: 60810 [2019-12-07 13:52:54,552 INFO L226 Difference]: Without dead ends: 49195 [2019-12-07 13:52:54,553 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 963 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=531, Invalid=2661, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 13:52:54,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49195 states. [2019-12-07 13:52:55,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49195 to 22001. [2019-12-07 13:52:55,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22001 states. [2019-12-07 13:52:55,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22001 states to 22001 states and 67751 transitions. [2019-12-07 13:52:55,042 INFO L78 Accepts]: Start accepts. Automaton has 22001 states and 67751 transitions. Word has length 65 [2019-12-07 13:52:55,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:55,042 INFO L462 AbstractCegarLoop]: Abstraction has 22001 states and 67751 transitions. [2019-12-07 13:52:55,042 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:52:55,042 INFO L276 IsEmpty]: Start isEmpty. Operand 22001 states and 67751 transitions. [2019-12-07 13:52:55,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:52:55,062 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:55,062 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:55,063 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:55,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:55,063 INFO L82 PathProgramCache]: Analyzing trace with hash 734079353, now seen corresponding path program 2 times [2019-12-07 13:52:55,063 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:52:55,063 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478822244] [2019-12-07 13:52:55,063 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:55,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:55,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:55,399 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478822244] [2019-12-07 13:52:55,399 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:55,399 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 13:52:55,399 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712305517] [2019-12-07 13:52:55,399 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 13:52:55,399 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:52:55,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 13:52:55,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2019-12-07 13:52:55,400 INFO L87 Difference]: Start difference. First operand 22001 states and 67751 transitions. Second operand 16 states. [2019-12-07 13:53:01,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:01,551 INFO L93 Difference]: Finished difference Result 55590 states and 169804 transitions. [2019-12-07 13:53:01,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 13:53:01,552 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 65 [2019-12-07 13:53:01,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:01,619 INFO L225 Difference]: With dead ends: 55590 [2019-12-07 13:53:01,619 INFO L226 Difference]: Without dead ends: 49459 [2019-12-07 13:53:01,621 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1308 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=628, Invalid=3532, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 13:53:01,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49459 states. [2019-12-07 13:53:02,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49459 to 22219. [2019-12-07 13:53:02,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22219 states. [2019-12-07 13:53:02,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22219 states to 22219 states and 68351 transitions. [2019-12-07 13:53:02,117 INFO L78 Accepts]: Start accepts. Automaton has 22219 states and 68351 transitions. Word has length 65 [2019-12-07 13:53:02,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:02,117 INFO L462 AbstractCegarLoop]: Abstraction has 22219 states and 68351 transitions. [2019-12-07 13:53:02,117 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 13:53:02,117 INFO L276 IsEmpty]: Start isEmpty. Operand 22219 states and 68351 transitions. [2019-12-07 13:53:02,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:53:02,138 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:02,138 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:02,138 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:02,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:02,138 INFO L82 PathProgramCache]: Analyzing trace with hash 416369971, now seen corresponding path program 3 times [2019-12-07 13:53:02,138 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:53:02,139 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723391214] [2019-12-07 13:53:02,139 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:02,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:02,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:02,275 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723391214] [2019-12-07 13:53:02,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:02,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:53:02,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175520518] [2019-12-07 13:53:02,276 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:53:02,276 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:53:02,276 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:53:02,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:53:02,276 INFO L87 Difference]: Start difference. First operand 22219 states and 68351 transitions. Second operand 11 states. [2019-12-07 13:53:03,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:03,063 INFO L93 Difference]: Finished difference Result 34731 states and 106187 transitions. [2019-12-07 13:53:03,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:53:03,064 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 13:53:03,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:03,098 INFO L225 Difference]: With dead ends: 34731 [2019-12-07 13:53:03,098 INFO L226 Difference]: Without dead ends: 28272 [2019-12-07 13:53:03,099 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=82, Invalid=298, Unknown=0, NotChecked=0, Total=380 [2019-12-07 13:53:03,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28272 states. [2019-12-07 13:53:03,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28272 to 22336. [2019-12-07 13:53:03,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22336 states. [2019-12-07 13:53:03,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22336 states to 22336 states and 68344 transitions. [2019-12-07 13:53:03,453 INFO L78 Accepts]: Start accepts. Automaton has 22336 states and 68344 transitions. Word has length 65 [2019-12-07 13:53:03,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:03,453 INFO L462 AbstractCegarLoop]: Abstraction has 22336 states and 68344 transitions. [2019-12-07 13:53:03,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:53:03,453 INFO L276 IsEmpty]: Start isEmpty. Operand 22336 states and 68344 transitions. [2019-12-07 13:53:03,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:53:03,473 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:03,473 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:03,473 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:03,473 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:03,473 INFO L82 PathProgramCache]: Analyzing trace with hash -1050757295, now seen corresponding path program 4 times [2019-12-07 13:53:03,474 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:53:03,474 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [206283855] [2019-12-07 13:53:03,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:03,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:03,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:03,624 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [206283855] [2019-12-07 13:53:03,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:03,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:53:03,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959411807] [2019-12-07 13:53:03,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:53:03,625 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:53:03,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:53:03,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:53:03,625 INFO L87 Difference]: Start difference. First operand 22336 states and 68344 transitions. Second operand 11 states. [2019-12-07 13:53:06,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:06,030 INFO L93 Difference]: Finished difference Result 77659 states and 240460 transitions. [2019-12-07 13:53:06,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 13:53:06,031 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 13:53:06,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:06,132 INFO L225 Difference]: With dead ends: 77659 [2019-12-07 13:53:06,132 INFO L226 Difference]: Without dead ends: 75207 [2019-12-07 13:53:06,133 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 556 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=393, Invalid=1587, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 13:53:06,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75207 states. [2019-12-07 13:53:06,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75207 to 26150. [2019-12-07 13:53:06,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26150 states. [2019-12-07 13:53:06,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26150 states to 26150 states and 79776 transitions. [2019-12-07 13:53:06,938 INFO L78 Accepts]: Start accepts. Automaton has 26150 states and 79776 transitions. Word has length 65 [2019-12-07 13:53:06,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:06,938 INFO L462 AbstractCegarLoop]: Abstraction has 26150 states and 79776 transitions. [2019-12-07 13:53:06,938 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:53:06,938 INFO L276 IsEmpty]: Start isEmpty. Operand 26150 states and 79776 transitions. [2019-12-07 13:53:06,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:53:06,963 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:06,963 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:06,963 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:06,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:06,963 INFO L82 PathProgramCache]: Analyzing trace with hash -330874671, now seen corresponding path program 5 times [2019-12-07 13:53:06,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:53:06,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1152784991] [2019-12-07 13:53:06,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:06,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:07,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:07,074 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1152784991] [2019-12-07 13:53:07,075 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:07,075 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:53:07,075 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204842488] [2019-12-07 13:53:07,075 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:53:07,075 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:53:07,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:53:07,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:53:07,075 INFO L87 Difference]: Start difference. First operand 26150 states and 79776 transitions. Second operand 11 states. [2019-12-07 13:53:09,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:09,803 INFO L93 Difference]: Finished difference Result 70846 states and 215496 transitions. [2019-12-07 13:53:09,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 13:53:09,804 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 13:53:09,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:09,881 INFO L225 Difference]: With dead ends: 70846 [2019-12-07 13:53:09,881 INFO L226 Difference]: Without dead ends: 56240 [2019-12-07 13:53:09,882 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=389, Invalid=1591, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 13:53:10,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56240 states. [2019-12-07 13:53:10,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56240 to 21594. [2019-12-07 13:53:10,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21594 states. [2019-12-07 13:53:10,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21594 states to 21594 states and 65903 transitions. [2019-12-07 13:53:10,432 INFO L78 Accepts]: Start accepts. Automaton has 21594 states and 65903 transitions. Word has length 65 [2019-12-07 13:53:10,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:10,432 INFO L462 AbstractCegarLoop]: Abstraction has 21594 states and 65903 transitions. [2019-12-07 13:53:10,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:53:10,432 INFO L276 IsEmpty]: Start isEmpty. Operand 21594 states and 65903 transitions. [2019-12-07 13:53:10,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:53:10,453 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:10,453 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:10,453 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:10,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:10,453 INFO L82 PathProgramCache]: Analyzing trace with hash 1664741459, now seen corresponding path program 6 times [2019-12-07 13:53:10,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:53:10,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [408039483] [2019-12-07 13:53:10,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:10,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:10,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:10,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [408039483] [2019-12-07 13:53:10,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:10,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:53:10,574 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [436435740] [2019-12-07 13:53:10,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:53:10,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:53:10,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:53:10,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:53:10,575 INFO L87 Difference]: Start difference. First operand 21594 states and 65903 transitions. Second operand 11 states. [2019-12-07 13:53:11,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:11,275 INFO L93 Difference]: Finished difference Result 25310 states and 76662 transitions. [2019-12-07 13:53:11,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 13:53:11,276 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 13:53:11,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:11,303 INFO L225 Difference]: With dead ends: 25310 [2019-12-07 13:53:11,303 INFO L226 Difference]: Without dead ends: 24430 [2019-12-07 13:53:11,304 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:53:11,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24430 states. [2019-12-07 13:53:11,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24430 to 21194. [2019-12-07 13:53:11,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21194 states. [2019-12-07 13:53:11,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21194 states to 21194 states and 64752 transitions. [2019-12-07 13:53:11,615 INFO L78 Accepts]: Start accepts. Automaton has 21194 states and 64752 transitions. Word has length 65 [2019-12-07 13:53:11,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:11,615 INFO L462 AbstractCegarLoop]: Abstraction has 21194 states and 64752 transitions. [2019-12-07 13:53:11,615 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:53:11,615 INFO L276 IsEmpty]: Start isEmpty. Operand 21194 states and 64752 transitions. [2019-12-07 13:53:11,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:53:11,634 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:11,634 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:11,634 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:11,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:11,635 INFO L82 PathProgramCache]: Analyzing trace with hash -1019867375, now seen corresponding path program 7 times [2019-12-07 13:53:11,635 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:53:11,635 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138409304] [2019-12-07 13:53:11,635 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:11,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:11,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:11,676 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2138409304] [2019-12-07 13:53:11,677 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:11,677 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:53:11,677 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899695735] [2019-12-07 13:53:11,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:53:11,677 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:53:11,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:53:11,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:53:11,678 INFO L87 Difference]: Start difference. First operand 21194 states and 64752 transitions. Second operand 3 states. [2019-12-07 13:53:11,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:11,774 INFO L93 Difference]: Finished difference Result 25029 states and 76126 transitions. [2019-12-07 13:53:11,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:53:11,775 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 13:53:11,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:11,805 INFO L225 Difference]: With dead ends: 25029 [2019-12-07 13:53:11,805 INFO L226 Difference]: Without dead ends: 25029 [2019-12-07 13:53:11,806 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:53:11,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25029 states. [2019-12-07 13:53:12,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25029 to 21225. [2019-12-07 13:53:12,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21225 states. [2019-12-07 13:53:12,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21225 states to 21225 states and 65024 transitions. [2019-12-07 13:53:12,171 INFO L78 Accepts]: Start accepts. Automaton has 21225 states and 65024 transitions. Word has length 65 [2019-12-07 13:53:12,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:12,171 INFO L462 AbstractCegarLoop]: Abstraction has 21225 states and 65024 transitions. [2019-12-07 13:53:12,171 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:53:12,171 INFO L276 IsEmpty]: Start isEmpty. Operand 21225 states and 65024 transitions. [2019-12-07 13:53:12,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:53:12,191 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:12,191 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:12,191 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:12,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:12,192 INFO L82 PathProgramCache]: Analyzing trace with hash -952881413, now seen corresponding path program 1 times [2019-12-07 13:53:12,192 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:53:12,192 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921388872] [2019-12-07 13:53:12,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:12,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:12,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:12,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [921388872] [2019-12-07 13:53:12,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:12,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:53:12,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863131794] [2019-12-07 13:53:12,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:53:12,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:53:12,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:53:12,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:53:12,306 INFO L87 Difference]: Start difference. First operand 21225 states and 65024 transitions. Second operand 12 states. [2019-12-07 13:53:12,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:12,932 INFO L93 Difference]: Finished difference Result 36333 states and 111254 transitions. [2019-12-07 13:53:12,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 13:53:12,933 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 13:53:12,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:12,975 INFO L225 Difference]: With dead ends: 36333 [2019-12-07 13:53:12,975 INFO L226 Difference]: Without dead ends: 35858 [2019-12-07 13:53:12,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 13:53:13,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35858 states. [2019-12-07 13:53:13,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35858 to 20957. [2019-12-07 13:53:13,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20957 states. [2019-12-07 13:53:13,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20957 states to 20957 states and 64336 transitions. [2019-12-07 13:53:13,374 INFO L78 Accepts]: Start accepts. Automaton has 20957 states and 64336 transitions. Word has length 66 [2019-12-07 13:53:13,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:13,374 INFO L462 AbstractCegarLoop]: Abstraction has 20957 states and 64336 transitions. [2019-12-07 13:53:13,374 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:53:13,374 INFO L276 IsEmpty]: Start isEmpty. Operand 20957 states and 64336 transitions. [2019-12-07 13:53:13,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:53:13,392 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:13,392 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:13,393 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:13,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:13,393 INFO L82 PathProgramCache]: Analyzing trace with hash 620198601, now seen corresponding path program 2 times [2019-12-07 13:53:13,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:53:13,393 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434527222] [2019-12-07 13:53:13,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:13,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:53:13,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:53:13,468 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:53:13,468 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:53:13,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t669~0.base_22| 4)) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t669~0.base_22| 1) |v_#valid_69|) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t669~0.base_22|)) (= v_~z$w_buff1_used~0_500 0) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= 0 |v_ULTIMATE.start_main_~#t669~0.offset_16|) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (= v_~z$read_delayed~0_7 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t669~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t669~0.base_22|) |v_ULTIMATE.start_main_~#t669~0.offset_16| 0)) |v_#memory_int_19|) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd3~0_379) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t669~0.base_22|) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t671~0.base=|v_ULTIMATE.start_main_~#t671~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ULTIMATE.start_main_~#t670~0.offset=|v_ULTIMATE.start_main_~#t670~0.offset_14|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_~#t670~0.base=|v_ULTIMATE.start_main_~#t670~0.base_19|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ULTIMATE.start_main_~#t669~0.base=|v_ULTIMATE.start_main_~#t669~0.base_22|, ~x~0=v_~x~0_133, ULTIMATE.start_main_~#t671~0.offset=|v_ULTIMATE.start_main_~#t671~0.offset_14|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t669~0.offset=|v_ULTIMATE.start_main_~#t669~0.offset_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t671~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t670~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t670~0.base, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t669~0.base, ~x~0, ULTIMATE.start_main_~#t671~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t669~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:53:13,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:53:13,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t670~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t670~0.base_11|) |v_ULTIMATE.start_main_~#t670~0.offset_10| 1)) |v_#memory_int_13|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t670~0.base_11|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t670~0.base_11| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t670~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t670~0.base_11|) (= |v_ULTIMATE.start_main_~#t670~0.offset_10| 0) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t670~0.base_11| 1) |v_#valid_31|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t670~0.base=|v_ULTIMATE.start_main_~#t670~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t670~0.offset=|v_ULTIMATE.start_main_~#t670~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t670~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t670~0.offset] because there is no mapped edge [2019-12-07 13:53:13,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t671~0.base_12|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t671~0.base_12| 4)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t671~0.base_12|) 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t671~0.base_12| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t671~0.base_12|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t671~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t671~0.base_12|) |v_ULTIMATE.start_main_~#t671~0.offset_10| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t671~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t671~0.offset=|v_ULTIMATE.start_main_~#t671~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t671~0.base=|v_ULTIMATE.start_main_~#t671~0.base_12|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t671~0.offset, ULTIMATE.start_main_~#t671~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 13:53:13,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1984533797 256))) (.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1984533797| |P1Thread1of1ForFork2_#t~ite10_Out1984533797|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1984533797 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out1984533797| ~z~0_In1984533797)) (and (not .cse2) .cse0 (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1984533797| ~z$w_buff1~0_In1984533797)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1984533797, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1984533797, ~z$w_buff1~0=~z$w_buff1~0_In1984533797, ~z~0=~z~0_In1984533797} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1984533797|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1984533797, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1984533797|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1984533797, ~z$w_buff1~0=~z$w_buff1~0_In1984533797, ~z~0=~z~0_In1984533797} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:53:13,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-593402618 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_Out-593402618| |P2Thread1of1ForFork0_#t~ite24_Out-593402618|) (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-593402618 256)))) (or (and .cse0 (= 0 (mod ~z$w_buff1_used~0_In-593402618 256))) (= 0 (mod ~z$w_buff0_used~0_In-593402618 256)) (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-593402618 256))))) .cse1 (= ~z$w_buff1~0_In-593402618 |P2Thread1of1ForFork0_#t~ite23_Out-593402618|)) (and (= ~z$w_buff1~0_In-593402618 |P2Thread1of1ForFork0_#t~ite24_Out-593402618|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite23_In-593402618| |P2Thread1of1ForFork0_#t~ite23_Out-593402618|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-593402618, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-593402618, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-593402618|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-593402618, ~z$w_buff1~0=~z$w_buff1~0_In-593402618, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-593402618, ~weak$$choice2~0=~weak$$choice2~0_In-593402618} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-593402618, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-593402618|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-593402618, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-593402618|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-593402618, ~z$w_buff1~0=~z$w_buff1~0_In-593402618, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-593402618, ~weak$$choice2~0=~weak$$choice2~0_In-593402618} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:53:13,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1448315462 256))) (.cse1 (= |P2Thread1of1ForFork0_#t~ite30_Out1448315462| |P2Thread1of1ForFork0_#t~ite29_Out1448315462|)) (.cse4 (= 0 (mod ~z$r_buff1_thd3~0_In1448315462 256))) (.cse5 (= 0 (mod ~z$w_buff0_used~0_In1448315462 256))) (.cse0 (= (mod ~weak$$choice2~0_In1448315462 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In1448315462 256)))) (or (and (or (and (= ~z$w_buff1_used~0_In1448315462 |P2Thread1of1ForFork0_#t~ite30_Out1448315462|) (= |P2Thread1of1ForFork0_#t~ite29_In1448315462| |P2Thread1of1ForFork0_#t~ite29_Out1448315462|) (not .cse0)) (and (= ~z$w_buff1_used~0_In1448315462 |P2Thread1of1ForFork0_#t~ite29_Out1448315462|) .cse1 .cse0 (or (and .cse2 .cse3) (and .cse4 .cse3) .cse5))) (= |P2Thread1of1ForFork0_#t~ite28_In1448315462| |P2Thread1of1ForFork0_#t~ite28_Out1448315462|)) (let ((.cse6 (not .cse3))) (and (or (not .cse2) .cse6) (= 0 |P2Thread1of1ForFork0_#t~ite28_Out1448315462|) .cse1 (or (not .cse4) .cse6) (= |P2Thread1of1ForFork0_#t~ite28_Out1448315462| |P2Thread1of1ForFork0_#t~ite29_Out1448315462|) (not .cse5) .cse0)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In1448315462|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1448315462, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1448315462, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1448315462, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1448315462, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1448315462|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out1448315462|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1448315462, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1448315462, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1448315462, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1448315462, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1448315462|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1448315462|, ~weak$$choice2~0=~weak$$choice2~0_In1448315462} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:53:13,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:53:13,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 13:53:13,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1582685182 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1582685182| |P2Thread1of1ForFork0_#t~ite38_Out-1582685182|)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1582685182 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1582685182| ~z~0_In-1582685182) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1582685182| ~z$w_buff1~0_In-1582685182) (not .cse0) .cse2 (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1582685182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1582685182, ~z$w_buff1~0=~z$w_buff1~0_In-1582685182, ~z~0=~z~0_In-1582685182} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1582685182|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1582685182|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1582685182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1582685182, ~z$w_buff1~0=~z$w_buff1~0_In-1582685182, ~z~0=~z~0_In-1582685182} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:53:13,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1758039681 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1758039681 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-1758039681| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1758039681| ~z$w_buff0_used~0_In-1758039681) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1758039681, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1758039681} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1758039681, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1758039681|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1758039681} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:53:13,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd3~0_In-211499326 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-211499326 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-211499326 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-211499326 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-211499326| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-211499326| ~z$w_buff1_used~0_In-211499326)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-211499326, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-211499326, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-211499326, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-211499326} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-211499326, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-211499326, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-211499326, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-211499326, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-211499326|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:53:13,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In29645117 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In29645117 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out29645117| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out29645117| ~z$r_buff0_thd3~0_In29645117) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In29645117, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In29645117} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In29645117, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In29645117, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out29645117|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:53:13,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-696570084 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-696570084 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-696570084 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-696570084 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-696570084|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-696570084 |P2Thread1of1ForFork0_#t~ite43_Out-696570084|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-696570084, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-696570084, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-696570084, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-696570084} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-696570084|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-696570084, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-696570084, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-696570084, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-696570084} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:53:13,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:53:13,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-575443488 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-575443488 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-575443488|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-575443488 |P0Thread1of1ForFork1_#t~ite5_Out-575443488|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-575443488, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-575443488} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-575443488|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-575443488, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-575443488} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:53:13,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1082972240 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-1082972240 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1082972240 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1082972240 256)))) (or (and (= ~z$w_buff1_used~0_In-1082972240 |P0Thread1of1ForFork1_#t~ite6_Out-1082972240|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1082972240|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1082972240, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1082972240, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1082972240, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1082972240} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1082972240, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1082972240|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1082972240, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1082972240, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1082972240} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:53:13,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In6878931 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In6878931 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_Out6878931 ~z$r_buff0_thd1~0_In6878931))) (or (and .cse0 .cse1) (and (not .cse0) (= ~z$r_buff0_thd1~0_Out6878931 0) (not .cse2)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In6878931, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In6878931} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In6878931, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out6878931|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out6878931} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:53:13,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In985980656 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In985980656 256))) (.cse0 (= (mod ~z$r_buff1_thd1~0_In985980656 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In985980656 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out985980656|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out985980656| ~z$r_buff1_thd1~0_In985980656)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In985980656, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In985980656, ~z$w_buff1_used~0=~z$w_buff1_used~0_In985980656, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In985980656} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out985980656|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In985980656, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In985980656, ~z$w_buff1_used~0=~z$w_buff1_used~0_In985980656, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In985980656} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:53:13,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:53:13,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-288516922 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-288516922 256) 0))) (or (and (= ~z$w_buff0_used~0_In-288516922 |P1Thread1of1ForFork2_#t~ite11_Out-288516922|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-288516922|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-288516922, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-288516922} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-288516922, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-288516922|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-288516922} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:53:13,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-343173316 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In-343173316 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-343173316 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-343173316 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-343173316| ~z$w_buff1_used~0_In-343173316) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite12_Out-343173316| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-343173316, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-343173316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-343173316, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-343173316} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-343173316, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-343173316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-343173316, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-343173316|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-343173316} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:53:13,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1848309657 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In1848309657 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1848309657| ~z$r_buff0_thd2~0_In1848309657) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out1848309657| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1848309657, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1848309657} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1848309657, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1848309657|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1848309657} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:53:13,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1606857859 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1606857859 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1606857859 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1606857859 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out1606857859| ~z$r_buff1_thd2~0_In1606857859)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1606857859| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1606857859, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1606857859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1606857859, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1606857859} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1606857859, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1606857859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1606857859, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1606857859|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1606857859} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:53:13,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:53:13,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:53:13,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-1108669482 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1108669482 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-1108669482 |ULTIMATE.start_main_#t~ite47_Out-1108669482|)) (and (or .cse1 .cse0) (= ~z~0_In-1108669482 |ULTIMATE.start_main_#t~ite47_Out-1108669482|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1108669482, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1108669482, ~z$w_buff1~0=~z$w_buff1~0_In-1108669482, ~z~0=~z~0_In-1108669482} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1108669482, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1108669482|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1108669482, ~z$w_buff1~0=~z$w_buff1~0_In-1108669482, ~z~0=~z~0_In-1108669482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:53:13,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 13:53:13,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1528009730 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1528009730 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1528009730 |ULTIMATE.start_main_#t~ite49_Out-1528009730|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1528009730|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1528009730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1528009730} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1528009730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1528009730, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1528009730|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:53:13,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1148785092 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1148785092 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1148785092 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In1148785092 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1148785092|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1148785092 |ULTIMATE.start_main_#t~ite50_Out1148785092|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1148785092, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1148785092, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1148785092, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1148785092} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1148785092|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1148785092, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1148785092, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1148785092, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1148785092} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:53:13,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1115873471 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1115873471 256)))) (or (and (= ~z$r_buff0_thd0~0_In1115873471 |ULTIMATE.start_main_#t~ite51_Out1115873471|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out1115873471| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1115873471, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1115873471} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1115873471, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1115873471|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1115873471} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:53:13,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1423016518 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1423016518 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1423016518 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1423016518 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1423016518| 0)) (and (= ~z$r_buff1_thd0~0_In1423016518 |ULTIMATE.start_main_#t~ite52_Out1423016518|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1423016518, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1423016518, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1423016518, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1423016518} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1423016518|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1423016518, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1423016518, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1423016518, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1423016518} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:53:13,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:53:13,540 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:53:13 BasicIcfg [2019-12-07 13:53:13,540 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:53:13,540 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:53:13,540 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:53:13,540 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:53:13,541 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:49:29" (3/4) ... [2019-12-07 13:53:13,542 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:53:13,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t669~0.base_22| 4)) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t669~0.base_22| 1) |v_#valid_69|) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t669~0.base_22|)) (= v_~z$w_buff1_used~0_500 0) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= 0 |v_ULTIMATE.start_main_~#t669~0.offset_16|) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (= v_~z$read_delayed~0_7 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t669~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t669~0.base_22|) |v_ULTIMATE.start_main_~#t669~0.offset_16| 0)) |v_#memory_int_19|) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd3~0_379) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t669~0.base_22|) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t671~0.base=|v_ULTIMATE.start_main_~#t671~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ULTIMATE.start_main_~#t670~0.offset=|v_ULTIMATE.start_main_~#t670~0.offset_14|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_~#t670~0.base=|v_ULTIMATE.start_main_~#t670~0.base_19|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ULTIMATE.start_main_~#t669~0.base=|v_ULTIMATE.start_main_~#t669~0.base_22|, ~x~0=v_~x~0_133, ULTIMATE.start_main_~#t671~0.offset=|v_ULTIMATE.start_main_~#t671~0.offset_14|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t669~0.offset=|v_ULTIMATE.start_main_~#t669~0.offset_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t671~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t670~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ULTIMATE.start_main_~#t670~0.base, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t669~0.base, ~x~0, ULTIMATE.start_main_~#t671~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t669~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:53:13,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:53:13,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t670~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t670~0.base_11|) |v_ULTIMATE.start_main_~#t670~0.offset_10| 1)) |v_#memory_int_13|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t670~0.base_11|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t670~0.base_11| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t670~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t670~0.base_11|) (= |v_ULTIMATE.start_main_~#t670~0.offset_10| 0) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t670~0.base_11| 1) |v_#valid_31|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t670~0.base=|v_ULTIMATE.start_main_~#t670~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t670~0.offset=|v_ULTIMATE.start_main_~#t670~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t670~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t670~0.offset] because there is no mapped edge [2019-12-07 13:53:13,544 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t671~0.base_12|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t671~0.base_12| 4)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t671~0.base_12|) 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t671~0.base_12| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t671~0.base_12|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t671~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t671~0.base_12|) |v_ULTIMATE.start_main_~#t671~0.offset_10| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t671~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t671~0.offset=|v_ULTIMATE.start_main_~#t671~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t671~0.base=|v_ULTIMATE.start_main_~#t671~0.base_12|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t671~0.offset, ULTIMATE.start_main_~#t671~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 13:53:13,545 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1984533797 256))) (.cse0 (= |P1Thread1of1ForFork2_#t~ite9_Out1984533797| |P1Thread1of1ForFork2_#t~ite10_Out1984533797|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1984533797 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork2_#t~ite9_Out1984533797| ~z~0_In1984533797)) (and (not .cse2) .cse0 (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out1984533797| ~z$w_buff1~0_In1984533797)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1984533797, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1984533797, ~z$w_buff1~0=~z$w_buff1~0_In1984533797, ~z~0=~z~0_In1984533797} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1984533797|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1984533797, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1984533797|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1984533797, ~z$w_buff1~0=~z$w_buff1~0_In1984533797, ~z~0=~z~0_In1984533797} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:53:13,547 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-593402618 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_Out-593402618| |P2Thread1of1ForFork0_#t~ite24_Out-593402618|) (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-593402618 256)))) (or (and .cse0 (= 0 (mod ~z$w_buff1_used~0_In-593402618 256))) (= 0 (mod ~z$w_buff0_used~0_In-593402618 256)) (and .cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-593402618 256))))) .cse1 (= ~z$w_buff1~0_In-593402618 |P2Thread1of1ForFork0_#t~ite23_Out-593402618|)) (and (= ~z$w_buff1~0_In-593402618 |P2Thread1of1ForFork0_#t~ite24_Out-593402618|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite23_In-593402618| |P2Thread1of1ForFork0_#t~ite23_Out-593402618|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-593402618, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-593402618, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-593402618|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-593402618, ~z$w_buff1~0=~z$w_buff1~0_In-593402618, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-593402618, ~weak$$choice2~0=~weak$$choice2~0_In-593402618} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-593402618, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-593402618|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-593402618, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-593402618|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-593402618, ~z$w_buff1~0=~z$w_buff1~0_In-593402618, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-593402618, ~weak$$choice2~0=~weak$$choice2~0_In-593402618} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:53:13,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1448315462 256))) (.cse1 (= |P2Thread1of1ForFork0_#t~ite30_Out1448315462| |P2Thread1of1ForFork0_#t~ite29_Out1448315462|)) (.cse4 (= 0 (mod ~z$r_buff1_thd3~0_In1448315462 256))) (.cse5 (= 0 (mod ~z$w_buff0_used~0_In1448315462 256))) (.cse0 (= (mod ~weak$$choice2~0_In1448315462 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In1448315462 256)))) (or (and (or (and (= ~z$w_buff1_used~0_In1448315462 |P2Thread1of1ForFork0_#t~ite30_Out1448315462|) (= |P2Thread1of1ForFork0_#t~ite29_In1448315462| |P2Thread1of1ForFork0_#t~ite29_Out1448315462|) (not .cse0)) (and (= ~z$w_buff1_used~0_In1448315462 |P2Thread1of1ForFork0_#t~ite29_Out1448315462|) .cse1 .cse0 (or (and .cse2 .cse3) (and .cse4 .cse3) .cse5))) (= |P2Thread1of1ForFork0_#t~ite28_In1448315462| |P2Thread1of1ForFork0_#t~ite28_Out1448315462|)) (let ((.cse6 (not .cse3))) (and (or (not .cse2) .cse6) (= 0 |P2Thread1of1ForFork0_#t~ite28_Out1448315462|) .cse1 (or (not .cse4) .cse6) (= |P2Thread1of1ForFork0_#t~ite28_Out1448315462| |P2Thread1of1ForFork0_#t~ite29_Out1448315462|) (not .cse5) .cse0)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In1448315462|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1448315462, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1448315462, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1448315462, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1448315462, ~weak$$choice2~0=~weak$$choice2~0_In1448315462, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1448315462|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out1448315462|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1448315462, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1448315462, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1448315462, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1448315462, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1448315462|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1448315462|, ~weak$$choice2~0=~weak$$choice2~0_In1448315462} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:53:13,548 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:53:13,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 13:53:13,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1582685182 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1582685182| |P2Thread1of1ForFork0_#t~ite38_Out-1582685182|)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1582685182 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1582685182| ~z~0_In-1582685182) .cse2) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1582685182| ~z$w_buff1~0_In-1582685182) (not .cse0) .cse2 (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1582685182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1582685182, ~z$w_buff1~0=~z$w_buff1~0_In-1582685182, ~z~0=~z~0_In-1582685182} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1582685182|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1582685182|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1582685182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1582685182, ~z$w_buff1~0=~z$w_buff1~0_In-1582685182, ~z~0=~z~0_In-1582685182} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:53:13,549 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1758039681 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1758039681 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-1758039681| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1758039681| ~z$w_buff0_used~0_In-1758039681) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1758039681, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1758039681} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1758039681, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1758039681|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1758039681} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:53:13,550 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd3~0_In-211499326 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-211499326 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-211499326 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-211499326 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-211499326| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-211499326| ~z$w_buff1_used~0_In-211499326)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-211499326, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-211499326, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-211499326, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-211499326} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-211499326, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-211499326, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-211499326, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-211499326, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-211499326|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:53:13,550 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In29645117 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In29645117 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out29645117| 0)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out29645117| ~z$r_buff0_thd3~0_In29645117) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In29645117, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In29645117} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In29645117, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In29645117, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out29645117|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:53:13,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-696570084 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-696570084 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-696570084 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-696570084 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-696570084|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-696570084 |P2Thread1of1ForFork0_#t~ite43_Out-696570084|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-696570084, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-696570084, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-696570084, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-696570084} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-696570084|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-696570084, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-696570084, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-696570084, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-696570084} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:53:13,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:53:13,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-575443488 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-575443488 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-575443488|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-575443488 |P0Thread1of1ForFork1_#t~ite5_Out-575443488|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-575443488, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-575443488} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-575443488|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-575443488, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-575443488} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:53:13,551 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1082972240 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-1082972240 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1082972240 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1082972240 256)))) (or (and (= ~z$w_buff1_used~0_In-1082972240 |P0Thread1of1ForFork1_#t~ite6_Out-1082972240|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1082972240|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1082972240, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1082972240, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1082972240, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1082972240} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1082972240, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1082972240|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1082972240, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1082972240, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1082972240} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:53:13,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In6878931 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In6878931 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_Out6878931 ~z$r_buff0_thd1~0_In6878931))) (or (and .cse0 .cse1) (and (not .cse0) (= ~z$r_buff0_thd1~0_Out6878931 0) (not .cse2)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In6878931, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In6878931} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In6878931, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out6878931|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out6878931} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:53:13,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In985980656 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In985980656 256))) (.cse0 (= (mod ~z$r_buff1_thd1~0_In985980656 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In985980656 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out985980656|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out985980656| ~z$r_buff1_thd1~0_In985980656)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In985980656, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In985980656, ~z$w_buff1_used~0=~z$w_buff1_used~0_In985980656, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In985980656} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out985980656|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In985980656, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In985980656, ~z$w_buff1_used~0=~z$w_buff1_used~0_In985980656, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In985980656} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:53:13,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:53:13,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-288516922 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-288516922 256) 0))) (or (and (= ~z$w_buff0_used~0_In-288516922 |P1Thread1of1ForFork2_#t~ite11_Out-288516922|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-288516922|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-288516922, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-288516922} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-288516922, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-288516922|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-288516922} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:53:13,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-343173316 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In-343173316 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-343173316 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-343173316 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-343173316| ~z$w_buff1_used~0_In-343173316) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite12_Out-343173316| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-343173316, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-343173316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-343173316, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-343173316} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-343173316, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-343173316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-343173316, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-343173316|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-343173316} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:53:13,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1848309657 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In1848309657 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out1848309657| ~z$r_buff0_thd2~0_In1848309657) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out1848309657| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1848309657, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1848309657} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1848309657, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out1848309657|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1848309657} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:53:13,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1606857859 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1606857859 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1606857859 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1606857859 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out1606857859| ~z$r_buff1_thd2~0_In1606857859)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1606857859| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1606857859, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1606857859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1606857859, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1606857859} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1606857859, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1606857859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1606857859, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1606857859|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1606857859} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:53:13,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:53:13,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:53:13,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-1108669482 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1108669482 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-1108669482 |ULTIMATE.start_main_#t~ite47_Out-1108669482|)) (and (or .cse1 .cse0) (= ~z~0_In-1108669482 |ULTIMATE.start_main_#t~ite47_Out-1108669482|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1108669482, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1108669482, ~z$w_buff1~0=~z$w_buff1~0_In-1108669482, ~z~0=~z~0_In-1108669482} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1108669482, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1108669482|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1108669482, ~z$w_buff1~0=~z$w_buff1~0_In-1108669482, ~z~0=~z~0_In-1108669482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:53:13,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 13:53:13,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1528009730 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1528009730 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1528009730 |ULTIMATE.start_main_#t~ite49_Out-1528009730|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1528009730|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1528009730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1528009730} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1528009730, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1528009730, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1528009730|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:53:13,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1148785092 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1148785092 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1148785092 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In1148785092 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1148785092|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1148785092 |ULTIMATE.start_main_#t~ite50_Out1148785092|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1148785092, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1148785092, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1148785092, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1148785092} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1148785092|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1148785092, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1148785092, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1148785092, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1148785092} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:53:13,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1115873471 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1115873471 256)))) (or (and (= ~z$r_buff0_thd0~0_In1115873471 |ULTIMATE.start_main_#t~ite51_Out1115873471|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out1115873471| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1115873471, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1115873471} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1115873471, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1115873471|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1115873471} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:53:13,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1423016518 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1423016518 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1423016518 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1423016518 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1423016518| 0)) (and (= ~z$r_buff1_thd0~0_In1423016518 |ULTIMATE.start_main_#t~ite52_Out1423016518|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1423016518, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1423016518, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1423016518, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1423016518} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1423016518|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1423016518, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1423016518, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1423016518, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1423016518} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:53:13,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:53:13,612 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_185520b6-e05c-4eb1-8aff-e0ae66dc0f11/bin/uautomizer/witness.graphml [2019-12-07 13:53:13,612 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:53:13,613 INFO L168 Benchmark]: Toolchain (without parser) took 225135.59 ms. Allocated memory was 1.0 GB in the beginning and 8.7 GB in the end (delta: 7.7 GB). Free memory was 939.8 MB in the beginning and 3.3 GB in the end (delta: -2.4 GB). Peak memory consumption was 5.3 GB. Max. memory is 11.5 GB. [2019-12-07 13:53:13,614 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:53:13,614 INFO L168 Benchmark]: CACSL2BoogieTranslator took 415.91 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.2 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -140.2 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2019-12-07 13:53:13,614 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.45 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:53:13,614 INFO L168 Benchmark]: Boogie Preprocessor took 24.69 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:53:13,614 INFO L168 Benchmark]: RCFGBuilder took 392.81 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 13:53:13,615 INFO L168 Benchmark]: TraceAbstraction took 224189.45 ms. Allocated memory was 1.1 GB in the beginning and 8.7 GB in the end (delta: 7.6 GB). Free memory was 1.0 GB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 5.2 GB. Max. memory is 11.5 GB. [2019-12-07 13:53:13,615 INFO L168 Benchmark]: Witness Printer took 72.17 ms. Allocated memory is still 8.7 GB. Free memory was 3.3 GB in the beginning and 3.3 GB in the end (delta: 39.1 MB). Peak memory consumption was 39.1 MB. Max. memory is 11.5 GB. [2019-12-07 13:53:13,616 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 415.91 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.2 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -140.2 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.45 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.69 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 392.81 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 224189.45 ms. Allocated memory was 1.1 GB in the beginning and 8.7 GB in the end (delta: 7.6 GB). Free memory was 1.0 GB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 5.2 GB. Max. memory is 11.5 GB. * Witness Printer took 72.17 ms. Allocated memory is still 8.7 GB. Free memory was 3.3 GB in the beginning and 3.3 GB in the end (delta: 39.1 MB). Peak memory consumption was 39.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 7047 VarBasedMoverChecksPositive, 336 VarBasedMoverChecksNegative, 168 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 130103 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t669, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t670, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L829] FCALL, FORK 0 pthread_create(&t671, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 2 [L783] 3 __unbuffered_p2_EAX = y [L786] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L787] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L788] 3 z$flush_delayed = weak$$choice2 [L789] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L766] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L791] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L792] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L793] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L803] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L804] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L835] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L837] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L838] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 224.0s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 59.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9515 SDtfs, 10223 SDslu, 33547 SDs, 0 SdLazy, 22312 SolverSat, 370 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 16.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 486 GetRequests, 51 SyntacticMatches, 16 SemanticMatches, 419 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3803 ImplicationChecksByTransitivity, 5.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=371396occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 140.3s AutomataMinimizationTime, 34 MinimizatonAttempts, 706319 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1416 NumberOfCodeBlocks, 1416 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1316 ConstructedInterpolants, 0 QuantifiedInterpolants, 401220 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...