./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix025_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix025_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9ee72d50f62cc7ae6394e01ea5473f81d42639f0 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:21:04,660 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:21:04,661 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:21:04,669 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:21:04,669 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:21:04,669 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:21:04,670 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:21:04,672 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:21:04,673 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:21:04,674 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:21:04,674 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:21:04,675 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:21:04,675 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:21:04,676 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:21:04,676 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:21:04,677 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:21:04,678 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:21:04,678 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:21:04,680 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:21:04,681 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:21:04,683 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:21:04,683 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:21:04,684 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:21:04,684 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:21:04,686 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:21:04,686 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:21:04,686 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:21:04,687 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:21:04,687 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:21:04,688 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:21:04,688 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:21:04,688 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:21:04,689 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:21:04,689 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:21:04,690 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:21:04,690 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:21:04,690 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:21:04,690 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:21:04,690 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:21:04,691 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:21:04,691 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:21:04,692 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:21:04,702 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:21:04,702 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:21:04,702 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:21:04,703 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:21:04,703 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:21:04,703 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:21:04,703 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:21:04,703 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:21:04,703 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:21:04,703 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:21:04,703 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:21:04,704 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:21:04,704 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:21:04,704 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:21:04,704 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:21:04,704 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:21:04,704 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:21:04,704 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:21:04,705 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:21:04,705 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:21:04,705 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:21:04,705 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:21:04,705 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:21:04,705 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:21:04,705 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:21:04,705 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:21:04,706 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:21:04,706 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:21:04,706 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:21:04,706 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9ee72d50f62cc7ae6394e01ea5473f81d42639f0 [2019-12-07 12:21:04,803 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:21:04,810 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:21:04,813 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:21:04,814 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:21:04,814 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:21:04,814 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix025_rmo.opt.i [2019-12-07 12:21:04,850 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/data/39f8538ba/5cb73912606042ca8fc39ce8668cf94e/FLAGa5e940054 [2019-12-07 12:21:05,373 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:21:05,374 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/sv-benchmarks/c/pthread-wmm/mix025_rmo.opt.i [2019-12-07 12:21:05,384 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/data/39f8538ba/5cb73912606042ca8fc39ce8668cf94e/FLAGa5e940054 [2019-12-07 12:21:05,834 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/data/39f8538ba/5cb73912606042ca8fc39ce8668cf94e [2019-12-07 12:21:05,836 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:21:05,837 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:21:05,838 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:21:05,838 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:21:05,841 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:21:05,841 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:21:05" (1/1) ... [2019-12-07 12:21:05,843 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a374d02 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:05, skipping insertion in model container [2019-12-07 12:21:05,843 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:21:05" (1/1) ... [2019-12-07 12:21:05,848 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:21:05,878 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:21:06,155 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:21:06,165 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:21:06,217 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:21:06,268 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:21:06,269 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06 WrapperNode [2019-12-07 12:21:06,269 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:21:06,269 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:21:06,270 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:21:06,270 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:21:06,275 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,292 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,314 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:21:06,314 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:21:06,314 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:21:06,314 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:21:06,321 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,321 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,324 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,324 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,331 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,334 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,336 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... [2019-12-07 12:21:06,339 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:21:06,339 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:21:06,339 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:21:06,339 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:21:06,340 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:21:06,379 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:21:06,379 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:21:06,379 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:21:06,379 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:21:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:21:06,380 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:21:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:21:06,380 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:21:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:21:06,380 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:21:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:21:06,380 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:21:06,380 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:21:06,381 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:21:06,730 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:21:06,730 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:21:06,731 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:21:06 BoogieIcfgContainer [2019-12-07 12:21:06,731 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:21:06,731 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:21:06,731 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:21:06,733 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:21:06,733 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:21:05" (1/3) ... [2019-12-07 12:21:06,734 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f5ddc48 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:21:06, skipping insertion in model container [2019-12-07 12:21:06,734 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:06" (2/3) ... [2019-12-07 12:21:06,734 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f5ddc48 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:21:06, skipping insertion in model container [2019-12-07 12:21:06,734 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:21:06" (3/3) ... [2019-12-07 12:21:06,735 INFO L109 eAbstractionObserver]: Analyzing ICFG mix025_rmo.opt.i [2019-12-07 12:21:06,741 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:21:06,741 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:21:06,746 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:21:06,746 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:21:06,770 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,770 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,770 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,770 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,770 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,770 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,770 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,771 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,771 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,771 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,771 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,771 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,771 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,772 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,773 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,774 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,775 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,776 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,777 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,778 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,779 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,780 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,781 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,781 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,781 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,781 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,781 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,782 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,782 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,782 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,782 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,782 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,782 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,782 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,782 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,783 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,784 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,785 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,785 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,785 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,785 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,786 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,787 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,788 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:21:06,799 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:21:06,811 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:21:06,811 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:21:06,811 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:21:06,811 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:21:06,811 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:21:06,812 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:21:06,812 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:21:06,812 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:21:06,823 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-12-07 12:21:06,824 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 12:21:06,875 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 12:21:06,875 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:21:06,885 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 718 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 12:21:06,899 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 12:21:06,925 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 12:21:06,926 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:21:06,931 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 718 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 12:21:06,946 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 12:21:06,947 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:21:10,130 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 12:21:10,213 INFO L206 etLargeBlockEncoding]: Checked pairs total: 73051 [2019-12-07 12:21:10,213 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 12:21:10,215 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-12-07 12:21:19,288 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 83162 states. [2019-12-07 12:21:19,289 INFO L276 IsEmpty]: Start isEmpty. Operand 83162 states. [2019-12-07 12:21:19,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 12:21:19,294 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:21:19,294 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 12:21:19,294 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:21:19,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:19,298 INFO L82 PathProgramCache]: Analyzing trace with hash 800250999, now seen corresponding path program 1 times [2019-12-07 12:21:19,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:19,304 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605071718] [2019-12-07 12:21:19,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:19,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:19,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:19,440 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [605071718] [2019-12-07 12:21:19,440 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:21:19,440 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:21:19,441 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130890214] [2019-12-07 12:21:19,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:21:19,444 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:19,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:21:19,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:21:19,454 INFO L87 Difference]: Start difference. First operand 83162 states. Second operand 3 states. [2019-12-07 12:21:20,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:20,148 INFO L93 Difference]: Finished difference Result 82042 states and 356056 transitions. [2019-12-07 12:21:20,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:21:20,150 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 12:21:20,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:21:20,603 INFO L225 Difference]: With dead ends: 82042 [2019-12-07 12:21:20,603 INFO L226 Difference]: Without dead ends: 77338 [2019-12-07 12:21:20,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:21:23,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77338 states. [2019-12-07 12:21:24,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77338 to 77338. [2019-12-07 12:21:24,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77338 states. [2019-12-07 12:21:24,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77338 states to 77338 states and 335168 transitions. [2019-12-07 12:21:24,488 INFO L78 Accepts]: Start accepts. Automaton has 77338 states and 335168 transitions. Word has length 5 [2019-12-07 12:21:24,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:21:24,489 INFO L462 AbstractCegarLoop]: Abstraction has 77338 states and 335168 transitions. [2019-12-07 12:21:24,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:21:24,489 INFO L276 IsEmpty]: Start isEmpty. Operand 77338 states and 335168 transitions. [2019-12-07 12:21:24,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:21:24,496 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:21:24,496 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:21:24,496 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:21:24,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:24,496 INFO L82 PathProgramCache]: Analyzing trace with hash -463413440, now seen corresponding path program 1 times [2019-12-07 12:21:24,496 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:24,496 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1370652475] [2019-12-07 12:21:24,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:24,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:24,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:24,560 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1370652475] [2019-12-07 12:21:24,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:21:24,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:21:24,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862275600] [2019-12-07 12:21:24,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:21:24,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:24,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:21:24,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:21:24,562 INFO L87 Difference]: Start difference. First operand 77338 states and 335168 transitions. Second operand 4 states. [2019-12-07 12:21:26,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:26,817 INFO L93 Difference]: Finished difference Result 119002 states and 493831 transitions. [2019-12-07 12:21:26,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:21:26,818 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:21:26,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:21:27,209 INFO L225 Difference]: With dead ends: 119002 [2019-12-07 12:21:27,209 INFO L226 Difference]: Without dead ends: 118911 [2019-12-07 12:21:27,210 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:21:30,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118911 states. [2019-12-07 12:21:32,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118911 to 109839. [2019-12-07 12:21:32,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109839 states. [2019-12-07 12:21:32,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109839 states to 109839 states and 460824 transitions. [2019-12-07 12:21:32,425 INFO L78 Accepts]: Start accepts. Automaton has 109839 states and 460824 transitions. Word has length 13 [2019-12-07 12:21:32,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:21:32,426 INFO L462 AbstractCegarLoop]: Abstraction has 109839 states and 460824 transitions. [2019-12-07 12:21:32,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:21:32,426 INFO L276 IsEmpty]: Start isEmpty. Operand 109839 states and 460824 transitions. [2019-12-07 12:21:32,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:21:32,428 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:21:32,429 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:21:32,429 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:21:32,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,429 INFO L82 PathProgramCache]: Analyzing trace with hash 2092378622, now seen corresponding path program 1 times [2019-12-07 12:21:32,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207220361] [2019-12-07 12:21:32,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:32,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:32,477 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207220361] [2019-12-07 12:21:32,477 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:21:32,478 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:21:32,478 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [485679368] [2019-12-07 12:21:32,478 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:21:32,478 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:32,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:21:32,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:21:32,479 INFO L87 Difference]: Start difference. First operand 109839 states and 460824 transitions. Second operand 4 states. [2019-12-07 12:21:33,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:33,314 INFO L93 Difference]: Finished difference Result 153490 states and 628667 transitions. [2019-12-07 12:21:33,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:21:33,315 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:21:33,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:21:33,739 INFO L225 Difference]: With dead ends: 153490 [2019-12-07 12:21:33,740 INFO L226 Difference]: Without dead ends: 153386 [2019-12-07 12:21:33,740 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:21:37,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153386 states. [2019-12-07 12:21:40,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153386 to 130549. [2019-12-07 12:21:40,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130549 states. [2019-12-07 12:21:41,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130549 states to 130549 states and 543763 transitions. [2019-12-07 12:21:41,344 INFO L78 Accepts]: Start accepts. Automaton has 130549 states and 543763 transitions. Word has length 13 [2019-12-07 12:21:41,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:21:41,344 INFO L462 AbstractCegarLoop]: Abstraction has 130549 states and 543763 transitions. [2019-12-07 12:21:41,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:21:41,344 INFO L276 IsEmpty]: Start isEmpty. Operand 130549 states and 543763 transitions. [2019-12-07 12:21:41,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 12:21:41,347 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:21:41,347 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:21:41,347 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:21:41,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:41,348 INFO L82 PathProgramCache]: Analyzing trace with hash 740124844, now seen corresponding path program 1 times [2019-12-07 12:21:41,348 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:41,348 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376669235] [2019-12-07 12:21:41,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:41,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:41,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:41,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376669235] [2019-12-07 12:21:41,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:21:41,387 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:21:41,387 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1934532016] [2019-12-07 12:21:41,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:21:41,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:41,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:21:41,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:21:41,388 INFO L87 Difference]: Start difference. First operand 130549 states and 543763 transitions. Second operand 4 states. [2019-12-07 12:21:42,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:42,247 INFO L93 Difference]: Finished difference Result 162838 states and 668586 transitions. [2019-12-07 12:21:42,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:21:42,247 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 12:21:42,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:21:42,662 INFO L225 Difference]: With dead ends: 162838 [2019-12-07 12:21:42,662 INFO L226 Difference]: Without dead ends: 162750 [2019-12-07 12:21:42,663 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:21:46,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162750 states. [2019-12-07 12:21:48,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162750 to 140790. [2019-12-07 12:21:48,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140790 states. [2019-12-07 12:21:49,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140790 states to 140790 states and 584562 transitions. [2019-12-07 12:21:49,266 INFO L78 Accepts]: Start accepts. Automaton has 140790 states and 584562 transitions. Word has length 14 [2019-12-07 12:21:49,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:21:49,267 INFO L462 AbstractCegarLoop]: Abstraction has 140790 states and 584562 transitions. [2019-12-07 12:21:49,267 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:21:49,267 INFO L276 IsEmpty]: Start isEmpty. Operand 140790 states and 584562 transitions. [2019-12-07 12:21:49,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 12:21:49,270 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:21:49,271 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:21:49,271 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:21:49,271 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:49,271 INFO L82 PathProgramCache]: Analyzing trace with hash 739988072, now seen corresponding path program 1 times [2019-12-07 12:21:49,271 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:49,271 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368276580] [2019-12-07 12:21:49,271 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:49,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:49,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:49,300 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368276580] [2019-12-07 12:21:49,300 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:21:49,301 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:21:49,301 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834296749] [2019-12-07 12:21:49,301 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:21:49,301 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:49,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:21:49,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:21:49,302 INFO L87 Difference]: Start difference. First operand 140790 states and 584562 transitions. Second operand 3 states. [2019-12-07 12:21:50,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:50,224 INFO L93 Difference]: Finished difference Result 195371 states and 811522 transitions. [2019-12-07 12:21:50,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:21:50,224 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 12:21:50,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:21:50,741 INFO L225 Difference]: With dead ends: 195371 [2019-12-07 12:21:50,741 INFO L226 Difference]: Without dead ends: 195371 [2019-12-07 12:21:50,742 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:21:56,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195371 states. [2019-12-07 12:21:59,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195371 to 171215. [2019-12-07 12:21:59,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171215 states. [2019-12-07 12:22:00,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171215 states to 171215 states and 713371 transitions. [2019-12-07 12:22:00,163 INFO L78 Accepts]: Start accepts. Automaton has 171215 states and 713371 transitions. Word has length 14 [2019-12-07 12:22:00,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:00,163 INFO L462 AbstractCegarLoop]: Abstraction has 171215 states and 713371 transitions. [2019-12-07 12:22:00,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:22:00,163 INFO L276 IsEmpty]: Start isEmpty. Operand 171215 states and 713371 transitions. [2019-12-07 12:22:00,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 12:22:00,166 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:00,166 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:00,166 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:00,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:00,166 INFO L82 PathProgramCache]: Analyzing trace with hash 575422588, now seen corresponding path program 1 times [2019-12-07 12:22:00,166 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:00,167 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593767676] [2019-12-07 12:22:00,167 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:00,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:00,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:00,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593767676] [2019-12-07 12:22:00,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:00,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:22:00,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231343910] [2019-12-07 12:22:00,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:22:00,204 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:00,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:22:00,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:22:00,204 INFO L87 Difference]: Start difference. First operand 171215 states and 713371 transitions. Second operand 4 states. [2019-12-07 12:22:01,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:01,286 INFO L93 Difference]: Finished difference Result 200032 states and 824493 transitions. [2019-12-07 12:22:01,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:22:01,287 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 12:22:01,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:01,843 INFO L225 Difference]: With dead ends: 200032 [2019-12-07 12:22:01,843 INFO L226 Difference]: Without dead ends: 199944 [2019-12-07 12:22:01,844 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:22:06,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199944 states. [2019-12-07 12:22:11,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199944 to 173869. [2019-12-07 12:22:11,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173869 states. [2019-12-07 12:22:12,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173869 states to 173869 states and 724501 transitions. [2019-12-07 12:22:12,186 INFO L78 Accepts]: Start accepts. Automaton has 173869 states and 724501 transitions. Word has length 14 [2019-12-07 12:22:12,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:12,186 INFO L462 AbstractCegarLoop]: Abstraction has 173869 states and 724501 transitions. [2019-12-07 12:22:12,187 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:22:12,187 INFO L276 IsEmpty]: Start isEmpty. Operand 173869 states and 724501 transitions. [2019-12-07 12:22:12,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:22:12,200 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:12,200 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:12,200 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:12,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:12,200 INFO L82 PathProgramCache]: Analyzing trace with hash -1027045792, now seen corresponding path program 1 times [2019-12-07 12:22:12,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:12,201 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594240341] [2019-12-07 12:22:12,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:12,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:12,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:12,232 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594240341] [2019-12-07 12:22:12,232 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:12,232 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:22:12,232 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [164343216] [2019-12-07 12:22:12,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:22:12,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:12,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:22:12,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:22:12,233 INFO L87 Difference]: Start difference. First operand 173869 states and 724501 transitions. Second operand 3 states. [2019-12-07 12:22:12,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:12,999 INFO L93 Difference]: Finished difference Result 164023 states and 676058 transitions. [2019-12-07 12:22:12,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:22:12,999 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:22:12,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:13,434 INFO L225 Difference]: With dead ends: 164023 [2019-12-07 12:22:13,434 INFO L226 Difference]: Without dead ends: 164023 [2019-12-07 12:22:13,434 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:22:17,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164023 states. [2019-12-07 12:22:19,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164023 to 161763. [2019-12-07 12:22:19,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161763 states. [2019-12-07 12:22:20,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161763 states to 161763 states and 667464 transitions. [2019-12-07 12:22:20,211 INFO L78 Accepts]: Start accepts. Automaton has 161763 states and 667464 transitions. Word has length 18 [2019-12-07 12:22:20,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:20,211 INFO L462 AbstractCegarLoop]: Abstraction has 161763 states and 667464 transitions. [2019-12-07 12:22:20,211 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:22:20,211 INFO L276 IsEmpty]: Start isEmpty. Operand 161763 states and 667464 transitions. [2019-12-07 12:22:20,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 12:22:20,221 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:20,221 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:20,222 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:20,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:20,222 INFO L82 PathProgramCache]: Analyzing trace with hash 1868687955, now seen corresponding path program 1 times [2019-12-07 12:22:20,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:20,222 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945053787] [2019-12-07 12:22:20,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:20,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:20,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:20,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945053787] [2019-12-07 12:22:20,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:20,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:22:20,255 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141333299] [2019-12-07 12:22:20,255 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:22:20,255 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:20,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:22:20,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:22:20,255 INFO L87 Difference]: Start difference. First operand 161763 states and 667464 transitions. Second operand 3 states. [2019-12-07 12:22:20,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:20,985 INFO L93 Difference]: Finished difference Result 161632 states and 666908 transitions. [2019-12-07 12:22:20,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:22:20,986 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 12:22:20,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:21,393 INFO L225 Difference]: With dead ends: 161632 [2019-12-07 12:22:21,393 INFO L226 Difference]: Without dead ends: 161632 [2019-12-07 12:22:21,394 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:22:25,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161632 states. [2019-12-07 12:22:27,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161632 to 161632. [2019-12-07 12:22:27,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161632 states. [2019-12-07 12:22:27,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161632 states to 161632 states and 666908 transitions. [2019-12-07 12:22:27,928 INFO L78 Accepts]: Start accepts. Automaton has 161632 states and 666908 transitions. Word has length 18 [2019-12-07 12:22:27,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:27,928 INFO L462 AbstractCegarLoop]: Abstraction has 161632 states and 666908 transitions. [2019-12-07 12:22:27,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:22:27,929 INFO L276 IsEmpty]: Start isEmpty. Operand 161632 states and 666908 transitions. [2019-12-07 12:22:27,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:22:27,944 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:27,944 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:27,944 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:27,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:27,944 INFO L82 PathProgramCache]: Analyzing trace with hash 1754353062, now seen corresponding path program 1 times [2019-12-07 12:22:27,944 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:27,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183439453] [2019-12-07 12:22:27,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:27,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:27,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:27,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [183439453] [2019-12-07 12:22:27,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:27,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:22:27,986 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1263305090] [2019-12-07 12:22:27,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:22:27,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:27,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:22:27,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:22:27,987 INFO L87 Difference]: Start difference. First operand 161632 states and 666908 transitions. Second operand 4 states. [2019-12-07 12:22:28,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:28,171 INFO L93 Difference]: Finished difference Result 43887 states and 153491 transitions. [2019-12-07 12:22:28,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:22:28,172 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 12:22:28,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:28,230 INFO L225 Difference]: With dead ends: 43887 [2019-12-07 12:22:28,230 INFO L226 Difference]: Without dead ends: 34145 [2019-12-07 12:22:28,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:22:28,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34145 states. [2019-12-07 12:22:28,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34145 to 34145. [2019-12-07 12:22:28,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34145 states. [2019-12-07 12:22:29,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34145 states to 34145 states and 113765 transitions. [2019-12-07 12:22:29,188 INFO L78 Accepts]: Start accepts. Automaton has 34145 states and 113765 transitions. Word has length 19 [2019-12-07 12:22:29,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:29,189 INFO L462 AbstractCegarLoop]: Abstraction has 34145 states and 113765 transitions. [2019-12-07 12:22:29,189 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:22:29,189 INFO L276 IsEmpty]: Start isEmpty. Operand 34145 states and 113765 transitions. [2019-12-07 12:22:29,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:22:29,195 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:29,195 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:29,195 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:29,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:29,195 INFO L82 PathProgramCache]: Analyzing trace with hash -532738305, now seen corresponding path program 1 times [2019-12-07 12:22:29,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:29,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278639331] [2019-12-07 12:22:29,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:29,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:29,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:29,239 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278639331] [2019-12-07 12:22:29,239 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:29,239 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:22:29,239 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265788237] [2019-12-07 12:22:29,240 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:22:29,240 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:29,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:22:29,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:22:29,240 INFO L87 Difference]: Start difference. First operand 34145 states and 113765 transitions. Second operand 5 states. [2019-12-07 12:22:29,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:29,632 INFO L93 Difference]: Finished difference Result 46621 states and 152320 transitions. [2019-12-07 12:22:29,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:22:29,632 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:22:29,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:29,700 INFO L225 Difference]: With dead ends: 46621 [2019-12-07 12:22:29,701 INFO L226 Difference]: Without dead ends: 46431 [2019-12-07 12:22:29,701 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:22:29,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46431 states. [2019-12-07 12:22:30,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46431 to 34846. [2019-12-07 12:22:30,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34846 states. [2019-12-07 12:22:30,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34846 states to 34846 states and 115876 transitions. [2019-12-07 12:22:30,383 INFO L78 Accepts]: Start accepts. Automaton has 34846 states and 115876 transitions. Word has length 22 [2019-12-07 12:22:30,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:30,383 INFO L462 AbstractCegarLoop]: Abstraction has 34846 states and 115876 transitions. [2019-12-07 12:22:30,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:22:30,383 INFO L276 IsEmpty]: Start isEmpty. Operand 34846 states and 115876 transitions. [2019-12-07 12:22:30,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 12:22:30,390 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:30,390 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:30,390 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:30,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:30,391 INFO L82 PathProgramCache]: Analyzing trace with hash 828372869, now seen corresponding path program 1 times [2019-12-07 12:22:30,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:30,391 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507442152] [2019-12-07 12:22:30,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:30,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:30,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:30,429 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [507442152] [2019-12-07 12:22:30,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:30,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:22:30,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592475217] [2019-12-07 12:22:30,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:22:30,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:30,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:22:30,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:22:30,430 INFO L87 Difference]: Start difference. First operand 34846 states and 115876 transitions. Second operand 5 states. [2019-12-07 12:22:30,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:30,819 INFO L93 Difference]: Finished difference Result 47222 states and 154181 transitions. [2019-12-07 12:22:30,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:22:30,820 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 12:22:30,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:30,887 INFO L225 Difference]: With dead ends: 47222 [2019-12-07 12:22:30,888 INFO L226 Difference]: Without dead ends: 46954 [2019-12-07 12:22:30,888 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:22:31,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46954 states. [2019-12-07 12:22:31,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46954 to 33337. [2019-12-07 12:22:31,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33337 states. [2019-12-07 12:22:31,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33337 states to 33337 states and 110986 transitions. [2019-12-07 12:22:31,563 INFO L78 Accepts]: Start accepts. Automaton has 33337 states and 110986 transitions. Word has length 22 [2019-12-07 12:22:31,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:31,563 INFO L462 AbstractCegarLoop]: Abstraction has 33337 states and 110986 transitions. [2019-12-07 12:22:31,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:22:31,564 INFO L276 IsEmpty]: Start isEmpty. Operand 33337 states and 110986 transitions. [2019-12-07 12:22:31,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:22:31,574 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:31,574 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:31,575 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:31,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:31,575 INFO L82 PathProgramCache]: Analyzing trace with hash 732122685, now seen corresponding path program 1 times [2019-12-07 12:22:31,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:31,575 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658629332] [2019-12-07 12:22:31,575 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:31,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:31,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:31,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658629332] [2019-12-07 12:22:31,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:31,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:22:31,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [909883166] [2019-12-07 12:22:31,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:22:31,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:31,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:22:31,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:22:31,623 INFO L87 Difference]: Start difference. First operand 33337 states and 110986 transitions. Second operand 5 states. [2019-12-07 12:22:31,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:31,694 INFO L93 Difference]: Finished difference Result 14494 states and 45959 transitions. [2019-12-07 12:22:31,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:22:31,695 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:22:31,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:31,712 INFO L225 Difference]: With dead ends: 14494 [2019-12-07 12:22:31,712 INFO L226 Difference]: Without dead ends: 12571 [2019-12-07 12:22:31,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:22:31,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12571 states. [2019-12-07 12:22:31,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12571 to 12571. [2019-12-07 12:22:31,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12571 states. [2019-12-07 12:22:31,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12571 states to 12571 states and 39618 transitions. [2019-12-07 12:22:31,897 INFO L78 Accepts]: Start accepts. Automaton has 12571 states and 39618 transitions. Word has length 25 [2019-12-07 12:22:31,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:31,897 INFO L462 AbstractCegarLoop]: Abstraction has 12571 states and 39618 transitions. [2019-12-07 12:22:31,897 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:22:31,897 INFO L276 IsEmpty]: Start isEmpty. Operand 12571 states and 39618 transitions. [2019-12-07 12:22:31,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 12:22:31,914 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:31,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:31,915 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:31,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:31,915 INFO L82 PathProgramCache]: Analyzing trace with hash 2042810970, now seen corresponding path program 1 times [2019-12-07 12:22:31,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:31,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026454232] [2019-12-07 12:22:31,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:31,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:32,620 WARN L192 SmtUtils]: Spent 674.00 ms on a formula simplification that was a NOOP. DAG size: 3 [2019-12-07 12:22:32,647 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:32,647 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1026454232] [2019-12-07 12:22:32,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:32,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:22:32,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313548598] [2019-12-07 12:22:32,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:22:32,648 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:32,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:22:32,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:22:32,648 INFO L87 Difference]: Start difference. First operand 12571 states and 39618 transitions. Second operand 6 states. [2019-12-07 12:22:32,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:32,721 INFO L93 Difference]: Finished difference Result 11439 states and 36801 transitions. [2019-12-07 12:22:32,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:22:32,722 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 12:22:32,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:32,735 INFO L225 Difference]: With dead ends: 11439 [2019-12-07 12:22:32,735 INFO L226 Difference]: Without dead ends: 11319 [2019-12-07 12:22:32,736 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:22:32,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11319 states. [2019-12-07 12:22:32,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11319 to 11319. [2019-12-07 12:22:32,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11319 states. [2019-12-07 12:22:32,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11319 states to 11319 states and 36513 transitions. [2019-12-07 12:22:32,900 INFO L78 Accepts]: Start accepts. Automaton has 11319 states and 36513 transitions. Word has length 40 [2019-12-07 12:22:32,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:32,901 INFO L462 AbstractCegarLoop]: Abstraction has 11319 states and 36513 transitions. [2019-12-07 12:22:32,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:22:32,901 INFO L276 IsEmpty]: Start isEmpty. Operand 11319 states and 36513 transitions. [2019-12-07 12:22:32,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 12:22:32,916 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:32,916 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:32,917 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:32,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:32,917 INFO L82 PathProgramCache]: Analyzing trace with hash -381894513, now seen corresponding path program 1 times [2019-12-07 12:22:32,917 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:32,917 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [716563129] [2019-12-07 12:22:32,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:32,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:32,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:32,954 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [716563129] [2019-12-07 12:22:32,954 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:32,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:22:32,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401950719] [2019-12-07 12:22:32,955 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:22:32,955 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:32,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:22:32,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:22:32,955 INFO L87 Difference]: Start difference. First operand 11319 states and 36513 transitions. Second operand 3 states. [2019-12-07 12:22:33,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:33,009 INFO L93 Difference]: Finished difference Result 13193 states and 40685 transitions. [2019-12-07 12:22:33,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:22:33,010 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 12:22:33,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:33,025 INFO L225 Difference]: With dead ends: 13193 [2019-12-07 12:22:33,025 INFO L226 Difference]: Without dead ends: 13193 [2019-12-07 12:22:33,025 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:22:33,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13193 states. [2019-12-07 12:22:33,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13193 to 10788. [2019-12-07 12:22:33,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10788 states. [2019-12-07 12:22:33,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10788 states to 10788 states and 33724 transitions. [2019-12-07 12:22:33,190 INFO L78 Accepts]: Start accepts. Automaton has 10788 states and 33724 transitions. Word has length 55 [2019-12-07 12:22:33,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:33,190 INFO L462 AbstractCegarLoop]: Abstraction has 10788 states and 33724 transitions. [2019-12-07 12:22:33,190 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:22:33,190 INFO L276 IsEmpty]: Start isEmpty. Operand 10788 states and 33724 transitions. [2019-12-07 12:22:33,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 12:22:33,201 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:33,202 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:33,202 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:33,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:33,202 INFO L82 PathProgramCache]: Analyzing trace with hash -1650414782, now seen corresponding path program 1 times [2019-12-07 12:22:33,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:33,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597763630] [2019-12-07 12:22:33,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:33,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:33,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:33,260 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597763630] [2019-12-07 12:22:33,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:33,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:22:33,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [755909625] [2019-12-07 12:22:33,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:22:33,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:33,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:22:33,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:22:33,261 INFO L87 Difference]: Start difference. First operand 10788 states and 33724 transitions. Second operand 5 states. [2019-12-07 12:22:33,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:33,539 INFO L93 Difference]: Finished difference Result 16870 states and 51762 transitions. [2019-12-07 12:22:33,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:22:33,539 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 12:22:33,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:33,558 INFO L225 Difference]: With dead ends: 16870 [2019-12-07 12:22:33,558 INFO L226 Difference]: Without dead ends: 16870 [2019-12-07 12:22:33,559 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:22:33,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16870 states. [2019-12-07 12:22:33,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16870 to 14232. [2019-12-07 12:22:33,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14232 states. [2019-12-07 12:22:33,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14232 states to 14232 states and 44255 transitions. [2019-12-07 12:22:33,798 INFO L78 Accepts]: Start accepts. Automaton has 14232 states and 44255 transitions. Word has length 55 [2019-12-07 12:22:33,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:33,798 INFO L462 AbstractCegarLoop]: Abstraction has 14232 states and 44255 transitions. [2019-12-07 12:22:33,798 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:22:33,798 INFO L276 IsEmpty]: Start isEmpty. Operand 14232 states and 44255 transitions. [2019-12-07 12:22:33,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 12:22:33,812 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:33,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:33,813 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:33,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:33,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1899616948, now seen corresponding path program 2 times [2019-12-07 12:22:33,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:33,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690921558] [2019-12-07 12:22:33,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:33,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:33,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:33,877 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [690921558] [2019-12-07 12:22:33,878 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:33,878 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:22:33,878 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1131994379] [2019-12-07 12:22:33,878 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:22:33,878 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:33,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:22:33,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:22:33,879 INFO L87 Difference]: Start difference. First operand 14232 states and 44255 transitions. Second operand 6 states. [2019-12-07 12:22:34,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:34,305 INFO L93 Difference]: Finished difference Result 18267 states and 55816 transitions. [2019-12-07 12:22:34,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 12:22:34,306 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 12:22:34,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:34,326 INFO L225 Difference]: With dead ends: 18267 [2019-12-07 12:22:34,326 INFO L226 Difference]: Without dead ends: 18267 [2019-12-07 12:22:34,327 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:22:34,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18267 states. [2019-12-07 12:22:34,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18267 to 14332. [2019-12-07 12:22:34,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14332 states. [2019-12-07 12:22:34,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14332 states to 14332 states and 44555 transitions. [2019-12-07 12:22:34,564 INFO L78 Accepts]: Start accepts. Automaton has 14332 states and 44555 transitions. Word has length 55 [2019-12-07 12:22:34,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:34,565 INFO L462 AbstractCegarLoop]: Abstraction has 14332 states and 44555 transitions. [2019-12-07 12:22:34,565 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:22:34,565 INFO L276 IsEmpty]: Start isEmpty. Operand 14332 states and 44555 transitions. [2019-12-07 12:22:34,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 12:22:34,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:34,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:34,579 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:34,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:34,580 INFO L82 PathProgramCache]: Analyzing trace with hash -982351416, now seen corresponding path program 3 times [2019-12-07 12:22:34,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:34,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417698633] [2019-12-07 12:22:34,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:34,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:34,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:34,643 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417698633] [2019-12-07 12:22:34,644 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:34,644 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:22:34,644 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446690617] [2019-12-07 12:22:34,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:22:34,644 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:34,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:22:34,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:22:34,645 INFO L87 Difference]: Start difference. First operand 14332 states and 44555 transitions. Second operand 3 states. [2019-12-07 12:22:34,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:34,690 INFO L93 Difference]: Finished difference Result 13632 states and 41782 transitions. [2019-12-07 12:22:34,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:22:34,691 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 12:22:34,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:34,707 INFO L225 Difference]: With dead ends: 13632 [2019-12-07 12:22:34,707 INFO L226 Difference]: Without dead ends: 13632 [2019-12-07 12:22:34,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:22:34,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13632 states. [2019-12-07 12:22:34,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13632 to 12736. [2019-12-07 12:22:34,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12736 states. [2019-12-07 12:22:34,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12736 states to 12736 states and 39166 transitions. [2019-12-07 12:22:34,898 INFO L78 Accepts]: Start accepts. Automaton has 12736 states and 39166 transitions. Word has length 55 [2019-12-07 12:22:34,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:34,899 INFO L462 AbstractCegarLoop]: Abstraction has 12736 states and 39166 transitions. [2019-12-07 12:22:34,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:22:34,899 INFO L276 IsEmpty]: Start isEmpty. Operand 12736 states and 39166 transitions. [2019-12-07 12:22:34,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 12:22:34,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:34,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:34,913 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:34,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:34,913 INFO L82 PathProgramCache]: Analyzing trace with hash -415784116, now seen corresponding path program 1 times [2019-12-07 12:22:34,913 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:34,913 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357777350] [2019-12-07 12:22:34,913 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:34,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:34,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:34,954 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357777350] [2019-12-07 12:22:34,954 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:34,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:22:34,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387425562] [2019-12-07 12:22:34,955 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:22:34,955 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:34,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:22:34,955 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:22:34,955 INFO L87 Difference]: Start difference. First operand 12736 states and 39166 transitions. Second operand 4 states. [2019-12-07 12:22:35,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:35,037 INFO L93 Difference]: Finished difference Result 22862 states and 70257 transitions. [2019-12-07 12:22:35,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:22:35,037 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2019-12-07 12:22:35,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:35,048 INFO L225 Difference]: With dead ends: 22862 [2019-12-07 12:22:35,049 INFO L226 Difference]: Without dead ends: 10574 [2019-12-07 12:22:35,049 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:22:35,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10574 states. [2019-12-07 12:22:35,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10574 to 10574. [2019-12-07 12:22:35,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10574 states. [2019-12-07 12:22:35,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10574 states to 10574 states and 32300 transitions. [2019-12-07 12:22:35,197 INFO L78 Accepts]: Start accepts. Automaton has 10574 states and 32300 transitions. Word has length 56 [2019-12-07 12:22:35,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:35,197 INFO L462 AbstractCegarLoop]: Abstraction has 10574 states and 32300 transitions. [2019-12-07 12:22:35,197 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:22:35,197 INFO L276 IsEmpty]: Start isEmpty. Operand 10574 states and 32300 transitions. [2019-12-07 12:22:35,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 12:22:35,209 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:35,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:35,209 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:35,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:35,210 INFO L82 PathProgramCache]: Analyzing trace with hash 1395977884, now seen corresponding path program 2 times [2019-12-07 12:22:35,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:35,210 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1744176242] [2019-12-07 12:22:35,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:35,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:35,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:35,391 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1744176242] [2019-12-07 12:22:35,391 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:35,391 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:22:35,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18890782] [2019-12-07 12:22:35,392 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:22:35,392 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:35,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:22:35,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:22:35,392 INFO L87 Difference]: Start difference. First operand 10574 states and 32300 transitions. Second operand 11 states. [2019-12-07 12:22:36,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:36,122 INFO L93 Difference]: Finished difference Result 28783 states and 88360 transitions. [2019-12-07 12:22:36,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 12:22:36,123 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 12:22:36,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:36,153 INFO L225 Difference]: With dead ends: 28783 [2019-12-07 12:22:36,154 INFO L226 Difference]: Without dead ends: 27449 [2019-12-07 12:22:36,154 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 349 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=271, Invalid=1135, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 12:22:36,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27449 states. [2019-12-07 12:22:36,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27449 to 17385. [2019-12-07 12:22:36,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17385 states. [2019-12-07 12:22:36,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17385 states to 17385 states and 53448 transitions. [2019-12-07 12:22:36,484 INFO L78 Accepts]: Start accepts. Automaton has 17385 states and 53448 transitions. Word has length 56 [2019-12-07 12:22:36,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:36,485 INFO L462 AbstractCegarLoop]: Abstraction has 17385 states and 53448 transitions. [2019-12-07 12:22:36,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:22:36,485 INFO L276 IsEmpty]: Start isEmpty. Operand 17385 states and 53448 transitions. [2019-12-07 12:22:36,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 12:22:36,500 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:36,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:36,501 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:36,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:36,501 INFO L82 PathProgramCache]: Analyzing trace with hash 2017615148, now seen corresponding path program 3 times [2019-12-07 12:22:36,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:36,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383622757] [2019-12-07 12:22:36,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:36,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:36,779 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:36,779 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383622757] [2019-12-07 12:22:36,779 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:36,779 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 12:22:36,779 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [99343797] [2019-12-07 12:22:36,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 12:22:36,780 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:36,780 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 12:22:36,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 12:22:36,780 INFO L87 Difference]: Start difference. First operand 17385 states and 53448 transitions. Second operand 15 states. [2019-12-07 12:22:44,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:44,951 INFO L93 Difference]: Finished difference Result 62799 states and 188551 transitions. [2019-12-07 12:22:44,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2019-12-07 12:22:44,951 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 12:22:44,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:45,001 INFO L225 Difference]: With dead ends: 62799 [2019-12-07 12:22:45,001 INFO L226 Difference]: Without dead ends: 45299 [2019-12-07 12:22:45,004 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3271 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1282, Invalid=7648, Unknown=0, NotChecked=0, Total=8930 [2019-12-07 12:22:45,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45299 states. [2019-12-07 12:22:45,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45299 to 17890. [2019-12-07 12:22:45,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17890 states. [2019-12-07 12:22:45,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17890 states to 17890 states and 54365 transitions. [2019-12-07 12:22:45,444 INFO L78 Accepts]: Start accepts. Automaton has 17890 states and 54365 transitions. Word has length 56 [2019-12-07 12:22:45,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:45,444 INFO L462 AbstractCegarLoop]: Abstraction has 17890 states and 54365 transitions. [2019-12-07 12:22:45,444 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 12:22:45,444 INFO L276 IsEmpty]: Start isEmpty. Operand 17890 states and 54365 transitions. [2019-12-07 12:22:45,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 12:22:45,462 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:45,462 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:45,462 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:45,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:45,462 INFO L82 PathProgramCache]: Analyzing trace with hash 72457218, now seen corresponding path program 4 times [2019-12-07 12:22:45,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:45,462 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1003717974] [2019-12-07 12:22:45,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:45,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:45,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:45,580 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1003717974] [2019-12-07 12:22:45,580 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:45,580 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 12:22:45,580 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2102862082] [2019-12-07 12:22:45,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 12:22:45,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:45,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:22:45,581 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:22:45,581 INFO L87 Difference]: Start difference. First operand 17890 states and 54365 transitions. Second operand 11 states. [2019-12-07 12:22:46,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:46,513 INFO L93 Difference]: Finished difference Result 28227 states and 85104 transitions. [2019-12-07 12:22:46,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 12:22:46,514 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 12:22:46,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:46,537 INFO L225 Difference]: With dead ends: 28227 [2019-12-07 12:22:46,537 INFO L226 Difference]: Without dead ends: 19968 [2019-12-07 12:22:46,537 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2019-12-07 12:22:46,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19968 states. [2019-12-07 12:22:46,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19968 to 12647. [2019-12-07 12:22:46,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12647 states. [2019-12-07 12:22:46,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12647 states to 12647 states and 38013 transitions. [2019-12-07 12:22:46,772 INFO L78 Accepts]: Start accepts. Automaton has 12647 states and 38013 transitions. Word has length 56 [2019-12-07 12:22:46,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:46,773 INFO L462 AbstractCegarLoop]: Abstraction has 12647 states and 38013 transitions. [2019-12-07 12:22:46,773 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 12:22:46,773 INFO L276 IsEmpty]: Start isEmpty. Operand 12647 states and 38013 transitions. [2019-12-07 12:22:46,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 12:22:46,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:46,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:46,785 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:46,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:46,785 INFO L82 PathProgramCache]: Analyzing trace with hash 637748608, now seen corresponding path program 5 times [2019-12-07 12:22:46,785 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:46,785 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130415440] [2019-12-07 12:22:46,785 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:46,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:22:46,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:22:46,928 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130415440] [2019-12-07 12:22:46,928 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:22:46,928 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:22:46,928 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1559145697] [2019-12-07 12:22:46,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:22:46,929 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:22:46,929 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:22:46,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:22:46,929 INFO L87 Difference]: Start difference. First operand 12647 states and 38013 transitions. Second operand 12 states. [2019-12-07 12:22:47,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:22:47,439 INFO L93 Difference]: Finished difference Result 20040 states and 59582 transitions. [2019-12-07 12:22:47,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 12:22:47,439 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 12:22:47,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:22:47,460 INFO L225 Difference]: With dead ends: 20040 [2019-12-07 12:22:47,460 INFO L226 Difference]: Without dead ends: 19045 [2019-12-07 12:22:47,461 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=697, Unknown=0, NotChecked=0, Total=870 [2019-12-07 12:22:47,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19045 states. [2019-12-07 12:22:47,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19045 to 12303. [2019-12-07 12:22:47,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12303 states. [2019-12-07 12:22:47,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12303 states to 12303 states and 37063 transitions. [2019-12-07 12:22:47,686 INFO L78 Accepts]: Start accepts. Automaton has 12303 states and 37063 transitions. Word has length 56 [2019-12-07 12:22:47,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:22:47,686 INFO L462 AbstractCegarLoop]: Abstraction has 12303 states and 37063 transitions. [2019-12-07 12:22:47,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:22:47,686 INFO L276 IsEmpty]: Start isEmpty. Operand 12303 states and 37063 transitions. [2019-12-07 12:22:47,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 12:22:47,698 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:22:47,698 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:22:47,698 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:22:47,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:22:47,698 INFO L82 PathProgramCache]: Analyzing trace with hash -1474997086, now seen corresponding path program 6 times [2019-12-07 12:22:47,698 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:22:47,698 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336745066] [2019-12-07 12:22:47,698 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:22:47,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:22:47,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:22:47,774 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:22:47,774 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:22:47,776 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] ULTIMATE.startENTRY-->L821: Formula: (let ((.cse0 (store |v_#valid_70| 0 0))) (and (= (select .cse0 |v_ULTIMATE.start_main_~#t672~0.base_35|) 0) (= 0 v_~weak$$choice0~0_31) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_191) (= v_~main$tmp_guard1~0_50 0) (= v_~x$flush_delayed~0_46 0) (= v_~weak$$choice2~0_179 0) (= v_~x$r_buff0_thd1~0_355 0) (= |v_#NULL.offset_3| 0) (= 0 v_~x$w_buff0~0_341) (= |v_ULTIMATE.start_main_~#t672~0.offset_25| 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_8) (= v_~main$tmp_guard0~0_45 0) (= 0 v_~x$r_buff1_thd3~0_194) (= v_~y~0_194 0) (= 0 v_~x$r_buff0_thd2~0_248) (= 0 v_~__unbuffered_cnt~0_63) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t672~0.base_35|) (= 0 v_~x~0_215) (= v_~x$r_buff1_thd0~0_218 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t672~0.base_35| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t672~0.base_35|) |v_ULTIMATE.start_main_~#t672~0.offset_25| 0)) |v_#memory_int_15|) (= 0 v_~x$w_buff0_used~0_867) (= v_~__unbuffered_p2_EBX~0_66 0) (= v_~z~0_56 0) (= 0 v_~__unbuffered_p2_EAX~0_66) (= v_~x$r_buff0_thd0~0_151 0) (= v_~x$mem_tmp~0_33 0) (= v_~x$r_buff1_thd1~0_359 0) (= 0 v_~x$w_buff1~0_257) (= 0 |v_#NULL.base_3|) (= 0 v_~x$r_buff0_thd3~0_139) (= |v_#valid_68| (store .cse0 |v_ULTIMATE.start_main_~#t672~0.base_35| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t672~0.base_35| 4)) (= 0 v_~x$w_buff1_used~0_545))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_341, ~x$flush_delayed~0=v_~x$flush_delayed~0_46, #NULL.offset=|v_#NULL.offset_3|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_359, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_139, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_52|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, #length=|v_#length_17|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_66, ULTIMATE.start_main_~#t674~0.base=|v_ULTIMATE.start_main_~#t674~0.base_35|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_66, ~x$w_buff1~0=v_~x$w_buff1~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_545, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_191, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_31, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~x~0=v_~x~0_215, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_355, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_104|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_194, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ~x$mem_tmp~0=v_~x$mem_tmp~0_33, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_49|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_66|, ULTIMATE.start_main_~#t674~0.offset=|v_ULTIMATE.start_main_~#t674~0.offset_25|, ~y~0=v_~y~0_194, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_45, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_218, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_248, ULTIMATE.start_main_~#t672~0.base=|v_ULTIMATE.start_main_~#t672~0.base_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_~#t673~0.offset=|v_ULTIMATE.start_main_~#t673~0.offset_25|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_867, ULTIMATE.start_main_~#t673~0.base=|v_ULTIMATE.start_main_~#t673~0.base_35|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_48|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_68|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_11|, ~z~0=v_~z~0_56, ~weak$$choice2~0=v_~weak$$choice2~0_179, ULTIMATE.start_main_~#t672~0.offset=|v_ULTIMATE.start_main_~#t672~0.offset_25|, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t674~0.base, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t674~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_~#t672~0.base, #NULL.base, ULTIMATE.start_main_~#t673~0.offset, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t673~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t672~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:22:47,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L821-1-->L823: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t673~0.base_13| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t673~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t673~0.offset_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t673~0.base_13| 4)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t673~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t673~0.base_13|) |v_ULTIMATE.start_main_~#t673~0.offset_11| 1))) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t673~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t673~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t673~0.base=|v_ULTIMATE.start_main_~#t673~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t673~0.offset=|v_ULTIMATE.start_main_~#t673~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t673~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t673~0.offset] because there is no mapped edge [2019-12-07 12:22:47,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L823-1-->L825: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t674~0.base_12|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t674~0.base_12|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t674~0.base_12| 4)) (= 0 |v_ULTIMATE.start_main_~#t674~0.offset_10|) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t674~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t674~0.base_12|) |v_ULTIMATE.start_main_~#t674~0.offset_10| 2))) (not (= |v_ULTIMATE.start_main_~#t674~0.base_12| 0)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t674~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t674~0.offset=|v_ULTIMATE.start_main_~#t674~0.offset_10|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t674~0.base=|v_ULTIMATE.start_main_~#t674~0.base_12|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t674~0.offset, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t674~0.base] because there is no mapped edge [2019-12-07 12:22:47,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L5-3: Formula: (and (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_107 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_57 256))))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (= |v_P1Thread1of1ForFork0_#in~arg.base_11| v_P1Thread1of1ForFork0_~arg.base_9) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (not (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11 0)) (= 1 v_~x$w_buff0_used~0_107) (= v_~x$w_buff1_used~0_57 v_~x$w_buff0_used~0_108) (= v_~x$w_buff0~0_35 v_~x$w_buff1~0_25) (= 1 v_~x$w_buff0~0_34) (= |v_P1Thread1of1ForFork0_#in~arg.offset_11| v_P1Thread1of1ForFork0_~arg.offset_9)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_35, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_11|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_108} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_34, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_9, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_9, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_11|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|, ~x$w_buff1~0=v_~x$w_buff1~0_25, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_57, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_107} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 12:22:47,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L798-2-->L798-4: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd3~0_In1321631587 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1321631587 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite32_Out1321631587| ~x$w_buff1~0_In1321631587)) (and (or .cse0 .cse1) (= ~x~0_In1321631587 |P2Thread1of1ForFork1_#t~ite32_Out1321631587|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1321631587, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1321631587, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1321631587, ~x~0=~x~0_In1321631587} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out1321631587|, ~x$w_buff1~0=~x$w_buff1~0_In1321631587, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1321631587, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1321631587, ~x~0=~x~0_In1321631587} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 12:22:47,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L798-4-->L799: Formula: (= v_~x~0_55 |v_P2Thread1of1ForFork1_#t~ite32_22|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_22|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_21|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_27|, ~x~0=v_~x~0_55} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 12:22:47,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1577997030 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1577997030 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1577997030 |P2Thread1of1ForFork1_#t~ite34_Out-1577997030|)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite34_Out-1577997030| 0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1577997030, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1577997030} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1577997030|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1577997030, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1577997030} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 12:22:47,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L776-->L776-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1532895624 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1532895624 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite28_Out-1532895624| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite28_Out-1532895624| ~x$w_buff0_used~0_In-1532895624)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1532895624, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1532895624} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1532895624, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-1532895624|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1532895624} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 12:22:47,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L777-->L777-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd2~0_In1916082085 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1916082085 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1916082085 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In1916082085 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out1916082085| ~x$w_buff1_used~0_In1916082085) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork0_#t~ite29_Out1916082085| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1916082085, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1916082085, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1916082085, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1916082085} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1916082085, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1916082085, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1916082085, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1916082085|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1916082085} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 12:22:47,781 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L740-->L740-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1636100090 256)))) (or (and (= ~x$w_buff0~0_In1636100090 |P0Thread1of1ForFork2_#t~ite9_Out1636100090|) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite8_In1636100090| |P0Thread1of1ForFork2_#t~ite8_Out1636100090|)) (and .cse0 (= |P0Thread1of1ForFork2_#t~ite8_Out1636100090| ~x$w_buff0~0_In1636100090) (= |P0Thread1of1ForFork2_#t~ite8_Out1636100090| |P0Thread1of1ForFork2_#t~ite9_Out1636100090|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1636100090 256)))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1636100090 256))) (and .cse1 (= (mod ~x$w_buff1_used~0_In1636100090 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In1636100090 256))))))) InVars {~x$w_buff0~0=~x$w_buff0~0_In1636100090, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1636100090, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In1636100090|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1636100090, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1636100090, ~weak$$choice2~0=~weak$$choice2~0_In1636100090, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1636100090} OutVars{~x$w_buff0~0=~x$w_buff0~0_In1636100090, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1636100090, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out1636100090|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1636100090, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out1636100090|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1636100090, ~weak$$choice2~0=~weak$$choice2~0_In1636100090, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1636100090} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 12:22:47,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L778-->L779: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_In-1964860711 ~x$r_buff0_thd2~0_Out-1964860711)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1964860711 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1964860711 256)))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out-1964860711) (not .cse2)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1964860711, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1964860711} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-1964860711|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1964860711, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1964860711} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:22:47,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-371537585 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-371537585 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In-371537585 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In-371537585 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite31_Out-371537585| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork0_#t~ite31_Out-371537585| ~x$r_buff1_thd2~0_In-371537585) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-371537585, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-371537585, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-371537585, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-371537585} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-371537585|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-371537585, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-371537585, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-371537585, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-371537585} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:22:47,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_40 |v_P1Thread1of1ForFork0_#t~ite31_24|) (= v_~__unbuffered_cnt~0_34 (+ v_~__unbuffered_cnt~0_35 1)) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_23|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_40, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 12:22:47,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L743-->L743-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In2071419173 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite18_Out2071419173| |P0Thread1of1ForFork2_#t~ite17_Out2071419173|) (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In2071419173 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In2071419173 256)) (and .cse0 (= (mod ~x$w_buff1_used~0_In2071419173 256) 0)) (and (= 0 (mod ~x$r_buff1_thd1~0_In2071419173 256)) .cse0))) .cse1 (= ~x$w_buff1_used~0_In2071419173 |P0Thread1of1ForFork2_#t~ite17_Out2071419173|)) (and (= |P0Thread1of1ForFork2_#t~ite17_In2071419173| |P0Thread1of1ForFork2_#t~ite17_Out2071419173|) (= |P0Thread1of1ForFork2_#t~ite18_Out2071419173| ~x$w_buff1_used~0_In2071419173) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2071419173, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In2071419173|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2071419173, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2071419173, ~weak$$choice2~0=~weak$$choice2~0_In2071419173, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2071419173} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2071419173, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out2071419173|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out2071419173|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2071419173, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2071419173, ~weak$$choice2~0=~weak$$choice2~0_In2071419173, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2071419173} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 12:22:47,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L744-->L745: Formula: (and (not (= (mod v_~weak$$choice2~0_45 256) 0)) (= v_~x$r_buff0_thd1~0_116 v_~x$r_buff0_thd1~0_115)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_116, ~weak$$choice2~0=v_~weak$$choice2~0_45} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_45, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 12:22:47,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L745-->L745-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In914565513 256)))) (or (and (= ~x$r_buff1_thd1~0_In914565513 |P0Thread1of1ForFork2_#t~ite24_Out914565513|) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite23_In914565513| |P0Thread1of1ForFork2_#t~ite23_Out914565513|)) (and (= ~x$r_buff1_thd1~0_In914565513 |P0Thread1of1ForFork2_#t~ite23_Out914565513|) .cse0 (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In914565513 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In914565513 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In914565513 256)) .cse1) (= (mod ~x$w_buff0_used~0_In914565513 256) 0))) (= |P0Thread1of1ForFork2_#t~ite24_Out914565513| |P0Thread1of1ForFork2_#t~ite23_Out914565513|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In914565513, ~x$w_buff1_used~0=~x$w_buff1_used~0_In914565513, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In914565513, ~weak$$choice2~0=~weak$$choice2~0_In914565513, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In914565513|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In914565513} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In914565513, ~x$w_buff1_used~0=~x$w_buff1_used~0_In914565513, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In914565513, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out914565513|, ~weak$$choice2~0=~weak$$choice2~0_In914565513, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out914565513|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In914565513} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 12:22:47,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L747-->L755: Formula: (and (= 0 v_~x$flush_delayed~0_9) (= v_~x$mem_tmp~0_7 v_~x~0_28) (not (= 0 (mod v_~x$flush_delayed~0_10 256))) (= v_~__unbuffered_cnt~0_13 (+ v_~__unbuffered_cnt~0_14 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_10, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~x$mem_tmp~0=v_~x$mem_tmp~0_7} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_5|, ~x$flush_delayed~0=v_~x$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_7, ~x~0=v_~x~0_28} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 12:22:47,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In570055614 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In570055614 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In570055614 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In570055614 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite35_Out570055614| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork1_#t~ite35_Out570055614| ~x$w_buff1_used~0_In570055614)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In570055614, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In570055614, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In570055614, ~x$w_buff0_used~0=~x$w_buff0_used~0_In570055614} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out570055614|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In570055614, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In570055614, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In570055614, ~x$w_buff0_used~0=~x$w_buff0_used~0_In570055614} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 12:22:47,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-759272075 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-759272075 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out-759272075| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-759272075| ~x$r_buff0_thd3~0_In-759272075) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-759272075, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-759272075} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-759272075|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-759272075, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-759272075} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 12:22:47,785 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L802-->L802-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In2058798855 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd3~0_In2058798855 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In2058798855 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In2058798855 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out2058798855| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out2058798855| ~x$r_buff1_thd3~0_In2058798855) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In2058798855, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2058798855, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2058798855, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2058798855} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out2058798855|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2058798855, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2058798855, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2058798855, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2058798855} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 12:22:47,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L802-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= |v_P2Thread1of1ForFork1_#t~ite37_28| v_~x$r_buff1_thd3~0_133)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 12:22:47,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L829-->L831-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= (mod v_~x$r_buff0_thd0~0_28 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 12:22:47,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L831-2-->L831-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In1543289428 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1543289428 256)))) (or (and (= |ULTIMATE.start_main_#t~ite41_Out1543289428| ~x~0_In1543289428) (or .cse0 .cse1)) (and (not .cse0) (= ~x$w_buff1~0_In1543289428 |ULTIMATE.start_main_#t~ite41_Out1543289428|) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1543289428, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1543289428, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1543289428, ~x~0=~x~0_In1543289428} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1543289428|, ~x$w_buff1~0=~x$w_buff1~0_In1543289428, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1543289428, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1543289428, ~x~0=~x~0_In1543289428} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 12:22:47,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L831-4-->L832: Formula: (= v_~x~0_17 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 12:22:47,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L832-->L832-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-1658182352 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1658182352 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out-1658182352| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-1658182352 |ULTIMATE.start_main_#t~ite43_Out-1658182352|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1658182352, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1658182352} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1658182352, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1658182352|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1658182352} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 12:22:47,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-506856340 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-506856340 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-506856340 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In-506856340 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-506856340 |ULTIMATE.start_main_#t~ite44_Out-506856340|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-506856340|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-506856340, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-506856340, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-506856340, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-506856340} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-506856340, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-506856340, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-506856340, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-506856340|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-506856340} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 12:22:47,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L834-->L834-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1062467281 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1062467281 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out1062467281| ~x$r_buff0_thd0~0_In1062467281) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite45_Out1062467281|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1062467281, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1062467281} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1062467281, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1062467281|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1062467281} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 12:22:47,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L835-->L835-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In594256611 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In594256611 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In594256611 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In594256611 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In594256611 |ULTIMATE.start_main_#t~ite46_Out594256611|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite46_Out594256611| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In594256611, ~x$w_buff1_used~0=~x$w_buff1_used~0_In594256611, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In594256611, ~x$w_buff0_used~0=~x$w_buff0_used~0_In594256611} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In594256611, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out594256611|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In594256611, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In594256611, ~x$w_buff0_used~0=~x$w_buff0_used~0_In594256611} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 12:22:47,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L835-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~x$r_buff1_thd0~0_177 |v_ULTIMATE.start_main_#t~ite46_58|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_18|) (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_32 0) (= 2 v_~__unbuffered_p2_EAX~0_32) (= v_~y~0_146 2) (= 0 v_~__unbuffered_p0_EAX~0_49))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_18| (mod v_~main$tmp_guard1~0_25 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_49, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~y~0=v_~y~0_146} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_49, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~y~0=v_~y~0_146, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_18|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:22:47,846 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:22:47 BasicIcfg [2019-12-07 12:22:47,846 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:22:47,846 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:22:47,847 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:22:47,847 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:22:47,847 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:21:06" (3/4) ... [2019-12-07 12:22:47,849 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:22:47,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] ULTIMATE.startENTRY-->L821: Formula: (let ((.cse0 (store |v_#valid_70| 0 0))) (and (= (select .cse0 |v_ULTIMATE.start_main_~#t672~0.base_35|) 0) (= 0 v_~weak$$choice0~0_31) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_191) (= v_~main$tmp_guard1~0_50 0) (= v_~x$flush_delayed~0_46 0) (= v_~weak$$choice2~0_179 0) (= v_~x$r_buff0_thd1~0_355 0) (= |v_#NULL.offset_3| 0) (= 0 v_~x$w_buff0~0_341) (= |v_ULTIMATE.start_main_~#t672~0.offset_25| 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_8) (= v_~main$tmp_guard0~0_45 0) (= 0 v_~x$r_buff1_thd3~0_194) (= v_~y~0_194 0) (= 0 v_~x$r_buff0_thd2~0_248) (= 0 v_~__unbuffered_cnt~0_63) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t672~0.base_35|) (= 0 v_~x~0_215) (= v_~x$r_buff1_thd0~0_218 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t672~0.base_35| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t672~0.base_35|) |v_ULTIMATE.start_main_~#t672~0.offset_25| 0)) |v_#memory_int_15|) (= 0 v_~x$w_buff0_used~0_867) (= v_~__unbuffered_p2_EBX~0_66 0) (= v_~z~0_56 0) (= 0 v_~__unbuffered_p2_EAX~0_66) (= v_~x$r_buff0_thd0~0_151 0) (= v_~x$mem_tmp~0_33 0) (= v_~x$r_buff1_thd1~0_359 0) (= 0 v_~x$w_buff1~0_257) (= 0 |v_#NULL.base_3|) (= 0 v_~x$r_buff0_thd3~0_139) (= |v_#valid_68| (store .cse0 |v_ULTIMATE.start_main_~#t672~0.base_35| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t672~0.base_35| 4)) (= 0 v_~x$w_buff1_used~0_545))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_341, ~x$flush_delayed~0=v_~x$flush_delayed~0_46, #NULL.offset=|v_#NULL.offset_3|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_359, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_139, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_52|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, #length=|v_#length_17|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_66, ULTIMATE.start_main_~#t674~0.base=|v_ULTIMATE.start_main_~#t674~0.base_35|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_151, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_66, ~x$w_buff1~0=v_~x$w_buff1~0_257, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_545, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_191, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_31, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~x~0=v_~x~0_215, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_355, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_104|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_194, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ~x$mem_tmp~0=v_~x$mem_tmp~0_33, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_49|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_66|, ULTIMATE.start_main_~#t674~0.offset=|v_ULTIMATE.start_main_~#t674~0.offset_25|, ~y~0=v_~y~0_194, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_45, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_218, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_248, ULTIMATE.start_main_~#t672~0.base=|v_ULTIMATE.start_main_~#t672~0.base_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_~#t673~0.offset=|v_ULTIMATE.start_main_~#t673~0.offset_25|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_867, ULTIMATE.start_main_~#t673~0.base=|v_ULTIMATE.start_main_~#t673~0.base_35|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_48|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_68|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_11|, ~z~0=v_~z~0_56, ~weak$$choice2~0=v_~weak$$choice2~0_179, ULTIMATE.start_main_~#t672~0.offset=|v_ULTIMATE.start_main_~#t672~0.offset_25|, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t674~0.base, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t674~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_~#t672~0.base, #NULL.base, ULTIMATE.start_main_~#t673~0.offset, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t673~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t672~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:22:47,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L821-1-->L823: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t673~0.base_13| 1)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t673~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t673~0.offset_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t673~0.base_13| 4)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t673~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t673~0.base_13|) |v_ULTIMATE.start_main_~#t673~0.offset_11| 1))) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t673~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t673~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t673~0.base=|v_ULTIMATE.start_main_~#t673~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t673~0.offset=|v_ULTIMATE.start_main_~#t673~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t673~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t673~0.offset] because there is no mapped edge [2019-12-07 12:22:47,850 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L823-1-->L825: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t674~0.base_12|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t674~0.base_12|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t674~0.base_12| 4)) (= 0 |v_ULTIMATE.start_main_~#t674~0.offset_10|) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t674~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t674~0.base_12|) |v_ULTIMATE.start_main_~#t674~0.offset_10| 2))) (not (= |v_ULTIMATE.start_main_~#t674~0.base_12| 0)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t674~0.base_12| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t674~0.offset=|v_ULTIMATE.start_main_~#t674~0.offset_10|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t674~0.base=|v_ULTIMATE.start_main_~#t674~0.base_12|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t674~0.offset, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t674~0.base] because there is no mapped edge [2019-12-07 12:22:47,850 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L5-3: Formula: (and (= (ite (not (and (not (= (mod v_~x$w_buff0_used~0_107 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_57 256))))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (= |v_P1Thread1of1ForFork0_#in~arg.base_11| v_P1Thread1of1ForFork0_~arg.base_9) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (not (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11 0)) (= 1 v_~x$w_buff0_used~0_107) (= v_~x$w_buff1_used~0_57 v_~x$w_buff0_used~0_108) (= v_~x$w_buff0~0_35 v_~x$w_buff1~0_25) (= 1 v_~x$w_buff0~0_34) (= |v_P1Thread1of1ForFork0_#in~arg.offset_11| v_P1Thread1of1ForFork0_~arg.offset_9)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_35, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_11|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_108} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_34, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_11, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_9, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_9, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_11|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|, ~x$w_buff1~0=v_~x$w_buff1~0_25, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_57, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_107} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 12:22:47,851 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L798-2-->L798-4: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd3~0_In1321631587 256) 0)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1321631587 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite32_Out1321631587| ~x$w_buff1~0_In1321631587)) (and (or .cse0 .cse1) (= ~x~0_In1321631587 |P2Thread1of1ForFork1_#t~ite32_Out1321631587|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1321631587, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1321631587, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1321631587, ~x~0=~x~0_In1321631587} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out1321631587|, ~x$w_buff1~0=~x$w_buff1~0_In1321631587, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1321631587, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1321631587, ~x~0=~x~0_In1321631587} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 12:22:47,852 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L798-4-->L799: Formula: (= v_~x~0_55 |v_P2Thread1of1ForFork1_#t~ite32_22|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_22|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_21|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_27|, ~x~0=v_~x~0_55} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 12:22:47,852 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1577997030 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1577997030 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1577997030 |P2Thread1of1ForFork1_#t~ite34_Out-1577997030|)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite34_Out-1577997030| 0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1577997030, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1577997030} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1577997030|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1577997030, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1577997030} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 12:22:47,852 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L776-->L776-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1532895624 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1532895624 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite28_Out-1532895624| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite28_Out-1532895624| ~x$w_buff0_used~0_In-1532895624)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1532895624, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1532895624} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1532895624, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-1532895624|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1532895624} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 12:22:47,853 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L777-->L777-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd2~0_In1916082085 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1916082085 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1916082085 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In1916082085 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out1916082085| ~x$w_buff1_used~0_In1916082085) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork0_#t~ite29_Out1916082085| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1916082085, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1916082085, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1916082085, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1916082085} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1916082085, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1916082085, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1916082085, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1916082085|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1916082085} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 12:22:47,853 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L740-->L740-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1636100090 256)))) (or (and (= ~x$w_buff0~0_In1636100090 |P0Thread1of1ForFork2_#t~ite9_Out1636100090|) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite8_In1636100090| |P0Thread1of1ForFork2_#t~ite8_Out1636100090|)) (and .cse0 (= |P0Thread1of1ForFork2_#t~ite8_Out1636100090| ~x$w_buff0~0_In1636100090) (= |P0Thread1of1ForFork2_#t~ite8_Out1636100090| |P0Thread1of1ForFork2_#t~ite9_Out1636100090|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1636100090 256)))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1636100090 256))) (and .cse1 (= (mod ~x$w_buff1_used~0_In1636100090 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In1636100090 256))))))) InVars {~x$w_buff0~0=~x$w_buff0~0_In1636100090, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1636100090, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In1636100090|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1636100090, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1636100090, ~weak$$choice2~0=~weak$$choice2~0_In1636100090, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1636100090} OutVars{~x$w_buff0~0=~x$w_buff0~0_In1636100090, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1636100090, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out1636100090|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1636100090, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out1636100090|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1636100090, ~weak$$choice2~0=~weak$$choice2~0_In1636100090, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1636100090} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 12:22:47,854 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L778-->L779: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_In-1964860711 ~x$r_buff0_thd2~0_Out-1964860711)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1964860711 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1964860711 256)))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out-1964860711) (not .cse2)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1964860711, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1964860711} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-1964860711|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1964860711, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1964860711} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:22:47,855 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-371537585 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-371537585 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In-371537585 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In-371537585 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite31_Out-371537585| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork0_#t~ite31_Out-371537585| ~x$r_buff1_thd2~0_In-371537585) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-371537585, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-371537585, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-371537585, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-371537585} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-371537585|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-371537585, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-371537585, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-371537585, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-371537585} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 12:22:47,855 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_40 |v_P1Thread1of1ForFork0_#t~ite31_24|) (= v_~__unbuffered_cnt~0_34 (+ v_~__unbuffered_cnt~0_35 1)) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_35} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_23|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_40, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 12:22:47,855 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L743-->L743-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In2071419173 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite18_Out2071419173| |P0Thread1of1ForFork2_#t~ite17_Out2071419173|) (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In2071419173 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In2071419173 256)) (and .cse0 (= (mod ~x$w_buff1_used~0_In2071419173 256) 0)) (and (= 0 (mod ~x$r_buff1_thd1~0_In2071419173 256)) .cse0))) .cse1 (= ~x$w_buff1_used~0_In2071419173 |P0Thread1of1ForFork2_#t~ite17_Out2071419173|)) (and (= |P0Thread1of1ForFork2_#t~ite17_In2071419173| |P0Thread1of1ForFork2_#t~ite17_Out2071419173|) (= |P0Thread1of1ForFork2_#t~ite18_Out2071419173| ~x$w_buff1_used~0_In2071419173) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2071419173, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In2071419173|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2071419173, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2071419173, ~weak$$choice2~0=~weak$$choice2~0_In2071419173, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2071419173} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2071419173, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out2071419173|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out2071419173|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2071419173, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2071419173, ~weak$$choice2~0=~weak$$choice2~0_In2071419173, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2071419173} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 12:22:47,856 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L744-->L745: Formula: (and (not (= (mod v_~weak$$choice2~0_45 256) 0)) (= v_~x$r_buff0_thd1~0_116 v_~x$r_buff0_thd1~0_115)) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_116, ~weak$$choice2~0=v_~weak$$choice2~0_45} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_115, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_45, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 12:22:47,856 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L745-->L745-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In914565513 256)))) (or (and (= ~x$r_buff1_thd1~0_In914565513 |P0Thread1of1ForFork2_#t~ite24_Out914565513|) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite23_In914565513| |P0Thread1of1ForFork2_#t~ite23_Out914565513|)) (and (= ~x$r_buff1_thd1~0_In914565513 |P0Thread1of1ForFork2_#t~ite23_Out914565513|) .cse0 (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In914565513 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In914565513 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In914565513 256)) .cse1) (= (mod ~x$w_buff0_used~0_In914565513 256) 0))) (= |P0Thread1of1ForFork2_#t~ite24_Out914565513| |P0Thread1of1ForFork2_#t~ite23_Out914565513|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In914565513, ~x$w_buff1_used~0=~x$w_buff1_used~0_In914565513, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In914565513, ~weak$$choice2~0=~weak$$choice2~0_In914565513, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In914565513|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In914565513} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In914565513, ~x$w_buff1_used~0=~x$w_buff1_used~0_In914565513, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In914565513, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out914565513|, ~weak$$choice2~0=~weak$$choice2~0_In914565513, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out914565513|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In914565513} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 12:22:47,856 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L747-->L755: Formula: (and (= 0 v_~x$flush_delayed~0_9) (= v_~x$mem_tmp~0_7 v_~x~0_28) (not (= 0 (mod v_~x$flush_delayed~0_10 256))) (= v_~__unbuffered_cnt~0_13 (+ v_~__unbuffered_cnt~0_14 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_10, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~x$mem_tmp~0=v_~x$mem_tmp~0_7} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_5|, ~x$flush_delayed~0=v_~x$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_7, ~x~0=v_~x~0_28} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 12:22:47,856 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In570055614 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In570055614 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In570055614 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In570055614 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite35_Out570055614| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P2Thread1of1ForFork1_#t~ite35_Out570055614| ~x$w_buff1_used~0_In570055614)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In570055614, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In570055614, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In570055614, ~x$w_buff0_used~0=~x$w_buff0_used~0_In570055614} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out570055614|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In570055614, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In570055614, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In570055614, ~x$w_buff0_used~0=~x$w_buff0_used~0_In570055614} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 12:22:47,857 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L801-->L801-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-759272075 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-759272075 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out-759272075| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-759272075| ~x$r_buff0_thd3~0_In-759272075) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-759272075, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-759272075} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-759272075|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-759272075, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-759272075} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 12:22:47,857 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L802-->L802-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In2058798855 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd3~0_In2058798855 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In2058798855 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In2058798855 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out2058798855| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out2058798855| ~x$r_buff1_thd3~0_In2058798855) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In2058798855, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2058798855, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2058798855, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2058798855} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out2058798855|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2058798855, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2058798855, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2058798855, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2058798855} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 12:22:47,857 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L802-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= |v_P2Thread1of1ForFork1_#t~ite37_28| v_~x$r_buff1_thd3~0_133)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 12:22:47,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L829-->L831-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= (mod v_~x$r_buff0_thd0~0_28 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_28, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 12:22:47,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L831-2-->L831-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In1543289428 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1543289428 256)))) (or (and (= |ULTIMATE.start_main_#t~ite41_Out1543289428| ~x~0_In1543289428) (or .cse0 .cse1)) (and (not .cse0) (= ~x$w_buff1~0_In1543289428 |ULTIMATE.start_main_#t~ite41_Out1543289428|) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1543289428, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1543289428, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1543289428, ~x~0=~x~0_In1543289428} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1543289428|, ~x$w_buff1~0=~x$w_buff1~0_In1543289428, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1543289428, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1543289428, ~x~0=~x~0_In1543289428} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 12:22:47,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L831-4-->L832: Formula: (= v_~x~0_17 |v_ULTIMATE.start_main_#t~ite41_7|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 12:22:47,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L832-->L832-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-1658182352 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1658182352 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out-1658182352| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-1658182352 |ULTIMATE.start_main_#t~ite43_Out-1658182352|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1658182352, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1658182352} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1658182352, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1658182352|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1658182352} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 12:22:47,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-506856340 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-506856340 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-506856340 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In-506856340 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-506856340 |ULTIMATE.start_main_#t~ite44_Out-506856340|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-506856340|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-506856340, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-506856340, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-506856340, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-506856340} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-506856340, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-506856340, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-506856340, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-506856340|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-506856340} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 12:22:47,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L834-->L834-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1062467281 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1062467281 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out1062467281| ~x$r_buff0_thd0~0_In1062467281) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite45_Out1062467281|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1062467281, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1062467281} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1062467281, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1062467281|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1062467281} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 12:22:47,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L835-->L835-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In594256611 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In594256611 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In594256611 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In594256611 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In594256611 |ULTIMATE.start_main_#t~ite46_Out594256611|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite46_Out594256611| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In594256611, ~x$w_buff1_used~0=~x$w_buff1_used~0_In594256611, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In594256611, ~x$w_buff0_used~0=~x$w_buff0_used~0_In594256611} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In594256611, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out594256611|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In594256611, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In594256611, ~x$w_buff0_used~0=~x$w_buff0_used~0_In594256611} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 12:22:47,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L835-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~x$r_buff1_thd0~0_177 |v_ULTIMATE.start_main_#t~ite46_58|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_18|) (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_32 0) (= 2 v_~__unbuffered_p2_EAX~0_32) (= v_~y~0_146 2) (= 0 v_~__unbuffered_p0_EAX~0_49))) 1 0) 0) 0 1)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_18| (mod v_~main$tmp_guard1~0_25 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_49, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~y~0=v_~y~0_146} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_49, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~y~0=v_~y~0_146, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_177, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_18|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:22:47,921 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_71995e3b-7e47-4ff7-bbfb-75b0588cc56c/bin/uautomizer/witness.graphml [2019-12-07 12:22:47,922 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:22:47,923 INFO L168 Benchmark]: Toolchain (without parser) took 102085.40 ms. Allocated memory was 1.0 GB in the beginning and 6.2 GB in the end (delta: 5.1 GB). Free memory was 939.8 MB in the beginning and 4.5 GB in the end (delta: -3.6 GB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2019-12-07 12:22:47,923 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:22:47,923 INFO L168 Benchmark]: CACSL2BoogieTranslator took 431.23 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.6 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -125.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:22:47,924 INFO L168 Benchmark]: Boogie Procedure Inliner took 44.45 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:22:47,924 INFO L168 Benchmark]: Boogie Preprocessor took 25.07 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:22:47,924 INFO L168 Benchmark]: RCFGBuilder took 391.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.2 MB). Peak memory consumption was 54.2 MB. Max. memory is 11.5 GB. [2019-12-07 12:22:47,925 INFO L168 Benchmark]: TraceAbstraction took 101114.78 ms. Allocated memory was 1.1 GB in the beginning and 6.2 GB in the end (delta: 5.0 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 12:22:47,925 INFO L168 Benchmark]: Witness Printer took 75.19 ms. Allocated memory is still 6.2 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 11.5 GB. [2019-12-07 12:22:47,927 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 431.23 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.6 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -125.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 44.45 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.07 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 391.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.2 MB). Peak memory consumption was 54.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 101114.78 ms. Allocated memory was 1.1 GB in the beginning and 6.2 GB in the end (delta: 5.0 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 75.19 ms. Allocated memory is still 6.2 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 8 FixpointIterations, 33 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 26 ChoiceCompositions, 6794 VarBasedMoverChecksPositive, 260 VarBasedMoverChecksNegative, 81 SemBasedMoverChecksPositive, 256 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 73051 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L821] FCALL, FORK 0 pthread_create(&t672, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L823] FCALL, FORK 0 pthread_create(&t673, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L825] FCALL, FORK 0 pthread_create(&t674, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L789] 3 y = 2 [L792] 3 __unbuffered_p2_EAX = y [L795] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=0] [L798] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=0] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L732] 1 z = 1 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L799] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L800] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L801] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L827] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L832] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L833] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L834] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 100.9s, OverallIterations: 23, TraceHistogramMax: 1, AutomataDifference: 24.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4126 SDtfs, 5902 SDslu, 14837 SDs, 0 SdLazy, 9826 SolverSat, 269 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 292 GetRequests, 29 SyntacticMatches, 16 SemanticMatches, 247 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3966 ImplicationChecksByTransitivity, 4.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=173869occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 61.2s AutomataMinimizationTime, 22 MinimizatonAttempts, 192972 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 793 NumberOfCodeBlocks, 793 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 715 ConstructedInterpolants, 0 QuantifiedInterpolants, 129335 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...