./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix025_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix025_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b79da7472b82273d967472a03ac57680433f9764 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:01:01,179 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:01:01,180 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:01:01,189 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:01:01,189 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:01:01,190 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:01:01,191 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:01:01,193 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:01:01,194 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:01:01,195 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:01:01,196 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:01:01,197 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:01:01,198 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:01:01,198 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:01:01,199 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:01:01,201 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:01:01,201 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:01:01,202 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:01:01,204 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:01:01,206 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:01:01,207 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:01:01,208 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:01:01,209 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:01:01,210 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:01:01,212 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:01:01,212 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:01:01,212 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:01:01,213 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:01:01,213 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:01:01,214 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:01:01,214 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:01:01,215 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:01:01,215 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:01:01,216 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:01:01,217 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:01:01,217 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:01:01,217 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:01:01,217 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:01:01,218 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:01:01,218 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:01:01,219 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:01:01,220 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 19:01:01,231 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:01:01,231 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:01:01,232 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 19:01:01,232 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 19:01:01,232 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 19:01:01,232 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:01:01,232 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:01:01,232 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:01:01,233 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:01:01,233 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:01:01,233 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:01:01,233 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:01:01,233 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:01:01,233 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:01:01,233 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:01:01,233 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:01:01,234 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:01:01,234 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:01:01,234 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 19:01:01,234 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:01:01,234 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:01:01,234 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:01:01,234 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:01:01,234 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:01:01,235 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:01:01,235 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 19:01:01,235 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:01:01,235 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:01:01,235 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:01:01,235 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b79da7472b82273d967472a03ac57680433f9764 [2019-12-07 19:01:01,347 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:01:01,357 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:01:01,360 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:01:01,362 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:01:01,362 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:01:01,363 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/mix025_tso.opt.i [2019-12-07 19:01:01,410 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/data/cd7e2f4e4/2835875ed72b42bfa992f9b9856134ad/FLAG497c29d13 [2019-12-07 19:01:01,843 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:01:01,843 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/sv-benchmarks/c/pthread-wmm/mix025_tso.opt.i [2019-12-07 19:01:01,853 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/data/cd7e2f4e4/2835875ed72b42bfa992f9b9856134ad/FLAG497c29d13 [2019-12-07 19:01:02,188 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/data/cd7e2f4e4/2835875ed72b42bfa992f9b9856134ad [2019-12-07 19:01:02,191 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:01:02,192 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:01:02,193 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:01:02,193 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:01:02,195 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:01:02,195 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,197 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@375546ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02, skipping insertion in model container [2019-12-07 19:01:02,197 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,202 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:01:02,230 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:01:02,482 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:01:02,489 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:01:02,530 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:01:02,574 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:01:02,575 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02 WrapperNode [2019-12-07 19:01:02,575 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:01:02,575 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:01:02,575 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:01:02,575 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:01:02,581 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,595 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,613 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:01:02,613 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:01:02,613 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:01:02,613 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:01:02,619 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,619 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,623 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,623 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,630 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,633 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,635 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... [2019-12-07 19:01:02,638 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:01:02,639 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:01:02,639 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:01:02,639 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:01:02,639 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:01:02,678 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:01:02,678 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:01:02,678 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:01:02,678 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:01:02,678 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:01:02,678 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:01:02,678 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:01:02,678 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:01:02,678 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:01:02,679 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:01:02,679 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:01:02,679 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:01:02,679 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:01:02,680 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:01:03,037 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:01:03,037 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:01:03,038 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:03 BoogieIcfgContainer [2019-12-07 19:01:03,038 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:01:03,039 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:01:03,039 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:01:03,041 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:01:03,041 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:01:02" (1/3) ... [2019-12-07 19:01:03,041 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f042cf2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:01:03, skipping insertion in model container [2019-12-07 19:01:03,041 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:01:02" (2/3) ... [2019-12-07 19:01:03,042 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1f042cf2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:01:03, skipping insertion in model container [2019-12-07 19:01:03,042 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:03" (3/3) ... [2019-12-07 19:01:03,043 INFO L109 eAbstractionObserver]: Analyzing ICFG mix025_tso.opt.i [2019-12-07 19:01:03,049 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:01:03,049 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:01:03,054 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:01:03,055 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:01:03,079 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,080 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,080 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,080 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,080 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,080 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,080 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,080 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,082 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,083 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,084 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,084 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,088 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,088 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,088 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,088 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,088 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,088 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,088 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,094 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,095 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,099 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,100 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,100 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,100 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,100 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:01:03,110 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 19:01:03,123 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:01:03,123 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:01:03,123 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:01:03,123 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:01:03,123 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:01:03,123 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:01:03,123 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:01:03,123 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:01:03,134 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 19:01:03,136 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 19:01:03,191 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 19:01:03,191 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:01:03,202 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:01:03,217 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 19:01:03,246 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 19:01:03,246 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:01:03,251 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:01:03,268 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 19:01:03,269 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:01:06,093 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 19:01:06,334 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130103 [2019-12-07 19:01:06,334 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 19:01:06,336 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 105 transitions [2019-12-07 19:01:23,948 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 122102 states. [2019-12-07 19:01:23,949 INFO L276 IsEmpty]: Start isEmpty. Operand 122102 states. [2019-12-07 19:01:23,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 19:01:23,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:23,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 19:01:23,953 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:23,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:23,957 INFO L82 PathProgramCache]: Analyzing trace with hash 913940, now seen corresponding path program 1 times [2019-12-07 19:01:23,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:23,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840763548] [2019-12-07 19:01:23,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:24,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:24,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:24,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840763548] [2019-12-07 19:01:24,090 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:24,090 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:01:24,090 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279687791] [2019-12-07 19:01:24,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:01:24,093 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:24,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:01:24,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:01:24,104 INFO L87 Difference]: Start difference. First operand 122102 states. Second operand 3 states. [2019-12-07 19:01:24,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:24,858 INFO L93 Difference]: Finished difference Result 121140 states and 517588 transitions. [2019-12-07 19:01:24,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:01:24,860 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 19:01:24,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:25,503 INFO L225 Difference]: With dead ends: 121140 [2019-12-07 19:01:25,503 INFO L226 Difference]: Without dead ends: 107958 [2019-12-07 19:01:25,504 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:01:30,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107958 states. [2019-12-07 19:01:32,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107958 to 107958. [2019-12-07 19:01:32,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107958 states. [2019-12-07 19:01:32,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107958 states to 107958 states and 460128 transitions. [2019-12-07 19:01:32,522 INFO L78 Accepts]: Start accepts. Automaton has 107958 states and 460128 transitions. Word has length 3 [2019-12-07 19:01:32,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:01:32,523 INFO L462 AbstractCegarLoop]: Abstraction has 107958 states and 460128 transitions. [2019-12-07 19:01:32,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:01:32,523 INFO L276 IsEmpty]: Start isEmpty. Operand 107958 states and 460128 transitions. [2019-12-07 19:01:32,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 19:01:32,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:32,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:01:32,527 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:32,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:32,527 INFO L82 PathProgramCache]: Analyzing trace with hash 2082409598, now seen corresponding path program 1 times [2019-12-07 19:01:32,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:32,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769270255] [2019-12-07 19:01:32,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:32,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:32,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:32,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1769270255] [2019-12-07 19:01:32,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:32,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:01:32,589 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790257677] [2019-12-07 19:01:32,591 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:01:32,591 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:32,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:01:32,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:01:32,591 INFO L87 Difference]: Start difference. First operand 107958 states and 460128 transitions. Second operand 4 states. [2019-12-07 19:01:33,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:33,496 INFO L93 Difference]: Finished difference Result 172022 states and 703369 transitions. [2019-12-07 19:01:33,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:01:33,497 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 19:01:33,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:34,011 INFO L225 Difference]: With dead ends: 172022 [2019-12-07 19:01:34,011 INFO L226 Difference]: Without dead ends: 171924 [2019-12-07 19:01:34,011 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:01:40,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171924 states. [2019-12-07 19:01:42,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171924 to 156115. [2019-12-07 19:01:42,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156115 states. [2019-12-07 19:01:43,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156115 states to 156115 states and 647087 transitions. [2019-12-07 19:01:43,536 INFO L78 Accepts]: Start accepts. Automaton has 156115 states and 647087 transitions. Word has length 11 [2019-12-07 19:01:43,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:01:43,536 INFO L462 AbstractCegarLoop]: Abstraction has 156115 states and 647087 transitions. [2019-12-07 19:01:43,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:01:43,537 INFO L276 IsEmpty]: Start isEmpty. Operand 156115 states and 647087 transitions. [2019-12-07 19:01:43,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:01:43,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:43,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:01:43,541 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:43,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:43,542 INFO L82 PathProgramCache]: Analyzing trace with hash 594088235, now seen corresponding path program 1 times [2019-12-07 19:01:43,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:43,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740993147] [2019-12-07 19:01:43,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:43,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:43,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:43,594 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740993147] [2019-12-07 19:01:43,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:43,594 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:01:43,595 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201636958] [2019-12-07 19:01:43,595 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:01:43,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:43,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:01:43,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:01:43,595 INFO L87 Difference]: Start difference. First operand 156115 states and 647087 transitions. Second operand 4 states. [2019-12-07 19:01:44,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:44,709 INFO L93 Difference]: Finished difference Result 219290 states and 888852 transitions. [2019-12-07 19:01:44,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:01:44,710 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:01:44,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:45,275 INFO L225 Difference]: With dead ends: 219290 [2019-12-07 19:01:45,275 INFO L226 Difference]: Without dead ends: 219178 [2019-12-07 19:01:45,275 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:01:50,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219178 states. [2019-12-07 19:01:55,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219178 to 184451. [2019-12-07 19:01:55,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184451 states. [2019-12-07 19:01:56,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184451 states to 184451 states and 760798 transitions. [2019-12-07 19:01:56,059 INFO L78 Accepts]: Start accepts. Automaton has 184451 states and 760798 transitions. Word has length 13 [2019-12-07 19:01:56,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:01:56,060 INFO L462 AbstractCegarLoop]: Abstraction has 184451 states and 760798 transitions. [2019-12-07 19:01:56,060 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:01:56,060 INFO L276 IsEmpty]: Start isEmpty. Operand 184451 states and 760798 transitions. [2019-12-07 19:01:56,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:01:56,068 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:01:56,068 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:01:56,068 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:01:56,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:01:56,068 INFO L82 PathProgramCache]: Analyzing trace with hash -805978823, now seen corresponding path program 1 times [2019-12-07 19:01:56,068 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:01:56,068 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397218224] [2019-12-07 19:01:56,068 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:01:56,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:01:56,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:01:56,099 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397218224] [2019-12-07 19:01:56,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:01:56,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:01:56,099 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1690643609] [2019-12-07 19:01:56,099 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:01:56,099 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:01:56,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:01:56,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:01:56,100 INFO L87 Difference]: Start difference. First operand 184451 states and 760798 transitions. Second operand 3 states. [2019-12-07 19:01:57,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:01:57,782 INFO L93 Difference]: Finished difference Result 284614 states and 1168466 transitions. [2019-12-07 19:01:57,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:01:57,783 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 19:01:57,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:01:58,528 INFO L225 Difference]: With dead ends: 284614 [2019-12-07 19:01:58,529 INFO L226 Difference]: Without dead ends: 284614 [2019-12-07 19:01:58,529 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:04,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284614 states. [2019-12-07 19:02:07,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284614 to 221232. [2019-12-07 19:02:07,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221232 states. [2019-12-07 19:02:08,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221232 states to 221232 states and 911865 transitions. [2019-12-07 19:02:08,518 INFO L78 Accepts]: Start accepts. Automaton has 221232 states and 911865 transitions. Word has length 16 [2019-12-07 19:02:08,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:08,518 INFO L462 AbstractCegarLoop]: Abstraction has 221232 states and 911865 transitions. [2019-12-07 19:02:08,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:02:08,518 INFO L276 IsEmpty]: Start isEmpty. Operand 221232 states and 911865 transitions. [2019-12-07 19:02:08,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:02:08,525 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:08,525 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:08,525 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:08,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:08,525 INFO L82 PathProgramCache]: Analyzing trace with hash -805853304, now seen corresponding path program 1 times [2019-12-07 19:02:08,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:08,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043285530] [2019-12-07 19:02:08,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:08,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:08,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:08,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043285530] [2019-12-07 19:02:08,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:08,563 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:08,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [71781827] [2019-12-07 19:02:08,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:02:08,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:08,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:02:08,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:08,563 INFO L87 Difference]: Start difference. First operand 221232 states and 911865 transitions. Second operand 4 states. [2019-12-07 19:02:09,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:09,861 INFO L93 Difference]: Finished difference Result 262568 states and 1070974 transitions. [2019-12-07 19:02:09,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:02:09,861 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 19:02:09,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:13,463 INFO L225 Difference]: With dead ends: 262568 [2019-12-07 19:02:13,463 INFO L226 Difference]: Without dead ends: 262568 [2019-12-07 19:02:13,463 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:19,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262568 states. [2019-12-07 19:02:22,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262568 to 233184. [2019-12-07 19:02:22,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233184 states. [2019-12-07 19:02:23,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233184 states to 233184 states and 959818 transitions. [2019-12-07 19:02:23,246 INFO L78 Accepts]: Start accepts. Automaton has 233184 states and 959818 transitions. Word has length 16 [2019-12-07 19:02:23,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:23,246 INFO L462 AbstractCegarLoop]: Abstraction has 233184 states and 959818 transitions. [2019-12-07 19:02:23,246 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:23,246 INFO L276 IsEmpty]: Start isEmpty. Operand 233184 states and 959818 transitions. [2019-12-07 19:02:23,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:02:23,253 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:23,253 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:23,253 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:23,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:23,253 INFO L82 PathProgramCache]: Analyzing trace with hash -1222928522, now seen corresponding path program 1 times [2019-12-07 19:02:23,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:23,254 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847579763] [2019-12-07 19:02:23,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:23,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:23,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:23,284 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847579763] [2019-12-07 19:02:23,284 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:23,284 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:23,285 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [249249271] [2019-12-07 19:02:23,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:02:23,285 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:23,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:02:23,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:23,286 INFO L87 Difference]: Start difference. First operand 233184 states and 959818 transitions. Second operand 4 states. [2019-12-07 19:02:25,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:25,004 INFO L93 Difference]: Finished difference Result 277148 states and 1134062 transitions. [2019-12-07 19:02:25,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:02:25,005 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 19:02:25,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:25,725 INFO L225 Difference]: With dead ends: 277148 [2019-12-07 19:02:25,725 INFO L226 Difference]: Without dead ends: 277148 [2019-12-07 19:02:25,725 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:02:32,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277148 states. [2019-12-07 19:02:35,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277148 to 236057. [2019-12-07 19:02:35,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236057 states. [2019-12-07 19:02:36,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236057 states to 236057 states and 972653 transitions. [2019-12-07 19:02:36,652 INFO L78 Accepts]: Start accepts. Automaton has 236057 states and 972653 transitions. Word has length 16 [2019-12-07 19:02:36,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:36,653 INFO L462 AbstractCegarLoop]: Abstraction has 236057 states and 972653 transitions. [2019-12-07 19:02:36,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:02:36,653 INFO L276 IsEmpty]: Start isEmpty. Operand 236057 states and 972653 transitions. [2019-12-07 19:02:36,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 19:02:36,664 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:36,665 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:36,665 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:36,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:36,665 INFO L82 PathProgramCache]: Analyzing trace with hash -2141168645, now seen corresponding path program 1 times [2019-12-07 19:02:36,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:36,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242432950] [2019-12-07 19:02:36,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:36,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:36,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:36,716 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242432950] [2019-12-07 19:02:36,716 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:36,716 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:02:36,716 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [167970844] [2019-12-07 19:02:36,716 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:02:36,717 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:36,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:02:36,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:36,717 INFO L87 Difference]: Start difference. First operand 236057 states and 972653 transitions. Second operand 3 states. [2019-12-07 19:02:41,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:02:41,244 INFO L93 Difference]: Finished difference Result 419928 states and 1722928 transitions. [2019-12-07 19:02:41,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:02:41,245 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 19:02:41,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:02:42,246 INFO L225 Difference]: With dead ends: 419928 [2019-12-07 19:02:42,246 INFO L226 Difference]: Without dead ends: 386621 [2019-12-07 19:02:42,247 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:02:49,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386621 states. [2019-12-07 19:02:54,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386621 to 371396. [2019-12-07 19:02:54,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 371396 states. [2019-12-07 19:02:56,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371396 states to 371396 states and 1535333 transitions. [2019-12-07 19:02:56,645 INFO L78 Accepts]: Start accepts. Automaton has 371396 states and 1535333 transitions. Word has length 18 [2019-12-07 19:02:56,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:02:56,645 INFO L462 AbstractCegarLoop]: Abstraction has 371396 states and 1535333 transitions. [2019-12-07 19:02:56,645 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:02:56,645 INFO L276 IsEmpty]: Start isEmpty. Operand 371396 states and 1535333 transitions. [2019-12-07 19:02:56,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:02:56,674 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:02:56,674 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:02:56,674 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:02:56,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:02:56,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1067747929, now seen corresponding path program 1 times [2019-12-07 19:02:56,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:02:56,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591902755] [2019-12-07 19:02:56,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:02:56,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:02:56,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:02:56,721 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1591902755] [2019-12-07 19:02:56,721 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:02:56,721 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:02:56,721 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580755752] [2019-12-07 19:02:56,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:02:56,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:02:56,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:02:56,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:02:56,722 INFO L87 Difference]: Start difference. First operand 371396 states and 1535333 transitions. Second operand 4 states. [2019-12-07 19:03:02,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:02,346 INFO L93 Difference]: Finished difference Result 385817 states and 1580823 transitions. [2019-12-07 19:03:02,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:03:02,347 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 19:03:02,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:03,292 INFO L225 Difference]: With dead ends: 385817 [2019-12-07 19:03:03,292 INFO L226 Difference]: Without dead ends: 385817 [2019-12-07 19:03:03,292 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:03:09,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 385817 states. [2019-12-07 19:03:15,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 385817 to 367892. [2019-12-07 19:03:15,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 367892 states. [2019-12-07 19:03:16,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367892 states to 367892 states and 1521919 transitions. [2019-12-07 19:03:16,846 INFO L78 Accepts]: Start accepts. Automaton has 367892 states and 1521919 transitions. Word has length 19 [2019-12-07 19:03:16,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:16,846 INFO L462 AbstractCegarLoop]: Abstraction has 367892 states and 1521919 transitions. [2019-12-07 19:03:16,846 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:03:16,846 INFO L276 IsEmpty]: Start isEmpty. Operand 367892 states and 1521919 transitions. [2019-12-07 19:03:16,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:03:16,875 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:16,875 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:16,875 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:16,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:16,875 INFO L82 PathProgramCache]: Analyzing trace with hash 700766782, now seen corresponding path program 1 times [2019-12-07 19:03:16,875 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:16,875 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117725064] [2019-12-07 19:03:16,875 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:16,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:16,901 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:16,901 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117725064] [2019-12-07 19:03:16,901 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:16,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:03:16,902 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231743041] [2019-12-07 19:03:16,902 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:03:16,902 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:16,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:03:16,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:16,902 INFO L87 Difference]: Start difference. First operand 367892 states and 1521919 transitions. Second operand 3 states. [2019-12-07 19:03:19,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:19,104 INFO L93 Difference]: Finished difference Result 346805 states and 1418106 transitions. [2019-12-07 19:03:19,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:03:19,104 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 19:03:19,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:19,988 INFO L225 Difference]: With dead ends: 346805 [2019-12-07 19:03:19,988 INFO L226 Difference]: Without dead ends: 346805 [2019-12-07 19:03:19,988 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:30,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346805 states. [2019-12-07 19:03:34,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346805 to 343459. [2019-12-07 19:03:34,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343459 states. [2019-12-07 19:03:35,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343459 states to 343459 states and 1405774 transitions. [2019-12-07 19:03:35,702 INFO L78 Accepts]: Start accepts. Automaton has 343459 states and 1405774 transitions. Word has length 19 [2019-12-07 19:03:35,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:35,702 INFO L462 AbstractCegarLoop]: Abstraction has 343459 states and 1405774 transitions. [2019-12-07 19:03:35,702 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:03:35,702 INFO L276 IsEmpty]: Start isEmpty. Operand 343459 states and 1405774 transitions. [2019-12-07 19:03:35,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:03:35,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:35,724 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:35,724 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:35,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:35,724 INFO L82 PathProgramCache]: Analyzing trace with hash -116744345, now seen corresponding path program 1 times [2019-12-07 19:03:35,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:35,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641565630] [2019-12-07 19:03:35,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:35,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:35,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:35,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641565630] [2019-12-07 19:03:35,763 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:35,763 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:03:35,763 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338686113] [2019-12-07 19:03:35,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:03:35,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:35,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:03:35,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:03:35,764 INFO L87 Difference]: Start difference. First operand 343459 states and 1405774 transitions. Second operand 5 states. [2019-12-07 19:03:39,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:39,287 INFO L93 Difference]: Finished difference Result 481018 states and 1929261 transitions. [2019-12-07 19:03:39,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:03:39,288 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 19:03:39,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:40,520 INFO L225 Difference]: With dead ends: 481018 [2019-12-07 19:03:40,520 INFO L226 Difference]: Without dead ends: 480836 [2019-12-07 19:03:40,521 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:03:48,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480836 states. [2019-12-07 19:03:54,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480836 to 364743. [2019-12-07 19:03:54,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364743 states. [2019-12-07 19:03:55,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364743 states to 364743 states and 1489285 transitions. [2019-12-07 19:03:55,405 INFO L78 Accepts]: Start accepts. Automaton has 364743 states and 1489285 transitions. Word has length 19 [2019-12-07 19:03:55,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:55,405 INFO L462 AbstractCegarLoop]: Abstraction has 364743 states and 1489285 transitions. [2019-12-07 19:03:55,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:03:55,405 INFO L276 IsEmpty]: Start isEmpty. Operand 364743 states and 1489285 transitions. [2019-12-07 19:03:55,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:03:55,429 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:55,429 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:55,429 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:55,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:55,430 INFO L82 PathProgramCache]: Analyzing trace with hash 1088543872, now seen corresponding path program 1 times [2019-12-07 19:03:55,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:55,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090439622] [2019-12-07 19:03:55,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:55,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:55,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:55,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090439622] [2019-12-07 19:03:55,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:55,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:03:55,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [407973168] [2019-12-07 19:03:55,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:03:55,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:55,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:03:55,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:55,459 INFO L87 Difference]: Start difference. First operand 364743 states and 1489285 transitions. Second operand 3 states. [2019-12-07 19:03:58,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:03:58,391 INFO L93 Difference]: Finished difference Result 67472 states and 218112 transitions. [2019-12-07 19:03:58,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:03:58,392 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 19:03:58,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:03:58,493 INFO L225 Difference]: With dead ends: 67472 [2019-12-07 19:03:58,493 INFO L226 Difference]: Without dead ends: 67472 [2019-12-07 19:03:58,493 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:03:58,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67472 states. [2019-12-07 19:03:59,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67472 to 67472. [2019-12-07 19:03:59,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67472 states. [2019-12-07 19:03:59,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67472 states to 67472 states and 218112 transitions. [2019-12-07 19:03:59,516 INFO L78 Accepts]: Start accepts. Automaton has 67472 states and 218112 transitions. Word has length 19 [2019-12-07 19:03:59,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:03:59,516 INFO L462 AbstractCegarLoop]: Abstraction has 67472 states and 218112 transitions. [2019-12-07 19:03:59,516 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:03:59,516 INFO L276 IsEmpty]: Start isEmpty. Operand 67472 states and 218112 transitions. [2019-12-07 19:03:59,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:03:59,523 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:03:59,523 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:03:59,523 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:03:59,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:03:59,524 INFO L82 PathProgramCache]: Analyzing trace with hash -655013944, now seen corresponding path program 1 times [2019-12-07 19:03:59,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:03:59,524 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209652653] [2019-12-07 19:03:59,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:03:59,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:03:59,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:03:59,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209652653] [2019-12-07 19:03:59,554 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:03:59,554 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:03:59,554 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294552658] [2019-12-07 19:03:59,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:03:59,555 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:03:59,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:03:59,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:03:59,555 INFO L87 Difference]: Start difference. First operand 67472 states and 218112 transitions. Second operand 5 states. [2019-12-07 19:04:00,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:00,039 INFO L93 Difference]: Finished difference Result 88451 states and 279620 transitions. [2019-12-07 19:04:00,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:04:00,039 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:04:00,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:00,166 INFO L225 Difference]: With dead ends: 88451 [2019-12-07 19:04:00,166 INFO L226 Difference]: Without dead ends: 88437 [2019-12-07 19:04:00,167 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:04:00,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88437 states. [2019-12-07 19:04:01,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88437 to 71798. [2019-12-07 19:04:01,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71798 states. [2019-12-07 19:04:01,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71798 states to 71798 states and 231108 transitions. [2019-12-07 19:04:01,515 INFO L78 Accepts]: Start accepts. Automaton has 71798 states and 231108 transitions. Word has length 22 [2019-12-07 19:04:01,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:01,516 INFO L462 AbstractCegarLoop]: Abstraction has 71798 states and 231108 transitions. [2019-12-07 19:04:01,516 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:01,516 INFO L276 IsEmpty]: Start isEmpty. Operand 71798 states and 231108 transitions. [2019-12-07 19:04:01,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:04:01,523 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:01,523 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:01,523 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:01,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:01,524 INFO L82 PathProgramCache]: Analyzing trace with hash -2032339914, now seen corresponding path program 1 times [2019-12-07 19:04:01,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:01,524 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654503958] [2019-12-07 19:04:01,524 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:01,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:01,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:01,560 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654503958] [2019-12-07 19:04:01,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:01,561 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:01,561 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952330295] [2019-12-07 19:04:01,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:04:01,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:01,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:04:01,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:01,561 INFO L87 Difference]: Start difference. First operand 71798 states and 231108 transitions. Second operand 5 states. [2019-12-07 19:04:02,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:02,071 INFO L93 Difference]: Finished difference Result 91330 states and 289623 transitions. [2019-12-07 19:04:02,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:04:02,071 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:04:02,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:02,200 INFO L225 Difference]: With dead ends: 91330 [2019-12-07 19:04:02,200 INFO L226 Difference]: Without dead ends: 91316 [2019-12-07 19:04:02,200 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:04:02,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91316 states. [2019-12-07 19:04:03,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91316 to 69605. [2019-12-07 19:04:03,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69605 states. [2019-12-07 19:04:03,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69605 states to 69605 states and 224450 transitions. [2019-12-07 19:04:03,523 INFO L78 Accepts]: Start accepts. Automaton has 69605 states and 224450 transitions. Word has length 22 [2019-12-07 19:04:03,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:03,523 INFO L462 AbstractCegarLoop]: Abstraction has 69605 states and 224450 transitions. [2019-12-07 19:04:03,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:03,523 INFO L276 IsEmpty]: Start isEmpty. Operand 69605 states and 224450 transitions. [2019-12-07 19:04:03,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 19:04:03,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:03,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:03,539 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:03,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:03,540 INFO L82 PathProgramCache]: Analyzing trace with hash -1083173402, now seen corresponding path program 1 times [2019-12-07 19:04:03,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:03,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1799077506] [2019-12-07 19:04:03,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:03,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:03,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:03,572 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1799077506] [2019-12-07 19:04:03,572 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:03,572 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:03,572 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2096399256] [2019-12-07 19:04:03,572 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:04:03,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:03,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:04:03,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:03,573 INFO L87 Difference]: Start difference. First operand 69605 states and 224450 transitions. Second operand 5 states. [2019-12-07 19:04:03,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:03,968 INFO L93 Difference]: Finished difference Result 86092 states and 273664 transitions. [2019-12-07 19:04:03,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:04:03,969 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 19:04:03,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:04,094 INFO L225 Difference]: With dead ends: 86092 [2019-12-07 19:04:04,094 INFO L226 Difference]: Without dead ends: 86044 [2019-12-07 19:04:04,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:04:04,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86044 states. [2019-12-07 19:04:05,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86044 to 73017. [2019-12-07 19:04:05,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73017 states. [2019-12-07 19:04:05,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73017 states to 73017 states and 234757 transitions. [2019-12-07 19:04:05,483 INFO L78 Accepts]: Start accepts. Automaton has 73017 states and 234757 transitions. Word has length 26 [2019-12-07 19:04:05,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:05,484 INFO L462 AbstractCegarLoop]: Abstraction has 73017 states and 234757 transitions. [2019-12-07 19:04:05,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:05,484 INFO L276 IsEmpty]: Start isEmpty. Operand 73017 states and 234757 transitions. [2019-12-07 19:04:05,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 19:04:05,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:05,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:05,505 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:05,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:05,505 INFO L82 PathProgramCache]: Analyzing trace with hash -799804073, now seen corresponding path program 1 times [2019-12-07 19:04:05,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:05,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [124020745] [2019-12-07 19:04:05,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:05,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:05,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:05,535 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [124020745] [2019-12-07 19:04:05,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:05,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:05,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78231487] [2019-12-07 19:04:05,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:04:05,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:05,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:04:05,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:05,536 INFO L87 Difference]: Start difference. First operand 73017 states and 234757 transitions. Second operand 5 states. [2019-12-07 19:04:05,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:05,961 INFO L93 Difference]: Finished difference Result 87024 states and 275380 transitions. [2019-12-07 19:04:05,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:04:05,962 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 19:04:05,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:06,088 INFO L225 Difference]: With dead ends: 87024 [2019-12-07 19:04:06,088 INFO L226 Difference]: Without dead ends: 86980 [2019-12-07 19:04:06,089 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:04:06,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86980 states. [2019-12-07 19:04:07,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86980 to 72137. [2019-12-07 19:04:07,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72137 states. [2019-12-07 19:04:07,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72137 states to 72137 states and 232084 transitions. [2019-12-07 19:04:07,336 INFO L78 Accepts]: Start accepts. Automaton has 72137 states and 232084 transitions. Word has length 28 [2019-12-07 19:04:07,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:07,337 INFO L462 AbstractCegarLoop]: Abstraction has 72137 states and 232084 transitions. [2019-12-07 19:04:07,337 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:07,337 INFO L276 IsEmpty]: Start isEmpty. Operand 72137 states and 232084 transitions. [2019-12-07 19:04:07,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 19:04:07,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:07,360 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:07,361 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:07,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:07,361 INFO L82 PathProgramCache]: Analyzing trace with hash -1469523336, now seen corresponding path program 1 times [2019-12-07 19:04:07,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:07,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769875964] [2019-12-07 19:04:07,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:07,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:07,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:07,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769875964] [2019-12-07 19:04:07,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:07,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:07,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475081407] [2019-12-07 19:04:07,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:04:07,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:07,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:04:07,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:07,391 INFO L87 Difference]: Start difference. First operand 72137 states and 232084 transitions. Second operand 4 states. [2019-12-07 19:04:07,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:07,559 INFO L93 Difference]: Finished difference Result 27979 states and 86655 transitions. [2019-12-07 19:04:07,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:04:07,560 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 19:04:07,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:07,593 INFO L225 Difference]: With dead ends: 27979 [2019-12-07 19:04:07,594 INFO L226 Difference]: Without dead ends: 27979 [2019-12-07 19:04:07,594 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:07,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27979 states. [2019-12-07 19:04:07,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27979 to 25500. [2019-12-07 19:04:07,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25500 states. [2019-12-07 19:04:07,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25500 states to 25500 states and 79033 transitions. [2019-12-07 19:04:07,978 INFO L78 Accepts]: Start accepts. Automaton has 25500 states and 79033 transitions. Word has length 30 [2019-12-07 19:04:07,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:07,978 INFO L462 AbstractCegarLoop]: Abstraction has 25500 states and 79033 transitions. [2019-12-07 19:04:07,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:04:07,978 INFO L276 IsEmpty]: Start isEmpty. Operand 25500 states and 79033 transitions. [2019-12-07 19:04:07,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 19:04:07,996 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:07,996 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:07,996 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:07,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:07,996 INFO L82 PathProgramCache]: Analyzing trace with hash -145847770, now seen corresponding path program 1 times [2019-12-07 19:04:07,997 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:07,997 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478676292] [2019-12-07 19:04:07,997 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:08,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:08,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:08,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478676292] [2019-12-07 19:04:08,034 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:08,034 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:04:08,034 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1715767687] [2019-12-07 19:04:08,035 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:04:08,035 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:08,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:04:08,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:04:08,035 INFO L87 Difference]: Start difference. First operand 25500 states and 79033 transitions. Second operand 6 states. [2019-12-07 19:04:08,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:08,446 INFO L93 Difference]: Finished difference Result 32400 states and 98245 transitions. [2019-12-07 19:04:08,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:04:08,446 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 19:04:08,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:08,483 INFO L225 Difference]: With dead ends: 32400 [2019-12-07 19:04:08,483 INFO L226 Difference]: Without dead ends: 32400 [2019-12-07 19:04:08,484 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:04:08,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32400 states. [2019-12-07 19:04:08,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32400 to 25938. [2019-12-07 19:04:08,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25938 states. [2019-12-07 19:04:08,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25938 states to 25938 states and 80337 transitions. [2019-12-07 19:04:08,908 INFO L78 Accepts]: Start accepts. Automaton has 25938 states and 80337 transitions. Word has length 32 [2019-12-07 19:04:08,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:08,909 INFO L462 AbstractCegarLoop]: Abstraction has 25938 states and 80337 transitions. [2019-12-07 19:04:08,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:04:08,909 INFO L276 IsEmpty]: Start isEmpty. Operand 25938 states and 80337 transitions. [2019-12-07 19:04:08,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 19:04:08,928 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:08,928 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:08,929 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:08,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:08,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1380765993, now seen corresponding path program 1 times [2019-12-07 19:04:08,929 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:08,929 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [11570106] [2019-12-07 19:04:08,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:08,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:08,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:08,981 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [11570106] [2019-12-07 19:04:08,981 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:08,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:04:08,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [943117483] [2019-12-07 19:04:08,982 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:04:08,982 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:08,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:04:08,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:04:08,983 INFO L87 Difference]: Start difference. First operand 25938 states and 80337 transitions. Second operand 6 states. [2019-12-07 19:04:09,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:09,423 INFO L93 Difference]: Finished difference Result 31899 states and 96883 transitions. [2019-12-07 19:04:09,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:04:09,424 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 19:04:09,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:09,461 INFO L225 Difference]: With dead ends: 31899 [2019-12-07 19:04:09,461 INFO L226 Difference]: Without dead ends: 31899 [2019-12-07 19:04:09,461 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:04:09,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31899 states. [2019-12-07 19:04:09,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31899 to 24780. [2019-12-07 19:04:09,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24780 states. [2019-12-07 19:04:09,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24780 states to 24780 states and 76926 transitions. [2019-12-07 19:04:09,873 INFO L78 Accepts]: Start accepts. Automaton has 24780 states and 76926 transitions. Word has length 34 [2019-12-07 19:04:09,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:09,873 INFO L462 AbstractCegarLoop]: Abstraction has 24780 states and 76926 transitions. [2019-12-07 19:04:09,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:04:09,873 INFO L276 IsEmpty]: Start isEmpty. Operand 24780 states and 76926 transitions. [2019-12-07 19:04:09,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 19:04:09,894 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:09,894 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:09,894 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:09,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:09,894 INFO L82 PathProgramCache]: Analyzing trace with hash 1174419869, now seen corresponding path program 1 times [2019-12-07 19:04:09,894 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:09,894 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274063368] [2019-12-07 19:04:09,894 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:09,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:09,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:09,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274063368] [2019-12-07 19:04:09,955 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:09,955 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:04:09,955 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1355876318] [2019-12-07 19:04:09,955 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:04:09,955 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:09,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:04:09,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:09,956 INFO L87 Difference]: Start difference. First operand 24780 states and 76926 transitions. Second operand 5 states. [2019-12-07 19:04:10,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:10,420 INFO L93 Difference]: Finished difference Result 36358 states and 111275 transitions. [2019-12-07 19:04:10,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:04:10,420 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 19:04:10,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:10,463 INFO L225 Difference]: With dead ends: 36358 [2019-12-07 19:04:10,463 INFO L226 Difference]: Without dead ends: 36358 [2019-12-07 19:04:10,463 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:04:10,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36358 states. [2019-12-07 19:04:10,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36358 to 31699. [2019-12-07 19:04:10,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31699 states. [2019-12-07 19:04:10,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31699 states to 31699 states and 98212 transitions. [2019-12-07 19:04:10,949 INFO L78 Accepts]: Start accepts. Automaton has 31699 states and 98212 transitions. Word has length 41 [2019-12-07 19:04:10,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:10,949 INFO L462 AbstractCegarLoop]: Abstraction has 31699 states and 98212 transitions. [2019-12-07 19:04:10,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:10,949 INFO L276 IsEmpty]: Start isEmpty. Operand 31699 states and 98212 transitions. [2019-12-07 19:04:10,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 19:04:10,979 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:10,979 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:10,979 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:10,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:10,980 INFO L82 PathProgramCache]: Analyzing trace with hash 1274395705, now seen corresponding path program 2 times [2019-12-07 19:04:10,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:10,980 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193492198] [2019-12-07 19:04:10,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:10,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:11,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:11,011 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1193492198] [2019-12-07 19:04:11,011 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:11,011 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:04:11,011 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1350581457] [2019-12-07 19:04:11,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:04:11,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:11,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:04:11,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:11,012 INFO L87 Difference]: Start difference. First operand 31699 states and 98212 transitions. Second operand 3 states. [2019-12-07 19:04:11,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:11,093 INFO L93 Difference]: Finished difference Result 31699 states and 96920 transitions. [2019-12-07 19:04:11,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:04:11,094 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 19:04:11,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:11,130 INFO L225 Difference]: With dead ends: 31699 [2019-12-07 19:04:11,130 INFO L226 Difference]: Without dead ends: 31699 [2019-12-07 19:04:11,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:04:11,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31699 states. [2019-12-07 19:04:11,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31699 to 31402. [2019-12-07 19:04:11,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31402 states. [2019-12-07 19:04:11,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31402 states to 31402 states and 96079 transitions. [2019-12-07 19:04:11,552 INFO L78 Accepts]: Start accepts. Automaton has 31402 states and 96079 transitions. Word has length 41 [2019-12-07 19:04:11,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:11,553 INFO L462 AbstractCegarLoop]: Abstraction has 31402 states and 96079 transitions. [2019-12-07 19:04:11,553 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:04:11,553 INFO L276 IsEmpty]: Start isEmpty. Operand 31402 states and 96079 transitions. [2019-12-07 19:04:11,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 19:04:11,582 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:11,582 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:11,582 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:11,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:11,582 INFO L82 PathProgramCache]: Analyzing trace with hash 1961497157, now seen corresponding path program 1 times [2019-12-07 19:04:11,582 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:11,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [699871052] [2019-12-07 19:04:11,583 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:11,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:11,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:11,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [699871052] [2019-12-07 19:04:11,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:11,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:04:11,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1639759680] [2019-12-07 19:04:11,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:04:11,621 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:11,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:04:11,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:11,622 INFO L87 Difference]: Start difference. First operand 31402 states and 96079 transitions. Second operand 5 states. [2019-12-07 19:04:11,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:11,711 INFO L93 Difference]: Finished difference Result 29301 states and 91372 transitions. [2019-12-07 19:04:11,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:04:11,711 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 19:04:11,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:11,747 INFO L225 Difference]: With dead ends: 29301 [2019-12-07 19:04:11,747 INFO L226 Difference]: Without dead ends: 29073 [2019-12-07 19:04:11,747 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:04:11,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29073 states. [2019-12-07 19:04:12,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29073 to 17961. [2019-12-07 19:04:12,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17961 states. [2019-12-07 19:04:12,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17961 states to 17961 states and 55758 transitions. [2019-12-07 19:04:12,054 INFO L78 Accepts]: Start accepts. Automaton has 17961 states and 55758 transitions. Word has length 42 [2019-12-07 19:04:12,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:12,054 INFO L462 AbstractCegarLoop]: Abstraction has 17961 states and 55758 transitions. [2019-12-07 19:04:12,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:04:12,054 INFO L276 IsEmpty]: Start isEmpty. Operand 17961 states and 55758 transitions. [2019-12-07 19:04:12,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:12,069 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:12,069 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:12,069 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:12,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:12,070 INFO L82 PathProgramCache]: Analyzing trace with hash -668679299, now seen corresponding path program 1 times [2019-12-07 19:04:12,070 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:12,070 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [168523139] [2019-12-07 19:04:12,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:12,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:12,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:12,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [168523139] [2019-12-07 19:04:12,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:12,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:04:12,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801791308] [2019-12-07 19:04:12,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:04:12,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:12,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:04:12,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:04:12,128 INFO L87 Difference]: Start difference. First operand 17961 states and 55758 transitions. Second operand 6 states. [2019-12-07 19:04:12,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:12,602 INFO L93 Difference]: Finished difference Result 24182 states and 74065 transitions. [2019-12-07 19:04:12,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 19:04:12,602 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 19:04:12,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:12,627 INFO L225 Difference]: With dead ends: 24182 [2019-12-07 19:04:12,627 INFO L226 Difference]: Without dead ends: 24182 [2019-12-07 19:04:12,627 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:04:12,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24182 states. [2019-12-07 19:04:12,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24182 to 18809. [2019-12-07 19:04:12,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18809 states. [2019-12-07 19:04:12,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18809 states to 18809 states and 58382 transitions. [2019-12-07 19:04:12,933 INFO L78 Accepts]: Start accepts. Automaton has 18809 states and 58382 transitions. Word has length 65 [2019-12-07 19:04:12,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:12,933 INFO L462 AbstractCegarLoop]: Abstraction has 18809 states and 58382 transitions. [2019-12-07 19:04:12,933 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:04:12,933 INFO L276 IsEmpty]: Start isEmpty. Operand 18809 states and 58382 transitions. [2019-12-07 19:04:12,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:12,949 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:12,949 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:12,949 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:12,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:12,950 INFO L82 PathProgramCache]: Analyzing trace with hash 339295601, now seen corresponding path program 2 times [2019-12-07 19:04:12,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:12,950 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748810777] [2019-12-07 19:04:12,950 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:12,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:13,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:13,027 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748810777] [2019-12-07 19:04:13,027 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:13,028 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 19:04:13,028 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [251966424] [2019-12-07 19:04:13,028 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:04:13,028 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:13,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:04:13,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:04:13,029 INFO L87 Difference]: Start difference. First operand 18809 states and 58382 transitions. Second operand 7 states. [2019-12-07 19:04:13,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:13,961 INFO L93 Difference]: Finished difference Result 26563 states and 80772 transitions. [2019-12-07 19:04:13,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 19:04:13,962 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 19:04:13,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:13,992 INFO L225 Difference]: With dead ends: 26563 [2019-12-07 19:04:13,992 INFO L226 Difference]: Without dead ends: 26563 [2019-12-07 19:04:13,992 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=396, Unknown=0, NotChecked=0, Total=506 [2019-12-07 19:04:14,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26563 states. [2019-12-07 19:04:14,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26563 to 18831. [2019-12-07 19:04:14,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18831 states. [2019-12-07 19:04:14,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18831 states to 18831 states and 58373 transitions. [2019-12-07 19:04:14,302 INFO L78 Accepts]: Start accepts. Automaton has 18831 states and 58373 transitions. Word has length 65 [2019-12-07 19:04:14,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:14,303 INFO L462 AbstractCegarLoop]: Abstraction has 18831 states and 58373 transitions. [2019-12-07 19:04:14,303 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:04:14,303 INFO L276 IsEmpty]: Start isEmpty. Operand 18831 states and 58373 transitions. [2019-12-07 19:04:14,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:14,319 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:14,319 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:14,319 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:14,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:14,319 INFO L82 PathProgramCache]: Analyzing trace with hash 903189921, now seen corresponding path program 3 times [2019-12-07 19:04:14,319 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:14,319 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1926039922] [2019-12-07 19:04:14,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:14,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:14,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:14,486 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1926039922] [2019-12-07 19:04:14,486 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:14,486 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:04:14,486 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [341584765] [2019-12-07 19:04:14,486 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:04:14,486 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:14,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:04:14,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:04:14,487 INFO L87 Difference]: Start difference. First operand 18831 states and 58373 transitions. Second operand 12 states. [2019-12-07 19:04:17,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:17,420 INFO L93 Difference]: Finished difference Result 103215 states and 324854 transitions. [2019-12-07 19:04:17,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2019-12-07 19:04:17,421 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 65 [2019-12-07 19:04:17,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:17,554 INFO L225 Difference]: With dead ends: 103215 [2019-12-07 19:04:17,554 INFO L226 Difference]: Without dead ends: 96613 [2019-12-07 19:04:17,556 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1237 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=662, Invalid=2998, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 19:04:17,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96613 states. [2019-12-07 19:04:18,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96613 to 27665. [2019-12-07 19:04:18,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27665 states. [2019-12-07 19:04:18,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27665 states to 27665 states and 85938 transitions. [2019-12-07 19:04:18,433 INFO L78 Accepts]: Start accepts. Automaton has 27665 states and 85938 transitions. Word has length 65 [2019-12-07 19:04:18,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:18,433 INFO L462 AbstractCegarLoop]: Abstraction has 27665 states and 85938 transitions. [2019-12-07 19:04:18,433 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:04:18,433 INFO L276 IsEmpty]: Start isEmpty. Operand 27665 states and 85938 transitions. [2019-12-07 19:04:18,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:18,461 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:18,461 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:18,462 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:18,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:18,462 INFO L82 PathProgramCache]: Analyzing trace with hash 1623072545, now seen corresponding path program 4 times [2019-12-07 19:04:18,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:18,462 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609044629] [2019-12-07 19:04:18,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:18,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:18,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:18,624 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1609044629] [2019-12-07 19:04:18,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:18,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:04:18,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1893099305] [2019-12-07 19:04:18,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:04:18,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:18,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:04:18,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:04:18,625 INFO L87 Difference]: Start difference. First operand 27665 states and 85938 transitions. Second operand 11 states. [2019-12-07 19:04:20,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:20,055 INFO L93 Difference]: Finished difference Result 38906 states and 120046 transitions. [2019-12-07 19:04:20,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 19:04:20,055 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 19:04:20,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:20,094 INFO L225 Difference]: With dead ends: 38906 [2019-12-07 19:04:20,094 INFO L226 Difference]: Without dead ends: 32095 [2019-12-07 19:04:20,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=360, Unknown=0, NotChecked=0, Total=462 [2019-12-07 19:04:20,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32095 states. [2019-12-07 19:04:20,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32095 to 27339. [2019-12-07 19:04:20,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27339 states. [2019-12-07 19:04:20,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27339 states to 27339 states and 84578 transitions. [2019-12-07 19:04:20,509 INFO L78 Accepts]: Start accepts. Automaton has 27339 states and 84578 transitions. Word has length 65 [2019-12-07 19:04:20,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:20,509 INFO L462 AbstractCegarLoop]: Abstraction has 27339 states and 84578 transitions. [2019-12-07 19:04:20,509 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:04:20,510 INFO L276 IsEmpty]: Start isEmpty. Operand 27339 states and 84578 transitions. [2019-12-07 19:04:20,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:20,538 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:20,538 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:20,538 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:20,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:20,539 INFO L82 PathProgramCache]: Analyzing trace with hash 1136252595, now seen corresponding path program 5 times [2019-12-07 19:04:20,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:20,539 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1443646484] [2019-12-07 19:04:20,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:20,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:20,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:20,676 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1443646484] [2019-12-07 19:04:20,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:20,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:04:20,676 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539509118] [2019-12-07 19:04:20,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:04:20,677 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:20,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:04:20,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:04:20,677 INFO L87 Difference]: Start difference. First operand 27339 states and 84578 transitions. Second operand 11 states. [2019-12-07 19:04:21,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:21,942 INFO L93 Difference]: Finished difference Result 36348 states and 110777 transitions. [2019-12-07 19:04:21,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 19:04:21,943 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 19:04:21,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:21,993 INFO L225 Difference]: With dead ends: 36348 [2019-12-07 19:04:21,994 INFO L226 Difference]: Without dead ends: 33406 [2019-12-07 19:04:21,994 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=105, Invalid=401, Unknown=0, NotChecked=0, Total=506 [2019-12-07 19:04:22,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33406 states. [2019-12-07 19:04:22,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33406 to 27369. [2019-12-07 19:04:22,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27369 states. [2019-12-07 19:04:22,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27369 states to 27369 states and 84405 transitions. [2019-12-07 19:04:22,428 INFO L78 Accepts]: Start accepts. Automaton has 27369 states and 84405 transitions. Word has length 65 [2019-12-07 19:04:22,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:22,428 INFO L462 AbstractCegarLoop]: Abstraction has 27369 states and 84405 transitions. [2019-12-07 19:04:22,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:04:22,428 INFO L276 IsEmpty]: Start isEmpty. Operand 27369 states and 84405 transitions. [2019-12-07 19:04:22,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:22,456 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:22,456 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:22,456 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:22,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:22,457 INFO L82 PathProgramCache]: Analyzing trace with hash -330874671, now seen corresponding path program 6 times [2019-12-07 19:04:22,457 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:22,457 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [90230272] [2019-12-07 19:04:22,457 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:22,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:22,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:22,590 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [90230272] [2019-12-07 19:04:22,590 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:22,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:04:22,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [452024174] [2019-12-07 19:04:22,591 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:04:22,591 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:22,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:04:22,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:04:22,591 INFO L87 Difference]: Start difference. First operand 27369 states and 84405 transitions. Second operand 12 states. [2019-12-07 19:04:24,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:24,813 INFO L93 Difference]: Finished difference Result 84739 states and 258524 transitions. [2019-12-07 19:04:24,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2019-12-07 19:04:24,813 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 65 [2019-12-07 19:04:24,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:24,893 INFO L225 Difference]: With dead ends: 84739 [2019-12-07 19:04:24,894 INFO L226 Difference]: Without dead ends: 60510 [2019-12-07 19:04:24,895 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1216 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=664, Invalid=2996, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 19:04:25,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60510 states. [2019-12-07 19:04:25,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60510 to 21623. [2019-12-07 19:04:25,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21623 states. [2019-12-07 19:04:25,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21623 states to 21623 states and 66133 transitions. [2019-12-07 19:04:25,443 INFO L78 Accepts]: Start accepts. Automaton has 21623 states and 66133 transitions. Word has length 65 [2019-12-07 19:04:25,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:25,443 INFO L462 AbstractCegarLoop]: Abstraction has 21623 states and 66133 transitions. [2019-12-07 19:04:25,444 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:04:25,444 INFO L276 IsEmpty]: Start isEmpty. Operand 21623 states and 66133 transitions. [2019-12-07 19:04:25,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:25,464 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:25,464 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:25,464 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:25,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:25,464 INFO L82 PathProgramCache]: Analyzing trace with hash 1999716611, now seen corresponding path program 7 times [2019-12-07 19:04:25,464 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:25,464 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1942781435] [2019-12-07 19:04:25,464 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:25,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:25,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:25,514 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1942781435] [2019-12-07 19:04:25,514 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:25,515 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:04:25,515 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45925293] [2019-12-07 19:04:25,515 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:04:25,515 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:25,515 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:04:25,515 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:04:25,516 INFO L87 Difference]: Start difference. First operand 21623 states and 66133 transitions. Second operand 7 states. [2019-12-07 19:04:25,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:25,789 INFO L93 Difference]: Finished difference Result 39945 states and 120005 transitions. [2019-12-07 19:04:25,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:04:25,789 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 19:04:25,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:25,828 INFO L225 Difference]: With dead ends: 39945 [2019-12-07 19:04:25,828 INFO L226 Difference]: Without dead ends: 35987 [2019-12-07 19:04:25,828 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:04:25,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35987 states. [2019-12-07 19:04:26,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35987 to 21034. [2019-12-07 19:04:26,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21034 states. [2019-12-07 19:04:26,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21034 states to 21034 states and 64352 transitions. [2019-12-07 19:04:26,227 INFO L78 Accepts]: Start accepts. Automaton has 21034 states and 64352 transitions. Word has length 65 [2019-12-07 19:04:26,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:26,227 INFO L462 AbstractCegarLoop]: Abstraction has 21034 states and 64352 transitions. [2019-12-07 19:04:26,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:04:26,227 INFO L276 IsEmpty]: Start isEmpty. Operand 21034 states and 64352 transitions. [2019-12-07 19:04:26,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:26,245 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:26,245 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:26,246 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:26,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:26,246 INFO L82 PathProgramCache]: Analyzing trace with hash 899441441, now seen corresponding path program 8 times [2019-12-07 19:04:26,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:26,246 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829633060] [2019-12-07 19:04:26,246 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:26,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:26,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:26,371 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829633060] [2019-12-07 19:04:26,371 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:26,371 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:04:26,371 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [392410785] [2019-12-07 19:04:26,372 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:04:26,372 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:26,372 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:04:26,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:04:26,372 INFO L87 Difference]: Start difference. First operand 21034 states and 64352 transitions. Second operand 12 states. [2019-12-07 19:04:27,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:27,164 INFO L93 Difference]: Finished difference Result 43315 states and 132870 transitions. [2019-12-07 19:04:27,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 19:04:27,164 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 65 [2019-12-07 19:04:27,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:27,212 INFO L225 Difference]: With dead ends: 43315 [2019-12-07 19:04:27,213 INFO L226 Difference]: Without dead ends: 42071 [2019-12-07 19:04:27,213 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 202 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=181, Invalid=811, Unknown=0, NotChecked=0, Total=992 [2019-12-07 19:04:27,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42071 states. [2019-12-07 19:04:27,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42071 to 24768. [2019-12-07 19:04:27,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24768 states. [2019-12-07 19:04:27,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24768 states to 24768 states and 75763 transitions. [2019-12-07 19:04:27,714 INFO L78 Accepts]: Start accepts. Automaton has 24768 states and 75763 transitions. Word has length 65 [2019-12-07 19:04:27,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:27,715 INFO L462 AbstractCegarLoop]: Abstraction has 24768 states and 75763 transitions. [2019-12-07 19:04:27,715 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:04:27,715 INFO L276 IsEmpty]: Start isEmpty. Operand 24768 states and 75763 transitions. [2019-12-07 19:04:27,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:27,740 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:27,740 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:27,740 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:27,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:27,740 INFO L82 PathProgramCache]: Analyzing trace with hash 1619324065, now seen corresponding path program 9 times [2019-12-07 19:04:27,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:27,741 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [903273010] [2019-12-07 19:04:27,741 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:27,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:27,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:27,885 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [903273010] [2019-12-07 19:04:27,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:27,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:04:27,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206701162] [2019-12-07 19:04:27,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:04:27,885 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:27,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:04:27,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:04:27,886 INFO L87 Difference]: Start difference. First operand 24768 states and 75763 transitions. Second operand 11 states. [2019-12-07 19:04:28,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:28,558 INFO L93 Difference]: Finished difference Result 30963 states and 94103 transitions. [2019-12-07 19:04:28,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 19:04:28,558 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 19:04:28,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:28,590 INFO L225 Difference]: With dead ends: 30963 [2019-12-07 19:04:28,590 INFO L226 Difference]: Without dead ends: 27252 [2019-12-07 19:04:28,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2019-12-07 19:04:28,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27252 states. [2019-12-07 19:04:28,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27252 to 23874. [2019-12-07 19:04:28,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23874 states. [2019-12-07 19:04:28,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23874 states to 23874 states and 72906 transitions. [2019-12-07 19:04:28,933 INFO L78 Accepts]: Start accepts. Automaton has 23874 states and 72906 transitions. Word has length 65 [2019-12-07 19:04:28,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:28,933 INFO L462 AbstractCegarLoop]: Abstraction has 23874 states and 72906 transitions. [2019-12-07 19:04:28,933 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:04:28,933 INFO L276 IsEmpty]: Start isEmpty. Operand 23874 states and 72906 transitions. [2019-12-07 19:04:28,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:28,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:28,955 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:28,955 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:28,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:28,956 INFO L82 PathProgramCache]: Analyzing trace with hash -131369463, now seen corresponding path program 10 times [2019-12-07 19:04:28,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:28,956 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684141781] [2019-12-07 19:04:28,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:28,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:29,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:29,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684141781] [2019-12-07 19:04:29,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:29,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:04:29,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1098153898] [2019-12-07 19:04:29,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:04:29,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:29,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:04:29,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:04:29,106 INFO L87 Difference]: Start difference. First operand 23874 states and 72906 transitions. Second operand 12 states. [2019-12-07 19:04:30,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:30,789 INFO L93 Difference]: Finished difference Result 49082 states and 148848 transitions. [2019-12-07 19:04:30,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 19:04:30,789 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 65 [2019-12-07 19:04:30,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:30,841 INFO L225 Difference]: With dead ends: 49082 [2019-12-07 19:04:30,841 INFO L226 Difference]: Without dead ends: 42906 [2019-12-07 19:04:30,841 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 248 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=219, Invalid=971, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 19:04:30,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42906 states. [2019-12-07 19:04:31,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42906 to 22182. [2019-12-07 19:04:31,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22182 states. [2019-12-07 19:04:31,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22182 states to 22182 states and 67545 transitions. [2019-12-07 19:04:31,260 INFO L78 Accepts]: Start accepts. Automaton has 22182 states and 67545 transitions. Word has length 65 [2019-12-07 19:04:31,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:31,260 INFO L462 AbstractCegarLoop]: Abstraction has 22182 states and 67545 transitions. [2019-12-07 19:04:31,260 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:04:31,261 INFO L276 IsEmpty]: Start isEmpty. Operand 22182 states and 67545 transitions. [2019-12-07 19:04:31,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:04:31,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:31,279 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:31,279 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:31,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:31,279 INFO L82 PathProgramCache]: Analyzing trace with hash -1019867375, now seen corresponding path program 11 times [2019-12-07 19:04:31,279 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:31,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046295739] [2019-12-07 19:04:31,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:31,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:31,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:31,331 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046295739] [2019-12-07 19:04:31,331 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:31,331 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:04:31,331 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324147921] [2019-12-07 19:04:31,331 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:04:31,331 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:31,332 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:04:31,332 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:31,332 INFO L87 Difference]: Start difference. First operand 22182 states and 67545 transitions. Second operand 4 states. [2019-12-07 19:04:31,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:31,432 INFO L93 Difference]: Finished difference Result 26049 states and 78975 transitions. [2019-12-07 19:04:31,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:04:31,433 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2019-12-07 19:04:31,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:31,461 INFO L225 Difference]: With dead ends: 26049 [2019-12-07 19:04:31,461 INFO L226 Difference]: Without dead ends: 26049 [2019-12-07 19:04:31,462 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:04:31,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26049 states. [2019-12-07 19:04:31,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26049 to 22213. [2019-12-07 19:04:31,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22213 states. [2019-12-07 19:04:31,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22213 states to 22213 states and 67817 transitions. [2019-12-07 19:04:31,806 INFO L78 Accepts]: Start accepts. Automaton has 22213 states and 67817 transitions. Word has length 65 [2019-12-07 19:04:31,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:31,806 INFO L462 AbstractCegarLoop]: Abstraction has 22213 states and 67817 transitions. [2019-12-07 19:04:31,806 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:04:31,806 INFO L276 IsEmpty]: Start isEmpty. Operand 22213 states and 67817 transitions. [2019-12-07 19:04:31,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:04:31,824 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:31,824 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:31,824 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:31,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:31,825 INFO L82 PathProgramCache]: Analyzing trace with hash 632467003, now seen corresponding path program 1 times [2019-12-07 19:04:31,825 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:31,825 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050706308] [2019-12-07 19:04:31,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:31,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:31,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:31,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050706308] [2019-12-07 19:04:31,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:31,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:04:31,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [809719052] [2019-12-07 19:04:31,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:04:31,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:31,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:04:31,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:04:31,938 INFO L87 Difference]: Start difference. First operand 22213 states and 67817 transitions. Second operand 12 states. [2019-12-07 19:04:32,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:32,707 INFO L93 Difference]: Finished difference Result 40518 states and 123550 transitions. [2019-12-07 19:04:32,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 19:04:32,708 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 19:04:32,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:32,752 INFO L225 Difference]: With dead ends: 40518 [2019-12-07 19:04:32,753 INFO L226 Difference]: Without dead ends: 39327 [2019-12-07 19:04:32,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=178, Invalid=692, Unknown=0, NotChecked=0, Total=870 [2019-12-07 19:04:32,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39327 states. [2019-12-07 19:04:33,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39327 to 21225. [2019-12-07 19:04:33,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21225 states. [2019-12-07 19:04:33,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21225 states to 21225 states and 65024 transitions. [2019-12-07 19:04:33,163 INFO L78 Accepts]: Start accepts. Automaton has 21225 states and 65024 transitions. Word has length 66 [2019-12-07 19:04:33,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:33,163 INFO L462 AbstractCegarLoop]: Abstraction has 21225 states and 65024 transitions. [2019-12-07 19:04:33,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:04:33,163 INFO L276 IsEmpty]: Start isEmpty. Operand 21225 states and 65024 transitions. [2019-12-07 19:04:33,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:04:33,183 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:33,183 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:33,183 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:33,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:33,183 INFO L82 PathProgramCache]: Analyzing trace with hash -952881413, now seen corresponding path program 2 times [2019-12-07 19:04:33,183 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:33,183 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601051380] [2019-12-07 19:04:33,183 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:33,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:04:33,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:04:33,303 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601051380] [2019-12-07 19:04:33,303 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:04:33,303 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 19:04:33,303 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1253014539] [2019-12-07 19:04:33,303 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:04:33,303 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 19:04:33,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:04:33,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:04:33,304 INFO L87 Difference]: Start difference. First operand 21225 states and 65024 transitions. Second operand 13 states. [2019-12-07 19:04:34,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:04:34,053 INFO L93 Difference]: Finished difference Result 39518 states and 120736 transitions. [2019-12-07 19:04:34,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 19:04:34,053 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 66 [2019-12-07 19:04:34,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:04:34,097 INFO L225 Difference]: With dead ends: 39518 [2019-12-07 19:04:34,098 INFO L226 Difference]: Without dead ends: 39043 [2019-12-07 19:04:34,098 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=191, Invalid=801, Unknown=0, NotChecked=0, Total=992 [2019-12-07 19:04:34,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39043 states. [2019-12-07 19:04:34,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39043 to 20957. [2019-12-07 19:04:34,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20957 states. [2019-12-07 19:04:34,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20957 states to 20957 states and 64336 transitions. [2019-12-07 19:04:34,507 INFO L78 Accepts]: Start accepts. Automaton has 20957 states and 64336 transitions. Word has length 66 [2019-12-07 19:04:34,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:04:34,508 INFO L462 AbstractCegarLoop]: Abstraction has 20957 states and 64336 transitions. [2019-12-07 19:04:34,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:04:34,508 INFO L276 IsEmpty]: Start isEmpty. Operand 20957 states and 64336 transitions. [2019-12-07 19:04:34,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:04:34,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:04:34,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:04:34,527 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:04:34,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:04:34,527 INFO L82 PathProgramCache]: Analyzing trace with hash 620198601, now seen corresponding path program 3 times [2019-12-07 19:04:34,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 19:04:34,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1226728499] [2019-12-07 19:04:34,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:04:34,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:04:34,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:04:34,604 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 19:04:34,604 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:04:34,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t678~0.base_22|) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t678~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t678~0.base_22|) |v_ULTIMATE.start_main_~#t678~0.offset_16| 0))) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= v_~z$w_buff1_used~0_500 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t678~0.base_22| 1) |v_#valid_69|) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t678~0.base_22| 4)) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (= (select .cse0 |v_ULTIMATE.start_main_~#t678~0.base_22|) 0) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= 0 |v_ULTIMATE.start_main_~#t678~0.offset_16|) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd3~0_379) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t678~0.offset=|v_ULTIMATE.start_main_~#t678~0.offset_16|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_~#t680~0.offset=|v_ULTIMATE.start_main_~#t680~0.offset_14|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ULTIMATE.start_main_~#t680~0.base=|v_ULTIMATE.start_main_~#t680~0.base_17|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_133, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t679~0.base=|v_ULTIMATE.start_main_~#t679~0.base_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ULTIMATE.start_main_~#t679~0.offset=|v_ULTIMATE.start_main_~#t679~0.offset_14|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ULTIMATE.start_main_~#t678~0.base=|v_ULTIMATE.start_main_~#t678~0.base_22|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t678~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t680~0.offset, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t680~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t679~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t679~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t678~0.base, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:04:34,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:04:34,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (not (= |v_ULTIMATE.start_main_~#t679~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t679~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t679~0.base_11|) |v_ULTIMATE.start_main_~#t679~0.offset_10| 1)) |v_#memory_int_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t679~0.base_11| 4)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t679~0.base_11|)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t679~0.base_11| 1)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t679~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t679~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t679~0.base=|v_ULTIMATE.start_main_~#t679~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t679~0.offset=|v_ULTIMATE.start_main_~#t679~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t679~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t679~0.offset] because there is no mapped edge [2019-12-07 19:04:34,609 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t680~0.base_12|) 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t680~0.base_12| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t680~0.base_12| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t680~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t680~0.base_12|) |v_ULTIMATE.start_main_~#t680~0.offset_10| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t680~0.base_12|) (= |v_ULTIMATE.start_main_~#t680~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t680~0.base_12| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t680~0.offset=|v_ULTIMATE.start_main_~#t680~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t680~0.base=|v_ULTIMATE.start_main_~#t680~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t680~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t680~0.base] because there is no mapped edge [2019-12-07 19:04:34,610 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out2124745083| |P1Thread1of1ForFork2_#t~ite10_Out2124745083|)) (.cse2 (= (mod ~z$w_buff1_used~0_In2124745083 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In2124745083 256)))) (or (and (not .cse0) .cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out2124745083| ~z$w_buff1~0_In2124745083) (not .cse2)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out2124745083| ~z~0_In2124745083) .cse1 (or .cse2 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2124745083, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2124745083, ~z$w_buff1~0=~z$w_buff1~0_In2124745083, ~z~0=~z~0_In2124745083} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out2124745083|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2124745083, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out2124745083|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2124745083, ~z$w_buff1~0=~z$w_buff1~0_In2124745083, ~z~0=~z~0_In2124745083} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:04:34,611 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1636729312 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1636729312 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1636729312 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1636729312 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1636729312 256))))) (= |P2Thread1of1ForFork0_#t~ite23_Out1636729312| |P2Thread1of1ForFork0_#t~ite24_Out1636729312|) (= ~z$w_buff1~0_In1636729312 |P2Thread1of1ForFork0_#t~ite23_Out1636729312|)) (and (not .cse0) (= ~z$w_buff1~0_In1636729312 |P2Thread1of1ForFork0_#t~ite24_Out1636729312|) (= |P2Thread1of1ForFork0_#t~ite23_In1636729312| |P2Thread1of1ForFork0_#t~ite23_Out1636729312|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1636729312, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1636729312, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1636729312|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1636729312, ~z$w_buff1~0=~z$w_buff1~0_In1636729312, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1636729312, ~weak$$choice2~0=~weak$$choice2~0_In1636729312} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1636729312, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1636729312|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1636729312, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1636729312|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1636729312, ~z$w_buff1~0=~z$w_buff1~0_In1636729312, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1636729312, ~weak$$choice2~0=~weak$$choice2~0_In1636729312} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 19:04:34,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1748247712 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1748247712 256))) (.cse0 (= (mod ~weak$$choice2~0_In-1748247712 256) 0)) (.cse4 (= (mod ~z$r_buff1_thd3~0_In-1748247712 256) 0)) (.cse5 (= |P2Thread1of1ForFork0_#t~ite30_Out-1748247712| |P2Thread1of1ForFork0_#t~ite29_Out-1748247712|)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1748247712 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite28_In-1748247712| |P2Thread1of1ForFork0_#t~ite28_Out-1748247712|) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_In-1748247712| |P2Thread1of1ForFork0_#t~ite29_Out-1748247712|) (= |P2Thread1of1ForFork0_#t~ite30_Out-1748247712| ~z$w_buff1_used~0_In-1748247712)) (and .cse0 (or (and .cse1 .cse2) .cse3 (and .cse4 .cse2)) .cse5 (= ~z$w_buff1_used~0_In-1748247712 |P2Thread1of1ForFork0_#t~ite29_Out-1748247712|)))) (let ((.cse6 (not .cse2))) (and (not .cse3) (= |P2Thread1of1ForFork0_#t~ite28_Out-1748247712| |P2Thread1of1ForFork0_#t~ite29_Out-1748247712|) (or (not .cse1) .cse6) .cse0 (= |P2Thread1of1ForFork0_#t~ite28_Out-1748247712| 0) (or (not .cse4) .cse6) .cse5)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In-1748247712|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1748247712, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1748247712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1748247712, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1748247712, ~weak$$choice2~0=~weak$$choice2~0_In-1748247712, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1748247712|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out-1748247712|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1748247712, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1748247712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1748247712, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1748247712, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1748247712|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1748247712|, ~weak$$choice2~0=~weak$$choice2~0_In-1748247712} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:04:34,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:04:34,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 19:04:34,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-301643625| |P2Thread1of1ForFork0_#t~ite39_Out-301643625|)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-301643625 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-301643625 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-301643625| ~z$w_buff1~0_In-301643625) (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-301643625| ~z~0_In-301643625)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-301643625, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-301643625, ~z$w_buff1~0=~z$w_buff1~0_In-301643625, ~z~0=~z~0_In-301643625} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-301643625|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-301643625|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-301643625, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-301643625, ~z$w_buff1~0=~z$w_buff1~0_In-301643625, ~z~0=~z~0_In-301643625} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:04:34,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In431625051 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In431625051 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out431625051|) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out431625051| ~z$w_buff0_used~0_In431625051)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In431625051, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In431625051} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In431625051, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out431625051|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In431625051} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:04:34,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-84488620 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-84488620 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-84488620 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-84488620 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-84488620| ~z$w_buff1_used~0_In-84488620) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite41_Out-84488620| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-84488620, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-84488620, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-84488620, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-84488620} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-84488620, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-84488620, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-84488620, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-84488620, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-84488620|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:04:34,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In136874472 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In136874472 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out136874472| ~z$r_buff0_thd3~0_In136874472)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out136874472|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In136874472, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In136874472} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In136874472, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In136874472, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out136874472|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:04:34,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In530529667 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In530529667 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In530529667 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In530529667 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite43_Out530529667| ~z$r_buff1_thd3~0_In530529667)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out530529667|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In530529667, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In530529667, ~z$w_buff1_used~0=~z$w_buff1_used~0_In530529667, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In530529667} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out530529667|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In530529667, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In530529667, ~z$w_buff1_used~0=~z$w_buff1_used~0_In530529667, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In530529667} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:04:34,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:04:34,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1481212181 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-1481212181 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out-1481212181| ~z$w_buff0_used~0_In-1481212181) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out-1481212181| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1481212181, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1481212181} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1481212181|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1481212181, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1481212181} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:04:34,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In1366680916 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1366680916 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1366680916 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1366680916 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1366680916|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1366680916 |P0Thread1of1ForFork1_#t~ite6_Out1366680916|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1366680916, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1366680916, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366680916, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1366680916} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1366680916, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1366680916|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1366680916, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366680916, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1366680916} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:04:34,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_In-266247578 ~z$r_buff0_thd1~0_Out-266247578)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-266247578 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-266247578 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= 0 ~z$r_buff0_thd1~0_Out-266247578) (not .cse2) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-266247578, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-266247578} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-266247578, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-266247578|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-266247578} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:04:34,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-534136806 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-534136806 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-534136806 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-534136806 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd1~0_In-534136806 |P0Thread1of1ForFork1_#t~ite8_Out-534136806|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-534136806|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-534136806, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-534136806, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-534136806, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-534136806} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-534136806|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-534136806, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-534136806, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-534136806, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-534136806} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:04:34,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:04:34,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-2106688778 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-2106688778 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-2106688778| ~z$w_buff0_used~0_In-2106688778) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-2106688778| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2106688778, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2106688778} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2106688778, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-2106688778|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2106688778} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:04:34,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd2~0_In-611159417 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-611159417 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-611159417 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-611159417 256)))) (or (and (= ~z$w_buff1_used~0_In-611159417 |P1Thread1of1ForFork2_#t~ite12_Out-611159417|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-611159417| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-611159417, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-611159417, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-611159417, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-611159417} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-611159417, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-611159417, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-611159417, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-611159417|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-611159417} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:04:34,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In734870083 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In734870083 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out734870083|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In734870083 |P1Thread1of1ForFork2_#t~ite13_Out734870083|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In734870083, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In734870083} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In734870083, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out734870083|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In734870083} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:04:34,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd2~0_In-873211722 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-873211722 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-873211722 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-873211722 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd2~0_In-873211722 |P1Thread1of1ForFork2_#t~ite14_Out-873211722|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-873211722|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-873211722, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-873211722, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-873211722, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-873211722} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-873211722, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-873211722, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-873211722, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-873211722|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-873211722} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:04:34,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:04:34,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:04:34,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1426541164 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1426541164 256) 0))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In1426541164 |ULTIMATE.start_main_#t~ite47_Out1426541164|)) (and (= ~z~0_In1426541164 |ULTIMATE.start_main_#t~ite47_Out1426541164|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426541164, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426541164, ~z$w_buff1~0=~z$w_buff1~0_In1426541164, ~z~0=~z~0_In1426541164} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426541164, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1426541164|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426541164, ~z$w_buff1~0=~z$w_buff1~0_In1426541164, ~z~0=~z~0_In1426541164} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:04:34,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 19:04:34,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1906664478 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1906664478 256)))) (or (and (= ~z$w_buff0_used~0_In-1906664478 |ULTIMATE.start_main_#t~ite49_Out-1906664478|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1906664478|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1906664478, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1906664478} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1906664478, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1906664478, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1906664478|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:04:34,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1419578850 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-1419578850 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1419578850 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1419578850 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1419578850 |ULTIMATE.start_main_#t~ite50_Out-1419578850|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1419578850| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1419578850, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1419578850, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1419578850, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1419578850} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1419578850|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1419578850, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1419578850, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1419578850, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1419578850} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:04:34,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1981756174 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1981756174 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-1981756174| 0) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-1981756174 |ULTIMATE.start_main_#t~ite51_Out-1981756174|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1981756174, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1981756174} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1981756174, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1981756174|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1981756174} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:04:34,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1656057016 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1656057016 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1656057016 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-1656057016 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1656057016| ~z$r_buff1_thd0~0_In-1656057016) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1656057016| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1656057016, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1656057016, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1656057016, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1656057016} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1656057016|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1656057016, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1656057016, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1656057016, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1656057016} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:04:34,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:04:34,673 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:04:34 BasicIcfg [2019-12-07 19:04:34,673 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:04:34,673 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:04:34,673 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:04:34,674 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:04:34,674 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:01:03" (3/4) ... [2019-12-07 19:04:34,675 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:04:34,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t678~0.base_22|) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t678~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t678~0.base_22|) |v_ULTIMATE.start_main_~#t678~0.offset_16| 0))) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= v_~z$w_buff1_used~0_500 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t678~0.base_22| 1) |v_#valid_69|) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t678~0.base_22| 4)) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (= (select .cse0 |v_ULTIMATE.start_main_~#t678~0.base_22|) 0) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= 0 |v_ULTIMATE.start_main_~#t678~0.offset_16|) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd3~0_379) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t678~0.offset=|v_ULTIMATE.start_main_~#t678~0.offset_16|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_~#t680~0.offset=|v_ULTIMATE.start_main_~#t680~0.offset_14|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ULTIMATE.start_main_~#t680~0.base=|v_ULTIMATE.start_main_~#t680~0.base_17|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_133, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t679~0.base=|v_ULTIMATE.start_main_~#t679~0.base_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ULTIMATE.start_main_~#t679~0.offset=|v_ULTIMATE.start_main_~#t679~0.offset_14|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ULTIMATE.start_main_~#t678~0.base=|v_ULTIMATE.start_main_~#t678~0.base_22|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t678~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t680~0.offset, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t680~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t679~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t679~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t678~0.base, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:04:34,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:04:34,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (not (= |v_ULTIMATE.start_main_~#t679~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t679~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t679~0.base_11|) |v_ULTIMATE.start_main_~#t679~0.offset_10| 1)) |v_#memory_int_13|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t679~0.base_11| 4)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t679~0.base_11|)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t679~0.base_11| 1)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t679~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t679~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t679~0.base=|v_ULTIMATE.start_main_~#t679~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t679~0.offset=|v_ULTIMATE.start_main_~#t679~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t679~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t679~0.offset] because there is no mapped edge [2019-12-07 19:04:34,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t680~0.base_12|) 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t680~0.base_12| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t680~0.base_12| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t680~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t680~0.base_12|) |v_ULTIMATE.start_main_~#t680~0.offset_10| 2)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t680~0.base_12|) (= |v_ULTIMATE.start_main_~#t680~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t680~0.base_12| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t680~0.offset=|v_ULTIMATE.start_main_~#t680~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t680~0.base=|v_ULTIMATE.start_main_~#t680~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t680~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t680~0.base] because there is no mapped edge [2019-12-07 19:04:34,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out2124745083| |P1Thread1of1ForFork2_#t~ite10_Out2124745083|)) (.cse2 (= (mod ~z$w_buff1_used~0_In2124745083 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In2124745083 256)))) (or (and (not .cse0) .cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out2124745083| ~z$w_buff1~0_In2124745083) (not .cse2)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out2124745083| ~z~0_In2124745083) .cse1 (or .cse2 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2124745083, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2124745083, ~z$w_buff1~0=~z$w_buff1~0_In2124745083, ~z~0=~z~0_In2124745083} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out2124745083|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2124745083, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out2124745083|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2124745083, ~z$w_buff1~0=~z$w_buff1~0_In2124745083, ~z~0=~z~0_In2124745083} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:04:34,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1636729312 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1636729312 256) 0))) (or (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1636729312 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1636729312 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1636729312 256))))) (= |P2Thread1of1ForFork0_#t~ite23_Out1636729312| |P2Thread1of1ForFork0_#t~ite24_Out1636729312|) (= ~z$w_buff1~0_In1636729312 |P2Thread1of1ForFork0_#t~ite23_Out1636729312|)) (and (not .cse0) (= ~z$w_buff1~0_In1636729312 |P2Thread1of1ForFork0_#t~ite24_Out1636729312|) (= |P2Thread1of1ForFork0_#t~ite23_In1636729312| |P2Thread1of1ForFork0_#t~ite23_Out1636729312|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1636729312, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1636729312, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1636729312|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1636729312, ~z$w_buff1~0=~z$w_buff1~0_In1636729312, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1636729312, ~weak$$choice2~0=~weak$$choice2~0_In1636729312} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1636729312, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1636729312|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1636729312, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1636729312|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1636729312, ~z$w_buff1~0=~z$w_buff1~0_In1636729312, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1636729312, ~weak$$choice2~0=~weak$$choice2~0_In1636729312} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 19:04:34,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1748247712 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1748247712 256))) (.cse0 (= (mod ~weak$$choice2~0_In-1748247712 256) 0)) (.cse4 (= (mod ~z$r_buff1_thd3~0_In-1748247712 256) 0)) (.cse5 (= |P2Thread1of1ForFork0_#t~ite30_Out-1748247712| |P2Thread1of1ForFork0_#t~ite29_Out-1748247712|)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1748247712 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite28_In-1748247712| |P2Thread1of1ForFork0_#t~ite28_Out-1748247712|) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_In-1748247712| |P2Thread1of1ForFork0_#t~ite29_Out-1748247712|) (= |P2Thread1of1ForFork0_#t~ite30_Out-1748247712| ~z$w_buff1_used~0_In-1748247712)) (and .cse0 (or (and .cse1 .cse2) .cse3 (and .cse4 .cse2)) .cse5 (= ~z$w_buff1_used~0_In-1748247712 |P2Thread1of1ForFork0_#t~ite29_Out-1748247712|)))) (let ((.cse6 (not .cse2))) (and (not .cse3) (= |P2Thread1of1ForFork0_#t~ite28_Out-1748247712| |P2Thread1of1ForFork0_#t~ite29_Out-1748247712|) (or (not .cse1) .cse6) .cse0 (= |P2Thread1of1ForFork0_#t~ite28_Out-1748247712| 0) (or (not .cse4) .cse6) .cse5)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In-1748247712|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1748247712, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1748247712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1748247712, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1748247712, ~weak$$choice2~0=~weak$$choice2~0_In-1748247712, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1748247712|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out-1748247712|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1748247712, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1748247712, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1748247712, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1748247712, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1748247712|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1748247712|, ~weak$$choice2~0=~weak$$choice2~0_In-1748247712} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:04:34,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:04:34,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 19:04:34,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-301643625| |P2Thread1of1ForFork0_#t~ite39_Out-301643625|)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-301643625 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-301643625 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-301643625| ~z$w_buff1~0_In-301643625) (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-301643625| ~z~0_In-301643625)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-301643625, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-301643625, ~z$w_buff1~0=~z$w_buff1~0_In-301643625, ~z~0=~z~0_In-301643625} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-301643625|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-301643625|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-301643625, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-301643625, ~z$w_buff1~0=~z$w_buff1~0_In-301643625, ~z~0=~z~0_In-301643625} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:04:34,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In431625051 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In431625051 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out431625051|) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out431625051| ~z$w_buff0_used~0_In431625051)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In431625051, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In431625051} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In431625051, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out431625051|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In431625051} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:04:34,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-84488620 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-84488620 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-84488620 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-84488620 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-84488620| ~z$w_buff1_used~0_In-84488620) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite41_Out-84488620| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-84488620, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-84488620, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-84488620, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-84488620} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-84488620, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-84488620, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-84488620, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-84488620, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-84488620|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:04:34,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In136874472 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In136874472 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out136874472| ~z$r_buff0_thd3~0_In136874472)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out136874472|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In136874472, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In136874472} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In136874472, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In136874472, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out136874472|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:04:34,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In530529667 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In530529667 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In530529667 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In530529667 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite43_Out530529667| ~z$r_buff1_thd3~0_In530529667)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out530529667|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In530529667, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In530529667, ~z$w_buff1_used~0=~z$w_buff1_used~0_In530529667, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In530529667} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out530529667|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In530529667, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In530529667, ~z$w_buff1_used~0=~z$w_buff1_used~0_In530529667, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In530529667} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:04:34,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:04:34,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1481212181 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-1481212181 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out-1481212181| ~z$w_buff0_used~0_In-1481212181) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out-1481212181| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1481212181, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1481212181} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1481212181|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1481212181, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1481212181} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:04:34,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In1366680916 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1366680916 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1366680916 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1366680916 256) 0))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1366680916|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1366680916 |P0Thread1of1ForFork1_#t~ite6_Out1366680916|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1366680916, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1366680916, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366680916, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1366680916} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1366680916, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1366680916|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1366680916, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366680916, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1366680916} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:04:34,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_In-266247578 ~z$r_buff0_thd1~0_Out-266247578)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-266247578 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-266247578 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= 0 ~z$r_buff0_thd1~0_Out-266247578) (not .cse2) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-266247578, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-266247578} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-266247578, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-266247578|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-266247578} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:04:34,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-534136806 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-534136806 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-534136806 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-534136806 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd1~0_In-534136806 |P0Thread1of1ForFork1_#t~ite8_Out-534136806|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-534136806|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-534136806, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-534136806, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-534136806, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-534136806} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-534136806|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-534136806, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-534136806, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-534136806, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-534136806} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:04:34,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:04:34,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-2106688778 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-2106688778 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-2106688778| ~z$w_buff0_used~0_In-2106688778) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-2106688778| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2106688778, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2106688778} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2106688778, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-2106688778|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2106688778} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:04:34,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd2~0_In-611159417 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-611159417 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-611159417 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-611159417 256)))) (or (and (= ~z$w_buff1_used~0_In-611159417 |P1Thread1of1ForFork2_#t~ite12_Out-611159417|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-611159417| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-611159417, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-611159417, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-611159417, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-611159417} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-611159417, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-611159417, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-611159417, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-611159417|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-611159417} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:04:34,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In734870083 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In734870083 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out734870083|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In734870083 |P1Thread1of1ForFork2_#t~ite13_Out734870083|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In734870083, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In734870083} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In734870083, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out734870083|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In734870083} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:04:34,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd2~0_In-873211722 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-873211722 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-873211722 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-873211722 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd2~0_In-873211722 |P1Thread1of1ForFork2_#t~ite14_Out-873211722|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-873211722|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-873211722, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-873211722, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-873211722, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-873211722} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-873211722, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-873211722, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-873211722, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-873211722|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-873211722} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:04:34,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:04:34,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:04:34,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1426541164 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1426541164 256) 0))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In1426541164 |ULTIMATE.start_main_#t~ite47_Out1426541164|)) (and (= ~z~0_In1426541164 |ULTIMATE.start_main_#t~ite47_Out1426541164|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426541164, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426541164, ~z$w_buff1~0=~z$w_buff1~0_In1426541164, ~z~0=~z~0_In1426541164} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1426541164, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1426541164|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1426541164, ~z$w_buff1~0=~z$w_buff1~0_In1426541164, ~z~0=~z~0_In1426541164} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:04:34,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 19:04:34,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1906664478 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1906664478 256)))) (or (and (= ~z$w_buff0_used~0_In-1906664478 |ULTIMATE.start_main_#t~ite49_Out-1906664478|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1906664478|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1906664478, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1906664478} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1906664478, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1906664478, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1906664478|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:04:34,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1419578850 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-1419578850 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1419578850 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1419578850 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1419578850 |ULTIMATE.start_main_#t~ite50_Out-1419578850|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1419578850| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1419578850, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1419578850, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1419578850, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1419578850} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1419578850|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1419578850, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1419578850, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1419578850, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1419578850} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:04:34,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1981756174 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1981756174 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out-1981756174| 0) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-1981756174 |ULTIMATE.start_main_#t~ite51_Out-1981756174|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1981756174, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1981756174} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1981756174, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1981756174|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1981756174} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:04:34,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1656057016 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1656057016 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1656057016 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-1656057016 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1656057016| ~z$r_buff1_thd0~0_In-1656057016) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite52_Out-1656057016| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1656057016, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1656057016, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1656057016, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1656057016} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1656057016|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1656057016, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1656057016, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1656057016, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1656057016} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:04:34,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:04:34,740 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_80079e76-f278-49c0-8c92-2d5af40dcf7c/bin/uautomizer/witness.graphml [2019-12-07 19:04:34,740 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:04:34,741 INFO L168 Benchmark]: Toolchain (without parser) took 212549.36 ms. Allocated memory was 1.0 GB in the beginning and 8.9 GB in the end (delta: 7.8 GB). Free memory was 934.0 MB in the beginning and 5.4 GB in the end (delta: -4.5 GB). Peak memory consumption was 3.4 GB. Max. memory is 11.5 GB. [2019-12-07 19:04:34,742 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:04:34,742 INFO L168 Benchmark]: CACSL2BoogieTranslator took 382.36 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.1 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -132.5 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. [2019-12-07 19:04:34,742 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:04:34,742 INFO L168 Benchmark]: Boogie Preprocessor took 25.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:04:34,743 INFO L168 Benchmark]: RCFGBuilder took 399.56 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. [2019-12-07 19:04:34,743 INFO L168 Benchmark]: TraceAbstraction took 211634.53 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.7 GB). Free memory was 1.0 GB in the beginning and 5.4 GB in the end (delta: -4.4 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-12-07 19:04:34,743 INFO L168 Benchmark]: Witness Printer took 66.94 ms. Allocated memory is still 8.9 GB. Free memory was 5.4 GB in the beginning and 5.4 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. [2019-12-07 19:04:34,745 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 382.36 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.1 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -132.5 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 399.56 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.5 MB). Peak memory consumption was 55.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 211634.53 ms. Allocated memory was 1.1 GB in the beginning and 8.9 GB in the end (delta: 7.7 GB). Free memory was 1.0 GB in the beginning and 5.4 GB in the end (delta: -4.4 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. * Witness Printer took 66.94 ms. Allocated memory is still 8.9 GB. Free memory was 5.4 GB in the beginning and 5.4 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 7047 VarBasedMoverChecksPositive, 336 VarBasedMoverChecksNegative, 168 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 130103 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t678, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t679, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L829] FCALL, FORK 0 pthread_create(&t680, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 2 [L783] 3 __unbuffered_p2_EAX = y [L786] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L787] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L788] 3 z$flush_delayed = weak$$choice2 [L789] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L766] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L791] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L792] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L793] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L803] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L804] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L835] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L837] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L838] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 211.4s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 56.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9165 SDtfs, 11346 SDslu, 36042 SDs, 0 SdLazy, 17397 SolverSat, 350 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 484 GetRequests, 48 SyntacticMatches, 12 SemanticMatches, 424 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3585 ImplicationChecksByTransitivity, 3.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=371396occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 131.0s AutomataMinimizationTime, 34 MinimizatonAttempts, 663445 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 1400 NumberOfCodeBlocks, 1400 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1300 ConstructedInterpolants, 0 QuantifiedInterpolants, 341642 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...